diff options
Diffstat (limited to 'meta/recipes-kernel/linux/linux-omap2-git/beagleboard/TWL4030-02.patch')
-rw-r--r-- | meta/recipes-kernel/linux/linux-omap2-git/beagleboard/TWL4030-02.patch | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/meta/recipes-kernel/linux/linux-omap2-git/beagleboard/TWL4030-02.patch b/meta/recipes-kernel/linux/linux-omap2-git/beagleboard/TWL4030-02.patch new file mode 100644 index 0000000000..48a59b945b --- /dev/null +++ b/meta/recipes-kernel/linux/linux-omap2-git/beagleboard/TWL4030-02.patch | |||
@@ -0,0 +1,71 @@ | |||
1 | TWL4030: clear TWL GPIO interrupt status registers | ||
2 | |||
3 | From: Paul Walmsley <paul@pwsan.com> | ||
4 | |||
5 | twl_init_irq() does not clear the TWL GPIO ISR registers, but the PIH | ||
6 | ISR thinks that it has. This causes any previously-latched GPIO interrupts | ||
7 | to be stuck on until twl4030-gpio.c initializes, often drowning the console in | ||
8 | |||
9 | TWL4030 module irq 368 is disabled but can't be masked! | ||
10 | |||
11 | messages. This seems to be a particular problem when booting on Beagle. | ||
12 | |||
13 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
14 | --- | ||
15 | |||
16 | drivers/i2c/chips/twl4030-core.c | 42 ++++++++++++++++++++++++++++++++++++++ | ||
17 | 1 files changed, 42 insertions(+), 0 deletions(-) | ||
18 | |||
19 | diff --git a/drivers/i2c/chips/twl4030-core.c b/drivers/i2c/chips/twl4030-core.c | ||
20 | index ff662bc..dfc3805 100644 | ||
21 | --- a/drivers/i2c/chips/twl4030-core.c | ||
22 | +++ b/drivers/i2c/chips/twl4030-core.c | ||
23 | @@ -857,6 +857,48 @@ static void twl_init_irq(void) | ||
24 | return; | ||
25 | } | ||
26 | |||
27 | + /* GPIO_ISR1A */ | ||
28 | + res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x19); | ||
29 | + if (res < 0) { | ||
30 | + pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
31 | + return; | ||
32 | + } | ||
33 | + | ||
34 | + /* GPIO_ISR2A */ | ||
35 | + res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x1a); | ||
36 | + if (res < 0) { | ||
37 | + pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
38 | + return; | ||
39 | + } | ||
40 | + | ||
41 | + /* GPIO_ISR3A */ | ||
42 | + res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x1b); | ||
43 | + if (res < 0) { | ||
44 | + pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
45 | + return; | ||
46 | + } | ||
47 | + | ||
48 | + /* GPIO_ISR1B */ | ||
49 | + res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x1f); | ||
50 | + if (res < 0) { | ||
51 | + pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
52 | + return; | ||
53 | + } | ||
54 | + | ||
55 | + /* GPIO_ISR2B */ | ||
56 | + res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x20); | ||
57 | + if (res < 0) { | ||
58 | + pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
59 | + return; | ||
60 | + } | ||
61 | + | ||
62 | + /* GPIO_ISR3B */ | ||
63 | + res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x21); | ||
64 | + if (res < 0) { | ||
65 | + pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
66 | + return; | ||
67 | + } | ||
68 | + | ||
69 | /* install an irq handler for each of the PIH modules */ | ||
70 | for (i = TWL4030_IRQ_BASE; i < TWL4030_IRQ_END; i++) { | ||
71 | set_irq_chip(i, &twl4030_irq_chip); | ||