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-rw-r--r--meta/recipes-kernel/linux/linux-omap-2.6.29/overo/ehci.patch113
1 files changed, 113 insertions, 0 deletions
diff --git a/meta/recipes-kernel/linux/linux-omap-2.6.29/overo/ehci.patch b/meta/recipes-kernel/linux/linux-omap-2.6.29/overo/ehci.patch
new file mode 100644
index 0000000000..72c6b9bec3
--- /dev/null
+++ b/meta/recipes-kernel/linux/linux-omap-2.6.29/overo/ehci.patch
@@ -0,0 +1,113 @@
1diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c
2index 489439d..2c6305b 100644
3--- a/arch/arm/mach-omap2/usb-ehci.c
4+++ b/arch/arm/mach-omap2/usb-ehci.c
5@@ -152,9 +152,7 @@ static void setup_ehci_io_mux(void)
6
7 void __init usb_ehci_init(void)
8 {
9- /* Setup Pin IO MUX for EHCI */
10- if (cpu_is_omap34xx())
11- setup_ehci_io_mux();
12+ /* TODO: Setup Pin IO MUX for EHCI - moved this temporarily to U-boot */
13
14 if (platform_device_register(&ehci_device) < 0) {
15 printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n");
16
17diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
18index 1b3266c..8472996 100644
19--- a/drivers/usb/host/ehci-omap.c
20+++ b/drivers/usb/host/ehci-omap.c
21@@ -48,16 +48,26 @@
22 * to get the PHY state machine in working state
23 */
24 #define EXTERNAL_PHY_RESET
25+#ifdef CONFIG_MACH_OVERO
26+#define EXT_PHY_RESET_GPIO_PORT2 (183)
27+#else
28 #define EXT_PHY_RESET_GPIO_PORT1 (57)
29 #define EXT_PHY_RESET_GPIO_PORT2 (61)
30+#endif
31 #define EXT_PHY_RESET_DELAY (10)
32
33+#define PHY_STP_PULLUP_ENABLE (0x10)
34+#define PHY_STP_PULLUP_DISABLE (0x90)
35+
36+
37 /* ISSUE2:
38 * USBHOST supports External charge pump PHYs only
39 * Use the VBUS from Port1 to power VBUS of Port2 externally
40 * So use Port2 as the working ULPI port
41 */
42+#ifndef CONFIG_MACH_OVERO
43 #define VBUS_INTERNAL_CHARGEPUMP_HACK
44+#endif
45
46 #endif /* CONFIG_OMAP_EHCI_PHY_MODE */
47
48@@ -225,14 +235,43 @@ static int omap_start_ehc(struct platform_device *dev, struct usb_hcd *hcd)
49
50 #ifdef EXTERNAL_PHY_RESET
51 /* Refer: ISSUE1 */
52+#ifndef CONFIG_MACH_OVERO
53 gpio_request(EXT_PHY_RESET_GPIO_PORT1, "USB1 PHY reset");
54 gpio_direction_output(EXT_PHY_RESET_GPIO_PORT1, 0);
55+#endif
56 gpio_request(EXT_PHY_RESET_GPIO_PORT2, "USB2 PHY reset");
57 gpio_direction_output(EXT_PHY_RESET_GPIO_PORT2, 0);
58+ gpio_set_value(EXT_PHY_RESET_GPIO_PORT2, 0);
59 /* Hold the PHY in RESET for enough time till DIR is high */
60 udelay(EXT_PHY_RESET_DELAY);
61 #endif
62
63+ /*
64+ * The PHY register 0x7 - Interface Control register is
65+ * configured to disable the integrated STP pull-up resistor
66+ * used for interface protection.
67+ *
68+ * May not need to be here.
69+ */
70+ omap_writel((0x7 << EHCI_INSNREG05_ULPI_REGADD_SHIFT) |/* interface reg */
71+ (2 << EHCI_INSNREG05_ULPI_OPSEL_SHIFT) |/* Write */
72+ (1 << EHCI_INSNREG05_ULPI_PORTSEL_SHIFT) |/* Port1 */
73+ (1 << EHCI_INSNREG05_ULPI_CONTROL_SHIFT) |/* Start */
74+ (PHY_STP_PULLUP_DISABLE),
75+ EHCI_INSNREG05_ULPI);
76+
77+ while (!(omap_readl(EHCI_INSNREG05_ULPI) & (1<<EHCI_INSNREG05_ULPI_CONTROL_SHIFT)));
78+
79+ /* Force PHY to HS */
80+ omap_writel((0x4 << EHCI_INSNREG05_ULPI_REGADD_SHIFT) |/* function ctrl */
81+ (2 << EHCI_INSNREG05_ULPI_OPSEL_SHIFT) |/* Write */
82+ (1 << EHCI_INSNREG05_ULPI_PORTSEL_SHIFT) |/* Port1 */
83+ (1 << EHCI_INSNREG05_ULPI_CONTROL_SHIFT) |/* Start */
84+ (0x40),
85+ EHCI_INSNREG05_ULPI);
86+
87+ while (!(omap_readl(EHCI_INSNREG05_ULPI) & (1<<EHCI_INSNREG05_ULPI_CONTROL_SHIFT)));
88+
89 /* Configure TLL for 60Mhz clk for ULPI */
90 ehci_clocks->usbtll_fck_clk = clk_get(&dev->dev, USBHOST_TLL_FCLK);
91 if (IS_ERR(ehci_clocks->usbtll_fck_clk))
92@@ -307,7 +346,9 @@ static int omap_start_ehc(struct platform_device *dev, struct usb_hcd *hcd)
93 * Hold the PHY in RESET for enough time till PHY is settled and ready
94 */
95 udelay(EXT_PHY_RESET_DELAY);
96+#ifndef CONFIG_MACH_OVERO
97 gpio_set_value(EXT_PHY_RESET_GPIO_PORT1, 1);
98+#endif
99 gpio_set_value(EXT_PHY_RESET_GPIO_PORT2, 1);
100 #endif
101
102@@ -393,7 +434,9 @@ static void omap_stop_ehc(struct platform_device *dev, struct usb_hcd *hcd)
103
104
105 #ifdef EXTERNAL_PHY_RESET
106+#ifndef CONFIG_MACH_OVERO
107 gpio_free(EXT_PHY_RESET_GPIO_PORT1);
108+#endif
109 gpio_free(EXT_PHY_RESET_GPIO_PORT2);
110 #endif
111
112--
1131.6.0.4.790.gaa14a