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Diffstat (limited to 'meta/recipes-kernel/linux/linux-omap-2.6.29/dss2/0019-DSS2-Check-fclk-limits-when-configuring-video-plane.patch')
-rw-r--r--meta/recipes-kernel/linux/linux-omap-2.6.29/dss2/0019-DSS2-Check-fclk-limits-when-configuring-video-plane.patch183
1 files changed, 183 insertions, 0 deletions
diff --git a/meta/recipes-kernel/linux/linux-omap-2.6.29/dss2/0019-DSS2-Check-fclk-limits-when-configuring-video-plane.patch b/meta/recipes-kernel/linux/linux-omap-2.6.29/dss2/0019-DSS2-Check-fclk-limits-when-configuring-video-plane.patch
new file mode 100644
index 0000000000..daa95ca50d
--- /dev/null
+++ b/meta/recipes-kernel/linux/linux-omap-2.6.29/dss2/0019-DSS2-Check-fclk-limits-when-configuring-video-plane.patch
@@ -0,0 +1,183 @@
1From 67f3fc050ab4e2006d5b7ec6ec341896627181ab Mon Sep 17 00:00:00 2001
2From: =?utf-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@nokia.com>
3Date: Mon, 6 Apr 2009 17:32:04 +0200
4Subject: [PATCH] DSS2: Check fclk limits when configuring video planes
5MIME-Version: 1.0
6Content-Type: text/plain; charset=utf-8
7Content-Transfer-Encoding: 8bit
8
9Check that the currect functional clock is fast enough to support
10the requested scaling ratios. Also check if 5-tap filtering can be
11used even though the downscaling ratio is less than 1:2 since the
12functional clock rate required for 5-tap filtering can be less than
13the requirement for 3-tap filtering, and 5-tap filtering should look
14better.
15
16Signed-off-by: Ville Syrjälä <ville.syrjala@nokia.com>
17---
18 drivers/video/omap2/dss/dispc.c | 104 ++++++++++++++++++++++++++++++++++++---
19 1 files changed, 97 insertions(+), 7 deletions(-)
20
21diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
22index 41734f3..61861d8 100644
23--- a/drivers/video/omap2/dss/dispc.c
24+++ b/drivers/video/omap2/dss/dispc.c
25@@ -1026,11 +1026,11 @@ static void _dispc_set_vid_accu1(enum omap_plane plane, int haccu, int vaccu)
26 static void _dispc_set_scaling(enum omap_plane plane,
27 u16 orig_width, u16 orig_height,
28 u16 out_width, u16 out_height,
29- bool ilace)
30+ bool ilace, bool five_taps)
31 {
32 int fir_hinc;
33 int fir_vinc;
34- int hscaleup, vscaleup, five_taps;
35+ int hscaleup, vscaleup;
36 int fieldmode = 0;
37 int accu0 = 0;
38 int accu1 = 0;
39@@ -1040,7 +1040,6 @@ static void _dispc_set_scaling(enum omap_plane plane,
40
41 hscaleup = orig_width <= out_width;
42 vscaleup = orig_height <= out_height;
43- five_taps = orig_height > out_height * 2;
44
45 _dispc_set_scale_coef(plane, hscaleup, vscaleup, five_taps);
46
47@@ -1283,6 +1282,73 @@ static void calc_rotation_offset(u8 rotation, bool mirror,
48 }
49 }
50
51+static unsigned long calc_fclk_five_taps(u16 width, u16 height,
52+ u16 out_width, u16 out_height, enum omap_color_mode color_mode)
53+{
54+ u32 fclk = 0;
55+ /* FIXME venc pclk? */
56+ u64 tmp, pclk = dispc_pclk_rate();
57+
58+ if (height > out_height) {
59+ /* FIXME get real display PPL */
60+ unsigned int ppl = 800;
61+
62+ tmp = pclk * height * out_width;
63+ do_div(tmp, 2 * out_height * ppl);
64+ fclk = tmp;
65+
66+ if (height > 2 * out_height) {
67+ tmp = pclk * (height - 2 * out_height) * out_width;
68+ do_div(tmp, 2 * out_height * (ppl - out_width));
69+ fclk = max(fclk, (u32) tmp);
70+ }
71+ }
72+
73+ if (width > out_width) {
74+ tmp = pclk * width;
75+ do_div(tmp, out_width);
76+ fclk = max(fclk, (u32) tmp);
77+
78+ if (color_mode == OMAP_DSS_COLOR_RGB24U)
79+ fclk <<= 1;
80+ }
81+
82+ return fclk;
83+}
84+
85+static unsigned long calc_fclk(u16 width, u16 height,
86+ u16 out_width, u16 out_height,
87+ enum omap_color_mode color_mode, bool five_taps)
88+{
89+ unsigned int hf, vf;
90+
91+ if (five_taps)
92+ return calc_fclk_five_taps(width, height,
93+ out_width, out_height, color_mode);
94+
95+ /*
96+ * FIXME how to determine the 'A' factor
97+ * for the no downscaling case ?
98+ */
99+
100+ if (width > 3 * out_width)
101+ hf = 4;
102+ else if (width > 2 * out_width)
103+ hf = 3;
104+ else if (width > out_width)
105+ hf = 2;
106+ else
107+ hf = 1;
108+
109+ if (height > out_height)
110+ vf = 2;
111+ else
112+ vf = 1;
113+
114+ /* FIXME venc pclk? */
115+ return dispc_pclk_rate() * vf * hf;
116+}
117+
118 static int _dispc_setup_plane(enum omap_plane plane,
119 enum omap_channel channel_out,
120 u32 paddr, u16 screen_width,
121@@ -1294,7 +1360,7 @@ static int _dispc_setup_plane(enum omap_plane plane,
122 u8 rotation, int mirror)
123 {
124 const int maxdownscale = cpu_is_omap34xx() ? 4 : 2;
125- bool five_taps = height > out_height * 2;
126+ bool five_taps = 0;
127 bool fieldmode = 0;
128 int cconv = 0;
129 unsigned offset0, offset1;
130@@ -1323,8 +1389,8 @@ static int _dispc_setup_plane(enum omap_plane plane,
131 }
132 } else {
133 /* video plane */
134- if (width > (2048 >> five_taps))
135- return -EINVAL;
136+
137+ unsigned long fclk;
138
139 if (out_width < width / maxdownscale ||
140 out_width > width * 8)
141@@ -1356,6 +1422,30 @@ static int _dispc_setup_plane(enum omap_plane plane,
142 default:
143 return -EINVAL;
144 }
145+
146+ /* Must use 5-tap filter? */
147+ five_taps = height > out_height * 2;
148+
149+ /* Try to use 5-tap filter whenever possible. */
150+ if (cpu_is_omap34xx() && !five_taps &&
151+ height > out_height && width <= 1024) {
152+ fclk = calc_fclk_five_taps(width, height,
153+ out_width, out_height, color_mode);
154+ if (fclk <= dispc_fclk_rate())
155+ five_taps = true;
156+ }
157+
158+ if (width > (2048 >> five_taps))
159+ return -EINVAL;
160+
161+ fclk = calc_fclk(width, height, out_width, out_height,
162+ color_mode, five_taps);
163+
164+ DSSDBG("required fclk rate = %lu Hz\n", fclk);
165+ DSSDBG("current fclk rate = %lu Hz\n", dispc_fclk_rate());
166+
167+ if (fclk > dispc_fclk_rate())
168+ return -EINVAL;
169 }
170
171 if (ilace && height >= out_height)
172@@ -1399,7 +1489,7 @@ static int _dispc_setup_plane(enum omap_plane plane,
173 if (plane != OMAP_DSS_GFX) {
174 _dispc_set_scaling(plane, width, height,
175 out_width, out_height,
176- ilace);
177+ ilace, five_taps);
178 _dispc_set_vid_size(plane, out_width, out_height);
179 _dispc_set_vid_color_conv(plane, cconv);
180 }
181--
1821.5.6.5
183
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