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-rw-r--r--meta/recipes-kernel/linux/linux-2.6.23/em-x270/em-x270.patch12063
1 files changed, 12063 insertions, 0 deletions
diff --git a/meta/recipes-kernel/linux/linux-2.6.23/em-x270/em-x270.patch b/meta/recipes-kernel/linux/linux-2.6.23/em-x270/em-x270.patch
new file mode 100644
index 0000000000..3c28be83c7
--- /dev/null
+++ b/meta/recipes-kernel/linux/linux-2.6.23/em-x270/em-x270.patch
@@ -0,0 +1,12063 @@
1 arch/arm/Kconfig | 13 +-
2 arch/arm/configs/em_x270_defconfig | 367 +++--
3 arch/arm/mach-pxa/Kconfig | 8 +
4 arch/arm/mach-pxa/Makefile | 9 +-
5 arch/arm/mach-pxa/cpu-pxa.c | 442 ++++++
6 arch/arm/mach-pxa/em-x270-devices.c | 331 +++++
7 arch/arm/mach-pxa/em-x270-lcd.c | 223 +++
8 arch/arm/mach-pxa/em-x270-pm.c | 892 ++++++++++++
9 arch/arm/mach-pxa/em-x270.c | 127 ++-
10 arch/arm/mach-pxa/pwr-i2c.c | 539 +++++++
11 arch/arm/mach-pxa/pxa27x.c | 6 +-
12 arch/arm/mach-pxa/spitz.c | 27 +
13 drivers/i2c/chips/Kconfig | 13 +
14 drivers/i2c/chips/Makefile | 1 +
15 drivers/i2c/chips/da9030.c | 1213 ++++++++++++++++
16 drivers/i2c/chips/da9030.h | 282 ++++
17 drivers/input/touchscreen/Kconfig | 43 +
18 drivers/input/touchscreen/Makefile | 14 +
19 drivers/input/touchscreen/wm9705.c | 360 +++++
20 drivers/input/touchscreen/wm9712.c | 464 ++++++
21 drivers/input/touchscreen/wm9713.c | 461 ++++++
22 drivers/input/touchscreen/wm97xx-core.c | 859 +++++++++++
23 drivers/leds/Kconfig | 6 +
24 drivers/leds/Makefile | 1 +
25 drivers/leds/leds-em-x270.c | 99 ++
26 drivers/mtd/chips/jedec_probe.c | 58 +-
27 drivers/net/dm9000.c | 1 +
28 drivers/power/Kconfig | 6 +
29 drivers/power/Makefile | 1 +
30 drivers/power/em_x270_battery.c | 579 ++++++++
31 drivers/usb/gadget/Kconfig | 20 +
32 drivers/usb/gadget/Makefile | 1 +
33 drivers/usb/gadget/epautoconf.c | 9 +-
34 drivers/usb/gadget/ether.c | 63 +-
35 drivers/usb/gadget/file_storage.c | 11 +-
36 drivers/usb/gadget/pxa27x_udc.c | 2387 +++++++++++++++++++++++++++++++
37 drivers/usb/gadget/pxa27x_udc.h | 298 ++++
38 drivers/usb/gadget/pxa2xx_udc.h | 7 +-
39 drivers/usb/gadget/serial.c | 18 +-
40 drivers/usb/gadget/zero.c | 13 +-
41 drivers/video/backlight/Kconfig | 2 +-
42 include/asm-arm/arch-pxa/pwr-i2c.h | 61 +
43 include/linux/da9030.h | 118 ++
44 include/linux/usb_gadget.h | 23 +-
45 include/linux/wm97xx.h | 291 ++++
46 sound/soc/pxa/Kconfig | 9 +
47 sound/soc/pxa/Makefile | 2 +
48 sound/soc/pxa/em-x270.c | 137 ++
49 48 files changed, 10742 insertions(+), 173 deletions(-)
50
51diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
52index 691aae3..cf1dbc2 100644
53--- a/arch/arm/Kconfig
54+++ b/arch/arm/Kconfig
55@@ -858,7 +858,7 @@ config KEXEC
56
57 endmenu
58
59-if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX )
60+if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX || ARCH_PXA)
61
62 menu "CPU Frequency scaling"
63
64@@ -894,6 +894,15 @@ config CPU_FREQ_IMX
65
66 If in doubt, say N.
67
68+config CPU_FREQ_PXA
69+ tristate "CPUfreq driver for PXA2xx CPUs"
70+ depends on CPU_FREQ && ARCH_PXA
71+ default y
72+ help
73+ Thes enables the CPUfreq driver for PXA2xx CPUs.
74+
75+ If in doubt, say Y.
76+
77 endmenu
78
79 endif
80@@ -1029,6 +1038,8 @@ source "drivers/spi/Kconfig"
81
82 source "drivers/w1/Kconfig"
83
84+source "drivers/power/Kconfig"
85+
86 source "drivers/hwmon/Kconfig"
87
88 #source "drivers/l3/Kconfig"
89diff --git a/arch/arm/configs/em_x270_defconfig b/arch/arm/configs/em_x270_defconfig
90index 6bea090..3246136 100644
91--- a/arch/arm/configs/em_x270_defconfig
92+++ b/arch/arm/configs/em_x270_defconfig
93@@ -1,13 +1,13 @@
94 #
95 # Automatically generated make config: don't edit
96-# Linux kernel version: 2.6.22
97-# Mon Jul 9 15:18:20 2007
98+# Linux kernel version: 2.6.23-rc9
99+# Tue Oct 9 11:19:21 2007
100 #
101 CONFIG_ARM=y
102 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
103 CONFIG_GENERIC_GPIO=y
104 CONFIG_GENERIC_TIME=y
105-# CONFIG_GENERIC_CLOCKEVENTS is not set
106+CONFIG_GENERIC_CLOCKEVENTS=y
107 CONFIG_MMU=y
108 # CONFIG_NO_IOPORT is not set
109 CONFIG_GENERIC_HARDIRQS=y
110@@ -27,25 +27,20 @@ CONFIG_VECTORS_BASE=0xffff0000
111 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
112
113 #
114-# Code maturity level options
115+# General setup
116 #
117 CONFIG_EXPERIMENTAL=y
118 CONFIG_BROKEN_ON_SMP=y
119 CONFIG_INIT_ENV_ARG_LIMIT=32
120-
121-#
122-# General setup
123-#
124 CONFIG_LOCALVERSION="-em-x270"
125 # CONFIG_LOCALVERSION_AUTO is not set
126 CONFIG_SWAP=y
127 CONFIG_SYSVIPC=y
128-# CONFIG_IPC_NS is not set
129 CONFIG_SYSVIPC_SYSCTL=y
130 # CONFIG_POSIX_MQUEUE is not set
131 # CONFIG_BSD_PROCESS_ACCT is not set
132 # CONFIG_TASKSTATS is not set
133-# CONFIG_UTS_NS is not set
134+# CONFIG_USER_NS is not set
135 # CONFIG_AUDIT is not set
136 CONFIG_IKCONFIG=y
137 CONFIG_IKCONFIG_PROC=y
138@@ -71,34 +66,27 @@ CONFIG_FUTEX=y
139 CONFIG_ANON_INODES=y
140 CONFIG_EPOLL=y
141 CONFIG_SIGNALFD=y
142-CONFIG_TIMERFD=y
143 CONFIG_EVENTFD=y
144 CONFIG_SHMEM=y
145 CONFIG_VM_EVENT_COUNTERS=y
146-CONFIG_SLAB=y
147-# CONFIG_SLUB is not set
148+CONFIG_SLUB_DEBUG=y
149+# CONFIG_SLAB is not set
150+CONFIG_SLUB=y
151 # CONFIG_SLOB is not set
152 CONFIG_RT_MUTEXES=y
153 # CONFIG_TINY_SHMEM is not set
154 CONFIG_BASE_SMALL=0
155-
156-#
157-# Loadable module support
158-#
159 CONFIG_MODULES=y
160 CONFIG_MODULE_UNLOAD=y
161 CONFIG_MODULE_FORCE_UNLOAD=y
162 # CONFIG_MODVERSIONS is not set
163 # CONFIG_MODULE_SRCVERSION_ALL is not set
164 CONFIG_KMOD=y
165-
166-#
167-# Block layer
168-#
169 CONFIG_BLOCK=y
170 # CONFIG_LBD is not set
171 # CONFIG_BLK_DEV_IO_TRACE is not set
172 # CONFIG_LSF is not set
173+# CONFIG_BLK_DEV_BSG is not set
174
175 #
176 # IO Schedulers
177@@ -139,6 +127,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
178 # CONFIG_ARCH_L7200 is not set
179 # CONFIG_ARCH_KS8695 is not set
180 # CONFIG_ARCH_NS9XXX is not set
181+# CONFIG_ARCH_MXC is not set
182 # CONFIG_ARCH_PNX4008 is not set
183 CONFIG_ARCH_PXA=y
184 # CONFIG_ARCH_RPC is not set
185@@ -160,6 +149,15 @@ CONFIG_ARCH_PXA=y
186 # CONFIG_MACH_TRIZEPS4 is not set
187 CONFIG_MACH_EM_X270=y
188 CONFIG_PXA27x=y
189+CONFIG_PXA_PWR_I2C=y
190+
191+#
192+# Boot options
193+#
194+
195+#
196+# Power management
197+#
198
199 #
200 # Processor Type
201@@ -185,6 +183,7 @@ CONFIG_XSCALE_PMU=y
202 #
203 # Bus support
204 #
205+# CONFIG_PCI_SYSCALL is not set
206 # CONFIG_ARCH_SUPPORTS_MSI is not set
207
208 #
209@@ -196,8 +195,9 @@ CONFIG_XSCALE_PMU=y
210 # Kernel Features
211 #
212 # CONFIG_TICK_ONESHOT is not set
213+# CONFIG_NO_HZ is not set
214+# CONFIG_HIGH_RES_TIMERS is not set
215 # CONFIG_PREEMPT is not set
216-# CONFIG_NO_IDLE_HZ is not set
217 CONFIG_HZ=100
218 CONFIG_AEABI=y
219 CONFIG_OABI_COMPAT=y
220@@ -212,6 +212,8 @@ CONFIG_FLAT_NODE_MEM_MAP=y
221 CONFIG_SPLIT_PTLOCK_CPUS=4096
222 # CONFIG_RESOURCES_64BIT is not set
223 CONFIG_ZONE_DMA_FLAG=1
224+CONFIG_BOUNCE=y
225+CONFIG_VIRT_TO_BUS=y
226 CONFIG_ALIGNMENT_TRAP=y
227
228 #
229@@ -219,11 +221,28 @@ CONFIG_ALIGNMENT_TRAP=y
230 #
231 CONFIG_ZBOOT_ROM_TEXT=0x0
232 CONFIG_ZBOOT_ROM_BSS=0x0
233-CONFIG_CMDLINE=""
234+CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=jffs2 console=ttyS0,115200"
235 # CONFIG_XIP_KERNEL is not set
236 # CONFIG_KEXEC is not set
237
238 #
239+# CPU Frequency scaling
240+#
241+CONFIG_CPU_FREQ=y
242+CONFIG_CPU_FREQ_TABLE=y
243+# CONFIG_CPU_FREQ_DEBUG is not set
244+CONFIG_CPU_FREQ_STAT=y
245+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
246+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
247+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
248+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
249+CONFIG_CPU_FREQ_GOV_POWERSAVE=m
250+CONFIG_CPU_FREQ_GOV_USERSPACE=m
251+CONFIG_CPU_FREQ_GOV_ONDEMAND=m
252+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
253+CONFIG_CPU_FREQ_PXA=y
254+
255+#
256 # Floating point emulation
257 #
258
259@@ -238,8 +257,8 @@ CONFIG_FPE_NWFPE=y
260 # Userspace binary formats
261 #
262 CONFIG_BINFMT_ELF=y
263-# CONFIG_BINFMT_AOUT is not set
264-# CONFIG_BINFMT_MISC is not set
265+CONFIG_BINFMT_AOUT=m
266+CONFIG_BINFMT_MISC=m
267
268 #
269 # Power management options
270@@ -247,8 +266,10 @@ CONFIG_BINFMT_ELF=y
271 CONFIG_PM=y
272 CONFIG_PM_LEGACY=y
273 # CONFIG_PM_DEBUG is not set
274-# CONFIG_PM_SYSFS_DEPRECATED is not set
275-CONFIG_APM_EMULATION=m
276+CONFIG_PM_SLEEP=y
277+CONFIG_SUSPEND_UP_POSSIBLE=y
278+CONFIG_SUSPEND=y
279+CONFIG_APM_EMULATION=y
280
281 #
282 # Networking
283@@ -316,6 +337,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
284 # QoS and/or fair queueing
285 #
286 # CONFIG_NET_SCHED is not set
287+CONFIG_NET_SCH_FIFO=y
288
289 #
290 # Network testing
291@@ -350,9 +372,12 @@ CONFIG_BT_HCIBFUSB=m
292 #
293 # Wireless
294 #
295-# CONFIG_CFG80211 is not set
296-# CONFIG_WIRELESS_EXT is not set
297-# CONFIG_MAC80211 is not set
298+CONFIG_CFG80211=m
299+CONFIG_WIRELESS_EXT=y
300+CONFIG_MAC80211=m
301+# CONFIG_MAC80211_LEDS is not set
302+CONFIG_MAC80211_DEBUGFS=y
303+# CONFIG_MAC80211_DEBUG is not set
304 CONFIG_IEEE80211=m
305 # CONFIG_IEEE80211_DEBUG is not set
306 CONFIG_IEEE80211_CRYPT_WEP=m
307@@ -360,6 +385,7 @@ CONFIG_IEEE80211_CRYPT_CCMP=m
308 # CONFIG_IEEE80211_CRYPT_TKIP is not set
309 # CONFIG_IEEE80211_SOFTMAC is not set
310 # CONFIG_RFKILL is not set
311+# CONFIG_NET_9P is not set
312
313 #
314 # Device Drivers
315@@ -374,10 +400,6 @@ CONFIG_FW_LOADER=y
316 # CONFIG_DEBUG_DRIVER is not set
317 # CONFIG_DEBUG_DEVRES is not set
318 # CONFIG_SYS_HYPERVISOR is not set
319-
320-#
321-# Connector - unified userspace <-> kernelspace linker
322-#
323 # CONFIG_CONNECTOR is not set
324 CONFIG_MTD=y
325 # CONFIG_MTD_DEBUG is not set
326@@ -402,11 +424,10 @@ CONFIG_MTD_BLOCK=y
327 #
328 # RAM/ROM/Flash chip drivers
329 #
330-# CONFIG_MTD_CFI is not set
331-# CONFIG_MTD_JEDECPROBE is not set
332-# CONFIG_MTD_CFI_NOSWAP is not set
333-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
334-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
335+CONFIG_MTD_CFI=y
336+CONFIG_MTD_JEDECPROBE=y
337+CONFIG_MTD_GEN_PROBE=y
338+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
339 CONFIG_MTD_MAP_BANK_WIDTH_1=y
340 CONFIG_MTD_MAP_BANK_WIDTH_2=y
341 CONFIG_MTD_MAP_BANK_WIDTH_4=y
342@@ -417,14 +438,25 @@ CONFIG_MTD_CFI_I1=y
343 CONFIG_MTD_CFI_I2=y
344 # CONFIG_MTD_CFI_I4 is not set
345 # CONFIG_MTD_CFI_I8 is not set
346+CONFIG_MTD_CFI_INTELEXT=y
347+CONFIG_MTD_CFI_AMDSTD=y
348+CONFIG_MTD_CFI_STAA=y
349+CONFIG_MTD_CFI_UTIL=y
350 # CONFIG_MTD_RAM is not set
351 # CONFIG_MTD_ROM is not set
352 # CONFIG_MTD_ABSENT is not set
353+# CONFIG_MTD_XIP is not set
354
355 #
356 # Mapping drivers for chip access
357 #
358 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
359+CONFIG_MTD_PHYSMAP=y
360+CONFIG_MTD_PHYSMAP_START=0x0
361+CONFIG_MTD_PHYSMAP_LEN=0x100000
362+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
363+# CONFIG_MTD_ARM_INTEGRATOR is not set
364+# CONFIG_MTD_IMPA7 is not set
365 # CONFIG_MTD_SHARP_SL is not set
366 # CONFIG_MTD_PLATRAM is not set
367
368@@ -457,21 +489,17 @@ CONFIG_MTD_NAND_PLATFORM=y
369 #
370 # UBI - Unsorted block images
371 #
372-# CONFIG_MTD_UBI is not set
373+CONFIG_MTD_UBI=m
374+CONFIG_MTD_UBI_WL_THRESHOLD=4096
375+CONFIG_MTD_UBI_BEB_RESERVE=1
376+CONFIG_MTD_UBI_GLUEBI=y
377
378 #
379-# Parallel port support
380+# UBI debugging options
381 #
382+# CONFIG_MTD_UBI_DEBUG is not set
383 # CONFIG_PARPORT is not set
384-
385-#
386-# Plug and Play support
387-#
388-# CONFIG_PNPACPI is not set
389-
390-#
391-# Block devices
392-#
393+CONFIG_BLK_DEV=y
394 # CONFIG_BLK_DEV_COW_COMMON is not set
395 CONFIG_BLK_DEV_LOOP=y
396 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
397@@ -490,6 +518,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
398 #
399 # CONFIG_RAID_ATTRS is not set
400 CONFIG_SCSI=y
401+CONFIG_SCSI_DMA=y
402 # CONFIG_SCSI_TGT is not set
403 # CONFIG_SCSI_NETLINK is not set
404 # CONFIG_SCSI_PROC_FS is not set
405@@ -519,36 +548,23 @@ CONFIG_SCSI_WAIT_SCAN=m
406 # CONFIG_SCSI_SPI_ATTRS is not set
407 # CONFIG_SCSI_FC_ATTRS is not set
408 # CONFIG_SCSI_ISCSI_ATTRS is not set
409-# CONFIG_SCSI_SAS_ATTRS is not set
410 # CONFIG_SCSI_SAS_LIBSAS is not set
411-
412-#
413-# SCSI low-level drivers
414-#
415+CONFIG_SCSI_LOWLEVEL=y
416 # CONFIG_ISCSI_TCP is not set
417 # CONFIG_SCSI_DEBUG is not set
418 # CONFIG_ATA is not set
419-
420-#
421-# Multi-device support (RAID and LVM)
422-#
423 # CONFIG_MD is not set
424-
425-#
426-# Network device support
427-#
428 CONFIG_NETDEVICES=y
429+# CONFIG_NETDEVICES_MULTIQUEUE is not set
430 # CONFIG_DUMMY is not set
431 # CONFIG_BONDING is not set
432+# CONFIG_MACVLAN is not set
433 # CONFIG_EQUALIZER is not set
434 # CONFIG_TUN is not set
435 # CONFIG_PHYLIB is not set
436-
437-#
438-# Ethernet (10 or 100Mbit)
439-#
440 CONFIG_NET_ETHERNET=y
441 CONFIG_MII=y
442+# CONFIG_AX88796 is not set
443 # CONFIG_SMC91X is not set
444 CONFIG_DM9000=y
445 # CONFIG_SMC911X is not set
446@@ -571,16 +587,22 @@ CONFIG_DM9000=y
447 # CONFIG_USB_USBNET_MII is not set
448 # CONFIG_USB_USBNET is not set
449 # CONFIG_WAN is not set
450-# CONFIG_PPP is not set
451+CONFIG_PPP=m
452+# CONFIG_PPP_MULTILINK is not set
453+# CONFIG_PPP_FILTER is not set
454+CONFIG_PPP_ASYNC=m
455+CONFIG_PPP_SYNC_TTY=m
456+CONFIG_PPP_DEFLATE=m
457+CONFIG_PPP_BSDCOMP=m
458+CONFIG_PPP_MPPE=m
459+# CONFIG_PPPOE is not set
460+CONFIG_PPPOL2TP=m
461 # CONFIG_SLIP is not set
462+CONFIG_SLHC=m
463 # CONFIG_SHAPER is not set
464 # CONFIG_NETCONSOLE is not set
465 # CONFIG_NETPOLL is not set
466 # CONFIG_NET_POLL_CONTROLLER is not set
467-
468-#
469-# ISDN subsystem
470-#
471 # CONFIG_ISDN is not set
472
473 #
474@@ -612,16 +634,21 @@ CONFIG_INPUT_KEYBOARD=y
475 # CONFIG_KEYBOARD_XTKBD is not set
476 # CONFIG_KEYBOARD_NEWTON is not set
477 # CONFIG_KEYBOARD_STOWAWAY is not set
478-CONFIG_KEYBOARD_PXA27x=m
479+CONFIG_KEYBOARD_PXA27x=y
480 # CONFIG_KEYBOARD_GPIO is not set
481 # CONFIG_INPUT_MOUSE is not set
482 # CONFIG_INPUT_JOYSTICK is not set
483 # CONFIG_INPUT_TABLET is not set
484 CONFIG_INPUT_TOUCHSCREEN=y
485+# CONFIG_TOUCHSCREEN_FUJITSU is not set
486 # CONFIG_TOUCHSCREEN_GUNZE is not set
487 # CONFIG_TOUCHSCREEN_ELO is not set
488 # CONFIG_TOUCHSCREEN_MTOUCH is not set
489 # CONFIG_TOUCHSCREEN_MK712 is not set
490+CONFIG_TOUCHSCREEN_WM97XX=y
491+# CONFIG_TOUCHSCREEN_WM9705 is not set
492+CONFIG_TOUCHSCREEN_WM9712=y
493+# CONFIG_TOUCHSCREEN_WM9713 is not set
494 # CONFIG_TOUCHSCREEN_PENMOUNT is not set
495 # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
496 # CONFIG_TOUCHSCREEN_TOUCHWIN is not set
497@@ -660,58 +687,91 @@ CONFIG_SERIAL_PXA_CONSOLE=y
498 CONFIG_SERIAL_CORE=y
499 CONFIG_SERIAL_CORE_CONSOLE=y
500 CONFIG_UNIX98_PTYS=y
501-CONFIG_LEGACY_PTYS=y
502-CONFIG_LEGACY_PTY_COUNT=256
503-
504-#
505-# IPMI
506-#
507+# CONFIG_LEGACY_PTYS is not set
508 # CONFIG_IPMI_HANDLER is not set
509 # CONFIG_WATCHDOG is not set
510 CONFIG_HW_RANDOM=m
511 # CONFIG_NVRAM is not set
512 # CONFIG_R3964 is not set
513 # CONFIG_RAW_DRIVER is not set
514+# CONFIG_TCG_TPM is not set
515+CONFIG_I2C=y
516+CONFIG_I2C_BOARDINFO=y
517+# CONFIG_I2C_CHARDEV is not set
518
519 #
520-# TPM devices
521+# I2C Algorithms
522 #
523-# CONFIG_TCG_TPM is not set
524-# CONFIG_I2C is not set
525+# CONFIG_I2C_ALGOBIT is not set
526+# CONFIG_I2C_ALGOPCF is not set
527+# CONFIG_I2C_ALGOPCA is not set
528
529 #
530-# SPI support
531+# I2C Hardware Bus support
532 #
533-# CONFIG_SPI is not set
534-# CONFIG_SPI_MASTER is not set
535+# CONFIG_I2C_GPIO is not set
536+CONFIG_I2C_PXA=y
537+# CONFIG_I2C_PXA_SLAVE is not set
538+# CONFIG_I2C_OCORES is not set
539+# CONFIG_I2C_PARPORT_LIGHT is not set
540+# CONFIG_I2C_SIMTEC is not set
541+# CONFIG_I2C_TAOS_EVM is not set
542+# CONFIG_I2C_STUB is not set
543+# CONFIG_I2C_TINY_USB is not set
544
545 #
546-# Dallas's 1-wire bus
547+# Miscellaneous I2C Chip support
548 #
549-# CONFIG_W1 is not set
550-# CONFIG_HWMON is not set
551+# CONFIG_SENSORS_DS1337 is not set
552+# CONFIG_SENSORS_DS1374 is not set
553+# CONFIG_DS1682 is not set
554+# CONFIG_SENSORS_EEPROM is not set
555+# CONFIG_SENSORS_PCF8574 is not set
556+# CONFIG_SENSORS_PCA9539 is not set
557+# CONFIG_SENSORS_PCF8591 is not set
558+# CONFIG_SENSORS_MAX6875 is not set
559+# CONFIG_SENSORS_TSL2550 is not set
560+CONFIG_DA9030=y
561+# CONFIG_I2C_DEBUG_CORE is not set
562+# CONFIG_I2C_DEBUG_ALGO is not set
563+# CONFIG_I2C_DEBUG_BUS is not set
564+# CONFIG_I2C_DEBUG_CHIP is not set
565
566 #
567-# Misc devices
568+# SPI support
569 #
570+# CONFIG_SPI is not set
571+# CONFIG_SPI_MASTER is not set
572+# CONFIG_W1 is not set
573+CONFIG_POWER_SUPPLY=y
574+# CONFIG_POWER_SUPPLY_DEBUG is not set
575+# CONFIG_PDA_POWER is not set
576+CONFIG_APM_POWER=y
577+# CONFIG_BATTERY_DS2760 is not set
578+# CONFIG_BATTERY_EM_X270 is not set
579+# CONFIG_HWMON is not set
580+CONFIG_MISC_DEVICES=y
581+# CONFIG_EEPROM_93CX6 is not set
582
583 #
584 # Multifunction device drivers
585 #
586 # CONFIG_MFD_SM501 is not set
587-
588-#
589-# LED devices
590-#
591-# CONFIG_NEW_LEDS is not set
592+CONFIG_NEW_LEDS=y
593+CONFIG_LEDS_CLASS=m
594
595 #
596 # LED drivers
597 #
598+CONFIG_LEDS_GPIO=m
599+CONFIG_LEDS_EM_X270=m
600
601 #
602 # LED Triggers
603 #
604+CONFIG_LEDS_TRIGGERS=y
605+CONFIG_LEDS_TRIGGER_TIMER=m
606+CONFIG_LEDS_TRIGGER_HEARTBEAT=m
607
608 #
609 # Multimedia devices
610@@ -723,13 +783,17 @@ CONFIG_HW_RANDOM=m
611 #
612 # Graphics support
613 #
614-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
615+CONFIG_BACKLIGHT_LCD_SUPPORT=y
616+CONFIG_LCD_CLASS_DEVICE=y
617+CONFIG_BACKLIGHT_CLASS_DEVICE=y
618+CONFIG_BACKLIGHT_CORGI=y
619
620 #
621 # Display device support
622 #
623 # CONFIG_DISPLAY_SUPPORT is not set
624 # CONFIG_VGASTATE is not set
625+CONFIG_VIDEO_OUTPUT_CONTROL=m
626 CONFIG_FB=y
627 # CONFIG_FIRMWARE_EDID is not set
628 # CONFIG_FB_DDC is not set
629@@ -752,7 +816,7 @@ CONFIG_FB_DEFERRED_IO=y
630 #
631 # CONFIG_FB_S1D13XXX is not set
632 CONFIG_FB_PXA=y
633-# CONFIG_FB_PXA_PARAMETERS is not set
634+CONFIG_FB_PXA_PARAMETERS=y
635 # CONFIG_FB_MBX is not set
636 # CONFIG_FB_VIRTUAL is not set
637
638@@ -762,6 +826,7 @@ CONFIG_FB_PXA=y
639 # CONFIG_VGA_CONSOLE is not set
640 CONFIG_DUMMY_CONSOLE=y
641 CONFIG_FRAMEBUFFER_CONSOLE=y
642+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
643 # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
644 # CONFIG_FONTS is not set
645 CONFIG_FONT_8x8=y
646@@ -774,18 +839,18 @@ CONFIG_LOGO_LINUX_CLUT224=y
647 #
648 # Sound
649 #
650-CONFIG_SOUND=m
651+CONFIG_SOUND=y
652
653 #
654 # Advanced Linux Sound Architecture
655 #
656-CONFIG_SND=m
657-CONFIG_SND_TIMER=m
658-CONFIG_SND_PCM=m
659+CONFIG_SND=y
660+CONFIG_SND_TIMER=y
661+CONFIG_SND_PCM=y
662 # CONFIG_SND_SEQUENCER is not set
663 CONFIG_SND_OSSEMUL=y
664-CONFIG_SND_MIXER_OSS=m
665-CONFIG_SND_PCM_OSS=m
666+CONFIG_SND_MIXER_OSS=y
667+CONFIG_SND_PCM_OSS=y
668 CONFIG_SND_PCM_OSS_PLUGINS=y
669 # CONFIG_SND_DYNAMIC_MINORS is not set
670 CONFIG_SND_SUPPORT_OLD_API=y
671@@ -817,17 +882,23 @@ CONFIG_SND_PXA2XX_AC97=m
672 #
673 # System on Chip audio support
674 #
675-# CONFIG_SND_SOC is not set
676+CONFIG_SND_SOC_AC97_BUS=y
677+CONFIG_SND_SOC=y
678+CONFIG_SND_PXA2XX_SOC=y
679+CONFIG_SND_PXA2XX_SOC_AC97=y
680+CONFIG_SND_PXA2XX_SOC_EM_X270=y
681
682 #
683-# Open Sound System
684+# SoC Audio support for SuperH
685 #
686-# CONFIG_SOUND_PRIME is not set
687-CONFIG_AC97_BUS=m
688+CONFIG_SND_SOC_WM9712=y
689
690 #
691-# HID Devices
692+# Open Sound System
693 #
694+# CONFIG_SOUND_PRIME is not set
695+CONFIG_AC97_BUS=y
696+CONFIG_HID_SUPPORT=y
697 CONFIG_HID=y
698 # CONFIG_HID_DEBUG is not set
699
700@@ -838,10 +909,7 @@ CONFIG_USB_HID=y
701 # CONFIG_USB_HIDINPUT_POWERBOOK is not set
702 # CONFIG_HID_FF is not set
703 # CONFIG_USB_HIDDEV is not set
704-
705-#
706-# USB support
707-#
708+CONFIG_USB_SUPPORT=y
709 CONFIG_USB_ARCH_HAS_HCD=y
710 CONFIG_USB_ARCH_HAS_OHCI=y
711 # CONFIG_USB_ARCH_HAS_EHCI is not set
712@@ -855,6 +923,7 @@ CONFIG_USB_DEVICEFS=y
713 # CONFIG_USB_DEVICE_CLASS is not set
714 # CONFIG_USB_DYNAMIC_MINORS is not set
715 # CONFIG_USB_SUSPEND is not set
716+# CONFIG_USB_PERSIST is not set
717 # CONFIG_USB_OTG is not set
718
719 #
720@@ -866,12 +935,13 @@ CONFIG_USB_OHCI_HCD=y
721 # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
722 CONFIG_USB_OHCI_LITTLE_ENDIAN=y
723 # CONFIG_USB_SL811_HCD is not set
724+# CONFIG_USB_R8A66597_HCD is not set
725
726 #
727 # USB Device Class drivers
728 #
729-# CONFIG_USB_ACM is not set
730-# CONFIG_USB_PRINTER is not set
731+CONFIG_USB_ACM=m
732+CONFIG_USB_PRINTER=m
733
734 #
735 # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
736@@ -896,8 +966,8 @@ CONFIG_USB_STORAGE=y
737 #
738 # USB Imaging devices
739 #
740-# CONFIG_USB_MDC800 is not set
741-# CONFIG_USB_MICROTEK is not set
742+CONFIG_USB_MDC800=m
743+CONFIG_USB_MICROTEK=m
744 # CONFIG_USB_MON is not set
745
746 #
747@@ -940,25 +1010,25 @@ CONFIG_USB_STORAGE=y
748 # USB Gadget Support
749 #
750 # CONFIG_USB_GADGET is not set
751-CONFIG_MMC=m
752+CONFIG_MMC=y
753 # CONFIG_MMC_DEBUG is not set
754-# CONFIG_MMC_UNSAFE_RESUME is not set
755+CONFIG_MMC_UNSAFE_RESUME=y
756
757 #
758 # MMC/SD Card Drivers
759 #
760-CONFIG_MMC_BLOCK=m
761+CONFIG_MMC_BLOCK=y
762+CONFIG_MMC_BLOCK_BOUNCE=y
763
764 #
765 # MMC/SD Host Controller Drivers
766 #
767-CONFIG_MMC_PXA=m
768-
769-#
770-# Real Time Clock
771-#
772+CONFIG_MMC_PXA=y
773 CONFIG_RTC_LIB=y
774-CONFIG_RTC_CLASS=m
775+CONFIG_RTC_CLASS=y
776+CONFIG_RTC_HCTOSYS=y
777+CONFIG_RTC_HCTOSYS_DEVICE="rtc1"
778+# CONFIG_RTC_DEBUG is not set
779
780 #
781 # RTC interfaces
782@@ -972,6 +1042,15 @@ CONFIG_RTC_INTF_DEV=y
783 #
784 # I2C RTC drivers
785 #
786+# CONFIG_RTC_DRV_DS1307 is not set
787+# CONFIG_RTC_DRV_DS1672 is not set
788+# CONFIG_RTC_DRV_MAX6900 is not set
789+# CONFIG_RTC_DRV_RS5C372 is not set
790+# CONFIG_RTC_DRV_ISL1208 is not set
791+# CONFIG_RTC_DRV_X1205 is not set
792+# CONFIG_RTC_DRV_PCF8563 is not set
793+# CONFIG_RTC_DRV_PCF8583 is not set
794+# CONFIG_RTC_DRV_M41T80 is not set
795
796 #
797 # SPI RTC drivers
798@@ -982,14 +1061,29 @@ CONFIG_RTC_INTF_DEV=y
799 #
800 # CONFIG_RTC_DRV_CMOS is not set
801 # CONFIG_RTC_DRV_DS1553 is not set
802+# CONFIG_RTC_DRV_STK17TA8 is not set
803 # CONFIG_RTC_DRV_DS1742 is not set
804 # CONFIG_RTC_DRV_M48T86 is not set
805-CONFIG_RTC_DRV_V3020=m
806+# CONFIG_RTC_DRV_M48T59 is not set
807+CONFIG_RTC_DRV_V3020=y
808
809 #
810 # on-CPU RTC drivers
811 #
812-CONFIG_RTC_DRV_SA1100=m
813+CONFIG_RTC_DRV_SA1100=y
814+
815+#
816+# DMA Engine support
817+#
818+# CONFIG_DMA_ENGINE is not set
819+
820+#
821+# DMA Clients
822+#
823+
824+#
825+# DMA Devices
826+#
827
828 #
829 # File systems
830@@ -1098,7 +1192,6 @@ CONFIG_SMB_FS=y
831 # CONFIG_NCP_FS is not set
832 # CONFIG_CODA_FS is not set
833 # CONFIG_AFS_FS is not set
834-# CONFIG_9P_FS is not set
835
836 #
837 # Partition Types
838@@ -1167,20 +1260,22 @@ CONFIG_NLS_UTF8=y
839 CONFIG_ENABLE_MUST_CHECK=y
840 CONFIG_MAGIC_SYSRQ=y
841 # CONFIG_UNUSED_SYMBOLS is not set
842-# CONFIG_DEBUG_FS is not set
843+CONFIG_DEBUG_FS=y
844 # CONFIG_HEADERS_CHECK is not set
845 CONFIG_DEBUG_KERNEL=y
846 # CONFIG_DEBUG_SHIRQ is not set
847 # CONFIG_DETECT_SOFTLOCKUP is not set
848+CONFIG_SCHED_DEBUG=y
849 # CONFIG_SCHEDSTATS is not set
850 # CONFIG_TIMER_STATS is not set
851-# CONFIG_DEBUG_SLAB is not set
852+# CONFIG_SLUB_DEBUG_ON is not set
853 # CONFIG_DEBUG_RT_MUTEXES is not set
854 # CONFIG_RT_MUTEX_TESTER is not set
855 # CONFIG_DEBUG_SPINLOCK is not set
856 # CONFIG_DEBUG_MUTEXES is not set
857 # CONFIG_DEBUG_LOCK_ALLOC is not set
858 # CONFIG_PROVE_LOCKING is not set
859+# CONFIG_LOCK_STAT is not set
860 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
861 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
862 # CONFIG_DEBUG_KOBJECT is not set
863@@ -1202,10 +1297,6 @@ CONFIG_DEBUG_LL=y
864 #
865 # CONFIG_KEYS is not set
866 # CONFIG_SECURITY is not set
867-
868-#
869-# Cryptographic options
870-#
871 CONFIG_CRYPTO=y
872 CONFIG_CRYPTO_ALGAPI=m
873 CONFIG_CRYPTO_BLKCIPHER=m
874@@ -1215,7 +1306,7 @@ CONFIG_CRYPTO_MANAGER=m
875 # CONFIG_CRYPTO_NULL is not set
876 # CONFIG_CRYPTO_MD4 is not set
877 # CONFIG_CRYPTO_MD5 is not set
878-# CONFIG_CRYPTO_SHA1 is not set
879+CONFIG_CRYPTO_SHA1=m
880 # CONFIG_CRYPTO_SHA256 is not set
881 # CONFIG_CRYPTO_SHA512 is not set
882 # CONFIG_CRYPTO_WP512 is not set
883@@ -1243,19 +1334,17 @@ CONFIG_CRYPTO_ARC4=m
884 # CONFIG_CRYPTO_CRC32C is not set
885 # CONFIG_CRYPTO_CAMELLIA is not set
886 # CONFIG_CRYPTO_TEST is not set
887-
888-#
889-# Hardware crypto devices
890-#
891+CONFIG_CRYPTO_HW=y
892
893 #
894 # Library routines
895 #
896 CONFIG_BITREVERSE=y
897-# CONFIG_CRC_CCITT is not set
898+CONFIG_CRC_CCITT=m
899 # CONFIG_CRC16 is not set
900 # CONFIG_CRC_ITU_T is not set
901 CONFIG_CRC32=y
902+# CONFIG_CRC7 is not set
903 # CONFIG_LIBCRC32C is not set
904 CONFIG_ZLIB_INFLATE=y
905 CONFIG_ZLIB_DEFLATE=y
906diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
907index 5ebec6d..2957cb9 100644
908--- a/arch/arm/mach-pxa/Kconfig
909+++ b/arch/arm/mach-pxa/Kconfig
910@@ -148,4 +148,12 @@ config PXA_SSP
911 tristate
912 help
913 Enable support for PXA2xx SSP ports
914+
915+config PXA_PWR_I2C
916+ bool "Simple Power I2C interface"
917+ depends on PXA27x
918+ help
919+ Enable support for PXA27x Power I2C interface. This driver
920+ enables very simple blocking access to Power I2C, which
921+ might be useful for early access to Power Management ICs.
922 endif
923diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
924index 7d6ab5c..2d7a431 100644
925--- a/arch/arm/mach-pxa/Makefile
926+++ b/arch/arm/mach-pxa/Makefile
927@@ -18,7 +18,7 @@ obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o sp
928 obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o
929 obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o
930 obj-$(CONFIG_MACH_TOSA) += tosa.o
931-obj-$(CONFIG_MACH_EM_X270) += em-x270.o
932+obj-$(CONFIG_MACH_EM_X270) += em-x270.o em-x270-pm.o em-x270-lcd.o em-x270-devices.o
933
934 # Support for blinky lights
935 led-y := leds.o
936@@ -29,9 +29,16 @@ led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o
937
938 obj-$(CONFIG_LEDS) += $(led-y)
939
940+# CPU Frequency scaling
941+obj-$(CONFIG_CPU_FREQ_PXA) += cpu-pxa.o
942+
943 # Misc features
944 obj-$(CONFIG_PM) += pm.o sleep.o
945 obj-$(CONFIG_PXA_SSP) += ssp.o
946+obj-$(CONFIG_PXA_PWR_I2C) += pwr-i2c.o
947+
948+#obj-m += da9030_asm.o
949+#da9030_asm-y += da9030.o da9030_c.o
950
951 ifeq ($(CONFIG_PXA27x),y)
952 obj-$(CONFIG_PM) += standby.o
953diff --git a/arch/arm/mach-pxa/cpu-pxa.c b/arch/arm/mach-pxa/cpu-pxa.c
954new file mode 100644
955index 0000000..7fa9703
956--- /dev/null
957+++ b/arch/arm/mach-pxa/cpu-pxa.c
958@@ -0,0 +1,442 @@
959+/*
960+ * linux/arch/arm/mach-pxa/cpu-pxa.c
961+ *
962+ * Copyright (C) 2002,2003 Intrinsyc Software
963+ *
964+ * This program is free software; you can redistribute it and/or modify
965+ * it under the terms of the GNU General Public License as published by
966+ * the Free Software Foundation; either version 2 of the License, or
967+ * (at your option) any later version.
968+ *
969+ * This program is distributed in the hope that it will be useful,
970+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
971+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
972+ * GNU General Public License for more details.
973+ *
974+ * You should have received a copy of the GNU General Public License
975+ * along with this program; if not, write to the Free Software
976+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
977+ *
978+ * History:
979+ * 31-Jul-2002 : Initial version [FB]
980+ * 29-Jan-2003 : added PXA255 support [FB]
981+ * 20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.)
982+ * 11-Jan-2006 : v2.6, support for PXA27x processor up to 624MHz (Bill Reese, Hewlett Packard)
983+ *
984+ * Note:
985+ * This driver may change the memory bus clock rate, but will not do any
986+ * platform specific access timing changes... for example if you have flash
987+ * memory connected to CS0, you will need to register a platform specific
988+ * notifier which will adjust the memory access strobes to maintain a
989+ * minimum strobe width.
990+ *
991+ */
992+
993+#include <linux/kernel.h>
994+#include <linux/module.h>
995+#include <linux/sched.h>
996+#include <linux/init.h>
997+#include <linux/cpufreq.h>
998+
999+#include <asm/hardware.h>
1000+
1001+#include <asm/arch/pxa-regs.h>
1002+
1003+/*
1004+ * This comes from generic.h in this directory.
1005+ */
1006+extern unsigned int get_clk_frequency_khz(int info);
1007+
1008+#define DEBUG 0
1009+
1010+#ifdef DEBUG
1011+ static unsigned int freq_debug = DEBUG;
1012+ module_param(freq_debug, int, 0644);
1013+ MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
1014+#else
1015+ #define freq_debug 0
1016+#endif
1017+
1018+typedef struct
1019+{
1020+ unsigned int khz; /* CPU frequency */
1021+ unsigned int membus; /* memory bus frequency */
1022+ unsigned int cccr; /* new CCLKCFG setting */
1023+ unsigned int div2; /* alter memory controller settings to divide by 2 */
1024+ unsigned int cclkcfg; /* new CCLKCFG setting */
1025+} pxa_freqs_t;
1026+
1027+/* Define the refresh period in mSec for the SDRAM and the number of rows */
1028+#define SDRAM_TREF 64 /* standard 64ms SDRAM */
1029+#if defined(CONFIG_MACH_H4700) || defined(CONFIG_ARCH_H2200) || defined(CONFIG_MACH_MAGICIAN)
1030+#define SDRAM_ROWS 8192 /* hx4700 uses 2 64Mb DRAMs, 8912 rows */
1031+#else
1032+#define SDRAM_ROWS 4096 /* 64MB=8192 32MB=4096 */
1033+#endif
1034+#define MDREFR_DRI(x) (((x*SDRAM_TREF/SDRAM_ROWS - 31)/32))
1035+
1036+#define CCLKCFG_TURBO 0x1
1037+#define CCLKCFG_FCS 0x2
1038+#define CCLKCFG_HALFTURBO 0x4
1039+#define CCLKCFG_FASTBUS 0x8
1040+#ifdef CONFIG_ARCH_H5400
1041+/* H5400's SAMCOP chip does not like when K2DB2 touched */
1042+#define MDREFR_DB2_MASK (MDREFR_K1DB2)
1043+#else
1044+#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2)
1045+#endif
1046+#define MDREFR_DRI_MASK 0xFFF
1047+#define PXA25x_CCLKCFG CCLKCFG_TURBO | CCLKCFG_FCS
1048+
1049+/*
1050+ * For the PXA27x:
1051+ * Control variables are A, L, 2N for CCCR; B, HT, T for CLKCFG.
1052+ *
1053+ * A = 0 => memory controller clock from table 3-7,
1054+ * A = 1 => memory controller clock = system bus clock
1055+ * Run mode frequency = 13 MHz * L
1056+ * Turbo mode frequency = 13 MHz * L * N
1057+ * System bus frequency = 13 MHz * L / (B + 1)
1058+ * System initialized by bootldr to:
1059+ *
1060+ * In CCCR:
1061+ * A = 1
1062+ * L = 16 oscillator to run mode ratio
1063+ * 2N = 6 2 * (turbo mode to run mode ratio)
1064+ *
1065+ * In CCLKCFG:
1066+ * B = 1 Fast bus mode
1067+ * HT = 0 Half-Turbo mode
1068+ * T = 1 Turbo mode
1069+ *
1070+ * For now, just support some of the combinations in table 3-7 of
1071+ * PXA27x Processor Family Developer's Manual to simplify frequency
1072+ * change sequences.
1073+ *
1074+ * Specify 2N in the PXA27x_CCCR macro, not N!
1075+ */
1076+#define PXA27x_CCCR(A, L, N2) (A << 25 | N2 << 7 | L)
1077+#define PXA27x_CCLKCFG(B, HT, T) (B << 3 | HT << 2 | CCLKCFG_FCS | T)
1078+
1079+#define PXA25x_CCCR(L, M, N) (L << 0 | M << 5 | N << 7)
1080+
1081+/*
1082+ * Valid frequency assignments
1083+ */
1084+static pxa_freqs_t pxa2xx_freqs[] =
1085+{
1086+ /* CPU MEMBUS CCCR DIV2 */
1087+#if defined(CONFIG_PXA25x)
1088+#if defined(CONFIG_PXA25x_ALTERNATE_FREQS)
1089+ { 99500, 99500, PXA25x_CCCR(1, 1, 2), 1, PXA25x_CCLKCFG}, /* run=99, turbo= 99, PXbus=50, SDRAM=50 */
1090+ {199100, 99500, PXA25x_CCCR(1, 1, 4), 0, PXA25x_CCLKCFG}, /* run=99, turbo=199, PXbus=50, SDRAM=99 */
1091+ {298500, 99500, PXA25x_CCCR(1, 1, 6), 0, PXA25x_CCLKCFG}, /* run=99, turbo=287, PXbus=50, SDRAM=99 */
1092+ {298600, 99500, PXA25x_CCCR(1, 2, 3), 0, PXA25x_CCLKCFG}, /* run=199, turbo=287, PXbus=99, SDRAM=99 */
1093+ {398100, 99500, PXA25x_CCCR(1, 2, 4), 0, PXA25x_CCLKCFG} /* run=199, turbo=398, PXbus=99, SDRAM=99 */
1094+#else
1095+ { 99500, 99500, PXA25x_CCCR(1, 1, 2), 1, PXA25x_CCLKCFG}, /* run= 99, turbo= 99, PXbus=50, SDRAM=50 */
1096+ {132700, 132700, PXA25x_CCCR(3, 1, 2), 1, PXA25x_CCLKCFG}, /* run=133, turbo=133, PXbus=66, SDRAM=66 */
1097+ {199100, 99500, PXA25x_CCCR(1, 2, 2), 0, PXA25x_CCLKCFG}, /* run=199, turbo=199, PXbus=99, SDRAM=99 */
1098+ {265400, 132700, PXA25x_CCCR(3, 2, 2), 1, PXA25x_CCLKCFG}, /* run=265, turbo=265, PXbus=133, SDRAM=66 */
1099+ {331800, 165900, PXA25x_CCCR(5, 2, 2), 1, PXA25x_CCLKCFG}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */
1100+ {398100, 99500, PXA25x_CCCR(1, 3, 2), 0, PXA25x_CCLKCFG} /* run=398, turbo=398, PXbus=196, SDRAM=99 */
1101+#endif
1102+#elif defined(CONFIG_PXA27x)
1103+ {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, PXA27x_CCLKCFG(1, 0, 1)},
1104+ {156000, 104000, PXA27x_CCCR(1, 8, 6), 0, PXA27x_CCLKCFG(1, 1, 1)},
1105+ {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, PXA27x_CCLKCFG(0, 0, 1)},
1106+ {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, PXA27x_CCLKCFG(1, 0, 1)},
1107+ {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, PXA27x_CCLKCFG(1, 0, 1)},
1108+ {520000, 208000, PXA27x_CCCR(1, 16, 5), 1, PXA27x_CCLKCFG(1, 0, 1)},
1109+/* {624000, 208000, PXA27x_CCCR(1, 16, 6), 1, PXA27x_CCLKCFG(1, 0, 1)} */
1110+#endif
1111+};
1112+#define NUM_FREQS (sizeof(pxa2xx_freqs)/sizeof(pxa_freqs_t))
1113+
1114+static struct cpufreq_frequency_table pxa2xx_freq_table[NUM_FREQS+1];
1115+
1116+/* Return the memory clock rate for a given cpu frequency. */
1117+int pxa_cpufreq_memclk(int cpu_khz)
1118+{
1119+ int i;
1120+ int freq_mem = 0;
1121+
1122+ for (i = 0; i < NUM_FREQS; i++) {
1123+ if (pxa2xx_freqs[i].khz == cpu_khz) {
1124+ freq_mem = pxa2xx_freqs[i].membus;
1125+ break;
1126+ }
1127+ }
1128+
1129+ return freq_mem;
1130+}
1131+EXPORT_SYMBOL(pxa_cpufreq_memclk);
1132+
1133+
1134+/* find a valid frequency point */
1135+static int pxa_verify_policy(struct cpufreq_policy *policy)
1136+{
1137+ int ret;
1138+
1139+ ret=cpufreq_frequency_table_verify(policy, pxa2xx_freq_table);
1140+
1141+ if(freq_debug) {
1142+ printk("Verified CPU policy: %dKhz min to %dKhz max\n",
1143+ policy->min, policy->max);
1144+ }
1145+
1146+ return ret;
1147+}
1148+
1149+static int pxa_set_target(struct cpufreq_policy *policy,
1150+ unsigned int target_freq,
1151+ unsigned int relation)
1152+{
1153+ int idx;
1154+ cpumask_t cpus_allowed, allowedcpuset;
1155+ int cpu = policy->cpu;
1156+ struct cpufreq_freqs freqs;
1157+ unsigned long flags;
1158+ unsigned int unused;
1159+ unsigned int preset_mdrefr, postset_mdrefr, cclkcfg;
1160+
1161+ if(freq_debug) {
1162+ printk ("CPU PXA: target freq %d\n", target_freq);
1163+ printk ("CPU PXA: relation %d\n", relation);
1164+ }
1165+
1166+ /*
1167+ * Save this threads cpus_allowed mask.
1168+ */
1169+ cpus_allowed = current->cpus_allowed;
1170+
1171+ /*
1172+ * Bind to the specified CPU. When this call returns,
1173+ * we should be running on the right CPU.
1174+ */
1175+ cpus_clear (allowedcpuset);
1176+ cpu_set (cpu, allowedcpuset);
1177+ set_cpus_allowed(current, allowedcpuset);
1178+ BUG_ON(cpu != smp_processor_id());
1179+
1180+ /* Lookup the next frequency */
1181+ if (cpufreq_frequency_table_target(policy, pxa2xx_freq_table,
1182+ target_freq, relation, &idx)) {
1183+ return -EINVAL;
1184+ }
1185+
1186+ freqs.old = policy->cur;
1187+ freqs.new = pxa2xx_freqs[idx].khz;
1188+ freqs.cpu = policy->cpu;
1189+ if(freq_debug) {
1190+ printk(KERN_INFO "Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n",
1191+ freqs.new/1000, (pxa2xx_freqs[idx].div2) ?
1192+ (pxa2xx_freqs[idx].membus/2000) :
1193+ (pxa2xx_freqs[idx].membus/1000));
1194+ }
1195+
1196+ /*
1197+ * Tell everyone what we're about to do...
1198+ * you should add a notify client with any platform specific
1199+ * Vcc changing capability
1200+ */
1201+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
1202+
1203+ /* Calculate the next MDREFR. If we're slowing down the SDRAM clock
1204+ * we need to preset the smaller DRI before the change. If we're speeding
1205+ * up we need to set the larger DRI value after the change.
1206+ */
1207+ preset_mdrefr = postset_mdrefr = MDREFR;
1208+ if((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa2xx_freqs[idx].membus)) {
1209+ preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) |
1210+ MDREFR_DRI(pxa2xx_freqs[idx].membus);
1211+ }
1212+ postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) |
1213+ MDREFR_DRI(pxa2xx_freqs[idx].membus);
1214+
1215+ /* If we're dividing the memory clock by two for the SDRAM clock, this
1216+ * must be set prior to the change. Clearing the divide must be done
1217+ * after the change.
1218+ */
1219+ if(pxa2xx_freqs[idx].div2) {
1220+ /*
1221+ * Potentially speeding up memory clock, so slow down the memory
1222+ * before speeding up the clock.
1223+ */
1224+ preset_mdrefr |= MDREFR_DB2_MASK | MDREFR_K0DB4;
1225+ preset_mdrefr &= ~MDREFR_K0DB2;
1226+
1227+ postset_mdrefr |= MDREFR_DB2_MASK | MDREFR_K0DB4;
1228+ postset_mdrefr &= ~MDREFR_K0DB2;
1229+ } else {
1230+ /*
1231+ * Potentially slowing down memory clock. Wait until after the change
1232+ * to speed up the memory.
1233+ */
1234+ postset_mdrefr &= ~MDREFR_DB2_MASK;
1235+ postset_mdrefr &= ~MDREFR_K0DB4;
1236+ postset_mdrefr |= MDREFR_K0DB2;
1237+ }
1238+
1239+ cclkcfg = pxa2xx_freqs[idx].cclkcfg;
1240+
1241+ if (freq_debug) {
1242+ printk (KERN_INFO "CPU PXA writing 0x%08x to CCCR\n",
1243+ pxa2xx_freqs[idx].cccr);
1244+ printk (KERN_INFO "CPU PXA writing 0x%08x to CCLKCFG\n",
1245+ pxa2xx_freqs[idx].cclkcfg);
1246+ printk (KERN_INFO "CPU PXA writing 0x%08x to MDREFR before change\n",
1247+ preset_mdrefr);
1248+ printk (KERN_INFO "CPU PXA writing 0x%08x to MDREFR after change\n",
1249+ postset_mdrefr);
1250+ }
1251+
1252+ local_irq_save(flags);
1253+
1254+ /* Set new the CCCR */
1255+ CCCR = pxa2xx_freqs[idx].cccr;
1256+
1257+ /*
1258+ * Should really set both of PMCR[xIDAE] while changing the core frequency
1259+ */
1260+
1261+ /*
1262+ * TODO: On the PXA27x: If we're setting half-turbo mode and changing the
1263+ * core frequency at the same time we must split it up into two operations.
1264+ * The current values in the pxa2xx_freqs table don't do this, so the code
1265+ * is unimplemented.
1266+ */
1267+
1268+ __asm__ __volatile__(" \
1269+ ldr r4, [%1] ; /* load MDREFR */ \
1270+ b 2f ; \
1271+ .align 5 ; \
1272+1: \
1273+ str %3, [%1] ; /* preset the MDREFR */ \
1274+ mcr p14, 0, %2, c6, c0, 0 ; /* set CCLKCFG[FCS] */ \
1275+ str %4, [%1] ; /* postset the MDREFR */ \
1276+ \
1277+ b 3f ; \
1278+2: b 1b ; \
1279+3: nop ; \
1280+ "
1281+ : "=&r" (unused)
1282+ : "r" (&MDREFR), "r" (cclkcfg), \
1283+ "r" (preset_mdrefr), "r" (postset_mdrefr)
1284+ : "r4", "r5");
1285+ local_irq_restore(flags);
1286+
1287+ if (freq_debug) {
1288+ printk (KERN_INFO "CPU PXA Frequency change successful\n");
1289+ printk (KERN_INFO "CPU PXA new CCSR 0x%08x\n", CCSR);
1290+ }
1291+
1292+ /*
1293+ * Restore the CPUs allowed mask.
1294+ */
1295+ set_cpus_allowed(current, cpus_allowed);
1296+
1297+ /*
1298+ * Tell everyone what we've just done...
1299+ * you should add a notify client with any platform specific
1300+ * SDRAM refresh timer adjustments
1301+ */
1302+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
1303+
1304+ return 0;
1305+}
1306+
1307+static int pxa_cpufreq_init(struct cpufreq_policy *policy)
1308+{
1309+ cpumask_t cpus_allowed, allowedcpuset;
1310+ unsigned int cpu = policy->cpu;
1311+ int i;
1312+ unsigned int cclkcfg;
1313+
1314+ cpus_allowed = current->cpus_allowed;
1315+
1316+ cpus_clear (allowedcpuset);
1317+ cpu_set (cpu, allowedcpuset);
1318+ set_cpus_allowed(current, allowedcpuset);
1319+ BUG_ON(cpu != smp_processor_id());
1320+
1321+ /* set default governor and cpuinfo */
1322+ policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
1323+ policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
1324+ policy->cur = get_clk_frequency_khz(0); /* current freq */
1325+
1326+ /* Generate the cpufreq_frequency_table struct */
1327+ for(i=0;i<NUM_FREQS;i++) {
1328+ pxa2xx_freq_table[i].frequency = pxa2xx_freqs[i].khz;
1329+ pxa2xx_freq_table[i].index = i;
1330+ }
1331+ pxa2xx_freq_table[i].frequency = CPUFREQ_TABLE_END;
1332+
1333+ /*
1334+ * Set the policy's minimum and maximum frequencies from the tables
1335+ * just constructed. This sets cpuinfo.mxx_freq, min and max.
1336+ */
1337+ cpufreq_frequency_table_cpuinfo (policy, pxa2xx_freq_table);
1338+
1339+ set_cpus_allowed(current, cpus_allowed);
1340+ printk(KERN_INFO "PXA CPU frequency change support initialized\n");
1341+
1342+ if (freq_debug) {
1343+ printk (KERN_INFO "PXA CPU initial CCCR 0x%08x\n", CCCR);
1344+ asm
1345+ (
1346+ "mrc p14, 0, %0, c6, c0, 0 ; /* read CCLKCFG from CP14 */ "
1347+ : "=r" (cclkcfg) :
1348+ );
1349+ printk ("PXA CPU initial CCLKCFG 0x%08x\n", cclkcfg);
1350+ printk ("PXA CPU initial MDREFR 0x%08x\n", MDREFR);
1351+ }
1352+
1353+ return 0;
1354+}
1355+
1356+static unsigned int pxa_cpufreq_get(unsigned int cpu)
1357+{
1358+ cpumask_t cpumask_saved;
1359+ unsigned int cur_freq;
1360+
1361+ cpumask_saved = current->cpus_allowed;
1362+ set_cpus_allowed(current, cpumask_of_cpu(cpu));
1363+ BUG_ON(cpu != smp_processor_id());
1364+
1365+ cur_freq = get_clk_frequency_khz(0);
1366+
1367+ set_cpus_allowed(current, cpumask_saved);
1368+
1369+ return cur_freq;
1370+}
1371+
1372+static struct cpufreq_driver pxa_cpufreq_driver = {
1373+ .verify = pxa_verify_policy,
1374+ .target = pxa_set_target,
1375+ .init = pxa_cpufreq_init,
1376+ .get = pxa_cpufreq_get,
1377+#if defined(CONFIG_PXA25x)
1378+ .name = "PXA25x",
1379+#elif defined(CONFIG_PXA27x)
1380+ .name = "PXA27x",
1381+#endif
1382+};
1383+
1384+static int __init pxa_cpu_init(void)
1385+{
1386+ return cpufreq_register_driver(&pxa_cpufreq_driver);
1387+}
1388+
1389+static void __exit pxa_cpu_exit(void)
1390+{
1391+ cpufreq_unregister_driver(&pxa_cpufreq_driver);
1392+}
1393+
1394+
1395+MODULE_AUTHOR ("Intrinsyc Software Inc.");
1396+MODULE_DESCRIPTION ("CPU frequency changing driver for the PXA architecture");
1397+MODULE_LICENSE("GPL");
1398+module_init(pxa_cpu_init);
1399+module_exit(pxa_cpu_exit);
1400+
1401diff --git a/arch/arm/mach-pxa/em-x270-devices.c b/arch/arm/mach-pxa/em-x270-devices.c
1402new file mode 100644
1403index 0000000..d142930
1404--- /dev/null
1405+++ b/arch/arm/mach-pxa/em-x270-devices.c
1406@@ -0,0 +1,331 @@
1407+/*
1408+ * Support for CompuLab EM-X270 platfrom specific device
1409+ * initialization, and per-device power management functions.
1410+ *
1411+ * Copyright (C) 2007 CompuLab, Ltd.
1412+ * Author: Mike Rapoport <mike@compulab.co.il>
1413+ *
1414+ * This program is free software; you can redistribute it and/or modify
1415+ * it under the terms of the GNU General Public License version 2 as
1416+ * published by the Free Software Foundation.
1417+ */
1418+
1419+#include <linux/module.h>
1420+#include <linux/platform_device.h>
1421+#include <linux/sysfs.h>
1422+#include <linux/ctype.h>
1423+#include <linux/delay.h>
1424+#include <linux/da9030.h>
1425+#include <linux/interrupt.h>
1426+#include <linux/irq.h>
1427+
1428+#include "../../../drivers/i2c/chips/da9030.h"
1429+
1430+#include <asm/arch/hardware.h>
1431+#include <asm/arch/pxa-regs.h>
1432+
1433+struct em_x270_dev_data {
1434+ int (*is_on)(struct device *dev);
1435+ int (*set_on)(struct device *dev, int on);
1436+ int (*get_opts)(struct device *dev,
1437+ struct device_attribute *attr,
1438+ char *buf);
1439+ int (*set_opts)(struct device *dev, int opts);
1440+};
1441+
1442+static void em_x270_dev_release(struct device * dev)
1443+{
1444+
1445+}
1446+
1447+static ssize_t em_x270_dev_pm_show(struct device *dev,
1448+ struct device_attribute *attr,
1449+ char *buf)
1450+{
1451+ struct em_x270_dev_data *pm_data = dev->platform_data;
1452+ int is_on = pm_data->is_on(dev);
1453+
1454+ return sprintf(buf, "%d\n", is_on);
1455+}
1456+
1457+static ssize_t em_x270_dev_pm_store(struct device *dev,
1458+ struct device_attribute *attr,
1459+ const char *buf, size_t count)
1460+{
1461+ char *endp;
1462+ int on = simple_strtoul(buf, &endp, 0);
1463+ size_t size = endp - buf;
1464+ struct em_x270_dev_data *pm_data = dev->platform_data;
1465+
1466+ pr_info("%s: %s\n", __FUNCTION__, buf);
1467+
1468+ if (*endp && isspace(*endp))
1469+ size++;
1470+ if (size != count)
1471+ return -EINVAL;
1472+
1473+ pm_data->set_on(dev, on);
1474+
1475+ return count;
1476+}
1477+
1478+static DEVICE_ATTR(pwr_on, S_IWUSR | S_IRUGO,
1479+ em_x270_dev_pm_show, em_x270_dev_pm_store);
1480+
1481+static int gprs_is_on(struct device *dev)
1482+{
1483+ return !!(pxa_gpio_get_value(20));
1484+}
1485+
1486+static int gprs_set_on(struct device *dev, int on)
1487+{
1488+ pr_info("%s: on = %d\n", __FUNCTION__, on);
1489+ if (on) {
1490+ pxa_gpio_mode(20 | GPIO_OUT | GPIO_DFLT_HIGH);
1491+ mdelay(500);
1492+ pxa_gpio_set_value(82, 0);
1493+ mdelay(500);
1494+ pxa_gpio_mode(82 | GPIO_OUT | GPIO_DFLT_HIGH);
1495+ mdelay(1000);
1496+ pxa_gpio_set_value(82, 0);
1497+ }
1498+ else {
1499+ pxa_gpio_set_value(20, 0);
1500+ pxa_gpio_mode(20 | GPIO_OUT);
1501+ }
1502+
1503+ return 0;
1504+}
1505+
1506+static struct em_x270_dev_data em_x270_gprs_data = {
1507+ .is_on = gprs_is_on,
1508+ .set_on = gprs_set_on,
1509+};
1510+
1511+static struct platform_device em_x270_gprs = {
1512+ .name = "gprs",
1513+ .id = -1,
1514+ .dev = {
1515+ .platform_data = &em_x270_gprs_data,
1516+ .release = em_x270_dev_release,
1517+ },
1518+};
1519+
1520+static int is_wlan_on;
1521+
1522+static int wlan_is_on(struct device *dev)
1523+{
1524+ return is_wlan_on;
1525+}
1526+
1527+static int wlan_set_on(struct device *dev, int on)
1528+{
1529+ if (on) {
1530+ /* WLAN power-up sequence */
1531+ /* Mask LDO17 and LDO19 tolerance events */
1532+ da9030_set_reg(IRQ_MASK_C,
1533+ IRQ_MASK_C_LDO19 | IRQ_MASK_C_LDO17);
1534+
1535+ /* Force I2C control over LDO17, LDO19 */
1536+ da9030_set_reg(SLEEP_CONTROL,
1537+ APP_SLEEP_CTL_BYPASS_LDO19 |
1538+ APP_SLEEP_CTL_BYPASS_LDO17);
1539+
1540+ /* Turn off LDO17 and LDO19 */
1541+ da9030_set_reg(REG_CONTROL_1_17,
1542+ RC1_LDO16_EN | RC1_LDO15_EN |
1543+ RC1_LDO11_EN | RC1_LDO10_EN | RC1_BUCK2_EN);
1544+ da9030_set_reg(REG_CONTROL_2_18, RC2_SIMCP_EN | RC2_LDO18_EN);
1545+
1546+ /* Set LDO17 voltage to 3V (VCC_WLAN_IO) */
1547+ da9030_set_reg(LDO_17_SIMCP0, LDO_17_SIMCP0_LDO17_3V);
1548+ mdelay(200);
1549+
1550+ /* Turn WLAN RF power on */
1551+ pxa_gpio_mode(115 | GPIO_OUT | GPIO_DFLT_HIGH);
1552+
1553+ /* Turn LDO17 on */
1554+ da9030_set_reg(REG_CONTROL_1_17,
1555+ RC1_LDO17_EN| RC1_LDO16_EN | RC1_LDO15_EN |
1556+ RC1_LDO11_EN | RC1_LDO10_EN | RC1_BUCK2_EN);
1557+ mdelay(200);
1558+
1559+ /* Turn on LDO19 */
1560+ da9030_set_reg(REG_CONTROL_2_18,
1561+ RC2_SIMCP_EN | RC2_LDO18_EN | RC2_LDO19_EN);
1562+
1563+ }
1564+ else {
1565+ /* FIXME: implement BGW shutdown */
1566+ }
1567+ is_wlan_on = on;
1568+
1569+ return 0;
1570+}
1571+
1572+static struct em_x270_dev_data em_x270_wlan_data = {
1573+ .is_on = wlan_is_on,
1574+ .set_on = wlan_set_on,
1575+};
1576+
1577+static struct platform_device em_x270_wlan = {
1578+ .name = "wlan",
1579+ .id = -1,
1580+ .dev = {
1581+ .platform_data = &em_x270_wlan_data,
1582+ .release = em_x270_dev_release,
1583+ },
1584+};
1585+
1586+static int gps_is_on(struct device *dev)
1587+{
1588+ int val = da9030_get_reg(REG_CONTROL_1_97);
1589+ return !!(val & RC3_LDO3_EN);
1590+}
1591+
1592+static int gps_set_on(struct device *dev, int on)
1593+{
1594+ int val = da9030_get_reg(REG_CONTROL_1_97);
1595+
1596+ if (on)
1597+ val |= RC3_LDO3_EN;
1598+ else
1599+ val &= ~RC3_LDO3_EN;
1600+ da9030_set_reg(REG_CONTROL_1_97, val);
1601+
1602+ return 0;
1603+}
1604+
1605+static struct em_x270_dev_data em_x270_gps_data = {
1606+ .is_on = gps_is_on,
1607+ .set_on = gps_set_on,
1608+};
1609+
1610+static struct platform_device em_x270_gps = {
1611+ .name = "gps",
1612+ .id = -1,
1613+ .dev = {
1614+ .platform_data = &em_x270_gps_data,
1615+ .release = em_x270_dev_release,
1616+ },
1617+};
1618+
1619+static int usb_mode;
1620+static int usb_host_is_on(struct device *dev)
1621+{
1622+ return usb_mode;
1623+}
1624+
1625+static int usb_host_set_on(struct device *dev, int on)
1626+{
1627+ if (on) {
1628+ da9030_set_reg(MISC_CONTROLB, MISCB_SESSION_VALID_ENABLE);
1629+ da9030_set_reg(USBPUMP,
1630+ USB_PUMP_EN_USBVEP |
1631+ USB_PUMP_EN_USBVE |
1632+ USB_PUMP_USBVE);
1633+
1634+ /* enable port 2 transiever */
1635+ UP2OCR = UP2OCR_HXS | UP2OCR_HXOE;
1636+ usb_mode = 1;
1637+ }
1638+ else {
1639+ UP2OCR = UP2OCR_DPPUE | UP2OCR_DPPUBE | UP2OCR_HXOE;
1640+ da9030_set_reg(USBPUMP,
1641+ USB_PUMP_EN_USBVEP | USB_PUMP_EN_USBVE);
1642+ usb_mode = 0;
1643+ }
1644+
1645+ return 0;
1646+}
1647+
1648+static struct em_x270_dev_data em_x270_usb_host_data = {
1649+ .is_on = usb_host_is_on,
1650+ .set_on = usb_host_set_on,
1651+};
1652+
1653+static struct platform_device em_x270_usb_host = {
1654+ .name = "usb_host",
1655+ .id = -1,
1656+ .dev = {
1657+ .platform_data = &em_x270_usb_host_data,
1658+ .release = em_x270_dev_release,
1659+ },
1660+};
1661+
1662+static struct platform_device *em_x270_devices[] = {
1663+ &em_x270_gprs,
1664+ &em_x270_wlan,
1665+ &em_x270_gps,
1666+ &em_x270_usb_host,
1667+};
1668+
1669+static struct work_struct usb_work;
1670+static void usb_worker(struct work_struct *work)
1671+{
1672+ usb_host_set_on(NULL, !pxa_gpio_get_value(21));
1673+}
1674+
1675+static irqreturn_t usb_irq_handler(int irq, void *regs)
1676+{
1677+ schedule_work(&usb_work);
1678+
1679+ pr_info("%s\n", __FUNCTION__);
1680+ return IRQ_HANDLED;
1681+}
1682+
1683+static int em_x270_devices_init(void)
1684+{
1685+ int i, ret;
1686+
1687+ for (i = 0; i < ARRAY_SIZE(em_x270_devices); i++ ) {
1688+ ret = platform_device_register(em_x270_devices[i]);
1689+ if (ret) {
1690+ dev_dbg(&em_x270_devices[i]->dev,
1691+ "Registration failed: %d\n", ret);
1692+ continue;
1693+ }
1694+
1695+ ret = device_create_file(&em_x270_devices[i]->dev,
1696+ &dev_attr_pwr_on);
1697+ if (ret) {
1698+ dev_dbg(&em_x270_devices[i]->dev,
1699+ "PWR_ON attribute failed: %d\n", ret);
1700+ }
1701+
1702+ dev_dbg(&em_x270_devices[i]->dev,
1703+ "Registered PWR ON attribute\n");
1704+ }
1705+
1706+ /* setup USB detection irq */
1707+ INIT_WORK(&usb_work, usb_worker);
1708+ set_irq_type(IRQ_GPIO(21), IRQT_BOTHEDGE);
1709+ ret = request_irq(IRQ_GPIO(21), usb_irq_handler, IRQF_DISABLED,
1710+ "usb detect", 0);
1711+ if (ret) {
1712+ pr_info("USB device detection disabled\n");
1713+ }
1714+ else {
1715+ schedule_work(&usb_work);
1716+ }
1717+
1718+ return 0;
1719+}
1720+
1721+static void em_x270_devices_exit(void)
1722+{
1723+ int i;
1724+
1725+ for (i = 0; i < ARRAY_SIZE(em_x270_devices); i++ ) {
1726+ device_remove_file(&em_x270_devices[i]->dev,
1727+ &dev_attr_pwr_on);
1728+ platform_device_unregister(em_x270_devices[i]);
1729+ }
1730+}
1731+
1732+late_initcall(em_x270_devices_init);
1733+module_exit(em_x270_devices_exit);
1734+
1735+MODULE_AUTHOR("Mike Rapoport");
1736+MODULE_DESCRIPTION("Support for platfrom specific device attributes for EM-X270");
1737+MODULE_LICENSE("GPL");
1738diff --git a/arch/arm/mach-pxa/em-x270-lcd.c b/arch/arm/mach-pxa/em-x270-lcd.c
1739new file mode 100644
1740index 0000000..437efe1
1741--- /dev/null
1742+++ b/arch/arm/mach-pxa/em-x270-lcd.c
1743@@ -0,0 +1,223 @@
1744+/*
1745+ * LCD initialization and backlight managemnet for EM-X270
1746+ *
1747+ * Copyright (C) 2007 CompuLab, Ltd.
1748+ * Author: Igor Vaisbein <igor@compulab.co.il>
1749+ *
1750+ * This program is free software; you can redistribute it and/or modify
1751+ * it under the terms of the GNU General Public License version 2 as
1752+ * published by the Free Software Foundation.
1753+ *
1754+ */
1755+
1756+#include <linux/module.h>
1757+#include <linux/platform_device.h>
1758+#include <linux/da9030.h>
1759+#include <linux/delay.h>
1760+
1761+#include <asm/arch/hardware.h>
1762+#include <asm/arch/pxa-regs.h>
1763+#include <asm/arch/sharpsl.h>
1764+#include <asm/arch/ssp.h>
1765+
1766+#include "devices.h"
1767+
1768+#define GPIO87_nPCE_2 87 /* Card Enable for Card Space (PXA27x) */
1769+#define GPIO87_nPCE_2_MD (87 | GPIO_ALT_FN_1_IN)
1770+#define GPIO87_USB3_1_MD (87 | GPIO_ALT_FN_3_IN)
1771+#define GPIO87_SSPTXD2_MD (87 | GPIO_ALT_FN_1_OUT)
1772+#define GPIO87_SSFRM2_MD (87 | GPIO_ALT_FN_3_OUT)
1773+
1774+#define LCCR4 __REG(0x44000010)
1775+
1776+#define TD035STEE1_LCD_ID 0x2008
1777+
1778+static void em_x270_set_bl_intensity(int intensity)
1779+{
1780+ da9030_set_wled((intensity != 0), intensity);
1781+}
1782+
1783+struct corgibl_machinfo em_x270_bl_machinfo = {
1784+ .max_intensity = 0x7,
1785+ .default_intensity = 0x3,
1786+ .limit_mask = 0x1,
1787+ .set_bl_intensity = em_x270_set_bl_intensity,
1788+};
1789+
1790+static void em_x270_bl_release(struct device * dev)
1791+{
1792+
1793+}
1794+
1795+static struct platform_device em_x270_bl = {
1796+ .name = "corgi-bl",
1797+ .dev = {
1798+ .release = em_x270_bl_release,
1799+ .parent = &pxa_device_fb.dev,
1800+ .platform_data = &em_x270_bl_machinfo,
1801+ },
1802+ .id = -1,
1803+};
1804+
1805+/*
1806+ * Helper functions to access LCD throuhg SPI interface
1807+ */
1808+static void set_ssp_9bit(void)
1809+{
1810+ int temp;
1811+ SSCR0 = 0xFF208;
1812+ SSCR0 = 0xFF288;
1813+ SSCR1 = 0x40000018;
1814+
1815+ while (SSSR & 0x8)
1816+ temp = SSDR;
1817+}
1818+
1819+static void set_ssp_18bit(void)
1820+{
1821+ int temp;
1822+ SSCR0 = 0x1FF201;
1823+ SSCR0 = 0x1FF281;
1824+ SSCR1 = 0x40000018;
1825+ while (SSSR & 0x8)
1826+ temp = SSDR;
1827+}
1828+
1829+static void set_ssp_rcv(void)
1830+{
1831+ int temp;
1832+ SSCR0 = 0x1FF20F;
1833+ SSCR0 = 0x1FF28F;
1834+ SSCR1 = 0x40000018;
1835+ while (SSSR & 0x8)
1836+ temp = SSDR;
1837+}
1838+
1839+static void send_ssp_9bit(unsigned int value)
1840+{
1841+ int temp;
1842+ SSDR = (value);
1843+
1844+ asm volatile ("mcr p15, 0, r0, c7, c10, 4":::"r0");
1845+
1846+ if (!(SSSR & 0x4))
1847+ while ((SSSR & 0xf00) == 0)
1848+ ;
1849+
1850+ while ((SSSR & 0xf00) != 0)
1851+ ;
1852+ while (SSSR & 0x10)
1853+ ;
1854+ while (SSSR & 0x8)
1855+ temp = SSDR;
1856+}
1857+
1858+static void send_ssp_18bit(unsigned int value)
1859+{
1860+ int temp;
1861+ SSDR = (value);
1862+
1863+ asm volatile ("mcr p15, 0, r0, c7, c10, 4":::"r0");
1864+
1865+ if (!(SSSR & 0x4))
1866+ while ((SSSR & 0xf00) == 0)
1867+ ;
1868+
1869+ while ((SSSR & 0xf00) != 0)
1870+ ;
1871+ while (SSSR & 0x10)
1872+ ;
1873+ while (SSSR & 0x8)
1874+ temp = SSDR;
1875+}
1876+
1877+static unsigned int rcv_ssp_18bit(void)
1878+{
1879+ SSDR = ((0x04) << 23);
1880+ asm volatile ("mcr p15, 0, r0, c7, c10, 4":::"r0");
1881+ if (!(SSSR & 0x4))
1882+ while ((SSSR & 0xf00) == 0)
1883+ ;
1884+ while ((SSSR & 0xf00) != 0)
1885+ ;
1886+ while (SSSR & 0x10)
1887+ ;
1888+ return SSDR;
1889+}
1890+
1891+/* LCD init sequence */
1892+int em_x270_lcd_detect(void)
1893+{
1894+ unsigned int data;
1895+
1896+ /* Reset the LCD module */
1897+ pxa_gpio_mode(GPIO87_nPCE_2 | GPIO_OUT);
1898+ GPCR(GPIO87_nPCE_2) |= GPIO_bit(GPIO87_nPCE_2);
1899+ mdelay(75);
1900+ GPSR(GPIO87_nPCE_2) |= GPIO_bit(GPIO87_nPCE_2);
1901+ mdelay(70);
1902+
1903+ /* TD035STEE1 LCD_SSP initialization commands */
1904+ set_ssp_9bit();
1905+ send_ssp_9bit(0x000);
1906+ mdelay(5);
1907+
1908+ send_ssp_9bit(0x000);
1909+ mdelay(5);
1910+
1911+ send_ssp_9bit(0x000);
1912+ mdelay(5);
1913+
1914+ set_ssp_18bit();
1915+ send_ssp_18bit(0x17980);
1916+ mdelay(5);
1917+
1918+ send_ssp_18bit(0x17F10);
1919+ mdelay(5);
1920+
1921+ set_ssp_9bit();
1922+ send_ssp_9bit(0x011);
1923+ mdelay(50);
1924+
1925+ send_ssp_9bit(0x029);
1926+ mdelay(10);
1927+
1928+ set_ssp_rcv();
1929+
1930+ /* Check for LCD ID, to enable the back-light */
1931+ data = rcv_ssp_18bit();
1932+
1933+ if ((data & 0xFFFF) != TD035STEE1_LCD_ID)
1934+ return -ENODEV;
1935+
1936+ /* enable backlight */
1937+ da9030_set_wled(1, 2);
1938+ return 0;
1939+}
1940+
1941+static int em_x270_lcd_init(void)
1942+{
1943+ int ret;
1944+ pr_debug("%s\n", __FUNCTION__);
1945+ ret = em_x270_lcd_detect();
1946+ if (ret)
1947+ return ret;
1948+
1949+ /* make sure we keep LCCR4 with PCD=0 */
1950+ LCCR4 = 0x0;
1951+
1952+ return platform_device_register(&em_x270_bl);
1953+}
1954+
1955+static void em_x270_lcd_exit(void)
1956+{
1957+ pr_debug("%s\n", __FUNCTION__);
1958+ platform_device_unregister(&em_x270_bl);
1959+}
1960+
1961+late_initcall(em_x270_lcd_init);
1962+module_exit(em_x270_lcd_exit);
1963+
1964+MODULE_DESCRIPTION("EM-X270 backlight and LCD initialization driver");
1965+MODULE_AUTHOR("Mike Rapoport");
1966+MODULE_LICENSE("GPL");
1967diff --git a/arch/arm/mach-pxa/em-x270-pm.c b/arch/arm/mach-pxa/em-x270-pm.c
1968new file mode 100644
1969index 0000000..55ba4cd
1970--- /dev/null
1971+++ b/arch/arm/mach-pxa/em-x270-pm.c
1972@@ -0,0 +1,892 @@
1973+/*
1974+ * Support for CompuLab EM-X270 platform power management
1975+ *
1976+ * Copyright (C) 2007 CompuLab, Ltd.
1977+ * Author: Mike Rapoport <mike@compulab.co.il>
1978+ *
1979+ * This program is free software; you can redistribute it and/or modify
1980+ * it under the terms of the GNU General Public License version 2 as
1981+ * published by the Free Software Foundation.
1982+ */
1983+
1984+#include <linux/kernel.h>
1985+#include <linux/init.h>
1986+#include <linux/module.h>
1987+#include <linux/sysfs.h>
1988+#include <linux/pm.h>
1989+#include <linux/da9030.h>
1990+#include <linux/interrupt.h>
1991+#include <linux/irq.h>
1992+#include <linux/delay.h>
1993+#include <linux/ctype.h>
1994+
1995+#include <linux/apm-emulation.h>
1996+#include <linux/platform_device.h>
1997+#include <linux/power_supply.h>
1998+
1999+#include <linux/debugfs.h>
2000+#include <linux/seq_file.h>
2001+
2002+#include "../../../drivers/i2c/chips/da9030.h"
2003+
2004+#include <asm/arch/pm.h>
2005+#include <asm/arch/hardware.h>
2006+#include <asm/arch/pxa-regs.h>
2007+#include <asm/arch/pwr-i2c.h>
2008+
2009+#define DA9030_ADDR 0x92
2010+
2011+#define EM_X270_BATCHK_TIME_SUSPEND (10*60) /* 10 min */
2012+
2013+#define VOLTAGE_MAX_DESIGN 4200000 /* 4.2V in uV */
2014+#define VOLTAGE_MIN_DESIGN 3000000 /* 3V in uV */
2015+
2016+#define REG2VOLT(x) ((((x) * 2650) >> 8) + 2650)
2017+#define VOLT2REG(x) ((((x) - 2650) << 8) / 2650)
2018+
2019+#define REG2CURR(x) ((((x) * 24000) >> 8) / 15)
2020+
2021+#define VCHARGE_MIN_THRESHOLD VOLT2REG(3200)
2022+#define VCHARGE_MAX_THRESHOLD VOLT2REG(5500)
2023+
2024+#define VBAT_LOW_THRESHOLD VOLT2REG(3600)
2025+#define VBAT_CRIT_THRESHOLD VOLT2REG(3400)
2026+
2027+#define VBAT_CHARGE_START VOLT2REG(4100)
2028+#define VBAT_CHARGE_STOP VOLT2REG(4200)
2029+#define VBAT_CHARGE_RESTART VOLT2REG(4000)
2030+
2031+#define TBAT_LOW_THRESHOLD 197 /* 0oC */
2032+#define TBAT_HIGH_THRESHOLD 78 /* 45oC */
2033+#define TBAT_RESUME_THRESHOLD 100 /* 35oC */
2034+
2035+struct em_x270_charger;
2036+
2037+struct em_x270_charger_ops {
2038+ void (*get_status)(struct em_x270_charger *charger);
2039+ void (*set_charge)(struct em_x270_charger *charger, int on);
2040+
2041+ s32 (*da9030_get_reg)(u32 reg);
2042+ s32 (*da9030_set_reg)(u32 reg, u8 val);
2043+};
2044+
2045+struct em_x270_charger {
2046+ struct device *dev;
2047+
2048+ struct power_supply bat;
2049+ struct da9030_adc_res adc;
2050+ struct delayed_work work;
2051+
2052+ int interval;
2053+
2054+ int da9030_status;
2055+ int da9030_fault;
2056+ int mA;
2057+ int mV;
2058+ int is_on;
2059+
2060+ struct em_x270_charger_ops *ops;
2061+
2062+#ifdef CONFIG_DEBUG_FS
2063+ struct dentry *debug_file;
2064+#endif
2065+};
2066+
2067+static struct em_x270_charger *the_charger;
2068+
2069+static unsigned short tbat_readings[] = {
2070+ 300, 244, 200, 178, 163, 152, 144, 137, 131,
2071+ 126, 122, 118, 114, 111, 108, 105, 103, 101,
2072+ 98, 96, 94, 93, 91, 89, 88, 86, 85,
2073+ 83, 82, 81, 79, 78, 77, 76, 75, 74,
2074+ 73, 72, 71, 70, 69, 68, 67, 67, 66,
2075+ 65, 64, 63, 63, 62, 61, 60, 60, 59,
2076+ 58, 58, 57, 57, 56, 55, 55, 54, 53,
2077+ 53, 52, 52, 51, 51, 50, 50, 49, 49,
2078+ 48, 48, 47, 47, 46, 46, 45, 45, 44,
2079+ 44, 43, 43, 42, 42, 41, 41, 41, 40,
2080+ 40, 39, 39, 38, 38, 38, 37, 37, 36,
2081+ 36, 35, 35, 35, 34, 34, 34, 33, 33,
2082+ 32, 32, 32, 31, 31, 30, 30, 30, 29,
2083+ 29, 29, 28, 28, 28, 27, 27, 26, 26,
2084+ 26, 25, 25, 25, 24, 24, 24, 23, 23,
2085+ 23, 22, 22, 21, 21, 21, 20, 20, 20,
2086+ 19, 19, 19, 18, 18, 18, 17, 17, 17,
2087+ 16, 16, 16, 15, 15, 14, 14, 14, 13,
2088+ 13, 13, 12, 12, 12, 11, 11, 11, 10,
2089+ 10, 10, 9, 9, 8, 8, 8, 7, 7,
2090+ 7, 6, 6, 5, 5, 5, 4, 4, 3,
2091+ 3, 3, 2, 2, 1, 1, 1, 0, 0,
2092+ -1, -1, -1, -2, -2, -3, -3, -4, -4,
2093+ -5, -5, -6, -6, -6, -7, -7, -8, -9,
2094+ -9, -10, -10, -11, -11, -12, -12, -13, -14,
2095+ -14, -15, -16, -16, -17, -18, -18, -19, -20,
2096+ -21, -21, -22, -23, -24, -25, -26, -27, -28,
2097+ -30, -31, -32, -34, -35, -37, -39, -41, -44,
2098+ -47, -50, -56, -64,
2099+};
2100+
2101+static inline int usb_host_on(void)
2102+{
2103+ return !pxa_gpio_get_value(21);
2104+}
2105+
2106+#ifdef CONFIG_DEBUG_FS
2107+
2108+static int debug_show(struct seq_file *s, void *data)
2109+{
2110+ struct em_x270_charger *charger = s->private;
2111+
2112+ seq_printf(s, "charger is %s\n", charger->is_on ? "on" : "off");
2113+ if (charger->da9030_status & CHRG_CHARGER_ENABLE) {
2114+ seq_printf(s, "iset = %dmA, vset = %dmV\n",
2115+ charger->mA, charger->mV);
2116+ }
2117+
2118+ seq_printf(s, "vbat_res = %d (%dmV)\n",
2119+ charger->adc.vbat_res, REG2VOLT(charger->adc.vbat_res));
2120+ seq_printf(s, "vbatmin_res = %d (%dmV)\n",
2121+ charger->adc.vbatmin_res,
2122+ REG2VOLT(charger->adc.vbatmin_res));
2123+ seq_printf(s, "vbatmintxon = %d (%dmV)\n",
2124+ charger->adc.vbatmintxon,
2125+ REG2VOLT(charger->adc.vbatmintxon));
2126+ seq_printf(s, "ichmax_res = %d (%dmA)\n",
2127+ charger->adc.ichmax_res,
2128+ REG2CURR(charger->adc.ichmax_res));
2129+ seq_printf(s, "ichmin_res = %d (%dmA)\n",
2130+ charger->adc.ichmin_res,
2131+ REG2CURR(charger->adc.ichmin_res));
2132+ seq_printf(s, "ichaverage_res = %d (%dmA)\n",
2133+ charger->adc.ichaverage_res,
2134+ REG2CURR(charger->adc.ichaverage_res));
2135+ seq_printf(s, "vchmax_res = %d (%dmV)\n",
2136+ charger->adc.vchmax_res,
2137+ REG2VOLT(charger->adc.vchmax_res));
2138+ seq_printf(s, "vchmin_res = %d (%dmV)\n",
2139+ charger->adc.vchmin_res,
2140+ REG2VOLT(charger->adc.vchmin_res));
2141+ seq_printf(s, "tbat_res = %d (%doC)\n", charger->adc.tbat_res,
2142+ tbat_readings[charger->adc.tbat_res]);
2143+ seq_printf(s, "adc_in4_res = %d\n", charger->adc.adc_in4_res);
2144+ seq_printf(s, "adc_in5_res = %d\n", charger->adc.adc_in5_res);
2145+
2146+ return 0;
2147+}
2148+
2149+static int debug_open(struct inode *inode, struct file *file)
2150+{
2151+ return single_open(file, debug_show, inode->i_private);
2152+}
2153+
2154+static const struct file_operations debug_fops = {
2155+ .open = debug_open,
2156+ .read = seq_read,
2157+ .llseek = seq_lseek,
2158+ .release = single_release,
2159+};
2160+
2161+static struct dentry* em_x270_create_debugfs(struct em_x270_charger *charger)
2162+{
2163+ charger->debug_file = debugfs_create_file("charger", 0666, 0, charger,
2164+ &debug_fops);
2165+ return charger->debug_file;
2166+}
2167+
2168+static void em_x270_remove_debugfs(struct em_x270_charger *charger)
2169+{
2170+ debugfs_remove(charger->debug_file);
2171+}
2172+#else
2173+#define em_x270_create_debugfs(x) NULL
2174+#define em_x270_remove_debugfs(x) do {} while(0)
2175+#endif
2176+
2177+/*********************************************************************/
2178+/* DA9030 access functions for suspend/resume */
2179+#define DA_ADDR 0x49
2180+static inline s32 __da9030_get_reg(u32 reg)
2181+{
2182+ pr_info("%s: reg = %d\n", __FUNCTION__, reg);
2183+ return pxa_pwr_i2c_reg_read(DA_ADDR, reg);
2184+}
2185+
2186+static inline s32 __da9030_set_reg(u32 reg, u8 val)
2187+{
2188+ pr_info("%s: reg = %d, val = %d\n", __FUNCTION__, reg, val);
2189+ return pxa_pwr_i2c_reg_write(DA_ADDR, reg, val);
2190+}
2191+
2192+/*********************************************************************/
2193+/* helpers for charger state monnitor. Different version for stready
2194+ * state and suspended system
2195+ */
2196+static void em_x270_get_charger_status(struct em_x270_charger *charger)
2197+{
2198+ da9030_get_charger(&charger->is_on, &charger->mA, &charger->mV);
2199+ da9030_read_adc(&charger->adc);
2200+ charger->da9030_status = da9030_get_status();
2201+ charger->da9030_fault = da9030_get_fault_log();
2202+}
2203+
2204+static void em_x270_set_charge(struct em_x270_charger *charger, int on)
2205+{
2206+ if (on) {
2207+ pr_debug("%s: enabling charger\n", __FUNCTION__);
2208+ da9030_set_thresholds(TBAT_HIGH_THRESHOLD,
2209+ TBAT_RESUME_THRESHOLD,
2210+ TBAT_LOW_THRESHOLD,
2211+ VBAT_LOW_THRESHOLD);
2212+ da9030_set_reg(CCTR_CONTROL, CCTR_SET_8MIN);
2213+ da9030_set_charger(1, 1000, 4200);
2214+ da9030_set_led(3, 1, 0, 0, 0);
2215+ charger->is_on = 1;
2216+ }
2217+ else {
2218+ /* disable charger */
2219+ pr_debug("%s: disabling charger\n", __FUNCTION__);
2220+ da9030_set_charger(0, 0, 0);
2221+ da9030_set_led(3, 0, 0, 0, 0);
2222+ charger->is_on = 0;
2223+ }
2224+}
2225+
2226+static void em_x270_get_charger_status_suspend(struct em_x270_charger *charger)
2227+{
2228+ s32 val;
2229+
2230+ val = __da9030_get_reg(CHARGE_CONTROL);
2231+ charger->is_on = (val & CHRG_CHARGER_ENABLE) ? 1 : 0;
2232+ charger->mA = ((val >> 3) & 0xf) * 100;
2233+ charger->mV = (val & 0x7) * 50 + 4000;
2234+
2235+ charger->adc.vbat_res = __da9030_get_reg(VBAT_RES);
2236+ charger->adc.vchmax_res = __da9030_get_reg(VCHMAX_RES);
2237+ charger->adc.vchmin_res = __da9030_get_reg(VCHMIN_RES);
2238+ charger->adc.tbat_res = __da9030_get_reg(TBAT_RES);
2239+
2240+ charger->da9030_status = __da9030_get_reg(STATUS);
2241+ charger->da9030_fault = __da9030_get_reg(FAULT_LOG);
2242+}
2243+
2244+static void em_x270_set_charge_suspend(struct em_x270_charger *charger, int on)
2245+{
2246+ if (on) {
2247+ u8 val = 0;
2248+ int mA = 1000;
2249+ int mV = 4200;
2250+
2251+ pr_debug("%s: enabling charger\n", __FUNCTION__);
2252+ val = CHRG_CHARGER_ENABLE;
2253+ val |= (mA / 100) << 3;
2254+ val |= (mV - 4000) / 50;
2255+
2256+ __da9030_set_reg(CCTR_CONTROL, CCTR_SET_8MIN);
2257+ __da9030_set_reg(VBATMON, VBAT_LOW_THRESHOLD);
2258+ __da9030_set_reg(CHARGE_CONTROL, val);
2259+ charger->is_on = 1;
2260+ }
2261+ else {
2262+ /* disable charger */
2263+ pr_debug("%s: disabling charger\n", __FUNCTION__);
2264+ __da9030_set_reg(CHARGE_CONTROL, 0);
2265+ charger->is_on = 0;
2266+ }
2267+}
2268+
2269+static struct em_x270_charger_ops em_x270_charger_ops = {
2270+ .get_status = em_x270_get_charger_status,
2271+ .set_charge = em_x270_set_charge,
2272+ .da9030_get_reg = da9030_get_reg,
2273+ .da9030_set_reg = da9030_set_reg,
2274+};
2275+
2276+static struct em_x270_charger_ops em_x270_charger_ops_suspend = {
2277+ .get_status = em_x270_get_charger_status_suspend,
2278+ .set_charge = em_x270_set_charge_suspend,
2279+ .da9030_get_reg = __da9030_get_reg,
2280+ .da9030_set_reg = __da9030_set_reg,
2281+};
2282+
2283+/*********************************************************************/
2284+/* charging state machine */
2285+static void em_x270_check_charger_state(struct em_x270_charger *charger)
2286+{
2287+ charger->ops->get_status(charger);
2288+
2289+/* we wake or boot with external power on */
2290+ if (!charger->is_on) {
2291+ if ((charger->da9030_status & STATUS_CHDET) &&
2292+ (!usb_host_on()) &&
2293+ (charger->adc.vbat_res < VBAT_CHARGE_START)) {
2294+ pr_debug("%s: vbat_res <= 4100\n", __FUNCTION__);
2295+ charger->ops->set_charge(charger, 1);
2296+ }
2297+ }
2298+ else {
2299+ if (charger->adc.vbat_res >= VBAT_CHARGE_STOP) {
2300+ pr_debug("%s: vbat_res >= 4200\n", __FUNCTION__);
2301+ charger->ops->set_charge(charger, 0);
2302+ charger->ops->da9030_set_reg(VBATMON,
2303+ VBAT_CHARGE_RESTART);
2304+ }
2305+ else if (charger->adc.vbat_res > VBAT_LOW_THRESHOLD) {
2306+ /* we are charging and passed LOW_THRESH,
2307+ so upate DA9030 VBAT threshold
2308+ */
2309+ pr_debug("%s: vbat_res >= %d\n", __FUNCTION__,
2310+ REG2VOLT(VBAT_LOW_THRESHOLD));
2311+ charger->ops->da9030_set_reg(VBATMON,
2312+ VBAT_LOW_THRESHOLD);
2313+ }
2314+ if (charger->adc.vchmax_res > VCHARGE_MAX_THRESHOLD ||
2315+ charger->adc.vchmin_res < VCHARGE_MIN_THRESHOLD ||
2316+ /* Tempreture readings are negative */
2317+ charger->adc.tbat_res < TBAT_HIGH_THRESHOLD ||
2318+ charger->adc.tbat_res > TBAT_LOW_THRESHOLD ) {
2319+ /* disable charger */
2320+ pr_info("%s: thresholds fail\n", __FUNCTION__);
2321+ charger->ops->set_charge(charger, 0);
2322+ }
2323+ }
2324+}
2325+
2326+static void em_x270_charging_monitor(struct work_struct *work)
2327+{
2328+ struct em_x270_charger *charger;
2329+
2330+ charger = container_of(work, struct em_x270_charger, work.work);
2331+
2332+ em_x270_check_charger_state(charger);
2333+
2334+ /* reschedule for the next time */
2335+ schedule_delayed_work(&charger->work, charger->interval);
2336+}
2337+
2338+void em_x270_battery_release(struct device * dev)
2339+{
2340+}
2341+
2342+struct em_x270_battery_thresh {
2343+ int voltage;
2344+ int percentage;
2345+};
2346+
2347+static struct em_x270_battery_thresh vbat_ranges[] = {
2348+ { 150, 100},
2349+ { 149, 99},
2350+ { 148, 98},
2351+ { 147, 98},
2352+ { 146, 97},
2353+ { 145, 96},
2354+ { 144, 96},
2355+ { 143, 95},
2356+ { 142, 94},
2357+ { 141, 93},
2358+ { 140, 92},
2359+ { 139, 91},
2360+ { 138, 90},
2361+ { 137, 90},
2362+ { 136, 89},
2363+ { 135, 88},
2364+ { 134, 88},
2365+ { 133, 87},
2366+ { 132, 86},
2367+ { 131, 85},
2368+ { 130, 83},
2369+ { 129, 82},
2370+ { 128, 81},
2371+ { 127, 81},
2372+ { 126, 80},
2373+ { 125, 75},
2374+ { 124, 74},
2375+ { 123, 73},
2376+ { 122, 70},
2377+ { 121, 66},
2378+ { 120, 65},
2379+ { 119, 64},
2380+ { 118, 64},
2381+ { 117, 63},
2382+ { 116, 59},
2383+ { 115, 58},
2384+ { 114, 57},
2385+ { 113, 57},
2386+ { 112, 56},
2387+ { 111, 50},
2388+ { 110, 49},
2389+ { 109, 49},
2390+ { 108, 48},
2391+ { 107, 48},
2392+ { 106, 33},
2393+ { 105, 32},
2394+ { 104, 32},
2395+ { 103, 32},
2396+ { 102, 31},
2397+ { 101, 16},
2398+ { 100, 15},
2399+ { 99, 15},
2400+ { 98, 15},
2401+ { 97, 10},
2402+ { 96, 9},
2403+ { 95, 7},
2404+ { 94, 3},
2405+ { 93, 0},
2406+};
2407+
2408+static enum power_supply_property em_x270_bat_props[] = {
2409+ POWER_SUPPLY_PROP_STATUS,
2410+ POWER_SUPPLY_PROP_HEALTH,
2411+ POWER_SUPPLY_PROP_TECHNOLOGY,
2412+ POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
2413+ POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
2414+ POWER_SUPPLY_PROP_VOLTAGE_NOW,
2415+ POWER_SUPPLY_PROP_CURRENT_AVG,
2416+ POWER_SUPPLY_PROP_CAPACITY, /* in percents! */
2417+ POWER_SUPPLY_PROP_TEMP,
2418+ POWER_SUPPLY_PROP_MANUFACTURER,
2419+ POWER_SUPPLY_PROP_MODEL_NAME,
2420+};
2421+
2422+static void em_x270_bat_check_status(struct em_x270_charger *charger,
2423+ union power_supply_propval *val)
2424+{
2425+ /* FIXME: below code is very crude approximation of actual
2426+ states, we need to take into account voltage and current
2427+ measurements to determine actual charger state */
2428+ if (charger->da9030_status & STATUS_CHDET) {
2429+ if (!usb_host_on()) {
2430+ if (charger->is_on) {
2431+ val->intval = POWER_SUPPLY_STATUS_CHARGING;
2432+ }
2433+ else {
2434+ val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
2435+ }
2436+ }
2437+ }
2438+ else {
2439+ val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
2440+ }
2441+}
2442+
2443+static void em_x270_bat_check_health(struct em_x270_charger *charger,
2444+ union power_supply_propval *val)
2445+{
2446+ if (charger->da9030_fault & FAULT_LOG_OVER_TEMP) {
2447+ val->intval = POWER_SUPPLY_HEALTH_OVERHEAT;
2448+ }
2449+ else if (charger->da9030_fault & FAULT_LOG_VBAT_OVER) {
2450+ val->intval = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
2451+ }
2452+ else {
2453+ val->intval = POWER_SUPPLY_HEALTH_GOOD;
2454+ }
2455+}
2456+
2457+static int vbat_interpolate(int reg)
2458+{
2459+ int i;
2460+
2461+ for (i = 0; i < ARRAY_SIZE(vbat_ranges); i++ )
2462+ if (vbat_ranges[i].voltage == reg) {
2463+ pr_debug("%s: voltage = %d, percentage = %d\n",
2464+ __FUNCTION__, vbat_ranges[i].voltage,
2465+ vbat_ranges[i].percentage);
2466+ return vbat_ranges[i].percentage;
2467+ }
2468+
2469+ return 0;
2470+}
2471+
2472+static int em_x270_bat_get_property(struct power_supply *psy,
2473+ enum power_supply_property psp,
2474+ union power_supply_propval *val)
2475+{
2476+ u32 reg;
2477+ struct em_x270_charger *charger;
2478+ charger = container_of(psy, struct em_x270_charger, bat);
2479+
2480+ switch(psp) {
2481+ case POWER_SUPPLY_PROP_STATUS:
2482+ em_x270_bat_check_status(charger, val);
2483+ break;
2484+ case POWER_SUPPLY_PROP_HEALTH:
2485+ em_x270_bat_check_health(charger, val);
2486+ break;
2487+ case POWER_SUPPLY_PROP_TECHNOLOGY:
2488+ val->intval = POWER_SUPPLY_TECHNOLOGY_LIPO;
2489+ break;
2490+ case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
2491+ val->intval = VOLTAGE_MAX_DESIGN;
2492+ break;
2493+ case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
2494+ val->intval = VOLTAGE_MIN_DESIGN;
2495+ break;
2496+ case POWER_SUPPLY_PROP_VOLTAGE_NOW:
2497+ reg = charger->adc.vbat_res;
2498+ /* V = (reg / 256) * 2.65 + 2.65 (V) */
2499+ val->intval = ((reg * 2650000) >> 8) + 2650000;
2500+ break;
2501+ case POWER_SUPPLY_PROP_CURRENT_AVG:
2502+ reg = charger->adc.ichaverage_res;
2503+ val->intval = reg; /* reg */
2504+ break;
2505+ case POWER_SUPPLY_PROP_CAPACITY:
2506+ reg = charger->adc.vbat_res;
2507+ val->intval = vbat_interpolate(reg);
2508+ break;
2509+ case POWER_SUPPLY_PROP_TEMP:
2510+ reg = charger->adc.tbat_res;
2511+ val->intval = tbat_readings[reg];
2512+ break;
2513+ case POWER_SUPPLY_PROP_MANUFACTURER:
2514+ val->strval = "MaxPower";
2515+ pr_debug("%s: MFG = %s\n", __FUNCTION__, val->strval);
2516+ break;
2517+ case POWER_SUPPLY_PROP_MODEL_NAME:
2518+ val->strval = "LP555597P6H-FPS";
2519+ pr_debug("%s: MODEL = %s\n", __FUNCTION__, val->strval);
2520+ break;
2521+ default: break;
2522+ }
2523+
2524+ return 0;
2525+}
2526+
2527+static void em_x270_setup_battery(struct power_supply *bat)
2528+{
2529+ bat->name = "em-x270-battery";
2530+ bat->type = POWER_SUPPLY_TYPE_BATTERY;
2531+ bat->properties = em_x270_bat_props;
2532+ bat->num_properties = ARRAY_SIZE(em_x270_bat_props);
2533+ bat->get_property = em_x270_bat_get_property;
2534+ bat->use_for_apm = 1;
2535+};
2536+
2537+static void em_x270_chiover_callback(int event, void *_charger)
2538+{
2539+ /* disable charger */
2540+ struct em_x270_charger *charger = _charger;
2541+/* pr_info("%s\n", __FUNCTION__); */
2542+ em_x270_set_charge(charger, 0);
2543+}
2544+
2545+static void em_x270_tbat_callback(int event, void *_charger)
2546+{
2547+ /* disable charger */
2548+ struct em_x270_charger *charger = _charger;
2549+/* pr_info("%s\n", __FUNCTION__); */
2550+ em_x270_set_charge(charger, 0);
2551+}
2552+
2553+static void em_x270_vbat_callback(int event, void *_charger)
2554+{
2555+ struct em_x270_charger *charger = _charger;
2556+ da9030_read_adc(&charger->adc);
2557+
2558+ if (!charger->is_on) {
2559+ if (charger->adc.vbat_res < VBAT_LOW_THRESHOLD) {
2560+ /* set VBAT threshold for critical */
2561+ da9030_set_reg(VBATMON, VBAT_CRIT_THRESHOLD);
2562+ da9030_set_reg(VBATMON_1, VBAT_CRIT_THRESHOLD);
2563+ apm_queue_event(APM_LOW_BATTERY);
2564+ }
2565+ else if (charger->adc.vbat_res < VBAT_CRIT_THRESHOLD) {
2566+ /* notify the system of battery critical */
2567+ apm_queue_event(APM_CRITICAL_SUSPEND);
2568+ }
2569+ }
2570+}
2571+
2572+static void em_x270_chdet_callback(int event, void *_charger)
2573+{
2574+ struct em_x270_charger *charger = _charger;
2575+ int status = da9030_get_status();
2576+ pr_info("%s\n", __FUNCTION__);
2577+
2578+/* em_x270_check_charger_state(charger); */
2579+
2580+ /* check if we have "real" charger or our own USB pump */
2581+ if (!usb_host_on())
2582+ em_x270_set_charge(charger, !!(status & CHRG_CHARGER_ENABLE));
2583+}
2584+
2585+static int em_x270_battery_probe(struct platform_device *pdev)
2586+{
2587+ struct em_x270_charger *charger;
2588+
2589+ pr_debug("%s\n", __FUNCTION__);
2590+ charger = kzalloc(sizeof(*charger), GFP_KERNEL);
2591+ if (charger == NULL) {
2592+ return -ENOMEM;
2593+ }
2594+
2595+ the_charger = charger;
2596+
2597+ charger->dev = &pdev->dev;
2598+
2599+ charger->ops = &em_x270_charger_ops;
2600+
2601+ charger->interval = 10 * HZ; /* 10 seconds between monotor runs */
2602+ em_x270_setup_battery(&charger->bat);
2603+
2604+ platform_set_drvdata(pdev, charger);
2605+
2606+ da9030_enable_adc();
2607+
2608+ INIT_DELAYED_WORK(&charger->work, em_x270_charging_monitor);
2609+ schedule_delayed_work(&charger->work, charger->interval);
2610+
2611+ charger->debug_file = em_x270_create_debugfs(charger);
2612+
2613+ em_x270_setup_battery(&charger->bat);
2614+
2615+ da9030_register_callback(DA9030_IRQ_CHDET,
2616+ em_x270_chdet_callback,
2617+ charger);
2618+ da9030_register_callback(DA9030_IRQ_VBATMON,
2619+ em_x270_vbat_callback,
2620+ charger);
2621+
2622+ /* critical condition events */
2623+ da9030_register_callback(DA9030_IRQ_CHIOVER,
2624+ em_x270_chiover_callback,
2625+ charger);
2626+ da9030_register_callback(DA9030_IRQ_TBAT,
2627+ em_x270_tbat_callback,
2628+ charger);
2629+
2630+ da9030_set_thresholds(TBAT_HIGH_THRESHOLD,
2631+ TBAT_RESUME_THRESHOLD,
2632+ TBAT_LOW_THRESHOLD,
2633+ VBAT_LOW_THRESHOLD);
2634+
2635+ power_supply_register(&pdev->dev, &charger->bat);
2636+
2637+ return 0;
2638+}
2639+
2640+static int em_x270_battery_remove(struct platform_device *dev)
2641+{
2642+ struct em_x270_charger *charger = platform_get_drvdata(dev);
2643+
2644+ pr_debug("%s\n", __FUNCTION__);
2645+ em_x270_remove_debugfs(charger);
2646+ cancel_delayed_work(&charger->work);
2647+ power_supply_unregister(&charger->bat);
2648+
2649+ kfree(charger);
2650+ the_charger = NULL;
2651+
2652+ return 0;
2653+}
2654+
2655+static int em_x270_battery_suspend(struct platform_device *pdev,
2656+ pm_message_t state)
2657+{
2658+ pr_info("%s\n", __FUNCTION__);
2659+ da9030_set_reg(REG_CONTROL_1_97, RC3_BUCK_EN | RC3_LDO6_EN);
2660+ da9030_set_reg(REG_CONTROL_2_98, 0);
2661+ da9030_set_reg(REG_CONTROL_2_18,RC2_LDO18_EN);
2662+ da9030_set_reg(REG_CONTROL_1_17,
2663+ RC1_LDO16_EN | RC1_LDO15_EN | RC1_BUCK2_EN);
2664+ da9030_set_reg(WLED_CONTROL, 0);
2665+
2666+ da9030_set_reg(LED_1_CONTROL, 0);
2667+ da9030_set_reg(LED_4_CONTROL, 0);
2668+
2669+ return 0;
2670+}
2671+
2672+extern int em_x270_lcd_detect(void);
2673+static int em_x270_battery_resume(struct platform_device *pdev)
2674+{
2675+ pr_info("%s\n", __FUNCTION__);
2676+
2677+ da9030_set_reg(LED_1_CONTROL, 0xff);
2678+ da9030_set_reg(LED_4_CONTROL, 0xff);
2679+
2680+ da9030_set_reg(REG_CONTROL_1_97,
2681+ RC3_BUCK_EN | RC3_LDO1_EN | RC3_LDO2_EN |
2682+ RC3_LDO3_EN | RC3_LDO6_EN | RC3_LDO7_EN);
2683+ da9030_set_reg(REG_CONTROL_2_98,
2684+ RC4_SIMCP_ENABLE | RC4_LDO11_EN |
2685+ RC4_LDO9_EN | RC4_LDO8_EN);
2686+ da9030_set_reg(REG_CONTROL_2_18,
2687+ RC2_SIMCP_EN | RC2_LDO18_EN | RC2_LDO19_EN);
2688+ da9030_set_reg(REG_CONTROL_1_17,
2689+ RC1_LDO17_EN| RC1_LDO16_EN | RC1_LDO15_EN |
2690+ RC1_LDO11_EN | RC1_LDO10_EN | RC1_BUCK2_EN);
2691+
2692+ if (em_x270_lcd_detect() != 0)
2693+ pr_info("%s: LCD resume failed\n", __FUNCTION__);
2694+
2695+ return 0;
2696+}
2697+
2698+static struct platform_driver em_x270_battery_driver = {
2699+ .driver = {
2700+ .name = "em-x270-battery",
2701+ .owner = THIS_MODULE,
2702+ },
2703+ .probe = em_x270_battery_probe,
2704+ .remove = em_x270_battery_remove,
2705+
2706+ .suspend_late = em_x270_battery_suspend,
2707+ .resume_early = em_x270_battery_resume,
2708+};
2709+
2710+/**************************************************************************/
2711+/* global patform power management */
2712+/**************************************************************************/
2713+/* suspend/resume button */
2714+static irqreturn_t em_x270_suspend_irq(int irq, void *data)
2715+{
2716+ apm_queue_event(APM_USER_SUSPEND);
2717+ return IRQ_HANDLED;
2718+}
2719+
2720+static void em_x270_goto_sleep(suspend_state_t state,
2721+ unsigned long alarm_time,
2722+ unsigned int alarm_enable)
2723+{
2724+ pr_info("%s\n", __FUNCTION__);
2725+
2726+ the_charger->ops = &em_x270_charger_ops_suspend;
2727+
2728+ RTSR &= RTSR_ALE;
2729+ RTAR = RCNR + EM_X270_BATCHK_TIME_SUSPEND;
2730+
2731+ pxa_pm_enter(state);
2732+}
2733+
2734+static int em_x270_enter_suspend(unsigned long alarm_time,
2735+ unsigned int alarm_enable)
2736+{
2737+ s32 status = 0;
2738+ s32 event_a, event_b;
2739+ int ret;
2740+ int retry = 10;
2741+ pr_info("%s\n", __FUNCTION__);
2742+
2743+ /* make sure power I2C state is consistent */
2744+ PWRICR &= ~ICR_IUE;
2745+
2746+ if ((PEDR & PWER_GPIO1)) {
2747+ /* button pressed */
2748+ /* clear pending event to avoid interrupt*/
2749+ PEDR &= ~PWER_GPIO1;
2750+ GEDR0 &= ~GPIO_bit(1);
2751+
2752+ ret = 0;
2753+ }
2754+ else if ((PEDR & PWER_RTC)) {
2755+ PEDR &= ~PWER_RTC;
2756+ pr_debug("%s: timer alarm\n", __FUNCTION__);
2757+ em_x270_check_charger_state(the_charger);
2758+ ret = 1;
2759+ }
2760+ else if ((PEDR & PWER_GPIO0)) {
2761+ PEDR &= ~PWER_GPIO0;
2762+ GEDR0 &= ~GPIO_bit(0);
2763+
2764+ /* we woke up because of DA9030 event */
2765+ do {
2766+ status = the_charger->ops->da9030_get_reg(STATUS);
2767+ udelay(1000);
2768+ } while (status < 0 && retry--);
2769+
2770+ the_charger->da9030_status = status;
2771+ event_a = the_charger->ops->da9030_get_reg(EVENT_A);
2772+ event_b = the_charger->ops->da9030_get_reg(EVENT_B);
2773+
2774+ pr_info("%s: DA9030 wakeup: status: %x, ev_a: %x, ev_b: %x\n",
2775+ __FUNCTION__, the_charger->da9030_status,
2776+ event_a, event_b);
2777+
2778+/* if ((the_charger->da9030_status & STATUS_CHDET)) { */
2779+ if (event_a & EVENT_A_CHDET) {
2780+ pr_info("%s: EVENT_A_CHDET\n", __FUNCTION__);
2781+ em_x270_check_charger_state(the_charger);
2782+ }
2783+ else {
2784+ pr_info("%s: What the hell?\n", __FUNCTION__);
2785+ }
2786+
2787+ ret = 1;
2788+ }
2789+ else {
2790+ /* wake up is not DA9030, so continue and let battery
2791+ driver check the charger state */
2792+ ret = 0;
2793+ }
2794+
2795+ /* get back to sleep */
2796+ if (ret)
2797+ em_x270_goto_sleep(PM_SUSPEND_MEM, alarm_time, alarm_enable);
2798+
2799+ return ret;
2800+}
2801+
2802+static int em_x270_pm_enter(suspend_state_t state)
2803+{
2804+ unsigned long alarm_time = RTAR;
2805+ unsigned int alarm_status = ((RTSR & RTSR_ALE) != 0);
2806+
2807+ /* pre-suspend */
2808+ pr_info("suspending emma\n");
2809+ pxa_gpio_mode(38 | GPIO_OUT | GPIO_DFLT_HIGH);
2810+
2811+ em_x270_goto_sleep(state, alarm_time, alarm_status);
2812+
2813+ /* check if we were resumed because of charger events */
2814+ while (em_x270_enter_suspend(alarm_time, alarm_status))
2815+ {}
2816+
2817+ /* make sure power I2C state is consistent */
2818+ PWRICR &= ~ICR_IUE;
2819+
2820+ /* resume */
2821+ pr_info("emma is resumed\n");
2822+ the_charger->ops = &em_x270_charger_ops;
2823+
2824+ return 0;
2825+}
2826+
2827+static struct pm_ops em_x270_pm_ops = {
2828+ .enter = em_x270_pm_enter,
2829+ .valid = pm_valid_only_mem,
2830+};
2831+
2832+static int em_x270_pm_init(void)
2833+{
2834+ int ret;
2835+ pm_set_ops(&em_x270_pm_ops);
2836+
2837+ set_irq_type(IRQ_GPIO(1), IRQT_RISING);
2838+
2839+ ret = platform_driver_register(&em_x270_battery_driver);
2840+ if (ret)
2841+ return ret;
2842+
2843+ ret = request_irq(IRQ_GPIO(1), em_x270_suspend_irq, IRQF_DISABLED,
2844+ "suspend button", 0);
2845+ if (ret) {
2846+ platform_driver_unregister(&em_x270_battery_driver);
2847+ }
2848+
2849+ return ret;
2850+}
2851+
2852+static void em_x270_pm_exit(void)
2853+{
2854+ free_irq(IRQ_GPIO(1), em_x270_suspend_irq);
2855+ platform_driver_unregister(&em_x270_battery_driver);
2856+}
2857+
2858+/* make sure I2C is already running */
2859+late_initcall(em_x270_pm_init);
2860+module_exit(em_x270_pm_exit);
2861+
2862+MODULE_DESCRIPTION("EM-X270 power manager");
2863+MODULE_AUTHOR("Mike Rapoport");
2864+MODULE_LICENSE("GPL");
2865diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
2866index 3d0ad50..402d792 100644
2867--- a/arch/arm/mach-pxa/em-x270.c
2868+++ b/arch/arm/mach-pxa/em-x270.c
2869@@ -18,20 +18,26 @@
2870 #include <linux/mtd/nand.h>
2871 #include <linux/mtd/partitions.h>
2872
2873-#include <asm/mach-types.h>
2874+#include <linux/i2c.h>
2875+#include <linux/input.h>
2876
2877+#include <asm/mach-types.h>
2878 #include <asm/mach/arch.h>
2879
2880 #include <asm/arch/pxa-regs.h>
2881 #include <asm/arch/pxafb.h>
2882 #include <asm/arch/ohci.h>
2883 #include <asm/arch/mmc.h>
2884+#include <asm/arch/pxa27x_keyboard.h>
2885 #include <asm/arch/bitfield.h>
2886
2887+#include <asm/arch/udc.h>
2888+
2889+#include <asm/arch/sharpsl.h>
2890+
2891 #include "generic.h"
2892
2893 /* GPIO IRQ usage */
2894-#define EM_X270_MMC_PD (105)
2895 #define EM_X270_ETHIRQ IRQ_GPIO(41)
2896 #define EM_X270_MMC_IRQ IRQ_GPIO(13)
2897
2898@@ -213,6 +219,68 @@ static struct platform_device em_x270_nand = {
2899 }
2900 };
2901
2902+/* DA9030 */
2903+static struct i2c_board_info em_x270_pmic_info = {
2904+ .driver_name = "da9030",
2905+ .type = "pmic",
2906+ .addr = 0x49,
2907+ .irq = IRQ_GPIO(0),
2908+};
2909+
2910+/* Keypad */
2911+/* The Demo KeyPad has the following mapping:
2912+ * (0,0) (1,2) (2,1)
2913+ * (0,2) (1,1) (2,0)
2914+ * (0,1) (1,0) (2,2)
2915+ */
2916+static struct pxa27x_keyboard_platform_data em_x270_kbd = {
2917+ .nr_rows = 3,
2918+ .nr_cols = 3,
2919+ .keycodes = {
2920+ { /* row 0 */
2921+ -1,
2922+ -1,
2923+ KEY_LEFT,
2924+ },
2925+ { /* row 1 */
2926+ KEY_UP,
2927+ KEY_ENTER,
2928+ KEY_DOWN
2929+ },
2930+ { /* row 2 */
2931+ KEY_RIGHT,
2932+ -1,
2933+ -1
2934+ },
2935+ },
2936+ .gpio_modes = {
2937+ (100 | GPIO_ALT_FN_1_IN),
2938+ (101 | GPIO_ALT_FN_1_IN),
2939+ (102 | GPIO_ALT_FN_1_IN),
2940+ (103 | GPIO_ALT_FN_2_OUT),
2941+ (104 | GPIO_ALT_FN_2_OUT),
2942+ (105 | GPIO_ALT_FN_2_OUT),
2943+ },
2944+};
2945+
2946+static struct platform_device em_x270_pxa_keypad = {
2947+ .name = "pxa27x-keyboard",
2948+ .id = -1,
2949+ .dev = {
2950+ .platform_data = &em_x270_kbd,
2951+ },
2952+};
2953+
2954+static struct platform_device em_x270_battery_device = {
2955+ .name = "em-x270-battery",
2956+ .id = -1,
2957+};
2958+
2959+static struct platform_device em_x270_led_device = {
2960+ .name = "em-x270-led",
2961+ .id = -1,
2962+};
2963+
2964 /* platform devices */
2965 static struct platform_device *platform_devices[] __initdata = {
2966 &em_x270_dm9k,
2967@@ -220,6 +288,9 @@ static struct platform_device *platform_devices[] __initdata = {
2968 &em_x270_ts,
2969 &em_x270_rtc,
2970 &em_x270_nand,
2971+ &em_x270_pxa_keypad,
2972+ &em_x270_battery_device,
2973+ &em_x270_led_device,
2974 };
2975
2976
2977@@ -241,6 +312,33 @@ static struct pxaohci_platform_data em_x270_ohci_platform_data = {
2978 .init = em_x270_ohci_init,
2979 };
2980
2981+/*
2982+ * USB Client (Gadget/UDC)
2983+ */
2984+static void em_x270_udc_command(int cmd)
2985+{
2986+ switch(cmd) {
2987+ case PXA2XX_UDC_CMD_CONNECT:
2988+ UP2OCR = UP2OCR_HXOE | UP2OCR_DMPUE | UP2OCR_DMPUBE;
2989+ break;
2990+ case PXA2XX_UDC_CMD_DISCONNECT:
2991+/* UP2OCR = UP2OCR_HXS | UP2OCR_HXOE; */
2992+ //UP2OCR = UP2OCR_HXOE | UP2OCR_DMPUE | UP2OCR_DMPUBE;
2993+ break;
2994+ }
2995+}
2996+
2997+static int em_x270_udc_detect(void)
2998+{
2999+ return 1;
3000+}
3001+
3002+static struct pxa2xx_udc_mach_info em_x270_udc_info __initdata = {
3003+ .udc_is_connected = em_x270_udc_detect,
3004+ .udc_command = em_x270_udc_command,
3005+};
3006+
3007+
3008
3009 static int em_x270_mci_init(struct device *dev,
3010 irq_handler_t em_x270_detect_int,
3011@@ -256,9 +354,6 @@ static int em_x270_mci_init(struct device *dev,
3012 pxa_gpio_mode(GPIO110_MMCDAT2_MD);
3013 pxa_gpio_mode(GPIO111_MMCDAT3_MD);
3014
3015- /* EM-X270 uses GPIO13 as SD power enable */
3016- pxa_gpio_mode(EM_X270_MMC_PD | GPIO_OUT);
3017-
3018 err = request_irq(EM_X270_MMC_IRQ, em_x270_detect_int,
3019 IRQF_DISABLED | IRQF_TRIGGER_FALLING,
3020 "MMC card detect", data);
3021@@ -313,12 +408,19 @@ static struct pxafb_mach_info em_x270_lcd = {
3022 .num_modes = 1,
3023 .cmap_inverse = 0,
3024 .cmap_static = 0,
3025- .lccr0 = LCCR0_PAS,
3026- .lccr3 = LCCR3_PixClkDiv(0x01) | LCCR3_Acb(0xff),
3027+
3028+ .lccr0 = LCCR0_Act,
3029+ .lccr3 = LCCR3_PixFlEdg,
3030 };
3031
3032 static void __init em_x270_init(void)
3033 {
3034+ /* register PMIC */
3035+ i2c_register_board_info(1, &em_x270_pmic_info, 1);
3036+
3037+ /* setup DA9030 irq */
3038+ set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
3039+
3040 /* setup LCD */
3041 set_pxa_fb_info(&em_x270_lcd);
3042
3043@@ -329,6 +431,8 @@ static void __init em_x270_init(void)
3044 pxa_set_mci_info(&em_x270_mci_platform_data);
3045 pxa_set_ohci_info(&em_x270_ohci_platform_data);
3046
3047+ pxa_set_udc_info(&em_x270_udc_info);
3048+
3049 /* setup STUART GPIOs */
3050 pxa_gpio_mode(GPIO46_STRXD_MD);
3051 pxa_gpio_mode(GPIO47_STTXD_MD);
3052@@ -341,9 +445,16 @@ static void __init em_x270_init(void)
3053
3054 /* Setup interrupt for dm9000 */
3055 set_irq_type(EM_X270_ETHIRQ, IRQT_RISING);
3056+
3057+ PCFR = 0x6;
3058+ PSLR = 0xff400000;
3059+ PMCR = 0x00000005;
3060+ PWER = 0x80000003;
3061+ PFER = 0x00000003;
3062+ PRER = 0x00000000;
3063 }
3064
3065-MACHINE_START(EM_X270, "Compulab EM-x270")
3066+MACHINE_START(EM_X270, "Compulab EM-X270")
3067 .boot_params = 0xa0000100,
3068 .phys_io = 0x40000000,
3069 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
3070diff --git a/arch/arm/mach-pxa/pwr-i2c.c b/arch/arm/mach-pxa/pwr-i2c.c
3071new file mode 100644
3072index 0000000..8a501c4
3073--- /dev/null
3074+++ b/arch/arm/mach-pxa/pwr-i2c.c
3075@@ -0,0 +1,539 @@
3076+/*
3077+ * (C) Copyrihgt 2007 CompuLab, Ltd.
3078+ * Mike Rapoport <mike@compulab.co.il>
3079+ * Adaptation of U-Boot I2C driver for PXA.
3080+ *
3081+ * (C) Copyright 2000
3082+ * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
3083+ *
3084+ * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
3085+ * Marius Groeger <mgroeger@sysgo.de>
3086+ *
3087+ * (C) Copyright 2003 Pengutronix e.K.
3088+ * Robert Schwebel <r.schwebel@pengutronix.de>
3089+ *
3090+ * See file CREDITS for list of people who contributed to this
3091+ * project.
3092+ *
3093+ * This program is free software; you can redistribute it and/or
3094+ * modify it under the terms of the GNU General Public License as
3095+ * published by the Free Software Foundation; either version 2 of
3096+ * the License, or (at your option) any later version.
3097+ *
3098+ * This program is distributed in the hope that it will be useful,
3099+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
3100+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3101+ * GNU General Public License for more details.
3102+ *
3103+ * You should have received a copy of the GNU General Public License
3104+ * along with this program; if not, write to the Free Software
3105+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
3106+ * MA 02111-1307 USA
3107+ *
3108+ * Back ported to the 8xx platform (from the 8260 platform) by
3109+ * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
3110+ */
3111+
3112+/* #define DEBUG */
3113+
3114+#include <linux/kernel.h>
3115+#include <linux/delay.h>
3116+#include <linux/module.h>
3117+#include <linux/jiffies.h>
3118+
3119+#include <asm/arch/hardware.h>
3120+#include <asm/arch/pxa-regs.h>
3121+#include <asm/arch/pwr-i2c.h>
3122+
3123+#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
3124+#define I2C_ISR_INIT 0x7FF
3125+
3126+/* Shall the current transfer have a start/stop condition? */
3127+#define I2C_COND_NORMAL 0
3128+#define I2C_COND_START 1
3129+#define I2C_COND_STOP 2
3130+
3131+/* Shall the current transfer be ack/nacked or being waited for it? */
3132+#define I2C_ACKNAK_WAITACK 1
3133+#define I2C_ACKNAK_SENDACK 2
3134+#define I2C_ACKNAK_SENDNAK 4
3135+
3136+/* Specify who shall transfer the data (master or slave) */
3137+#define I2C_READ 0
3138+#define I2C_WRITE 1
3139+
3140+/* All transfers are described by this data structure */
3141+struct i2c_msg {
3142+ u8 condition;
3143+ u8 acknack;
3144+ u8 direction;
3145+ u8 data;
3146+};
3147+
3148+/**
3149+ * pxa_pwr_i2c_transfer: - reset the host controller
3150+ *
3151+ */
3152+/* static void pxa_pwr_i2c_reset(void) */
3153+/* { */
3154+/* int i; */
3155+
3156+/* /\* CKEN |= CKEN_PWRI2C; *\/ */
3157+/* /\* PWRICR |= PCFR_PI2C_EN; *\/ */
3158+
3159+/* /\* /\\* delay 250ms *\\/ *\/ */
3160+/* /\* for (i = 0; i < 250; i++) *\/ */
3161+/* /\* udelay(1000); *\/ */
3162+
3163+/* /\* PWRICR &= ~(ICR_MA | ICR_START | ICR_STOP); *\/ */
3164+/* /\* PWRICR |= ICR_UR; *\/ */
3165+/* /\* PWRISR = 0x7ff; *\/ */
3166+
3167+/* /\* PWRICR &= ~ICR_UR; *\/ */
3168+/* /\* PWRICR = ICR_GCD | ICR_SCLE; *\/ */
3169+/* /\* PWRICR |= ICR_IUE; *\/ */
3170+/* /\* PWRICR |= 0x8000; *\/ */
3171+
3172+/* /\* udelay(1000); *\/ */
3173+
3174+/* return; */
3175+
3176+/* PWRICR &= ~ICR_IUE; /\* disable unit *\/ */
3177+/* PWRICR |= ICR_UR; /\* reset the unit *\/ */
3178+/* udelay(100); */
3179+/* PWRICR &= ~ICR_IUE; /\* disable unit *\/ */
3180+
3181+/* CKEN |= CKEN_PWRI2C; */
3182+/* PCFR |= PCFR_PI2C_EN; */
3183+
3184+/* PWRICR = I2C_ICR_INIT; /\* set control register values *\/ */
3185+/* PWRISR = I2C_ISR_INIT; /\* set clear interrupt bits *\/ */
3186+/* PWRICR |= ICR_IUE; /\* enable unit *\/ */
3187+/* udelay(100); */
3188+/* } */
3189+
3190+static void pwr_i2c_abort()
3191+{
3192+ unsigned long timeout = 250000;
3193+ unsigned long time = 0;
3194+
3195+ while ((time < timeout) && (PWRIBMR & 0x1) == 0) {
3196+ unsigned long icr = PWRICR;
3197+
3198+ icr &= ~ICR_START;
3199+ icr |= ICR_ACKNAK | ICR_STOP | ICR_TB;
3200+
3201+ PWRICR = icr;
3202+
3203+ udelay(1000);
3204+ time += 1000;
3205+ }
3206+
3207+ PWRICR &= ~(ICR_MA | ICR_START | ICR_STOP);
3208+}
3209+
3210+static void pxa_pwr_i2c_reset(void)
3211+{
3212+ pr_debug("Resetting I2C Controller Unit\n");
3213+
3214+ /* abort any transfer currently under way */
3215+ pwr_i2c_abort();
3216+
3217+ /* reset according to 9.8 */
3218+ PWRICR = ICR_UR;
3219+ PWRISR = I2C_ISR_INIT;
3220+ PWRISR &= ~ICR_UR;
3221+
3222+ /* set control register values */
3223+ PWRICR = I2C_ICR_INIT;
3224+
3225+ /* enable unit */
3226+ PWRICR |= ICR_IUE;
3227+ udelay(100);
3228+
3229+/* CKEN |= CKEN_PWRI2C; */
3230+/* PCFR |= PCFR_PI2C_EN; */
3231+}
3232+
3233+/**
3234+ * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
3235+ * are set and cleared
3236+ *
3237+ * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
3238+ */
3239+static int pxa_pwr_i2c_isr_set_cleared(unsigned long set_mask,
3240+ unsigned long cleared_mask)
3241+{
3242+ int timeout = 10000;
3243+
3244+ while (((PWRISR & set_mask) != set_mask)
3245+ || ((PWRISR & cleared_mask) != 0)) {
3246+ udelay(10);
3247+ if (timeout-- < 0)
3248+ return 0;
3249+ }
3250+
3251+ return 1;
3252+}
3253+
3254+/**
3255+ * pxa_pwr_i2c_transfer: - Transfer one byte over the i2c bus
3256+ *
3257+ * This function can tranfer a byte over the i2c bus in both directions.
3258+ * It is used by the public API functions.
3259+ *
3260+ * @return: 0: transfer successful
3261+ * -EINVAL: message is empty
3262+ * -ETIMEDOUT: transmit timeout
3263+ * -E: ACK missing
3264+ * -ETIMEDOUT: receive timeout
3265+ * -EINVAL: illegal parameters
3266+ * -EBUSY: bus is busy and couldn't be aquired
3267+ */
3268+int pxa_pwr_i2c_transfer(struct i2c_msg *msg)
3269+{
3270+ int ret;
3271+
3272+ if (!msg)
3273+ goto transfer_error_msg_empty;
3274+
3275+ switch (msg->direction) {
3276+ case I2C_WRITE:
3277+ /* check if bus is not busy */
3278+/* if (!pxa_pwr_i2c_isr_set_cleared(0, (ISR_IBB | ISR_UB))) */
3279+/* goto transfer_error_bus_busy; */
3280+
3281+ /* start transmission */
3282+ PWRICR &= ~ICR_START;
3283+ PWRICR &= ~ICR_STOP;
3284+ PWRIDBR = msg->data;
3285+ if (msg->condition == I2C_COND_START)
3286+ PWRICR |= ICR_START;
3287+ if (msg->condition == I2C_COND_STOP)
3288+ PWRICR |= ICR_STOP;
3289+ if (msg->acknack == I2C_ACKNAK_SENDNAK)
3290+ PWRICR |= ICR_ACKNAK;
3291+ if (msg->acknack == I2C_ACKNAK_SENDACK)
3292+ PWRICR &= ~ICR_ACKNAK;
3293+ PWRICR &= ~ICR_ALDIE;
3294+ PWRICR |= ICR_TB;
3295+
3296+ /* transmit register empty? */
3297+ if (!pxa_pwr_i2c_isr_set_cleared(ISR_ITE, 0))
3298+ goto transfer_error_transmit_timeout;
3299+
3300+ /* clear 'transmit empty' state */
3301+ PWRISR |= ISR_ITE;
3302+
3303+ /* wait for ACK from slave */
3304+ if (msg->acknack == I2C_ACKNAK_WAITACK)
3305+ if (!pxa_pwr_i2c_isr_set_cleared(0, ISR_ACKNAK))
3306+ goto transfer_error_ack_missing;
3307+ break;
3308+ case I2C_READ:
3309+ /* check if bus is not busy */
3310+/* if (!pxa_pwr_i2c_isr_set_cleared(0, ISR_IBB)) */
3311+/* goto transfer_error_bus_busy; */
3312+
3313+ /* start receive */
3314+ PWRICR &= ~ICR_START;
3315+ PWRICR &= ~ICR_STOP;
3316+ if (msg->condition == I2C_COND_START)
3317+ PWRICR |= ICR_START;
3318+ if (msg->condition == I2C_COND_STOP)
3319+ PWRICR |= ICR_STOP;
3320+ if (msg->acknack == I2C_ACKNAK_SENDNAK)
3321+ PWRICR |= ICR_ACKNAK;
3322+ if (msg->acknack == I2C_ACKNAK_SENDACK)
3323+ PWRICR &= ~ICR_ACKNAK;
3324+ PWRICR &= ~ICR_ALDIE;
3325+ PWRICR |= ICR_TB;
3326+
3327+ /* receive register full? */
3328+ if (!pxa_pwr_i2c_isr_set_cleared(ISR_IRF, 0))
3329+ goto transfer_error_receive_timeout;
3330+
3331+ msg->data = PWRIDBR;
3332+
3333+ /* clear 'receive empty' state */
3334+ PWRISR |= ISR_IRF;
3335+
3336+ break;
3337+ default:
3338+ goto transfer_error_illegal_param;
3339+
3340+ }
3341+
3342+ return 0;
3343+
3344+transfer_error_msg_empty:
3345+ pr_debug("%s: error: 'msg' is empty\n", __FUNCTION__);
3346+ ret = -1;
3347+ goto i2c_transfer_finish;
3348+
3349+transfer_error_transmit_timeout:
3350+ pr_debug("%s: error: transmit timeout\n", __FUNCTION__);
3351+ ret = -2;
3352+ goto i2c_transfer_finish;
3353+
3354+transfer_error_ack_missing:
3355+ pr_debug("%s: error: ACK missing\n", __FUNCTION__);
3356+ ret = -3;
3357+ goto i2c_transfer_finish;
3358+
3359+transfer_error_receive_timeout:
3360+ pr_debug("%s: error: receive timeout\n", __FUNCTION__);
3361+ ret = -4;
3362+ goto i2c_transfer_finish;
3363+
3364+transfer_error_illegal_param:
3365+ pr_debug("%s: error: illegal parameters\n", __FUNCTION__);
3366+ ret = -5;
3367+ goto i2c_transfer_finish;
3368+
3369+transfer_error_bus_busy:
3370+ pr_debug("%s: error: bus is busy\n", __FUNCTION__);
3371+ ret = -6;
3372+ goto i2c_transfer_finish;
3373+
3374+i2c_transfer_finish:
3375+ pr_debug("%s: ISR: 0x%04x\n", __FUNCTION__, ISR);
3376+ return ret;
3377+}
3378+
3379+/* ------------------------------------------------------------------------ */
3380+/* API Functions */
3381+/* ------------------------------------------------------------------------ */
3382+/**
3383+ * i2c_probe: - Test if a chip answers for a given i2c address
3384+ *
3385+ * @chip: address of the chip which is searched for
3386+ * @return: 0 if a chip was found, -1 otherwhise
3387+ */
3388+int pxa_pwr_i2c_probe(u8 chip)
3389+{
3390+ struct i2c_msg msg;
3391+ int ret;
3392+
3393+ pxa_pwr_i2c_reset();
3394+
3395+ msg.condition = I2C_COND_START;
3396+ msg.acknack = I2C_ACKNAK_WAITACK;
3397+ msg.direction = I2C_WRITE;
3398+ msg.data = (chip << 1) + 1;
3399+ if ((ret = pxa_pwr_i2c_transfer(&msg)))
3400+ return ret;
3401+
3402+ msg.condition = I2C_COND_STOP;
3403+ msg.acknack = I2C_ACKNAK_SENDNAK;
3404+ msg.direction = I2C_READ;
3405+ msg.data = 0x00;
3406+ if ((ret = pxa_pwr_i2c_transfer(&msg)))
3407+ return ret;
3408+
3409+ return 0;
3410+}
3411+
3412+/**
3413+ * i2c_read: - Read multiple bytes from an i2c device
3414+ *
3415+ * The higher level routines take into account that this function is only
3416+ * called with len < page length of the device (see configuration file)
3417+ *
3418+ * @chip: address of the chip which is to be read
3419+ * @addr: i2c data address within the chip
3420+ * @alen: length of the i2c data address (1..2 bytes)
3421+ * @buffer: where to write the data
3422+ * @len: how much byte do we want to read
3423+ * @return: 0 in case of success
3424+ */
3425+int pxa_pwr_i2c_read(u8 chip, uint addr, int alen, u8 * buffer, int len)
3426+{
3427+ struct i2c_msg msg;
3428+ u8 addr_bytes[3]; /* lowest...highest byte of data address */
3429+ int ret;
3430+
3431+ pr_debug("%s(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",
3432+ __FUNCTION__, chip, addr, alen, len);
3433+
3434+ pxa_pwr_i2c_reset();
3435+
3436+ /* dummy chip address write */
3437+ pr_debug("%s: dummy chip address write\n", __FUNCTION__);
3438+ msg.condition = I2C_COND_START;
3439+ msg.acknack = I2C_ACKNAK_WAITACK;
3440+ msg.direction = I2C_WRITE;
3441+ msg.data = (chip << 1);
3442+ msg.data &= 0xFE;
3443+ if ((ret = pxa_pwr_i2c_transfer(&msg)))
3444+ return ret;
3445+
3446+ /*
3447+ * send memory address bytes;
3448+ * alen defines how much bytes we have to send.
3449+ */
3450+ /*addr &= ((1 << CFG_EEPROM_PAGE_WRITE_BITS)-1); */
3451+ addr_bytes[0] = (u8) ((addr >> 0) & 0x000000FF);
3452+ addr_bytes[1] = (u8) ((addr >> 8) & 0x000000FF);
3453+ addr_bytes[2] = (u8) ((addr >> 16) & 0x000000FF);
3454+
3455+ while (--alen >= 0) {
3456+ pr_debug("%s: send memory word address byte %1d\n",
3457+ __FUNCTION__, alen);
3458+ msg.condition = I2C_COND_NORMAL;
3459+ msg.acknack = I2C_ACKNAK_WAITACK;
3460+ msg.direction = I2C_WRITE;
3461+ msg.data = addr_bytes[alen];
3462+ if ((ret = pxa_pwr_i2c_transfer(&msg)))
3463+ return ret;
3464+ }
3465+
3466+ /* start read sequence */
3467+ pr_debug("%s: start read sequence\n", __FUNCTION__);
3468+ msg.condition = I2C_COND_START;
3469+ msg.acknack = I2C_ACKNAK_WAITACK;
3470+ msg.direction = I2C_WRITE;
3471+ msg.data = (chip << 1);
3472+ msg.data |= 0x01;
3473+ if ((ret = pxa_pwr_i2c_transfer(&msg)))
3474+ return ret;
3475+
3476+ /* read bytes; send NACK at last byte */
3477+ while (len--) {
3478+ if (len == 0) {
3479+ msg.condition = I2C_COND_STOP;
3480+ msg.acknack = I2C_ACKNAK_SENDNAK;
3481+ } else {
3482+ msg.condition = I2C_COND_NORMAL;
3483+ msg.acknack = I2C_ACKNAK_SENDACK;
3484+ }
3485+
3486+ msg.direction = I2C_READ;
3487+ msg.data = 0x00;
3488+ if ((ret = pxa_pwr_i2c_transfer(&msg)))
3489+ return ret;
3490+
3491+ *buffer = msg.data;
3492+ pr_debug("%s: reading byte (0x%08x)=0x%02x\n",
3493+ __FUNCTION__, (unsigned int)buffer, *buffer);
3494+ buffer++;
3495+ }
3496+
3497+ pxa_pwr_i2c_reset();
3498+ return 0;
3499+}
3500+
3501+/**
3502+ * i2c_write: - Write multiple bytes to an i2c device
3503+ *
3504+ * The higher level routines take into account that this function is only
3505+ * called with len < page length of the device (see configuration file)
3506+ *
3507+ * @chip: address of the chip which is to be written
3508+ * @addr: i2c data address within the chip
3509+ * @alen: length of the i2c data address (1..2 bytes)
3510+ * @buffer: where to find the data to be written
3511+ * @len: how much byte do we want to read
3512+ * @return: 0 in case of success
3513+ */
3514+int pxa_pwr_i2c_write(u8 chip, uint addr, int alen, u8 * buffer, int len)
3515+{
3516+ struct i2c_msg msg;
3517+ u8 addr_bytes[3]; /* lowest...highest byte of data address */
3518+ int ret;
3519+
3520+ pr_debug("%s(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",
3521+ __FUNCTION__, chip, addr, alen, len);
3522+
3523+ pxa_pwr_i2c_reset();
3524+
3525+ /* chip address write */
3526+ pr_debug("%s: chip address write\n", __FUNCTION__);
3527+ msg.condition = I2C_COND_START;
3528+ msg.acknack = I2C_ACKNAK_WAITACK;
3529+ msg.direction = I2C_WRITE;
3530+ msg.data = (chip << 1);
3531+ msg.data &= 0xFE;
3532+ if ((ret = pxa_pwr_i2c_transfer(&msg)))
3533+ return ret;
3534+
3535+ /*
3536+ * send memory address bytes;
3537+ * alen defines how much bytes we have to send.
3538+ */
3539+ addr_bytes[0] = (u8) ((addr >> 0) & 0x000000FF);
3540+ addr_bytes[1] = (u8) ((addr >> 8) & 0x000000FF);
3541+ addr_bytes[2] = (u8) ((addr >> 16) & 0x000000FF);
3542+
3543+ while (--alen >= 0) {
3544+ pr_debug("%s: send memory word address\n", __FUNCTION__);
3545+ msg.condition = I2C_COND_NORMAL;
3546+ msg.acknack = I2C_ACKNAK_WAITACK;
3547+ msg.direction = I2C_WRITE;
3548+ msg.data = addr_bytes[alen];
3549+ if ((ret = pxa_pwr_i2c_transfer(&msg)))
3550+ return ret;
3551+ }
3552+
3553+ /* write bytes; send NACK at last byte */
3554+ while (len--) {
3555+ pr_debug("%s: writing byte (0x%08x)=0x%02x\n",
3556+ __FUNCTION__, (unsigned int)buffer, *buffer);
3557+
3558+ if (len == 0)
3559+ msg.condition = I2C_COND_STOP;
3560+ else
3561+ msg.condition = I2C_COND_NORMAL;
3562+
3563+ msg.acknack = I2C_ACKNAK_WAITACK;
3564+ msg.direction = I2C_WRITE;
3565+ msg.data = *(buffer++);
3566+
3567+ if ((ret = pxa_pwr_i2c_transfer(&msg)))
3568+ return ret;
3569+ }
3570+
3571+ pxa_pwr_i2c_reset();
3572+ return 0;
3573+}
3574+
3575+/**
3576+ * pxa_pwr_i2c_reg_read: - Read single byte from an i2c device
3577+ *
3578+ * @chip: address of the chip which is to be read
3579+ * @reg: i2c data address within the chip
3580+ * @return: data in case of success, negative error code otherwise
3581+ */
3582+s32 pxa_pwr_i2c_reg_read(u8 chip, u8 reg)
3583+{
3584+ char buf;
3585+ int ret;
3586+
3587+ pr_debug("%s(chip=0x%02x, reg=0x%02x)\n", __FUNCTION__, chip, reg);
3588+ ret = pxa_pwr_i2c_read(chip, reg, 1, &buf, 1);
3589+ if (ret == 0)
3590+ ret = buf;
3591+
3592+ return ret;
3593+}
3594+
3595+/**
3596+ * pxa_pwr_i2c_reg_write: - Write multiple bytes to an i2c device
3597+ *
3598+ * The higher level routines take into account that this function is only
3599+ * called with len < page length of the device (see configuration file)
3600+ *
3601+ * @chip: address of the chip which is to be written
3602+ * @reg: i2c data address within the chip
3603+ * @return: 0 in case of success, negative error code otherwise
3604+ */
3605+s32 pxa_pwr_i2c_reg_write(u8 chip, u8 reg, u8 val)
3606+{
3607+ pr_debug("%s(chip=0x%02x, reg=0x%02x, val=0x%02x)\n",
3608+ __FUNCTION__, chip, reg, val);
3609+ return pxa_pwr_i2c_write(chip, reg, 1, &val, 1);
3610+}
3611+
3612+MODULE_DESCRIPTION("PXA Power I2C");
3613+MODULE_AUTHOR("Mike Rapoport");
3614+MODULE_LICENSE("GPL");
3615diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
3616index 203371a..36b695f 100644
3617--- a/arch/arm/mach-pxa/pxa27x.c
3618+++ b/arch/arm/mach-pxa/pxa27x.c
3619@@ -243,7 +243,11 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
3620 case PM_SUSPEND_MEM:
3621 /* set resume return address */
3622 PSPR = virt_to_phys(pxa_cpu_resume);
3623- pxa27x_cpu_suspend(PWRMODE_SLEEP);
3624+#ifdef CONFIG_MACH_EM_X270
3625+ pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP);
3626+#else
3627+ pxa27x_cpu_suspend(PWRMODE_SLEEP);
3628+#endif
3629 break;
3630 }
3631 }
3632diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
3633index bae47e1..a16e532 100644
3634--- a/arch/arm/mach-pxa/spitz.c
3635+++ b/arch/arm/mach-pxa/spitz.c
3636@@ -349,6 +349,32 @@ static struct pxamci_platform_data spitz_mci_platform_data = {
3637
3638
3639 /*
3640+ * USB Client (Gadget/UDC)
3641+ */
3642+static void spitz_udc_command(int cmd)
3643+{
3644+ switch(cmd) {
3645+ case PXA2XX_UDC_CMD_CONNECT:
3646+ UP2OCR = UP2OCR_HXOE | UP2OCR_DMPUE | UP2OCR_DMPUBE;
3647+ break;
3648+ case PXA2XX_UDC_CMD_DISCONNECT:
3649+ //UP2OCR = UP2OCR_HXOE | UP2OCR_DMPUE | UP2OCR_DMPUBE;
3650+ break;
3651+ }
3652+}
3653+
3654+static int spitz_udc_detect(void)
3655+{
3656+ return 1;
3657+}
3658+
3659+static struct pxa2xx_udc_mach_info spitz_udc_info __initdata = {
3660+ .udc_is_connected = spitz_udc_detect,
3661+ .udc_command = spitz_udc_command,
3662+};
3663+
3664+
3665+/*
3666 * USB Host (OHCI)
3667 */
3668 static int spitz_ohci_init(struct device *dev)
3669@@ -499,6 +525,7 @@ static void __init common_init(void)
3670 pxa_gpio_mode(SPITZ_GPIO_HSYNC | GPIO_IN);
3671
3672 platform_add_devices(devices, ARRAY_SIZE(devices));
3673+ pxa_set_udc_info(&spitz_udc_info);
3674 pxa_set_mci_info(&spitz_mci_platform_data);
3675 pxa_set_ohci_info(&spitz_ohci_platform_data);
3676 pxa_set_ficp_info(&spitz_ficp_platform_data);
3677diff --git a/drivers/i2c/chips/Kconfig b/drivers/i2c/chips/Kconfig
3678index 2e1c24f..f80f2b1 100644
3679--- a/drivers/i2c/chips/Kconfig
3680+++ b/drivers/i2c/chips/Kconfig
3681@@ -163,4 +163,17 @@ config MENELAUS
3682 and other features that are often used in portable devices like
3683 cell phones and PDAs.
3684
3685+config DA9030
3686+ tristate "Dialog Semiconductor DA9030 power management chip"
3687+ depends on EXPERIMENTAL && EMBEDDED
3688+ help
3689+ If you say yes here you get support for the Dialog
3690+ Semiconductor DA9030 power management chip.
3691+ This includes voltage regulators, lithium ion/polymer battery
3692+ charging, and other features that are often used in portable
3693+ devices like PDAs, cell phones and cameras.
3694+
3695+ This driver can also be built as a module. If so, the module
3696+ will be called da9030.
3697+
3698 endmenu
3699diff --git a/drivers/i2c/chips/Makefile b/drivers/i2c/chips/Makefile
3700index ca924e1..69f545c 100644
3701--- a/drivers/i2c/chips/Makefile
3702+++ b/drivers/i2c/chips/Makefile
3703@@ -15,6 +15,7 @@ obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o
3704 obj-$(CONFIG_TPS65010) += tps65010.o
3705 obj-$(CONFIG_MENELAUS) += menelaus.o
3706 obj-$(CONFIG_SENSORS_TSL2550) += tsl2550.o
3707+obj-$(CONFIG_DA9030) += da9030.o
3708
3709 ifeq ($(CONFIG_I2C_DEBUG_CHIP),y)
3710 EXTRA_CFLAGS += -DDEBUG
3711diff --git a/drivers/i2c/chips/da9030.c b/drivers/i2c/chips/da9030.c
3712new file mode 100644
3713index 0000000..9791272
3714--- /dev/null
3715+++ b/drivers/i2c/chips/da9030.c
3716@@ -0,0 +1,1213 @@
3717+/*
3718+ * Dialog Semiconductor DA9030 power management IC driver
3719+ *
3720+ * Copyright (C) 2007 Compulab, Ltd.
3721+ * Mike Rapoport <mike@compulab.co.il>
3722+ *
3723+ * Some parts based on menelaus.c:
3724+ * Copyright (C) 2004 Texas Instruments, Inc.
3725+ * Copyright (C) 2005, 2006 Nokia Corporation
3726+ *
3727+ * This file is subject to the terms and conditions of the GNU General Public
3728+ * License. See the file COPYING in the main directory of this archive for
3729+ * more details.
3730+ */
3731+
3732+#include <linux/module.h>
3733+#include <linux/ctype.h>
3734+#include <linux/uaccess.h>
3735+#include <linux/i2c.h>
3736+#include <linux/irq.h>
3737+#include <linux/interrupt.h>
3738+#include <linux/da9030.h>
3739+#include <linux/kernel_stat.h>
3740+#include <linux/random.h>
3741+#include <linux/mutex.h>
3742+
3743+#include <linux/debugfs.h>
3744+#include <linux/seq_file.h>
3745+
3746+#include "da9030.h"
3747+
3748+#define DRIVER_NAME "da9030"
3749+
3750+static unsigned short normal_i2c[] = { 0x49, I2C_CLIENT_END };
3751+
3752+I2C_CLIENT_INSMOD;
3753+
3754+struct da9030 {
3755+ struct mutex lock;
3756+ struct i2c_client *client;
3757+
3758+ struct work_struct event_work;
3759+
3760+ /* there are 24 interrupts */
3761+ void (*callbacks[24])(int event, void *data);
3762+ void *callbacks_data[24];
3763+
3764+ struct dentry *debug_file;
3765+};
3766+
3767+/* I hardly believe there can be more than 1 such chip in the system,
3768+ so keeping its global instance won't really hurt */
3769+static struct da9030 *the_da9030;
3770+
3771+unsigned char defined_regs[] = {
3772+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a,
3773+ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b,
3774+ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
3775+ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a,
3776+ 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4a, 0x4b,
3777+ 0x50, 0x51,
3778+ 0x60, 0x61, 0x62, 0x63,
3779+ 0x80, 0x81,
3780+ 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9a, 0x9b,
3781+ 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6,
3782+ 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 0xb8, 0xb9, 0xba,
3783+};
3784+
3785+static inline int is_reg_valid(u32 reg)
3786+{
3787+ int i;
3788+ for (i = 0; i < ARRAY_SIZE(defined_regs); i++)
3789+ if (reg == defined_regs[i])
3790+ return 1;
3791+
3792+ return 0;
3793+}
3794+
3795+s32 da9030_get_reg(u32 reg)
3796+{
3797+ if (!is_reg_valid(reg))
3798+ return -EINVAL;
3799+
3800+ return i2c_smbus_read_byte_data(the_da9030->client, reg);
3801+}
3802+EXPORT_SYMBOL(da9030_get_reg);
3803+
3804+s32 da9030_set_reg(u32 reg, u8 val)
3805+{
3806+ if (!is_reg_valid(reg))
3807+ return -EINVAL;
3808+
3809+ return i2c_smbus_write_byte_data(the_da9030->client, reg, val);
3810+}
3811+EXPORT_SYMBOL(da9030_set_reg);
3812+
3813+static s32 da9030_update_reg_bits(u32 reg, int bits, int shift, int val)
3814+{
3815+ int ret;
3816+ int new_val;
3817+
3818+ mutex_lock(&the_da9030->lock);
3819+ ret = da9030_get_reg(reg);
3820+ if (ret < 0)
3821+ goto out;
3822+
3823+ new_val = reg & ~(((1 << bits) - 1) << shift);
3824+ new_val |= (val << shift);
3825+
3826+ ret = da9030_set_reg(reg, new_val);
3827+ mutex_unlock(&the_da9030->lock);
3828+
3829+out:
3830+ return ret;
3831+}
3832+
3833+int da9030_get_status(void)
3834+{
3835+ s32 ret;
3836+
3837+ mutex_lock(&the_da9030->lock);
3838+ ret = da9030_get_reg(STATUS);
3839+ mutex_unlock(&the_da9030->lock);
3840+
3841+ return ret;
3842+}
3843+EXPORT_SYMBOL(da9030_get_status);
3844+
3845+int da9030_get_fault_log(void)
3846+{
3847+ s32 ret;
3848+
3849+ mutex_lock(&the_da9030->lock);
3850+ ret = da9030_get_reg(FAULT_LOG);
3851+ mutex_unlock(&the_da9030->lock);
3852+
3853+ return ret;
3854+}
3855+EXPORT_SYMBOL(da9030_get_fault_log);
3856+
3857+void da9030_read_adc(struct da9030_adc_res *adc)
3858+{
3859+ mutex_lock(&the_da9030->lock);
3860+
3861+ adc->vbat_res = da9030_get_reg(VBAT_RES);
3862+ adc->vbatmin_res = da9030_get_reg(VBATMIN_RES);
3863+ adc->vbatmintxon = da9030_get_reg(VBATMINTXON_RES);
3864+ adc->ichmax_res = da9030_get_reg(ICHMAX_RES);
3865+ adc->ichmin_res = da9030_get_reg(ICHMIN_RES);
3866+ adc->ichaverage_res = da9030_get_reg(ICHAVERAGE_RES);
3867+ adc->vchmax_res = da9030_get_reg(VCHMAX_RES);
3868+ adc->vchmin_res = da9030_get_reg(VCHMIN_RES);
3869+ adc->tbat_res = da9030_get_reg(TBAT_RES);
3870+ adc->adc_in4_res = da9030_get_reg(ADC_IN4_RES);
3871+ adc->adc_in5_res = da9030_get_reg(ADC_IN5_RES);
3872+
3873+ mutex_unlock(&the_da9030->lock);
3874+}
3875+EXPORT_SYMBOL(da9030_read_adc);
3876+
3877+void da9030_enable_adc(void)
3878+{
3879+ /* enable automatic A/D measurements */
3880+ mutex_lock(&the_da9030->lock);
3881+
3882+ da9030_set_reg(ADC_MAN_CONTROL,
3883+ ADC_LDO_INT_ENABLE | ADC_TBATREF_ENABLE);
3884+ da9030_set_reg(ADC_MAN_CONTROL_1,
3885+ ADC_LDO_INT_ENABLE | ADC_TBATREF_ENABLE);
3886+ da9030_set_reg(ADC_AUTO_CONTROL_1,
3887+ ADC_TBAT_ENABLE | ADC_VBAT_IN_TXON | ADC_VCH_ENABLE |
3888+ ADC_ICH_ENABLE | ADC_VBAT_ENABLE |
3889+ ADC_AUTO_SLEEP_ENABLE);
3890+ da9030_set_reg(ADC_AUTO_CONTROL,
3891+ ADC_TBAT_ENABLE | ADC_VBAT_IN_TXON | ADC_VCH_ENABLE |
3892+ ADC_ICH_ENABLE | ADC_VBAT_ENABLE |
3893+ ADC_AUTO_SLEEP_ENABLE);
3894+
3895+ mutex_unlock(&the_da9030->lock);
3896+}
3897+EXPORT_SYMBOL(da9030_enable_adc);
3898+
3899+void da9030_set_wled(int on, unsigned int brightness)
3900+{
3901+ u8 val;
3902+
3903+ mutex_lock(&the_da9030->lock);
3904+
3905+ if (on)
3906+ val = WLED_CP_ENABLE | (brightness & 0x7);
3907+ else
3908+ val = da9030_get_reg(WLED_CONTROL) & ~WLED_CP_ENABLE;
3909+
3910+ da9030_set_reg(WLED_CONTROL, val);
3911+
3912+ mutex_unlock(&the_da9030->lock);
3913+}
3914+EXPORT_SYMBOL(da9030_set_wled);
3915+
3916+int da9030_set_charger(int on, unsigned int mA, unsigned int mV)
3917+{
3918+ int ret;
3919+ u8 val = 0;
3920+ if (on) {
3921+ if (mA >= 1500 || mV < 4000 || mV > 4350)
3922+ return -EINVAL;
3923+
3924+ val = CHRG_CHARGER_ENABLE;
3925+ val |= (mA / 100) << 3;
3926+ val |= (mV - 4000) / 50;
3927+ }
3928+
3929+ mutex_lock(&the_da9030->lock);
3930+ ret = da9030_set_reg(CHARGE_CONTROL, val);
3931+ mutex_unlock(&the_da9030->lock);
3932+
3933+ return ret;
3934+}
3935+EXPORT_SYMBOL(da9030_set_charger);
3936+
3937+void da9030_get_charger(int *on, unsigned int *mA, unsigned int *mV)
3938+{
3939+ s32 val;
3940+
3941+ mutex_lock(&the_da9030->lock);
3942+
3943+ val = da9030_get_reg(CHARGE_CONTROL);
3944+
3945+ mutex_unlock(&the_da9030->lock);
3946+
3947+ if (on)
3948+ *on = (val & CHRG_CHARGER_ENABLE) ? 1 : 0;
3949+
3950+ if (mA)
3951+ *mA = ((val >> 3) & 0xf) * 100;
3952+
3953+ if (mV)
3954+ *mV = (val & 0x7) * 50 + 4000;
3955+}
3956+EXPORT_SYMBOL(da9030_get_charger);
3957+
3958+int da9030_set_led(int led, int on,
3959+ enum da9030_led_rate rate,
3960+ enum da9030_led_duty_cycle duty,
3961+ enum da9030_led_pwm_chop pwm_chop)
3962+{
3963+ int reg;
3964+ int ret;
3965+
3966+ u8 val = 0;
3967+
3968+ if (led > 4)
3969+ return -EINVAL;
3970+
3971+ reg = LED_1_CONTROL + led;
3972+ if (on) {
3973+ val = LED_ENABLE;
3974+ val |= (rate & 0x3) << 5;
3975+ val |= (duty & 0x3) << 3;
3976+ val |= (pwm_chop & 0x7);
3977+ }
3978+
3979+ mutex_lock(&the_da9030->lock);
3980+ ret = da9030_set_reg(reg, val);
3981+ mutex_unlock(&the_da9030->lock);
3982+
3983+ return ret;
3984+}
3985+EXPORT_SYMBOL(da9030_set_led);
3986+
3987+void da9030_set_thresholds(unsigned int tbathighp, unsigned int tbathighn,
3988+ unsigned int tbatlow, unsigned int vbatmon)
3989+{
3990+ mutex_lock(&the_da9030->lock);
3991+
3992+ da9030_set_reg(TBATHIGHP, tbathighp);
3993+ da9030_set_reg(TBATHIGHN, tbathighn);
3994+ da9030_set_reg(TBATLOW, tbatlow);
3995+ da9030_set_reg(VBATMONTXON, vbatmon);
3996+ da9030_set_reg(VBATMON, vbatmon);
3997+
3998+ da9030_set_reg(TBATHIGHP_1, tbathighp);
3999+ da9030_set_reg(TBATHIGHN_1, tbathighn);
4000+ da9030_set_reg(TBATLOW_1, tbatlow);
4001+ da9030_set_reg(VBATMONTXMON_1, vbatmon);
4002+ da9030_set_reg(VBATMON_1, vbatmon);
4003+
4004+ mutex_unlock(&the_da9030->lock);
4005+}
4006+EXPORT_SYMBOL(da9030_set_thresholds);
4007+
4008+struct da9030_vtg_value {
4009+ u16 vtg;
4010+ u16 val;
4011+};
4012+
4013+struct da9030_vtg_value da9030_vtg_1V8_3V2[] = {
4014+ {1800, 0x0},
4015+ {1900, 0x1},
4016+ {2000, 0x2},
4017+ {2100, 0x3},
4018+ {2200, 0x4},
4019+ {2300, 0x5},
4020+ {2400, 0x6},
4021+ {2500, 0x7},
4022+ {2600, 0x8},
4023+ {2700, 0x9},
4024+ {2800, 0xa},
4025+ {2900, 0xb},
4026+ {3000, 0xc},
4027+ {3100, 0xd},
4028+ {3200, 0xe},
4029+ {3200, 0xf},
4030+};
4031+
4032+struct da9030_vtg_value da9030_vtg_1V1_2V65[] = {
4033+ {1100, 0x0},
4034+ {1150, 0x1},
4035+ {1200, 0x2},
4036+ {1250, 0x3},
4037+ {1300, 0x4},
4038+ {1350, 0x5},
4039+ {1400, 0x6},
4040+ {1450, 0x7},
4041+ {1500, 0x8},
4042+ {1550, 0x9},
4043+ {1600, 0xa},
4044+ {1650, 0xb},
4045+ {1700, 0xc},
4046+ {1750, 0xd},
4047+ {1800, 0xe},
4048+ {1850, 0xf},
4049+ {1900, 0x10},
4050+ {1950, 0x11},
4051+ {2000, 0x12},
4052+ {2050, 0x13},
4053+ {2100, 0x14},
4054+ {2150, 0x15},
4055+ {2200, 0x16},
4056+ {2250, 0x17},
4057+ {2300, 0x18},
4058+ {2350, 0x19},
4059+ {2400, 0x1a},
4060+ {2450, 0x1b},
4061+ {2500, 0x1c},
4062+ {2550, 0x1d},
4063+ {2600, 0x1e},
4064+ {2650, 0x1f},
4065+};
4066+
4067+struct da9030_vtg_value da9030_vtg_2V76_2V94[] = {
4068+ {2760, 0x7},
4069+ {2790, 0x6},
4070+ {2820, 0x5},
4071+ {2850, 0x4},
4072+ {2850, 0x3},
4073+ {2880, 0x1},
4074+ {2910, 0x2},
4075+ {2940, 0x3},
4076+};
4077+
4078+struct da9030_vtg_value da9030_vtg_0V85_1V625[] = {
4079+ {850, 0x0},
4080+ {875, 0x1},
4081+ {900, 0x2},
4082+ {925, 0x3},
4083+ {950, 0x4},
4084+ {975, 0x5},
4085+ {1000, 0x6},
4086+ {1025, 0x7},
4087+ {1050, 0x8},
4088+ {1075, 0x9},
4089+ {1100, 0xa},
4090+ {1125, 0xb},
4091+ {1150, 0xc},
4092+ {1175, 0xd},
4093+ {1200, 0xe},
4094+ {1225, 0xf},
4095+ {1250, 0x10},
4096+ {1275, 0x11},
4097+ {1300, 0x12},
4098+ {1325, 0x13},
4099+ {1350, 0x14},
4100+ {1375, 0x15},
4101+ {1400, 0x16},
4102+ {1425, 0x17},
4103+ {1450, 0x18},
4104+ {1475, 0x19},
4105+ {1500, 0x1a},
4106+ {1525, 0x1b},
4107+ {1550, 0x1c},
4108+ {1575, 0x1d},
4109+ {1600, 0x1e},
4110+ {1625, 0x1f},
4111+};
4112+
4113+struct ldo_param {
4114+ u8 reg;
4115+ u8 shift;
4116+ u8 bits;
4117+};
4118+
4119+struct da9030_ldo {
4120+ const char *name;
4121+
4122+ struct ldo_param vtg;
4123+ struct ldo_param sleep;
4124+ struct ldo_param lock;
4125+
4126+ /* several LDOs have two enable/disable bits */
4127+ struct ldo_param enable[2];
4128+
4129+ struct da9030_vtg_value *values;
4130+ int values_count;
4131+};
4132+
4133+static struct da9030_ldo da9030_ldos[] = {
4134+ [0] = {
4135+ .name = "LDO1",
4136+ .vtg = {
4137+ .reg = LDO_1,
4138+ .shift = 0,
4139+ .bits = 5,
4140+ },
4141+ .enable[0] = {
4142+ .reg = REG_CONTROL_1_97,
4143+ .shift = 1,
4144+ .bits = 1,
4145+ },
4146+ .sleep = {
4147+ .reg = LDO_1,
4148+ .shift = 5,
4149+ .bits = 2,
4150+ },
4151+ .lock = {
4152+ .reg = REG_SLEEP_CONTROL1,
4153+ .shift = 0,
4154+ .bits = 2,
4155+ },
4156+ .values = da9030_vtg_1V8_3V2,
4157+ .values_count = ARRAY_SIZE(da9030_vtg_1V8_3V2),
4158+ },
4159+ [1] = {
4160+ .name = "LDO2",
4161+ .vtg = {
4162+ .reg = LDO_2_3,
4163+ .shift = 0,
4164+ .bits = 4,
4165+ },
4166+ .enable[0] = {
4167+ .reg = REG_CONTROL_1_97,
4168+ .shift = 2,
4169+ .bits = 1,
4170+ },
4171+ .sleep = {
4172+ .reg = REG_SLEEP_CONTROL1,
4173+ .shift = 2,
4174+ .bits = 2,
4175+ },
4176+ .values = da9030_vtg_1V8_3V2,
4177+ .values_count = ARRAY_SIZE(da9030_vtg_1V8_3V2),
4178+ },
4179+ [2] = {
4180+ .name = "LDO3",
4181+ .vtg = {
4182+ .reg = LDO_2_3,
4183+ .shift = 4,
4184+ .bits = 4,
4185+ },
4186+ .enable[0] = {
4187+ .reg = REG_CONTROL_1_97,
4188+ .shift = 3,
4189+ .bits = 1,
4190+ },
4191+ .sleep = {
4192+ .reg = REG_SLEEP_CONTROL1,
4193+ .shift = 4,
4194+ .bits = 2,
4195+ },
4196+ .values = da9030_vtg_1V8_3V2,
4197+ .values_count = ARRAY_SIZE(da9030_vtg_1V8_3V2),
4198+ },
4199+ [3] = {
4200+ .name = "LDO4",
4201+ .vtg = {
4202+ .reg = LDO_4_5,
4203+ .shift = 0,
4204+ .bits = 4,
4205+ },
4206+ .enable[0] = {
4207+ .reg = REG_CONTROL_1_97,
4208+ .shift = 4,
4209+ .bits = 1,
4210+ },
4211+ .sleep = {
4212+ .reg = REG_SLEEP_CONTROL1,
4213+ .shift = 6,
4214+ .bits = 2,
4215+ },
4216+ .values = da9030_vtg_1V8_3V2,
4217+ .values_count = ARRAY_SIZE(da9030_vtg_1V8_3V2),
4218+ },
4219+ [4] = {
4220+ .name = "LDO5",
4221+ .vtg = {
4222+ .reg = LDO_4_5,
4223+ .shift = 4,
4224+ .bits = 4,
4225+ },
4226+ .enable[0] = {
4227+ .reg = REG_CONTROL_1_97,
4228+ .shift = 5,
4229+ .bits = 1,
4230+ },
4231+ .sleep = {
4232+ .reg = REG_SLEEP_CONTROL2,
4233+ .shift = 0,
4234+ .bits = 2,
4235+ },
4236+ .values = da9030_vtg_1V8_3V2,
4237+ .values_count = ARRAY_SIZE(da9030_vtg_1V8_3V2),
4238+ },
4239+ [5] = {
4240+ .name = "LDO6",
4241+ .vtg = {
4242+ .reg = LDO_6_SIMCP,
4243+ .shift = 0,
4244+ .bits = 4,
4245+ },
4246+ .enable[0] = {
4247+ .reg = REG_CONTROL_1_97,
4248+ .shift = 6,
4249+ .bits = 1,
4250+ },
4251+ .sleep = {
4252+ .reg = 0,
4253+ .shift = 0,
4254+ .bits = 0,
4255+ },
4256+ .values = da9030_vtg_1V8_3V2,
4257+ .values_count = ARRAY_SIZE(da9030_vtg_1V8_3V2),
4258+ },
4259+ [6] = {
4260+ .name = "LDO7",
4261+ .vtg = {
4262+ .reg = LDO_7_8,
4263+ .shift = 0,
4264+ .bits = 4,
4265+ },
4266+ .enable[0] = {
4267+ .reg = REG_CONTROL_1_97,
4268+ .shift = 7,
4269+ .bits = 1,
4270+ },
4271+ .sleep = {
4272+ .reg = REG_SLEEP_CONTROL2,
4273+ .shift = 2,
4274+ .bits = 2,
4275+ },
4276+ .values = da9030_vtg_1V8_3V2,
4277+ .values_count = ARRAY_SIZE(da9030_vtg_1V8_3V2),
4278+ },
4279+ [7] = {
4280+ .name = "LDO8",
4281+ .vtg = {
4282+ .reg = LDO_7_8,
4283+ .shift = 4,
4284+ .bits = 4,
4285+ },
4286+ .enable[0] = {
4287+ .reg = REG_CONTROL_2_98,
4288+ .shift = 0,
4289+ .bits = 1,
4290+ },
4291+ .sleep = {
4292+ .reg = REG_SLEEP_CONTROL2,
4293+ .shift = 4,
4294+ .bits = 2,
4295+ },
4296+ .values = da9030_vtg_1V8_3V2,
4297+ .values_count = ARRAY_SIZE(da9030_vtg_1V8_3V2),
4298+ },
4299+ [8] = {
4300+ .name = "LDO9",
4301+ .vtg = {
4302+ .reg = LDO_9_12,
4303+ .shift = 0,
4304+ .bits = 4,
4305+ },
4306+ .enable[0] = {
4307+ .reg = REG_CONTROL_2_98,
4308+ .shift = 1,
4309+ .bits = 1,
4310+ },
4311+ .sleep = {
4312+ .reg = REG_SLEEP_CONTROL2,
4313+ .shift = 6,
4314+ .bits = 2,
4315+ },
4316+ .values = da9030_vtg_1V8_3V2,
4317+ .values_count = ARRAY_SIZE(da9030_vtg_1V8_3V2),
4318+ },
4319+ [9] = {
4320+ .name = "LDO10",
4321+ .vtg = {
4322+ .reg = LDO_10_11,
4323+ .shift = 0,
4324+ .bits = 4,
4325+ },
4326+ .enable[0] = {
4327+ .reg = REG_CONTROL_1_17,
4328+ .shift = 1,
4329+ .bits = 1,
4330+ },
4331+ .enable[1] = {
4332+ .reg = REG_CONTROL_2_98,
4333+ .shift = 2,
4334+ .bits = 1,
4335+ },
4336+ .sleep = {
4337+ .reg = 0,
4338+ .shift = 0,
4339+ .bits = 0,
4340+ },
4341+ .values = da9030_vtg_1V8_3V2,
4342+ .values_count = ARRAY_SIZE(da9030_vtg_1V8_3V2),
4343+ },
4344+ [10] = {
4345+ .name = "LDO11",
4346+ .vtg = {
4347+ .reg = LDO_10_11,
4348+ .shift = 4,
4349+ .bits = 4,
4350+ },
4351+ .enable[0] = {
4352+ .reg = REG_CONTROL_1_17,
4353+ .shift = 2,
4354+ .bits = 1,
4355+ },
4356+ .enable[1] = {
4357+ .reg = REG_CONTROL_2_98,
4358+ .shift = 3,
4359+ .bits = 1,
4360+ },
4361+ .sleep = {
4362+ .reg = 0,
4363+ .shift = 0,
4364+ .bits = 0,
4365+ },
4366+ .values = da9030_vtg_1V8_3V2,
4367+ .values_count = ARRAY_SIZE(da9030_vtg_1V8_3V2),
4368+ },
4369+ [11] = {
4370+ .name = "LDO12",
4371+ .vtg = {
4372+ .reg = LDO_9_12,
4373+ .shift = 4,
4374+ .bits = 4,
4375+ },
4376+ .enable[0] = {
4377+ .reg = REG_CONTROL_2_98,
4378+ .shift = 4,
4379+ .bits = 1,
4380+ },
4381+ .sleep = {
4382+ .reg = REG_SLEEP_CONTROL3,
4383+ .shift = 0,
4384+ .bits = 2,
4385+ },
4386+ .values = da9030_vtg_1V8_3V2,
4387+ .values_count = ARRAY_SIZE(da9030_vtg_1V8_3V2),
4388+ },
4389+ [12] = {
4390+ .name = "LDO13",
4391+ .vtg = {
4392+ .reg = 0,
4393+ .shift = 0,
4394+ .bits = 0,
4395+ },
4396+ .enable[0] = {
4397+ .reg = REG_CONTROL_1_17,
4398+ .shift = 3,
4399+ .bits = 1,
4400+ },
4401+ .sleep = {
4402+ .reg = 0,
4403+ .shift = 0,
4404+ .bits = 0,
4405+ },
4406+ .values = NULL,
4407+ .values_count = 0,
4408+ },
4409+ [13] = {
4410+ .name = "LDO14",
4411+ .vtg = {
4412+ .reg = LDO_14_16,
4413+ .shift = 0,
4414+ .bits = 3,
4415+ },
4416+ .enable[0] = {
4417+ .reg = REG_CONTROL_1_17, /* FIXME: or 2_98? */
4418+ .shift = 4,
4419+ .bits = 1,
4420+ },
4421+ .enable[1] = {
4422+ .reg = REG_CONTROL_2_98, /* FIXME: or 2_98? */
4423+ .shift = 5,
4424+ .bits = 1,
4425+ },
4426+ .sleep = {
4427+ .reg = 0,
4428+ .shift = 0,
4429+ .bits = 0,
4430+ },
4431+ .values = da9030_vtg_2V76_2V94,
4432+ .values_count = ARRAY_SIZE(da9030_vtg_2V76_2V94),
4433+ },
4434+ [14] = {
4435+ .name = "LDO15",
4436+ .vtg = {
4437+ .reg = LDO_15,
4438+ .shift = 0,
4439+ .bits = 5,
4440+ },
4441+ .enable[0] = {
4442+ .reg = REG_CONTROL_1_17,
4443+ .shift = 5,
4444+ .bits = 1,
4445+ },
4446+ .sleep = {
4447+ .reg = 0,
4448+ .shift = 0,
4449+ .bits = 0,
4450+ },
4451+ .lock = {
4452+ .reg = LDO_15,
4453+ .shift = 5,
4454+ .bits = 3,
4455+ },
4456+ .values = da9030_vtg_1V1_2V65,
4457+ .values_count = ARRAY_SIZE(da9030_vtg_1V1_2V65),
4458+ },
4459+ [15] = {
4460+ .name = "LDO16",
4461+ .vtg = {
4462+ .reg = LDO_14_16,
4463+ .shift = 3,
4464+ .bits = 5,
4465+ },
4466+ .enable[0] = {
4467+ .reg = REG_CONTROL_1_17,
4468+ .shift = 6,
4469+ .bits = 1,
4470+ },
4471+ .sleep = {
4472+ .reg = 0,
4473+ .shift = 0,
4474+ .bits = 0,
4475+ },
4476+ .values = da9030_vtg_1V1_2V65,
4477+ .values_count = ARRAY_SIZE(da9030_vtg_1V1_2V65),
4478+ },
4479+ [16] = {
4480+ .name = "LDO17",
4481+ .vtg = {
4482+ .reg = LDO_17_SIMCP0,
4483+ .shift = 0,
4484+ .bits = 4,
4485+ },
4486+ .enable[0] = {
4487+ .reg = REG_CONTROL_1_17,
4488+ .shift = 7,
4489+ .bits = 1,
4490+ },
4491+ .sleep = {
4492+ .reg = 0,
4493+ .shift = 0,
4494+ .bits = 0,
4495+ },
4496+ .values = da9030_vtg_1V8_3V2,
4497+ .values_count = ARRAY_SIZE(da9030_vtg_1V8_3V2),
4498+ },
4499+ [17] = {
4500+ .name = "LDO18",
4501+ .vtg = {
4502+ .reg = LDO_18_19,
4503+ .shift = 0,
4504+ .bits = 4,
4505+ },
4506+ .enable[0] = {
4507+ .reg = REG_CONTROL_2_18,
4508+ .shift = 2,
4509+ .bits = 1,
4510+ },
4511+ .sleep = {
4512+ .reg = 0,
4513+ .shift = 0,
4514+ .bits = 0,
4515+ },
4516+ .values = da9030_vtg_1V8_3V2,
4517+ .values_count = ARRAY_SIZE(da9030_vtg_1V8_3V2),
4518+ },
4519+ [18] = {
4520+ .name = "LDO19",
4521+ .vtg = {
4522+ .reg = LDO_18_19,
4523+ .shift = 4,
4524+ .bits = 4,
4525+ },
4526+ .enable[0] = {
4527+ .reg = REG_CONTROL_2_18,
4528+ .shift = 1,
4529+ .bits = 1,
4530+ },
4531+ .sleep = {
4532+ .reg = 0,
4533+ .shift = 0,
4534+ .bits = 0,
4535+ },
4536+ .values = da9030_vtg_1V8_3V2,
4537+ .values_count = ARRAY_SIZE(da9030_vtg_1V8_3V2),
4538+ },
4539+};
4540+
4541+static int da9030_get_vtg_value(int vtg, const struct da9030_vtg_value *tbl,
4542+ int n)
4543+{
4544+ int i;
4545+
4546+ for (i = 0; i < n; i++, tbl++)
4547+ if (tbl->vtg == vtg)
4548+ return tbl->val;
4549+ return -EINVAL;
4550+}
4551+
4552+static int da9030_set_ldo_volt(struct da9030_ldo *ldo, unsigned int mV)
4553+{
4554+ int val;
4555+
4556+ val = da9030_get_vtg_value(mV, ldo->values, ldo->values_count);
4557+ if (val < 0)
4558+ return val;
4559+
4560+ return da9030_update_reg_bits(ldo->vtg.reg, ldo->vtg.bits,
4561+ ldo->vtg.shift, val);
4562+}
4563+
4564+static int da9030_enable_ldo(struct da9030_ldo *ldo, int enable)
4565+{
4566+ int ret;
4567+
4568+ ret = da9030_update_reg_bits(ldo->enable[0].reg, ldo->enable[1].bits,
4569+ ldo->enable[0].shift, enable);
4570+
4571+ if (ret < 0)
4572+ return ret;
4573+
4574+ if (unlikely(ldo->enable[1].reg != 0))
4575+ ret = da9030_update_reg_bits(ldo->enable[1].reg,
4576+ ldo->enable[1].bits,
4577+ ldo->enable[1].shift, enable);
4578+
4579+ return ret;
4580+}
4581+
4582+static int da9030_set_ldo_sleep(struct da9030_ldo *ldo,
4583+ enum da9030_ldo_sleep_mode sleep_mode)
4584+{
4585+ return da9030_update_reg_bits(ldo->sleep.reg, ldo->sleep.bits,
4586+ ldo->sleep.shift, sleep_mode);
4587+}
4588+
4589+int da9030_set_ldo(int ldo_num, int on, unsigned int mV,
4590+ enum da9030_ldo_sleep_mode sleep_mode)
4591+{
4592+ struct da9030_ldo *ldo;
4593+ int ret;
4594+
4595+ if (ldo_num < 0 || ldo_num > ARRAY_SIZE(da9030_ldos))
4596+ return -EINVAL;
4597+
4598+ ldo = &da9030_ldos[ldo_num];
4599+
4600+ ret = da9030_set_ldo_volt(ldo, mV);
4601+ if (ret < 0)
4602+ return ret;
4603+
4604+ ret = da9030_enable_ldo(ldo, on);
4605+ if (ret < 0)
4606+ return ret;
4607+
4608+ ret = da9030_set_ldo_sleep(ldo, sleep_mode);
4609+ if (ret < 0)
4610+ return ret;
4611+
4612+ return 0;
4613+}
4614+EXPORT_SYMBOL(da9030_set_ldo);
4615+
4616+int da9030_set_buck(int buck, int on, unsigned int mV, int flags)
4617+{
4618+ /* FIXME: implement */
4619+ return 0;
4620+}
4621+EXPORT_SYMBOL(da9030_set_buck);
4622+
4623+static void da9030_disable_irq(unsigned int irq)
4624+{
4625+ int reg, val;
4626+
4627+ if (irq < 8) {
4628+ reg = IRQ_MASK_A;
4629+ val = 1 << irq;
4630+ } else if (irq < 16) {
4631+ reg = IRQ_MASK_B;
4632+ val = 1 << (irq - 8);
4633+ } else {
4634+ reg = IRQ_MASK_C;
4635+ val = 1 << (irq - 16);
4636+ }
4637+
4638+ i2c_smbus_write_byte_data(
4639+ the_da9030->client, reg,
4640+ i2c_smbus_read_byte_data(the_da9030->client, reg) | val);
4641+}
4642+
4643+static void da9030_enable_irq(unsigned int irq)
4644+{
4645+ int reg, val;
4646+
4647+ if (irq < 8) {
4648+ reg = IRQ_MASK_A;
4649+ val = 1 << irq;
4650+ } else if (irq < 16) {
4651+ reg = IRQ_MASK_B;
4652+ val = 1 << (irq - 8);
4653+ } else {
4654+ reg = IRQ_MASK_C;
4655+ val = 1 << (irq - 16);
4656+ }
4657+
4658+ i2c_smbus_write_byte_data(
4659+ the_da9030->client, reg,
4660+ i2c_smbus_read_byte_data(the_da9030->client, reg) & ~val);
4661+}
4662+
4663+int da9030_register_callback(int event,
4664+ void (*callback)(int event, void *data),
4665+ void *data)
4666+{
4667+ int ret;
4668+
4669+ if (event < 0 || event > 23)
4670+ return -EINVAL;
4671+
4672+ mutex_lock(&the_da9030->lock);
4673+ if (the_da9030->callbacks[event])
4674+ ret = -EBUSY;
4675+ else {
4676+ the_da9030->callbacks[event] = callback;
4677+ the_da9030->callbacks_data[event] = data;
4678+ da9030_enable_irq(event);
4679+ ret = 0;
4680+ }
4681+ mutex_unlock(&the_da9030->lock);
4682+
4683+ return ret;
4684+}
4685+EXPORT_SYMBOL(da9030_register_callback);
4686+
4687+void da9030_unregister_callback(int event)
4688+{
4689+ mutex_lock(&the_da9030->lock);
4690+
4691+ da9030_disable_irq(event);
4692+ the_da9030->callbacks[event] = NULL;
4693+ the_da9030->callbacks_data[event] = 0;
4694+
4695+ mutex_unlock(&the_da9030->lock);
4696+}
4697+EXPORT_SYMBOL(da9030_unregister_callback);
4698+
4699+#ifdef CONFIG_DEBUG_FS
4700+#define MAX_BUF 256
4701+
4702+static int da9030_debug_show(struct seq_file *s, void *data)
4703+{
4704+ int i, res = 0;
4705+ struct da9030 *da9030 = s->private;
4706+ struct i2c_client *client = da9030->client;
4707+
4708+ seq_printf(s, "DA9030 state: da = %p, cl = %p, s->private = %p\n",
4709+ da9030, client, s->private);
4710+
4711+ for (i = 0; i < ARRAY_SIZE(defined_regs); i++) {
4712+ res = i2c_smbus_read_byte_data(client, defined_regs[i]);
4713+ seq_printf(s, "%02x %x\n", defined_regs[i], res);
4714+ }
4715+ return 0;
4716+}
4717+
4718+static int da9030_debug_open(struct inode *inode, struct file *file)
4719+{
4720+ return single_open(file, da9030_debug_show, inode->i_private);
4721+}
4722+
4723+ssize_t da9030_debug_write(struct file *f, const char __user *buf, size_t len,
4724+ loff_t *off)
4725+{
4726+ char buffer[MAX_BUF];
4727+ int reg, val;
4728+ char *endp;
4729+ struct da9030 *da9030 = ((struct seq_file *)f->private_data)->private;
4730+ struct i2c_client *client = da9030->client;
4731+
4732+ if (len > MAX_BUF) {
4733+ printk(KERN_INFO "%s: large buffer\n", __FUNCTION__);
4734+ len = MAX_BUF;
4735+ }
4736+
4737+ if (copy_from_user(buffer, buf, len)) {
4738+ printk(KERN_INFO "%s: copy_from_user failed\n", __FUNCTION__);
4739+ return -EFAULT;
4740+ }
4741+ buffer[len] = '\0';
4742+
4743+ reg = simple_strtoul(buffer, &endp, 0);
4744+ while (endp && isspace(*endp))
4745+ endp++;
4746+
4747+ val = simple_strtoul(endp, 0, 0);
4748+
4749+ i2c_smbus_write_byte_data(client, reg, val);
4750+
4751+ return len;
4752+}
4753+
4754+static const struct file_operations debug_fops = {
4755+ .open = da9030_debug_open,
4756+ .read = seq_read,
4757+ .write = da9030_debug_write,
4758+ .llseek = seq_lseek,
4759+ .release = single_release,
4760+};
4761+
4762+static struct dentry *da9030_create_debugfs(struct da9030 *da9030)
4763+{
4764+ da9030->debug_file = debugfs_create_file("da9030", 0666, 0, da9030,
4765+ &debug_fops);
4766+ return da9030->debug_file;
4767+}
4768+
4769+static void da9030_remove_debugfs(struct da9030 *da9030)
4770+{
4771+ debugfs_remove(da9030->debug_file);
4772+}
4773+#else
4774+#define da9030_create_debugfs(x) NULL
4775+#define da9030_remove_debugfs(x) do {} while (0)
4776+#endif
4777+
4778+static irqreturn_t da9030_irq(int irq, void *_da9030)
4779+{
4780+ struct da9030 *da9030 = _da9030;
4781+
4782+ (void)schedule_work(&da9030->event_work);
4783+
4784+ return IRQ_HANDLED;
4785+}
4786+
4787+static void da9030_irq_worker(struct work_struct *work)
4788+{
4789+ struct da9030 *da9030 = container_of(work, struct da9030, event_work);
4790+ void (*callback)(int event, void *data);
4791+ u32 pending = 0;
4792+ u32 mask = 0;
4793+ int i;
4794+
4795+ while (1) {
4796+ pending = (i2c_smbus_read_byte_data(da9030->client,
4797+ EVENT_A)) |
4798+ ((i2c_smbus_read_byte_data(da9030->client,
4799+ EVENT_B)) << 8) |
4800+ ((i2c_smbus_read_byte_data(da9030->client,
4801+ EVENT_C)) << 16);
4802+
4803+ mask = (i2c_smbus_read_byte_data(da9030->client,
4804+ IRQ_MASK_A)) |
4805+ ((i2c_smbus_read_byte_data(da9030->client,
4806+ IRQ_MASK_B)) << 8) |
4807+ ((i2c_smbus_read_byte_data(da9030->client,
4808+ IRQ_MASK_C)) << 16);
4809+ pending &= ~mask;
4810+
4811+ if (!pending)
4812+ return;
4813+
4814+ while (pending) {
4815+ i = __ffs(pending);
4816+ callback = da9030->callbacks[i];
4817+ if (callback)
4818+ callback(i, da9030->callbacks_data[i]);
4819+ pending &= ~(1 << i);
4820+ }
4821+ }
4822+}
4823+
4824+static inline void da9030_disable_interrupts(struct da9030 *da9030)
4825+{
4826+ /* clear pending interruts */
4827+ (void)i2c_smbus_read_byte_data(da9030->client, EVENT_A);
4828+ (void)i2c_smbus_read_byte_data(da9030->client, EVENT_B);
4829+ (void)i2c_smbus_read_byte_data(da9030->client, EVENT_C);
4830+
4831+ /* disable interrupts */
4832+ i2c_smbus_write_byte_data(da9030->client, IRQ_MASK_A, 0xff);
4833+ i2c_smbus_write_byte_data(da9030->client, IRQ_MASK_B, 0xff);
4834+ i2c_smbus_write_byte_data(da9030->client, IRQ_MASK_C, 0xff);
4835+}
4836+
4837+static int da9030_probe(struct i2c_client *client)
4838+{
4839+ int ret;
4840+ struct da9030 *da9030;
4841+
4842+ if (the_da9030) {
4843+ dev_dbg(&client->dev, "only one %s for now\n",
4844+ DRIVER_NAME);
4845+ return -ENODEV;
4846+ }
4847+
4848+ ret = i2c_smbus_read_byte_data(client, CHIP_ID);
4849+
4850+ dev_info(&client->dev, "initialized chip revision %x\n", ret);
4851+
4852+ da9030 = kzalloc(sizeof(struct da9030), GFP_KERNEL);
4853+ if (da9030 == NULL) {
4854+ dev_err(&client->dev, "insufficient memory\n");
4855+ return -ENOMEM;
4856+ }
4857+ the_da9030 = da9030;
4858+ da9030->client = client;
4859+
4860+ mutex_init(&the_da9030->lock);
4861+
4862+ da9030_disable_interrupts(da9030);
4863+ INIT_WORK(&da9030->event_work, da9030_irq_worker);
4864+
4865+ ret = request_irq(client->irq, da9030_irq,
4866+ IRQF_DISABLED, DRIVER_NAME, da9030);
4867+
4868+ if (ret) {
4869+ kfree(da9030);
4870+ dev_err(&client->dev,
4871+ "failed to allocate irq %d\n",
4872+ client->irq);
4873+ return ret;
4874+ }
4875+
4876+ i2c_set_clientdata(client, da9030);
4877+
4878+ da9030->debug_file = da9030_create_debugfs(da9030);
4879+
4880+ return 0;
4881+}
4882+
4883+/* static int da9030_detach_adapter(struct i2c_adapter *a) */
4884+static int da9030_remove(struct i2c_client *client)
4885+{
4886+ struct da9030 *da9030 = i2c_get_clientdata(client);
4887+
4888+ da9030_remove_debugfs(da9030);
4889+
4890+ free_irq(da9030->client->irq, da9030);
4891+ kfree(da9030);
4892+ i2c_set_clientdata(client, NULL);
4893+ the_da9030 = NULL;
4894+
4895+ return 0;
4896+}
4897+
4898+static struct i2c_driver da9030_driver = {
4899+ .driver = {
4900+ .name = "da9030",
4901+ .owner = THIS_MODULE,
4902+ },
4903+
4904+ .probe = da9030_probe,
4905+ .remove = da9030_remove,
4906+};
4907+
4908+static int da9030_init(void)
4909+{
4910+ i2c_add_driver(&da9030_driver);
4911+ return 0;
4912+}
4913+
4914+static void da9030_exit(void)
4915+{
4916+ i2c_del_driver(&da9030_driver);
4917+}
4918+
4919+/* NOTE: this MUST be initialized before the other parts of the system
4920+ * that rely on it ... but after the i2c bus on which this relies.
4921+ * That is, much earlier than on PC-type systems, which don't often use
4922+ * I2C as a core system bus.
4923+ */
4924+subsys_initcall(da9030_init);
4925+module_exit(da9030_exit);
4926+
4927+MODULE_DESCRIPTION("DA9030 power manager driver");
4928+MODULE_AUTHOR("Mike Rapoport, Compulab");
4929+MODULE_LICENSE("GPL");
4930diff --git a/drivers/i2c/chips/da9030.h b/drivers/i2c/chips/da9030.h
4931new file mode 100644
4932index 0000000..4163156
4933--- /dev/null
4934+++ b/drivers/i2c/chips/da9030.h
4935@@ -0,0 +1,282 @@
4936+/* DA9030 Register definintions */
4937+
4938+#define CHIP_ID 0x00
4939+
4940+#define EVENT_A 0x01
4941+#define EVENT_A_CHIOVER (1 << 7)
4942+#define EVENT_A_VBAT_MON_TXON (1 << 6)
4943+#define EVENT_A_VBAT_MON (1 << 5)
4944+#define EVENT_A_TBAT (1 << 4)
4945+#define EVENT_A_CHDET (1 << 3)
4946+#define EVENT_A_EXTON (1 << 2)
4947+#define EVENT_A_PWREN1 (1 << 1)
4948+#define EVENT_A_ONKEY_N (1 << 0)
4949+
4950+#define EVENT_B 0x02
4951+#define EVENT_B_WDOG_INT (1 << 7)
4952+#define EVENT_B_SRP_DETECT (1 << 6)
4953+#define EVENT_B_SESSION_VALID (1 << 5)
4954+#define EVENT_B_VBUS_VALID_4_0 (1 << 4)
4955+#define EVENT_B_VBUS_VALID_4_4 (1 << 3)
4956+#define EVENT_B_ADC_READY (1 << 2)
4957+#define EVENT_B_CCTO (1 << 1)
4958+#define EVENT_B_TCTO (1 << 0)
4959+
4960+#define EVENT_C 0x03
4961+#define EVENT_C_ADC_IN5 (1 << 7)
4962+#define EVENT_C_ADC_IN4 (1 << 6)
4963+#define EVENT_C_BUCK2 (1 << 5)
4964+#define EVENT_C_LDO19 (1 << 4)
4965+#define EVENT_C_LDO18 (1 << 3)
4966+#define EVENT_C_LDO17 (1 << 2)
4967+#define EVENT_C_LDO16 (1 << 1)
4968+#define EVENT_C_LDO15 (1 << 0)
4969+
4970+#define STATUS 0x04
4971+#define STATUS_MCLK_DETECT (1 << 7)
4972+#define STATUS_VBAT_MON_TXON (1 << 6)
4973+#define STATUS_VBAT_MON (1 << 5)
4974+#define STATUS_TBAT (1 << 4)
4975+#define STATUS_CHDET (1 << 3)
4976+#define STATUS_EXTON (1 << 2)
4977+#define STATUS_PWREN1 (1 << 1)
4978+#define STATUS_ONKEY_N (1 << 0)
4979+
4980+#define IRQ_MASK_A 0x05
4981+#define IRQ_MASK_A_CHIOVER (1 << 7)
4982+#define IRQ_MASK_A_VBAT_MON_TXON (1 << 6)
4983+#define IRQ_MASK_A_VBAT_MON (1 << 5)
4984+#define IRQ_MASK_A_TBAT (1 << 4)
4985+#define IRQ_MASK_A_CHDET (1 << 3)
4986+#define IRQ_MASK_A_EXTON (1 << 2)
4987+#define IRQ_MASK_A_PWREN1 (1 << 1)
4988+#define IRQ_MASK_A_ONKEY_N (1 << 0)
4989+
4990+#define IRQ_MASK_B 0x06
4991+#define IRQ_MASK_B_WDOG_INT (1 << 7)
4992+#define IRQ_MASK_B_SRP_DETECT (1 << 6)
4993+#define IRQ_MASK_B_SESSION_VALID (1 << 5)
4994+#define IRQ_MASK_B_VBUS_VALID_4_0 (1 << 4)
4995+#define IRQ_MASK_B_VBUS_VALID_4_4 (1 << 3)
4996+#define IRQ_MASK_B_ADC_READY (1 << 2)
4997+#define IRQ_MASK_B_CCTO (1 << 1)
4998+#define IRQ_MASK_B_TCTO (1 << 0)
4999+
5000+#define IRQ_MASK_C 0x07
5001+#define IRQ_MASK_C_ADC_IN5 (1 << 7)
5002+#define IRQ_MASK_C_ADC_IN4 (1 << 6)
5003+#define IRQ_MASK_C_BUCK2 (1 << 5)
5004+#define IRQ_MASK_C_LDO19 (1 << 4)
5005+#define IRQ_MASK_C_LDO18 (1 << 3)
5006+#define IRQ_MASK_C_LDO17 (1 << 2)
5007+#define IRQ_MASK_C_LDO16 (1 << 1)
5008+#define IRQ_MASK_C_LDO15 (1 << 0)
5009+
5010+#define SYS_CTRL_A 0x08
5011+#define SYS_CONTROL_A_SLEEP_N_PIN_ENABLE 0x1
5012+#define SYS_CONTROL_A_SHUT_DOWN (1<<1)
5013+#define SYS_CONTROL_A_HWRES_ENABLE (1<<2)
5014+#define SYS_CONTROL_A_WDOG_ACTION (1<<3)
5015+#define SYS_CONTROL_A_WATCHDOG (1<<7)
5016+
5017+#define SYS_CONTROL_B 0x09
5018+#define SYS_CLTR_B_SLEEP_13MHZ_EN (1 << 4)
5019+#define SYS_CLTR_B_AUTO_CLK_SWITCH (1 << 3)
5020+
5021+#define FAULT_LOG 0x0a
5022+#define FAULT_LOG_OVER_TEMP (1 << 7)
5023+#define FAULT_LOG_VBAT_OVER (1 << 4)
5024+
5025+#define LDO_10_11 0x10
5026+#define LDO_10_11_LDO10_3V (0xc)
5027+#define LDO_10_11_LDO11_3V2 (0xe << 4)
5028+
5029+#define LDO_15 0x11
5030+#define LDO_14_16 0x12
5031+#define LDO_18_19 0x13
5032+#define LDO_18_19_LDO18_3V2 (0xe)
5033+
5034+#define LDO_17_SIMCP0 0x14
5035+#define LDO_17_SIMCP0_LDO17_3V 0x0F
5036+
5037+#define BUCK_2_DVC1 0x15
5038+#define BUCK_2_GO (1 << 7)
5039+#define BUCK_2_SLEEP (1 << 6)
5040+#define BUCK_2_TRIM_1V5 (0x1a)
5041+
5042+#define BUCK_2_DVC2 0x16
5043+
5044+#define REG_CONTROL_1_17 0x17
5045+#define RC1_LDO17_EN (1 << 7)
5046+#define RC1_LDO16_EN (1 << 6)
5047+#define RC1_LDO15_EN (1 << 5)
5048+#define RC1_LDO14_EN (1 << 4)
5049+#define RC1_LDO13_EN (1 << 3)
5050+#define RC1_LDO11_EN (1 << 2)
5051+#define RC1_LDO10_EN (1 << 1)
5052+#define RC1_BUCK2_EN (1 << 0)
5053+
5054+#define REG_CONTROL_2_18 0x18
5055+#define RC2_SIMCP_EN (1 << 6)
5056+#define RC2_LDO19_EN (1 << 1)
5057+#define RC2_LDO18_EN (1 << 0)
5058+
5059+#define REG_CONTROL_3_
5060+
5061+#define USBPUMP 0x19
5062+#define USB_PUMP_EN_USBVEP (1 << 7)
5063+#define USB_PUMP_EN_USBVE (1 << 6)
5064+#define USB_PUMP_SPR_DETECT (1 << 5)
5065+#define USB_PUMP_SESSION_VALID (1 << 4)
5066+#define USB_PUMP_VBUS_VALID_4_0 (1 << 3)
5067+#define USB_PUMP_VBUS_VALID_4_4 (1 << 2)
5068+#define USB_PUMP_USBVEP (1 << 1)
5069+#define USB_PUMP_USBVE (1 << 0)
5070+
5071+#define SLEEP_CONTROL 0x1a
5072+#define APP_SLEEP_CTL_PWR_EN (1 << 7)
5073+#define APP_SLEEP_CTL_SYS_EN (1 << 6)
5074+#define APP_SLEEP_CTL_BYPASS_LDO19 (1 << 2)
5075+#define APP_SLEEP_CTL_BYPASS_LDO18 (1 << 1)
5076+#define APP_SLEEP_CTL_BYPASS_LDO17 (1 << 0)
5077+
5078+#define STARTUP_CONTROL 0x1b
5079+#define STARTUP_CTL_LDO11_PWR_SYS (1 << 3)
5080+#define STARTUP_CTL_LDO10_PWR_SYS (1 << 2)
5081+#define STARTUP_CTL_LDO11_START (1 << 1)
5082+#define STARTUP_CTL_LDO10_START (1 << 0)
5083+
5084+#define LED_1_CONTROL 0x20
5085+#define LED_2_CONTROL 0x21
5086+#define LED_3_CONTROL 0x22
5087+#define LED_4_CONTROL 0x23
5088+#define LEDPC_CONTROL 0x24
5089+#define LED_ENABLE (1 << 7)
5090+
5091+#define WLED_CONTROL 0x25
5092+#define WLED_CP_ENABLE (1 << 6)
5093+#define WLED_ISET_10 (3)
5094+
5095+#define MISC_CONTROLA 0x26
5096+#define MISC_CONTROLB 0x27
5097+#define MISCB_SESSION_VALID_ENABLE (1 << 3)
5098+#define MISCB_USB_INT_RISING (1 << 2)
5099+#define MISCB_I2C_ADDRESS (1 << 1)
5100+#define MISCB_STARTUP_SEQUENCE (1 << 0)
5101+
5102+#define CHARGE_CONTROL 0x28
5103+#define CHRG_CHARGER_ENABLE (1 << 7)
5104+
5105+#define CCTR_CONTROL 0x29
5106+#define CCTR_SET_8MIN 0x01
5107+
5108+#define TCTR_CONTROL 0x2a
5109+#define CHARGE_PULSE 0x2b
5110+
5111+#define ADC_MAN_CONTROL 0x30
5112+
5113+#define ADC_AUTO_CONTROL 0x31
5114+#define ADC_IN5_EN (1 << 7)
5115+#define ADC_IN4_EN (1 << 6)
5116+#define ADC_TBAT_ENABLE (1 << 5)
5117+#define ADC_VBAT_IN_TXON (1 << 4)
5118+#define ADC_VCH_ENABLE (1 << 3)
5119+#define ADC_ICH_ENABLE (1 << 2)
5120+#define ADC_VBAT_ENABLE (1 << 1)
5121+#define ADC_AUTO_SLEEP_ENABLE (1 << 0)
5122+
5123+#define VBATMON 0x32
5124+#define VBATMONTXON 0x33
5125+#define TBATHIGHP 0x34
5126+#define TBATHIGHN 0x35
5127+#define TBATLOW 0x36
5128+#define ADC_IN4_MIN 0x37
5129+#define ADC_IN4_MAX 0x38
5130+#define ADC_IN5_MIN 0x39
5131+#define ADC_IN5_MAX 0x3a
5132+
5133+#define VBAT_RES 0x41
5134+#define VBATMIN_RES 0x42
5135+#define VBATMINTXON 0x43
5136+#define ICHMAX_RES 0x44
5137+#define ICHMIN_RES 0x45
5138+#define ICHAVERAGE_RES 0x46
5139+#define VCHMAX_RES 0x47
5140+#define VCHMIN_RES 0x48
5141+#define TBAT_RES 0x49
5142+#define ADC_IN4_RES 0x4a
5143+#define ADC_IN5_RES 0x4b
5144+
5145+#define LDO_1 0x90
5146+#define LDO_1_UNLOCK (0x5 << 5)
5147+#define LDO_1_TRIM_3V (0x12)
5148+
5149+#define LDO_2_3 0x91
5150+#define LDO_2_3_LDO2_3V2 (0xe << 4)
5151+#define LDO_2_3_LDO3_3V (0xc)
5152+
5153+#define LDO_4_5 0x92
5154+#define LDO_6_SIMCP 0x93
5155+#define LDO_6_SIMCP_LDO6_3V2 (0xe)
5156+
5157+#define LDO_7_8 0x94
5158+#define LDO_9_12 0x95
5159+#define BUCK 0x96
5160+#define REG_CONTROL_1_97 0x97
5161+#define RC3_LDO7_EN (1 << 7)
5162+#define RC3_LDO6_EN (1 << 6)
5163+#define RC3_LDO5_EN (1 << 5)
5164+#define RC3_LDO4_EN (1 << 4)
5165+#define RC3_LDO3_EN (1 << 3)
5166+#define RC3_LDO2_EN (1 << 2)
5167+#define RC3_LDO1_EN (1 << 1)
5168+#define RC3_BUCK_EN (1 << 0)
5169+
5170+#define REG_CONTROL_2_98 0x98
5171+#define RC4_SLEEP (1 << 7)
5172+#define RC4_SIMCP_ENABLE (1 << 6)
5173+#define RC4_LDO14_EN (1 << 5)
5174+#define RC4_LDO12_EN (1 << 4)
5175+#define RC4_LDO11_EN (1 << 3)
5176+#define RC4_LDO10_EN (1 << 2)
5177+#define RC4_LDO9_EN (1 << 1)
5178+#define RC4_LDO8_EN (1 << 0)
5179+
5180+#define REG_SLEEP_CONTROL1 0x99
5181+#define REG_SLEEP_CONTROL2 0x9a
5182+#define REG_SLEEP_CONTROL3 0x9b
5183+
5184+#define ADC_MAN_CONTROL_1 0xa0
5185+#define ADC_DEBOUNCE_VBATMON_TXON (1 << 7)
5186+#define ADC_DEBOUNCE_VBATMON (1 << 6)
5187+#define ADC_TBATREF_ENABLE (1 << 5)
5188+#define ADC_LDO_INT_ENABLE (1 << 4)
5189+#define ADC_MAN_CONV (1 << 3)
5190+#define ADC_MUX_VBAT (0)
5191+
5192+#define ADC_AUTO_CONTROL_1 0xa1
5193+#define ADC_IN5_EN (1 << 7)
5194+#define ADC_IN4_EN (1 << 6)
5195+#define ADC_TBAT_ENABLE (1 << 5)
5196+#define ADC_VBAT_IN_TXON (1 << 4)
5197+#define ADC_VCH_ENABLE (1 << 3)
5198+#define ADC_ICH_ENABLE (1 << 2)
5199+#define ADC_VBAT_ENABLE (1 << 1)
5200+#define ADC_AUTO_SLEEP_ENABLE (1 << 0)
5201+
5202+#define VBATMON_1 0xa2
5203+#define VBATMONTXMON_1 0xa3
5204+#define TBATHIGHP_1 0xa4
5205+#define TBATHIGHN_1 0xa5
5206+#define TBATLOW_1 0xa6
5207+#define MAN_RES 0xb0
5208+#define VBAT_RES_1 0xb1
5209+#define VBATMIN_RES_1 0xb2
5210+#define VBATMINTXON_RES 0xb3
5211+#define ICHMAX_RES_1 0xb4
5212+#define ICHMIN_RES_1 0xb5
5213+#define ICHAVERAGE_RES_1 0xb6
5214+#define VCHMAX_RES_1 0xb7
5215+#define VCHMIN_RES_1 0xb8
5216+#define TBAT_RES_1 0xb9
5217+#define ADC_IN4_RES_1 0xba
5218diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
5219index f929fcd..174ea2e 100644
5220--- a/drivers/input/touchscreen/Kconfig
5221+++ b/drivers/input/touchscreen/Kconfig
5222@@ -126,6 +126,49 @@ config TOUCHSCREEN_HP600
5223 To compile this driver as a module, choose M here: the
5224 module will be called hp680_ts_input.
5225
5226+config TOUCHSCREEN_WM97XX
5227+ tristate "Support for WM97xx AC97 touchscreen controllers"
5228+ depends AC97_BUS
5229+
5230+choice
5231+ prompt "WM97xx codec type"
5232+ depends TOUCHSCREEN_WM97XX
5233+
5234+config TOUCHSCREEN_WM9705
5235+ bool "WM9705 Touchscreen interface support"
5236+ depends on TOUCHSCREEN_WM97XX
5237+ help
5238+ Say Y here if you have the wm9705 touchscreen.
5239+
5240+ If unsure, say N.
5241+
5242+ To compile this driver as a module, choose M here: the
5243+ module will be called wm9705.
5244+
5245+config TOUCHSCREEN_WM9712
5246+ bool "WM9712 Touchscreen interface support"
5247+ depends on TOUCHSCREEN_WM97XX
5248+ help
5249+ Say Y here if you have the wm9712 touchscreen.
5250+
5251+ If unsure, say N.
5252+
5253+ To compile this driver as a module, choose M here: the
5254+ module will be called wm9712.
5255+
5256+config TOUCHSCREEN_WM9713
5257+ bool "WM9713 Touchscreen interface support"
5258+ depends on TOUCHSCREEN_WM97XX
5259+ help
5260+ Say Y here if you have the wm9713 touchscreen.
5261+
5262+ If unsure, say N.
5263+
5264+ To compile this driver as a module, choose M here: the
5265+ module will be called wm9713.
5266+
5267+endchoice
5268+
5269 config TOUCHSCREEN_PENMOUNT
5270 tristate "Penmount serial touchscreen"
5271 select SERIO
5272diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
5273index 5de8933..3a059b1 100644
5274--- a/drivers/input/touchscreen/Makefile
5275+++ b/drivers/input/touchscreen/Makefile
5276@@ -3,6 +3,7 @@
5277 #
5278
5279 # Each configuration option enables a list of files.
5280+wm97xx-ts-objs := wm97xx-core.o
5281
5282 obj-$(CONFIG_TOUCHSCREEN_ADS7846) += ads7846.o
5283 obj-$(CONFIG_TOUCHSCREEN_BITSY) += h3600_ts_input.o
5284@@ -18,3 +19,16 @@ obj-$(CONFIG_TOUCHSCREEN_PENMOUNT) += penmount.o
5285 obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT) += touchright.o
5286 obj-$(CONFIG_TOUCHSCREEN_TOUCHWIN) += touchwin.o
5287 obj-$(CONFIG_TOUCHSCREEN_UCB1400) += ucb1400_ts.o
5288+obj-$(CONFIG_TOUCHSCREEN_WM97XX) += wm97xx-ts.o
5289+
5290+ifeq ($(CONFIG_TOUCHSCREEN_WM9713),y)
5291+wm97xx-ts-objs += wm9713.o
5292+endif
5293+
5294+ifeq ($(CONFIG_TOUCHSCREEN_WM9712),y)
5295+wm97xx-ts-objs += wm9712.o
5296+endif
5297+
5298+ifeq ($(CONFIG_TOUCHSCREEN_WM9705),y)
5299+wm97xx-ts-objs += wm9705.o
5300+endif
5301diff --git a/drivers/input/touchscreen/wm9705.c b/drivers/input/touchscreen/wm9705.c
5302new file mode 100644
5303index 0000000..1dae63d
5304--- /dev/null
5305+++ b/drivers/input/touchscreen/wm9705.c
5306@@ -0,0 +1,360 @@
5307+/*
5308+ * wm9705.c -- Codec driver for Wolfson WM9705 AC97 Codec.
5309+ *
5310+ * Copyright 2003, 2004, 2005, 2006 Wolfson Microelectronics PLC.
5311+ * Author: Liam Girdwood
5312+ * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com
5313+ * Parts Copyright : Ian Molton <spyro@f2s.com>
5314+ * Andrew Zabolotny <zap@homelink.ru>
5315+ * Russell King <rmk@arm.linux.org.uk>
5316+ *
5317+ * This program is free software; you can redistribute it and/or modify it
5318+ * under the terms of the GNU General Public License as published by the
5319+ * Free Software Foundation; either version 2 of the License, or (at your
5320+ * option) any later version.
5321+ *
5322+ * Revision history
5323+ * 6th Sep 2006 Mike Arthur <linux@wolfsonmicro.com>
5324+ * Added pre and post sample calls.
5325+ *
5326+ */
5327+
5328+#include <linux/module.h>
5329+#include <linux/moduleparam.h>
5330+#include <linux/version.h>
5331+#include <linux/kernel.h>
5332+#include <linux/input.h>
5333+#include <linux/delay.h>
5334+#include <linux/bitops.h>
5335+#include <linux/wm97xx.h>
5336+
5337+#define TS_NAME "wm97xx"
5338+#define WM9705_VERSION "0.62"
5339+#define DEFAULT_PRESSURE 0xb0c0
5340+
5341+/*
5342+ * Debug
5343+ */
5344+#if 0
5345+#define dbg(format, arg...) printk(KERN_DEBUG TS_NAME ": " format "\n" , ## arg)
5346+#else
5347+#define dbg(format, arg...)
5348+#endif
5349+#define err(format, arg...) printk(KERN_ERR TS_NAME ": " format "\n" , ## arg)
5350+#define info(format, arg...) printk(KERN_INFO TS_NAME ": " format "\n" , ## arg)
5351+#define warn(format, arg...) printk(KERN_WARNING TS_NAME ": " format "\n" , ## arg)
5352+
5353+/*
5354+ * Module parameters
5355+ */
5356+
5357+/*
5358+ * Set current used for pressure measurement.
5359+ *
5360+ * Set pil = 2 to use 400uA
5361+ * pil = 1 to use 200uA and
5362+ * pil = 0 to disable pressure measurement.
5363+ *
5364+ * This is used to increase the range of values returned by the adc
5365+ * when measureing touchpanel pressure.
5366+ */
5367+static int pil = 0;
5368+module_param(pil, int, 0);
5369+MODULE_PARM_DESC(pil, "Set current used for pressure measurement.");
5370+
5371+/*
5372+ * Set threshold for pressure measurement.
5373+ *
5374+ * Pen down pressure below threshold is ignored.
5375+ */
5376+static int pressure = DEFAULT_PRESSURE & 0xfff;
5377+module_param(pressure, int, 0);
5378+MODULE_PARM_DESC(pressure, "Set threshold for pressure measurement.");
5379+
5380+/*
5381+ * Set adc sample delay.
5382+ *
5383+ * For accurate touchpanel measurements, some settling time may be
5384+ * required between the switch matrix applying a voltage across the
5385+ * touchpanel plate and the ADC sampling the signal.
5386+ *
5387+ * This delay can be set by setting delay = n, where n is the array
5388+ * position of the delay in the array delay_table below.
5389+ * Long delays > 1ms are supported for completeness, but are not
5390+ * recommended.
5391+ */
5392+static int delay = 4;
5393+module_param(delay, int, 0);
5394+MODULE_PARM_DESC(delay, "Set adc sample delay.");
5395+
5396+/*
5397+ * Pen detect comparator threshold.
5398+ *
5399+ * 0 to Vmid in 15 steps, 0 = use zero power comparator with Vmid threshold
5400+ * i.e. 1 = Vmid/15 threshold
5401+ * 15 = Vmid/1 threshold
5402+ *
5403+ * Adjust this value if you are having problems with pen detect not
5404+ * detecting any down events.
5405+ */
5406+static int pdd = 8;
5407+module_param(pdd, int, 0);
5408+MODULE_PARM_DESC(pdd, "Set pen detect comparator threshold");
5409+
5410+/*
5411+ * Set adc mask function.
5412+ *
5413+ * Sources of glitch noise, such as signals driving an LCD display, may feed
5414+ * through to the touch screen plates and affect measurement accuracy. In
5415+ * order to minimise this, a signal may be applied to the MASK pin to delay or
5416+ * synchronise the sampling.
5417+ *
5418+ * 0 = No delay or sync
5419+ * 1 = High on pin stops conversions
5420+ * 2 = Edge triggered, edge on pin delays conversion by delay param (above)
5421+ * 3 = Edge triggered, edge on pin starts conversion after delay param
5422+ */
5423+static int mask = 0;
5424+module_param(mask, int, 0);
5425+MODULE_PARM_DESC(mask, "Set adc mask function.");
5426+
5427+/*
5428+ * ADC sample delay times in uS
5429+ */
5430+static const int delay_table[] = {
5431+ 21, // 1 AC97 Link frames
5432+ 42, // 2
5433+ 84, // 4
5434+ 167, // 8
5435+ 333, // 16
5436+ 667, // 32
5437+ 1000, // 48
5438+ 1333, // 64
5439+ 2000, // 96
5440+ 2667, // 128
5441+ 3333, // 160
5442+ 4000, // 192
5443+ 4667, // 224
5444+ 5333, // 256
5445+ 6000, // 288
5446+ 0 // No delay, switch matrix always on
5447+};
5448+
5449+/*
5450+ * Delay after issuing a POLL command.
5451+ *
5452+ * The delay is 3 AC97 link frames + the touchpanel settling delay
5453+ */
5454+static inline void poll_delay(int d)
5455+{
5456+ udelay (3 * AC97_LINK_FRAME + delay_table [d]);
5457+}
5458+
5459+/*
5460+ * set up the physical settings of the WM9705
5461+ */
5462+static void init_wm9705_phy(struct wm97xx* wm)
5463+{
5464+ u16 dig1 = 0, dig2 = WM97XX_RPR;
5465+
5466+ /*
5467+ * mute VIDEO and AUX as they share X and Y touchscreen
5468+ * inputs on the WM9705
5469+ */
5470+ wm97xx_reg_write(wm, AC97_AUX, 0x8000);
5471+ wm97xx_reg_write(wm, AC97_VIDEO, 0x8000);
5472+
5473+ /* touchpanel pressure current*/
5474+ if (pil == 2) {
5475+ dig2 |= WM9705_PIL;
5476+ dbg("setting pressure measurement current to 400uA.");
5477+ } else if (pil)
5478+ dbg("setting pressure measurement current to 200uA.");
5479+ if(!pil)
5480+ pressure = 0;
5481+
5482+ /* polling mode sample settling delay */
5483+ if (delay!=4) {
5484+ if (delay < 0 || delay > 15) {
5485+ dbg("supplied delay out of range.");
5486+ delay = 4;
5487+ }
5488+ }
5489+ dig1 &= 0xff0f;
5490+ dig1 |= WM97XX_DELAY(delay);
5491+ dbg("setting adc sample delay to %d u Secs.", delay_table[delay]);
5492+
5493+ /* WM9705 pdd */
5494+ dig2 |= (pdd & 0x000f);
5495+ dbg("setting pdd to Vmid/%d", 1 - (pdd & 0x000f));
5496+
5497+ /* mask */
5498+ dig2 |= ((mask & 0x3) << 4);
5499+
5500+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, dig1);
5501+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, dig2);
5502+}
5503+
5504+static int wm9705_digitiser_ioctl(struct wm97xx* wm, int cmd)
5505+{
5506+ switch(cmd) {
5507+ case WM97XX_DIG_START:
5508+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, wm->dig[2] | WM97XX_PRP_DET_DIG);
5509+ wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD); /* dummy read */
5510+ break;
5511+ case WM97XX_DIG_STOP:
5512+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, wm->dig[2] & ~WM97XX_PRP_DET_DIG);
5513+ break;
5514+ case WM97XX_AUX_PREPARE:
5515+ memcpy(wm->dig_save, wm->dig, sizeof(wm->dig));
5516+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, 0);
5517+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, WM97XX_PRP_DET_DIG);
5518+ break;
5519+ case WM97XX_DIG_RESTORE:
5520+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, wm->dig_save[1]);
5521+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, wm->dig_save[2]);
5522+ break;
5523+ case WM97XX_PHY_INIT:
5524+ init_wm9705_phy(wm);
5525+ break;
5526+ default:
5527+ return -EINVAL;
5528+ }
5529+ return 0;
5530+}
5531+
5532+static inline int is_pden (struct wm97xx* wm)
5533+{
5534+ return wm->dig[2] & WM9705_PDEN;
5535+}
5536+
5537+/*
5538+ * Read a sample from the WM9705 adc in polling mode.
5539+ */
5540+static int wm9705_poll_sample (struct wm97xx* wm, int adcsel, int *sample)
5541+{
5542+ int timeout = 5 * delay;
5543+
5544+ if (!wm->pen_probably_down) {
5545+ u16 data = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
5546+ if (!(data & WM97XX_PEN_DOWN))
5547+ return RC_PENUP;
5548+ wm->pen_probably_down = 1;
5549+ }
5550+
5551+ /* set up digitiser */
5552+ if (adcsel & 0x8000)
5553+ adcsel = ((adcsel & 0x7fff) + 3) << 12;
5554+
5555+ if (wm->mach_ops && wm->mach_ops->pre_sample)
5556+ wm->mach_ops->pre_sample(adcsel);
5557+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, adcsel | WM97XX_POLL | WM97XX_DELAY(delay));
5558+
5559+ /* wait 3 AC97 time slots + delay for conversion */
5560+ poll_delay (delay);
5561+
5562+ /* wait for POLL to go low */
5563+ while ((wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER1) & WM97XX_POLL) && timeout) {
5564+ udelay(AC97_LINK_FRAME);
5565+ timeout--;
5566+ }
5567+
5568+ if (timeout <= 0) {
5569+ /* If PDEN is set, we can get a timeout when pen goes up */
5570+ if (is_pden(wm))
5571+ wm->pen_probably_down = 0;
5572+ else
5573+ dbg ("adc sample timeout");
5574+ return RC_PENUP;
5575+ }
5576+
5577+ *sample = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
5578+ if (wm->mach_ops && wm->mach_ops->post_sample)
5579+ wm->mach_ops->post_sample(adcsel);
5580+
5581+ /* check we have correct sample */
5582+ if ((*sample & WM97XX_ADCSEL_MASK) != adcsel) {
5583+ dbg ("adc wrong sample, read %x got %x", adcsel,
5584+ *sample & WM97XX_ADCSEL_MASK);
5585+ return RC_PENUP;
5586+ }
5587+
5588+ if (!(*sample & WM97XX_PEN_DOWN)) {
5589+ wm->pen_probably_down = 0;
5590+ return RC_PENUP;
5591+ }
5592+
5593+ return RC_VALID;
5594+}
5595+
5596+/*
5597+ * Sample the WM9705 touchscreen in polling mode
5598+ */
5599+static int wm9705_poll_touch(struct wm97xx* wm, struct wm97xx_data *data)
5600+{
5601+ int rc;
5602+
5603+ if ((rc = wm9705_poll_sample(wm, WM97XX_ADCSEL_X, &data->x)) != RC_VALID)
5604+ return rc;
5605+ if ((rc = wm9705_poll_sample(wm, WM97XX_ADCSEL_Y, &data->y)) != RC_VALID)
5606+ return rc;
5607+ if (pil) {
5608+ if ((rc = wm9705_poll_sample(wm, WM97XX_ADCSEL_PRES, &data->p)) != RC_VALID)
5609+ return rc;
5610+ } else
5611+ data->p = DEFAULT_PRESSURE;
5612+
5613+ return RC_VALID;
5614+}
5615+
5616+/*
5617+ * Enable WM9705 continuous mode, i.e. touch data is streamed across an AC97 slot
5618+ */
5619+static int wm9705_acc_enable (struct wm97xx* wm, int enable)
5620+{
5621+ u16 dig1, dig2;
5622+ int ret = 0;
5623+
5624+ dig1 = wm->dig[1];
5625+ dig2 = wm->dig[2];
5626+
5627+ if (enable) {
5628+ /* continous mode */
5629+ if (wm->mach_ops->acc_startup && (ret = wm->mach_ops->acc_startup(wm)) < 0)
5630+ return ret;
5631+ dig1 &= ~(WM97XX_CM_RATE_MASK | WM97XX_ADCSEL_MASK |
5632+ WM97XX_DELAY_MASK | WM97XX_SLT_MASK);
5633+ dig1 |= WM97XX_CTC | WM97XX_COO | WM97XX_SLEN |
5634+ WM97XX_DELAY (delay) |
5635+ WM97XX_SLT (wm->acc_slot) |
5636+ WM97XX_RATE (wm->acc_rate);
5637+ if (pil)
5638+ dig1 |= WM97XX_ADCSEL_PRES;
5639+ dig2 |= WM9705_PDEN;
5640+ } else {
5641+ dig1 &= ~(WM97XX_CTC | WM97XX_COO | WM97XX_SLEN);
5642+ dig2 &= ~WM9705_PDEN;
5643+ if (wm->mach_ops->acc_shutdown)
5644+ wm->mach_ops->acc_shutdown(wm);
5645+ }
5646+
5647+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, dig1);
5648+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, dig2);
5649+ return ret;
5650+}
5651+
5652+struct wm97xx_codec_drv wm97xx_codec = {
5653+ .id = WM9705_ID2,
5654+ .name = "wm9705",
5655+ .poll_sample = wm9705_poll_sample,
5656+ .poll_touch = wm9705_poll_touch,
5657+ .acc_enable = wm9705_acc_enable,
5658+ .digitiser_ioctl = wm9705_digitiser_ioctl,
5659+};
5660+
5661+EXPORT_SYMBOL_GPL(wm97xx_codec);
5662+
5663+/* Module information */
5664+MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com");
5665+MODULE_DESCRIPTION("WM9705 Touch Screen Driver");
5666+MODULE_LICENSE("GPL");
5667diff --git a/drivers/input/touchscreen/wm9712.c b/drivers/input/touchscreen/wm9712.c
5668new file mode 100644
5669index 0000000..99433e9
5670--- /dev/null
5671+++ b/drivers/input/touchscreen/wm9712.c
5672@@ -0,0 +1,464 @@
5673+/*
5674+ * wm9712.c -- Codec driver for Wolfson WM9712 AC97 Codecs.
5675+ *
5676+ * Copyright 2003, 2004, 2005, 2006 Wolfson Microelectronics PLC.
5677+ * Author: Liam Girdwood
5678+ * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com
5679+ * Parts Copyright : Ian Molton <spyro@f2s.com>
5680+ * Andrew Zabolotny <zap@homelink.ru>
5681+ * Russell King <rmk@arm.linux.org.uk>
5682+ *
5683+ * This program is free software; you can redistribute it and/or modify it
5684+ * under the terms of the GNU General Public License as published by the
5685+ * Free Software Foundation; either version 2 of the License, or (at your
5686+ * option) any later version.
5687+ *
5688+ * Revision history
5689+ * 4th Jul 2005 Initial version.
5690+ * 6th Sep 2006 Mike Arthur <linux@wolfsonmicro.com>
5691+ * Added pre and post sample calls.
5692+ *
5693+ */
5694+
5695+#include <linux/module.h>
5696+#include <linux/moduleparam.h>
5697+#include <linux/version.h>
5698+#include <linux/kernel.h>
5699+#include <linux/input.h>
5700+#include <linux/delay.h>
5701+#include <linux/bitops.h>
5702+#include <linux/wm97xx.h>
5703+
5704+#define TS_NAME "wm97xx"
5705+#define WM9712_VERSION "0.61"
5706+#define DEFAULT_PRESSURE 0xb0c0
5707+
5708+/*
5709+ * Debug
5710+ */
5711+#if 0
5712+#define dbg(format, arg...) printk(KERN_DEBUG TS_NAME ": " format "\n" , ## arg)
5713+#else
5714+#define dbg(format, arg...)
5715+#endif
5716+#define err(format, arg...) printk(KERN_ERR TS_NAME ": " format "\n" , ## arg)
5717+#define info(format, arg...) printk(KERN_INFO TS_NAME ": " format "\n" , ## arg)
5718+#define warn(format, arg...) printk(KERN_WARNING TS_NAME ": " format "\n" , ## arg)
5719+
5720+/*
5721+ * Module parameters
5722+ */
5723+
5724+/*
5725+ * Set internal pull up for pen detect.
5726+ *
5727+ * Pull up is in the range 1.02k (least sensitive) to 64k (most sensitive)
5728+ * i.e. pull up resistance = 64k Ohms / rpu.
5729+ *
5730+ * Adjust this value if you are having problems with pen detect not
5731+ * detecting any down event.
5732+ */
5733+static int rpu = 8;
5734+module_param(rpu, int, 0);
5735+MODULE_PARM_DESC(rpu, "Set internal pull up resitor for pen detect.");
5736+
5737+/*
5738+ * Set current used for pressure measurement.
5739+ *
5740+ * Set pil = 2 to use 400uA
5741+ * pil = 1 to use 200uA and
5742+ * pil = 0 to disable pressure measurement.
5743+ *
5744+ * This is used to increase the range of values returned by the adc
5745+ * when measureing touchpanel pressure.
5746+ */
5747+static int pil = 0;
5748+module_param(pil, int, 0);
5749+MODULE_PARM_DESC(pil, "Set current used for pressure measurement.");
5750+
5751+/*
5752+ * Set threshold for pressure measurement.
5753+ *
5754+ * Pen down pressure below threshold is ignored.
5755+ */
5756+static int pressure = DEFAULT_PRESSURE & 0xfff;
5757+module_param(pressure, int, 0);
5758+MODULE_PARM_DESC(pressure, "Set threshold for pressure measurement.");
5759+
5760+/*
5761+ * Set adc sample delay.
5762+ *
5763+ * For accurate touchpanel measurements, some settling time may be
5764+ * required between the switch matrix applying a voltage across the
5765+ * touchpanel plate and the ADC sampling the signal.
5766+ *
5767+ * This delay can be set by setting delay = n, where n is the array
5768+ * position of the delay in the array delay_table below.
5769+ * Long delays > 1ms are supported for completeness, but are not
5770+ * recommended.
5771+ */
5772+static int delay = 3;
5773+module_param(delay, int, 0);
5774+MODULE_PARM_DESC(delay, "Set adc sample delay.");
5775+
5776+/*
5777+ * Set five_wire = 1 to use a 5 wire touchscreen.
5778+ *
5779+ * NOTE: Five wire mode does not allow for readback of pressure.
5780+ */
5781+static int five_wire;
5782+module_param(five_wire, int, 0);
5783+MODULE_PARM_DESC(five_wire, "Set to '1' to use 5-wire touchscreen.");
5784+
5785+/*
5786+ * Set adc mask function.
5787+ *
5788+ * Sources of glitch noise, such as signals driving an LCD display, may feed
5789+ * through to the touch screen plates and affect measurement accuracy. In
5790+ * order to minimise this, a signal may be applied to the MASK pin to delay or
5791+ * synchronise the sampling.
5792+ *
5793+ * 0 = No delay or sync
5794+ * 1 = High on pin stops conversions
5795+ * 2 = Edge triggered, edge on pin delays conversion by delay param (above)
5796+ * 3 = Edge triggered, edge on pin starts conversion after delay param
5797+ */
5798+static int mask = 0;
5799+module_param(mask, int, 0);
5800+MODULE_PARM_DESC(mask, "Set adc mask function.");
5801+
5802+/*
5803+ * Coordinate Polling Enable.
5804+ *
5805+ * Set to 1 to enable coordinate polling. e.g. x,y[,p] is sampled together
5806+ * for every poll.
5807+ */
5808+static int coord = 0;
5809+module_param(coord, int, 0);
5810+MODULE_PARM_DESC(coord, "Polling coordinate mode");
5811+
5812+/*
5813+ * ADC sample delay times in uS
5814+ */
5815+static const int delay_table[] = {
5816+ 21, // 1 AC97 Link frames
5817+ 42, // 2
5818+ 84, // 4
5819+ 167, // 8
5820+ 333, // 16
5821+ 667, // 32
5822+ 1000, // 48
5823+ 1333, // 64
5824+ 2000, // 96
5825+ 2667, // 128
5826+ 3333, // 160
5827+ 4000, // 192
5828+ 4667, // 224
5829+ 5333, // 256
5830+ 6000, // 288
5831+ 0 // No delay, switch matrix always on
5832+};
5833+
5834+/*
5835+ * Delay after issuing a POLL command.
5836+ *
5837+ * The delay is 3 AC97 link frames + the touchpanel settling delay
5838+ */
5839+static inline void poll_delay(int d)
5840+{
5841+ udelay (3 * AC97_LINK_FRAME + delay_table [d]);
5842+}
5843+
5844+/*
5845+ * set up the physical settings of the WM9712
5846+ */
5847+static void init_wm9712_phy(struct wm97xx* wm)
5848+{
5849+ u16 dig1 = 0;
5850+ u16 dig2 = WM97XX_RPR | WM9712_RPU(1);
5851+
5852+ /* WM9712 rpu */
5853+ if (rpu) {
5854+ dig2 &= 0xffc0;
5855+ dig2 |= WM9712_RPU(rpu);
5856+ dbg("setting pen detect pull-up to %d Ohms",64000 / rpu);
5857+ }
5858+
5859+ /* touchpanel pressure current*/
5860+ if (pil == 2) {
5861+ dig2 |= WM9712_PIL;
5862+ dbg("setting pressure measurement current to 400uA.");
5863+ } else if (pil)
5864+ dbg("setting pressure measurement current to 200uA.");
5865+ if(!pil)
5866+ pressure = 0;
5867+
5868+ /* WM9712 five wire */
5869+ if (five_wire) {
5870+ dig2 |= WM9712_45W;
5871+ dbg("setting 5-wire touchscreen mode.");
5872+ }
5873+
5874+ /* polling mode sample settling delay */
5875+ if (delay < 0 || delay > 15) {
5876+ dbg("supplied delay out of range.");
5877+ delay = 4;
5878+ }
5879+ dig1 &= 0xff0f;
5880+ dig1 |= WM97XX_DELAY(delay);
5881+ dbg("setting adc sample delay to %d u Secs.", delay_table[delay]);
5882+
5883+ /* mask */
5884+ dig2 |= ((mask & 0x3) << 6);
5885+ if (mask) {
5886+ u16 reg;
5887+ /* Set GPIO4 as Mask Pin*/
5888+ reg = wm97xx_reg_read(wm, AC97_MISC_AFE);
5889+ wm97xx_reg_write(wm, AC97_MISC_AFE, reg | WM97XX_GPIO_4);
5890+ reg = wm97xx_reg_read(wm, AC97_GPIO_CFG);
5891+ wm97xx_reg_write(wm, AC97_GPIO_CFG, reg | WM97XX_GPIO_4);
5892+ }
5893+
5894+ /* wait - coord mode */
5895+ if(coord)
5896+ dig2 |= WM9712_WAIT;
5897+
5898+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, dig1);
5899+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, dig2);
5900+}
5901+
5902+static int wm9712_digitiser_ioctl(struct wm97xx* wm, int cmd)
5903+{
5904+ u16 dig2 = wm->dig[2];
5905+
5906+ switch(cmd) {
5907+ case WM97XX_DIG_START:
5908+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, dig2 | WM97XX_PRP_DET_DIG);
5909+ wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD); /* dummy read */
5910+ break;
5911+ case WM97XX_DIG_STOP:
5912+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, dig2 & ~WM97XX_PRP_DET_DIG);
5913+ break;
5914+ case WM97XX_AUX_PREPARE:
5915+ memcpy(wm->dig_save, wm->dig, sizeof(wm->dig));
5916+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, 0);
5917+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, WM97XX_PRP_DET_DIG);
5918+ break;
5919+ case WM97XX_DIG_RESTORE:
5920+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, wm->dig_save[1]);
5921+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, wm->dig_save[2]);
5922+ break;
5923+ case WM97XX_PHY_INIT:
5924+ init_wm9712_phy(wm);
5925+ break;
5926+ default:
5927+ return -EINVAL;
5928+ }
5929+ return 0;
5930+}
5931+
5932+static inline int is_pden (struct wm97xx* wm)
5933+{
5934+ return wm->dig[2] & WM9712_PDEN;
5935+}
5936+
5937+/*
5938+ * Read a sample from the WM9712 adc in polling mode.
5939+ */
5940+static int wm9712_poll_sample (struct wm97xx* wm, int adcsel, int *sample)
5941+{
5942+ int timeout = 5 * delay;
5943+
5944+ if (!wm->pen_probably_down) {
5945+ u16 data = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
5946+ if (!(data & WM97XX_PEN_DOWN))
5947+ return RC_PENUP;
5948+ wm->pen_probably_down = 1;
5949+ }
5950+
5951+ /* set up digitiser */
5952+ if (adcsel & 0x8000)
5953+ adcsel = ((adcsel & 0x7fff) + 3) << 12;
5954+
5955+ if (wm->mach_ops && wm->mach_ops->pre_sample)
5956+ wm->mach_ops->pre_sample(adcsel);
5957+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, adcsel | WM97XX_POLL | WM97XX_DELAY(delay));
5958+
5959+ /* wait 3 AC97 time slots + delay for conversion */
5960+ poll_delay (delay);
5961+
5962+ /* wait for POLL to go low */
5963+ while ((wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER1) & WM97XX_POLL) && timeout) {
5964+ udelay(AC97_LINK_FRAME);
5965+ timeout--;
5966+ }
5967+
5968+ if (timeout <= 0) {
5969+ /* If PDEN is set, we can get a timeout when pen goes up */
5970+ if (is_pden(wm))
5971+ wm->pen_probably_down = 0;
5972+ else
5973+ dbg ("adc sample timeout");
5974+ return RC_PENUP;
5975+ }
5976+
5977+ *sample = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
5978+ if (wm->mach_ops && wm->mach_ops->post_sample)
5979+ wm->mach_ops->post_sample(adcsel);
5980+
5981+ /* check we have correct sample */
5982+ if ((*sample & WM97XX_ADCSEL_MASK) != adcsel) {
5983+ dbg ("adc wrong sample, read %x got %x", adcsel,
5984+ *sample & WM97XX_ADCSEL_MASK);
5985+ return RC_PENUP;
5986+ }
5987+
5988+ if (!(*sample & WM97XX_PEN_DOWN)) {
5989+ wm->pen_probably_down = 0;
5990+ return RC_PENUP;
5991+ }
5992+
5993+ return RC_VALID;
5994+}
5995+
5996+/*
5997+ * Read a coord from the WM9712 adc in polling mode.
5998+ */
5999+static int wm9712_poll_coord (struct wm97xx* wm, struct wm97xx_data *data)
6000+{
6001+ int timeout = 5 * delay;
6002+
6003+ if (!wm->pen_probably_down) {
6004+ u16 data = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
6005+ if (!(data & WM97XX_PEN_DOWN))
6006+ return RC_PENUP;
6007+ wm->pen_probably_down = 1;
6008+ }
6009+
6010+ /* set up digitiser */
6011+ if (wm->mach_ops && wm->mach_ops->pre_sample)
6012+ wm->mach_ops->pre_sample(WM97XX_ADCSEL_X | WM97XX_ADCSEL_Y);
6013+
6014+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1,
6015+ WM97XX_COO | WM97XX_POLL | WM97XX_DELAY(delay));
6016+
6017+ /* wait 3 AC97 time slots + delay for conversion and read x */
6018+ poll_delay(delay);
6019+ data->x = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
6020+ /* wait for POLL to go low */
6021+ while ((wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER1) & WM97XX_POLL) && timeout) {
6022+ udelay(AC97_LINK_FRAME);
6023+ timeout--;
6024+ }
6025+
6026+ if (timeout <= 0) {
6027+ /* If PDEN is set, we can get a timeout when pen goes up */
6028+ if (is_pden(wm))
6029+ wm->pen_probably_down = 0;
6030+ else
6031+ dbg ("adc sample timeout");
6032+ return RC_PENUP;
6033+ }
6034+
6035+ /* read back y data */
6036+ data->y = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
6037+ if (pil)
6038+ data->p = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
6039+ else
6040+ data->p = DEFAULT_PRESSURE;
6041+
6042+ if (wm->mach_ops && wm->mach_ops->post_sample)
6043+ wm->mach_ops->post_sample(WM97XX_ADCSEL_X | WM97XX_ADCSEL_Y);
6044+
6045+ /* check we have correct sample */
6046+ if (!(data->x & WM97XX_ADCSEL_X) || !(data->y & WM97XX_ADCSEL_Y))
6047+ goto err;
6048+ if(pil && !(data->p & WM97XX_ADCSEL_PRES))
6049+ goto err;
6050+
6051+ if (!(data->x & WM97XX_PEN_DOWN)) {
6052+ wm->pen_probably_down = 0;
6053+ return RC_PENUP;
6054+ }
6055+ return RC_VALID;
6056+err:
6057+ return RC_PENUP;
6058+}
6059+
6060+/*
6061+ * Sample the WM9712 touchscreen in polling mode
6062+ */
6063+static int wm9712_poll_touch(struct wm97xx* wm, struct wm97xx_data *data)
6064+{
6065+ int rc;
6066+
6067+ if(coord) {
6068+ if((rc = wm9712_poll_coord(wm, data)) != RC_VALID)
6069+ return rc;
6070+ } else {
6071+ if ((rc = wm9712_poll_sample(wm, WM97XX_ADCSEL_X, &data->x)) != RC_VALID)
6072+ return rc;
6073+
6074+ if ((rc = wm9712_poll_sample(wm, WM97XX_ADCSEL_Y, &data->y)) != RC_VALID)
6075+ return rc;
6076+
6077+ if (pil && !five_wire) {
6078+ if ((rc = wm9712_poll_sample(wm, WM97XX_ADCSEL_PRES, &data->p)) != RC_VALID)
6079+ return rc;
6080+ } else
6081+ data->p = DEFAULT_PRESSURE;
6082+ }
6083+ return RC_VALID;
6084+}
6085+
6086+/*
6087+ * Enable WM9712 continuous mode, i.e. touch data is streamed across an AC97 slot
6088+ */
6089+static int wm9712_acc_enable (struct wm97xx* wm, int enable)
6090+{
6091+ u16 dig1, dig2;
6092+ int ret = 0;
6093+
6094+ dig1 = wm->dig[1];
6095+ dig2 = wm->dig[2];
6096+
6097+ if (enable) {
6098+ /* continous mode */
6099+ if (wm->mach_ops->acc_startup && (ret = wm->mach_ops->acc_startup(wm)) < 0)
6100+ return ret;
6101+ dig1 &= ~(WM97XX_CM_RATE_MASK | WM97XX_ADCSEL_MASK |
6102+ WM97XX_DELAY_MASK | WM97XX_SLT_MASK);
6103+ dig1 |= WM97XX_CTC | WM97XX_COO | WM97XX_SLEN |
6104+ WM97XX_DELAY (delay) |
6105+ WM97XX_SLT (wm->acc_slot) |
6106+ WM97XX_RATE (wm->acc_rate);
6107+ if (pil)
6108+ dig1 |= WM97XX_ADCSEL_PRES;
6109+ dig2 |= WM9712_PDEN;
6110+ } else {
6111+ dig1 &= ~(WM97XX_CTC | WM97XX_COO | WM97XX_SLEN);
6112+ dig2 &= ~WM9712_PDEN;
6113+ if (wm->mach_ops->acc_shutdown)
6114+ wm->mach_ops->acc_shutdown(wm);
6115+ }
6116+
6117+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, dig1);
6118+ wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, dig2);
6119+ return 0;
6120+}
6121+
6122+struct wm97xx_codec_drv wm97xx_codec = {
6123+ .id = WM9712_ID2,
6124+ .name = "wm9712",
6125+ .poll_sample = wm9712_poll_sample,
6126+ .poll_touch = wm9712_poll_touch,
6127+ .acc_enable = wm9712_acc_enable,
6128+ .digitiser_ioctl = wm9712_digitiser_ioctl,
6129+};
6130+
6131+EXPORT_SYMBOL_GPL(wm97xx_codec);
6132+
6133+/* Module information */
6134+MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com");
6135+MODULE_DESCRIPTION("WM9712 Touch Screen Driver");
6136+MODULE_LICENSE("GPL");
6137diff --git a/drivers/input/touchscreen/wm9713.c b/drivers/input/touchscreen/wm9713.c
6138new file mode 100644
6139index 0000000..42f5f30
6140--- /dev/null
6141+++ b/drivers/input/touchscreen/wm9713.c
6142@@ -0,0 +1,461 @@
6143+/*
6144+ * wm9713.c -- Codec touch driver for Wolfson WM9713 AC97 Codec.
6145+ *
6146+ * Copyright 2003, 2004, 2005, 2006 Wolfson Microelectronics PLC.
6147+ * Author: Liam Girdwood
6148+ * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com
6149+ * Parts Copyright : Ian Molton <spyro@f2s.com>
6150+ * Andrew Zabolotny <zap@homelink.ru>
6151+ * Russell King <rmk@arm.linux.org.uk>
6152+ *
6153+ * This program is free software; you can redistribute it and/or modify it
6154+ * under the terms of the GNU General Public License as published by the
6155+ * Free Software Foundation; either version 2 of the License, or (at your
6156+ * option) any later version.
6157+ *
6158+ * Revision history
6159+ * 6th Sep 2006 Mike Arthur <linux@wolfsonmicro.com>
6160+ * Added pre and post sample calls.
6161+ *
6162+ */
6163+
6164+#include <linux/module.h>
6165+#include <linux/moduleparam.h>
6166+#include <linux/version.h>
6167+#include <linux/kernel.h>
6168+#include <linux/input.h>
6169+#include <linux/delay.h>
6170+#include <linux/bitops.h>
6171+#include <linux/wm97xx.h>
6172+
6173+#define TS_NAME "wm97xx"
6174+#define WM9713_VERSION "0.53"
6175+#define DEFAULT_PRESSURE 0xb0c0
6176+
6177+/*
6178+ * Debug
6179+ */
6180+#if 0
6181+#define dbg(format, arg...) printk(KERN_DEBUG TS_NAME ": " format "\n" , ## arg)
6182+#else
6183+#define dbg(format, arg...)
6184+#endif
6185+#define err(format, arg...) printk(KERN_ERR TS_NAME ": " format "\n" , ## arg)
6186+#define info(format, arg...) printk(KERN_INFO TS_NAME ": " format "\n" , ## arg)
6187+#define warn(format, arg...) printk(KERN_WARNING TS_NAME ": " format "\n" , ## arg)
6188+
6189+/*
6190+ * Module parameters
6191+ */
6192+
6193+/*
6194+ * Set internal pull up for pen detect.
6195+ *
6196+ * Pull up is in the range 1.02k (least sensitive) to 64k (most sensitive)
6197+ * i.e. pull up resistance = 64k Ohms / rpu.
6198+ *
6199+ * Adjust this value if you are having problems with pen detect not
6200+ * detecting any down event.
6201+ */
6202+static int rpu = 8;
6203+module_param(rpu, int, 0);
6204+MODULE_PARM_DESC(rpu, "Set internal pull up resitor for pen detect.");
6205+
6206+/*
6207+ * Set current used for pressure measurement.
6208+ *
6209+ * Set pil = 2 to use 400uA
6210+ * pil = 1 to use 200uA and
6211+ * pil = 0 to disable pressure measurement.
6212+ *
6213+ * This is used to increase the range of values returned by the adc
6214+ * when measureing touchpanel pressure.
6215+ */
6216+static int pil = 0;
6217+module_param(pil, int, 0);
6218+MODULE_PARM_DESC(pil, "Set current used for pressure measurement.");
6219+
6220+/*
6221+ * Set threshold for pressure measurement.
6222+ *
6223+ * Pen down pressure below threshold is ignored.
6224+ */
6225+static int pressure = DEFAULT_PRESSURE & 0xfff;
6226+module_param(pressure, int, 0);
6227+MODULE_PARM_DESC(pressure, "Set threshold for pressure measurement.");
6228+
6229+/*
6230+ * Set adc sample delay.
6231+ *
6232+ * For accurate touchpanel measurements, some settling time may be
6233+ * required between the switch matrix applying a voltage across the
6234+ * touchpanel plate and the ADC sampling the signal.
6235+ *
6236+ * This delay can be set by setting delay = n, where n is the array
6237+ * position of the delay in the array delay_table below.
6238+ * Long delays > 1ms are supported for completeness, but are not
6239+ * recommended.
6240+ */
6241+static int delay = 4;
6242+module_param(delay, int, 0);
6243+MODULE_PARM_DESC(delay, "Set adc sample delay.");
6244+
6245+/*
6246+ * Set adc mask function.
6247+ *
6248+ * Sources of glitch noise, such as signals driving an LCD display, may feed
6249+ * through to the touch screen plates and affect measurement accuracy. In
6250+ * order to minimise this, a signal may be applied to the MASK pin to delay or
6251+ * synchronise the sampling.
6252+ *
6253+ * 0 = No delay or sync
6254+ * 1 = High on pin stops conversions
6255+ * 2 = Edge triggered, edge on pin delays conversion by delay param (above)
6256+ * 3 = Edge triggered, edge on pin starts conversion after delay param
6257+ */
6258+static int mask = 0;
6259+module_param(mask, int, 0);
6260+MODULE_PARM_DESC(mask, "Set adc mask function.");
6261+
6262+/*
6263+ * Coordinate Polling Enable.
6264+ *
6265+ * Set to 1 to enable coordinate polling. e.g. x,y[,p] is sampled together
6266+ * for every poll.
6267+ */
6268+static int coord = 0;
6269+module_param(coord, int, 0);
6270+MODULE_PARM_DESC(coord, "Polling coordinate mode");
6271+
6272+/*
6273+ * ADC sample delay times in uS
6274+ */
6275+static const int delay_table[] = {
6276+ 21, // 1 AC97 Link frames
6277+ 42, // 2
6278+ 84, // 4
6279+ 167, // 8
6280+ 333, // 16
6281+ 667, // 32
6282+ 1000, // 48
6283+ 1333, // 64
6284+ 2000, // 96
6285+ 2667, // 128
6286+ 3333, // 160
6287+ 4000, // 192
6288+ 4667, // 224
6289+ 5333, // 256
6290+ 6000, // 288
6291+ 0 // No delay, switch matrix always on
6292+};
6293+
6294+/*
6295+ * Delay after issuing a POLL command.
6296+ *
6297+ * The delay is 3 AC97 link frames + the touchpanel settling delay
6298+ */
6299+static inline void poll_delay(int d)
6300+{
6301+ udelay (3 * AC97_LINK_FRAME + delay_table [d]);
6302+}
6303+
6304+/*
6305+ * set up the physical settings of the WM9713
6306+ */
6307+static void init_wm9713_phy(struct wm97xx* wm)
6308+{
6309+ u16 dig1 = 0, dig2, dig3;
6310+
6311+ /* default values */
6312+ dig2 = WM97XX_DELAY(4) | WM97XX_SLT(5);
6313+ dig3= WM9712_RPU(1);
6314+
6315+ /* rpu */
6316+ if (rpu) {
6317+ dig3 &= 0xffc0;
6318+ dig3 |= WM9712_RPU(rpu);
6319+ info("setting pen detect pull-up to %d Ohms",64000 / rpu);
6320+ }
6321+
6322+ /* touchpanel pressure */
6323+ if (pil == 2) {
6324+ dig3 |= WM9712_PIL;
6325+ info("setting pressure measurement current to 400uA.");
6326+ } else if (pil)
6327+ info ("setting pressure measurement current to 200uA.");
6328+ if(!pil)
6329+ pressure = 0;
6330+
6331+ /* sample settling delay */
6332+ if (delay < 0 || delay > 15) {
6333+ info ("supplied delay out of range.");
6334+ delay = 4;
6335+ info("setting adc sample delay to %d u Secs.", delay_table[delay]);
6336+ }
6337+ dig2 &= 0xff0f;
6338+ dig2 |= WM97XX_DELAY(delay);
6339+
6340+ /* mask */
6341+ dig3 |= ((mask & 0x3) << 4);
6342+ if(coord)
6343+ dig3 |= WM9713_WAIT;
6344+
6345+ wm->misc = wm97xx_reg_read(wm, 0x5a);
6346+
6347+ wm97xx_reg_write(wm, AC97_WM9713_DIG1, dig1);
6348+ wm97xx_reg_write(wm, AC97_WM9713_DIG2, dig2);
6349+ wm97xx_reg_write(wm, AC97_WM9713_DIG3, dig3);
6350+ wm97xx_reg_write(wm, AC97_GPIO_STICKY, 0x0);
6351+}
6352+
6353+static int wm9713_digitiser_ioctl(struct wm97xx* wm, int cmd)
6354+{
6355+ u16 val = 0;
6356+
6357+ switch(cmd){
6358+ case WM97XX_DIG_START:
6359+ val = wm97xx_reg_read(wm, AC97_EXTENDED_MID);
6360+ wm97xx_reg_write(wm, AC97_EXTENDED_MID, val & 0x7fff);
6361+ wm97xx_reg_write(wm, AC97_WM9713_DIG3, wm->dig[2] | WM97XX_PRP_DET_DIG);
6362+ wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD); /* dummy read */
6363+ break;
6364+ case WM97XX_DIG_STOP:
6365+ wm97xx_reg_write(wm, AC97_WM9713_DIG3, wm->dig[2] & ~WM97XX_PRP_DET_DIG);
6366+ val = wm97xx_reg_read(wm, AC97_EXTENDED_MID);
6367+ wm97xx_reg_write(wm, AC97_EXTENDED_MID, val | 0x8000);
6368+ break;
6369+ case WM97XX_AUX_PREPARE:
6370+ memcpy(wm->dig_save, wm->dig, sizeof(wm->dig));
6371+ wm97xx_reg_write(wm, AC97_WM9713_DIG1, 0);
6372+ wm97xx_reg_write(wm, AC97_WM9713_DIG2, 0);
6373+ wm97xx_reg_write(wm, AC97_WM9713_DIG3, WM97XX_PRP_DET_DIG);
6374+ break;
6375+ case WM97XX_DIG_RESTORE:
6376+ wm97xx_reg_write(wm, AC97_WM9713_DIG1, wm->dig_save[0]);
6377+ wm97xx_reg_write(wm, AC97_WM9713_DIG2, wm->dig_save[1]);
6378+ wm97xx_reg_write(wm, AC97_WM9713_DIG3, wm->dig_save[2]);
6379+ break;
6380+ case WM97XX_PHY_INIT:
6381+ init_wm9713_phy(wm);
6382+ break;
6383+ default:
6384+ return -EINVAL;
6385+ }
6386+ return 0;
6387+}
6388+
6389+static inline int is_pden (struct wm97xx* wm)
6390+{
6391+ return wm->dig[2] & WM9713_PDEN;
6392+}
6393+
6394+/*
6395+ * Read a sample from the WM9713 adc in polling mode.
6396+ */
6397+static int wm9713_poll_sample (struct wm97xx* wm, int adcsel, int *sample)
6398+{
6399+ u16 dig1;
6400+ int timeout = 5 * delay;
6401+
6402+ if (!wm->pen_probably_down) {
6403+ u16 data = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
6404+ if (!(data & WM97XX_PEN_DOWN))
6405+ return RC_PENUP;
6406+ wm->pen_probably_down = 1;
6407+ }
6408+
6409+ /* set up digitiser */
6410+ if (adcsel & 0x8000)
6411+ adcsel = 1 << ((adcsel & 0x7fff) + 3);
6412+
6413+ dig1 = wm97xx_reg_read(wm, AC97_WM9713_DIG1);
6414+ dig1 &= ~WM9713_ADCSEL_MASK;
6415+
6416+ if (wm->mach_ops && wm->mach_ops->pre_sample)
6417+ wm->mach_ops->pre_sample(adcsel);
6418+ wm97xx_reg_write(wm, AC97_WM9713_DIG1, dig1 | adcsel |WM9713_POLL);
6419+
6420+ /* wait 3 AC97 time slots + delay for conversion */
6421+ poll_delay(delay);
6422+
6423+ /* wait for POLL to go low */
6424+ while ((wm97xx_reg_read(wm, AC97_WM9713_DIG1) & WM9713_POLL) && timeout) {
6425+ udelay(AC97_LINK_FRAME);
6426+ timeout--;
6427+ }
6428+
6429+ if (timeout <= 0) {
6430+ /* If PDEN is set, we can get a timeout when pen goes up */
6431+ if (is_pden(wm))
6432+ wm->pen_probably_down = 0;
6433+ else
6434+ dbg ("adc sample timeout");
6435+ return RC_PENUP;
6436+ }
6437+
6438+ *sample =wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
6439+ if (wm->mach_ops && wm->mach_ops->post_sample)
6440+ wm->mach_ops->post_sample(adcsel);
6441+
6442+ /* check we have correct sample */
6443+ if ((*sample & WM97XX_ADCSRC_MASK) != ffs(adcsel >> 1) << 12) {
6444+ dbg ("adc wrong sample, read %x got %x", adcsel,
6445+ *sample & WM97XX_ADCSRC_MASK);
6446+ return RC_PENUP;
6447+ }
6448+
6449+ if (!(*sample & WM97XX_PEN_DOWN)) {
6450+ wm->pen_probably_down = 0;
6451+ return RC_PENUP;
6452+ }
6453+
6454+ return RC_VALID;
6455+}
6456+
6457+/*
6458+ * Read a coordinate from the WM9713 adc in polling mode.
6459+ */
6460+static int wm9713_poll_coord (struct wm97xx* wm, struct wm97xx_data *data)
6461+{
6462+ u16 dig1;
6463+ int timeout = 5 * delay;
6464+
6465+ if (!wm->pen_probably_down) {
6466+ u16 data = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
6467+ if (!(data & WM97XX_PEN_DOWN))
6468+ return RC_PENUP;
6469+ wm->pen_probably_down = 1;
6470+ }
6471+
6472+ /* set up digitiser */
6473+ dig1 = wm97xx_reg_read(wm, AC97_WM9713_DIG1);
6474+ dig1 &= ~WM9713_ADCSEL_MASK;
6475+ if(pil)
6476+ dig1 |= WM97XX_ADCSEL_PRES;
6477+
6478+ if (wm->mach_ops && wm->mach_ops->pre_sample)
6479+ wm->mach_ops->pre_sample(WM97XX_ADCSEL_X | WM97XX_ADCSEL_Y);
6480+ wm97xx_reg_write(wm, AC97_WM9713_DIG1, dig1 | WM9713_POLL | WM9713_COO);
6481+
6482+ /* wait 3 AC97 time slots + delay for conversion */
6483+ poll_delay(delay);
6484+ data->x = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
6485+ /* wait for POLL to go low */
6486+ while ((wm97xx_reg_read(wm, AC97_WM9713_DIG1) & WM9713_POLL) && timeout) {
6487+ udelay(AC97_LINK_FRAME);
6488+ timeout--;
6489+ }
6490+
6491+ if (timeout <= 0) {
6492+ /* If PDEN is set, we can get a timeout when pen goes up */
6493+ if (is_pden(wm))
6494+ wm->pen_probably_down = 0;
6495+ else
6496+ dbg ("adc sample timeout");
6497+ return RC_PENUP;
6498+ }
6499+
6500+ /* read back data */
6501+ data->y = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
6502+ if (pil)
6503+ data->p = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
6504+ else
6505+ data->p = DEFAULT_PRESSURE;
6506+
6507+ if (wm->mach_ops && wm->mach_ops->post_sample)
6508+ wm->mach_ops->post_sample(WM97XX_ADCSEL_X | WM97XX_ADCSEL_Y);
6509+
6510+ /* check we have correct sample */
6511+ if (!(data->x & WM97XX_ADCSEL_X) || !(data->y & WM97XX_ADCSEL_Y))
6512+ goto err;
6513+ if(pil && !(data->p & WM97XX_ADCSEL_PRES))
6514+ goto err;
6515+
6516+ if (!(data->x & WM97XX_PEN_DOWN)) {
6517+ wm->pen_probably_down = 0;
6518+ return RC_PENUP;
6519+ }
6520+ return RC_VALID;
6521+err:
6522+ return RC_PENUP;
6523+}
6524+
6525+/*
6526+ * Sample the WM9713 touchscreen in polling mode
6527+ */
6528+static int wm9713_poll_touch(struct wm97xx* wm, struct wm97xx_data *data)
6529+{
6530+ int rc;
6531+
6532+ if(coord) {
6533+ if((rc = wm9713_poll_coord(wm, data)) != RC_VALID)
6534+ return rc;
6535+ } else {
6536+ if ((rc = wm9713_poll_sample(wm, WM9713_ADCSEL_X, &data->x)) != RC_VALID)
6537+ return rc;
6538+ if ((rc = wm9713_poll_sample(wm, WM9713_ADCSEL_Y, &data->y)) != RC_VALID)
6539+ return rc;
6540+ if (pil) {
6541+ if ((rc = wm9713_poll_sample(wm, WM9713_ADCSEL_PRES, &data->p)) != RC_VALID)
6542+ return rc;
6543+ } else
6544+ data->p = DEFAULT_PRESSURE;
6545+ }
6546+ return RC_VALID;
6547+}
6548+
6549+/*
6550+ * Enable WM9713 continuous mode, i.e. touch data is streamed across an AC97 slot
6551+ */
6552+static int wm9713_acc_enable (struct wm97xx* wm, int enable)
6553+{
6554+ u16 dig1, dig2, dig3;
6555+ int ret = 0;
6556+
6557+ dig1 = wm->dig[0];
6558+ dig2 = wm->dig[1];
6559+ dig3 = wm->dig[2];
6560+
6561+ if (enable) {
6562+ /* continous mode */
6563+ if (wm->mach_ops->acc_startup &&
6564+ (ret = wm->mach_ops->acc_startup(wm)) < 0)
6565+ return ret;
6566+
6567+ dig1 &= ~WM9713_ADCSEL_MASK;
6568+ dig1 |= WM9713_CTC | WM9713_COO | WM9713_ADCSEL_X | WM9713_ADCSEL_Y;
6569+ if (pil)
6570+ dig1 |= WM9713_ADCSEL_PRES;
6571+ dig2 &= ~(WM97XX_DELAY_MASK | WM97XX_SLT_MASK | WM97XX_CM_RATE_MASK);
6572+ dig2 |= WM97XX_SLEN | WM97XX_DELAY (delay) |
6573+ WM97XX_SLT (wm->acc_slot) | WM97XX_RATE (wm->acc_rate);
6574+ dig3 |= WM9713_PDEN;
6575+ } else {
6576+ dig1 &= ~(WM9713_CTC | WM9713_COO);
6577+ dig2 &= ~WM97XX_SLEN;
6578+ dig3 &= ~WM9713_PDEN;
6579+ if (wm->mach_ops->acc_shutdown)
6580+ wm->mach_ops->acc_shutdown(wm);
6581+ }
6582+
6583+ wm97xx_reg_write(wm, AC97_WM9713_DIG1, dig1);
6584+ wm97xx_reg_write(wm, AC97_WM9713_DIG2, dig2);
6585+ wm97xx_reg_write(wm, AC97_WM9713_DIG3, dig3);
6586+ return ret;
6587+}
6588+
6589+struct wm97xx_codec_drv wm97xx_codec = {
6590+ .id = WM9713_ID2,
6591+ .name = "wm9713",
6592+ .poll_sample = wm9713_poll_sample,
6593+ .poll_touch = wm9713_poll_touch,
6594+ .acc_enable = wm9713_acc_enable,
6595+ .digitiser_ioctl = wm9713_digitiser_ioctl,
6596+};
6597+
6598+EXPORT_SYMBOL_GPL(wm97xx_codec);
6599+
6600+/* Module information */
6601+MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com");
6602+MODULE_DESCRIPTION("WM9713 Touch Screen Driver");
6603+MODULE_LICENSE("GPL");
6604diff --git a/drivers/input/touchscreen/wm97xx-core.c b/drivers/input/touchscreen/wm97xx-core.c
6605new file mode 100644
6606index 0000000..87179d2
6607--- /dev/null
6608+++ b/drivers/input/touchscreen/wm97xx-core.c
6609@@ -0,0 +1,859 @@
6610+/*
6611+ * wm97xx-core.c -- Touch screen driver core for Wolfson WM9705, WM9712
6612+ * and WM9713 AC97 Codecs.
6613+ *
6614+ * Copyright 2003, 2004, 2005, 2006 Wolfson Microelectronics PLC.
6615+ * Author: Liam Girdwood
6616+ * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com
6617+ * Parts Copyright : Ian Molton <spyro@f2s.com>
6618+ * Andrew Zabolotny <zap@homelink.ru>
6619+ * Russell King <rmk@arm.linux.org.uk>
6620+ *
6621+ * This program is free software; you can redistribute it and/or modify it
6622+ * under the terms of the GNU General Public License as published by the
6623+ * Free Software Foundation; either version 2 of the License, or (at your
6624+ * option) any later version.
6625+ *
6626+ * Notes:
6627+ *
6628+ * Features:
6629+ * - supports WM9705, WM9712, WM9713
6630+ * - polling mode
6631+ * - continuous mode (arch-dependent)
6632+ * - adjustable rpu/dpp settings
6633+ * - adjustable pressure current
6634+ * - adjustable sample settle delay
6635+ * - 4 and 5 wire touchscreens (5 wire is WM9712 only)
6636+ * - pen down detection
6637+ * - battery monitor
6638+ * - sample AUX adc's
6639+ * - power management
6640+ * - codec GPIO
6641+ * - codec event notification
6642+ * Todo
6643+ * - Support for async sampling control for noisy LCD's.
6644+ *
6645+ * Revision history
6646+ * 7th May 2003 Initial version.
6647+ * 6th June 2003 Added non module support and AC97 registration.
6648+ * 18th June 2003 Added AUX adc sampling.
6649+ * 23rd June 2003 Did some minimal reformatting, fixed a couple of
6650+ * codec_mutexing bugs and noted a race to fix.
6651+ * 24th June 2003 Added power management and fixed race condition.
6652+ * 10th July 2003 Changed to a misc device.
6653+ * 31st July 2003 Moved TS_EVENT and TS_CAL to wm97xx.h
6654+ * 8th Aug 2003 Added option for read() calling wm97xx_sample_touch()
6655+ * because some ac97_read/ac_97_write call schedule()
6656+ * 7th Nov 2003 Added Input touch event interface, stanley.cai@intel.com
6657+ * 13th Nov 2003 Removed h3600 touch interface, added interrupt based
6658+ * pen down notification and implemented continous mode
6659+ * on XScale arch.
6660+ * 16th Nov 2003 Ian Molton <spyro@f2s.com>
6661+ * Modified so that it suits the new 2.6 driver model.
6662+ * 25th Jan 2004 Andrew Zabolotny <zap@homelink.ru>
6663+ * Implemented IRQ-driven pen down detection, implemented
6664+ * the private API meant to be exposed to platform-specific
6665+ * drivers, reorganized the driver so that it supports
6666+ * an arbitrary number of devices.
6667+ * 1st Feb 2004 Moved continuous mode handling to a separate
6668+ * architecture-dependent file. For now only PXA
6669+ * built-in AC97 controller is supported (pxa-ac97-wm97xx.c).
6670+ * 11th Feb 2004 Reduced CPU usage by keeping a cached copy of both
6671+ * digitizer registers instead of reading them every time.
6672+ * A reorganization of the whole code for better
6673+ * error handling.
6674+ * 17th Apr 2004 Added BMON support.
6675+ * 17th Nov 2004 Added codec GPIO, codec event handling (real and virtual
6676+ * GPIOs) and 2.6 power management.
6677+ * 29th Nov 2004 Added WM9713 support.
6678+ * 4th Jul 2005 Moved codec specific code out to seperate files.
6679+ * 6th Sep 2006 Mike Arthur <linux@wolfsonmicro.com>
6680+ * Added bus interface.
6681+ */
6682+
6683+#include <linux/module.h>
6684+#include <linux/moduleparam.h>
6685+#include <linux/version.h>
6686+#include <linux/kernel.h>
6687+#include <linux/init.h>
6688+#include <linux/delay.h>
6689+#include <linux/string.h>
6690+#include <linux/proc_fs.h>
6691+#include <linux/pm.h>
6692+#include <linux/interrupt.h>
6693+#include <linux/bitops.h>
6694+#include <linux/workqueue.h>
6695+#include <linux/device.h>
6696+#include <linux/freezer.h>
6697+#include <linux/wm97xx.h>
6698+#include <asm/uaccess.h>
6699+#include <asm/io.h>
6700+
6701+#include <asm/arch/irqs.h>
6702+
6703+#define TS_NAME "wm97xx"
6704+#define WM_CORE_VERSION "0.64"
6705+#define DEFAULT_PRESSURE 0xb0c0
6706+
6707+
6708+/*
6709+ * Touchscreen absolute values
6710+ *
6711+ * These parameters are used to help the input layer discard out of
6712+ * range readings and reduce jitter etc.
6713+ *
6714+ * o min, max:- indicate the min and max values your touch screen returns
6715+ * o fuzz:- use a higher number to reduce jitter
6716+ *
6717+ * The default values correspond to Mainstone II in QVGA mode
6718+ *
6719+ * Please read
6720+ * Documentation/input/input-programming.txt for more details.
6721+ */
6722+
6723+static int abs_x[3] = {350,3900,5};
6724+module_param_array(abs_x, int, NULL, 0);
6725+MODULE_PARM_DESC(abs_x, "Touchscreen absolute X min, max, fuzz");
6726+
6727+static int abs_y[3] = {320,3750,40};
6728+module_param_array(abs_y, int, NULL, 0);
6729+MODULE_PARM_DESC(abs_y, "Touchscreen absolute Y min, max, fuzz");
6730+
6731+static int abs_p[3] = {0,150,4};
6732+module_param_array(abs_p, int, NULL, 0);
6733+MODULE_PARM_DESC(abs_p, "Touchscreen absolute Pressure min, max, fuzz");
6734+
6735+/*
6736+ * Debug
6737+ */
6738+#if 0
6739+#define dbg(format, arg...) printk(KERN_DEBUG TS_NAME ": " format "\n" , ## arg)
6740+#else
6741+#define dbg(format, arg...)
6742+#endif
6743+#define err(format, arg...) printk(KERN_ERR TS_NAME ": " format "\n" , ## arg)
6744+#define info(format, arg...) printk(KERN_INFO TS_NAME ": " format "\n" , ## arg)
6745+#define warn(format, arg...) printk(KERN_WARNING TS_NAME ": " format "\n" , ## arg)
6746+
6747+/*
6748+ * wm97xx IO access, all IO locking done by AC97 layer
6749+ */
6750+int wm97xx_reg_read(struct wm97xx *wm, u16 reg)
6751+{
6752+ if (wm->ac97)
6753+ return wm->ac97->bus->ops->read(wm->ac97, reg);
6754+ else
6755+ return -1;
6756+}
6757+EXPORT_SYMBOL_GPL(wm97xx_reg_read);
6758+
6759+void wm97xx_reg_write(struct wm97xx *wm, u16 reg, u16 val)
6760+{
6761+ /* cache digitiser registers */
6762+ if(reg >= AC97_WM9713_DIG1 && reg <= AC97_WM9713_DIG3)
6763+ wm->dig[(reg - AC97_WM9713_DIG1) >> 1] = val;
6764+
6765+ /* cache gpio regs */
6766+ if(reg >= AC97_GPIO_CFG && reg <= AC97_MISC_AFE)
6767+ wm->gpio[(reg - AC97_GPIO_CFG) >> 1] = val;
6768+
6769+ /* wm9713 irq reg */
6770+ if(reg == 0x5a)
6771+ wm->misc = val;
6772+
6773+ if (wm->ac97)
6774+ wm->ac97->bus->ops->write(wm->ac97, reg, val);
6775+}
6776+EXPORT_SYMBOL_GPL(wm97xx_reg_write);
6777+
6778+/**
6779+ * wm97xx_read_aux_adc - Read the aux adc.
6780+ * @wm: wm97xx device.
6781+ * @adcsel: codec ADC to be read
6782+ *
6783+ * Reads the selected AUX ADC.
6784+ */
6785+
6786+int wm97xx_read_aux_adc(struct wm97xx *wm, u16 adcsel)
6787+{
6788+ int power_adc = 0, auxval;
6789+ u16 power = 0;
6790+
6791+ /* get codec */
6792+ mutex_lock(&wm->codec_mutex);
6793+
6794+ /* When the touchscreen is not in use, we may have to power up the AUX ADC
6795+ * before we can use sample the AUX inputs->
6796+ */
6797+ if (wm->id == WM9713_ID2 &&
6798+ (power = wm97xx_reg_read(wm, AC97_EXTENDED_MID)) & 0x8000) {
6799+ power_adc = 1;
6800+ wm97xx_reg_write(wm, AC97_EXTENDED_MID, power & 0x7fff);
6801+ }
6802+
6803+ /* Prepare the codec for AUX reading */
6804+ wm->codec->digitiser_ioctl(wm, WM97XX_AUX_PREPARE);
6805+
6806+ /* Turn polling mode on to read AUX ADC */
6807+ wm->pen_probably_down = 1;
6808+ wm->codec->poll_sample(wm, adcsel, &auxval);
6809+
6810+ if (power_adc)
6811+ wm97xx_reg_write(wm, AC97_EXTENDED_MID, power | 0x8000);
6812+
6813+ wm->codec->digitiser_ioctl(wm, WM97XX_DIG_RESTORE);
6814+
6815+ wm->pen_probably_down = 0;
6816+
6817+ mutex_unlock(&wm->codec_mutex);
6818+ return auxval & 0xfff;
6819+}
6820+EXPORT_SYMBOL_GPL(wm97xx_read_aux_adc);
6821+
6822+/**
6823+ * wm97xx_get_gpio - Get the status of a codec GPIO.
6824+ * @wm: wm97xx device.
6825+ * @gpio: gpio
6826+ *
6827+ * Get the status of a codec GPIO pin
6828+ */
6829+
6830+wm97xx_gpio_status_t wm97xx_get_gpio(struct wm97xx *wm, u32 gpio)
6831+{
6832+ u16 status;
6833+ wm97xx_gpio_status_t ret;
6834+
6835+ mutex_lock(&wm->codec_mutex);
6836+ status = wm97xx_reg_read(wm, AC97_GPIO_STATUS);
6837+
6838+ if (status & gpio)
6839+ ret = WM97XX_GPIO_HIGH;
6840+ else
6841+ ret = WM97XX_GPIO_LOW;
6842+
6843+ mutex_unlock(&wm->codec_mutex);
6844+ return ret;
6845+}
6846+EXPORT_SYMBOL_GPL(wm97xx_get_gpio);
6847+
6848+/**
6849+ * wm97xx_set_gpio - Set the status of a codec GPIO.
6850+ * @wm: wm97xx device.
6851+ * @gpio: gpio
6852+ *
6853+ *
6854+ * Set the status of a codec GPIO pin
6855+ */
6856+
6857+void wm97xx_set_gpio(struct wm97xx *wm, u32 gpio,
6858+ wm97xx_gpio_status_t status)
6859+{
6860+ u16 reg;
6861+
6862+ mutex_lock(&wm->codec_mutex);
6863+ reg = wm97xx_reg_read(wm, AC97_GPIO_STATUS);
6864+
6865+ if (status & WM97XX_GPIO_HIGH)
6866+ reg |= gpio;
6867+ else
6868+ reg &= ~gpio;
6869+
6870+ if (wm->id == WM9712_ID2)
6871+ wm97xx_reg_write(wm, AC97_GPIO_STATUS, reg << 1);
6872+ else
6873+ wm97xx_reg_write(wm, AC97_GPIO_STATUS, reg);
6874+ mutex_unlock(&wm->codec_mutex);
6875+}
6876+EXPORT_SYMBOL_GPL(wm97xx_set_gpio);
6877+
6878+/*
6879+ * Codec GPIO pin configuration, this set's pin direction, polarity,
6880+ * stickyness and wake up.
6881+ */
6882+void wm97xx_config_gpio(struct wm97xx *wm, u32 gpio, wm97xx_gpio_dir_t dir,
6883+ wm97xx_gpio_pol_t pol, wm97xx_gpio_sticky_t sticky,
6884+ wm97xx_gpio_wake_t wake)
6885+{
6886+ u16 reg;
6887+
6888+ mutex_lock(&wm->codec_mutex);
6889+ reg = wm97xx_reg_read(wm, AC97_GPIO_POLARITY);
6890+
6891+ if (pol == WM97XX_GPIO_POL_HIGH)
6892+ reg |= gpio;
6893+ else
6894+ reg &= ~gpio;
6895+
6896+ wm97xx_reg_write(wm, AC97_GPIO_POLARITY, reg);
6897+ reg = wm97xx_reg_read(wm, AC97_GPIO_STICKY);
6898+
6899+ if (sticky == WM97XX_GPIO_STICKY)
6900+ reg |= gpio;
6901+ else
6902+ reg &= ~gpio;
6903+
6904+ wm97xx_reg_write(wm, AC97_GPIO_STICKY, reg);
6905+ reg = wm97xx_reg_read(wm, AC97_GPIO_WAKEUP);
6906+
6907+ if (wake == WM97XX_GPIO_WAKE)
6908+ reg |= gpio;
6909+ else
6910+ reg &= ~gpio;
6911+
6912+ wm97xx_reg_write(wm, AC97_GPIO_WAKEUP, reg);
6913+ reg = wm97xx_reg_read(wm, AC97_GPIO_CFG);
6914+
6915+ if (dir == WM97XX_GPIO_IN)
6916+ reg |= gpio;
6917+ else
6918+ reg &= ~gpio;
6919+
6920+ wm97xx_reg_write(wm, AC97_GPIO_CFG, reg);
6921+ mutex_unlock(&wm->codec_mutex);
6922+}
6923+EXPORT_SYMBOL_GPL(wm97xx_config_gpio);
6924+
6925+/*
6926+ * Handle a pen down interrupt.
6927+ */
6928+static void wm97xx_pen_irq_worker(struct work_struct *w)
6929+{
6930+/* struct wm97xx *wm = (struct wm97xx *) ptr; */
6931+ struct wm97xx *wm = container_of(w, struct wm97xx, pen_event_work);
6932+
6933+ /* do we need to enable the touch panel reader */
6934+ if (wm->id == WM9705_ID2) {
6935+ if (wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD) & WM97XX_PEN_DOWN)
6936+ wm->pen_is_down = 1;
6937+ else
6938+ wm->pen_is_down = 0;
6939+ wake_up_interruptible(&wm->pen_irq_wait);
6940+ } else {
6941+ u16 status, pol;
6942+ mutex_lock(&wm->codec_mutex);
6943+ status = wm97xx_reg_read(wm, AC97_GPIO_STATUS);
6944+ pol = wm97xx_reg_read(wm, AC97_GPIO_POLARITY);
6945+
6946+ if (WM97XX_GPIO_13 & pol & status) {
6947+ wm->pen_is_down = 1;
6948+ wm97xx_reg_write(wm, AC97_GPIO_POLARITY, pol & ~WM97XX_GPIO_13);
6949+ } else {
6950+ wm->pen_is_down = 0;
6951+ wm97xx_reg_write(wm, AC97_GPIO_POLARITY, pol | WM97XX_GPIO_13);
6952+ }
6953+
6954+ if (wm->id == WM9712_ID2)
6955+ wm97xx_reg_write(wm, AC97_GPIO_STATUS, (status & ~WM97XX_GPIO_13) << 1);
6956+ else
6957+ wm97xx_reg_write(wm, AC97_GPIO_STATUS, status & ~WM97XX_GPIO_13);
6958+ mutex_unlock(&wm->codec_mutex);
6959+ wake_up_interruptible(&wm->pen_irq_wait);
6960+ }
6961+
6962+ if (!wm->pen_is_down && wm->mach_ops && wm->mach_ops->acc_enabled)
6963+ wm->mach_ops->acc_pen_up(wm);
6964+ enable_irq(wm->pen_irq);
6965+}
6966+
6967+/*
6968+ * Codec PENDOWN irq handler
6969+ *
6970+ * We have to disable the codec interrupt in the handler because it can
6971+ * take upto 1ms to clear the interrupt source. The interrupt is then enabled
6972+ * again in the slow handler when the source has been cleared.
6973+ */
6974+static irqreturn_t wm97xx_pen_interrupt(int irq, void *dev_id)
6975+{
6976+ struct wm97xx *wm = (struct wm97xx *) dev_id;
6977+ disable_irq(wm->pen_irq);
6978+ queue_work(wm->pen_irq_workq, &wm->pen_event_work);
6979+ return IRQ_HANDLED;
6980+}
6981+
6982+/*
6983+ * initialise pen IRQ handler and workqueue
6984+ */
6985+static int wm97xx_init_pen_irq(struct wm97xx *wm)
6986+{
6987+ u16 reg;
6988+
6989+ INIT_WORK(&wm->pen_event_work, wm97xx_pen_irq_worker/* , wm */);
6990+ if ((wm->pen_irq_workq =
6991+ create_singlethread_workqueue("kwm97pen")) == NULL) {
6992+ err("could not create pen irq work queue");
6993+ wm->pen_irq = 0;
6994+ return -EINVAL;
6995+ }
6996+
6997+
6998+ wm->pen_irq = IRQ_GPIO(90);
6999+ if (request_irq (wm->pen_irq, wm97xx_pen_interrupt, SA_SHIRQ, "wm97xx-pen", wm)) {
7000+ err("could not register codec pen down interrupt, will poll for pen down");
7001+ destroy_workqueue(wm->pen_irq_workq);
7002+ wm->pen_irq = 0;
7003+ return -EINVAL;
7004+ }
7005+
7006+ /* enable PEN down on wm9712/13 */
7007+ if (wm->id != WM9705_ID2) {
7008+ reg = wm97xx_reg_read(wm, AC97_MISC_AFE);
7009+ wm97xx_reg_write(wm, AC97_MISC_AFE, reg & 0xfffb);
7010+ reg = wm97xx_reg_read(wm, 0x5a);
7011+ wm97xx_reg_write(wm, 0x5a, reg & ~0x0001);
7012+ }
7013+
7014+ return 0;
7015+}
7016+
7017+/* Private struct for communication between struct wm97xx_tshread
7018+ * and wm97xx_read_samples */
7019+struct ts_state {
7020+ int sleep_time;
7021+ int min_sleep_time;
7022+};
7023+
7024+static int wm97xx_read_samples(struct wm97xx *wm, struct ts_state *state)
7025+{
7026+ struct wm97xx_data data;
7027+ int rc;
7028+
7029+ mutex_lock(&wm->codec_mutex);
7030+
7031+ if (wm->mach_ops && wm->mach_ops->acc_enabled)
7032+ rc = wm->mach_ops->acc_pen_down(wm);
7033+ else
7034+ rc = wm->codec->poll_touch(wm, &data);
7035+
7036+ if (rc & RC_PENUP) {
7037+ if (wm->pen_is_down) {
7038+ wm->pen_is_down = 0;
7039+ dbg("pen up");
7040+ input_report_abs(wm->input_dev, ABS_PRESSURE, 0);
7041+ input_sync(wm->input_dev);
7042+ } else if (!(rc & RC_AGAIN)) {
7043+ /* We need high frequency updates only while pen is down,
7044+ * the user never will be able to touch screen faster than
7045+ * a few times per second... On the other hand, when the
7046+ * user is actively working with the touchscreen we don't
7047+ * want to lose the quick response. So we will slowly
7048+ * increase sleep time after the pen is up and quicky
7049+ * restore it to ~one task switch when pen is down again.
7050+ */
7051+ if (state->sleep_time < HZ / 10)
7052+ state->sleep_time++;
7053+ }
7054+
7055+ } else if (rc & RC_VALID) {
7056+ dbg("pen down: x=%x:%d, y=%x:%d, pressure=%x:%d\n",
7057+ data.x >> 12, data.x & 0xfff, data.y >> 12,
7058+ data.y & 0xfff, data.p >> 12, data.p & 0xfff);
7059+ input_report_abs(wm->input_dev, ABS_X, data.x & 0xfff);
7060+ input_report_abs(wm->input_dev, ABS_Y, data.y & 0xfff);
7061+ input_report_abs(wm->input_dev, ABS_PRESSURE, data.p & 0xfff);
7062+ input_sync(wm->input_dev);
7063+ wm->pen_is_down = 1;
7064+ state->sleep_time = state->min_sleep_time;
7065+ } else if (rc & RC_PENDOWN) {
7066+ dbg("pen down");
7067+ wm->pen_is_down = 1;
7068+ state->sleep_time = state->min_sleep_time;
7069+ }
7070+
7071+ mutex_unlock(&wm->codec_mutex);
7072+ return rc;
7073+}
7074+
7075+/*
7076+* The touchscreen sample reader thread.
7077+*/
7078+static int wm97xx_ts_read(void *data)
7079+{
7080+ int rc;
7081+ struct ts_state state;
7082+ struct wm97xx *wm = (struct wm97xx *) data;
7083+
7084+ /* set up thread context */
7085+ wm->ts_task = current;
7086+ daemonize("kwm97xxts");
7087+
7088+ if (wm->codec == NULL) {
7089+ wm->ts_task = NULL;
7090+ printk(KERN_ERR "codec is NULL, bailing\n");
7091+ }
7092+
7093+ complete(&wm->ts_init);
7094+ wm->pen_is_down = 0;
7095+ state.min_sleep_time = HZ >= 100 ? HZ / 100 : 1;
7096+ if (state.min_sleep_time < 1)
7097+ state.min_sleep_time = 1;
7098+ state.sleep_time = state.min_sleep_time;
7099+
7100+ /* touch reader loop */
7101+ while (wm->ts_task) {
7102+ do {
7103+ try_to_freeze();
7104+ rc = wm97xx_read_samples(wm, &state);
7105+ } while (rc & RC_AGAIN);
7106+ if (!wm->pen_is_down && wm->pen_irq) {
7107+ /* Nice, we don't have to poll for pen down event */
7108+ wait_event_interruptible(wm->pen_irq_wait, wm->pen_is_down);
7109+ } else {
7110+ set_task_state(current, TASK_INTERRUPTIBLE);
7111+ schedule_timeout(state.sleep_time);
7112+ }
7113+ }
7114+ complete_and_exit(&wm->ts_exit, 0);
7115+}
7116+
7117+/**
7118+ * wm97xx_ts_input_open - Open the touch screen input device.
7119+ * @idev: Input device to be opened.
7120+ *
7121+ * Called by the input sub system to open a wm97xx touchscreen device.
7122+ * Starts the touchscreen thread and touch digitiser.
7123+ */
7124+static int wm97xx_ts_input_open(struct input_dev *idev)
7125+{
7126+ int ret = 0;
7127+ struct wm97xx *wm = (struct wm97xx *) idev->private;
7128+
7129+ mutex_lock(&wm->codec_mutex);
7130+ /* first time opened ? */
7131+ if (wm->ts_use_count++ == 0) {
7132+ /* start touchscreen thread */
7133+ init_completion(&wm->ts_init);
7134+ init_completion(&wm->ts_exit);
7135+ ret = kernel_thread(wm97xx_ts_read, wm, CLONE_KERNEL);
7136+
7137+ if (ret >= 0) {
7138+ wait_for_completion(&wm->ts_init);
7139+ if (wm->ts_task == NULL)
7140+ ret = -EINVAL;
7141+ } else {
7142+ mutex_unlock(&wm->codec_mutex);
7143+ return ret;
7144+ }
7145+
7146+ /* start digitiser */
7147+ if (wm->mach_ops && wm->mach_ops->acc_enabled)
7148+ wm->codec->acc_enable(wm, 1);
7149+ wm->codec->digitiser_ioctl(wm, WM97XX_DIG_START);
7150+
7151+ /* init pen down/up irq handling */
7152+ if (wm->pen_irq) {
7153+ wm97xx_init_pen_irq(wm);
7154+
7155+ if (wm->pen_irq == 0) {
7156+ /* we failed to get an irq for pen down events,
7157+ * so we resort to polling. kickstart the reader */
7158+ wm->pen_is_down = 1;
7159+ wake_up_interruptible(&wm->pen_irq_wait);
7160+ }
7161+ }
7162+ }
7163+
7164+ mutex_unlock(&wm->codec_mutex);
7165+ return 0;
7166+}
7167+
7168+/**
7169+ * wm97xx_ts_input_close - Close the touch screen input device.
7170+ * @idev: Input device to be closed.
7171+ *
7172+ * Called by the input sub system to close a wm97xx touchscreen device.
7173+ * Kills the touchscreen thread and stops the touch digitiser.
7174+ */
7175+
7176+static void wm97xx_ts_input_close(struct input_dev *idev)
7177+{
7178+ struct wm97xx *wm = (struct wm97xx *) idev->private;
7179+
7180+ mutex_lock(&wm->codec_mutex);
7181+ if (--wm->ts_use_count == 0) {
7182+ /* destroy workqueues and free irqs */
7183+ if (wm->pen_irq) {
7184+ free_irq(wm->pen_irq, wm);
7185+ destroy_workqueue(wm->pen_irq_workq);
7186+ }
7187+
7188+ /* kill thread */
7189+ if (wm->ts_task) {
7190+ wm->ts_task = NULL;
7191+ wm->pen_is_down = 1;
7192+ mutex_unlock(&wm->codec_mutex);
7193+ wake_up_interruptible(&wm->pen_irq_wait);
7194+ wait_for_completion(&wm->ts_exit);
7195+ wm->pen_is_down = 0;
7196+ mutex_lock(&wm->codec_mutex);
7197+ }
7198+
7199+ /* stop digitiser */
7200+ wm->codec->digitiser_ioctl(wm, WM97XX_DIG_STOP);
7201+ if (wm->mach_ops && wm->mach_ops->acc_enabled)
7202+ wm->codec->acc_enable(wm, 0);
7203+ }
7204+ mutex_unlock(&wm->codec_mutex);
7205+}
7206+
7207+/*
7208+ * Bus interface to allow for client drivers codec access
7209+ * e.g. battery monitor
7210+ */
7211+static int wm97xx_bus_match(struct device *dev, struct device_driver *drv)
7212+{
7213+ return !(strcmp(dev->bus_id,drv->name));
7214+}
7215+
7216+/*
7217+ * The AC97 audio driver will do all the Codec suspend and resume
7218+ * tasks. This is just for anything machine specific or extra.
7219+ */
7220+static int wm97xx_bus_suspend(struct device *dev, pm_message_t state)
7221+{
7222+ int ret = 0;
7223+
7224+ if (dev->driver && dev->driver->suspend)
7225+ ret = dev->driver->suspend(dev, state);
7226+
7227+ return ret;
7228+}
7229+
7230+static int wm97xx_bus_resume(struct device *dev)
7231+{
7232+ int ret = 0;
7233+
7234+ if (dev->driver && dev->driver->resume)
7235+ ret = dev->driver->resume(dev);
7236+
7237+ return ret;
7238+}
7239+
7240+struct bus_type wm97xx_bus_type = {
7241+ .name = "wm97xx",
7242+ .match = wm97xx_bus_match,
7243+ .suspend = wm97xx_bus_suspend,
7244+ .resume = wm97xx_bus_resume,
7245+};
7246+EXPORT_SYMBOL_GPL(wm97xx_bus_type);
7247+
7248+static void wm97xx_release(struct device *dev)
7249+{
7250+ kfree(dev);
7251+}
7252+
7253+static int wm97xx_probe(struct device *dev)
7254+{
7255+ struct wm97xx* wm;
7256+ int ret = 0, id = 0;
7257+
7258+ if (!(wm = kzalloc(sizeof(struct wm97xx), GFP_KERNEL)))
7259+ return -ENOMEM;
7260+ mutex_init(&wm->codec_mutex);
7261+
7262+ init_waitqueue_head(&wm->pen_irq_wait);
7263+ wm->dev = dev;
7264+ dev->driver_data = wm;
7265+ wm->ac97 = to_ac97_t(dev);
7266+
7267+ /* check that we have a supported codec */
7268+ if ((id = wm97xx_reg_read(wm, AC97_VENDOR_ID1)) != WM97XX_ID1) {
7269+ err("could not find a wm97xx, found a %x instead\n", id);
7270+ kfree(wm);
7271+ return -ENODEV;
7272+ }
7273+
7274+ wm->id = wm97xx_reg_read(wm, AC97_VENDOR_ID2);
7275+ if(wm->id != wm97xx_codec.id) {
7276+ err("could not find a the selected codec, please build for wm97%2x", wm->id & 0xff);
7277+ kfree(wm);
7278+ return -ENODEV;
7279+ }
7280+
7281+ if((wm->input_dev = input_allocate_device()) == NULL) {
7282+ kfree(wm);
7283+ return -ENOMEM;
7284+ }
7285+
7286+ /* set up touch configuration */
7287+ info("detected a wm97%2x codec", wm->id & 0xff);
7288+ wm->input_dev->name = "wm97xx touchscreen";
7289+ wm->input_dev->open = wm97xx_ts_input_open;
7290+ wm->input_dev->close = wm97xx_ts_input_close;
7291+ set_bit(EV_ABS, wm->input_dev->evbit);
7292+ set_bit(ABS_X, wm->input_dev->absbit);
7293+ set_bit(ABS_Y, wm->input_dev->absbit);
7294+ set_bit(ABS_PRESSURE, wm->input_dev->absbit);
7295+ wm->input_dev->absmax[ABS_X] = abs_x[1];
7296+ wm->input_dev->absmax[ABS_Y] = abs_y[1];
7297+ wm->input_dev->absmax[ABS_PRESSURE] = abs_p[1];
7298+ wm->input_dev->absmin[ABS_X] = abs_x[0];
7299+ wm->input_dev->absmin[ABS_Y] = abs_y[0];
7300+ wm->input_dev->absmin[ABS_PRESSURE] = abs_p[0];
7301+ wm->input_dev->absfuzz[ABS_X] = abs_x[2];
7302+ wm->input_dev->absfuzz[ABS_Y] = abs_y[2];
7303+ wm->input_dev->absfuzz[ABS_PRESSURE] = abs_p[2];
7304+ wm->input_dev->private = wm;
7305+ wm->codec = &wm97xx_codec;
7306+ if((ret = input_register_device(wm->input_dev)) < 0) {
7307+ kfree(wm);
7308+ return -ENOMEM;
7309+ }
7310+
7311+ /* set up physical characteristics */
7312+ wm->codec->digitiser_ioctl(wm, WM97XX_PHY_INIT);
7313+
7314+ /* load gpio cache */
7315+ wm->gpio[0] = wm97xx_reg_read(wm, AC97_GPIO_CFG);
7316+ wm->gpio[1] = wm97xx_reg_read(wm, AC97_GPIO_POLARITY);
7317+ wm->gpio[2] = wm97xx_reg_read(wm, AC97_GPIO_STICKY);
7318+ wm->gpio[3] = wm97xx_reg_read(wm, AC97_GPIO_WAKEUP);
7319+ wm->gpio[4] = wm97xx_reg_read(wm, AC97_GPIO_STATUS);
7320+ wm->gpio[5] = wm97xx_reg_read(wm, AC97_MISC_AFE);
7321+
7322+ /* register our battery device */
7323+ if (!(wm->battery_dev = kzalloc(sizeof(struct device), GFP_KERNEL))) {
7324+ ret = -ENOMEM;
7325+ goto batt_err;
7326+ }
7327+ wm->battery_dev->bus = &wm97xx_bus_type;
7328+ strcpy(wm->battery_dev->bus_id,"wm97xx-battery");
7329+ wm->battery_dev->driver_data = wm;
7330+ wm->battery_dev->parent = dev;
7331+ wm->battery_dev->release = wm97xx_release;
7332+ if((ret = device_register(wm->battery_dev)) < 0)
7333+ goto batt_reg_err;
7334+
7335+ /* register our extended touch device (for machine specific extensions) */
7336+ if (!(wm->touch_dev = kzalloc(sizeof(struct device), GFP_KERNEL))) {
7337+ ret = -ENOMEM;
7338+ goto touch_err;
7339+ }
7340+ wm->touch_dev->bus = &wm97xx_bus_type;
7341+ strcpy(wm->touch_dev->bus_id,"wm97xx-touchscreen");
7342+ wm->touch_dev->driver_data = wm;
7343+ wm->touch_dev->parent = dev;
7344+ wm->touch_dev->release = wm97xx_release;
7345+ if((ret = device_register(wm->touch_dev)) < 0)
7346+ goto touch_reg_err;
7347+
7348+ return ret;
7349+
7350+touch_reg_err:
7351+ kfree(wm->touch_dev);
7352+touch_err:
7353+ device_unregister(wm->battery_dev);
7354+batt_reg_err:
7355+ kfree(wm->battery_dev);
7356+batt_err:
7357+ input_unregister_device(wm->input_dev);
7358+ kfree(wm);
7359+ return ret;
7360+}
7361+
7362+static int wm97xx_remove(struct device *dev)
7363+{
7364+ struct wm97xx *wm = dev_get_drvdata(dev);
7365+
7366+ /* Stop touch reader thread */
7367+ if (wm->ts_task) {
7368+ wm->ts_task = NULL;
7369+ wm->pen_is_down = 1;
7370+ wake_up_interruptible(&wm->pen_irq_wait);
7371+ wait_for_completion(&wm->ts_exit);
7372+ }
7373+ device_unregister(wm->battery_dev);
7374+ device_unregister(wm->touch_dev);
7375+ input_unregister_device(wm->input_dev);
7376+
7377+ kfree(wm);
7378+ return 0;
7379+}
7380+
7381+#ifdef CONFIG_PM
7382+int wm97xx_resume(struct device* dev)
7383+{
7384+ struct wm97xx *wm = dev_get_drvdata(dev);
7385+
7386+ /* restore digitiser and gpio's */
7387+ if(wm->id == WM9713_ID2) {
7388+ wm97xx_reg_write(wm, AC97_WM9713_DIG1, wm->dig[0]);
7389+ wm97xx_reg_write(wm, 0x5a, wm->misc);
7390+ if(wm->ts_use_count) {
7391+ u16 reg = wm97xx_reg_read(wm, AC97_EXTENDED_MID) & 0x7fff;
7392+ wm97xx_reg_write(wm, AC97_EXTENDED_MID, reg);
7393+ }
7394+ }
7395+
7396+ wm97xx_reg_write(wm, AC97_WM9713_DIG2, wm->dig[1]);
7397+ wm97xx_reg_write(wm, AC97_WM9713_DIG3, wm->dig[2]);
7398+
7399+ wm97xx_reg_write(wm, AC97_GPIO_CFG, wm->gpio[0]);
7400+ wm97xx_reg_write(wm, AC97_GPIO_POLARITY, wm->gpio[1]);
7401+ wm97xx_reg_write(wm, AC97_GPIO_STICKY, wm->gpio[2]);
7402+ wm97xx_reg_write(wm, AC97_GPIO_WAKEUP, wm->gpio[3]);
7403+ wm97xx_reg_write(wm, AC97_GPIO_STATUS, wm->gpio[4]);
7404+ wm97xx_reg_write(wm, AC97_MISC_AFE, wm->gpio[5]);
7405+
7406+ return 0;
7407+}
7408+
7409+#else
7410+#define wm97xx_resume NULL
7411+#endif
7412+
7413+/*
7414+ * Machine specific operations
7415+ */
7416+int wm97xx_register_mach_ops(struct wm97xx *wm, struct wm97xx_mach_ops *mach_ops)
7417+{
7418+ mutex_lock(&wm->codec_mutex);
7419+ if(wm->mach_ops) {
7420+ mutex_unlock(&wm->codec_mutex);
7421+ return -EINVAL;
7422+ }
7423+ wm->mach_ops = mach_ops;
7424+ mutex_unlock(&wm->codec_mutex);
7425+ return 0;
7426+}
7427+EXPORT_SYMBOL_GPL(wm97xx_register_mach_ops);
7428+
7429+void wm97xx_unregister_mach_ops(struct wm97xx *wm)
7430+{
7431+ mutex_lock(&wm->codec_mutex);
7432+ wm->mach_ops = NULL;
7433+ mutex_unlock(&wm->codec_mutex);
7434+}
7435+EXPORT_SYMBOL_GPL(wm97xx_unregister_mach_ops);
7436+
7437+static struct device_driver wm97xx_driver = {
7438+ .name = "ac97",
7439+ .bus = &ac97_bus_type,
7440+ .owner = THIS_MODULE,
7441+ .probe = wm97xx_probe,
7442+ .remove = wm97xx_remove,
7443+ .resume = wm97xx_resume,
7444+};
7445+
7446+static int __init wm97xx_init(void)
7447+{
7448+ int ret;
7449+
7450+ info("version %s liam.girdwood@wolfsonmicro.com", WM_CORE_VERSION);
7451+ if((ret = bus_register(&wm97xx_bus_type)) < 0)
7452+ return ret;
7453+ return driver_register(&wm97xx_driver);
7454+}
7455+
7456+static void __exit wm97xx_exit(void)
7457+{
7458+ driver_unregister(&wm97xx_driver);
7459+ bus_unregister(&wm97xx_bus_type);
7460+}
7461+
7462+module_init(wm97xx_init);
7463+module_exit(wm97xx_exit);
7464+
7465+/* Module information */
7466+MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com");
7467+MODULE_DESCRIPTION("WM97xx Core - Touch Screen / AUX ADC / GPIO Driver");
7468+MODULE_LICENSE("GPL");
7469diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
7470index 4468cb3..01b4828 100644
7471--- a/drivers/leds/Kconfig
7472+++ b/drivers/leds/Kconfig
7473@@ -101,6 +101,12 @@ config LEDS_GPIO
7474 outputs. To be useful the particular board must have LEDs
7475 and they must be connected to the GPIO lines.
7476
7477+config LEDS_EM_X270
7478+ tristate "LED Support for the CompuLab EM-X270"
7479+ depends on LEDS_CLASS && MACH_EM_X270
7480+ help
7481+ This option enables support for the LEDs on CompuLab EM-X270.
7482+
7483 comment "LED Triggers"
7484
7485 config LEDS_TRIGGERS
7486diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
7487index f8995c9..6d3941e 100644
7488--- a/drivers/leds/Makefile
7489+++ b/drivers/leds/Makefile
7490@@ -17,6 +17,7 @@ obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o
7491 obj-$(CONFIG_LEDS_H1940) += leds-h1940.o
7492 obj-$(CONFIG_LEDS_COBALT) += leds-cobalt.o
7493 obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o
7494+obj-$(CONFIG_LEDS_EM_X270) += leds-em-x270.o
7495
7496 # LED Triggers
7497 obj-$(CONFIG_LEDS_TRIGGER_TIMER) += ledtrig-timer.o
7498diff --git a/drivers/leds/leds-em-x270.c b/drivers/leds/leds-em-x270.c
7499new file mode 100644
7500index 0000000..485e7da
7501--- /dev/null
7502+++ b/drivers/leds/leds-em-x270.c
7503@@ -0,0 +1,99 @@
7504+/*
7505+ * LED Triggers Core
7506+ *
7507+ * Copyright 2007 CompuLab, Ltd.
7508+ * Author: Mike Rapoport <mike@compulab.co.il>
7509+ *
7510+ * Based on Corgi leds driver:
7511+ * Copyright 2005-2006 Openedhand Ltd.
7512+ * Author: Richard Purdie <rpurdie@openedhand.com>
7513+ *
7514+ * This program is free software; you can redistribute it and/or modify
7515+ * it under the terms of the GNU General Public License version 2 as
7516+ * published by the Free Software Foundation.
7517+ *
7518+ */
7519+
7520+#include <linux/kernel.h>
7521+#include <linux/init.h>
7522+#include <linux/platform_device.h>
7523+#include <linux/leds.h>
7524+#include <linux/da9030.h>
7525+
7526+static void em_x270_led_orange_set(struct led_classdev *led_cdev,
7527+ enum led_brightness value)
7528+{
7529+ int on = 1;
7530+ int pwm_chop = 0;
7531+
7532+ pr_info("%s: value = %d\n", __FUNCTION__, value);
7533+ if (value == LED_OFF)
7534+ on = 0;
7535+ else if (value == LED_HALF)
7536+ pwm_chop = 4;
7537+
7538+ da9030_set_led(3, on, 0, 0, pwm_chop);
7539+}
7540+
7541+static struct led_classdev em_x270_orange_led = {
7542+ .name = "em_x270:orange",
7543+ .default_trigger = "em-x270-battery.0-charging-or-full",
7544+ .brightness_set = em_x270_led_orange_set,
7545+};
7546+
7547+#ifdef CONFIG_PM
7548+static int em_x270_led_suspend(struct platform_device *dev, pm_message_t state)
7549+{
7550+#ifdef CONFIG_LEDS_TRIGGERS
7551+ if (em_x270_orange_led.trigger && strcmp(em_x270_orange_led.trigger->name, "em-x270-battery-charging-or-full"))
7552+#endif
7553+ led_classdev_suspend(&em_x270_orange_led);
7554+ return 0;
7555+}
7556+
7557+static int em_x270_led_resume(struct platform_device *dev)
7558+{
7559+ led_classdev_resume(&em_x270_orange_led);
7560+ return 0;
7561+}
7562+#endif
7563+
7564+static int em_x270_led_probe(struct platform_device *pdev)
7565+{
7566+ return led_classdev_register(&pdev->dev, &em_x270_orange_led);
7567+}
7568+
7569+static int em_x270_led_remove(struct platform_device *pdev)
7570+{
7571+ led_classdev_unregister(&em_x270_orange_led);
7572+ return 0;
7573+}
7574+
7575+static struct platform_driver em_x270_led_driver = {
7576+ .probe = em_x270_led_probe,
7577+ .remove = em_x270_led_remove,
7578+#ifdef CONFIG_PM
7579+ .suspend = em_x270_led_suspend,
7580+ .resume = em_x270_led_resume,
7581+#endif
7582+ .driver = {
7583+ .name = "em-x270-led",
7584+ },
7585+};
7586+
7587+static int __init em_x270_led_init(void)
7588+{
7589+ return platform_driver_register(&em_x270_led_driver);
7590+}
7591+
7592+static void __exit em_x270_led_exit(void)
7593+{
7594+ platform_driver_unregister(&em_x270_led_driver);
7595+}
7596+
7597+module_init(em_x270_led_init);
7598+module_exit(em_x270_led_exit);
7599+
7600+MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>");
7601+MODULE_DESCRIPTION("EX-X270 LED driver");
7602+MODULE_LICENSE("GPL");
7603diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c
7604index 58e561e..7050e71 100644
7605--- a/drivers/mtd/chips/jedec_probe.c
7606+++ b/drivers/mtd/chips/jedec_probe.c
7607@@ -38,7 +38,7 @@
7608 #define MANUFACTURER_ST 0x0020
7609 #define MANUFACTURER_TOSHIBA 0x0098
7610 #define MANUFACTURER_WINBOND 0x00da
7611-
7612+#define CONTINUATION_CODE 0x007f
7613
7614 /* AMD */
7615 #define AM29DL800BB 0x22C8
7616@@ -68,6 +68,10 @@
7617 #define AT49BV32X 0x00C8
7618 #define AT49BV32XT 0x00C9
7619
7620+/* Eon */
7621+#define EN29SL800BB 0x226B
7622+#define EN29SL800BT 0x22EA
7623+
7624 /* Fujitsu */
7625 #define MBM29F040C 0x00A4
7626 #define MBM29LV650UE 0x22D7
7627@@ -632,6 +636,40 @@ static const struct amd_flash_info jedec_table[] = {
7628 ERASEINFO(0x02000,8)
7629 }
7630 }, {
7631+ .mfr_id = 0x1c,
7632+ .dev_id = EN29SL800BT,
7633+ .name = "Eon EN29SL800BT",
7634+ .uaddr = {
7635+ [0] = MTD_UADDR_0x0555_0x02AA, /* x8 */
7636+ [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */
7637+ },
7638+ .DevSize = SIZE_1MiB,
7639+ .CmdSet = P_ID_AMD_STD,
7640+ .NumEraseRegions= 4,
7641+ .regions = {
7642+ ERASEINFO(0x10000, 15),
7643+ ERASEINFO(0x08000, 1),
7644+ ERASEINFO(0x02000, 2),
7645+ ERASEINFO(0x04000, 1),
7646+ }
7647+ }, {
7648+ .mfr_id = 0x1c,
7649+ .dev_id = EN29SL800BB,
7650+ .name = "Eon EN29SL800BB",
7651+ .uaddr = {
7652+ [0] = MTD_UADDR_0x0555_0x02AA, /* x8 */
7653+ [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */
7654+ },
7655+ .DevSize = SIZE_1MiB,
7656+ .CmdSet = P_ID_AMD_STD,
7657+ .NumEraseRegions= 4,
7658+ .regions = {
7659+ ERASEINFO(0x04000, 1),
7660+ ERASEINFO(0x02000, 2),
7661+ ERASEINFO(0x08000, 1),
7662+ ERASEINFO(0x10000, 15),
7663+ }
7664+ }, {
7665 .mfr_id = MANUFACTURER_FUJITSU,
7666 .dev_id = MBM29F040C,
7667 .name = "Fujitsu MBM29F040C",
7668@@ -1769,9 +1807,21 @@ static inline u32 jedec_read_mfr(struct map_info *map, __u32 base,
7669 {
7670 map_word result;
7671 unsigned long mask;
7672- u32 ofs = cfi_build_cmd_addr(0, cfi_interleave(cfi), cfi->device_type);
7673- mask = (1 << (cfi->device_type * 8)) -1;
7674- result = map_read(map, base + ofs);
7675+ int bank = 0;
7676+
7677+ /* According to JEDEC "Standard Manufacturer's Identification Code"
7678+ * (http://www.jedec.org/download/search/jep106W.pdf)
7679+ * several first banks can contain 0x7f instead of actual ID
7680+ */
7681+ do {
7682+ u32 ofs = cfi_build_cmd_addr(0 + (bank << 8),
7683+ cfi_interleave(cfi),
7684+ cfi->device_type);
7685+ mask = (1 << (cfi->device_type * 8)) -1;
7686+ result = map_read(map, base + ofs);
7687+ bank++;
7688+ } while ((result.x[0] & mask) == CONTINUATION_CODE);
7689+
7690 return result.x[0] & mask;
7691 }
7692
7693diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c
7694index 738aa59..88dbbdf 100644
7695--- a/drivers/net/dm9000.c
7696+++ b/drivers/net/dm9000.c
7697@@ -546,6 +546,7 @@ dm9000_probe(struct platform_device *pdev)
7698
7699 if (id_val != DM9000_ID) {
7700 printk("%s: wrong id: 0x%08x\n", CARDNAME, id_val);
7701+ ret = -ENODEV;
7702 goto release;
7703 }
7704
7705diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
7706index 58c806e..3a16d9c 100644
7707--- a/drivers/power/Kconfig
7708+++ b/drivers/power/Kconfig
7709@@ -49,4 +49,10 @@ config BATTERY_OLPC
7710 help
7711 Say Y to enable support for the battery on the OLPC laptop.
7712
7713+config BATTERY_EM_X270
7714+ tristate "EM-X270 battery"
7715+ depends on DA9030 && MACH_EM_X270
7716+ help
7717+ Say Y here to enable support for battery on EM-X270.
7718+
7719 endif # POWER_SUPPLY
7720diff --git a/drivers/power/Makefile b/drivers/power/Makefile
7721index 6413ded..dc9585e 100644
7722--- a/drivers/power/Makefile
7723+++ b/drivers/power/Makefile
7724@@ -20,3 +20,4 @@ obj-$(CONFIG_APM_POWER) += apm_power.o
7725 obj-$(CONFIG_BATTERY_DS2760) += ds2760_battery.o
7726 obj-$(CONFIG_BATTERY_PMU) += pmu_battery.o
7727 obj-$(CONFIG_BATTERY_OLPC) += olpc_battery.o
7728+obj-$(CONFIG_BATTERY_EM_X270) += em_x270_battery.o
7729diff --git a/drivers/power/em_x270_battery.c b/drivers/power/em_x270_battery.c
7730new file mode 100644
7731index 0000000..2630c68
7732--- /dev/null
7733+++ b/drivers/power/em_x270_battery.c
7734@@ -0,0 +1,579 @@
7735+/*
7736+ * Power managemnet implementation for EM-X270
7737+ *
7738+ * Copyright (C) 2007 CompuLab, Ltd.
7739+ * Author: Mike Rapoport <mike@compulab.co.il>
7740+ *
7741+ * This program is free software; you can redistribute it and/or modify
7742+ * it under the terms of the GNU General Public License version 2 as
7743+ * published by the Free Software Foundation.
7744+ *
7745+ */
7746+
7747+#define DEBUG
7748+
7749+#include <linux/module.h>
7750+#include <linux/platform_device.h>
7751+#include <linux/pda_power.h>
7752+#include <linux/apm-emulation.h>
7753+#include <linux/da9030.h>
7754+#include <linux/power_supply.h>
7755+#include <linux/pm.h>
7756+
7757+#include <linux/debugfs.h>
7758+#include <linux/seq_file.h>
7759+
7760+#include "../i2c/chips/da9030.h"
7761+
7762+#define VOLTAGE_MAX_DESIGN 4200000 /* 4.2V in uV */
7763+#define VOLTAGE_MIN_DESIGN 3000000 /* 3V in uV */
7764+
7765+/* #define VCHARGE_MIN_THRESHOLD 72 /\* 4.5V *\/ */
7766+
7767+#define VCHARGE_MIN_THRESHOLD 60 /* ?.?V */
7768+#define VCHARGE_MAX_THRESHOLD 89 /* 5.5V */
7769+#define TBAT_LOW_THRESHOLD 197 /* 0oC */
7770+#define TBAT_HIGH_THRESHOLD 78 /* 45oC */
7771+#define TBAT_RESUME_THRESHOLD 100 /* 35oC */
7772+#define VBAT_LOW_THRESHOLD 82 /* 3.498V */
7773+#define VBAT_CRIT_THRESHOLD 62 /* 3.291V */
7774+
7775+struct da9030_charger {
7776+ struct device *dev;
7777+
7778+ struct power_supply bat;
7779+ struct da9030_adc_res adc;
7780+ struct delayed_work work;
7781+
7782+ int interval;
7783+ int status;
7784+ int mA;
7785+ int mV;
7786+
7787+ int is_charging:1;
7788+
7789+#ifdef CONFIG_DEBUG_FS
7790+ struct dentry *debug_file;
7791+#endif
7792+};
7793+
7794+static unsigned short tbat_readings[] = {
7795+ 300, 244, 200, 178, 163, 152, 144, 137, 131,
7796+ 126, 122, 118, 114, 111, 108, 105, 103, 101,
7797+ 98, 96, 94, 93, 91, 89, 88, 86, 85,
7798+ 83, 82, 81, 79, 78, 77, 76, 75, 74,
7799+ 73, 72, 71, 70, 69, 68, 67, 67, 66,
7800+ 65, 64, 63, 63, 62, 61, 60, 60, 59,
7801+ 58, 58, 57, 57, 56, 55, 55, 54, 53,
7802+ 53, 52, 52, 51, 51, 50, 50, 49, 49,
7803+ 48, 48, 47, 47, 46, 46, 45, 45, 44,
7804+ 44, 43, 43, 42, 42, 41, 41, 41, 40,
7805+ 40, 39, 39, 38, 38, 38, 37, 37, 36,
7806+ 36, 35, 35, 35, 34, 34, 34, 33, 33,
7807+ 32, 32, 32, 31, 31, 30, 30, 30, 29,
7808+ 29, 29, 28, 28, 28, 27, 27, 26, 26,
7809+ 26, 25, 25, 25, 24, 24, 24, 23, 23,
7810+ 23, 22, 22, 21, 21, 21, 20, 20, 20,
7811+ 19, 19, 19, 18, 18, 18, 17, 17, 17,
7812+ 16, 16, 16, 15, 15, 14, 14, 14, 13,
7813+ 13, 13, 12, 12, 12, 11, 11, 11, 10,
7814+ 10, 10, 9, 9, 8, 8, 8, 7, 7,
7815+ 7, 6, 6, 5, 5, 5, 4, 4, 3,
7816+ 3, 3, 2, 2, 1, 1, 1, 0, 0,
7817+ -1, -1, -1, -2, -2, -3, -3, -4, -4,
7818+ -5, -5, -6, -6, -6, -7, -7, -8, -9,
7819+ -9, -10, -10, -11, -11, -12, -12, -13, -14,
7820+ -14, -15, -16, -16, -17, -18, -18, -19, -20,
7821+ -21, -21, -22, -23, -24, -25, -26, -27, -28,
7822+ -30, -31, -32, -34, -35, -37, -39, -41, -44,
7823+ -47, -50, -56, -64,
7824+};
7825+
7826+#ifdef CONFIG_DEBUG_FS
7827+
7828+#define REG2VOLT(x) ((((x) * 2650) >> 8) + 2650)
7829+
7830+static int debug_show(struct seq_file *s, void *data)
7831+{
7832+ struct da9030_charger *charger = s->private;
7833+
7834+ seq_printf(s, "charger is %s\n",
7835+ charger->status & CHRG_CHARGER_ENABLE ? "on" : "off");
7836+ if (charger->status & CHRG_CHARGER_ENABLE) {
7837+ seq_printf(s, "iset = %dmA, vset = %dmV\n",
7838+ charger->mA, charger->mV);
7839+ }
7840+
7841+ seq_printf(s, "vbat_res = %d (%dmV)\n",
7842+ charger->adc.vbat_res, REG2VOLT(charger->adc.vbat_res));
7843+ seq_printf(s, "vbatmin_res = %d (%dmV)\n",
7844+ charger->adc.vbatmin_res,
7845+ REG2VOLT(charger->adc.vbatmin_res));
7846+ seq_printf(s, "vbatmintxon = %d (%dmV)\n",
7847+ charger->adc.vbatmintxon,
7848+ REG2VOLT(charger->adc.vbatmintxon));
7849+ seq_printf(s, "ichmax_res = %d\n", charger->adc.ichmax_res);
7850+ seq_printf(s, "ichmin_res = %d\n", charger->adc.ichmin_res);
7851+ seq_printf(s, "ichaverage_res = %d\n", charger->adc.ichaverage_res);
7852+ seq_printf(s, "vchmax_res = %d (%dmV)\n",
7853+ charger->adc.vchmax_res,
7854+ REG2VOLT(charger->adc.vchmax_res));
7855+ seq_printf(s, "vchmin_res = %d (%dmV)\n",
7856+ charger->adc.vchmin_res,
7857+ REG2VOLT(charger->adc.vchmin_res));
7858+ seq_printf(s, "tbat_res = %d (%doC\n", charger->adc.tbat_res,
7859+ tbat_readings[charger->adc.tbat_res]);
7860+ seq_printf(s, "adc_in4_res = %d\n", charger->adc.adc_in4_res);
7861+ seq_printf(s, "adc_in5_res = %d\n", charger->adc.adc_in5_res);
7862+
7863+ return 0;
7864+}
7865+
7866+static int debug_open(struct inode *inode, struct file *file)
7867+{
7868+ return single_open(file, debug_show, inode->i_private);
7869+}
7870+
7871+static const struct file_operations debug_fops = {
7872+ .open = debug_open,
7873+ .read = seq_read,
7874+ .llseek = seq_lseek,
7875+ .release = single_release,
7876+};
7877+
7878+static struct dentry* da9030_create_debugfs(struct da9030_charger *charger)
7879+{
7880+ charger->debug_file = debugfs_create_file("charger", 0666, 0, charger,
7881+ &debug_fops);
7882+ return charger->debug_file;
7883+}
7884+
7885+static void da9030_remove_debugfs(struct da9030_charger *charger)
7886+{
7887+ debugfs_remove(charger->debug_file);
7888+}
7889+#else
7890+#define da9030_create_debugfs(x) NULL
7891+#define da9030_remove_debugfs(x) do {} while(0)
7892+#endif
7893+
7894+static void da9030_set_charge(struct da9030_charger *charger, int on)
7895+{
7896+/* int status = da9030_get_status(); */
7897+ if (on) {
7898+ pr_debug("%s: enabling charger\n", __FUNCTION__);
7899+ da9030_set_thresholds(TBAT_HIGH_THRESHOLD,
7900+ TBAT_RESUME_THRESHOLD,
7901+ TBAT_LOW_THRESHOLD);
7902+ da9030_set_charger(1, 1000, 4200);
7903+ charger->is_charging = 1;
7904+ }
7905+ else {
7906+ /* disable charger */
7907+ pr_debug("%s: disabling charger\n", __FUNCTION__);
7908+ da9030_set_charger(0, 0, 0);
7909+ charger->is_charging = 0;
7910+ }
7911+}
7912+
7913+static void da9030_charging_monitor(struct work_struct *work)
7914+{
7915+ struct da9030_charger *charger;
7916+ int is_on;
7917+ unsigned int mA, mV;
7918+
7919+ charger = container_of(work, struct da9030_charger, work.work);
7920+
7921+ da9030_get_charger(&is_on, &mA, &mV);
7922+ da9030_read_adc(&charger->adc);
7923+
7924+ charger->status = da9030_get_status();
7925+ charger->mA = mA;
7926+ charger->mV = mV;
7927+
7928+ /* we wake or boot with external power on */
7929+ if (!is_on && (charger->status & STATUS_CHDET)) {
7930+ da9030_set_charge(charger, 1);
7931+ return;
7932+ }
7933+
7934+ if (is_on) {
7935+/* pr_info("%s: mA = %d, mV = %d\n", __FUNCTION__, mA, mV); */
7936+/* pr_info("%s: vchmin_res = %d, vchmax_res = %d\n", */
7937+/* __FUNCTION__, charger->adc.vchmin_res, */
7938+/* charger->adc.vchmax_res); */
7939+/* pr_info("%s: tbat_res = %d\n", */
7940+/* __FUNCTION__, charger->adc.tbat_res); */
7941+ if (charger->adc.vbat_res > VBAT_LOW_THRESHOLD) {
7942+ /* update VBAT threshlods ? */
7943+ da9030_set_reg(VBATMON, VBAT_LOW_THRESHOLD);
7944+ }
7945+ if (charger->adc.vchmax_res > VCHARGE_MAX_THRESHOLD ||
7946+ charger->adc.vchmin_res < VCHARGE_MIN_THRESHOLD ||
7947+ /* Tempreture readings are negative */
7948+ charger->adc.tbat_res < TBAT_HIGH_THRESHOLD ||
7949+ charger->adc.tbat_res > TBAT_LOW_THRESHOLD) {
7950+ /* disable charger */
7951+ da9030_set_charge(charger, 0);
7952+ }
7953+ }
7954+
7955+ /* reschedule for the next time */
7956+ schedule_delayed_work(&charger->work, charger->interval);
7957+}
7958+
7959+void da9030_battery_release(struct device * dev)
7960+{
7961+}
7962+
7963+static void da9030_external_power_changed(struct power_supply *psy)
7964+{
7965+/* struct da9030_charger *charger; */
7966+
7967+/* charger = container_of(psy, struct da9030_charger, bat); */
7968+/* pr_info("%s:\n", __FUNCTION__); */
7969+/* da9030_set_charge(charger); */
7970+}
7971+
7972+struct da9030_battery_thresh {
7973+ int voltage;
7974+ int percentage;
7975+};
7976+
7977+static struct da9030_battery_thresh vbat_ranges[] = {
7978+ { 150, 100},
7979+ { 149, 99},
7980+ { 148, 98},
7981+ { 147, 98},
7982+ { 146, 97},
7983+ { 145, 96},
7984+ { 144, 96},
7985+ { 143, 95},
7986+ { 142, 94},
7987+ { 141, 93},
7988+ { 140, 92},
7989+ { 139, 91},
7990+ { 138, 90},
7991+ { 137, 90},
7992+ { 136, 89},
7993+ { 135, 88},
7994+ { 134, 88},
7995+ { 133, 87},
7996+ { 132, 86},
7997+ { 131, 85},
7998+ { 130, 83},
7999+ { 129, 82},
8000+ { 128, 81},
8001+ { 127, 81},
8002+ { 126, 80},
8003+ { 125, 75},
8004+ { 124, 74},
8005+ { 123, 73},
8006+ { 122, 70},
8007+ { 121, 66},
8008+ { 120, 65},
8009+ { 119, 64},
8010+ { 118, 64},
8011+ { 117, 63},
8012+ { 116, 59},
8013+ { 115, 58},
8014+ { 114, 57},
8015+ { 113, 57},
8016+ { 112, 56},
8017+ { 111, 50},
8018+ { 110, 49},
8019+ { 109, 49},
8020+ { 108, 48},
8021+ { 107, 48},
8022+ { 106, 33},
8023+ { 105, 32},
8024+ { 104, 32},
8025+ { 103, 32},
8026+ { 102, 31},
8027+ { 101, 16},
8028+ { 100, 15},
8029+ { 99, 15},
8030+ { 98, 15},
8031+ { 97, 10},
8032+ { 96, 9},
8033+ { 95, 7},
8034+ { 94, 3},
8035+ { 93, 0},
8036+};
8037+
8038+static enum power_supply_property da9030_bat_props[] = {
8039+ POWER_SUPPLY_PROP_STATUS,
8040+ POWER_SUPPLY_PROP_HEALTH,
8041+ POWER_SUPPLY_PROP_TECHNOLOGY,
8042+ POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
8043+ POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
8044+ POWER_SUPPLY_PROP_VOLTAGE_NOW,
8045+ POWER_SUPPLY_PROP_CURRENT_AVG,
8046+ POWER_SUPPLY_PROP_CAPACITY, /* in percents! */
8047+ POWER_SUPPLY_PROP_TEMP,
8048+ POWER_SUPPLY_PROP_MANUFACTURER,
8049+ POWER_SUPPLY_PROP_MODEL_NAME,
8050+};
8051+
8052+static void da9030_bat_check_status(union power_supply_propval *val)
8053+{
8054+ int charger_on;
8055+ int status = da9030_get_status();
8056+
8057+ da9030_get_charger(&charger_on, 0, 0);
8058+
8059+ /* FIXME: below code is very crude approximation of actual
8060+ states, we need to take into account voltage and current
8061+ measurements to determine actual charger state */
8062+ if (status & STATUS_CHDET) {
8063+ if (charger_on) {
8064+ val->intval = POWER_SUPPLY_STATUS_CHARGING;
8065+ }
8066+ else {
8067+ val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
8068+ }
8069+ }
8070+ else {
8071+ val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
8072+ }
8073+}
8074+
8075+static void da9030_bat_check_health(union power_supply_propval *val)
8076+{
8077+ int fault_log = da9030_get_fault_log();
8078+
8079+ if (fault_log & FAULT_LOG_OVER_TEMP) {
8080+ val->intval = POWER_SUPPLY_HEALTH_OVERHEAT;
8081+ }
8082+ else if (fault_log & FAULT_LOG_VBAT_OVER) {
8083+ val->intval = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
8084+ }
8085+ else {
8086+ val->intval = POWER_SUPPLY_HEALTH_GOOD;
8087+ }
8088+}
8089+
8090+static int vbat_interpolate(int reg)
8091+{
8092+ int i;
8093+
8094+ for (i = 0; i < ARRAY_SIZE(vbat_ranges); i++ )
8095+ if (vbat_ranges[i].voltage == reg) {
8096+ pr_debug("%s: voltage = %d, percentage = %d\n",
8097+ __FUNCTION__, vbat_ranges[i].voltage,
8098+ vbat_ranges[i].percentage);
8099+ return vbat_ranges[i].percentage;
8100+ }
8101+
8102+ return 0;
8103+}
8104+
8105+static int da9030_bat_get_property(struct power_supply *psy,
8106+ enum power_supply_property psp,
8107+ union power_supply_propval *val)
8108+{
8109+ u32 reg;
8110+ struct da9030_charger *charger;
8111+ charger = container_of(psy, struct da9030_charger, bat);
8112+
8113+ switch(psp) {
8114+ case POWER_SUPPLY_PROP_STATUS:
8115+ da9030_bat_check_status(val);
8116+ break;
8117+ case POWER_SUPPLY_PROP_HEALTH:
8118+ da9030_bat_check_health(val);
8119+ break;
8120+ case POWER_SUPPLY_PROP_TECHNOLOGY:
8121+ val->intval = POWER_SUPPLY_TECHNOLOGY_LIPO;
8122+ break;
8123+ case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
8124+ val->intval = VOLTAGE_MAX_DESIGN;
8125+ break;
8126+ case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
8127+ val->intval = VOLTAGE_MIN_DESIGN;
8128+ break;
8129+ case POWER_SUPPLY_PROP_VOLTAGE_NOW:
8130+ reg = charger->adc.vbat_res;
8131+ /* V = (reg / 256) * 2.65 + 2.65 (V) */
8132+ val->intval = ((reg * 2650000) >> 8) + 2650000;
8133+ break;
8134+ case POWER_SUPPLY_PROP_CURRENT_AVG:
8135+ reg = charger->adc.ichaverage_res;
8136+ val->intval = reg; /* reg */
8137+ break;
8138+ case POWER_SUPPLY_PROP_CAPACITY:
8139+ reg = charger->adc.vbat_res;
8140+ val->intval = vbat_interpolate(reg);
8141+ break;
8142+ case POWER_SUPPLY_PROP_TEMP:
8143+ reg = charger->adc.tbat_res;
8144+ val->intval = tbat_readings[reg];
8145+ break;
8146+ case POWER_SUPPLY_PROP_MANUFACTURER:
8147+ val->strval = "MaxPower";
8148+ pr_debug("%s: MFG = %s\n", __FUNCTION__, val->strval);
8149+ break;
8150+ case POWER_SUPPLY_PROP_MODEL_NAME:
8151+ val->strval = "LP555597P6H-FPS";
8152+ pr_debug("%s: MODEL = %s\n", __FUNCTION__, val->strval);
8153+ break;
8154+ default: break;
8155+ }
8156+
8157+ return 0;
8158+}
8159+
8160+static void da9030_setup_battery(struct power_supply *bat)
8161+{
8162+ bat->name = "em-x270-battery";
8163+ bat->type = POWER_SUPPLY_TYPE_BATTERY;
8164+ bat->properties = da9030_bat_props;
8165+ bat->num_properties = ARRAY_SIZE(da9030_bat_props);
8166+ bat->get_property = da9030_bat_get_property;
8167+ bat->use_for_apm = 1;
8168+ bat->external_power_changed = da9030_external_power_changed;
8169+};
8170+
8171+static void da9030_chiover_callback(int event, void *_charger)
8172+{
8173+ /* disable charger */
8174+ struct da9030_charger *charger = _charger;
8175+ da9030_set_charge(charger, 0);
8176+}
8177+
8178+static void da9030_tbat_callback(int event, void *_charger)
8179+{
8180+ /* disable charger */
8181+ struct da9030_charger *charger = _charger;
8182+ da9030_set_charge(charger, 0);
8183+}
8184+
8185+static void da9030_vbat_callback(int event, void *_charger)
8186+{
8187+ struct da9030_charger *charger = _charger;
8188+ da9030_read_adc(&charger->adc);
8189+
8190+ if (charger->is_charging) {
8191+ if (charger->adc.vbat_res < VBAT_LOW_THRESHOLD) {
8192+ /* set VBAT threshold for critical */
8193+ da9030_set_reg(VBATMON, VBAT_CRIT_THRESHOLD);
8194+ }
8195+ else if (charger->adc.vbat_res < VBAT_CRIT_THRESHOLD) {
8196+ /* notify the system of battery critical */
8197+ apm_queue_event(APM_CRITICAL_SUSPEND);
8198+ }
8199+ }
8200+}
8201+
8202+static void da9030_ccto_callback(int event, void *_charger)
8203+{
8204+ /* x3 */
8205+}
8206+
8207+static void da9030_tcto_callback(int event, void *_charger)
8208+{
8209+ /* x3 */
8210+}
8211+
8212+static void da9030_chdet_callback(int event, void *_charger)
8213+{
8214+ struct da9030_charger *charger = _charger;
8215+ int status = da9030_get_status();
8216+ da9030_set_charge(charger, !!(status & CHRG_CHARGER_ENABLE));
8217+}
8218+
8219+static int da9030_battery_probe(struct platform_device *pdev)
8220+{
8221+ struct da9030_charger *charger;
8222+
8223+ pr_debug("%s\n", __FUNCTION__);
8224+ charger = kzalloc(sizeof(*charger), GFP_KERNEL);
8225+ if (charger == NULL) {
8226+ return -ENOMEM;
8227+ }
8228+
8229+ charger->dev = &pdev->dev;
8230+
8231+ charger->interval = 10 * HZ; /* 10 seconds between monotor runs */
8232+ da9030_setup_battery(&charger->bat);
8233+
8234+ platform_set_drvdata(pdev, charger);
8235+
8236+ da9030_enable_adc();
8237+
8238+ INIT_DELAYED_WORK(&charger->work, da9030_charging_monitor);
8239+ schedule_delayed_work(&charger->work, charger->interval);
8240+
8241+ charger->debug_file = da9030_create_debugfs(charger);
8242+
8243+ da9030_setup_battery(&charger->bat);
8244+
8245+ da9030_register_callback(DA9030_IRQ_CHDET,
8246+ da9030_chdet_callback,
8247+ charger);
8248+ da9030_register_callback(DA9030_IRQ_VBATMON,
8249+ da9030_vbat_callback,
8250+ charger);
8251+
8252+ /* critical condition events */
8253+ da9030_register_callback(DA9030_IRQ_CHIOVER,
8254+ da9030_chiover_callback,
8255+ charger);
8256+ da9030_register_callback(DA9030_IRQ_TBAT,
8257+ da9030_tbat_callback,
8258+ charger);
8259+
8260+ /* timer events */
8261+ da9030_register_callback(DA9030_IRQ_TCTO,
8262+ da9030_tcto_callback,
8263+ charger);
8264+ da9030_register_callback(DA9030_IRQ_CCTO,
8265+ da9030_ccto_callback,
8266+ charger);
8267+
8268+ power_supply_register(&pdev->dev, &charger->bat);
8269+
8270+ return 0;
8271+}
8272+
8273+static int da9030_battery_remove(struct platform_device *dev)
8274+{
8275+ struct da9030_charger *charger = platform_get_drvdata(dev);
8276+
8277+ pr_debug("%s\n", __FUNCTION__);
8278+ da9030_remove_debugfs(charger);
8279+ cancel_delayed_work(&charger->work);
8280+ power_supply_unregister(&charger->bat);
8281+ kfree(charger);
8282+ return 0;
8283+}
8284+
8285+static struct platform_driver da9030_battery_driver = {
8286+ .driver = {
8287+ .name = "da9030-battery",
8288+ .owner = THIS_MODULE,
8289+ },
8290+ .probe = da9030_battery_probe,
8291+ .remove = da9030_battery_remove,
8292+};
8293+
8294+static int da9030_battery_init(void)
8295+{
8296+ pr_debug("%s\n", __FUNCTION__);
8297+
8298+ return platform_driver_register(&da9030_battery_driver);
8299+}
8300+
8301+static void da9030_battery_exit(void)
8302+{
8303+ pr_debug("%s\n", __FUNCTION__);
8304+
8305+ platform_driver_unregister(&da9030_battery_driver);
8306+}
8307+
8308+module_init(da9030_battery_init);
8309+module_exit(da9030_battery_exit);
8310+
8311+MODULE_DESCRIPTION("DA9030 charger driver");
8312+MODULE_AUTHOR("Mike Rapoport");
8313+MODULE_LICENSE("GPL");
8314diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
8315index 767aed5..4c44a7a 100644
8316--- a/drivers/usb/gadget/Kconfig
8317+++ b/drivers/usb/gadget/Kconfig
8318@@ -195,6 +195,26 @@ config USB_M66592
8319 default USB_GADGET
8320 select USB_GADGET_SELECTED
8321
8322+config USB_GADGET_PXA27X
8323+ boolean "PXA 27x"
8324+ depends on ARCH_PXA && PXA27x
8325+ help
8326+ Intel's PXA 27x series XScale ARM-5TE processors include
8327+ an integrated full speed USB 1.1 device controller.
8328+
8329+ It has 23 endpoints, as well as endpoint zero (for control
8330+ transfers).
8331+
8332+ Say "y" to link the driver statically, or "m" to build a
8333+ dynamically linked module called "pxa27x_udc" and force all
8334+ gadget drivers to also be dynamically linked.
8335+
8336+config USB_PXA27X
8337+ tristate
8338+ depends on USB_GADGET_PXA27X
8339+ default USB_GADGET
8340+ select USB_GADGET_SELECTED
8341+
8342 config USB_GADGET_GOKU
8343 boolean "Toshiba TC86C001 'Goku-S'"
8344 depends on PCI
8345diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
8346index 1bc0f03..b8743bf 100644
8347--- a/drivers/usb/gadget/Makefile
8348+++ b/drivers/usb/gadget/Makefile
8349@@ -9,6 +9,7 @@ obj-$(CONFIG_USB_DUMMY_HCD) += dummy_hcd.o
8350 obj-$(CONFIG_USB_NET2280) += net2280.o
8351 obj-$(CONFIG_USB_AMD5536UDC) += amd5536udc.o
8352 obj-$(CONFIG_USB_PXA2XX) += pxa2xx_udc.o
8353+obj-$(CONFIG_USB_PXA27X) += pxa27x_udc.o
8354 obj-$(CONFIG_USB_GOKU) += goku_udc.o
8355 obj-$(CONFIG_USB_OMAP) += omap_udc.o
8356 obj-$(CONFIG_USB_LH7A40X) += lh7a40x_udc.o
8357diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c
8358index 3aa46cf..d7d5550 100644
8359--- a/drivers/usb/gadget/epautoconf.c
8360+++ b/drivers/usb/gadget/epautoconf.c
8361@@ -228,14 +228,19 @@ find_ep (struct usb_gadget *gadget, const char *name)
8362 *
8363 * On failure, this returns a null endpoint descriptor.
8364 */
8365-struct usb_ep * __devinit usb_ep_autoconfig (
8366+struct usb_ep * usb_ep_autoconfig (
8367 struct usb_gadget *gadget,
8368- struct usb_endpoint_descriptor *desc
8369+ struct usb_endpoint_descriptor *desc,
8370+ struct usb_endpoint_config *epconfig, int numconfigs
8371 )
8372 {
8373 struct usb_ep *ep;
8374 u8 type;
8375
8376+ /* Use device specific ep allocation code if provided */
8377+ if (gadget->ops->ep_alloc)
8378+ return gadget->ops->ep_alloc(gadget, desc, epconfig, numconfigs);
8379+
8380 type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
8381
8382 /* First, apply chip-specific "best usage" knowledge.
8383diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
8384index 593e235..87aa9fb 100644
8385--- a/drivers/usb/gadget/ether.c
8386+++ b/drivers/usb/gadget/ether.c
8387@@ -1350,6 +1350,10 @@ static void rndis_response_complete (struct usb_ep *ep, struct usb_request *req)
8388 /* done sending after USB_CDC_GET_ENCAPSULATED_RESPONSE */
8389 }
8390
8391+#ifdef CONFIG_USB_GADGET_PXA27X
8392+int write_ep0_zlp(void);
8393+#endif
8394+
8395 static void rndis_command_complete (struct usb_ep *ep, struct usb_request *req)
8396 {
8397 struct eth_dev *dev = ep->driver_data;
8398@@ -1360,6 +1364,10 @@ static void rndis_command_complete (struct usb_ep *ep, struct usb_request *req)
8399 status = rndis_msg_parser (dev->rndis_config, (u8 *) req->buf);
8400 if (status < 0)
8401 ERROR(dev, "%s: rndis parse error %d\n", __FUNCTION__, status);
8402+
8403+#ifdef CONFIG_USB_GADGET_PXA27X
8404+ write_ep0_zlp();
8405+#endif
8406 spin_unlock(&dev->lock);
8407 }
8408
8409@@ -2287,7 +2295,8 @@ eth_bind (struct usb_gadget *gadget)
8410 struct eth_dev *dev;
8411 struct net_device *net;
8412 u8 cdc = 1, zlp = 1, rndis = 1;
8413- struct usb_ep *in_ep, *out_ep, *status_ep = NULL;
8414+ struct usb_ep *in_ep = NULL , *out_ep = NULL, *status_ep = NULL;
8415+ struct usb_endpoint_config ep_config[2];
8416 int status = -ENOMEM;
8417 int gcnum;
8418
8419@@ -2386,7 +2395,30 @@ eth_bind (struct usb_gadget *gadget)
8420
8421 /* all we really need is bulk IN/OUT */
8422 usb_ep_autoconfig_reset (gadget);
8423- in_ep = usb_ep_autoconfig (gadget, &fs_source_desc);
8424+
8425+ ep_config[0].config = DEV_CONFIG_VALUE;
8426+#if defined(DEV_CONFIG_CDC)
8427+ ep_config[0].interface = data_intf.bInterfaceNumber;
8428+ ep_config[0].altinterface = data_intf.bAlternateSetting;
8429+#else /* DEV_CONFIG_SUBSET */
8430+ ep_config[0].interface = subset_data_intf.bInterfaceNumber;
8431+ ep_config[0].altinterface = subset_data_intf.bAlternateSetting;
8432+#endif
8433+
8434+#ifdef CONFIG_USB_ETH_RNDIS
8435+ ep_config[1].config = DEV_RNDIS_CONFIG_VALUE;
8436+#ifdef CONFIG_USB_GADGET_PXA27X
8437+ ep_config[1].interface = 0;
8438+#else
8439+ ep_config[1].interface = rndis_data_intf.bInterfaceNumber;
8440+#endif
8441+ ep_config[1].altinterface = rndis_data_intf.bAlternateSetting;
8442+
8443+ in_ep = usb_ep_autoconfig(gadget, &fs_source_desc, &ep_config[0], 2);
8444+#else
8445+ in_ep = usb_ep_autoconfig(gadget, &fs_source_desc, &ep_config[0], 1);
8446+#endif
8447+
8448 if (!in_ep) {
8449 autoconf_fail:
8450 dev_err (&gadget->dev,
8451@@ -2396,7 +2428,12 @@ autoconf_fail:
8452 }
8453 in_ep->driver_data = in_ep; /* claim */
8454
8455- out_ep = usb_ep_autoconfig (gadget, &fs_sink_desc);
8456+#ifdef CONFIG_USB_ETH_RNDIS
8457+ out_ep = usb_ep_autoconfig(gadget, &fs_sink_desc, &ep_config[0], 2);
8458+#else
8459+ out_ep = usb_ep_autoconfig(gadget, &fs_sink_desc, &ep_config[0], 1);
8460+#endif
8461+
8462 if (!out_ep)
8463 goto autoconf_fail;
8464 out_ep->driver_data = out_ep; /* claim */
8465@@ -2406,7 +2443,25 @@ autoconf_fail:
8466 * Since some hosts expect one, try to allocate one anyway.
8467 */
8468 if (cdc || rndis) {
8469- status_ep = usb_ep_autoconfig (gadget, &fs_status_desc);
8470+#ifdef DEV_CONFIG_CDC
8471+ ep_config[0].config = DEV_CONFIG_VALUE;
8472+ ep_config[0].interface = control_intf.bInterfaceNumber;
8473+ ep_config[0].altinterface = control_intf.bAlternateSetting;
8474+#endif
8475+#ifdef CONFIG_USB_ETH_RNDIS
8476+ ep_config[1].config = DEV_RNDIS_CONFIG_VALUE;
8477+ ep_config[1].interface = rndis_control_intf.bInterfaceNumber;
8478+ ep_config[1].altinterface = rndis_control_intf.bAlternateSetting;
8479+#endif
8480+
8481+#if defined(DEV_CONFIG_CDC) && defined(CONFIG_USB_ETH_RNDIS)
8482+ status_ep = usb_ep_autoconfig(gadget, &fs_status_desc, &ep_config[0], 2);
8483+#elif defined(CONFIG_USB_ETH_RNDIS)
8484+ status_ep = usb_ep_autoconfig(gadget, &fs_status_desc, &ep_config[1], 1);
8485+#else
8486+ status_ep = usb_ep_autoconfig(gadget, &fs_status_desc, &ep_config[0], 1);
8487+#endif
8488+
8489 if (status_ep) {
8490 status_ep->driver_data = status_ep; /* claim */
8491 } else if (rndis) {
8492diff --git a/drivers/usb/gadget/file_storage.c b/drivers/usb/gadget/file_storage.c
8493index 965ad7b..b9cd8c9 100644
8494--- a/drivers/usb/gadget/file_storage.c
8495+++ b/drivers/usb/gadget/file_storage.c
8496@@ -3841,6 +3841,7 @@ static int __init fsg_bind(struct usb_gadget *gadget)
8497 struct usb_ep *ep;
8498 struct usb_request *req;
8499 char *pathbuf, *p;
8500+ struct usb_endpoint_config ep_config;
8501
8502 fsg->gadget = gadget;
8503 set_gadget_data(gadget, fsg);
8504@@ -3911,21 +3912,25 @@ static int __init fsg_bind(struct usb_gadget *gadget)
8505 }
8506
8507 /* Find all the endpoints we will use */
8508+ ep_config.config = CONFIG_VALUE;
8509+ ep_config.interface = intf_desc.bInterfaceNumber;
8510+ ep_config.altinterface = intf_desc.bAlternateSetting;
8511+
8512 usb_ep_autoconfig_reset(gadget);
8513- ep = usb_ep_autoconfig(gadget, &fs_bulk_in_desc);
8514+ ep = usb_ep_autoconfig(gadget, &fs_bulk_in_desc, &ep_config, 1);
8515 if (!ep)
8516 goto autoconf_fail;
8517 ep->driver_data = fsg; // claim the endpoint
8518 fsg->bulk_in = ep;
8519
8520- ep = usb_ep_autoconfig(gadget, &fs_bulk_out_desc);
8521+ ep = usb_ep_autoconfig(gadget, &fs_bulk_out_desc, &ep_config, 1);
8522 if (!ep)
8523 goto autoconf_fail;
8524 ep->driver_data = fsg; // claim the endpoint
8525 fsg->bulk_out = ep;
8526
8527 if (transport_is_cbi()) {
8528- ep = usb_ep_autoconfig(gadget, &fs_intr_in_desc);
8529+ ep = usb_ep_autoconfig(gadget, &fs_intr_in_desc, &ep_config, 1);
8530 if (!ep)
8531 goto autoconf_fail;
8532 ep->driver_data = fsg; // claim the endpoint
8533diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c
8534new file mode 100644
8535index 0000000..d4270d4
8536--- /dev/null
8537+++ b/drivers/usb/gadget/pxa27x_udc.c
8538@@ -0,0 +1,2387 @@
8539+/*
8540+ * Handles the Intel 27x USB Device Controller (UDC)
8541+ *
8542+ * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
8543+ * Copyright (C) 2003 Robert Schwebel, Pengutronix
8544+ * Copyright (C) 2003 Benedikt Spranger, Pengutronix
8545+ * Copyright (C) 2003 David Brownell
8546+ * Copyright (C) 2003 Joshua Wise
8547+ * Copyright (C) 2004 Intel Corporation
8548+ * Copyright (C) 2005 SDG Systems, LLC (Aric Blumer)
8549+ * Copyright (C) 2005-2006 Openedhand Ltd. (Richard Purdie)
8550+ *
8551+ * This program is free software; you can redistribute it and/or modify
8552+ * it under the terms of the GNU General Public License as published by
8553+ * the Free Software Foundation; either version 2 of the License, or
8554+ * (at your option) any later version.
8555+ *
8556+ * This program is distributed in the hope that it will be useful,
8557+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
8558+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
8559+ * GNU General Public License for more details.
8560+ *
8561+ * You should have received a copy of the GNU General Public License
8562+ * along with this program; if not, write to the Free Software
8563+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
8564+ *
8565+ */
8566+
8567+#undef DEBUG
8568+//#define DEBUG 1
8569+//#define VERBOSE DBG_VERBOSE
8570+
8571+#include <linux/module.h>
8572+#include <linux/kernel.h>
8573+#include <linux/ioport.h>
8574+#include <linux/types.h>
8575+#include <linux/version.h>
8576+#include <linux/errno.h>
8577+#include <linux/platform_device.h>
8578+#include <linux/delay.h>
8579+#include <linux/sched.h>
8580+#include <linux/slab.h>
8581+#include <linux/init.h>
8582+#include <linux/timer.h>
8583+#include <linux/list.h>
8584+#include <linux/interrupt.h>
8585+#include <linux/proc_fs.h>
8586+#include <linux/mm.h>
8587+#include <linux/device.h>
8588+#include <linux/dma-mapping.h>
8589+
8590+#include <asm/byteorder.h>
8591+#include <asm/dma.h>
8592+#include <asm/io.h>
8593+#include <asm/irq.h>
8594+#include <asm/system.h>
8595+#include <asm/mach-types.h>
8596+#include <asm/unaligned.h>
8597+#include <asm/hardware.h>
8598+#include <asm/arch/pxa-regs.h>
8599+
8600+#include <linux/usb/ch9.h>
8601+#include <linux/usb_gadget.h>
8602+
8603+#include <asm/arch/udc.h>
8604+
8605+/*
8606+ * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x
8607+ * series processors.
8608+ *
8609+ * Such controller drivers work with a gadget driver. The gadget driver
8610+ * returns descriptors, implements configuration and data protocols used
8611+ * by the host to interact with this device, and allocates endpoints to
8612+ * the different protocol interfaces. The controller driver virtualizes
8613+ * usb hardware so that the gadget drivers will be more portable.
8614+ *
8615+ * This UDC hardware wants to implement a bit too much USB protocol. The
8616+ * biggest issue is that the endpoints have to be setup before the controller
8617+ * can be enabled and each endpoint can only have one configuration, interface
8618+ * and alternative interface number. Once enabled, these cannot be changed
8619+ * without a controller reset.
8620+ *
8621+ * Intel Errata #22 mentions issues when changing alternate interface.
8622+ * The exact meaning of this remains uncertain as gadget drivers using alternate
8623+ * interfaces such as CDC-Ethernet appear to work...
8624+ */
8625+
8626+#define DRIVER_VERSION "01-01-2006"
8627+#define DRIVER_DESC "PXA 27x USB Device Controller driver"
8628+
8629+static const char driver_name [] = "pxa27x_udc";
8630+
8631+static const char ep0name [] = "ep0";
8632+
8633+
8634+#define USE_DMA
8635+//#undef USE_DMA
8636+
8637+#ifdef CONFIG_PROC_FS
8638+#define UDC_PROC_FILE
8639+#endif
8640+
8641+#include "pxa27x_udc.h"
8642+
8643+#ifdef USE_DMA
8644+static int use_dma = 1;
8645+module_param(use_dma, bool, 0);
8646+MODULE_PARM_DESC(use_dma, "true to use dma");
8647+
8648+static void dma_nodesc_handler(int dmach, void *_ep);
8649+static void kick_dma(struct pxa27x_ep *ep, struct pxa27x_request *req);
8650+
8651+#define DMASTR " (dma support)"
8652+
8653+#else /* !USE_DMA */
8654+#define DMASTR " (pio only)"
8655+#endif
8656+
8657+#define UDCISR0_IR0 0x3
8658+#define UDCISR_INT_MASK (UDC_INT_FIFOERROR | UDC_INT_PACKETCMP)
8659+#define UDCICR_INT_MASK UDCISR_INT_MASK
8660+
8661+#define UDCCSR_MASK (UDCCSR_FST | UDCCSR_DME)
8662+
8663+static void pxa27x_ep_fifo_flush(struct usb_ep *ep);
8664+static void nuke(struct pxa27x_ep *, int status);
8665+static void udc_init_ep(struct pxa27x_udc *dev);
8666+
8667+
8668+/*
8669+ * Endpoint Functions
8670+ */
8671+static void pio_irq_enable(int ep_num)
8672+{
8673+ if (ep_num < 16)
8674+ UDCICR0 |= 3 << (ep_num * 2);
8675+ else {
8676+ ep_num -= 16;
8677+ UDCICR1 |= 3 << (ep_num * 2);
8678+ }
8679+}
8680+
8681+static void pio_irq_disable(int ep_num)
8682+{
8683+ ep_num &= 0xf;
8684+ if (ep_num < 16)
8685+ UDCICR0 &= ~(3 << (ep_num * 2));
8686+ else {
8687+ ep_num -= 16;
8688+ UDCICR1 &= ~(3 << (ep_num * 2));
8689+ }
8690+}
8691+
8692+/* The UDCCR reg contains mask and interrupt status bits,
8693+ * so using '|=' isn't safe as it may ack an interrupt.
8694+ */
8695+#define UDCCR_MASK_BITS (UDCCR_OEN | UDCCR_UDE)
8696+
8697+static inline void udc_set_mask_UDCCR(int mask)
8698+{
8699+ UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
8700+}
8701+
8702+static inline void udc_clear_mask_UDCCR(int mask)
8703+{
8704+ UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
8705+}
8706+
8707+static inline void udc_ack_int_UDCCR(int mask)
8708+{
8709+ /* udccr contains the bits we dont want to change */
8710+ __u32 udccr = UDCCR & UDCCR_MASK_BITS;
8711+
8712+ UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
8713+}
8714+
8715+/*
8716+ * Endpoint enable/disable
8717+ *
8718+ * Not much to do here as the ep_alloc function sets up most things. Once
8719+ * enabled, not much of the pxa27x configuration can be changed.
8720+ *
8721+ */
8722+static int pxa27x_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
8723+{
8724+ struct pxa27x_virt_ep *virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep);
8725+ struct pxa27x_ep *ep = virt_ep->pxa_ep;
8726+ struct pxa27x_udc *dev;
8727+
8728+ if (!_ep || !desc || _ep->name == ep0name
8729+ || desc->bDescriptorType != USB_DT_ENDPOINT
8730+ || ep->fifo_size < le16_to_cpu(desc->wMaxPacketSize)) {
8731+ dev_err(ep->dev->dev, "%s, bad ep or descriptor\n", __FUNCTION__);
8732+ return -EINVAL;
8733+ }
8734+
8735+ /* xfer types must match, except that interrupt ~= bulk */
8736+ if( ep->ep_type != USB_ENDPOINT_XFER_BULK
8737+ && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
8738+ dev_err(ep->dev->dev, "%s, %s type mismatch\n", __FUNCTION__, _ep->name);
8739+ return -EINVAL;
8740+ }
8741+
8742+ /* hardware _could_ do smaller, but driver doesn't */
8743+ if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
8744+ && le16_to_cpu (desc->wMaxPacketSize)
8745+ != BULK_FIFO_SIZE)
8746+ || !desc->wMaxPacketSize) {
8747+ dev_err(ep->dev->dev, "%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
8748+ return -ERANGE;
8749+ }
8750+
8751+ dev = ep->dev;
8752+ if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
8753+ dev_err(ep->dev->dev, "%s, bogus device state\n", __FUNCTION__);
8754+ return -ESHUTDOWN;
8755+ }
8756+
8757+ ep->desc = desc;
8758+ ep->dma = -1;
8759+ ep->stopped = 0;
8760+ ep->pio_irqs = ep->dma_irqs = 0;
8761+ ep->usb_ep->maxpacket = le16_to_cpu(desc->wMaxPacketSize);
8762+
8763+ /* flush fifo (mostly for OUT buffers) */
8764+ pxa27x_ep_fifo_flush(_ep);
8765+
8766+ /* ... reset halt state too, if we could ... */
8767+
8768+#ifdef USE_DMA
8769+ /* for (some) bulk and ISO endpoints, try to get a DMA channel and
8770+ * bind it to the endpoint. otherwise use PIO.
8771+ */
8772+ dev_dbg(ep->dev->dev, "%s: called attributes=%d\n", __FUNCTION__, ep->ep_type);
8773+ switch (ep->ep_type) {
8774+ case USB_ENDPOINT_XFER_ISOC:
8775+ if (le16_to_cpu(desc->wMaxPacketSize) % 32)
8776+ break;
8777+ // fall through
8778+ case USB_ENDPOINT_XFER_BULK:
8779+ if (!use_dma || !ep->reg_drcmr)
8780+ break;
8781+ ep->dma = pxa_request_dma((char *)_ep->name, (le16_to_cpu(desc->wMaxPacketSize) > 64)
8782+ ? DMA_PRIO_MEDIUM : DMA_PRIO_LOW, dma_nodesc_handler, ep);
8783+ if (ep->dma >= 0) {
8784+ *ep->reg_drcmr = DRCMR_MAPVLD | ep->dma;
8785+ dev_dbg(ep->dev->dev, "%s using dma%d\n", _ep->name, ep->dma);
8786+ }
8787+ default:
8788+ break;
8789+ }
8790+#endif
8791+ DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
8792+ return 0;
8793+}
8794+
8795+static int pxa27x_ep_disable(struct usb_ep *_ep)
8796+{
8797+ struct pxa27x_virt_ep *virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep);
8798+ struct pxa27x_ep *ep = virt_ep->pxa_ep;
8799+ unsigned long flags;
8800+
8801+ if (!_ep || !ep->desc) {
8802+ dev_err(ep->dev->dev, "%s, %s not enabled\n", __FUNCTION__,
8803+ _ep ? _ep->name : NULL);
8804+ return -EINVAL;
8805+ }
8806+ local_irq_save(flags);
8807+ nuke(ep, -ESHUTDOWN);
8808+
8809+#ifdef USE_DMA
8810+ if (ep->dma >= 0) {
8811+ *ep->reg_drcmr = 0;
8812+ pxa_free_dma(ep->dma);
8813+ ep->dma = -1;
8814+ }
8815+#endif
8816+
8817+ /* flush fifo (mostly for IN buffers) */
8818+ pxa27x_ep_fifo_flush(_ep);
8819+
8820+ ep->desc = 0;
8821+ ep->stopped = 1;
8822+
8823+ local_irq_restore(flags);
8824+ DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
8825+ return 0;
8826+}
8827+
8828+
8829+
8830+/* for the pxa27x, these can just wrap kmalloc/kfree. gadget drivers
8831+ * must still pass correctly initialized endpoints, since other controller
8832+ * drivers may care about how it's currently set up (dma issues etc).
8833+ */
8834+
8835+/*
8836+ * pxa27x_ep_alloc_request - allocate a request data structure
8837+ */
8838+static struct usb_request *
8839+pxa27x_ep_alloc_request(struct usb_ep *_ep, unsigned gfp_flags)
8840+{
8841+ struct pxa27x_request *req;
8842+
8843+ req = kzalloc(sizeof *req, gfp_flags);
8844+ if (!req)
8845+ return 0;
8846+
8847+ INIT_LIST_HEAD(&req->queue);
8848+ return &req->req;
8849+}
8850+
8851+
8852+/*
8853+ * pxa27x_ep_free_request - deallocate a request data structure
8854+ */
8855+static void
8856+pxa27x_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
8857+{
8858+ struct pxa27x_request *req;
8859+
8860+ req = container_of(_req, struct pxa27x_request, req);
8861+ WARN_ON(!list_empty(&req->queue));
8862+ kfree(req);
8863+}
8864+
8865+
8866+/*-------------------------------------------------------------------------*/
8867+
8868+/*
8869+ * done - retire a request; caller blocked irqs
8870+ */
8871+static void done(struct pxa27x_ep *ep, struct pxa27x_request *req, int status)
8872+{
8873+ list_del_init(&req->queue);
8874+ if (likely (req->req.status == -EINPROGRESS))
8875+ req->req.status = status;
8876+ else
8877+ status = req->req.status;
8878+
8879+ if (status && status != -ESHUTDOWN)
8880+ DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
8881+ ep->usb_ep->name, &req->req, status,
8882+ req->req.actual, req->req.length);
8883+
8884+ /* don't modify queue heads during completion callback */
8885+ req->req.complete(ep->usb_ep, &req->req);
8886+}
8887+
8888+
8889+static inline void ep0_idle(struct pxa27x_udc *dev)
8890+{
8891+ dev->ep0state = EP0_IDLE;
8892+}
8893+
8894+static int write_packet(volatile u32 *uddr, struct pxa27x_request *req, unsigned max)
8895+{
8896+ u32 *buf;
8897+ int length, count, remain;
8898+
8899+ buf = (u32*)(req->req.buf + req->req.actual);
8900+ prefetch(buf);
8901+
8902+ /* how big will this packet be? */
8903+ length = min(req->req.length - req->req.actual, max);
8904+ req->req.actual += length;
8905+
8906+ remain = length & 0x3;
8907+ count = length & ~(0x3);
8908+
8909+ //dev_dbg(ep->dev->dev, "Length %d, Remain %d, Count %d\n",length, remain, count);
8910+
8911+ while (likely(count)) {
8912+ //dev_dbg(ep->dev->dev, "Sending:0x%x\n", *buf);
8913+ *uddr = *buf++;
8914+ count -= 4;
8915+ }
8916+
8917+ if (remain) {
8918+ volatile u8* reg=(u8*)uddr;
8919+ char *rd =(u8*)buf;
8920+
8921+ while (remain--) {
8922+ *reg=*rd++;
8923+ }
8924+ }
8925+
8926+ return length;
8927+}
8928+
8929+/*
8930+ * write to an IN endpoint fifo, as many packets as possible.
8931+ * irqs will use this to write the rest later.
8932+ * caller guarantees at least one packet buffer is ready (or a zlp).
8933+ */
8934+static int
8935+write_fifo(struct pxa27x_ep *ep, struct pxa27x_request *req)
8936+{
8937+ unsigned max;
8938+
8939+ max = le16_to_cpu(ep->desc->wMaxPacketSize);
8940+ do {
8941+ int count, is_last, is_short;
8942+
8943+ //dev_dbg(ep->dev->dev, "write_fifo7 %x\n", *ep->reg_udccsr);
8944+
8945+ if (*ep->reg_udccsr & UDCCSR_PC) {
8946+ //dev_dbg(ep->dev->dev, "Transmit Complete\n");
8947+ *ep->reg_udccsr = UDCCSR_PC | (*ep->reg_udccsr & UDCCSR_MASK);
8948+ }
8949+
8950+ if (*ep->reg_udccsr & UDCCSR_TRN) {
8951+ //dev_dbg(ep->dev->dev, "Clearing Underrun\n");
8952+ *ep->reg_udccsr = UDCCSR_TRN | (*ep->reg_udccsr & UDCCSR_MASK);
8953+ }
8954+ //dev_dbg(ep->dev->dev, "write_fifo8 %x\n", *ep->reg_udccsr);
8955+
8956+ count = write_packet(ep->reg_udcdr, req, max);
8957+
8958+ /* last packet is usually short (or a zlp) */
8959+ if (unlikely (count != max))
8960+ is_last = is_short = 1;
8961+ else {
8962+ if (likely(req->req.length != req->req.actual)
8963+ || req->req.zero)
8964+ is_last = 0;
8965+ else
8966+ is_last = 1;
8967+ /* interrupt/iso maxpacket may not fill the fifo */
8968+ is_short = unlikely (max < ep->fifo_size);
8969+ }
8970+
8971+ //dev_dbg(ep->dev->dev, "write_fifo0 %x\n", *ep->reg_udccsr);
8972+
8973+ dev_dbg(ep->dev->dev, "wrote %s count:%d bytes%s%s %d left %p\n",
8974+ ep->usb_ep->name, count,
8975+ is_last ? "/L" : "", is_short ? "/S" : "",
8976+ req->req.length - req->req.actual, &req->req);
8977+
8978+ /* let loose that packet. maybe try writing another one,
8979+ * double buffering might work.
8980+ */
8981+
8982+ if (is_short)
8983+ *ep->reg_udccsr = UDCCSR_SP | (*ep->reg_udccsr & UDCCSR_MASK);
8984+
8985+ dev_dbg(ep->dev->dev, "write_fifo0.5 %x\n", *ep->reg_udccsr);
8986+
8987+ /* requests complete when all IN data is in the FIFO */
8988+ if (is_last) {
8989+ done(ep, req, 0);
8990+ if (list_empty(&ep->queue) || unlikely(ep->dma >= 0)) {
8991+ pio_irq_disable(ep->pxa_ep_num);
8992+ //dev_dbg(ep->dev->dev, "write_fifo1 %x\n", *ep->reg_udccsr);
8993+#ifdef USE_DMA
8994+ /* unaligned data and zlps couldn't use dma */
8995+ if (unlikely(!list_empty(&ep->queue))) {
8996+ req = list_entry(ep->queue.next,
8997+ struct pxa27x_request, queue);
8998+ kick_dma(ep,req);
8999+ return 0;
9000+ }
9001+#endif
9002+ }
9003+ //dev_dbg(ep->dev->dev, "write_fifo2 %x\n", *ep->reg_udccsr);
9004+ return 1;
9005+ }
9006+
9007+ // TODO experiment: how robust can fifo mode tweaking be?
9008+ // double buffering is off in the default fifo mode, which
9009+ // prevents TFS from being set here.
9010+
9011+ } while (*ep->reg_udccsr & UDCCSR_FS);
9012+ //dev_dbg(ep->dev->dev, "write_fifo2 %x\n", *ep->reg_udccsr);
9013+ return 0;
9014+}
9015+
9016+/* caller asserts req->pending (ep0 irq status nyet cleared); starts
9017+ * ep0 data stage. these chips want very simple state transitions.
9018+ */
9019+static inline
9020+void ep0start(struct pxa27x_udc *dev, u32 flags, const char *tag)
9021+{
9022+ UDCCSR0 = flags|UDCCSR0_SA|UDCCSR0_OPC;
9023+ UDCISR0 = UDCICR_INT(0, UDC_INT_FIFOERROR | UDC_INT_PACKETCMP);
9024+ dev->req_pending = 0;
9025+ DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
9026+ __FUNCTION__, tag, UDCCSR0, flags);
9027+}
9028+
9029+static int
9030+write_ep0_fifo(struct pxa27x_ep *ep, struct pxa27x_request *req)
9031+{
9032+ unsigned count;
9033+ int is_short;
9034+
9035+ count = write_packet(&UDCDR0, req, EP0_FIFO_SIZE);
9036+ ep->dev->stats.write.bytes += count;
9037+
9038+ /* last packet "must be" short (or a zlp) */
9039+ is_short = (count != EP0_FIFO_SIZE);
9040+
9041+ DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
9042+ req->req.length - req->req.actual, &req->req);
9043+
9044+ if (unlikely (is_short)) {
9045+ if (ep->dev->req_pending)
9046+ ep0start(ep->dev, UDCCSR0_IPR, "short IN");
9047+ else
9048+ UDCCSR0 = UDCCSR0_IPR;
9049+
9050+ count = req->req.length;
9051+ done(ep, req, 0);
9052+ ep0_idle(ep->dev);
9053+#if 0
9054+ /* This seems to get rid of lost status irqs in some cases:
9055+ * host responds quickly, or next request involves config
9056+ * change automagic, or should have been hidden, or ...
9057+ *
9058+ * FIXME get rid of all udelays possible...
9059+ */
9060+ if (count >= EP0_FIFO_SIZE) {
9061+ count = 100;
9062+ do {
9063+ if ((UDCCSR0 & UDCCSR0_OPC) != 0) {
9064+ /* clear OPC, generate ack */
9065+ UDCCSR0 = UDCCSR0_OPC;
9066+ break;
9067+ }
9068+ count--;
9069+ udelay(1);
9070+ } while (count);
9071+ }
9072+#endif
9073+ } else if (ep->dev->req_pending)
9074+ ep0start(ep->dev, 0, "IN");
9075+ return is_short;
9076+}
9077+
9078+
9079+/*
9080+ * read_fifo - unload packet(s) from the fifo we use for usb OUT
9081+ * transfers and put them into the request. caller should have made
9082+ * sure there's at least one packet ready.
9083+ *
9084+ * returns true if the request completed because of short packet or the
9085+ * request buffer having filled (and maybe overran till end-of-packet).
9086+ */
9087+static int read_fifo(struct pxa27x_ep *ep, struct pxa27x_request *req)
9088+{
9089+ for (;;) {
9090+ u32 *buf;
9091+ int bufferspace, count, is_short;
9092+
9093+ /* make sure there's a packet in the FIFO.*/
9094+ if (unlikely ((*ep->reg_udccsr & UDCCSR_PC) == 0))
9095+ break;
9096+ buf =(u32*) (req->req.buf + req->req.actual);
9097+ prefetchw(buf);
9098+ bufferspace = req->req.length - req->req.actual;
9099+
9100+ /* read all bytes from this packet */
9101+ if (likely (*ep->reg_udccsr & UDCCSR_BNE)) {
9102+ count = 0x3ff & *ep->reg_udcbcr;
9103+ req->req.actual += min(count, bufferspace);
9104+ } else /* zlp */
9105+ count = 0;
9106+
9107+ is_short = (count < ep->usb_ep->maxpacket);
9108+ dev_dbg(ep->dev->dev, "read %s udccsr:%02x, count:%d bytes%s req %p %d/%d\n",
9109+ ep->usb_ep->name, *ep->reg_udccsr, count,
9110+ is_short ? "/S" : "",
9111+ &req->req, req->req.actual, req->req.length);
9112+
9113+ count = min(count, bufferspace);
9114+ while (likely (count > 0)) {
9115+ *buf++ = *ep->reg_udcdr;
9116+ count -= 4;
9117+ }
9118+ dev_dbg(ep->dev->dev, "Buf:0x%p\n", req->req.buf);
9119+
9120+ *ep->reg_udccsr = UDCCSR_PC;
9121+ /* RPC/RSP/RNE could now reflect the other packet buffer */
9122+
9123+ /* completion */
9124+ if (is_short || req->req.actual == req->req.length) {
9125+ done(ep, req, 0);
9126+ if (list_empty(&ep->queue))
9127+ pio_irq_disable(ep->pxa_ep_num);
9128+ return 1;
9129+ }
9130+
9131+ /* finished that packet. the next one may be waiting... */
9132+ }
9133+ return 0;
9134+}
9135+
9136+/*
9137+ * special ep0 version of the above. no UBCR0 or double buffering; status
9138+ * handshaking is magic. most device protocols don't need control-OUT.
9139+ * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
9140+ * protocols do use them.
9141+ */
9142+static int read_ep0_fifo(struct pxa27x_ep *ep, struct pxa27x_request *req)
9143+{
9144+ u32 *buf, word;
9145+ unsigned bufferspace;
9146+
9147+ buf = (u32*) (req->req.buf + req->req.actual);
9148+ bufferspace = req->req.length - req->req.actual;
9149+
9150+ while (UDCCSR0 & UDCCSR0_RNE) {
9151+ word = UDCDR0;
9152+
9153+ if (unlikely (bufferspace == 0)) {
9154+ /* this happens when the driver's buffer
9155+ * is smaller than what the host sent.
9156+ * discard the extra data.
9157+ */
9158+ if (req->req.status != -EOVERFLOW)
9159+ dev_info(ep->dev->dev, "%s overflow\n", ep->usb_ep->name);
9160+ req->req.status = -EOVERFLOW;
9161+ } else {
9162+ *buf++ = word;
9163+ req->req.actual += 4;
9164+ bufferspace -= 4;
9165+ }
9166+ }
9167+
9168+ UDCCSR0 = UDCCSR0_OPC ;
9169+
9170+ /* completion */
9171+ if (req->req.actual >= req->req.length)
9172+ return 1;
9173+
9174+ /* finished that packet. the next one may be waiting... */
9175+ return 0;
9176+}
9177+
9178+#ifdef USE_DMA
9179+
9180+#define MAX_IN_DMA ((DCMD_LENGTH + 1) - BULK_FIFO_SIZE)
9181+static void kick_dma(struct pxa27x_ep *ep, struct pxa27x_request *req)
9182+{
9183+ u32 dcmd = 0;
9184+ u32 len = req->req.length;
9185+ u32 buf = req->req.dma;
9186+ u32 fifo = io_v2p((u32)ep->reg_udcdr);
9187+
9188+ buf += req->req.actual;
9189+ len -= req->req.actual;
9190+ ep->dma_con = 0;
9191+
9192+ DMSG("%s: req:0x%p length:%d, actual:%d dma:%d\n",
9193+ __FUNCTION__, &req->req, req->req.length,
9194+ req->req.actual,ep->dma);
9195+
9196+ /* no-descriptor mode can be simple for bulk-in, iso-in, iso-out */
9197+ DCSR(ep->dma) = DCSR_NODESC;
9198+ if (buf & 0x3)
9199+ DALGN |= 1 << ep->dma;
9200+ else
9201+ DALGN &= ~(1 << ep->dma);
9202+
9203+ if (ep->dir_in) {
9204+ DSADR(ep->dma) = buf;
9205+ DTADR(ep->dma) = fifo;
9206+ if (len > MAX_IN_DMA) {
9207+ len= MAX_IN_DMA;
9208+ ep->dma_con =1 ;
9209+ } else if (len >= ep->usb_ep->maxpacket) {
9210+ if ((ep->dma_con = (len % ep->usb_ep->maxpacket) != 0))
9211+ len = ep->usb_ep->maxpacket;
9212+ }
9213+ dcmd = len | DCMD_BURST32 | DCMD_WIDTH4 | DCMD_ENDIRQEN
9214+ | DCMD_FLOWTRG | DCMD_INCSRCADDR;
9215+ } else {
9216+ DSADR(ep->dma) = fifo;
9217+ DTADR(ep->dma) = buf;
9218+ dcmd = len | DCMD_BURST32 | DCMD_WIDTH4 | DCMD_ENDIRQEN
9219+ | DCMD_FLOWSRC | DCMD_INCTRGADDR;
9220+ }
9221+ *ep->reg_udccsr = UDCCSR_DME;
9222+ DCMD(ep->dma) = dcmd;
9223+ DCSR(ep->dma) = DCSR_NODESC | DCSR_EORIRQEN \
9224+ | ((ep->dir_in) ? DCSR_STOPIRQEN : 0);
9225+ *ep->reg_drcmr = ep->dma | DRCMR_MAPVLD;
9226+ DCSR(ep->dma) |= DCSR_RUN;
9227+}
9228+
9229+static void cancel_dma(struct pxa27x_ep *ep)
9230+{
9231+ struct pxa27x_request *req;
9232+ u32 tmp;
9233+
9234+ if (DCSR(ep->dma) == 0 || list_empty(&ep->queue))
9235+ return;
9236+
9237+ DMSG("hehe dma:%d,dcsr:0x%x\n", ep->dma, DCSR(ep->dma));
9238+ DCSR(ep->dma) = 0;
9239+ while ((DCSR(ep->dma) & DCSR_STOPSTATE) == 0)
9240+ cpu_relax();
9241+
9242+ req = list_entry(ep->queue.next, struct pxa27x_request, queue);
9243+ tmp = DCMD(ep->dma) & DCMD_LENGTH;
9244+ req->req.actual = req->req.length - tmp;
9245+
9246+ /* the last tx packet may be incomplete, so flush the fifo.
9247+ * FIXME correct req.actual if we can
9248+ */
9249+ *ep->reg_udccsr = UDCCSR_FEF;
9250+}
9251+
9252+static void dma_nodesc_handler(int dmach, void *_ep)
9253+{
9254+ struct pxa27x_ep *ep = _ep;
9255+ struct pxa27x_request *req, *req_next;
9256+ u32 dcsr, tmp, completed;
9257+
9258+ local_irq_disable();
9259+
9260+ req = list_entry(ep->queue.next, struct pxa27x_request, queue);
9261+
9262+ DMSG("%s, buf:0x%p\n",__FUNCTION__, req->req.buf);
9263+
9264+ ep->dma_irqs++;
9265+ ep->dev->stats.irqs++;
9266+
9267+ completed = 0;
9268+
9269+ dcsr = DCSR(dmach);
9270+ DCSR(ep->dma) &= ~DCSR_RUN;
9271+
9272+ if (dcsr & DCSR_BUSERR) {
9273+ DCSR(dmach) = DCSR_BUSERR;
9274+ dev_err(ep->dev->dev, "DMA Bus Error\n");
9275+ req->req.status = -EIO;
9276+ completed = 1;
9277+ } else if (dcsr & DCSR_ENDINTR) {
9278+ DCSR(dmach) = DCSR_ENDINTR;
9279+ if (ep->dir_in) {
9280+ tmp = req->req.length - req->req.actual;
9281+ /* Last packet is a short one*/
9282+ if (tmp < ep->usb_ep->maxpacket) {
9283+ int count = 0;
9284+
9285+ *ep->reg_udccsr = UDCCSR_SP | \
9286+ (*ep->reg_udccsr & UDCCSR_MASK);
9287+ /*Wait for packet out */
9288+ while( (count++ < 10000) && \
9289+ !(*ep->reg_udccsr & UDCCSR_FS));
9290+ if (count >= 10000)
9291+ DMSG("Failed to send packet\n");
9292+ else
9293+ DMSG("%s: short packet sent len:%d,"
9294+ "length:%d,actual:%d\n", __FUNCTION__,
9295+ tmp, req->req.length, req->req.actual);
9296+ req->req.actual = req->req.length;
9297+ completed = 1;
9298+ /* There are still packets to transfer */
9299+ } else if ( ep->dma_con) {
9300+ DMSG("%s: more packets,length:%d,actual:%d\n",
9301+ __FUNCTION__,req->req.length,
9302+ req->req.actual);
9303+ req->req.actual += ep->usb_ep->maxpacket;
9304+ completed = 0;
9305+ } else {
9306+ DMSG("%s: no more packets,length:%d,"
9307+ "actual:%d\n", __FUNCTION__,
9308+ req->req.length, req->req.actual);
9309+ req->req.actual = req->req.length;
9310+ completed = 1;
9311+ }
9312+ } else {
9313+ req->req.actual = req->req.length;
9314+ completed = 1;
9315+ }
9316+ } else if (dcsr & DCSR_EORINTR) { //Only happened in OUT DMA
9317+ int remain,udccsr ;
9318+
9319+ DCSR(dmach) = DCSR_EORINTR;
9320+ remain = DCMD(dmach) & DCMD_LENGTH;
9321+ req->req.actual = req->req.length - remain;
9322+
9323+ udccsr = *ep->reg_udccsr;
9324+ if (udccsr & UDCCSR_SP) {
9325+ *ep->reg_udccsr = UDCCSR_PC | (udccsr & UDCCSR_MASK);
9326+ completed = 1;
9327+ }
9328+ DMSG("%s: length:%d actual:%d\n",
9329+ __FUNCTION__, req->req.length, req->req.actual);
9330+ } else
9331+ DMSG("%s: Others dma:%d DCSR:0x%x DCMD:0x%x\n",
9332+ __FUNCTION__, dmach, DCSR(dmach), DCMD(dmach));
9333+
9334+ if (likely(completed)) {
9335+ if (req->queue.next != &ep->queue) {
9336+ req_next = list_entry(req->queue.next,
9337+ struct pxa27x_request, queue);
9338+ kick_dma(ep, req_next);
9339+ }
9340+ done(ep, req, 0);
9341+ } else {
9342+ kick_dma(ep, req);
9343+ }
9344+
9345+ local_irq_enable();
9346+}
9347+
9348+#endif
9349+/*-------------------------------------------------------------------------*/
9350+
9351+static int
9352+pxa27x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, unsigned gfp_flags)
9353+{
9354+ struct pxa27x_virt_ep *virt_ep;
9355+ struct pxa27x_ep *ep;
9356+ struct pxa27x_request *req;
9357+ struct pxa27x_udc *dev;
9358+ unsigned long flags;
9359+
9360+ virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep);
9361+ ep = virt_ep->pxa_ep;
9362+
9363+ req = container_of(_req, struct pxa27x_request, req);
9364+ if (unlikely (!_req || !_req->complete || !_req->buf||
9365+ !list_empty(&req->queue))) {
9366+ DMSG("%s, bad params\n", __FUNCTION__);
9367+ return -EINVAL;
9368+ }
9369+
9370+ if (unlikely (!_ep || (!ep->desc && _ep->name != ep0name))) {
9371+ DMSG("%s, bad ep\n", __FUNCTION__);
9372+ return -EINVAL;
9373+ }
9374+
9375+ DMSG("%s, ep point %d is queue\n", __FUNCTION__, ep->ep_num);
9376+
9377+ dev = ep->dev;
9378+ if (unlikely (!dev->driver
9379+ || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
9380+ DMSG("%s, bogus device state\n", __FUNCTION__);
9381+ return -ESHUTDOWN;
9382+ }
9383+
9384+ /* iso is always one packet per request, that's the only way
9385+ * we can report per-packet status. that also helps with dma.
9386+ */
9387+ if (unlikely (ep->ep_type == USB_ENDPOINT_XFER_ISOC
9388+ && req->req.length > le16_to_cpu
9389+ (ep->desc->wMaxPacketSize)))
9390+ return -EMSGSIZE;
9391+
9392+#ifdef USE_DMA
9393+ // FIXME caller may already have done the dma mapping
9394+ if (ep->dma >= 0) {
9395+ _req->dma = dma_map_single(dev->dev, _req->buf, _req->length,
9396+ (ep->dir_in) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
9397+ }
9398+#endif
9399+
9400+ DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
9401+ _ep->name, _req, _req->length, _req->buf);
9402+
9403+ local_irq_save(flags);
9404+
9405+ _req->status = -EINPROGRESS;
9406+ _req->actual = 0;
9407+
9408+ /* kickstart this i/o queue? */
9409+ if (list_empty(&ep->queue) && !ep->stopped) {
9410+ if (ep->desc == 0 /* ep0 */) {
9411+ unsigned length = _req->length;
9412+
9413+ switch (dev->ep0state) {
9414+ case EP0_IN_DATA_PHASE:
9415+ dev->stats.write.ops++;
9416+ if (write_ep0_fifo(ep, req))
9417+ req = 0;
9418+ break;
9419+
9420+ case EP0_OUT_DATA_PHASE:
9421+ dev->stats.read.ops++;
9422+ if (dev->req_pending)
9423+ ep0start(dev, UDCCSR0_IPR, "OUT");
9424+ if (length == 0 || ((UDCCSR0 & UDCCSR0_RNE) != 0
9425+ && read_ep0_fifo(ep, req))) {
9426+ ep0_idle(dev);
9427+ done(ep, req, 0);
9428+ req = 0;
9429+ }
9430+ break;
9431+ case EP0_NO_ACTION:
9432+ ep0_idle(dev);
9433+ req=0;
9434+ break;
9435+ default:
9436+ DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
9437+ local_irq_restore (flags);
9438+ return -EL2HLT;
9439+ }
9440+#ifdef USE_DMA
9441+ /* either start dma or prime pio pump */
9442+ } else if (ep->dma >= 0) {
9443+ kick_dma(ep, req);
9444+#endif
9445+ /* can the FIFO can satisfy the request immediately? */
9446+ } else if (ep->dir_in && (*ep->reg_udccsr & UDCCSR_FS) != 0
9447+ && write_fifo(ep, req)) {
9448+ req = 0;
9449+ } else if ((*ep->reg_udccsr & UDCCSR_FS) != 0
9450+ && read_fifo(ep, req)) {
9451+ req = 0;
9452+ }
9453+ DMSG("req:%p,ep->desc:%p,ep->dma:%d\n", req, ep->desc, ep->dma);
9454+ if (likely (req && ep->desc) && ep->dma < 0)
9455+ pio_irq_enable(ep->pxa_ep_num);
9456+ }
9457+
9458+ /* pio or dma irq handler advances the queue. */
9459+ if (likely (req != 0))
9460+ list_add_tail(&req->queue, &ep->queue);
9461+ local_irq_restore(flags);
9462+
9463+ return 0;
9464+}
9465+
9466+
9467+/*
9468+ * nuke - dequeue ALL requests
9469+ */
9470+static void nuke(struct pxa27x_ep *ep, int status)
9471+{
9472+ struct pxa27x_request *req;
9473+
9474+ /* called with irqs blocked */
9475+#ifdef USE_DMA
9476+ if (ep->dma >= 0 && !ep->stopped)
9477+ cancel_dma(ep);
9478+#endif
9479+ while (!list_empty(&ep->queue)) {
9480+ req = list_entry(ep->queue.next, struct pxa27x_request, queue);
9481+ done(ep, req, status);
9482+ }
9483+ if (ep->desc)
9484+ pio_irq_disable(ep->pxa_ep_num);
9485+}
9486+
9487+
9488+/* dequeue JUST ONE request */
9489+static int pxa27x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
9490+{
9491+ struct pxa27x_virt_ep *virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep);
9492+ struct pxa27x_ep *ep = virt_ep->pxa_ep;
9493+ struct pxa27x_request *req;
9494+ unsigned long flags;
9495+
9496+ if (!_ep || _ep->name == ep0name)
9497+ return -EINVAL;
9498+
9499+ local_irq_save(flags);
9500+
9501+ /* make sure it's actually queued on this endpoint */
9502+ list_for_each_entry(req, &ep->queue, queue) {
9503+ if (&req->req == _req)
9504+ break;
9505+ }
9506+ if (&req->req != _req) {
9507+ local_irq_restore(flags);
9508+ return -EINVAL;
9509+ }
9510+
9511+#ifdef USE_DMA
9512+ if (ep->dma >= 0 && ep->queue.next == &req->queue && !ep->stopped) {
9513+ cancel_dma(ep);
9514+ done(ep, req, -ECONNRESET);
9515+ /* restart i/o */
9516+ if (!list_empty(&ep->queue)) {
9517+ req = list_entry(ep->queue.next,
9518+ struct pxa27x_request, queue);
9519+ kick_dma(ep, req);
9520+ }
9521+ } else
9522+#endif
9523+ done(ep, req, -ECONNRESET);
9524+
9525+ local_irq_restore(flags);
9526+ return 0;
9527+}
9528+
9529+/*-------------------------------------------------------------------------*/
9530+
9531+static int pxa27x_ep_set_halt(struct usb_ep *_ep, int value)
9532+{
9533+ struct pxa27x_virt_ep *virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep);
9534+ struct pxa27x_ep *ep = virt_ep->pxa_ep;
9535+ unsigned long flags;
9536+
9537+ DMSG("%s is called\n", __FUNCTION__);
9538+ if (unlikely (!_ep || (!ep->desc && _ep->name != ep0name))
9539+ || ep->ep_type == USB_ENDPOINT_XFER_ISOC) {
9540+ DMSG("%s, bad ep\n", __FUNCTION__);
9541+ return -EINVAL;
9542+ }
9543+ if (value == 0) {
9544+ /* this path (reset toggle+halt) is needed to implement
9545+ * SET_INTERFACE on normal hardware. but it can't be
9546+ * done from software on the PXA UDC, and the hardware
9547+ * forgets to do it as part of SET_INTERFACE automagic.
9548+ */
9549+ DMSG("only host can clear %s halt\n", _ep->name);
9550+ return -EROFS;
9551+ }
9552+
9553+ local_irq_save(flags);
9554+
9555+ if (ep->dir_in && ((*ep->reg_udccsr & UDCCSR_FS) == 0
9556+ || !list_empty(&ep->queue))) {
9557+ local_irq_restore(flags);
9558+ return -EAGAIN;
9559+ }
9560+
9561+ /* FST bit is the same for control, bulk in, bulk out, interrupt in */
9562+ *ep->reg_udccsr = UDCCSR_FST|UDCCSR_FEF;
9563+
9564+ /* ep0 needs special care */
9565+ if (!ep->desc) {
9566+ start_watchdog(ep->dev);
9567+ ep->dev->req_pending = 0;
9568+ ep->dev->ep0state = EP0_STALL;
9569+
9570+ /* and bulk/intr endpoints like dropping stalls too */
9571+ } else {
9572+ unsigned i;
9573+ for (i = 0; i < 1000; i += 20) {
9574+ if (*ep->reg_udccsr & UDCCSR_SST)
9575+ break;
9576+ udelay(20);
9577+ }
9578+ }
9579+ local_irq_restore(flags);
9580+
9581+ DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
9582+ return 0;
9583+}
9584+
9585+static int pxa27x_ep_fifo_status(struct usb_ep *_ep)
9586+{
9587+ struct pxa27x_virt_ep *virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep);
9588+ struct pxa27x_ep *ep = virt_ep->pxa_ep;
9589+
9590+ if (!_ep) {
9591+ DMSG("%s, bad ep\n", __FUNCTION__);
9592+ return -ENODEV;
9593+ }
9594+ /* pxa can't report unclaimed bytes from IN fifos */
9595+ if (ep->dir_in)
9596+ return -EOPNOTSUPP;
9597+ if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
9598+ || (*ep->reg_udccsr & UDCCSR_FS) == 0)
9599+ return 0;
9600+ else
9601+ return (*ep->reg_udcbcr & 0xfff) + 1;
9602+}
9603+
9604+static void pxa27x_ep_fifo_flush(struct usb_ep *_ep)
9605+{
9606+ struct pxa27x_virt_ep *virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep);
9607+ struct pxa27x_ep *ep = virt_ep->pxa_ep;
9608+
9609+ DMSG("pxa27x_ep_fifo_flush\n");
9610+
9611+ if (!_ep || _ep->name == ep0name || !list_empty(&ep->queue)) {
9612+ DMSG("%s, bad ep\n", __FUNCTION__);
9613+ return;
9614+ }
9615+
9616+ /* toggle and halt bits stay unchanged */
9617+
9618+ /* for OUT, just read and discard the FIFO contents. */
9619+ if (!ep->dir_in) {
9620+ while (((*ep->reg_udccsr) & UDCCSR_BNE) != 0)
9621+ (void) *ep->reg_udcdr;
9622+ return;
9623+ }
9624+
9625+ /* most IN status is the same, but ISO can't stall */
9626+ *ep->reg_udccsr = UDCCSR_PC|UDCCSR_FST|UDCCSR_TRN
9627+ | (ep->ep_type == USB_ENDPOINT_XFER_ISOC)
9628+ ? 0 : UDCCSR_SST;
9629+}
9630+
9631+
9632+static struct usb_ep_ops pxa27x_ep_ops = {
9633+ .enable = pxa27x_ep_enable,
9634+ .disable = pxa27x_ep_disable,
9635+
9636+ .alloc_request = pxa27x_ep_alloc_request,
9637+ .free_request = pxa27x_ep_free_request,
9638+
9639+ .queue = pxa27x_ep_queue,
9640+ .dequeue = pxa27x_ep_dequeue,
9641+
9642+ .set_halt = pxa27x_ep_set_halt,
9643+ .fifo_status = pxa27x_ep_fifo_status,
9644+ .fifo_flush = pxa27x_ep_fifo_flush,
9645+};
9646+
9647+
9648+/* ---------------------------------------------------------------------------
9649+ * device-scoped parts of the api to the usb controller hardware
9650+ * ---------------------------------------------------------------------------
9651+ */
9652+
9653+static inline unsigned int validate_fifo_size(u8 bmAttributes)
9654+{
9655+ switch (bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
9656+ case USB_ENDPOINT_XFER_CONTROL:
9657+ return EP0_FIFO_SIZE;
9658+ break;
9659+ case USB_ENDPOINT_XFER_ISOC:
9660+ return ISO_FIFO_SIZE;
9661+ break;
9662+ case USB_ENDPOINT_XFER_BULK:
9663+ return BULK_FIFO_SIZE;
9664+ break;
9665+ case USB_ENDPOINT_XFER_INT:
9666+ return INT_FIFO_SIZE;
9667+ break;
9668+ default:
9669+ break;
9670+ }
9671+}
9672+
9673+static void pxa27x_ep_free(struct usb_gadget *gadget, struct usb_ep *_ep)
9674+{
9675+ struct pxa27x_udc *dev = the_controller;
9676+ struct pxa27x_virt_ep *virt_ep;
9677+ int i;
9678+
9679+ virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep);
9680+
9681+ for (i = 1; i < UDC_EP_NUM; i++) {
9682+ if (dev->ep[i].usb_ep == &virt_ep->usb_ep) {
9683+ if (dev->ep[i].desc) {
9684+ virt_ep->pxa_ep = &dev->ep[i];
9685+ pxa27x_ep_disable(&virt_ep->usb_ep);
9686+ }
9687+ dev->ep[i].usb_ep = NULL;
9688+ }
9689+ }
9690+
9691+ if (!list_empty(&virt_ep->usb_ep.ep_list))
9692+ list_del_init(&virt_ep->usb_ep.ep_list);
9693+
9694+ kfree(virt_ep->usb_ep.name);
9695+ kfree(virt_ep);
9696+}
9697+
9698+static void pxa27x_ep_freeall(struct usb_gadget *gadget)
9699+{
9700+ struct pxa27x_udc *dev = the_controller;
9701+ int i;
9702+
9703+ for (i = 1; i < UDC_EP_NUM; i++) {
9704+ if(dev->ep[i].usb_ep)
9705+ pxa27x_ep_free(gadget, dev->ep[i].usb_ep);
9706+ }
9707+}
9708+
9709+#define NAME_SIZE 18
9710+
9711+static int pxa27x_find_free_ep(struct pxa27x_udc *dev)
9712+{
9713+ int i;
9714+ for (i = 1; i < UDC_EP_NUM; i++) {
9715+ if(!dev->ep[i].assigned)
9716+ return i;
9717+ }
9718+ return -1;
9719+}
9720+
9721+/*
9722+ * Endpoint Allocation/Configuration
9723+ *
9724+ * pxa27x endpoint configuration is fixed when the device is enabled. Any pxa
9725+ * endpoint is only active in one configuration, interface and alternate
9726+ * interface combination so to support gadget drivers, we map one usb_ep to
9727+ * one of several pxa ep's. One pxa endpoint is assigned per configuration
9728+ * combination.
9729+ */
9730+static struct usb_ep* pxa27x_ep_alloc(struct usb_gadget *gadget, struct usb_endpoint_descriptor *desc,
9731+ struct usb_endpoint_config *epconfig, int configs)
9732+{
9733+ struct pxa27x_udc *dev = the_controller;
9734+ struct pxa27x_virt_ep *virt_ep;
9735+ unsigned int i, fifo_size;
9736+ char *name;
9737+
9738+ if (unlikely(configs < 1)) {
9739+ dev_err(dev->dev, "%s: Error in config data\n", __FUNCTION__);
9740+ return NULL;
9741+ }
9742+
9743+ virt_ep = kmalloc(sizeof(struct pxa27x_virt_ep), GFP_KERNEL);
9744+ name = kmalloc(NAME_SIZE, GFP_KERNEL);
9745+ if (!virt_ep || !name) {
9746+ dev_err(dev->dev, "%s: -ENOMEM\n", __FUNCTION__);
9747+ kfree(name);
9748+ kfree(virt_ep);
9749+ return NULL;
9750+ }
9751+
9752+ if (!(desc->wMaxPacketSize)) {
9753+ fifo_size = validate_fifo_size(desc->bmAttributes);
9754+ desc->wMaxPacketSize = fifo_size;
9755+ } else {
9756+ fifo_size = desc->wMaxPacketSize;
9757+ }
9758+
9759+ DMSG("pxa27x_ep_alloc: bLength: %d, bDescriptorType: %x, bEndpointAddress: %x,\n"
9760+ " bmAttributes: %x, wMaxPacketSize: %d\n", desc->bLength,
9761+ desc->bDescriptorType, desc->bEndpointAddress, desc->bmAttributes,
9762+ desc->wMaxPacketSize);
9763+
9764+ if (!(desc->bEndpointAddress & 0xF))
9765+ desc->bEndpointAddress |= dev->ep_num;
9766+
9767+ for (i = 0; i < configs; i++)
9768+ {
9769+ struct pxa27x_ep *pxa_ep;
9770+ int j;
9771+
9772+ DMSG("pxa27x_ep_alloc: config: %d, interface: %d, altinterface: %x,\n",
9773+ epconfig->config, epconfig->interface, epconfig->altinterface);
9774+
9775+ j = pxa27x_find_free_ep(dev);
9776+
9777+ if (unlikely(j < 0)) {
9778+ dev_err(dev->dev, "pxa27x_ep_alloc: Failed to find a spare endpoint\n");
9779+ pxa27x_ep_free(gadget, &virt_ep->usb_ep);
9780+ return NULL;
9781+ }
9782+
9783+ pxa_ep = &dev->ep[j];
9784+
9785+ if (i == 0)
9786+ virt_ep->pxa_ep = pxa_ep;
9787+
9788+ pxa_ep->assigned = 1;
9789+ pxa_ep->ep_num = dev->ep_num;
9790+ pxa_ep->pxa_ep_num = j;
9791+ pxa_ep->usb_ep = &virt_ep->usb_ep;
9792+ pxa_ep->dev = dev;
9793+ pxa_ep->desc = desc;
9794+ pxa_ep->pio_irqs = pxa_ep->dma_irqs = 0;
9795+ pxa_ep->dma = -1;
9796+
9797+ pxa_ep->fifo_size = fifo_size;
9798+ pxa_ep->dir_in = (desc->bEndpointAddress & USB_DIR_IN) ? 1 : 0;
9799+ pxa_ep->ep_type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
9800+ pxa_ep->stopped = 1;
9801+ pxa_ep->dma_con = 0;
9802+ pxa_ep->config = epconfig->config;
9803+ pxa_ep->interface = epconfig->interface;
9804+ pxa_ep->aisn = epconfig->altinterface;
9805+
9806+ pxa_ep->reg_udccsr = &UDCCSR0 + j;
9807+ pxa_ep->reg_udcbcr = &UDCBCR0 + j;
9808+ pxa_ep->reg_udcdr = &UDCDR0 + j ;
9809+ pxa_ep->reg_udccr = &UDCCRA - 1 + j;
9810+#ifdef USE_DMA
9811+ pxa_ep->reg_drcmr = &DRCMR24 + j;
9812+#endif
9813+
9814+ /* Configure UDCCR */
9815+ *pxa_ep->reg_udccr = ((pxa_ep->config << UDCCONR_CN_S) & UDCCONR_CN)
9816+ | ((pxa_ep->interface << UDCCONR_IN_S) & UDCCONR_IN)
9817+ | ((pxa_ep->aisn << UDCCONR_AISN_S) & UDCCONR_AISN)
9818+ | ((dev->ep_num << UDCCONR_EN_S) & UDCCONR_EN)
9819+ | ((pxa_ep->ep_type << UDCCONR_ET_S) & UDCCONR_ET)
9820+ | ((pxa_ep->dir_in) ? UDCCONR_ED : 0)
9821+ | ((min(pxa_ep->fifo_size, (unsigned)desc->wMaxPacketSize) << UDCCONR_MPS_S ) & UDCCONR_MPS)
9822+ | UDCCONR_EE;
9823+// | UDCCONR_DE | UDCCONR_EE;
9824+
9825+
9826+
9827+#ifdef USE_DMA
9828+ /* Only BULK use DMA */
9829+ if ((pxa_ep->ep_type & USB_ENDPOINT_XFERTYPE_MASK)\
9830+ == USB_ENDPOINT_XFER_BULK)
9831+ *pxa_ep->reg_udccsr = UDCCSR_DME;
9832+#endif
9833+
9834+ DMSG("UDCCR: 0x%p is 0x%x\n", pxa_ep->reg_udccr,*pxa_ep->reg_udccr);
9835+
9836+ epconfig++;
9837+ }
9838+
9839+ /* Fill ep name*/
9840+ switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
9841+ case USB_ENDPOINT_XFER_BULK:
9842+ sprintf(name, "ep%d%s-bulk", dev->ep_num,
9843+ ((desc->bEndpointAddress & USB_DIR_IN) ? "in":"out"));
9844+ break;
9845+ case USB_ENDPOINT_XFER_INT:
9846+ sprintf(name, "ep%d%s-intr", dev->ep_num,
9847+ ((desc->bEndpointAddress & USB_DIR_IN) ? "in":"out"));
9848+ break;
9849+ default:
9850+ sprintf(name, "ep%d%s", dev->ep_num,
9851+ ((desc->bEndpointAddress & USB_DIR_IN) ? "in":"out"));
9852+ break;
9853+ }
9854+
9855+ virt_ep->desc = desc;
9856+ virt_ep->usb_ep.name = name;
9857+ virt_ep->usb_ep.ops = &pxa27x_ep_ops;
9858+ virt_ep->usb_ep.maxpacket = min((ushort)fifo_size, desc->wMaxPacketSize);
9859+
9860+ list_add_tail(&virt_ep->usb_ep.ep_list, &gadget->ep_list);
9861+
9862+ dev->ep_num++;
9863+ return &virt_ep->usb_ep;
9864+}
9865+
9866+static int pxa27x_udc_get_frame(struct usb_gadget *_gadget)
9867+{
9868+ return (UDCFNR & 0x7FF);
9869+}
9870+
9871+static int pxa27x_udc_wakeup(struct usb_gadget *_gadget)
9872+{
9873+ /* host may not have enabled remote wakeup */
9874+ if ((UDCCR & UDCCR_DWRE) == 0)
9875+ return -EHOSTUNREACH;
9876+ udc_set_mask_UDCCR(UDCCR_UDR);
9877+ return 0;
9878+}
9879+
9880+static const struct usb_gadget_ops pxa27x_udc_ops = {
9881+ .ep_alloc = pxa27x_ep_alloc,
9882+ .get_frame = pxa27x_udc_get_frame,
9883+ .wakeup = pxa27x_udc_wakeup,
9884+ // current versions must always be self-powered
9885+};
9886+
9887+
9888+/*-------------------------------------------------------------------------*/
9889+
9890+#ifdef UDC_PROC_FILE
9891+
9892+static const char proc_node_name [] = "driver/udc";
9893+
9894+static int
9895+udc_proc_read(char *page, char **start, off_t off, int count,
9896+ int *eof, void *_dev)
9897+{
9898+ char *buf = page;
9899+ struct pxa27x_udc *dev = _dev;
9900+ char *next = buf;
9901+ unsigned size = count;
9902+ unsigned long flags;
9903+ int i, t;
9904+ u32 tmp;
9905+
9906+ if (off != 0)
9907+ return 0;
9908+
9909+ local_irq_save(flags);
9910+
9911+ /* basic device status */
9912+ t = scnprintf(next, size, DRIVER_DESC "\n"
9913+ "%s version: %s\nGadget driver: %s\n",
9914+ driver_name, DRIVER_VERSION DMASTR,
9915+ dev->driver ? dev->driver->driver.name : "(none)");
9916+ size -= t;
9917+ next += t;
9918+
9919+ /* registers for device and ep0 */
9920+ t = scnprintf(next, size,
9921+ "uicr %02X.%02X, usir %02X.%02x, ufnr %02X\n",
9922+ UDCICR1, UDCICR0, UDCISR1, UDCISR0, UDCFNR);
9923+ size -= t;
9924+ next += t;
9925+
9926+ tmp = UDCCR;
9927+ t = scnprintf(next, size,"udccr %02X =%s%s%s%s%s%s%s%s%s%s, con=%d,inter=%d,altinter=%d\n", tmp,
9928+ (tmp & UDCCR_OEN) ? " oen":"",
9929+ (tmp & UDCCR_AALTHNP) ? " aalthnp":"",
9930+ (tmp & UDCCR_AHNP) ? " rem" : "",
9931+ (tmp & UDCCR_BHNP) ? " rstir" : "",
9932+ (tmp & UDCCR_DWRE) ? " dwre" : "",
9933+ (tmp & UDCCR_SMAC) ? " smac" : "",
9934+ (tmp & UDCCR_EMCE) ? " emce" : "",
9935+ (tmp & UDCCR_UDR) ? " udr" : "",
9936+ (tmp & UDCCR_UDA) ? " uda" : "",
9937+ (tmp & UDCCR_UDE) ? " ude" : "",
9938+ (tmp & UDCCR_ACN) >> UDCCR_ACN_S,
9939+ (tmp & UDCCR_AIN) >> UDCCR_AIN_S,
9940+ (tmp & UDCCR_AAISN)>> UDCCR_AAISN_S );
9941+
9942+ size -= t;
9943+ next += t;
9944+
9945+ tmp = UDCCSR0;
9946+ t = scnprintf(next, size,
9947+ "udccsr0 %02X =%s%s%s%s%s%s%s\n", tmp,
9948+ (tmp & UDCCSR0_SA) ? " sa" : "",
9949+ (tmp & UDCCSR0_RNE) ? " rne" : "",
9950+ (tmp & UDCCSR0_FST) ? " fst" : "",
9951+ (tmp & UDCCSR0_SST) ? " sst" : "",
9952+ (tmp & UDCCSR0_DME) ? " dme" : "",
9953+ (tmp & UDCCSR0_IPR) ? " ipr" : "",
9954+ (tmp & UDCCSR0_OPC) ? " opc" : "");
9955+ size -= t;
9956+ next += t;
9957+
9958+ if (!dev->driver)
9959+ goto done;
9960+
9961+ t = scnprintf(next, size, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
9962+ dev->stats.write.bytes, dev->stats.write.ops,
9963+ dev->stats.read.bytes, dev->stats.read.ops,
9964+ dev->stats.irqs);
9965+ size -= t;
9966+ next += t;
9967+
9968+ /* dump endpoint queues */
9969+ for (i = 0; i < UDC_EP_NUM; i++) {
9970+ struct pxa27x_ep *ep = &dev->ep [i];
9971+ struct pxa27x_request *req;
9972+ int t;
9973+
9974+ if (i != 0) {
9975+ const struct usb_endpoint_descriptor *d;
9976+
9977+ d = ep->desc;
9978+ if (!d)
9979+ continue;
9980+ tmp = *dev->ep [i].reg_udccsr;
9981+ t = scnprintf(next, size,
9982+ "%d max %d %s udccs %02x udccr:0x%x\n",
9983+ i, le16_to_cpu (d->wMaxPacketSize),
9984+ (ep->dma >= 0) ? "dma" : "pio", tmp,
9985+ *dev->ep[i].reg_udccr);
9986+ /* TODO translate all five groups of udccs bits! */
9987+
9988+ } else /* ep0 should only have one transfer queued */
9989+ t = scnprintf(next, size, "ep0 max 16 pio irqs %lu\n",
9990+ ep->pio_irqs);
9991+ if (t <= 0 || t > size)
9992+ goto done;
9993+ size -= t;
9994+ next += t;
9995+
9996+ if (list_empty(&ep->queue)) {
9997+ t = scnprintf(next, size, "\t(nothing queued)\n");
9998+ if (t <= 0 || t > size)
9999+ goto done;
10000+ size -= t;
10001+ next += t;
10002+ continue;
10003+ }
10004+ list_for_each_entry(req, &ep->queue, queue) {
10005+#ifdef USE_DMA
10006+ if (ep->dma >= 0 && req->queue.prev == &ep->queue)
10007+ t = scnprintf(next, size, "\treq %p len %d/%d "
10008+ "buf %p (dma%d dcmd %08x)\n",
10009+ &req->req, req->req.actual,
10010+ req->req.length, req->req.buf,
10011+ ep->dma, DCMD(ep->dma)
10012+ /* low 13 bits == bytes-to-go */);
10013+ else
10014+#endif
10015+ t = scnprintf(next, size,
10016+ "\treq %p len %d/%d buf %p\n",
10017+ &req->req, req->req.actual,
10018+ req->req.length, req->req.buf);
10019+ if (t <= 0 || t > size)
10020+ goto done;
10021+ size -= t;
10022+ next += t;
10023+ }
10024+ }
10025+
10026+done:
10027+ local_irq_restore(flags);
10028+ *eof = 1;
10029+ return count - size;
10030+}
10031+
10032+#define create_proc_files() \
10033+ create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
10034+#define remove_proc_files() \
10035+ remove_proc_entry(proc_node_name, NULL)
10036+
10037+#else /* !UDC_PROC_FILE */
10038+#define create_proc_files() do {} while (0)
10039+#define remove_proc_files() do {} while (0)
10040+
10041+#endif /* UDC_PROC_FILE */
10042+
10043+/* "function" sysfs attribute */
10044+static ssize_t show_function(struct device *_dev, struct device_attribute *attr, char *buf)
10045+{
10046+ struct pxa27x_udc *dev = dev_get_drvdata(_dev);
10047+
10048+ if (!dev->driver || !dev->driver->function
10049+ || strlen(dev->driver->function) > PAGE_SIZE)
10050+ return 0;
10051+ return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
10052+}
10053+static DEVICE_ATTR(function, S_IRUGO, show_function, NULL);
10054+
10055+/*-------------------------------------------------------------------------*/
10056+
10057+/*
10058+ * udc_disable - disable USB device controller
10059+ */
10060+static void udc_disable(struct pxa27x_udc *dev)
10061+{
10062+ UDCICR0 = UDCICR1 = 0x00000000;
10063+
10064+ udc_clear_mask_UDCCR(UDCCR_UDE);
10065+
10066+ /* Disable clock for USB device */
10067+ pxa_set_cken(CKEN_USB, 0);
10068+
10069+ ep0_idle(dev);
10070+ dev->gadget.speed = USB_SPEED_UNKNOWN;
10071+ dev->mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
10072+}
10073+
10074+
10075+/*
10076+ * udc_reinit - initialize software state
10077+ */
10078+static void udc_reinit(struct pxa27x_udc *dev)
10079+{
10080+ u32 i;
10081+
10082+ dev->ep0state = EP0_IDLE;
10083+
10084+ /* basic endpoint records init */
10085+ for (i = 0; i < UDC_EP_NUM; i++) {
10086+ struct pxa27x_ep *ep = &dev->ep[i];
10087+
10088+ ep->stopped = 0;
10089+ ep->pio_irqs = ep->dma_irqs = 0;
10090+ }
10091+ dev->configuration = 0;
10092+ dev->interface = 0;
10093+ dev->alternate = 0;
10094+ /* the rest was statically initialized, and is read-only */
10095+}
10096+
10097+/* until it's enabled, this UDC should be completely invisible
10098+ * to any USB host.
10099+ */
10100+static void udc_enable(struct pxa27x_udc *dev)
10101+{
10102+ udc_clear_mask_UDCCR(UDCCR_UDE);
10103+
10104+ /* Enable clock for USB device */
10105+ pxa_set_cken(CKEN_USB, 1);
10106+
10107+ UDCICR0 = UDCICR1 = 0;
10108+
10109+ ep0_idle(dev);
10110+ dev->gadget.speed = USB_SPEED_FULL;
10111+ dev->stats.irqs = 0;
10112+
10113+ udc_set_mask_UDCCR(UDCCR_UDE);
10114+ udelay(2);
10115+ if (UDCCR & UDCCR_EMCE)
10116+ dev_err(dev->dev, "There are error in configuration, udc disabled\n");
10117+
10118+ /* caller must be able to sleep in order to cope
10119+ * with startup transients.
10120+ */
10121+ msleep(100);
10122+
10123+ /* enable suspend/resume and reset irqs */
10124+ UDCICR1 = UDCICR1_IECC | UDCICR1_IERU | UDCICR1_IESU | UDCICR1_IERS;
10125+
10126+ /* enable ep0 irqs */
10127+ UDCICR0 = UDCICR_INT(0,UDCICR_INT_MASK);
10128+
10129+ DMSG("Connecting\n");
10130+ /* RPFIXME */
10131+ UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE;
10132+ //dev->mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
10133+}
10134+
10135+
10136+/* when a driver is successfully registered, it will receive
10137+ * control requests including set_configuration(), which enables
10138+ * non-control requests. then usb traffic follows until a
10139+ * disconnect is reported. then a host may connect again, or
10140+ * the driver might get unbound.
10141+ */
10142+int usb_gadget_register_driver(struct usb_gadget_driver *driver)
10143+{
10144+ struct pxa27x_udc *dev = the_controller;
10145+ int retval;
10146+
10147+ if (!driver || driver->speed != USB_SPEED_FULL || !driver->bind
10148+ || !driver->unbind || !driver->disconnect || !driver->setup)
10149+ return -EINVAL;
10150+ if (!dev)
10151+ return -ENODEV;
10152+ if (dev->driver)
10153+ return -EBUSY;
10154+
10155+ udc_disable(dev);
10156+ udc_init_ep(dev);
10157+ udc_reinit(dev);
10158+
10159+ /* first hook up the driver ... */
10160+ dev->driver = driver;
10161+ dev->gadget.dev.driver = &driver->driver;
10162+ dev->ep_num = 1;
10163+
10164+ retval = device_add(&dev->gadget.dev);
10165+ if (retval) {
10166+ DMSG("device_add error %d\n", retval);
10167+ goto add_fail;
10168+ }
10169+ retval = driver->bind(&dev->gadget);
10170+ if (retval) {
10171+ DMSG("bind to driver %s --> error %d\n",
10172+ driver->driver.name, retval);
10173+ goto bind_fail;
10174+ }
10175+ retval = device_create_file(dev->dev, &dev_attr_function);
10176+ if (retval) {
10177+ DMSG("device_create_file failed: %d\n", retval);
10178+ goto create_file_fail;
10179+ }
10180+
10181+ /* ... then enable host detection and ep0; and we're ready
10182+ * for set_configuration as well as eventual disconnect.
10183+ * NOTE: this shouldn't power up until later.
10184+ */
10185+ DMSG("registered gadget driver '%s'\n", driver->driver.name);
10186+ udc_enable(dev);
10187+ dump_state(dev);
10188+ return 0;
10189+
10190+create_file_fail:
10191+ driver->unbind(&dev->gadget);
10192+bind_fail:
10193+ device_del(&dev->gadget.dev);
10194+add_fail:
10195+ dev->driver = 0;
10196+ dev->gadget.dev.driver = 0;
10197+ return retval;
10198+}
10199+EXPORT_SYMBOL(usb_gadget_register_driver);
10200+
10201+static void
10202+stop_activity(struct pxa27x_udc *dev, struct usb_gadget_driver *driver)
10203+{
10204+ int i;
10205+
10206+ DMSG("Trace path 1\n");
10207+ /* don't disconnect drivers more than once */
10208+ if (dev->gadget.speed == USB_SPEED_UNKNOWN)
10209+ driver = 0;
10210+ dev->gadget.speed = USB_SPEED_UNKNOWN;
10211+
10212+ /* prevent new request submissions, kill any outstanding requests */
10213+ for (i = 0; i < UDC_EP_NUM; i++) {
10214+ struct pxa27x_ep *ep = &dev->ep[i];
10215+
10216+ ep->stopped = 1;
10217+ nuke(ep, -ESHUTDOWN);
10218+ }
10219+ del_timer_sync(&dev->timer);
10220+
10221+ /* report disconnect; the driver is already quiesced */
10222+ if (driver)
10223+ driver->disconnect(&dev->gadget);
10224+
10225+ /* re-init driver-visible data structures */
10226+ udc_reinit(dev);
10227+}
10228+
10229+int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
10230+{
10231+ struct pxa27x_udc *dev = the_controller;
10232+
10233+ if (!dev)
10234+ return -ENODEV;
10235+ if (!driver || driver != dev->driver)
10236+ return -EINVAL;
10237+
10238+ local_irq_disable();
10239+ udc_disable(dev);
10240+ stop_activity(dev, driver);
10241+ local_irq_enable();
10242+
10243+ driver->unbind(&dev->gadget);
10244+ pxa27x_ep_freeall(&dev->gadget);
10245+ dev->driver = 0;
10246+
10247+ device_del(&dev->gadget.dev);
10248+ device_remove_file(dev->dev, &dev_attr_function);
10249+
10250+ DMSG("unregistered gadget driver '%s'\n", driver->driver.name);
10251+ dump_state(dev);
10252+ return 0;
10253+}
10254+EXPORT_SYMBOL(usb_gadget_unregister_driver);
10255+
10256+
10257+/*-------------------------------------------------------------------------*/
10258+
10259+static inline void clear_ep_state(struct pxa27x_udc *dev)
10260+{
10261+ unsigned i;
10262+
10263+ /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
10264+ * fifos, and pending transactions mustn't be continued in any case.
10265+ */
10266+ for (i = 1; i < UDC_EP_NUM; i++)
10267+ nuke(&dev->ep[i], -ECONNABORTED);
10268+}
10269+
10270+static void udc_watchdog(unsigned long _dev)
10271+{
10272+ struct pxa27x_udc *dev = (void *)_dev;
10273+
10274+ local_irq_disable();
10275+ if (dev->ep0state == EP0_STALL
10276+ && (UDCCSR0 & UDCCSR0_FST) == 0
10277+ && (UDCCSR0 & UDCCSR0_SST) == 0) {
10278+ UDCCSR0 = UDCCSR0_FST|UDCCSR0_FTF;
10279+ DBG(DBG_VERBOSE, "ep0 re-stall\n");
10280+ start_watchdog(dev);
10281+ }
10282+ local_irq_enable();
10283+}
10284+
10285+static void handle_ep0(struct pxa27x_udc *dev)
10286+{
10287+ u32 udccsr0 = UDCCSR0;
10288+ struct pxa27x_ep *ep = &dev->ep[0];
10289+ struct pxa27x_request *req;
10290+ union {
10291+ struct usb_ctrlrequest r;
10292+ u8 raw[8];
10293+ u32 word[2];
10294+ } u;
10295+
10296+ if (list_empty(&ep->queue))
10297+ req = 0;
10298+ else
10299+ req = list_entry(ep->queue.next, struct pxa27x_request, queue);
10300+
10301+ /* clear stall status */
10302+ if (udccsr0 & UDCCSR0_SST) {
10303+ nuke(ep, -EPIPE);
10304+ UDCCSR0 = UDCCSR0_SST;
10305+ del_timer(&dev->timer);
10306+ ep0_idle(dev);
10307+ }
10308+
10309+ /* previous request unfinished? non-error iff back-to-back ... */
10310+ if ((udccsr0 & UDCCSR0_SA) != 0 && dev->ep0state != EP0_IDLE) {
10311+ nuke(ep, 0);
10312+ del_timer(&dev->timer);
10313+ ep0_idle(dev);
10314+ }
10315+
10316+ switch (dev->ep0state) {
10317+ case EP0_NO_ACTION:
10318+ dev_info(dev->dev, "%s: Busy\n", __FUNCTION__);
10319+ /*Fall through */
10320+ case EP0_IDLE:
10321+ /* late-breaking status? */
10322+ udccsr0 = UDCCSR0;
10323+
10324+ /* start control request? */
10325+ if (likely((udccsr0 & (UDCCSR0_OPC|UDCCSR0_SA|UDCCSR0_RNE))
10326+ == (UDCCSR0_OPC|UDCCSR0_SA|UDCCSR0_RNE))) {
10327+ int i;
10328+
10329+ nuke(ep, -EPROTO);
10330+ /* read SETUP packet */
10331+ for (i = 0; i < 2; i++) {
10332+ if (unlikely(!(UDCCSR0 & UDCCSR0_RNE))) {
10333+bad_setup:
10334+ DMSG("SETUP %d!\n", i);
10335+ goto stall;
10336+ }
10337+ u.word [i] = UDCDR0;
10338+ }
10339+ if (unlikely((UDCCSR0 & UDCCSR0_RNE) != 0))
10340+ goto bad_setup;
10341+
10342+ le16_to_cpus(&u.r.wValue);
10343+ le16_to_cpus(&u.r.wIndex);
10344+ le16_to_cpus(&u.r.wLength);
10345+
10346+ DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
10347+ u.r.bRequestType, u.r.bRequest,
10348+ u.r.wValue, u.r.wIndex, u.r.wLength);
10349+ /* cope with automagic for some standard requests. */
10350+ dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
10351+ == USB_TYPE_STANDARD;
10352+ dev->req_config = 0;
10353+ dev->req_pending = 1;
10354+#if 0
10355+ switch (u.r.bRequest) {
10356+ /* hardware was supposed to hide this */
10357+ case USB_REQ_SET_CONFIGURATION:
10358+ case USB_REQ_SET_INTERFACE:
10359+ case USB_REQ_SET_ADDRESS:
10360+ dev_err(dev->dev, "Should not come here\n");
10361+ break;
10362+ }
10363+
10364+#endif
10365+ if (u.r.bRequestType & USB_DIR_IN)
10366+ dev->ep0state = EP0_IN_DATA_PHASE;
10367+ else
10368+ dev->ep0state = EP0_OUT_DATA_PHASE;
10369+ i = dev->driver->setup(&dev->gadget, &u.r);
10370+
10371+ if (i < 0) {
10372+ /* hardware automagic preventing STALL... */
10373+ if (dev->req_config) {
10374+ /* hardware sometimes neglects to tell
10375+ * tell us about config change events,
10376+ * so later ones may fail...
10377+ */
10378+ WARN("config change %02x fail %d?\n",
10379+ u.r.bRequest, i);
10380+ return;
10381+ /* TODO experiment: if has_cfr,
10382+ * hardware didn't ACK; maybe we
10383+ * could actually STALL!
10384+ */
10385+ }
10386+ DBG(DBG_VERBOSE, "protocol STALL, "
10387+ "%02x err %d\n", UDCCSR0, i);
10388+stall:
10389+ /* the watchdog timer helps deal with cases
10390+ * where udc seems to clear FST wrongly, and
10391+ * then NAKs instead of STALLing.
10392+ */
10393+ ep0start(dev, UDCCSR0_FST|UDCCSR0_FTF, "stall");
10394+ start_watchdog(dev);
10395+ dev->ep0state = EP0_STALL;
10396+
10397+ /* deferred i/o == no response yet */
10398+ } else if (dev->req_pending) {
10399+ if (likely(dev->ep0state == EP0_IN_DATA_PHASE
10400+ || dev->req_std || u.r.wLength))
10401+ ep0start(dev, 0, "defer");
10402+ else
10403+ ep0start(dev, UDCCSR0_IPR, "defer/IPR");
10404+ }
10405+
10406+ /* expect at least one data or status stage irq */
10407+ return;
10408+
10409+ } else {
10410+ /* some random early IRQ:
10411+ * - we acked FST
10412+ * - IPR cleared
10413+ * - OPC got set, without SA (likely status stage)
10414+ */
10415+ UDCCSR0 = udccsr0 & (UDCCSR0_SA|UDCCSR0_OPC);
10416+ }
10417+ break;
10418+ case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
10419+ if (udccsr0 & UDCCSR0_OPC) {
10420+ UDCCSR0 = UDCCSR0_OPC|UDCCSR0_FTF;
10421+ DBG(DBG_VERBOSE, "ep0in premature status\n");
10422+ if (req)
10423+ done(ep, req, 0);
10424+ ep0_idle(dev);
10425+ } else /* irq was IPR clearing */ {
10426+ if (req) {
10427+ /* this IN packet might finish the request */
10428+ (void) write_ep0_fifo(ep, req);
10429+ } /* else IN token before response was written */
10430+ }
10431+ break;
10432+ case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
10433+ if (udccsr0 & UDCCSR0_OPC) {
10434+ if (req) {
10435+ /* this OUT packet might finish the request */
10436+ if (read_ep0_fifo(ep, req))
10437+ done(ep, req, 0);
10438+ /* else more OUT packets expected */
10439+ } /* else OUT token before read was issued */
10440+ } else /* irq was IPR clearing */ {
10441+ DBG(DBG_VERBOSE, "ep0out premature status\n");
10442+ if (req)
10443+ done(ep, req, 0);
10444+ ep0_idle(dev);
10445+ }
10446+ break;
10447+ case EP0_STALL:
10448+ UDCCSR0 = UDCCSR0_FST;
10449+ break;
10450+ }
10451+ UDCISR0 = UDCISR_INT(0, UDCISR_INT_MASK);
10452+}
10453+
10454+
10455+static void handle_ep(struct pxa27x_ep *ep)
10456+{
10457+ struct pxa27x_request *req;
10458+ int completed;
10459+ u32 udccsr=0;
10460+
10461+ DMSG("%s is called\n", __FUNCTION__);
10462+ do {
10463+ completed = 0;
10464+ if (likely (!list_empty(&ep->queue))) {
10465+ req = list_entry(ep->queue.next,
10466+ struct pxa27x_request, queue);
10467+ } else
10468+ req = 0;
10469+
10470+// udccsr = *ep->reg_udccsr;
10471+ DMSG("%s: req:%p, udcisr0:0x%x udccsr %p:0x%x\n", __FUNCTION__,
10472+ req, UDCISR0, ep->reg_udccsr, *ep->reg_udccsr);
10473+ if (unlikely(ep->dir_in)) {
10474+ udccsr = (UDCCSR_SST | UDCCSR_TRN) & *ep->reg_udccsr;
10475+ if (unlikely (udccsr))
10476+ *ep->reg_udccsr = udccsr;
10477+
10478+ if (req && likely ((*ep->reg_udccsr & UDCCSR_FS) != 0))
10479+ completed = write_fifo(ep, req);
10480+
10481+ } else {
10482+ udccsr = (UDCCSR_SST | UDCCSR_TRN) & *ep->reg_udccsr;
10483+ if (unlikely(udccsr))
10484+ *ep->reg_udccsr = udccsr;
10485+
10486+ /* fifos can hold packets, ready for reading... */
10487+ if (likely(req)) {
10488+ completed = read_fifo(ep, req);
10489+ } else {
10490+ pio_irq_disable (ep->pxa_ep_num);
10491+ //*ep->reg_udccsr = UDCCSR_FEF;
10492+ DMSG("%s: no req for out data\n",
10493+ __FUNCTION__);
10494+ }
10495+ }
10496+ ep->pio_irqs++;
10497+ } while (completed);
10498+}
10499+
10500+static void pxa27x_update_eps(struct pxa27x_udc *dev)
10501+{
10502+ struct pxa27x_virt_ep *virt_ep;
10503+ int i;
10504+
10505+ for (i = 1; i < UDC_EP_NUM; i++) {
10506+ if(!dev->ep[i].assigned || !dev->ep[i].usb_ep)
10507+ continue;
10508+ virt_ep = container_of(dev->ep[i].usb_ep, struct pxa27x_virt_ep, usb_ep);
10509+
10510+ DMSG("%s, Updating eps %d:%d, %d:%d, %d:%d, %p,%p\n", __FUNCTION__, dev->ep[i].config, dev->configuration
10511+ ,dev->ep[i].interface, dev->interface, dev->ep[i].aisn, dev->alternate, virt_ep->pxa_ep, &dev->ep[i]);
10512+
10513+ if(dev->ep[i].config == dev->configuration && virt_ep->pxa_ep != &dev->ep[i]) {
10514+ if ((dev->ep[i].interface == dev->interface &&
10515+ dev->ep[i].aisn == dev->alternate) || virt_ep->pxa_ep->config != dev->configuration) {
10516+
10517+ if (virt_ep->pxa_ep->desc) {
10518+ DMSG("%s, Changing end point to %d (en/dis)\n", __FUNCTION__, i);
10519+ pxa27x_ep_disable(&virt_ep->usb_ep);
10520+ virt_ep->pxa_ep = &dev->ep[i];
10521+ pxa27x_ep_enable(&virt_ep->usb_ep, virt_ep->desc);
10522+ } else {
10523+ DMSG("%s, Changing end point to %d (no en/dis)\n", __FUNCTION__, i);
10524+ virt_ep->pxa_ep = &dev->ep[i];
10525+ }
10526+ }
10527+ }
10528+ }
10529+}
10530+
10531+static void pxa27x_change_configuration(struct pxa27x_udc *dev)
10532+{
10533+ struct usb_ctrlrequest req ;
10534+
10535+ pxa27x_update_eps(dev);
10536+
10537+ req.bRequestType = 0;
10538+ req.bRequest = USB_REQ_SET_CONFIGURATION;
10539+ req.wValue = dev->configuration;
10540+ req.wIndex = 0;
10541+ req.wLength = 0;
10542+
10543+ dev->ep0state = EP0_NO_ACTION;
10544+ dev->driver->setup(&dev->gadget, &req);
10545+}
10546+
10547+static void pxa27x_change_interface(struct pxa27x_udc *dev)
10548+{
10549+ struct usb_ctrlrequest req;
10550+
10551+ pxa27x_update_eps(dev);
10552+
10553+ req.bRequestType = USB_RECIP_INTERFACE;
10554+ req.bRequest = USB_REQ_SET_INTERFACE;
10555+ req.wValue = dev->alternate;
10556+ req.wIndex = dev->interface;
10557+ req.wLength = 0;
10558+
10559+ dev->ep0state = EP0_NO_ACTION;
10560+ dev->driver->setup(&dev->gadget, &req);
10561+}
10562+
10563+/*
10564+ * pxa27x_udc_irq - interrupt handler
10565+ *
10566+ * avoid delays in ep0 processing. the control handshaking isn't always
10567+ * under software control (pxa250c0 and the pxa255 are better), and delays
10568+ * could cause usb protocol errors.
10569+ */
10570+static irqreturn_t pxa27x_udc_irq(int irq, void *_dev)
10571+{
10572+ struct pxa27x_udc *dev = _dev;
10573+ int handled;
10574+
10575+ dev->stats.irqs++;
10576+
10577+ DBG(DBG_VERBOSE, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, "
10578+ "UDCCR:0x%08x\n", UDCISR0, UDCISR1, UDCCR);
10579+ do {
10580+ u32 udcir = UDCISR1 & 0xF8000000;
10581+
10582+ handled = 0;
10583+
10584+ /* SUSpend Interrupt Request */
10585+ if (unlikely(udcir & UDCISR1_IRSU)) {
10586+ UDCISR1 = UDCISR1_IRSU;
10587+ handled = 1;
10588+ DBG(DBG_VERBOSE, "USB suspend\n");
10589+ if (dev->gadget.speed != USB_SPEED_UNKNOWN
10590+ && dev->driver
10591+ && dev->driver->suspend)
10592+ dev->driver->suspend(&dev->gadget);
10593+ ep0_idle(dev);
10594+ }
10595+
10596+ /* RESume Interrupt Request */
10597+ if (unlikely(udcir & UDCISR1_IRRU)) {
10598+ UDCISR1 = UDCISR1_IRRU;
10599+ handled = 1;
10600+ DBG(DBG_VERBOSE, "USB resume\n");
10601+
10602+ if (dev->gadget.speed != USB_SPEED_UNKNOWN
10603+ && dev->driver
10604+ && dev->driver->resume)
10605+ dev->driver->resume(&dev->gadget);
10606+ }
10607+
10608+ if (unlikely(udcir & UDCISR1_IRCC)) {
10609+ unsigned config, interface, alternate;
10610+
10611+ handled = 1;
10612+ DBG(DBG_VERBOSE, "USB SET_CONFIGURATION or "
10613+ "SET_INTERFACE command received\n");
10614+
10615+ config = (UDCCR & UDCCR_ACN) >> UDCCR_ACN_S;
10616+
10617+ if (dev->configuration != config) {
10618+ dev->configuration = config;
10619+ pxa27x_change_configuration(dev) ;
10620+ }
10621+
10622+ interface = (UDCCR & UDCCR_AIN) >> UDCCR_AIN_S;
10623+ alternate = (UDCCR & UDCCR_AAISN) >> UDCCR_AAISN_S;
10624+
10625+ if ((dev->interface != interface) || (dev->alternate != alternate)) {
10626+ dev->interface = interface;
10627+ dev->alternate = alternate;
10628+ pxa27x_change_interface(dev);
10629+ }
10630+
10631+ UDCCR |= UDCCR_SMAC;
10632+
10633+ UDCISR1 = UDCISR1_IRCC;
10634+ DMSG("%s: con:%d,inter:%d,alt:%d\n",
10635+ __FUNCTION__, config,interface, alternate);
10636+ }
10637+
10638+ /* ReSeT Interrupt Request - USB reset */
10639+ if (unlikely(udcir & UDCISR1_IRRS)) {
10640+ UDCISR1 = UDCISR1_IRRS;
10641+ handled = 1;
10642+
10643+ if ((UDCCR & UDCCR_UDA) == 0) {
10644+ DBG(DBG_VERBOSE, "USB reset start\n");
10645+
10646+ /* reset driver and endpoints,
10647+ * in case that's not yet done
10648+ */
10649+ stop_activity(dev, dev->driver);
10650+ }
10651+ INFO("USB reset\n");
10652+ dev->gadget.speed = USB_SPEED_FULL;
10653+ memset(&dev->stats, 0, sizeof dev->stats);
10654+
10655+ } else {
10656+ u32 udcisr0 = UDCISR0 ;
10657+ u32 udcisr1 = UDCISR1 & 0xFFFF;
10658+ int i;
10659+
10660+ if (unlikely (!udcisr0 && !udcisr1))
10661+ continue;
10662+
10663+ DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", udcisr1,udcisr0);
10664+
10665+ /* control traffic */
10666+ if (udcisr0 & UDCISR0_IR0) {
10667+ dev->ep[0].pio_irqs++;
10668+ handle_ep0(dev);
10669+ handled = 1;
10670+ }
10671+
10672+ udcisr0 >>= 2;
10673+ /* endpoint data transfers */
10674+ for (i = 1; udcisr0!=0 && i < 16; udcisr0>>=2,i++) {
10675+ UDCISR0 = UDCISR_INT(i, UDCISR_INT_MASK);
10676+
10677+ if (udcisr0 & UDC_INT_FIFOERROR)
10678+ dev_err(dev->dev, " Endpoint %d Fifo error\n", i);
10679+ if (udcisr0 & UDC_INT_PACKETCMP) {
10680+ handle_ep(&dev->ep[i]);
10681+ handled = 1;
10682+ }
10683+
10684+ }
10685+
10686+ for (i = 0; udcisr1!=0 && i < 8; udcisr1 >>= 2, i++) {
10687+ UDCISR1 = UDCISR_INT(i, UDCISR_INT_MASK);
10688+
10689+ if (udcisr1 & UDC_INT_FIFOERROR) {
10690+ dev_err(dev->dev, "Endpoint %d fifo error\n", (i+16));
10691+ }
10692+
10693+ if (udcisr1 & UDC_INT_PACKETCMP) {
10694+ handle_ep(&dev->ep[i+16]);
10695+ handled = 1;
10696+ }
10697+ }
10698+ }
10699+
10700+ /* we could also ask for 1 msec SOF (SIR) interrupts */
10701+
10702+ } while (handled);
10703+ return IRQ_HANDLED;
10704+}
10705+
10706+int write_ep0_zlp(void)
10707+{
10708+ UDCCSR0 = UDCCSR0_IPR;
10709+ return 0;
10710+}
10711+EXPORT_SYMBOL(write_ep0_zlp);
10712+
10713+static void udc_init_ep(struct pxa27x_udc *dev)
10714+{
10715+ int i;
10716+
10717+ INIT_LIST_HEAD(&dev->gadget.ep_list);
10718+ INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
10719+
10720+ for (i = 0; i < UDC_EP_NUM; i++) {
10721+ struct pxa27x_ep *ep = &dev->ep[i];
10722+
10723+ ep->dma = -1;
10724+ if (i != 0) {
10725+ memset(ep, 0, sizeof(*ep));
10726+ }
10727+ INIT_LIST_HEAD(&ep->queue);
10728+ }
10729+}
10730+
10731+/*-------------------------------------------------------------------------*/
10732+
10733+static void nop_release(struct device *dev)
10734+{
10735+ DMSG("%s %s\n", __FUNCTION__, dev->bus_id);
10736+}
10737+
10738+/* this uses load-time allocation and initialization (instead of
10739+ * doing it at run-time) to save code, eliminate fault paths, and
10740+ * be more obviously correct.
10741+ */
10742+
10743+static struct pxa27x_udc memory = {
10744+ .gadget = {
10745+ .ops = &pxa27x_udc_ops,
10746+ .ep0 = &memory.virt_ep0.usb_ep,
10747+ .name = driver_name,
10748+ .dev = {
10749+ .bus_id = "gadget",
10750+ .release = nop_release,
10751+ },
10752+ },
10753+
10754+ /* control endpoint */
10755+ .virt_ep0 = {
10756+ .pxa_ep = &memory.ep[0],
10757+ .usb_ep = {
10758+ .name = ep0name,
10759+ .ops = &pxa27x_ep_ops,
10760+ .maxpacket = EP0_FIFO_SIZE,
10761+ },
10762+ },
10763+
10764+ .ep[0] = {
10765+ .usb_ep = &memory.virt_ep0.usb_ep,
10766+ .dev = &memory,
10767+ .reg_udccsr = &UDCCSR0,
10768+ .reg_udcdr = &UDCDR0,
10769+ },
10770+};
10771+
10772+static int __init pxa27x_udc_probe(struct platform_device *_dev)
10773+{
10774+ struct pxa27x_udc *dev = &memory;
10775+ int retval;
10776+
10777+ /* other non-static parts of init */
10778+ dev->dev = &_dev->dev;
10779+ dev->mach = _dev->dev.platform_data;
10780+
10781+ /* RPFIXME */
10782+ UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE;
10783+
10784+ init_timer(&dev->timer);
10785+ dev->timer.function = udc_watchdog;
10786+ dev->timer.data = (unsigned long) dev;
10787+
10788+ device_initialize(&dev->gadget.dev);
10789+ dev->gadget.dev.parent = &_dev->dev;
10790+ dev->gadget.dev.dma_mask = _dev->dev.dma_mask;
10791+
10792+ the_controller = dev;
10793+ platform_set_drvdata(_dev, dev);
10794+
10795+ udc_disable(dev);
10796+ udc_init_ep(dev);
10797+ udc_reinit(dev);
10798+
10799+ /* irq setup after old hardware state is cleaned up */
10800+ retval = request_irq(IRQ_USB, pxa27x_udc_irq,
10801+ SA_INTERRUPT, driver_name, dev);
10802+ if (retval != 0) {
10803+ dev_err(dev->dev, "%s: can't get irq %i, err %d\n",
10804+ driver_name, IRQ_USB, retval);
10805+ return -EBUSY;
10806+ }
10807+ dev->got_irq = 1;
10808+
10809+ create_proc_files();
10810+
10811+ return 0;
10812+}
10813+
10814+static int pxa27x_udc_remove(struct platform_device *_dev)
10815+{
10816+ struct pxa27x_udc *dev = platform_get_drvdata(_dev);
10817+
10818+ udc_disable(dev);
10819+ remove_proc_files();
10820+ usb_gadget_unregister_driver(dev->driver);
10821+
10822+ pxa27x_ep_freeall(&dev->gadget);
10823+
10824+ if (dev->got_irq) {
10825+ free_irq(IRQ_USB, dev);
10826+ dev->got_irq = 0;
10827+ }
10828+ platform_set_drvdata(_dev, 0);
10829+ the_controller = 0;
10830+ return 0;
10831+}
10832+
10833+#ifdef CONFIG_PM
10834+static void pxa27x_udc_shutdown(struct platform_device *_dev)
10835+{
10836+ struct pxa27x_udc *dev = platform_get_drvdata(_dev);
10837+
10838+ udc_disable(dev);
10839+}
10840+
10841+static int pxa27x_udc_suspend(struct platform_device *_dev, pm_message_t state)
10842+{
10843+ int i;
10844+ struct pxa27x_udc *dev = platform_get_drvdata(_dev);
10845+
10846+ DMSG("%s is called\n", __FUNCTION__);
10847+
10848+ dev->udccsr0 = UDCCSR0;
10849+ for(i=1; (i<UDC_EP_NUM); i++) {
10850+ if (dev->ep[i].assigned) {
10851+ struct pxa27x_ep *ep = &dev->ep[i];
10852+ ep->udccsr_value = *ep->reg_udccsr;
10853+ ep->udccr_value = *ep->reg_udccr;
10854+ DMSG("EP%d, udccsr:0x%x, udccr:0x%x\n",
10855+ i, *ep->reg_udccsr, *ep->reg_udccr);
10856+ }
10857+ }
10858+
10859+ udc_clear_mask_UDCCR(UDCCR_UDE);
10860+ pxa_set_cken(CKEN_USB, 0);
10861+
10862+ return 0;
10863+}
10864+
10865+static int pxa27x_udc_resume(struct platform_device *_dev)
10866+{
10867+ int i;
10868+ struct pxa27x_udc *dev = platform_get_drvdata(_dev);
10869+
10870+ DMSG("%s is called\n", __FUNCTION__);
10871+ UDCCSR0 = dev->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME);
10872+ for (i=1; i < UDC_EP_NUM; i++) {
10873+ if (dev->ep[i].assigned) {
10874+ struct pxa27x_ep *ep = &dev->ep[i];
10875+ *ep->reg_udccsr = ep->udccsr_value;
10876+ *ep->reg_udccr = ep->udccr_value;
10877+ DMSG("EP%d, udccsr:0x%x, udccr:0x%x\n",
10878+ i, *ep->reg_udccsr, *ep->reg_udccr);
10879+ }
10880+ }
10881+
10882+ udc_enable(dev);
10883+
10884+ /* OTGPH bit is set when sleep mode is entered.
10885+ * it indicates that OTG pad is retaining its state.
10886+ * Upon exit from sleep mode and before clearing OTGPH,
10887+ * Software must configure the USB OTG pad, UDC, and UHC
10888+ * to the state they were in before entering sleep mode.*/
10889+ PSSR |= PSSR_OTGPH;
10890+
10891+ return 0;
10892+}
10893+#endif
10894+
10895+/*-------------------------------------------------------------------------*/
10896+
10897+static struct platform_driver udc_driver = {
10898+ .driver = {
10899+ .name = "pxa2xx-udc",
10900+ },
10901+ .probe = pxa27x_udc_probe,
10902+ .remove = pxa27x_udc_remove,
10903+#ifdef CONFIG_PM
10904+ .shutdown = pxa27x_udc_shutdown,
10905+ .suspend = pxa27x_udc_suspend,
10906+ .resume = pxa27x_udc_resume
10907+#endif
10908+};
10909+
10910+static int __init udc_init(void)
10911+{
10912+ printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION);
10913+ return platform_driver_register(&udc_driver);
10914+}
10915+module_init(udc_init);
10916+
10917+static void __exit udc_exit(void)
10918+{
10919+ platform_driver_unregister(&udc_driver);
10920+}
10921+module_exit(udc_exit);
10922+
10923+MODULE_DESCRIPTION(DRIVER_DESC);
10924+MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
10925+MODULE_LICENSE("GPL");
10926diff --git a/drivers/usb/gadget/pxa27x_udc.h b/drivers/usb/gadget/pxa27x_udc.h
10927new file mode 100644
10928index 0000000..d4377cf
10929--- /dev/null
10930+++ b/drivers/usb/gadget/pxa27x_udc.h
10931@@ -0,0 +1,298 @@
10932+/*
10933+ * linux/drivers/usb/gadget/pxa27x_udc.h
10934+ * Intel PXA27x on-chip full speed USB device controller
10935+ *
10936+ * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
10937+ * Copyright (C) 2003 David Brownell
10938+ * Copyright (C) 2004 Intel Corporation
10939+ *
10940+ * This program is free software; you can redistribute it and/or modify
10941+ * it under the terms of the GNU General Public License as published by
10942+ * the Free Software Foundation; either version 2 of the License, or
10943+ * (at your option) any later version.
10944+ *
10945+ * This program is distributed in the hope that it will be useful,
10946+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
10947+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10948+ * GNU General Public License for more details.
10949+ *
10950+ * You should have received a copy of the GNU General Public License
10951+ * along with this program; if not, write to the Free Software
10952+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
10953+ */
10954+
10955+#ifndef __LINUX_USB_GADGET_PXA27X_H
10956+#define __LINUX_USB_GADGET_PXA27X_H
10957+
10958+#include <linux/types.h>
10959+
10960+struct pxa27x_udc;
10961+
10962+struct pxa27x_ep {
10963+ struct pxa27x_udc *dev;
10964+ struct usb_ep *usb_ep;
10965+ const struct usb_endpoint_descriptor *desc;
10966+
10967+ struct list_head queue;
10968+ unsigned long pio_irqs;
10969+ unsigned long dma_irqs;
10970+
10971+ unsigned pxa_ep_num;
10972+ int dma;
10973+ unsigned fifo_size;
10974+ unsigned ep_type;
10975+
10976+ unsigned stopped : 1;
10977+ unsigned dma_con : 1;
10978+ unsigned dir_in : 1;
10979+ unsigned assigned : 1;
10980+
10981+ unsigned ep_num;
10982+ unsigned config;
10983+ unsigned interface;
10984+ unsigned aisn;
10985+ /* UDCCSR = UDC Control/Status Register for this EP
10986+ * UBCR = UDC Byte Count Remaining (contents of OUT fifo)
10987+ * UDCDR = UDC Endpoint Data Register (the fifo)
10988+ * UDCCR = UDC Endpoint Configuration Registers
10989+ * DRCM = DMA Request Channel Map
10990+ */
10991+ volatile u32 *reg_udccsr;
10992+ volatile u32 *reg_udcbcr;
10993+ volatile u32 *reg_udcdr;
10994+ volatile u32 *reg_udccr;
10995+#ifdef USE_DMA
10996+ volatile u32 *reg_drcmr;
10997+#define drcmr(n) .reg_drcmr = & DRCMR ## n ,
10998+#else
10999+#define drcmr(n)
11000+#endif
11001+
11002+#ifdef CONFIG_PM
11003+ unsigned udccsr_value;
11004+ unsigned udccr_value;
11005+#endif
11006+};
11007+
11008+struct pxa27x_virt_ep {
11009+ struct usb_ep usb_ep;
11010+ const struct usb_endpoint_descriptor *desc;
11011+ struct pxa27x_ep *pxa_ep;
11012+};
11013+
11014+struct pxa27x_request {
11015+ struct usb_request req;
11016+ struct list_head queue;
11017+};
11018+
11019+enum ep0_state {
11020+ EP0_IDLE,
11021+ EP0_IN_DATA_PHASE,
11022+ EP0_OUT_DATA_PHASE,
11023+// EP0_END_XFER,
11024+ EP0_STALL,
11025+ EP0_NO_ACTION
11026+};
11027+
11028+#define EP0_FIFO_SIZE ((unsigned)16)
11029+#define BULK_FIFO_SIZE ((unsigned)64)
11030+#define ISO_FIFO_SIZE ((unsigned)256)
11031+#define INT_FIFO_SIZE ((unsigned)8)
11032+
11033+struct udc_stats {
11034+ struct ep0stats {
11035+ unsigned long ops;
11036+ unsigned long bytes;
11037+ } read, write;
11038+ unsigned long irqs;
11039+};
11040+
11041+#define UDC_EP_NUM 24
11042+
11043+
11044+struct pxa27x_udc {
11045+ struct usb_gadget gadget;
11046+ struct usb_gadget_driver *driver;
11047+
11048+ enum ep0_state ep0state;
11049+ struct udc_stats stats;
11050+ unsigned got_irq : 1,
11051+ has_cfr : 1,
11052+ req_pending : 1,
11053+ req_std : 1,
11054+ req_config : 1;
11055+
11056+#define start_watchdog(dev) mod_timer(&dev->timer, jiffies + (HZ/200))
11057+ struct timer_list timer;
11058+
11059+ struct device *dev;
11060+ struct pxa2xx_udc_mach_info *mach;
11061+ u64 dma_mask;
11062+ struct pxa27x_virt_ep virt_ep0;
11063+ struct pxa27x_ep ep[UDC_EP_NUM];
11064+ unsigned int ep_num;
11065+
11066+ unsigned configuration,
11067+ interface,
11068+ alternate;
11069+#ifdef CONFIG_PM
11070+ unsigned udccsr0;
11071+#endif
11072+};
11073+
11074+static struct pxa27x_udc *the_controller;
11075+
11076+#if 0
11077+/*-------------------------------------------------------------------------*/
11078+
11079+
11080+/* one GPIO should be used to detect host disconnect */
11081+static inline int is_usb_connected(void)
11082+{
11083+ if (!the_controller->mach->udc_is_connected)
11084+ return 1;
11085+ return the_controller->mach->udc_is_connected();
11086+}
11087+
11088+/* one GPIO should force the host to see this device (or not) */
11089+static inline void make_usb_disappear(void)
11090+{
11091+ if (!the_controller->mach->udc_command)
11092+ return;
11093+ the_controller->mach->udc_command(PXA27X_UDC_CMD_DISCONNECT);
11094+}
11095+
11096+static inline void let_usb_appear(void)
11097+{
11098+ if (!the_controller->mach->udc_command)
11099+ return;
11100+ the_controller->mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
11101+}
11102+#endif
11103+
11104+/*-------------------------------------------------------------------------*/
11105+
11106+/*
11107+ * Debugging support vanishes in non-debug builds. DBG_NORMAL should be
11108+ * mostly silent during normal use/testing, with no timing side-effects.
11109+ */
11110+#define DBG_NORMAL 1 /* error paths, device state transitions */
11111+#define DBG_VERBOSE 2 /* add some success path trace info */
11112+#define DBG_NOISY 3 /* ... even more: request level */
11113+#define DBG_VERY_NOISY 4 /* ... even more: packet level */
11114+
11115+#ifdef DEBUG
11116+static const char *state_name[] = {
11117+ "EP0_IDLE",
11118+ "EP0_IN_DATA_PHASE", "EP0_OUT_DATA_PHASE",
11119+ "EP0_END_XFER", "EP0_STALL"
11120+};
11121+
11122+#define DMSG(stuff...) printk(KERN_ERR "udc: " stuff)
11123+
11124+#ifdef VERBOSE
11125+# define UDC_DEBUG DBG_VERBOSE
11126+#else
11127+# define UDC_DEBUG DBG_NORMAL
11128+#endif
11129+
11130+static void __attribute__ ((__unused__))
11131+dump_udccr(const char *label)
11132+{
11133+ u32 udccr = UDCCR;
11134+ DMSG("%s 0x%08x =%s%s%s%s%s%s%s%s%s%s, con=%d,inter=%d,altinter=%d\n",
11135+ label, udccr,
11136+ (udccr & UDCCR_OEN) ? " oen":"",
11137+ (udccr & UDCCR_AALTHNP) ? " aalthnp":"",
11138+ (udccr & UDCCR_AHNP) ? " rem" : "",
11139+ (udccr & UDCCR_BHNP) ? " rstir" : "",
11140+ (udccr & UDCCR_DWRE) ? " dwre" : "",
11141+ (udccr & UDCCR_SMAC) ? " smac" : "",
11142+ (udccr & UDCCR_EMCE) ? " emce" : "",
11143+ (udccr & UDCCR_UDR) ? " udr" : "",
11144+ (udccr & UDCCR_UDA) ? " uda" : "",
11145+ (udccr & UDCCR_UDE) ? " ude" : "",
11146+ (udccr & UDCCR_ACN) >> UDCCR_ACN_S,
11147+ (udccr & UDCCR_AIN) >> UDCCR_AIN_S,
11148+ (udccr & UDCCR_AAISN)>> UDCCR_AAISN_S );
11149+}
11150+
11151+static void __attribute__ ((__unused__))
11152+dump_udccsr0(const char *label)
11153+{
11154+ u32 udccsr0 = UDCCSR0;
11155+
11156+ DMSG("%s %s 0x%08x =%s%s%s%s%s%s%s\n",
11157+ label, state_name[the_controller->ep0state], udccsr0,
11158+ (udccsr0 & UDCCSR0_SA) ? " sa" : "",
11159+ (udccsr0 & UDCCSR0_RNE) ? " rne" : "",
11160+ (udccsr0 & UDCCSR0_FST) ? " fst" : "",
11161+ (udccsr0 & UDCCSR0_SST) ? " sst" : "",
11162+ (udccsr0 & UDCCSR0_DME) ? " dme" : "",
11163+ (udccsr0 & UDCCSR0_IPR) ? " ipr" : "",
11164+ (udccsr0 & UDCCSR0_OPC) ? " opr" : "");
11165+}
11166+
11167+static void __attribute__ ((__unused__))
11168+dump_state(struct pxa27x_udc *dev)
11169+{
11170+ unsigned i;
11171+
11172+ DMSG("%s, udcicr %02X.%02X, udcsir %02X.%02x, udcfnr %02X\n",
11173+ state_name[dev->ep0state],
11174+ UDCICR1, UDCICR0, UDCISR1, UDCISR0, UDCFNR);
11175+ dump_udccr("udccr");
11176+
11177+ if (!dev->driver) {
11178+ DMSG("no gadget driver bound\n");
11179+ return;
11180+ } else
11181+ DMSG("ep0 driver '%s'\n", dev->driver->driver.name);
11182+
11183+
11184+ dump_udccsr0 ("udccsr0");
11185+ DMSG("ep0 IN %lu/%lu, OUT %lu/%lu\n",
11186+ dev->stats.write.bytes, dev->stats.write.ops,
11187+ dev->stats.read.bytes, dev->stats.read.ops);
11188+
11189+ for (i = 1; i < UDC_EP_NUM; i++) {
11190+ if (dev->ep[i].assigned)
11191+ DMSG ("udccs%d = %02x\n", i, *dev->ep->reg_udccsr);
11192+ }
11193+}
11194+
11195+#if 0
11196+static void dump_regs(u8 ep)
11197+{
11198+ DMSG("EP:%d UDCCSR:0x%08x UDCBCR:0x%08x\n UDCCR:0x%08x\n",
11199+ ep,UDCCSN(ep), UDCBCN(ep), UDCCN(ep));
11200+}
11201+static void dump_req (struct pxa27x_request *req)
11202+{
11203+ struct usb_request *r = &req->req;
11204+
11205+ DMSG("%s: buf:0x%08x length:%d dma:0x%08x actual:%d\n",
11206+ __FUNCTION__, (unsigned)r->buf, r->length,
11207+ r->dma, r->actual);
11208+}
11209+#endif
11210+
11211+#else
11212+
11213+#define DMSG(stuff...) do{}while(0)
11214+
11215+#define dump_udccr(x) do{}while(0)
11216+#define dump_udccsr0(x) do{}while(0)
11217+#define dump_state(x) do{}while(0)
11218+
11219+#define UDC_DEBUG ((unsigned)4)
11220+
11221+#endif
11222+
11223+#define DBG(lvl, stuff...) do{if ((lvl) <= UDC_DEBUG) DMSG(stuff);}while(0)
11224+
11225+#define WARN(stuff...) printk(KERN_WARNING "udc: " stuff)
11226+#define INFO(stuff...) printk(KERN_INFO "udc: " stuff)
11227+
11228+
11229+#endif /* __LINUX_USB_GADGET_PXA27X_H */
11230diff --git a/drivers/usb/gadget/pxa2xx_udc.h b/drivers/usb/gadget/pxa2xx_udc.h
11231index 0e5d0e6..9483a49 100644
11232--- a/drivers/usb/gadget/pxa2xx_udc.h
11233+++ b/drivers/usb/gadget/pxa2xx_udc.h
11234@@ -206,7 +206,8 @@ dump_state(struct pxa2xx_udc *dev)
11235 unsigned i;
11236
11237 DMSG("%s %s, uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
11238- is_usb_connected() ? "host " : "disconnected",
11239+ //is_usb_connected() ? "host " : "disconnected",
11240+ "host ",
11241 state_name[dev->ep0state],
11242 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
11243 dump_udccr("udccr");
11244@@ -223,8 +224,8 @@ dump_state(struct pxa2xx_udc *dev)
11245 } else
11246 DMSG("ep0 driver '%s'\n", dev->driver->driver.name);
11247
11248- if (!is_usb_connected())
11249- return;
11250+ //if (!is_usb_connected())
11251+ // return;
11252
11253 dump_udccs0 ("udccs0");
11254 DMSG("ep0 IN %lu/%lu, OUT %lu/%lu\n",
11255diff --git a/drivers/usb/gadget/serial.c b/drivers/usb/gadget/serial.c
11256index ce4d2e0..5dac23f 100644
11257--- a/drivers/usb/gadget/serial.c
11258+++ b/drivers/usb/gadget/serial.c
11259@@ -1356,6 +1356,7 @@ static int __init gs_bind(struct usb_gadget *gadget)
11260 struct usb_ep *ep;
11261 struct gs_dev *dev;
11262 int gcnum;
11263+ struct usb_endpoint_config ep_config[2];
11264
11265 /* Some controllers can't support CDC ACM:
11266 * - sh doesn't support multiple interfaces or configs;
11267@@ -1376,22 +1377,33 @@ static int __init gs_bind(struct usb_gadget *gadget)
11268 __constant_cpu_to_le16(GS_VERSION_NUM|0x0099);
11269 }
11270
11271+ ep_config[0].config = GS_BULK_CONFIG_ID;
11272+ ep_config[0].interface = gs_bulk_interface_desc.bInterfaceNumber;
11273+ ep_config[0].altinterface = gs_bulk_interface_desc.bAlternateSetting;
11274+ ep_config[1].config = GS_ACM_CONFIG_ID;
11275+ ep_config[1].interface = gs_data_interface_desc.bInterfaceNumber;
11276+ ep_config[1].altinterface = gs_data_interface_desc.bAlternateSetting;
11277+
11278 usb_ep_autoconfig_reset(gadget);
11279
11280- ep = usb_ep_autoconfig(gadget, &gs_fullspeed_in_desc);
11281+ ep = usb_ep_autoconfig(gadget, &gs_fullspeed_in_desc, &ep_config[0], 2);
11282 if (!ep)
11283 goto autoconf_fail;
11284 EP_IN_NAME = ep->name;
11285 ep->driver_data = ep; /* claim the endpoint */
11286
11287- ep = usb_ep_autoconfig(gadget, &gs_fullspeed_out_desc);
11288+ ep = usb_ep_autoconfig(gadget, &gs_fullspeed_out_desc, &ep_config[0], 2);
11289 if (!ep)
11290 goto autoconf_fail;
11291 EP_OUT_NAME = ep->name;
11292 ep->driver_data = ep; /* claim the endpoint */
11293
11294 if (use_acm) {
11295- ep = usb_ep_autoconfig(gadget, &gs_fullspeed_notify_desc);
11296+ ep_config[0].config = GS_ACM_CONFIG_ID;
11297+ ep_config[0].interface = gs_control_interface_desc.bInterfaceNumber;
11298+ ep_config[0].altinterface = gs_control_interface_desc.bAlternateSetting;
11299+
11300+ ep = usb_ep_autoconfig(gadget, &gs_fullspeed_notify_desc, &ep_config[0], 1);
11301 if (!ep) {
11302 printk(KERN_ERR "gs_bind: cannot run ACM on %s\n", gadget->name);
11303 goto autoconf_fail;
11304diff --git a/drivers/usb/gadget/zero.c b/drivers/usb/gadget/zero.c
11305index fcfe869..1e40d46 100644
11306--- a/drivers/usb/gadget/zero.c
11307+++ b/drivers/usb/gadget/zero.c
11308@@ -1142,6 +1142,7 @@ zero_bind (struct usb_gadget *gadget)
11309 struct zero_dev *dev;
11310 struct usb_ep *ep;
11311 int gcnum;
11312+ struct usb_endpoint_config ep_config[2];
11313
11314 /* FIXME this can't yet work right with SH ... it has only
11315 * one configuration, numbered one.
11316@@ -1154,7 +1155,15 @@ zero_bind (struct usb_gadget *gadget)
11317 * but there may also be important quirks to address.
11318 */
11319 usb_ep_autoconfig_reset (gadget);
11320- ep = usb_ep_autoconfig (gadget, &fs_source_desc);
11321+
11322+ ep_config[0].config = CONFIG_SOURCE_SINK;
11323+ ep_config[0].interface = source_sink_intf.bInterfaceNumber;
11324+ ep_config[0].altinterface = source_sink_intf.bAlternateSetting;
11325+ ep_config[1].config = CONFIG_LOOPBACK;
11326+ ep_config[1].interface = loopback_intf.bInterfaceNumber;
11327+ ep_config[1].altinterface = loopback_intf.bAlternateSetting;
11328+
11329+ ep = usb_ep_autoconfig(gadget, &fs_source_desc, &ep_config[0], 2);
11330 if (!ep) {
11331 autoconf_fail:
11332 printk (KERN_ERR "%s: can't autoconfigure on %s\n",
11333@@ -1164,7 +1173,7 @@ autoconf_fail:
11334 EP_IN_NAME = ep->name;
11335 ep->driver_data = ep; /* claim */
11336
11337- ep = usb_ep_autoconfig (gadget, &fs_sink_desc);
11338+ ep = usb_ep_autoconfig(gadget, &fs_sink_desc, &ep_config[0], 2);
11339 if (!ep)
11340 goto autoconf_fail;
11341 EP_OUT_NAME = ep->name;
11342diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
11343index 2580f5f..12e4b91 100644
11344--- a/drivers/video/backlight/Kconfig
11345+++ b/drivers/video/backlight/Kconfig
11346@@ -40,7 +40,7 @@ config BACKLIGHT_CLASS_DEVICE
11347
11348 config BACKLIGHT_CORGI
11349 tristate "Sharp Corgi Backlight Driver (SL Series)"
11350- depends on BACKLIGHT_CLASS_DEVICE && PXA_SHARPSL
11351+ depends on BACKLIGHT_CLASS_DEVICE && (PXA_SHARPSL || MACH_EM_X270)
11352 default y
11353 help
11354 If you have a Sharp Zaurus SL-C7xx, SL-Cxx00 or SL-6000x say y to enable the
11355diff --git a/include/asm-arm/arch-pxa/pwr-i2c.h b/include/asm-arm/arch-pxa/pwr-i2c.h
11356new file mode 100644
11357index 0000000..6bad486
11358--- /dev/null
11359+++ b/include/asm-arm/arch-pxa/pwr-i2c.h
11360@@ -0,0 +1,61 @@
11361+/*
11362+ * (C) Copyright 2007 CompuLab, Ltd
11363+ * Mike Rapoport <mike@compulab.co.il>
11364+ *
11365+ * Simple Power I2C interface for PXA processors.
11366+ * Based on U-Boot PXA I2C driver.
11367+ *
11368+ * This program is free software; you can redistribute it and/or
11369+ * modify it under the terms of the GNU General Public License as
11370+ * published by the Free Software Foundation; either version 2 of
11371+ * the License, or (at your option) any later version.
11372+ *
11373+ * This program is distributed in the hope that it will be useful,
11374+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
11375+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11376+ * GNU General Public License for more details.
11377+ *
11378+ * You should have received a copy of the GNU General Public License
11379+ * along with this program; if not, write to the Free Software
11380+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
11381+ * MA 02111-1307 USA
11382+ *
11383+ */
11384+
11385+#ifndef __PXA_PWR_I2C_H__
11386+#define __PXA_PWR_I2C_H__
11387+
11388+/*
11389+ * Configuration items.
11390+ */
11391+#define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
11392+
11393+/*
11394+ * Probe the given I2C chip address. Returns 0 if a chip responded,
11395+ * not 0 on failure.
11396+ */
11397+extern int pxa_pwr_i2c_probe(u8 chip);
11398+
11399+/*
11400+ * Read/Write interface:
11401+ * chip: I2C chip address, range 0..127
11402+ * addr: Memory (register) address within the chip
11403+ * alen: Number of bytes to use for addr (typically 1, 2 for larger
11404+ * memories, 0 for register type devices with only one
11405+ * register)
11406+ * buffer: Where to read/write the data
11407+ * len: How many bytes to read/write
11408+ *
11409+ * Returns: 0 on success, not 0 on failure
11410+ */
11411+extern int pxa_pwr_i2c_read(u8 chip, uint addr, int alen, u8 *buffer, int len);
11412+extern int pxa_pwr_i2c_write(u8 chip, uint addr, int alen,
11413+ u8 *buffer, int len);
11414+
11415+/*
11416+ * Utility routines to read/write registers.
11417+ */
11418+extern s32 pxa_pwr_i2c_reg_read (u8 chip, u8 reg);
11419+extern s32 pxa_pwr_i2c_reg_write(u8 chip, u8 reg, u8 val);
11420+
11421+#endif /* __PXA_PWR_I2C_H___ */
11422diff --git a/include/linux/da9030.h b/include/linux/da9030.h
11423new file mode 100644
11424index 0000000..6eb89e2
11425--- /dev/null
11426+++ b/include/linux/da9030.h
11427@@ -0,0 +1,118 @@
11428+#ifndef _DA9030_H
11429+#define _DA9030_H
11430+
11431+/* DA9030 has 24 possible interrupts */
11432+#define DA9030_IRQ_COUNT 24
11433+
11434+/* EVENT A */
11435+#define DA9030_IRQ_ONKEY_EN 0
11436+#define DA9030_IRQ_PWREN1 1
11437+#define DA9030_IRQ_EXTON 2
11438+#define DA9030_IRQ_CHDET 3
11439+#define DA9030_IRQ_TBAT 4
11440+#define DA9030_IRQ_VBATMON 5
11441+#define DA9030_IRQ_VBATMONTXON 6
11442+#define DA9030_IRQ_CHIOVER 7
11443+
11444+/* EVENT B */
11445+#define DA9030_IRQ_TCTO 8
11446+#define DA9030_IRQ_CCTO 9
11447+#define DA9030_IRQ_ADC_READY 10
11448+#define DA9030_IRQ_VBUS_4_4 11
11449+#define DA9030_IRQ_VBUS_4_0 12
11450+#define DA9030_IRQ_SESSION_VALID 13
11451+#define DA9030_IRQ_SRP_DETECT 14
11452+#define DA9030_IRQ_WDOG_INTR 15
11453+
11454+/* EVENT C */
11455+#define DA9030_IRQ_LDO15 16
11456+#define DA9030_IRQ_LDO16 17
11457+#define DA9030_IRQ_LDO17 18
11458+#define DA9030_IRQ_LDO18 19
11459+#define DA9030_IRQ_LDO19 20
11460+#define DA9030_IRQ_BUCK2 21
11461+#define DA9030_IRQ_ADC_IN4 22
11462+#define DA9030_IRQ_ADC_IN5 23
11463+
11464+enum da9030_ldo_sleep_mode {
11465+ DA9030_LDO_SLEEP_KEEP = 0x0,
11466+ DA9030_LDO_SLEEP_SHUT_DOWN = 0x1,
11467+ DA9030_LDO_SLEEP_POWER_UP = 0x2,
11468+ DA9030_LDO_SLEEP_HIGH_Z = 0x3,
11469+};
11470+
11471+enum da9030_led_rate {
11472+ DA9030_LED_RATE_ON = 0x0,
11473+ DA9030_LED_RATE_0_52 = 0x1,
11474+ DA9030_LED_RATE_1_05 = 0x2,
11475+ DA9030_LED_RATE_2_1 = 0x3,
11476+};
11477+
11478+enum da9030_led_duty_cycle {
11479+ DA9030_LED_DUTY_1_16 = 0x0,
11480+ DA9030_LED_DUTY_1_8 = 0x1,
11481+ DA9030_LED_DUTY_1_4 = 0x2,
11482+ DA9030_LED_DUTY_1_2 = 0x3,
11483+};
11484+
11485+enum da9030_led_pwm_chop {
11486+ DA9030_LED_PWM_8_8 = 0x0,
11487+ DA9030_LED_PWM_7_8 = 0x1,
11488+ DA9030_LED_PWM_6_8 = 0x2,
11489+ DA9030_LED_PWM_5_8 = 0x3,
11490+ DA9030_LED_PWM_4_8 = 0x4,
11491+ DA9030_LED_PWM_3_8 = 0x5,
11492+ DA9030_LED_PWM_2_8 = 0x6,
11493+ DA9030_LED_PWM_1_8 = 0x7,
11494+};
11495+
11496+struct da9030_adc_res {
11497+ int vbat_res;
11498+ int vbatmin_res;
11499+ int vbatmintxon;
11500+ int ichmax_res;
11501+ int ichmin_res;
11502+ int ichaverage_res;
11503+ int vchmax_res;
11504+ int vchmin_res;
11505+ int tbat_res;
11506+ int adc_in4_res;
11507+ int adc_in5_res;
11508+};
11509+
11510+extern int da9030_get_status(void);
11511+extern int da9030_get_fault_log(void);
11512+
11513+extern void da9030_enable_adc(void);
11514+extern void da9030_read_adc(struct da9030_adc_res *adc);
11515+
11516+extern void da9030_set_wled(int on, unsigned int brightness);
11517+
11518+extern int da9030_set_led(int led, int on,
11519+ enum da9030_led_rate rate,
11520+ enum da9030_led_duty_cycle duty,
11521+ enum da9030_led_pwm_chop pwm_chop);
11522+
11523+extern int da9030_set_charger(int on, unsigned int mA, unsigned int mV);
11524+extern void da9030_get_charger(int *on, unsigned int *mA, unsigned int *mV);
11525+
11526+extern int da9030_set_ldo(int ldo, int on, unsigned int mV,
11527+ enum da9030_ldo_sleep_mode sleep_mode);
11528+extern int da9030_set_buck(int buck, int on, unsigned int mV, int flags);
11529+
11530+extern void da9030_set_thresholds(unsigned int tbathighp,
11531+ unsigned int tbathighn,
11532+ unsigned int tbatlow,
11533+ unsigned int vbatmon);
11534+
11535+extern int da9030_register_callback(int event,
11536+ void (*callback)(int event, void *data),
11537+ void *data);
11538+extern void da9030_unregister_callback(int event);
11539+
11540+/* Keep these for now, although they are unsafe. When I'll see what
11541+ other methods are needed from DA9030, I'll remove these */
11542+extern s32 da9030_get_reg(u32 reg);
11543+extern s32 da9030_set_reg(u32 reg, u8 val);
11544+
11545+#endif
11546diff --git a/include/linux/usb_gadget.h b/include/linux/usb_gadget.h
11547index 4f59b2a..792c568 100644
11548--- a/include/linux/usb_gadget.h
11549+++ b/include/linux/usb_gadget.h
11550@@ -397,10 +397,28 @@ usb_ep_fifo_flush (struct usb_ep *ep)
11551
11552 struct usb_gadget;
11553
11554+/**
11555+ * struct usb_endpoint_config - possible configurations of a given endpoint
11556+ * @config: the configuration number
11557+ * @interface: the interface number
11558+ * @altinterface: the altinterface number
11559+ *
11560+ * Used as an array to pass information about the possible configurations
11561+ * of a given endpoint to the bus controller.
11562+ */
11563+struct usb_endpoint_config {
11564+ u8 config;
11565+ u8 interface;
11566+ u8 altinterface;
11567+};
11568+
11569 /* the rest of the api to the controller hardware: device operations,
11570 * which don't involve endpoints (or i/o).
11571 */
11572 struct usb_gadget_ops {
11573+ struct usb_ep* (*ep_alloc)(struct usb_gadget *,
11574+ struct usb_endpoint_descriptor *,
11575+ struct usb_endpoint_config *, int);
11576 int (*get_frame)(struct usb_gadget *);
11577 int (*wakeup)(struct usb_gadget *);
11578 int (*set_selfpowered) (struct usb_gadget *, int is_selfpowered);
11579@@ -824,7 +842,10 @@ int usb_gadget_config_buf(const struct usb_config_descriptor *config,
11580 /* utility wrapping a simple endpoint selection policy */
11581
11582 extern struct usb_ep *usb_ep_autoconfig (struct usb_gadget *,
11583- struct usb_endpoint_descriptor *) __devinit;
11584+ struct usb_endpoint_descriptor *,
11585+ struct usb_endpoint_config *,
11586+ int numconfigs
11587+);
11588
11589 extern void usb_ep_autoconfig_reset (struct usb_gadget *) __devinit;
11590
11591diff --git a/include/linux/wm97xx.h b/include/linux/wm97xx.h
11592new file mode 100644
11593index 0000000..354e533
11594--- /dev/null
11595+++ b/include/linux/wm97xx.h
11596@@ -0,0 +1,291 @@
11597+
11598+/*
11599+ * Register bits and API for Wolfson WM97xx series of codecs
11600+ */
11601+
11602+#ifndef _LINUX_WM97XX_H
11603+#define _LINUX_WM97XX_H
11604+
11605+#include <sound/driver.h>
11606+#include <sound/core.h>
11607+#include <sound/pcm.h>
11608+#include <sound/ac97_codec.h>
11609+#include <sound/initval.h>
11610+#include <linux/types.h>
11611+#include <linux/list.h>
11612+#include <linux/input.h> /* Input device layer */
11613+
11614+/*
11615+ * WM97xx AC97 Touchscreen registers
11616+ */
11617+#define AC97_WM97XX_DIGITISER1 0x76
11618+#define AC97_WM97XX_DIGITISER2 0x78
11619+#define AC97_WM97XX_DIGITISER_RD 0x7a
11620+#define AC97_WM9713_DIG1 0x74
11621+#define AC97_WM9713_DIG2 AC97_WM97XX_DIGITISER1
11622+#define AC97_WM9713_DIG3 AC97_WM97XX_DIGITISER2
11623+
11624+/*
11625+ * WM97xx register bits
11626+ */
11627+#define WM97XX_POLL 0x8000 /* initiate a polling measurement */
11628+#define WM97XX_ADCSEL_X 0x1000 /* x coord measurement */
11629+#define WM97XX_ADCSEL_Y 0x2000 /* y coord measurement */
11630+#define WM97XX_ADCSEL_PRES 0x3000 /* pressure measurement */
11631+#define WM97XX_ADCSEL_MASK 0x7000
11632+#define WM97XX_COO 0x0800 /* enable coordinate mode */
11633+#define WM97XX_CTC 0x0400 /* enable continuous mode */
11634+#define WM97XX_CM_RATE_93 0x0000 /* 93.75Hz continuous rate */
11635+#define WM97XX_CM_RATE_187 0x0100 /* 187.5Hz continuous rate */
11636+#define WM97XX_CM_RATE_375 0x0200 /* 375Hz continuous rate */
11637+#define WM97XX_CM_RATE_750 0x0300 /* 750Hz continuous rate */
11638+#define WM97XX_CM_RATE_8K 0x00f0 /* 8kHz continuous rate */
11639+#define WM97XX_CM_RATE_12K 0x01f0 /* 12kHz continuous rate */
11640+#define WM97XX_CM_RATE_24K 0x02f0 /* 24kHz continuous rate */
11641+#define WM97XX_CM_RATE_48K 0x03f0 /* 48kHz continuous rate */
11642+#define WM97XX_CM_RATE_MASK 0x03f0
11643+#define WM97XX_RATE(i) (((i & 3) << 8) | ((i & 4) ? 0xf0 : 0))
11644+#define WM97XX_DELAY(i) ((i << 4) & 0x00f0) /* sample delay times */
11645+#define WM97XX_DELAY_MASK 0x00f0
11646+#define WM97XX_SLEN 0x0008 /* slot read back enable */
11647+#define WM97XX_SLT(i) ((i - 5) & 0x7) /* touchpanel slot selection (5-11) */
11648+#define WM97XX_SLT_MASK 0x0007
11649+#define WM97XX_PRP_DETW 0x4000 /* pen detect on, digitiser off, wake up */
11650+#define WM97XX_PRP_DET 0x8000 /* pen detect on, digitiser off, no wake up */
11651+#define WM97XX_PRP_DET_DIG 0xc000 /* pen detect on, digitiser on */
11652+#define WM97XX_RPR 0x2000 /* wake up on pen down */
11653+#define WM97XX_PEN_DOWN 0x8000 /* pen is down */
11654+#define WM97XX_ADCSRC_MASK 0x7000 /* ADC source mask */
11655+
11656+#define WM97XX_AUX_ID1 0x8001
11657+#define WM97XX_AUX_ID2 0x8002
11658+#define WM97XX_AUX_ID3 0x8003
11659+#define WM97XX_AUX_ID4 0x8004
11660+
11661+
11662+/* WM9712 Bits */
11663+#define WM9712_45W 0x1000 /* set for 5-wire touchscreen */
11664+#define WM9712_PDEN 0x0800 /* measure only when pen down */
11665+#define WM9712_WAIT 0x0200 /* wait until adc is read before next sample */
11666+#define WM9712_PIL 0x0100 /* current used for pressure measurement. set 400uA else 200uA */
11667+#define WM9712_MASK_HI 0x0040 /* hi on mask pin (47) stops conversions */
11668+#define WM9712_MASK_EDGE 0x0080 /* rising/falling edge on pin delays sample */
11669+#define WM9712_MASK_SYNC 0x00c0 /* rising/falling edge on mask initiates sample */
11670+#define WM9712_RPU(i) (i&0x3f) /* internal pull up on pen detect (64k / rpu) */
11671+#define WM9712_PD(i) (0x1 << i) /* power management */
11672+
11673+/* WM9712 Registers */
11674+#define AC97_WM9712_POWER 0x24
11675+#define AC97_WM9712_REV 0x58
11676+
11677+/* WM9705 Bits */
11678+#define WM9705_PDEN 0x1000 /* measure only when pen is down */
11679+#define WM9705_PINV 0x0800 /* inverts sense of pen down output */
11680+#define WM9705_BSEN 0x0400 /* BUSY flag enable, pin47 is 1 when busy */
11681+#define WM9705_BINV 0x0200 /* invert BUSY (pin47) output */
11682+#define WM9705_WAIT 0x0100 /* wait until adc is read before next sample */
11683+#define WM9705_PIL 0x0080 /* current used for pressure measurement. set 400uA else 200uA */
11684+#define WM9705_PHIZ 0x0040 /* set PHONE and PCBEEP inputs to high impedance */
11685+#define WM9705_MASK_HI 0x0010 /* hi on mask stops conversions */
11686+#define WM9705_MASK_EDGE 0x0020 /* rising/falling edge on pin delays sample */
11687+#define WM9705_MASK_SYNC 0x0030 /* rising/falling edge on mask initiates sample */
11688+#define WM9705_PDD(i) (i & 0x000f) /* pen detect comparator threshold */
11689+
11690+
11691+/* WM9713 Bits */
11692+#define WM9713_PDPOL 0x0400 /* Pen down polarity */
11693+#define WM9713_POLL 0x0200 /* initiate a polling measurement */
11694+#define WM9713_CTC 0x0100 /* enable continuous mode */
11695+#define WM9713_ADCSEL_X 0x0002 /* X measurement */
11696+#define WM9713_ADCSEL_Y 0x0004 /* Y measurement */
11697+#define WM9713_ADCSEL_PRES 0x0008 /* Pressure measurement */
11698+#define WM9713_COO 0x0001 /* enable coordinate mode */
11699+#define WM9713_PDEN 0x0800 /* measure only when pen down */
11700+#define WM9713_ADCSEL_MASK 0x00fe /* ADC selection mask */
11701+#define WM9713_WAIT 0x0200 /* coordinate wait */
11702+
11703+/* AUX ADC ID's */
11704+#define TS_COMP1 0x0
11705+#define TS_COMP2 0x1
11706+#define TS_BMON 0x2
11707+#define TS_WIPER 0x3
11708+
11709+/* ID numbers */
11710+#define WM97XX_ID1 0x574d
11711+#define WM9712_ID2 0x4c12
11712+#define WM9705_ID2 0x4c05
11713+#define WM9713_ID2 0x4c13
11714+
11715+/* Codec GPIO's */
11716+#define WM97XX_MAX_GPIO 16
11717+#define WM97XX_GPIO_1 (1 << 1)
11718+#define WM97XX_GPIO_2 (1 << 2)
11719+#define WM97XX_GPIO_3 (1 << 3)
11720+#define WM97XX_GPIO_4 (1 << 4)
11721+#define WM97XX_GPIO_5 (1 << 5)
11722+#define WM97XX_GPIO_6 (1 << 6)
11723+#define WM97XX_GPIO_7 (1 << 7)
11724+#define WM97XX_GPIO_8 (1 << 8)
11725+#define WM97XX_GPIO_9 (1 << 9)
11726+#define WM97XX_GPIO_10 (1 << 10)
11727+#define WM97XX_GPIO_11 (1 << 11)
11728+#define WM97XX_GPIO_12 (1 << 12)
11729+#define WM97XX_GPIO_13 (1 << 13)
11730+#define WM97XX_GPIO_14 (1 << 14)
11731+#define WM97XX_GPIO_15 (1 << 15)
11732+
11733+
11734+#define AC97_LINK_FRAME 21 /* time in uS for AC97 link frame */
11735+
11736+
11737+/*---------------- Return codes from sample reading functions ---------------*/
11738+
11739+/* More data is available; call the sample gathering function again */
11740+#define RC_AGAIN 0x00000001
11741+/* The returned sample is valid */
11742+#define RC_VALID 0x00000002
11743+/* The pen is up (the first RC_VALID without RC_PENUP means pen is down) */
11744+#define RC_PENUP 0x00000004
11745+/* The pen is down (RC_VALID implies RC_PENDOWN, but sometimes it is helpful
11746+ to tell the handler that the pen is down but we don't know yet his coords,
11747+ so the handler should not sleep or wait for pendown irq) */
11748+#define RC_PENDOWN 0x00000008
11749+
11750+/* The wm97xx driver provides a private API for writing platform-specific
11751+ * drivers.
11752+ */
11753+
11754+/* The structure used to return arch specific sampled data into */
11755+struct wm97xx_data {
11756+ int x;
11757+ int y;
11758+ int p;
11759+};
11760+
11761+/* Codec GPIO status
11762+ */
11763+typedef enum {
11764+ WM97XX_GPIO_HIGH,
11765+ WM97XX_GPIO_LOW
11766+} wm97xx_gpio_status_t;
11767+
11768+/* Codec GPIO direction
11769+ */
11770+typedef enum {
11771+ WM97XX_GPIO_IN,
11772+ WM97XX_GPIO_OUT
11773+} wm97xx_gpio_dir_t;
11774+
11775+/* Codec GPIO polarity
11776+ */
11777+typedef enum {
11778+ WM97XX_GPIO_POL_HIGH,
11779+ WM97XX_GPIO_POL_LOW
11780+} wm97xx_gpio_pol_t;
11781+
11782+/* Codec GPIO sticky
11783+ */
11784+typedef enum {
11785+ WM97XX_GPIO_STICKY,
11786+ WM97XX_GPIO_NOTSTICKY
11787+} wm97xx_gpio_sticky_t;
11788+
11789+/* Codec GPIO wake
11790+ */
11791+typedef enum {
11792+ WM97XX_GPIO_WAKE,
11793+ WM97XX_GPIO_NOWAKE
11794+} wm97xx_gpio_wake_t;
11795+
11796+
11797+/*
11798+ * Digitiser ioctl commands
11799+ */
11800+#define WM97XX_DIG_START 0x1
11801+#define WM97XX_DIG_STOP 0x2
11802+#define WM97XX_PHY_INIT 0x3
11803+#define WM97XX_AUX_PREPARE 0x4
11804+#define WM97XX_DIG_RESTORE 0x5
11805+
11806+struct wm97xx;
11807+extern struct wm97xx_codec_drv wm97xx_codec;
11808+
11809+/*
11810+ * Codec driver interface - allows mapping to WM9705/12/13 and newer codecs
11811+ */
11812+struct wm97xx_codec_drv {
11813+ u16 id;
11814+ char *name;
11815+ int (*poll_sample) (struct wm97xx *, int adcsel, int *sample); /* read 1 sample */
11816+ int (*poll_touch) (struct wm97xx *, struct wm97xx_data *); /* read X,Y,[P] in poll */
11817+ int (*digitiser_ioctl) (struct wm97xx *, int cmd);
11818+ int (*acc_enable) (struct wm97xx *, int enable);
11819+};
11820+
11821+
11822+/* Machine specific and accelerated touch operations */
11823+struct wm97xx_mach_ops {
11824+
11825+ /* accelerated touch readback - coords are transmited on AC97 link */
11826+ int acc_enabled;
11827+ void (*acc_pen_up) (struct wm97xx *);
11828+ int (*acc_pen_down) (struct wm97xx *);
11829+ int (*acc_startup) (struct wm97xx *);
11830+ void (*acc_shutdown) (struct wm97xx *);
11831+
11832+ /* pre and post sample - can be used to minimise any analog noise */
11833+ void (*pre_sample) (int); /* function to run before sampling */
11834+ void (*post_sample) (int); /* function to run after sampling */
11835+};
11836+
11837+struct wm97xx {
11838+ u16 dig[3], id, gpio[6], misc; /* Cached codec registers */
11839+ u16 dig_save[3]; /* saved during aux reading */
11840+ struct wm97xx_codec_drv *codec; /* attached codec driver*/
11841+ struct input_dev* input_dev; /* touchscreen input device */
11842+ struct snd_ac97 *ac97; /* ALSA codec access */
11843+ struct device *dev; /* ALSA device */
11844+ struct device *battery_dev;
11845+ struct device *touch_dev;
11846+ struct wm97xx_mach_ops *mach_ops;
11847+ struct mutex codec_mutex;
11848+ struct completion ts_init;
11849+ struct completion ts_exit;
11850+ struct task_struct *ts_task;
11851+ unsigned int pen_irq; /* Pen IRQ number in use */
11852+ wait_queue_head_t pen_irq_wait; /* Pen IRQ wait queue */
11853+ struct workqueue_struct *pen_irq_workq;
11854+ struct work_struct pen_event_work;
11855+ u16 acc_slot; /* AC97 slot used for acc touch data */
11856+ u16 acc_rate; /* acc touch data rate */
11857+ unsigned int ts_use_count;
11858+ unsigned pen_is_down:1; /* Pen is down */
11859+ unsigned aux_waiting:1; /* aux measurement waiting */
11860+ unsigned pen_probably_down:1; /* used in polling mode */
11861+};
11862+
11863+/* Codec GPIO access (not supported on WM9705)
11864+ * This can be used to set/get codec GPIO and Virtual GPIO status.
11865+ */
11866+wm97xx_gpio_status_t wm97xx_get_gpio(struct wm97xx *wm, u32 gpio);
11867+void wm97xx_set_gpio(struct wm97xx *wm, u32 gpio,
11868+ wm97xx_gpio_status_t status);
11869+void wm97xx_config_gpio(struct wm97xx *wm, u32 gpio,
11870+ wm97xx_gpio_dir_t dir,
11871+ wm97xx_gpio_pol_t pol,
11872+ wm97xx_gpio_sticky_t sticky,
11873+ wm97xx_gpio_wake_t wake);
11874+
11875+/* codec AC97 IO access */
11876+int wm97xx_reg_read(struct wm97xx *wm, u16 reg);
11877+void wm97xx_reg_write(struct wm97xx *wm, u16 reg, u16 val);
11878+
11879+/* aux adc readback */
11880+int wm97xx_read_aux_adc(struct wm97xx *wm, u16 adcsel);
11881+
11882+/* machine ops */
11883+int wm97xx_register_mach_ops(struct wm97xx *, struct wm97xx_mach_ops *);
11884+void wm97xx_unregister_mach_ops(struct wm97xx *);
11885+
11886+extern struct bus_type wm97xx_bus_type;
11887+#endif
11888diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig
11889index a83e229..89b5730 100644
11890--- a/sound/soc/pxa/Kconfig
11891+++ b/sound/soc/pxa/Kconfig
11892@@ -53,3 +53,12 @@ config SND_PXA2XX_SOC_TOSA
11893 help
11894 Say Y if you want to add support for SoC audio on Sharp
11895 Zaurus SL-C6000x models (Tosa).
11896+
11897+config SND_PXA2XX_SOC_EM_X270
11898+ tristate "SoC Audio support for CompuLab EM-x270"
11899+ depends on SND_PXA2XX_SOC && MACH_EM_X270
11900+ select SND_PXA2XX_SOC_AC97
11901+ select SND_SOC_WM9712
11902+ help
11903+ Say Y if you want to add support for SoC audio on
11904+ CompuLab EM-x270.
11905diff --git a/sound/soc/pxa/Makefile b/sound/soc/pxa/Makefile
11906index 78e0d6b..32375ac 100644
11907--- a/sound/soc/pxa/Makefile
11908+++ b/sound/soc/pxa/Makefile
11909@@ -12,9 +12,11 @@ snd-soc-corgi-objs := corgi.o
11910 snd-soc-poodle-objs := poodle.o
11911 snd-soc-tosa-objs := tosa.o
11912 snd-soc-spitz-objs := spitz.o
11913+snd-soc-em-x270-objs := em-x270.o
11914
11915 obj-$(CONFIG_SND_PXA2XX_SOC_CORGI) += snd-soc-corgi.o
11916 obj-$(CONFIG_SND_PXA2XX_SOC_POODLE) += snd-soc-poodle.o
11917 obj-$(CONFIG_SND_PXA2XX_SOC_TOSA) += snd-soc-tosa.o
11918 obj-$(CONFIG_SND_PXA2XX_SOC_SPITZ) += snd-soc-spitz.o
11919+obj-$(CONFIG_SND_PXA2XX_SOC_EM_X270) += snd-soc-em-x270.o
11920
11921diff --git a/sound/soc/pxa/em-x270.c b/sound/soc/pxa/em-x270.c
11922new file mode 100644
11923index 0000000..9e891d0
11924--- /dev/null
11925+++ b/sound/soc/pxa/em-x270.c
11926@@ -0,0 +1,137 @@
11927+/*
11928+ * em-x270.c -- SoC audio for EM-X270
11929+ *
11930+ * Copyright 2007 CompuLab, Ltd.
11931+ *
11932+ * Author: Mike Rapoport <mike@compulab.co.il>
11933+ *
11934+ * Copied from tosa.c:
11935+ * Copyright 2005 Wolfson Microelectronics PLC.
11936+ * Copyright 2005 Openedhand Ltd.
11937+ *
11938+ * Authors: Liam Girdwood <liam.girdwood@wolfsonmicro.com>
11939+ * Richard Purdie <richard@openedhand.com>
11940+ *
11941+ * This program is free software; you can redistribute it and/or modify it
11942+ * under the terms of the GNU General Public License as published by the
11943+ * Free Software Foundation; either version 2 of the License, or (at your
11944+ * option) any later version.
11945+ *
11946+ */
11947+
11948+#include <linux/module.h>
11949+#include <linux/moduleparam.h>
11950+#include <linux/device.h>
11951+
11952+#include <sound/driver.h>
11953+#include <sound/core.h>
11954+#include <sound/pcm.h>
11955+#include <sound/soc.h>
11956+#include <sound/soc-dapm.h>
11957+
11958+#include <asm/mach-types.h>
11959+#include <asm/arch/pxa-regs.h>
11960+#include <asm/arch/hardware.h>
11961+#include <asm/arch/audio.h>
11962+
11963+#include "../codecs/wm9712.h"
11964+#include "pxa2xx-pcm.h"
11965+#include "pxa2xx-ac97.h"
11966+
11967+static struct snd_soc_machine em_x270;
11968+
11969+#define EM_X270_HP 0
11970+#define EM_X270_MIC_INT 1
11971+#define EM_X270_HEADSET 2
11972+#define EM_X270_HP_OFF 3
11973+#define EM_X270_SPK_ON 0
11974+#define EM_X270_SPK_OFF 1
11975+
11976+
11977+static struct snd_soc_ops em_x270_ops = {
11978+};
11979+
11980+static const struct snd_kcontrol_new em_x270_controls[] = {
11981+};
11982+
11983+static int em_x270_ac97_init(struct snd_soc_codec *codec)
11984+{
11985+ int i, err;
11986+
11987+ /* add em_x270 specific controls */
11988+ for (i = 0; i < ARRAY_SIZE(em_x270_controls); i++) {
11989+ err = snd_ctl_add(codec->card,
11990+ snd_soc_cnew(&em_x270_controls[i],codec, NULL));
11991+ if (err < 0)
11992+ return err;
11993+ }
11994+
11995+ snd_soc_dapm_sync_endpoints(codec);
11996+ return 0;
11997+}
11998+
11999+static struct snd_soc_dai_link em_x270_dai[] = {
12000+ {
12001+ .name = "AC97",
12002+ .stream_name = "AC97 HiFi",
12003+ .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_HIFI],
12004+ .codec_dai = &wm9712_dai[WM9712_DAI_AC97_HIFI],
12005+ .init = em_x270_ac97_init,
12006+ .ops = &em_x270_ops,
12007+ },
12008+ {
12009+ .name = "AC97 Aux",
12010+ .stream_name = "AC97 Aux",
12011+ .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_AUX],
12012+ .codec_dai = &wm9712_dai[WM9712_DAI_AC97_AUX],
12013+ .ops = &em_x270_ops,
12014+ },
12015+};
12016+
12017+static struct snd_soc_machine em_x270 = {
12018+ .name = "EM-X270",
12019+ .dai_link = em_x270_dai,
12020+ .num_links = ARRAY_SIZE(em_x270_dai),
12021+};
12022+
12023+static struct snd_soc_device em_x270_snd_devdata = {
12024+ .machine = &em_x270,
12025+ .platform = &pxa2xx_soc_platform,
12026+ .codec_dev = &soc_codec_dev_wm9712,
12027+};
12028+
12029+static struct platform_device *em_x270_snd_device;
12030+
12031+static int __init em_x270_init(void)
12032+{
12033+ int ret;
12034+
12035+ if (!machine_is_em_x270())
12036+ return -ENODEV;
12037+
12038+ em_x270_snd_device = platform_device_alloc("soc-audio", -1);
12039+ if (!em_x270_snd_device)
12040+ return -ENOMEM;
12041+
12042+ platform_set_drvdata(em_x270_snd_device, &em_x270_snd_devdata);
12043+ em_x270_snd_devdata.dev = &em_x270_snd_device->dev;
12044+ ret = platform_device_add(em_x270_snd_device);
12045+
12046+ if (ret)
12047+ platform_device_put(em_x270_snd_device);
12048+
12049+ return ret;
12050+}
12051+
12052+static void __exit em_x270_exit(void)
12053+{
12054+ platform_device_unregister(em_x270_snd_device);
12055+}
12056+
12057+module_init(em_x270_init);
12058+module_exit(em_x270_exit);
12059+
12060+/* Module information */
12061+MODULE_AUTHOR("Mike Rapoport");
12062+MODULE_DESCRIPTION("ALSA SoC EM-X270");
12063+MODULE_LICENSE("GPL");
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-04-27 09:43:06 +0000