diff options
Diffstat (limited to 'meta/recipes-devtools/qemu/qemu/CVE-2020-13791.patch')
-rw-r--r-- | meta/recipes-devtools/qemu/qemu/CVE-2020-13791.patch | 53 |
1 files changed, 0 insertions, 53 deletions
diff --git a/meta/recipes-devtools/qemu/qemu/CVE-2020-13791.patch b/meta/recipes-devtools/qemu/qemu/CVE-2020-13791.patch deleted file mode 100644 index 049dab914d..0000000000 --- a/meta/recipes-devtools/qemu/qemu/CVE-2020-13791.patch +++ /dev/null | |||
@@ -1,53 +0,0 @@ | |||
1 | From f7d6a635fa3b7797f9d072e280f065bf3cfcd24d Mon Sep 17 00:00:00 2001 | ||
2 | From: Prasad J Pandit <pjp@fedoraproject.org> | ||
3 | Date: Thu, 4 Jun 2020 17:05:25 +0530 | ||
4 | Subject: [PATCH] pci: assert configuration access is within bounds | ||
5 | MIME-Version: 1.0 | ||
6 | Content-Type: text/plain; charset=UTF-8 | ||
7 | Content-Transfer-Encoding: 8bit | ||
8 | |||
9 | While accessing PCI configuration bytes, assert that | ||
10 | 'address + len' is within PCI configuration space. | ||
11 | |||
12 | Generally it is within bounds. This is more of a defensive | ||
13 | assert, in case a buggy device was to send 'address' which | ||
14 | may go out of bounds. | ||
15 | |||
16 | Suggested-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
17 | Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> | ||
18 | Message-Id: <20200604113525.58898-1-ppandit@redhat.com> | ||
19 | Reviewed-by: Michael S. Tsirkin <mst@redhat.com> | ||
20 | Signed-off-by: Michael S. Tsirkin <mst@redhat.com> | ||
21 | |||
22 | Upstream-Status: Backport [f7d6a635fa3b7797f9d072e280f065bf3cfcd24d] | ||
23 | CVE: CVE-2020-13791 | ||
24 | Signed-off-by: Sakib Sajal <sakib.sajal@windriver.com> | ||
25 | --- | ||
26 | hw/pci/pci.c | 4 ++++ | ||
27 | 1 file changed, 4 insertions(+) | ||
28 | |||
29 | diff --git a/hw/pci/pci.c b/hw/pci/pci.c | ||
30 | index 70c66965f5..7bf2ae6d92 100644 | ||
31 | --- a/hw/pci/pci.c | ||
32 | +++ b/hw/pci/pci.c | ||
33 | @@ -1381,6 +1381,8 @@ uint32_t pci_default_read_config(PCIDevice *d, | ||
34 | { | ||
35 | uint32_t val = 0; | ||
36 | |||
37 | + assert(address + len <= pci_config_size(d)); | ||
38 | + | ||
39 | if (pci_is_express_downstream_port(d) && | ||
40 | ranges_overlap(address, len, d->exp.exp_cap + PCI_EXP_LNKSTA, 2)) { | ||
41 | pcie_sync_bridge_lnk(d); | ||
42 | @@ -1394,6 +1396,8 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val_in, int | ||
43 | int i, was_irq_disabled = pci_irq_disabled(d); | ||
44 | uint32_t val = val_in; | ||
45 | |||
46 | + assert(addr + l <= pci_config_size(d)); | ||
47 | + | ||
48 | for (i = 0; i < l; val >>= 8, ++i) { | ||
49 | uint8_t wmask = d->wmask[addr + i]; | ||
50 | uint8_t w1cmask = d->w1cmask[addr + i]; | ||
51 | -- | ||
52 | 2.20.1 | ||
53 | |||