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-rw-r--r--meta/recipes-devtools/qemu/qemu/CVE-2020-13754-3.patch65
1 files changed, 65 insertions, 0 deletions
diff --git a/meta/recipes-devtools/qemu/qemu/CVE-2020-13754-3.patch b/meta/recipes-devtools/qemu/qemu/CVE-2020-13754-3.patch
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1From 8e67fda2dd6202ccec093fda561107ba14830a17 Mon Sep 17 00:00:00 2001
2From: Laurent Vivier <lvivier@redhat.com>
3Date: Tue, 21 Jul 2020 10:33:22 +0200
4Subject: [PATCH] xhci: fix valid.max_access_size to access address registers
5MIME-Version: 1.0
6Content-Type: text/plain; charset=utf8
7Content-Transfer-Encoding: 8bit
8
9QEMU XHCI advertises AC64 (64-bit addressing) but doesn't allow
1064-bit mode access in "runtime" and "operational" MemoryRegionOps.
11
12Set the max_access_size based on sizeof(dma_addr_t) as AC64 is set.
13
14XHCI specs:
15"If the xHC supports 64-bit addressing (AC64 = â1â), then software
16should write 64-bit registers using only Qword accesses. If a
17system is incapable of issuing Qword accesses, then writes to the
1864-bit address fields shall be performed using 2 Dword accesses;
19low Dword-first, high-Dword second. If the xHC supports 32-bit
20addressing (AC64 = â0â), then the high Dword of registers containing
2164-bit address fields are unused and software should write addresses
22using only Dword accesses"
23
24The problem has been detected with SLOF, as linux kernel always accesses
25registers using 32-bit access even if AC64 is set and revealed by
265d971f9e6725 ("memory: Revert "memory: accept mismatching sizes in memory_region_access_valid"")
27
28Suggested-by: Alexey Kardashevskiy <aik@au1.ibm.com>
29Signed-off-by: Laurent Vivier <lvivier@redhat.com>
30Message-id: 20200721083322.90651-1-lvivier@redhat.com
31Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
32
33https://git.qemu.org/?p=qemu.git;a=patch;h=8e67fda2dd6202ccec093fda561107ba14830a17
34CVE: CVE-2020-13754
35Upstream-Status: Backport
36Signed-off-by: Chee Yang Lee <chee.yang.lee@intel.com>
37---
38 hw/usb/hcd-xhci.c | 4 ++--
39 1 file changed, 2 insertions(+), 2 deletions(-)
40
41diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c
42index b330e36..67a18fe 100644
43--- a/hw/usb/hcd-xhci.c
44+++ b/hw/usb/hcd-xhci.c
45@@ -3184,7 +3184,7 @@ static const MemoryRegionOps xhci_oper_ops = {
46 .read = xhci_oper_read,
47 .write = xhci_oper_write,
48 .valid.min_access_size = 4,
49- .valid.max_access_size = 4,
50+ .valid.max_access_size = sizeof(dma_addr_t),
51 .endianness = DEVICE_LITTLE_ENDIAN,
52 };
53
54@@ -3200,7 +3200,7 @@ static const MemoryRegionOps xhci_runtime_ops = {
55 .read = xhci_runtime_read,
56 .write = xhci_runtime_write,
57 .valid.min_access_size = 4,
58- .valid.max_access_size = 4,
59+ .valid.max_access_size = sizeof(dma_addr_t),
60 .endianness = DEVICE_LITTLE_ENDIAN,
61 };
62
63--
641.8.3.1
65