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-rw-r--r--meta/recipes-devtools/qemu/qemu-0.12.4/arm_timer-reload-timer-when-enabled.patch40
1 files changed, 0 insertions, 40 deletions
diff --git a/meta/recipes-devtools/qemu/qemu-0.12.4/arm_timer-reload-timer-when-enabled.patch b/meta/recipes-devtools/qemu/qemu-0.12.4/arm_timer-reload-timer-when-enabled.patch
deleted file mode 100644
index 1890e21e60..0000000000
--- a/meta/recipes-devtools/qemu/qemu-0.12.4/arm_timer-reload-timer-when-enabled.patch
+++ /dev/null
@@ -1,40 +0,0 @@
1From d6759902cb467c002086853d2eb38fb969c29f7f Mon Sep 17 00:00:00 2001
2From: Rabin Vincent <rabin@rab.in>
3Date: Sun, 2 May 2010 15:20:51 +0530
4Subject: [PATCH] arm_timer: reload timer when enabled
5
6commit id: d6759902cb467c002086853d2eb38fb969c29f7f in git://git.sv.gnu.org/qemu.git
7
8Reload the timer when TimerControl is written, if the timer is to be
9enabled. Otherwise, if an earlier write to TimerLoad was done while
10periodic mode was not set, s->delta may incorrectly still have the value
11of the maximum limit instead of the value written to TimerLoad.
12
13This problem is evident on versatileap on current linux-next, which
14enables TIMER_CTRL_32BIT before writing to TimerLoad and then enabling
15periodic mode and starting the timer. This causes the first periodic
16tick to be scheduled to occur after 0xffffffff periods, leading to a
17perceived hang while the kernel waits for the first timer tick.
18
19Signed-off-by: Rabin Vincent <rabin@rab.in>
20Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
21---
22 hw/arm_timer.c | 2 +-
23 1 files changed, 1 insertions(+), 1 deletions(-)
24
25diff --git a/hw/arm_timer.c b/hw/arm_timer.c
26index 9fef191..5b6947a 100644
27--- a/hw/arm_timer.c
28+++ b/hw/arm_timer.c
29@@ -113,7 +113,7 @@ static void arm_timer_write(void *opaque, target_phys_addr_t offset,
30 case 1: freq >>= 4; break;
31 case 2: freq >>= 8; break;
32 }
33- arm_timer_recalibrate(s, 0);
34+ arm_timer_recalibrate(s, s->control & TIMER_CTRL_ENABLE);
35 ptimer_set_freq(s->timer, freq);
36 if (s->control & TIMER_CTRL_ENABLE) {
37 /* Restart the timer if still enabled. */
38--
391.6.5.2
40