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Diffstat (limited to 'meta/recipes-devtools/gcc/gcc-9.3/0001-aarch64-New-Straight-Line-Speculation-SLS-mitigation.patch')
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diff --git a/meta/recipes-devtools/gcc/gcc-9.3/0001-aarch64-New-Straight-Line-Speculation-SLS-mitigation.patch b/meta/recipes-devtools/gcc/gcc-9.3/0001-aarch64-New-Straight-Line-Speculation-SLS-mitigation.patch deleted file mode 100644 index a7e29f4bd7..0000000000 --- a/meta/recipes-devtools/gcc/gcc-9.3/0001-aarch64-New-Straight-Line-Speculation-SLS-mitigation.patch +++ /dev/null | |||
@@ -1,204 +0,0 @@ | |||
1 | CVE: CVE-2020-13844 | ||
2 | Upstream-Status: Backport | ||
3 | Signed-off-by: Ross Burton <ross.burton@arm.com> | ||
4 | |||
5 | From 20da13e395bde597d8337167c712039c8f923c3b Mon Sep 17 00:00:00 2001 | ||
6 | From: Matthew Malcomson <matthew.malcomson@arm.com> | ||
7 | Date: Thu, 9 Jul 2020 09:11:58 +0100 | ||
8 | Subject: [PATCH 1/3] aarch64: New Straight Line Speculation (SLS) mitigation | ||
9 | flags | ||
10 | |||
11 | Here we introduce the flags that will be used for straight line speculation. | ||
12 | |||
13 | The new flag introduced is `-mharden-sls=`. | ||
14 | This flag can take arguments of `none`, `all`, or a comma seperated list | ||
15 | of one or more of `retbr` or `blr`. | ||
16 | `none` indicates no special mitigation of the straight line speculation | ||
17 | vulnerability. | ||
18 | `all` requests all mitigations currently implemented. | ||
19 | `retbr` requests that the RET and BR instructions have a speculation | ||
20 | barrier inserted after them. | ||
21 | `blr` requests that BLR instructions are replaced by a BL to a function | ||
22 | stub using a BR with a speculation barrier after it. | ||
23 | |||
24 | Setting this on a per-function basis using attributes or the like is not | ||
25 | enabled, but may be in the future. | ||
26 | |||
27 | (cherry picked from commit a9ba2a9b77bec7eacaf066801f22d1c366a2bc86) | ||
28 | |||
29 | gcc/ChangeLog: | ||
30 | |||
31 | 2020-06-02 Matthew Malcomson <matthew.malcomson@arm.com> | ||
32 | |||
33 | * config/aarch64/aarch64-protos.h (aarch64_harden_sls_retbr_p): | ||
34 | New. | ||
35 | (aarch64_harden_sls_blr_p): New. | ||
36 | * config/aarch64/aarch64.c (enum aarch64_sls_hardening_type): | ||
37 | New. | ||
38 | (aarch64_harden_sls_retbr_p): New. | ||
39 | (aarch64_harden_sls_blr_p): New. | ||
40 | (aarch64_validate_sls_mitigation): New. | ||
41 | (aarch64_override_options): Parse options for SLS mitigation. | ||
42 | * config/aarch64/aarch64.opt (-mharden-sls): New option. | ||
43 | * doc/invoke.texi: Document new option. | ||
44 | --- | ||
45 | gcc/config/aarch64/aarch64-protos.h | 3 ++ | ||
46 | gcc/config/aarch64/aarch64.c | 76 +++++++++++++++++++++++++++++ | ||
47 | gcc/config/aarch64/aarch64.opt | 4 ++ | ||
48 | gcc/doc/invoke.texi | 12 +++++ | ||
49 | 4 files changed, 95 insertions(+) | ||
50 | |||
51 | diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h | ||
52 | index c083cad53..31493f412 100644 | ||
53 | --- a/gcc/config/aarch64/aarch64-protos.h | ||
54 | +++ b/gcc/config/aarch64/aarch64-protos.h | ||
55 | @@ -644,4 +644,7 @@ poly_uint64 aarch64_regmode_natural_size (machine_mode); | ||
56 | |||
57 | bool aarch64_high_bits_all_ones_p (HOST_WIDE_INT); | ||
58 | |||
59 | +extern bool aarch64_harden_sls_retbr_p (void); | ||
60 | +extern bool aarch64_harden_sls_blr_p (void); | ||
61 | + | ||
62 | #endif /* GCC_AARCH64_PROTOS_H */ | ||
63 | diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c | ||
64 | index b452a53af..269ff6c92 100644 | ||
65 | --- a/gcc/config/aarch64/aarch64.c | ||
66 | +++ b/gcc/config/aarch64/aarch64.c | ||
67 | @@ -11734,6 +11734,79 @@ aarch64_validate_mcpu (const char *str, const struct processor **res, | ||
68 | return false; | ||
69 | } | ||
70 | |||
71 | +/* Straight line speculation indicators. */ | ||
72 | +enum aarch64_sls_hardening_type | ||
73 | +{ | ||
74 | + SLS_NONE = 0, | ||
75 | + SLS_RETBR = 1, | ||
76 | + SLS_BLR = 2, | ||
77 | + SLS_ALL = 3, | ||
78 | +}; | ||
79 | +static enum aarch64_sls_hardening_type aarch64_sls_hardening; | ||
80 | + | ||
81 | +/* Return whether we should mitigatate Straight Line Speculation for the RET | ||
82 | + and BR instructions. */ | ||
83 | +bool | ||
84 | +aarch64_harden_sls_retbr_p (void) | ||
85 | +{ | ||
86 | + return aarch64_sls_hardening & SLS_RETBR; | ||
87 | +} | ||
88 | + | ||
89 | +/* Return whether we should mitigatate Straight Line Speculation for the BLR | ||
90 | + instruction. */ | ||
91 | +bool | ||
92 | +aarch64_harden_sls_blr_p (void) | ||
93 | +{ | ||
94 | + return aarch64_sls_hardening & SLS_BLR; | ||
95 | +} | ||
96 | + | ||
97 | +/* As of yet we only allow setting these options globally, in the future we may | ||
98 | + allow setting them per function. */ | ||
99 | +static void | ||
100 | +aarch64_validate_sls_mitigation (const char *const_str) | ||
101 | +{ | ||
102 | + char *token_save = NULL; | ||
103 | + char *str = NULL; | ||
104 | + | ||
105 | + if (strcmp (const_str, "none") == 0) | ||
106 | + { | ||
107 | + aarch64_sls_hardening = SLS_NONE; | ||
108 | + return; | ||
109 | + } | ||
110 | + if (strcmp (const_str, "all") == 0) | ||
111 | + { | ||
112 | + aarch64_sls_hardening = SLS_ALL; | ||
113 | + return; | ||
114 | + } | ||
115 | + | ||
116 | + char *str_root = xstrdup (const_str); | ||
117 | + str = strtok_r (str_root, ",", &token_save); | ||
118 | + if (!str) | ||
119 | + error ("invalid argument given to %<-mharden-sls=%>"); | ||
120 | + | ||
121 | + int temp = SLS_NONE; | ||
122 | + while (str) | ||
123 | + { | ||
124 | + if (strcmp (str, "blr") == 0) | ||
125 | + temp |= SLS_BLR; | ||
126 | + else if (strcmp (str, "retbr") == 0) | ||
127 | + temp |= SLS_RETBR; | ||
128 | + else if (strcmp (str, "none") == 0 || strcmp (str, "all") == 0) | ||
129 | + { | ||
130 | + error ("%<%s%> must be by itself for %<-mharden-sls=%>", str); | ||
131 | + break; | ||
132 | + } | ||
133 | + else | ||
134 | + { | ||
135 | + error ("invalid argument %<%s%> for %<-mharden-sls=%>", str); | ||
136 | + break; | ||
137 | + } | ||
138 | + str = strtok_r (NULL, ",", &token_save); | ||
139 | + } | ||
140 | + aarch64_sls_hardening = (aarch64_sls_hardening_type) temp; | ||
141 | + free (str_root); | ||
142 | +} | ||
143 | + | ||
144 | /* Parses CONST_STR for branch protection features specified in | ||
145 | aarch64_branch_protect_types, and set any global variables required. Returns | ||
146 | the parsing result and assigns LAST_STR to the last processed token from | ||
147 | @@ -11972,6 +12045,9 @@ aarch64_override_options (void) | ||
148 | selected_arch = NULL; | ||
149 | selected_tune = NULL; | ||
150 | |||
151 | + if (aarch64_harden_sls_string) | ||
152 | + aarch64_validate_sls_mitigation (aarch64_harden_sls_string); | ||
153 | + | ||
154 | if (aarch64_branch_protection_string) | ||
155 | aarch64_validate_mbranch_protection (aarch64_branch_protection_string); | ||
156 | |||
157 | diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt | ||
158 | index 3c6d1cc90..d27ab6df8 100644 | ||
159 | --- a/gcc/config/aarch64/aarch64.opt | ||
160 | +++ b/gcc/config/aarch64/aarch64.opt | ||
161 | @@ -71,6 +71,10 @@ mgeneral-regs-only | ||
162 | Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save | ||
163 | Generate code which uses only the general registers. | ||
164 | |||
165 | +mharden-sls= | ||
166 | +Target RejectNegative Joined Var(aarch64_harden_sls_string) | ||
167 | +Generate code to mitigate against straight line speculation. | ||
168 | + | ||
169 | mfix-cortex-a53-835769 | ||
170 | Target Report Var(aarch64_fix_a53_err835769) Init(2) Save | ||
171 | Workaround for ARM Cortex-A53 Erratum number 835769. | ||
172 | diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi | ||
173 | index 2f7ffe456..5f04a7d2b 100644 | ||
174 | --- a/gcc/doc/invoke.texi | ||
175 | +++ b/gcc/doc/invoke.texi | ||
176 | @@ -638,6 +638,7 @@ Objective-C and Objective-C++ Dialects}. | ||
177 | -mpc-relative-literal-loads @gol | ||
178 | -msign-return-address=@var{scope} @gol | ||
179 | -mbranch-protection=@var{none}|@var{standard}|@var{pac-ret}[+@var{leaf}]|@var{bti} @gol | ||
180 | +-mharden-sls=@var{opts} @gol | ||
181 | -march=@var{name} -mcpu=@var{name} -mtune=@var{name} @gol | ||
182 | -moverride=@var{string} -mverbose-cost-dump @gol | ||
183 | -mstack-protector-guard=@var{guard} -mstack-protector-guard-reg=@var{sysreg} @gol | ||
184 | @@ -15955,6 +15956,17 @@ argument @samp{leaf} can be used to extend the signing to include leaf | ||
185 | functions. | ||
186 | @samp{bti} turns on branch target identification mechanism. | ||
187 | |||
188 | +@item -mharden-sls=@var{opts} | ||
189 | +@opindex mharden-sls | ||
190 | +Enable compiler hardening against straight line speculation (SLS). | ||
191 | +@var{opts} is a comma-separated list of the following options: | ||
192 | +@table @samp | ||
193 | +@item retbr | ||
194 | +@item blr | ||
195 | +@end table | ||
196 | +In addition, @samp{-mharden-sls=all} enables all SLS hardening while | ||
197 | +@samp{-mharden-sls=none} disables all SLS hardening. | ||
198 | + | ||
199 | @item -msve-vector-bits=@var{bits} | ||
200 | @opindex msve-vector-bits | ||
201 | Specify the number of bits in an SVE vector register. This option only has | ||
202 | -- | ||
203 | 2.25.1 | ||
204 | |||