diff options
Diffstat (limited to 'meta/recipes-devtools/gcc/gcc-4.7/define_insn_reservation.patch')
-rw-r--r-- | meta/recipes-devtools/gcc/gcc-4.7/define_insn_reservation.patch | 118 |
1 files changed, 118 insertions, 0 deletions
diff --git a/meta/recipes-devtools/gcc/gcc-4.7/define_insn_reservation.patch b/meta/recipes-devtools/gcc/gcc-4.7/define_insn_reservation.patch new file mode 100644 index 0000000000..2b0ff677fe --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc-4.7/define_insn_reservation.patch | |||
@@ -0,0 +1,118 @@ | |||
1 | Upstream-Status: Backport | ||
2 | Signed-off-by: Khem Raj <raj.khem@gmail.com> | ||
3 | |||
4 | From aab806a131efe9706396692ecc67d324371e39bc Mon Sep 17 00:00:00 2001 | ||
5 | From: edmarwjr <edmarwjr@138bc75d-0d04-0410-961f-82ee72b054a4> | ||
6 | Date: Fri, 22 Jun 2012 20:13:23 +0000 | ||
7 | Subject: [PATCH] 2012-06-22 Edmar Wienskoski <edmar@freescale.com> | ||
8 | |||
9 | * config/rs6000/rs6000.md (define_attr "type"): New type popcnt. | ||
10 | (popcntb<mode>2): Add attribute type popcnt. | ||
11 | (popcntd<mode>2): Ditto. | ||
12 | * config/rs6000/power4.md (define_insn_reservation): Add type popcnt. | ||
13 | * config/rs6000/power5.md (define_insn_reservation): Ditto. | ||
14 | * config/rs6000/power7.md (define_insn_reservation): Ditto. | ||
15 | * config/rs6000/476.md (define_insn_reservation): Ditto. | ||
16 | * config/rs6000/power6.md (define_insn_reservation): New | ||
17 | reservation for popcnt instructions. | ||
18 | |||
19 | |||
20 | |||
21 | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@188901 138bc75d-0d04-0410-961f-82ee72b054a4 | ||
22 | --- | ||
23 | gcc/ChangeLog | 12 ++++++++++++ | ||
24 | gcc/config/rs6000/476.md | 2 +- | ||
25 | gcc/config/rs6000/power5.md | 2 +- | ||
26 | gcc/config/rs6000/power6.md | 5 +++++ | ||
27 | gcc/config/rs6000/power7.md | 2 +- | ||
28 | gcc/config/rs6000/rs6000.md | 10 +++++++--- | ||
29 | 6 files changed, 27 insertions(+), 6 deletions(-) | ||
30 | |||
31 | Index: gcc-4_7-branch/gcc/config/rs6000/476.md | ||
32 | =================================================================== | ||
33 | --- gcc-4_7-branch.orig/gcc/config/rs6000/476.md 2012-07-05 23:49:07.000000000 -0700 | ||
34 | +++ gcc-4_7-branch/gcc/config/rs6000/476.md 2012-07-06 19:50:30.078779999 -0700 | ||
35 | @@ -71,7 +71,7 @@ | ||
36 | ppc476_i_pipe|ppc476_lj_pipe") | ||
37 | |||
38 | (define_insn_reservation "ppc476-complex-integer" 1 | ||
39 | - (and (eq_attr "type" "cmp,cr_logical,delayed_cr,cntlz,isel,isync,sync,trap") | ||
40 | + (and (eq_attr "type" "cmp,cr_logical,delayed_cr,cntlz,isel,isync,sync,trap,popcnt") | ||
41 | (eq_attr "cpu" "ppc476")) | ||
42 | "ppc476_issue,\ | ||
43 | ppc476_i_pipe") | ||
44 | Index: gcc-4_7-branch/gcc/config/rs6000/power5.md | ||
45 | =================================================================== | ||
46 | --- gcc-4_7-branch.orig/gcc/config/rs6000/power5.md 2012-07-05 23:49:07.000000000 -0700 | ||
47 | +++ gcc-4_7-branch/gcc/config/rs6000/power5.md 2012-07-06 19:50:30.078779999 -0700 | ||
48 | @@ -142,7 +142,7 @@ | ||
49 | ; Integer latency is 2 cycles | ||
50 | (define_insn_reservation "power5-integer" 2 | ||
51 | (and (eq_attr "type" "integer,insert_dword,shift,trap,\ | ||
52 | - var_shift_rotate,cntlz,exts,isel") | ||
53 | + var_shift_rotate,cntlz,exts,isel,popcnt") | ||
54 | (eq_attr "cpu" "power5")) | ||
55 | "iq_power5") | ||
56 | |||
57 | Index: gcc-4_7-branch/gcc/config/rs6000/power6.md | ||
58 | =================================================================== | ||
59 | --- gcc-4_7-branch.orig/gcc/config/rs6000/power6.md 2012-07-05 23:49:07.000000000 -0700 | ||
60 | +++ gcc-4_7-branch/gcc/config/rs6000/power6.md 2012-07-06 19:50:30.078779999 -0700 | ||
61 | @@ -216,6 +216,11 @@ | ||
62 | (eq_attr "cpu" "power6")) | ||
63 | "FXU_power6") | ||
64 | |||
65 | +(define_insn_reservation "power6-popcnt" 1 | ||
66 | + (and (eq_attr "type" "popcnt") | ||
67 | + (eq_attr "cpu" "power6")) | ||
68 | + "FXU_power6") | ||
69 | + | ||
70 | (define_insn_reservation "power6-insert" 1 | ||
71 | (and (eq_attr "type" "insert_word") | ||
72 | (eq_attr "cpu" "power6")) | ||
73 | Index: gcc-4_7-branch/gcc/config/rs6000/power7.md | ||
74 | =================================================================== | ||
75 | --- gcc-4_7-branch.orig/gcc/config/rs6000/power7.md 2012-07-05 23:49:07.000000000 -0700 | ||
76 | +++ gcc-4_7-branch/gcc/config/rs6000/power7.md 2012-07-06 19:50:30.078779999 -0700 | ||
77 | @@ -150,7 +150,7 @@ | ||
78 | ; FX Unit | ||
79 | (define_insn_reservation "power7-integer" 1 | ||
80 | (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\ | ||
81 | - var_shift_rotate,exts,isel") | ||
82 | + var_shift_rotate,exts,isel,popcnt") | ||
83 | (eq_attr "cpu" "power7")) | ||
84 | "DU_power7,FXU_power7") | ||
85 | |||
86 | Index: gcc-4_7-branch/gcc/config/rs6000/rs6000.md | ||
87 | =================================================================== | ||
88 | --- gcc-4_7-branch.orig/gcc/config/rs6000/rs6000.md 2012-07-06 19:44:38.000000000 -0700 | ||
89 | +++ gcc-4_7-branch/gcc/config/rs6000/rs6000.md 2012-07-06 19:50:30.078779999 -0700 | ||
90 | @@ -144,7 +144,7 @@ | ||
91 | |||
92 | ;; Define an insn type attribute. This is used in function unit delay | ||
93 | ;; computations. | ||
94 | -(define_attr "type" "integer,two,three,load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,store,store_ux,store_u,fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,insert_word,branch,cmp,fast_compare,compare,var_delayed_compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mfcrf,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv,vecdouble,isync,sync,load_l,store_c,shift,trap,insert_dword,var_shift_rotate,cntlz,exts,mffgpr,mftgpr,isel" | ||
95 | +(define_attr "type" "integer,two,three,load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,store,store_ux,store_u,fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,insert_word,branch,cmp,fast_compare,compare,var_delayed_compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mfcrf,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv,vecdouble,isync,sync,load_l,store_c,shift,trap,insert_dword,var_shift_rotate,cntlz,exts,mffgpr,mftgpr,isel,popcnt" | ||
96 | (const_string "integer")) | ||
97 | |||
98 | ;; Define floating point instruction sub-types for use with Xfpu.md | ||
99 | @@ -2329,13 +2329,17 @@ | ||
100 | (unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")] | ||
101 | UNSPEC_POPCNTB))] | ||
102 | "TARGET_POPCNTB" | ||
103 | - "popcntb %0,%1") | ||
104 | + "popcntb %0,%1" | ||
105 | + [(set_attr "length" "4") | ||
106 | + (set_attr "type" "popcnt")]) | ||
107 | |||
108 | (define_insn "popcntd<mode>2" | ||
109 | [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") | ||
110 | (popcount:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")))] | ||
111 | "TARGET_POPCNTD" | ||
112 | - "popcnt<wd> %0,%1") | ||
113 | + "popcnt<wd> %0,%1" | ||
114 | + [(set_attr "length" "4") | ||
115 | + (set_attr "type" "popcnt")]) | ||
116 | |||
117 | (define_expand "popcount<mode>2" | ||
118 | [(set (match_operand:GPR 0 "gpc_reg_operand" "") | ||