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Diffstat (limited to 'meta/recipes-devtools/gcc/gcc-4.6.0/gcc-4_6-branch-backports/0306-PR-target-49104.patch')
-rw-r--r-- | meta/recipes-devtools/gcc/gcc-4.6.0/gcc-4_6-branch-backports/0306-PR-target-49104.patch | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/meta/recipes-devtools/gcc/gcc-4.6.0/gcc-4_6-branch-backports/0306-PR-target-49104.patch b/meta/recipes-devtools/gcc/gcc-4.6.0/gcc-4_6-branch-backports/0306-PR-target-49104.patch new file mode 100644 index 0000000000..b9ffa5798c --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc-4.6.0/gcc-4_6-branch-backports/0306-PR-target-49104.patch | |||
@@ -0,0 +1,63 @@ | |||
1 | From 19444be5c75a1e7bcc7f2490a3503947d4904b64 Mon Sep 17 00:00:00 2001 | ||
2 | From: uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | ||
3 | Date: Sun, 22 May 2011 19:14:50 +0000 | ||
4 | Subject: [PATCH] PR target/49104 | ||
5 | * config/i386/cpuid.h (bit_MMXEXT): New define. | ||
6 | |||
7 | libcpp/ChangeLog: | ||
8 | |||
9 | 2011-05-22 Uros Bizjak <ubizjak@gmail.com> | ||
10 | |||
11 | PR target/49104 | ||
12 | * lex.c (init_vectorized_lexer): Do not set "minimum" when __3dNOW_A__ | ||
13 | is defined. Check bit_MMXEXT and bit_CMOV to use search_line_mmx. | ||
14 | |||
15 | |||
16 | |||
17 | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_6-branch@174038 138bc75d-0d04-0410-961f-82ee72b054a4 | ||
18 | |||
19 | index e9d0fab..3c3f47b 100644 | ||
20 | --- a/gcc/config/i386/cpuid.h | ||
21 | +++ b/gcc/config/i386/cpuid.h | ||
22 | @@ -57,6 +57,7 @@ | ||
23 | #define bit_TBM (1 << 21) | ||
24 | |||
25 | /* %edx */ | ||
26 | +#define bit_MMXEXT (1 << 22) | ||
27 | #define bit_LM (1 << 29) | ||
28 | #define bit_3DNOWP (1 << 30) | ||
29 | #define bit_3DNOW (1 << 31) | ||
30 | index 3bf4886..6c3be71 100644 | ||
31 | --- a/libcpp/lex.c | ||
32 | +++ b/libcpp/lex.c | ||
33 | @@ -294,7 +294,7 @@ static const char repl_chars[4][16] __attribute__((aligned(16))) = { | ||
34 | /* A version of the fast scanner using MMX vectorized byte compare insns. | ||
35 | |||
36 | This uses the PMOVMSKB instruction which was introduced with "MMX2", | ||
37 | - which was packaged into SSE1; it is also present in the AMD 3dNOW-A | ||
38 | + which was packaged into SSE1; it is also present in the AMD MMX | ||
39 | extension. Mark the function as using "sse" so that we emit a real | ||
40 | "emms" instruction, rather than the 3dNOW "femms" instruction. */ | ||
41 | |||
42 | @@ -488,7 +488,7 @@ init_vectorized_lexer (void) | ||
43 | minimum = 3; | ||
44 | #elif defined(__SSE2__) | ||
45 | minimum = 2; | ||
46 | -#elif defined(__SSE__) || defined(__3dNOW_A__) | ||
47 | +#elif defined(__SSE__) | ||
48 | minimum = 1; | ||
49 | #endif | ||
50 | |||
51 | @@ -505,7 +505,8 @@ init_vectorized_lexer (void) | ||
52 | } | ||
53 | else if (__get_cpuid (0x80000001, &dummy, &dummy, &dummy, &edx)) | ||
54 | { | ||
55 | - if (minimum == 1 || edx & bit_3DNOWP) | ||
56 | + if (minimum == 1 | ||
57 | + || (edx & (bit_MMXEXT | bit_CMOV)) == (bit_MMXEXT | bit_CMOV)) | ||
58 | impl = search_line_mmx; | ||
59 | } | ||
60 | |||
61 | -- | ||
62 | 1.7.0.4 | ||
63 | |||