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-rw-r--r--meta/recipes-devtools/gcc/gcc-4.6.0/gcc-4_6-branch-backports/0249-Fix-PRs-48857-48495.patch216
1 files changed, 216 insertions, 0 deletions
diff --git a/meta/recipes-devtools/gcc/gcc-4.6.0/gcc-4_6-branch-backports/0249-Fix-PRs-48857-48495.patch b/meta/recipes-devtools/gcc/gcc-4.6.0/gcc-4_6-branch-backports/0249-Fix-PRs-48857-48495.patch
new file mode 100644
index 0000000000..3ce403368d
--- /dev/null
+++ b/meta/recipes-devtools/gcc/gcc-4.6.0/gcc-4_6-branch-backports/0249-Fix-PRs-48857-48495.patch
@@ -0,0 +1,216 @@
1From b23f5c480c106bc2d61b85263db9cb51d321dbc8 Mon Sep 17 00:00:00 2001
2From: meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4>
3Date: Tue, 10 May 2011 19:59:20 +0000
4Subject: [PATCH] Fix PRs 48857, 48495
5
6git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_6-branch@173634 138bc75d-0d04-0410-961f-82ee72b054a4
7
8index 5019347..898a87b 100644
9--- a/gcc/config/rs6000/rs6000.c
10+++ b/gcc/config/rs6000/rs6000.c
11@@ -7891,7 +7891,7 @@ rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode)
12
13 /* Nonzero if we can use an AltiVec register to pass this arg. */
14 #define USE_ALTIVEC_FOR_ARG_P(CUM,MODE,TYPE,NAMED) \
15- ((ALTIVEC_VECTOR_MODE (MODE) || VSX_VECTOR_MODE (MODE)) \
16+ (ALTIVEC_OR_VSX_VECTOR_MODE (MODE) \
17 && (CUM)->vregno <= ALTIVEC_ARG_MAX_REG \
18 && TARGET_ALTIVEC_ABI \
19 && (NAMED))
20@@ -8091,8 +8091,7 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype,
21 }
22 if (SCALAR_FLOAT_MODE_P (return_mode))
23 rs6000_passes_float = true;
24- else if (ALTIVEC_VECTOR_MODE (return_mode)
25- || VSX_VECTOR_MODE (return_mode)
26+ else if (ALTIVEC_OR_VSX_VECTOR_MODE (return_mode)
27 || SPE_VECTOR_MODE (return_mode))
28 rs6000_passes_vector = true;
29 }
30@@ -8190,7 +8189,7 @@ function_arg_padding (enum machine_mode mode, const_tree type)
31 existing library interfaces.
32
33 Doubleword align SPE vectors.
34- Quadword align Altivec vectors.
35+ Quadword align Altivec/VSX vectors.
36 Quadword align large synthetic vector types. */
37
38 static unsigned int
39@@ -8207,7 +8206,7 @@ rs6000_function_arg_boundary (enum machine_mode mode, const_tree type)
40 && int_size_in_bytes (type) >= 8
41 && int_size_in_bytes (type) < 16))
42 return 64;
43- else if ((ALTIVEC_VECTOR_MODE (mode) || VSX_VECTOR_MODE (mode))
44+ else if (ALTIVEC_OR_VSX_VECTOR_MODE (mode)
45 || (type && TREE_CODE (type) == VECTOR_TYPE
46 && int_size_in_bytes (type) >= 16))
47 return 128;
48@@ -8427,7 +8426,7 @@ rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, enum machine_mode mode,
49 {
50 if (SCALAR_FLOAT_MODE_P (mode))
51 rs6000_passes_float = true;
52- else if (named && (ALTIVEC_VECTOR_MODE (mode) || VSX_VECTOR_MODE (mode)))
53+ else if (named && ALTIVEC_OR_VSX_VECTOR_MODE (mode))
54 rs6000_passes_vector = true;
55 else if (SPE_VECTOR_MODE (mode)
56 && !cum->stdarg
57@@ -8437,8 +8436,7 @@ rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, enum machine_mode mode,
58 #endif
59
60 if (TARGET_ALTIVEC_ABI
61- && (ALTIVEC_VECTOR_MODE (mode)
62- || VSX_VECTOR_MODE (mode)
63+ && (ALTIVEC_OR_VSX_VECTOR_MODE (mode)
64 || (type && TREE_CODE (type) == VECTOR_TYPE
65 && int_size_in_bytes (type) == 16)))
66 {
67@@ -9056,8 +9054,7 @@ rs6000_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode,
68 else
69 return gen_rtx_REG (mode, cum->vregno);
70 else if (TARGET_ALTIVEC_ABI
71- && (ALTIVEC_VECTOR_MODE (mode)
72- || VSX_VECTOR_MODE (mode)
73+ && (ALTIVEC_OR_VSX_VECTOR_MODE (mode)
74 || (type && TREE_CODE (type) == VECTOR_TYPE
75 && int_size_in_bytes (type) == 16)))
76 {
77@@ -19983,7 +19980,7 @@ emit_frame_save (rtx frame_reg, rtx frame_ptr, enum machine_mode mode,
78
79 /* Some cases that need register indexed addressing. */
80 if ((TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (mode))
81- || (TARGET_VSX && VSX_VECTOR_MODE (mode))
82+ || (TARGET_VSX && ALTIVEC_OR_VSX_VECTOR_MODE (mode))
83 || (TARGET_E500_DOUBLE && mode == DFmode)
84 || (TARGET_SPE_ABI
85 && SPE_VECTOR_MODE (mode)
86@@ -27266,13 +27263,12 @@ rs6000_function_value (const_tree valtype,
87 else if (TREE_CODE (valtype) == COMPLEX_TYPE
88 && targetm.calls.split_complex_arg)
89 return rs6000_complex_function_value (mode);
90+ /* VSX is a superset of Altivec and adds V2DImode/V2DFmode. Since the same
91+ return register is used in both cases, and we won't see V2DImode/V2DFmode
92+ for pure altivec, combine the two cases. */
93 else if (TREE_CODE (valtype) == VECTOR_TYPE
94 && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI
95- && ALTIVEC_VECTOR_MODE (mode))
96- regno = ALTIVEC_ARG_RETURN;
97- else if (TREE_CODE (valtype) == VECTOR_TYPE
98- && TARGET_VSX && TARGET_ALTIVEC_ABI
99- && VSX_VECTOR_MODE (mode))
100+ && ALTIVEC_OR_VSX_VECTOR_MODE (mode))
101 regno = ALTIVEC_ARG_RETURN;
102 else if (TARGET_E500_DOUBLE && TARGET_HARD_FLOAT
103 && (mode == DFmode || mode == DCmode
104@@ -27312,12 +27308,12 @@ rs6000_libcall_value (enum machine_mode mode)
105 && TARGET_HARD_FLOAT && TARGET_FPRS
106 && ((TARGET_SINGLE_FLOAT && mode == SFmode) || TARGET_DOUBLE_FLOAT))
107 regno = FP_ARG_RETURN;
108- else if (ALTIVEC_VECTOR_MODE (mode)
109+ /* VSX is a superset of Altivec and adds V2DImode/V2DFmode. Since the same
110+ return register is used in both cases, and we won't see V2DImode/V2DFmode
111+ for pure altivec, combine the two cases. */
112+ else if (ALTIVEC_OR_VSX_VECTOR_MODE (mode)
113 && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI)
114 regno = ALTIVEC_ARG_RETURN;
115- else if (VSX_VECTOR_MODE (mode)
116- && TARGET_VSX && TARGET_ALTIVEC_ABI)
117- regno = ALTIVEC_ARG_RETURN;
118 else if (COMPLEX_MODE_P (mode) && targetm.calls.split_complex_arg)
119 return rs6000_complex_function_value (mode);
120 else if (TARGET_E500_DOUBLE && TARGET_HARD_FLOAT
121diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
122index 4913456..72b47ec 100644
123--- a/gcc/config/rs6000/rs6000.h
124+++ b/gcc/config/rs6000/rs6000.h
125@@ -1007,10 +1007,9 @@ extern unsigned rs6000_pointer_size;
126
127 /* When setting up caller-save slots (MODE == VOIDmode) ensure we allocate
128 enough space to account for vectors in FP regs. */
129-#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
130- (TARGET_VSX \
131- && ((MODE) == VOIDmode || VSX_VECTOR_MODE (MODE) \
132- || ALTIVEC_VECTOR_MODE (MODE)) \
133+#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
134+ (TARGET_VSX \
135+ && ((MODE) == VOIDmode || ALTIVEC_OR_VSX_VECTOR_MODE (MODE)) \
136 && FP_REGNO_P (REGNO) \
137 ? V2DFmode \
138 : choose_hard_reg_mode ((REGNO), (NREGS), false))
139@@ -1026,25 +1025,16 @@ extern unsigned rs6000_pointer_size;
140 ((MODE) == V4SFmode \
141 || (MODE) == V2DFmode) \
142
143-#define VSX_SCALAR_MODE(MODE) \
144- ((MODE) == DFmode)
145-
146-#define VSX_MODE(MODE) \
147- (VSX_VECTOR_MODE (MODE) \
148- || VSX_SCALAR_MODE (MODE))
149-
150-#define VSX_MOVE_MODE(MODE) \
151- (VSX_VECTOR_MODE (MODE) \
152- || VSX_SCALAR_MODE (MODE) \
153- || ALTIVEC_VECTOR_MODE (MODE) \
154- || (MODE) == TImode)
155-
156 #define ALTIVEC_VECTOR_MODE(MODE) \
157 ((MODE) == V16QImode \
158 || (MODE) == V8HImode \
159 || (MODE) == V4SFmode \
160 || (MODE) == V4SImode)
161
162+#define ALTIVEC_OR_VSX_VECTOR_MODE(MODE) \
163+ (ALTIVEC_VECTOR_MODE (MODE) || VSX_VECTOR_MODE (MODE) \
164+ || (MODE) == V2DImode)
165+
166 #define SPE_VECTOR_MODE(MODE) \
167 ((MODE) == V4HImode \
168 || (MODE) == V2SFmode \
169@@ -1080,10 +1070,10 @@ extern unsigned rs6000_pointer_size;
170 ? ALTIVEC_VECTOR_MODE (MODE2) \
171 : ALTIVEC_VECTOR_MODE (MODE2) \
172 ? ALTIVEC_VECTOR_MODE (MODE1) \
173- : VSX_VECTOR_MODE (MODE1) \
174- ? VSX_VECTOR_MODE (MODE2) \
175- : VSX_VECTOR_MODE (MODE2) \
176- ? VSX_VECTOR_MODE (MODE1) \
177+ : ALTIVEC_OR_VSX_VECTOR_MODE (MODE1) \
178+ ? ALTIVEC_OR_VSX_VECTOR_MODE (MODE2) \
179+ : ALTIVEC_OR_VSX_VECTOR_MODE (MODE2) \
180+ ? ALTIVEC_OR_VSX_VECTOR_MODE (MODE1) \
181 : 1)
182
183 /* Post-reload, we can't use any new AltiVec registers, as we already
184new file mode 100644
185index 0000000..e8201c0
186--- /dev/null
187+++ b/gcc/testsuite/gcc.target/powerpc/pr48857.c
188@@ -0,0 +1,25 @@
189+/* { dg-do compile { target { powerpc*-*-* } } } */
190+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
191+/* { dg-require-effective-target powerpc_vsx_ok } */
192+/* { dg-options "-O2 -mcpu=power7 -mabi=altivec" } */
193+/* { dg-final { scan-assembler-times "lxvd2x" 1 } } */
194+/* { dg-final { scan-assembler-times "stxvd2x" 1 } } */
195+/* { dg-final { scan-assembler-not "ld" } } */
196+/* { dg-final { scan-assembler-not "lwz" } } */
197+/* { dg-final { scan-assembler-not "stw" } } */
198+/* { dg-final { scan-assembler-not "addi" } } */
199+
200+typedef vector long long v2di_type;
201+
202+v2di_type
203+return_v2di (v2di_type *ptr)
204+{
205+ return *ptr; /* should generate lxvd2x 34,0,3. */
206+}
207+
208+void
209+pass_v2di (v2di_type arg, v2di_type *ptr)
210+{
211+ *ptr = arg; /* should generate stxvd2x 34,0,{3,5}. */
212+}
213+
214--
2151.7.0.4
216
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