diff options
Diffstat (limited to 'meta/recipes-devtools/elfutils/elfutils-0.148/arm_backend.diff')
-rw-r--r-- | meta/recipes-devtools/elfutils/elfutils-0.148/arm_backend.diff | 447 |
1 files changed, 447 insertions, 0 deletions
diff --git a/meta/recipes-devtools/elfutils/elfutils-0.148/arm_backend.diff b/meta/recipes-devtools/elfutils/elfutils-0.148/arm_backend.diff new file mode 100644 index 0000000000..a309d1ba1d --- /dev/null +++ b/meta/recipes-devtools/elfutils/elfutils-0.148/arm_backend.diff | |||
@@ -0,0 +1,447 @@ | |||
1 | Index: elfutils-0.146/backends/arm_init.c | ||
2 | =================================================================== | ||
3 | --- elfutils-0.146.orig/backends/arm_init.c 2009-04-21 14:50:01.000000000 +0000 | ||
4 | +++ elfutils-0.146/backends/arm_init.c 2010-04-24 10:11:13.000000000 +0000 | ||
5 | @@ -32,21 +32,32 @@ | ||
6 | #define RELOC_PREFIX R_ARM_ | ||
7 | #include "libebl_CPU.h" | ||
8 | |||
9 | +#include "libebl_arm.h" | ||
10 | + | ||
11 | /* This defines the common reloc hooks based on arm_reloc.def. */ | ||
12 | #include "common-reloc.c" | ||
13 | |||
14 | |||
15 | const char * | ||
16 | arm_init (elf, machine, eh, ehlen) | ||
17 | - Elf *elf __attribute__ ((unused)); | ||
18 | + Elf *elf; | ||
19 | GElf_Half machine __attribute__ ((unused)); | ||
20 | Ebl *eh; | ||
21 | size_t ehlen; | ||
22 | { | ||
23 | + int soft_float = 0; | ||
24 | + | ||
25 | /* Check whether the Elf_BH object has a sufficent size. */ | ||
26 | if (ehlen < sizeof (Ebl)) | ||
27 | return NULL; | ||
28 | |||
29 | + if (elf) { | ||
30 | + GElf_Ehdr ehdr_mem; | ||
31 | + GElf_Ehdr *ehdr = gelf_getehdr (elf, &ehdr_mem); | ||
32 | + if (ehdr && (ehdr->e_flags & EF_ARM_SOFT_FLOAT)) | ||
33 | + soft_float = 1; | ||
34 | + } | ||
35 | + | ||
36 | /* We handle it. */ | ||
37 | eh->name = "ARM"; | ||
38 | arm_init_reloc (eh); | ||
39 | @@ -58,7 +69,10 @@ | ||
40 | HOOK (eh, core_note); | ||
41 | HOOK (eh, auxv_info); | ||
42 | HOOK (eh, check_object_attribute); | ||
43 | - HOOK (eh, return_value_location); | ||
44 | + if (soft_float) | ||
45 | + eh->return_value_location = arm_return_value_location_soft; | ||
46 | + else | ||
47 | + eh->return_value_location = arm_return_value_location_hard; | ||
48 | |||
49 | return MODVERSION; | ||
50 | } | ||
51 | Index: elfutils-0.146/backends/arm_regs.c | ||
52 | =================================================================== | ||
53 | --- elfutils-0.146.orig/backends/arm_regs.c 2009-04-21 14:50:01.000000000 +0000 | ||
54 | +++ elfutils-0.146/backends/arm_regs.c 2010-04-24 10:11:13.000000000 +0000 | ||
55 | @@ -28,6 +28,7 @@ | ||
56 | #endif | ||
57 | |||
58 | #include <string.h> | ||
59 | +#include <stdio.h> | ||
60 | #include <dwarf.h> | ||
61 | |||
62 | #define BACKEND arm_ | ||
63 | @@ -58,7 +59,15 @@ | ||
64 | namelen = 2; | ||
65 | break; | ||
66 | |||
67 | - case 10 ... 12: | ||
68 | + case 10 ... 11: | ||
69 | + name[0] = 'r'; | ||
70 | + name[1] = '1'; | ||
71 | + name[2] = regno % 10 + '0'; | ||
72 | + namelen = 3; | ||
73 | + break; | ||
74 | + | ||
75 | + case 12: | ||
76 | + *type = DW_ATE_unsigned; | ||
77 | name[0] = 'r'; | ||
78 | name[1] = '1'; | ||
79 | name[2] = regno % 10 + '0'; | ||
80 | @@ -73,6 +82,9 @@ | ||
81 | break; | ||
82 | |||
83 | case 16 + 0 ... 16 + 7: | ||
84 | + /* AADWARF says that there are no registers in that range, | ||
85 | + * but gcc maps FPA registers here | ||
86 | + */ | ||
87 | regno += 96 - 16; | ||
88 | /* Fall through. */ | ||
89 | case 96 + 0 ... 96 + 7: | ||
90 | @@ -84,11 +96,139 @@ | ||
91 | namelen = 2; | ||
92 | break; | ||
93 | |||
94 | + case 64 + 0 ... 64 + 9: | ||
95 | + *setname = "VFP"; | ||
96 | + *bits = 32; | ||
97 | + *type = DW_ATE_float; | ||
98 | + name[0] = 's'; | ||
99 | + name[1] = regno - 64 + '0'; | ||
100 | + namelen = 2; | ||
101 | + break; | ||
102 | + | ||
103 | + case 64 + 10 ... 64 + 31: | ||
104 | + *setname = "VFP"; | ||
105 | + *bits = 32; | ||
106 | + *type = DW_ATE_float; | ||
107 | + name[0] = 's'; | ||
108 | + name[1] = (regno - 64) / 10 + '0'; | ||
109 | + name[2] = (regno - 64) % 10 + '0'; | ||
110 | + namelen = 3; | ||
111 | + break; | ||
112 | + | ||
113 | + case 104 + 0 ... 104 + 7: | ||
114 | + /* XXX TODO: | ||
115 | + * This can be either intel wireless MMX general purpose/control | ||
116 | + * registers or xscale accumulator, which have different usage. | ||
117 | + * We only have the intel wireless MMX here now. | ||
118 | + * The name needs to be changed for the xscale accumulator too. */ | ||
119 | + *setname = "MMX"; | ||
120 | + *type = DW_ATE_unsigned; | ||
121 | + *bits = 32; | ||
122 | + memcpy(name, "wcgr", 4); | ||
123 | + name[4] = regno - 104 + '0'; | ||
124 | + namelen = 5; | ||
125 | + break; | ||
126 | + | ||
127 | + case 112 + 0 ... 112 + 9: | ||
128 | + *setname = "MMX"; | ||
129 | + *type = DW_ATE_unsigned; | ||
130 | + *bits = 64; | ||
131 | + name[0] = 'w'; | ||
132 | + name[1] = 'r'; | ||
133 | + name[2] = regno - 112 + '0'; | ||
134 | + namelen = 3; | ||
135 | + break; | ||
136 | + | ||
137 | + case 112 + 10 ... 112 + 15: | ||
138 | + *setname = "MMX"; | ||
139 | + *type = DW_ATE_unsigned; | ||
140 | + *bits = 64; | ||
141 | + name[0] = 'w'; | ||
142 | + name[1] = 'r'; | ||
143 | + name[2] = '1'; | ||
144 | + name[3] = regno - 112 - 10 + '0'; | ||
145 | + namelen = 4; | ||
146 | + break; | ||
147 | + | ||
148 | case 128: | ||
149 | + *setname = "special"; | ||
150 | *type = DW_ATE_unsigned; | ||
151 | return stpcpy (name, "spsr") + 1 - name; | ||
152 | |||
153 | + case 129: | ||
154 | + *setname = "special"; | ||
155 | + *type = DW_ATE_unsigned; | ||
156 | + return stpcpy(name, "spsr_fiq") + 1 - name; | ||
157 | + | ||
158 | + case 130: | ||
159 | + *setname = "special"; | ||
160 | + *type = DW_ATE_unsigned; | ||
161 | + return stpcpy(name, "spsr_irq") + 1 - name; | ||
162 | + | ||
163 | + case 131: | ||
164 | + *setname = "special"; | ||
165 | + *type = DW_ATE_unsigned; | ||
166 | + return stpcpy(name, "spsr_abt") + 1 - name; | ||
167 | + | ||
168 | + case 132: | ||
169 | + *setname = "special"; | ||
170 | + *type = DW_ATE_unsigned; | ||
171 | + return stpcpy(name, "spsr_und") + 1 - name; | ||
172 | + | ||
173 | + case 133: | ||
174 | + *setname = "special"; | ||
175 | + *type = DW_ATE_unsigned; | ||
176 | + return stpcpy(name, "spsr_svc") + 1 - name; | ||
177 | + | ||
178 | + case 144 ... 150: | ||
179 | + *setname = "integer"; | ||
180 | + *type = DW_ATE_signed; | ||
181 | + *bits = 32; | ||
182 | + return sprintf(name, "r%d_usr", regno - 144 + 8) + 1; | ||
183 | + | ||
184 | + case 151 ... 157: | ||
185 | + *setname = "integer"; | ||
186 | + *type = DW_ATE_signed; | ||
187 | + *bits = 32; | ||
188 | + return sprintf(name, "r%d_fiq", regno - 151 + 8) + 1; | ||
189 | + | ||
190 | + case 158 ... 159: | ||
191 | + *setname = "integer"; | ||
192 | + *type = DW_ATE_signed; | ||
193 | + *bits = 32; | ||
194 | + return sprintf(name, "r%d_irq", regno - 158 + 13) + 1; | ||
195 | + | ||
196 | + case 160 ... 161: | ||
197 | + *setname = "integer"; | ||
198 | + *type = DW_ATE_signed; | ||
199 | + *bits = 32; | ||
200 | + return sprintf(name, "r%d_abt", regno - 160 + 13) + 1; | ||
201 | + | ||
202 | + case 162 ... 163: | ||
203 | + *setname = "integer"; | ||
204 | + *type = DW_ATE_signed; | ||
205 | + *bits = 32; | ||
206 | + return sprintf(name, "r%d_und", regno - 162 + 13) + 1; | ||
207 | + | ||
208 | + case 164 ... 165: | ||
209 | + *setname = "integer"; | ||
210 | + *type = DW_ATE_signed; | ||
211 | + *bits = 32; | ||
212 | + return sprintf(name, "r%d_svc", regno - 164 + 13) + 1; | ||
213 | + | ||
214 | + case 192 ... 199: | ||
215 | + *setname = "MMX"; | ||
216 | + *bits = 32; | ||
217 | + *type = DW_ATE_unsigned; | ||
218 | + name[0] = 'w'; | ||
219 | + name[1] = 'c'; | ||
220 | + name[2] = regno - 192 + '0'; | ||
221 | + namelen = 3; | ||
222 | + break; | ||
223 | + | ||
224 | case 256 + 0 ... 256 + 9: | ||
225 | + /* XXX TODO: Neon also uses those registers and can contain | ||
226 | + * both float and integers */ | ||
227 | *setname = "VFP"; | ||
228 | *type = DW_ATE_float; | ||
229 | *bits = 64; | ||
230 | Index: elfutils-0.146/backends/arm_retval.c | ||
231 | =================================================================== | ||
232 | --- elfutils-0.146.orig/backends/arm_retval.c 2010-01-12 16:57:54.000000000 +0000 | ||
233 | +++ elfutils-0.146/backends/arm_retval.c 2010-04-24 10:11:13.000000000 +0000 | ||
234 | @@ -45,6 +45,13 @@ | ||
235 | #define nloc_intreg 1 | ||
236 | #define nloc_intregs(n) (2 * (n)) | ||
237 | |||
238 | +/* f1 */ /* XXX TODO: f0 can also have number 96 if program was compiled with -mabi=aapcs */ | ||
239 | +static const Dwarf_Op loc_fpreg[] = | ||
240 | + { | ||
241 | + { .atom = DW_OP_reg16 }, | ||
242 | + }; | ||
243 | +#define nloc_fpreg 1 | ||
244 | + | ||
245 | /* The return value is a structure and is actually stored in stack space | ||
246 | passed in a hidden argument by the caller. But, the compiler | ||
247 | helpfully returns the address of that space in r0. */ | ||
248 | @@ -55,8 +62,9 @@ | ||
249 | #define nloc_aggregate 1 | ||
250 | |||
251 | |||
252 | -int | ||
253 | -arm_return_value_location (Dwarf_Die *functypedie, const Dwarf_Op **locp) | ||
254 | +static int | ||
255 | +arm_return_value_location_ (Dwarf_Die *functypedie, const Dwarf_Op **locp, | ||
256 | + int soft_float) | ||
257 | { | ||
258 | /* Start with the function's type, and get the DW_AT_type attribute, | ||
259 | which is the type of the return value. */ | ||
260 | @@ -109,14 +117,31 @@ | ||
261 | else | ||
262 | return -1; | ||
263 | } | ||
264 | + if (tag == DW_TAG_base_type) | ||
265 | + { | ||
266 | + Dwarf_Word encoding; | ||
267 | + if (dwarf_formudata (dwarf_attr_integrate (typedie, DW_AT_encoding, | ||
268 | + &attr_mem), &encoding) != 0) | ||
269 | + return -1; | ||
270 | + | ||
271 | + if ((encoding == DW_ATE_float) && !soft_float) | ||
272 | + { | ||
273 | + *locp = loc_fpreg; | ||
274 | + if (size <= 8) | ||
275 | + return nloc_fpreg; | ||
276 | + goto aggregate; | ||
277 | + } | ||
278 | + } | ||
279 | if (size <= 16) | ||
280 | { | ||
281 | intreg: | ||
282 | *locp = loc_intreg; | ||
283 | return size <= 4 ? nloc_intreg : nloc_intregs ((size + 3) / 4); | ||
284 | } | ||
285 | + /* fall through. */ | ||
286 | |||
287 | aggregate: | ||
288 | + /* XXX TODO sometimes aggregates are returned in r0 (-mabi=aapcs) */ | ||
289 | *locp = loc_aggregate; | ||
290 | return nloc_aggregate; | ||
291 | |||
292 | @@ -135,3 +160,18 @@ | ||
293 | DWARF and might be valid. */ | ||
294 | return -2; | ||
295 | } | ||
296 | + | ||
297 | +/* return location for -mabi=apcs-gnu -msoft-float */ | ||
298 | +int | ||
299 | +arm_return_value_location_soft (Dwarf_Die *functypedie, const Dwarf_Op **locp) | ||
300 | +{ | ||
301 | + return arm_return_value_location_ (functypedie, locp, 1); | ||
302 | +} | ||
303 | + | ||
304 | +/* return location for -mabi=apcs-gnu -mhard-float (current default) */ | ||
305 | +int | ||
306 | +arm_return_value_location_hard (Dwarf_Die *functypedie, const Dwarf_Op **locp) | ||
307 | +{ | ||
308 | + return arm_return_value_location_ (functypedie, locp, 0); | ||
309 | +} | ||
310 | + | ||
311 | Index: elfutils-0.146/libelf/elf.h | ||
312 | =================================================================== | ||
313 | --- elfutils-0.146.orig/libelf/elf.h 2010-04-24 10:11:11.000000000 +0000 | ||
314 | +++ elfutils-0.146/libelf/elf.h 2010-04-24 10:11:13.000000000 +0000 | ||
315 | @@ -2290,6 +2290,9 @@ | ||
316 | #define EF_ARM_EABI_VER4 0x04000000 | ||
317 | #define EF_ARM_EABI_VER5 0x05000000 | ||
318 | |||
319 | +/* EI_OSABI values */ | ||
320 | +#define ELFOSABI_ARM_AEABI 64 /* Contains symbol versioning. */ | ||
321 | + | ||
322 | /* Additional symbol types for Thumb. */ | ||
323 | #define STT_ARM_TFUNC STT_LOPROC /* A Thumb function. */ | ||
324 | #define STT_ARM_16BIT STT_HIPROC /* A Thumb label. */ | ||
325 | @@ -2307,12 +2310,19 @@ | ||
326 | |||
327 | /* Processor specific values for the Phdr p_type field. */ | ||
328 | #define PT_ARM_EXIDX (PT_LOPROC + 1) /* ARM unwind segment. */ | ||
329 | +#define PT_ARM_UNWIND PT_ARM_EXIDX | ||
330 | |||
331 | /* Processor specific values for the Shdr sh_type field. */ | ||
332 | #define SHT_ARM_EXIDX (SHT_LOPROC + 1) /* ARM unwind section. */ | ||
333 | #define SHT_ARM_PREEMPTMAP (SHT_LOPROC + 2) /* Preemption details. */ | ||
334 | #define SHT_ARM_ATTRIBUTES (SHT_LOPROC + 3) /* ARM attributes section. */ | ||
335 | |||
336 | +/* Processor specific values for the Dyn d_tag field. */ | ||
337 | +#define DT_ARM_RESERVED1 (DT_LOPROC + 0) | ||
338 | +#define DT_ARM_SYMTABSZ (DT_LOPROC + 1) | ||
339 | +#define DT_ARM_PREEMTMAB (DT_LOPROC + 2) | ||
340 | +#define DT_ARM_RESERVED2 (DT_LOPROC + 3) | ||
341 | +#define DT_ARM_NUM 4 | ||
342 | |||
343 | /* ARM relocs. */ | ||
344 | |||
345 | @@ -2344,12 +2354,75 @@ | ||
346 | #define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */ | ||
347 | #define R_ARM_GOT32 26 /* 32 bit GOT entry */ | ||
348 | #define R_ARM_PLT32 27 /* 32 bit PLT address */ | ||
349 | +#define R_ARM_CALL 28 | ||
350 | +#define R_ARM_JUMP24 29 | ||
351 | +#define R_ARM_THM_JUMP24 30 | ||
352 | +#define R_ARM_BASE_ABS 31 | ||
353 | #define R_ARM_ALU_PCREL_7_0 32 | ||
354 | #define R_ARM_ALU_PCREL_15_8 33 | ||
355 | #define R_ARM_ALU_PCREL_23_15 34 | ||
356 | #define R_ARM_LDR_SBREL_11_0 35 | ||
357 | #define R_ARM_ALU_SBREL_19_12 36 | ||
358 | #define R_ARM_ALU_SBREL_27_20 37 | ||
359 | +#define R_ARM_TARGET1 38 | ||
360 | +#define R_ARM_SBREL31 39 | ||
361 | +#define R_ARM_V4BX 40 | ||
362 | +#define R_ARM_TARGET2 41 | ||
363 | +#define R_ARM_PREL31 42 | ||
364 | +#define R_ARM_MOVW_ABS_NC 43 | ||
365 | +#define R_ARM_MOVT_ABS 44 | ||
366 | +#define R_ARM_MOVW_PREL_NC 45 | ||
367 | +#define R_ARM_MOVT_PREL 46 | ||
368 | +#define R_ARM_THM_MOVW_ABS_NC 47 | ||
369 | +#define R_ARM_THM_MOVT_ABS 48 | ||
370 | +#define R_ARM_THM_MOVW_PREL_NC 49 | ||
371 | +#define R_ARM_THM_MOVT_PREL 50 | ||
372 | +#define R_ARM_THM_JUMP19 51 | ||
373 | +#define R_ARM_THM_JUMP6 52 | ||
374 | +#define R_ARM_THM_ALU_PREL_11_0 53 | ||
375 | +#define R_ARM_THM_PC12 54 | ||
376 | +#define R_ARM_ABS32_NOI 55 | ||
377 | +#define R_ARM_REL32_NOI 56 | ||
378 | +#define R_ARM_ALU_PC_G0_NC 57 | ||
379 | +#define R_ARM_ALU_PC_G0 58 | ||
380 | +#define R_ARM_ALU_PC_G1_NC 59 | ||
381 | +#define R_ARM_ALU_PC_G1 60 | ||
382 | +#define R_ARM_ALU_PC_G2 61 | ||
383 | +#define R_ARM_LDR_PC_G1 62 | ||
384 | +#define R_ARM_LDR_PC_G2 63 | ||
385 | +#define R_ARM_LDRS_PC_G0 64 | ||
386 | +#define R_ARM_LDRS_PC_G1 65 | ||
387 | +#define R_ARM_LDRS_PC_G2 66 | ||
388 | +#define R_ARM_LDC_PC_G0 67 | ||
389 | +#define R_ARM_LDC_PC_G1 68 | ||
390 | +#define R_ARM_LDC_PC_G2 69 | ||
391 | +#define R_ARM_ALU_SB_G0_NC 70 | ||
392 | +#define R_ARM_ALU_SB_G0 71 | ||
393 | +#define R_ARM_ALU_SB_G1_NC 72 | ||
394 | +#define R_ARM_ALU_SB_G1 73 | ||
395 | +#define R_ARM_ALU_SB_G2 74 | ||
396 | +#define R_ARM_LDR_SB_G0 75 | ||
397 | +#define R_ARM_LDR_SB_G1 76 | ||
398 | +#define R_ARM_LDR_SB_G2 77 | ||
399 | +#define R_ARM_LDRS_SB_G0 78 | ||
400 | +#define R_ARM_LDRS_SB_G1 79 | ||
401 | +#define R_ARM_LDRS_SB_G2 80 | ||
402 | +#define R_ARM_LDC_G0 81 | ||
403 | +#define R_ARM_LDC_G1 82 | ||
404 | +#define R_ARM_LDC_G2 83 | ||
405 | +#define R_ARM_MOVW_BREL_NC 84 | ||
406 | +#define R_ARM_MOVT_BREL 85 | ||
407 | +#define R_ARM_MOVW_BREL 86 | ||
408 | +#define R_ARM_THM_MOVW_BREL_NC 87 | ||
409 | +#define R_ARM_THM_MOVT_BREL 88 | ||
410 | +#define R_ARM_THM_MOVW_BREL 89 | ||
411 | +/* 90-93 unallocated */ | ||
412 | +#define R_ARM_PLT32_ABS 94 | ||
413 | +#define R_ARM_GOT_ABS 95 | ||
414 | +#define R_ARM_GOT_PREL 96 | ||
415 | +#define R_ARM_GOT_BREL12 97 | ||
416 | +#define R_ARM_GOTOFF12 98 | ||
417 | +#define R_ARM_GOTRELAX 99 | ||
418 | #define R_ARM_GNU_VTENTRY 100 | ||
419 | #define R_ARM_GNU_VTINHERIT 101 | ||
420 | #define R_ARM_THM_PC11 102 /* thumb unconditional branch */ | ||
421 | @@ -2364,6 +2437,12 @@ | ||
422 | static TLS block offset */ | ||
423 | #define R_ARM_TLS_LE32 108 /* 32 bit offset relative to static | ||
424 | TLS block */ | ||
425 | +#define R_ARM_TLS_LDO12 109 | ||
426 | +#define R_ARM_TLS_LE12 110 | ||
427 | +#define R_ARM_TLS_IE12GP 111 | ||
428 | +/* 112 - 127 private range */ | ||
429 | +#define R_ARM_ME_TOO 128 /* obsolete */ | ||
430 | + | ||
431 | #define R_ARM_RXPC25 249 | ||
432 | #define R_ARM_RSBREL32 250 | ||
433 | #define R_ARM_THM_RPC22 251 | ||
434 | Index: elfutils-0.146/backends/libebl_arm.h | ||
435 | =================================================================== | ||
436 | --- /dev/null 1970-01-01 00:00:00.000000000 +0000 | ||
437 | +++ elfutils-0.146/backends/libebl_arm.h 2010-04-24 10:11:13.000000000 +0000 | ||
438 | @@ -0,0 +1,9 @@ | ||
439 | +#ifndef _LIBEBL_ARM_H | ||
440 | +#define _LIBEBL_ARM_H 1 | ||
441 | + | ||
442 | +#include <libdw.h> | ||
443 | + | ||
444 | +extern int arm_return_value_location_soft(Dwarf_Die *, const Dwarf_Op **locp); | ||
445 | +extern int arm_return_value_location_hard(Dwarf_Die *, const Dwarf_Op **locp); | ||
446 | + | ||
447 | +#endif | ||