1 files changed, 73 insertions, 0 deletions

diff --git a/meta/recipes-devtools/cargo/cargo-1.51.0/riscv-march.patch b/meta/recipes-devtools/cargo/cargo-1.51.0/riscv-march.patch
new file mode 100644
index 0000000000..a10b3a4d93
--- /dev/null
+++ b/meta/recipes-devtools/cargo/cargo-1.51.0/riscv-march.patch
@@ -0,0 +1,73 @@
+Add suppor for riscv64 and riscv32 musl targets
+
+Upstream-Status: Pending
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+
+--- a/vendor/cc/src/lib.rs
++++ b/vendor/cc/src/lib.rs
+@@ -2361,6 +2361,7 @@ impl Build {
+                 "riscv-none-embed",
+             ]),
+             "riscv64gc-unknown-linux-gnu" => Some("riscv64-linux-gnu"),
++            "riscv64gc-unknown-linux-musl" => Some("riscv64-linux-musl"),
+             "s390x-unknown-linux-gnu" => Some("s390x-linux-gnu"),
+             "sparc-unknown-linux-gnu" => Some("sparc-linux-gnu"),
+             "sparc64-unknown-linux-gnu" => Some("sparc64-linux-gnu"),
+--- a/compiler/rustc_target/src/spec/mod.rs
++++ b/compiler/rustc_target/src/spec/mod.rs
+@@ -641,9 +641,11 @@ supported_targets! {
+     ("riscv32imc-unknown-none-elf", riscv32imc_unknown_none_elf),
+     ("riscv32imac-unknown-none-elf", riscv32imac_unknown_none_elf),
+     ("riscv32gc-unknown-linux-gnu", riscv32gc_unknown_linux_gnu),
++    ("riscv32gc-unknown-linux-musl", riscv32gc_unknown_linux_musl),
+     ("riscv64imac-unknown-none-elf", riscv64imac_unknown_none_elf),
+     ("riscv64gc-unknown-none-elf", riscv64gc_unknown_none_elf),
+     ("riscv64gc-unknown-linux-gnu", riscv64gc_unknown_linux_gnu),
++    ("riscv64gc-unknown-linux-musl", riscv64gc_unknown_linux_musl),
+ 
+     ("aarch64-unknown-none", aarch64_unknown_none),
+     ("aarch64-unknown-none-softfloat", aarch64_unknown_none_softfloat),
+--- /dev/null
++++ b/compiler/rustc_target/src/spec/riscv32gc_unknown_linux_musl.rs
+@@ -0,0 +1,19 @@
++use crate::spec::{CodeModel, Target, TargetOptions};
++
++pub fn target() -> Target {
++    Target {
++        llvm_target: "riscv32-unknown-linux-musl".to_string(),
++        pointer_width: 32,
++        data_layout: "e-m:e-p:32:32-i64:64-n32-S128".to_string(),
++        arch: "riscv32".to_string(),
++        options: TargetOptions {
++            unsupported_abis: super::riscv_base::unsupported_abis(),
++            code_model: Some(CodeModel::Medium),
++            cpu: "generic-rv32".to_string(),
++            features: "+m,+a,+f,+d,+c".to_string(),
++            llvm_abiname: "ilp32d".to_string(),
++            max_atomic_width: Some(32),
++            ..super::linux_musl_base::opts()
++        },
++    }
++}
+--- /dev/null
++++ b/compiler/rustc_target/src/spec/riscv64gc_unknown_linux_musl.rs
+@@ -0,0 +1,19 @@
++use crate::spec::{CodeModel, Target, TargetOptions};
++
++pub fn target() -> Target {
++    Target {
++        llvm_target: "riscv64-unknown-linux-musl".to_string(),
++        pointer_width: 64,
++        data_layout: "e-m:e-p:64:64-i64:64-i128:128-n64-S128".to_string(),
++        arch: "riscv64".to_string(),
++        options: TargetOptions {
++            unsupported_abis: super::riscv_base::unsupported_abis(),
++            code_model: Some(CodeModel::Medium),
++            cpu: "generic-rv64".to_string(),
++            features: "+m,+a,+f,+d,+c".to_string(),
++            llvm_abiname: "lp64d".to_string(),
++            max_atomic_width: Some(64),
++            ..super::linux_musl_base::opts()
++        },
++    }
++}