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-rw-r--r--meta/recipes-devtools/binutils/binutils/0013-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch10
1 files changed, 5 insertions, 5 deletions
diff --git a/meta/recipes-devtools/binutils/binutils/0013-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch b/meta/recipes-devtools/binutils/binutils/0013-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch
index c3e1b13841..c9ffdada91 100644
--- a/meta/recipes-devtools/binutils/binutils/0013-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch
+++ b/meta/recipes-devtools/binutils/binutils/0013-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch
@@ -1,4 +1,4 @@
1From 27ec22ca3cd56cfdf060d2e1f414bedce269b322 Mon Sep 17 00:00:00 2001 1From d45455db35db5693c5efe0e1b384295e4c0db998 Mon Sep 17 00:00:00 2001
2From: Zhenhua Luo <zhenhua.luo@nxp.com> 2From: Zhenhua Luo <zhenhua.luo@nxp.com>
3Date: Sat, 11 Jun 2016 22:08:29 -0500 3Date: Sat, 11 Jun 2016 22:08:29 -0500
4Subject: [PATCH 13/15] fix the incorrect assembling for ppc wait mnemonic 4Subject: [PATCH 13/15] fix the incorrect assembling for ppc wait mnemonic
@@ -11,10 +11,10 @@ Upstream-Status: Pending
11 1 file changed, 1 insertion(+), 2 deletions(-) 11 1 file changed, 1 insertion(+), 2 deletions(-)
12 12
13diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c 13diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
14index bb17f26c2e..dbdd762b4e 100644 14index 4a0fca5f0a..49f72fc35c 100644
15--- a/opcodes/ppc-opc.c 15--- a/opcodes/ppc-opc.c
16+++ b/opcodes/ppc-opc.c 16+++ b/opcodes/ppc-opc.c
17@@ -5338,7 +5338,6 @@ const struct powerpc_opcode powerpc_opcodes[] = { 17@@ -5351,7 +5351,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
18 {"ldepx", X(31,29), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}}, 18 {"ldepx", X(31,29), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
19 19
20 {"waitasec", X(31,30), XRTRARB_MASK, POWER8, POWER9, {0}}, 20 {"waitasec", X(31,30), XRTRARB_MASK, POWER8, POWER9, {0}},
@@ -22,7 +22,7 @@ index bb17f26c2e..dbdd762b4e 100644
22 22
23 {"lwepx", X(31,31), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}}, 23 {"lwepx", X(31,31), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
24 24
25@@ -5392,7 +5391,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { 25@@ -5405,7 +5404,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
26 26
27 {"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, 0, {0}}, 27 {"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, 0, {0}},
28 {"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, 0, {0}}, 28 {"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, 0, {0}},
@@ -32,5 +32,5 @@ index bb17f26c2e..dbdd762b4e 100644
32 {"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}}, 32 {"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}},
33 33
34-- 34--
352.16.1 352.18.0
36 36