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-rw-r--r--meta/recipes-devtools/binutils/binutils/0011-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch38
1 files changed, 0 insertions, 38 deletions
diff --git a/meta/recipes-devtools/binutils/binutils/0011-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch b/meta/recipes-devtools/binutils/binutils/0011-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch
deleted file mode 100644
index a271f55ea1..0000000000
--- a/meta/recipes-devtools/binutils/binutils/0011-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch
+++ /dev/null
@@ -1,38 +0,0 @@
1From b77c5a67d4ac2513d0b4bab5e4dd1c33b339689b Mon Sep 17 00:00:00 2001
2From: Zhenhua Luo <zhenhua.luo@nxp.com>
3Date: Sat, 11 Jun 2016 22:08:29 -0500
4Subject: [PATCH] fix the incorrect assembling for ppc wait mnemonic
5
6The wait mnemonic for ppc targets is incorrectly assembled into 0x7c00003c due
7to duplicated address definition with waitasec instruction. The issue causes
8kernel boot calltrace for ppc targets when wait instruction is executed.
9
10Signed-off-by: Zhenhua Luo <zhenhua.luo@nxp.com>
11
12Upstream-Status: Pending
13---
14 opcodes/ppc-opc.c | 4 +---
15 1 file changed, 1 insertion(+), 3 deletions(-)
16
17diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
18index 13d8b6c3c07..cd979f9c80c 100644
19--- a/opcodes/ppc-opc.c
20+++ b/opcodes/ppc-opc.c
21@@ -6378,8 +6378,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
22 {"waitasec", X(31,30), XRTRARB_MASK, POWER8, POWER9, {0}},
23 {"waitrsv", XWCPL(31,30,1,0),0xffffffff, POWER10, EXT, {0}},
24 {"pause_short", XWCPL(31,30,2,0),0xffffffff, POWER10, EXT, {0}},
25-{"wait", X(31,30), XWCPL_MASK, POWER10, 0, {WC, PL}},
26-{"wait", X(31,30), XWC_MASK, POWER9, POWER10, {WC}},
27
28 {"lwepx", X(31,31), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
29
30@@ -6433,7 +6431,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
31
32 {"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, EXT, {0}},
33 {"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, EXT, {0}},
34-{"wait", X(31,62), XWC_MASK, E500MC|PPCA2, 0, {WC}},
35+{"wait", X(31,62), XWC_MASK, E500MC|PPCA2|POWER9|POWER10, 0, {WC}},
36
37 {"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}},
38