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-rw-r--r--meta/recipes-connectivity/openssl/openssl-1.0.1e/openssl_fix_for_x32.patch90
1 files changed, 90 insertions, 0 deletions
diff --git a/meta/recipes-connectivity/openssl/openssl-1.0.1e/openssl_fix_for_x32.patch b/meta/recipes-connectivity/openssl/openssl-1.0.1e/openssl_fix_for_x32.patch
new file mode 100644
index 0000000000..93ce0343cc
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl-1.0.1e/openssl_fix_for_x32.patch
@@ -0,0 +1,90 @@
1Upstream-Status: Pending
2
3Received from H J Liu @ Intel
4Make the assembly syntax compatible with x32 gcc. Othewise x32 gcc throws errors.
5Signed-Off-By: Nitin A Kamble <nitin.a.kamble@intel.com> 2011/07/13
6
7ported the patch to the 1.0.0e version
8Signed-Off-By: Nitin A Kamble <nitin.a.kamble@intel.com> 2011/12/01
9Index: openssl-1.0.1e/Configure
10===================================================================
11--- openssl-1.0.1e.orig/Configure
12+++ openssl-1.0.1e/Configure
13@@ -402,6 +402,7 @@ my %table=(
14 "linux-ia64-ecc","ecc:-DL_ENDIAN -DTERMIO -O2 -Wall -no_cpprt::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_INT:${ia64_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
15 "linux-ia64-icc","icc:-DL_ENDIAN -DTERMIO -O2 -Wall -no_cpprt::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_RISC1 DES_INT:${ia64_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
16 "linux-x86_64", "gcc:-m64 -DL_ENDIAN -DTERMIO -O3 -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_INT DES_UNROLL:${x86_64_asm}:elf:dlfcn:linux-shared:-fPIC:-m64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::64",
17+"linux-x32", "gcc:-mx32 -DL_ENDIAN -DTERMIO -O3 -Wall -DMD32_REG_T=int::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT RC4_CHUNK DES_INT DES_UNROLL:${x86_64_asm}:elf:dlfcn:linux-shared:-fPIC:-mx32:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::x32",
18 "linux64-s390x", "gcc:-m64 -DB_ENDIAN -DTERMIO -O3 -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHAR RC4_CHUNK DES_INT DES_UNROLL:${s390x_asm}:64:dlfcn:linux-shared:-fPIC:-m64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::64",
19 #### So called "highgprs" target for z/Architecture CPUs
20 # "Highgprs" is kernel feature first implemented in Linux 2.6.32, see
21Index: openssl-1.0.1e/crypto/bn/asm/x86_64-gcc.c
22===================================================================
23--- openssl-1.0.1e.orig/crypto/bn/asm/x86_64-gcc.c
24+++ openssl-1.0.1e/crypto/bn/asm/x86_64-gcc.c
25@@ -55,7 +55,7 @@
26 * machine.
27 */
28
29-#ifdef _WIN64
30+#if defined _WIN64 || !defined __LP64__
31 #define BN_ULONG unsigned long long
32 #else
33 #define BN_ULONG unsigned long
34@@ -192,9 +192,9 @@ BN_ULONG bn_add_words (BN_ULONG *rp, con
35 asm (
36 " subq %2,%2 \n"
37 ".p2align 4 \n"
38- "1: movq (%4,%2,8),%0 \n"
39- " adcq (%5,%2,8),%0 \n"
40- " movq %0,(%3,%2,8) \n"
41+ "1: movq (%q4,%2,8),%0 \n"
42+ " adcq (%q5,%2,8),%0 \n"
43+ " movq %0,(%q3,%2,8) \n"
44 " leaq 1(%2),%2 \n"
45 " loop 1b \n"
46 " sbbq %0,%0 \n"
47@@ -215,9 +215,9 @@ BN_ULONG bn_sub_words (BN_ULONG *rp, con
48 asm (
49 " subq %2,%2 \n"
50 ".p2align 4 \n"
51- "1: movq (%4,%2,8),%0 \n"
52- " sbbq (%5,%2,8),%0 \n"
53- " movq %0,(%3,%2,8) \n"
54+ "1: movq (%q4,%2,8),%0 \n"
55+ " sbbq (%q5,%2,8),%0 \n"
56+ " movq %0,(%q3,%2,8) \n"
57 " leaq 1(%2),%2 \n"
58 " loop 1b \n"
59 " sbbq %0,%0 \n"
60Index: openssl-1.0.1e/crypto/bn/bn.h
61===================================================================
62--- openssl-1.0.1e.orig/crypto/bn/bn.h
63+++ openssl-1.0.1e/crypto/bn/bn.h
64@@ -172,6 +172,13 @@ extern "C" {
65 # endif
66 #endif
67
68+/* Address type. */
69+#ifdef _WIN64
70+#define BN_ADDR unsigned long long
71+#else
72+#define BN_ADDR unsigned long
73+#endif
74+
75 /* assuming long is 64bit - this is the DEC Alpha
76 * unsigned long long is only 64 bits :-(, don't define
77 * BN_LLONG for the DEC Alpha */
78Index: openssl-1.0.1e/crypto/bn/bn_exp.c
79===================================================================
80--- openssl-1.0.1e.orig/crypto/bn/bn_exp.c
81+++ openssl-1.0.1e/crypto/bn/bn_exp.c
82@@ -567,7 +567,7 @@ static int MOD_EXP_CTIME_COPY_FROM_PREBU
83
84 /* Given a pointer value, compute the next address that is a cache line multiple. */
85 #define MOD_EXP_CTIME_ALIGN(x_) \
86- ((unsigned char*)(x_) + (MOD_EXP_CTIME_MIN_CACHE_LINE_WIDTH - (((size_t)(x_)) & (MOD_EXP_CTIME_MIN_CACHE_LINE_MASK))))
87+ ((unsigned char*)(x_) + (MOD_EXP_CTIME_MIN_CACHE_LINE_WIDTH - (((BN_ADDR)(x_)) & (MOD_EXP_CTIME_MIN_CACHE_LINE_MASK))))
88
89 /* This variant of BN_mod_exp_mont() uses fixed windows and the special
90 * precomputation memory layout to limit data-dependency to a minimum