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-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-mmc.patch818
1 files changed, 818 insertions, 0 deletions
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-mmc.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-mmc.patch
new file mode 100644
index 0000000000..b775beaa07
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-mmc.patch
@@ -0,0 +1,818 @@
1This patch adds MMC/SD support to the S3C2410 SoC code in
2u-boot
3
4Signed-off-by: Harald Welte <laforge@openmoko.org>
5
6Index: u-boot/cpu/arm920t/s3c24x0/Makefile
7===================================================================
8--- u-boot.orig/cpu/arm920t/s3c24x0/Makefile
9+++ u-boot/cpu/arm920t/s3c24x0/Makefile
10@@ -26,7 +26,7 @@
11 LIB = $(obj)lib$(SOC).a
12
13 COBJS = i2c.o interrupts.o serial.o speed.o \
14- usb_ohci.o nand_read.o nand.o cmd_s3c2410.o
15+ usb_ohci.o nand_read.o nand.o mmc.o cmd_s3c2410.o
16
17 SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
18 OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
19Index: u-boot/cpu/arm920t/s3c24x0/mmc.c
20===================================================================
21--- /dev/null
22+++ u-boot/cpu/arm920t/s3c24x0/mmc.c
23@@ -0,0 +1,531 @@
24+/*
25+ * u-boot S3C2410 MMC/SD card driver
26+ * (C) Copyright 2006 by OpenMoko, Inc.
27+ * Author: Harald Welte <laforge@openmoko.org>
28+ *
29+ * based on u-boot pxa MMC driver and linux/drivers/mmc/s3c2410mci.c
30+ * (C) 2005-2005 Thomas Kleffel
31+ *
32+ * This program is free software; you can redistribute it and/or
33+ * modify it under the terms of the GNU General Public License as
34+ * published by the Free Software Foundation; either version 2 of
35+ * the License, or (at your option) any later version.
36+ *
37+ * This program is distributed in the hope that it will be useful,
38+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
39+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
40+ * GNU General Public License for more details.
41+ *
42+ * You should have received a copy of the GNU General Public License
43+ * along with this program; if not, write to the Free Software
44+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
45+ * MA 02111-1307 USA
46+ */
47+
48+#include <config.h>
49+#include <common.h>
50+#include <mmc.h>
51+#include <asm/errno.h>
52+#include <asm/io.h>
53+#include <s3c2410.h>
54+#include <part.h>
55+#include <fat.h>
56+
57+#ifdef CONFIG_MMC
58+
59+#define CONFIG_MMC_WIDE
60+
61+static S3C2410_SDI *sdi;
62+
63+static block_dev_desc_t mmc_dev;
64+
65+block_dev_desc_t * mmc_get_dev(int dev)
66+{
67+ return ((block_dev_desc_t *)&mmc_dev);
68+}
69+
70+/*
71+ * FIXME needs to read cid and csd info to determine block size
72+ * and other parameters
73+ */
74+static uchar mmc_buf[MMC_BLOCK_SIZE];
75+static mmc_csd_t mmc_csd;
76+static int mmc_ready = 0;
77+static int wide = 0;
78+
79+
80+#define CMD_F_RESP 0x01
81+#define CMD_F_RESP_LONG 0x02
82+
83+static u_int32_t *mmc_cmd(ushort cmd, ulong arg, ushort flags)
84+{
85+ static u_int32_t resp[5];
86+
87+ u_int32_t ccon, csta;
88+ u_int32_t csta_rdy_bit = S3C2410_SDICMDSTAT_CMDSENT;
89+
90+ memset(resp, 0, sizeof(resp));
91+
92+ debug("mmc_cmd CMD%d arg=0x%08x flags=%x\n", cmd, arg, flags);
93+
94+ sdi->SDICSTA = 0xffffffff;
95+ sdi->SDIDSTA = 0xffffffff;
96+ sdi->SDIFSTA = 0xffffffff;
97+
98+ sdi->SDICARG = arg;
99+
100+ ccon = cmd & S3C2410_SDICMDCON_INDEX;
101+ ccon |= S3C2410_SDICMDCON_SENDERHOST|S3C2410_SDICMDCON_CMDSTART;
102+
103+ if (flags & CMD_F_RESP) {
104+ ccon |= S3C2410_SDICMDCON_WAITRSP;
105+ csta_rdy_bit = S3C2410_SDICMDSTAT_RSPFIN; /* 1 << 9 */
106+ }
107+
108+ if (flags & CMD_F_RESP_LONG)
109+ ccon |= S3C2410_SDICMDCON_LONGRSP;
110+
111+ sdi->SDICCON = ccon;
112+
113+ while (1) {
114+ csta = sdi->SDICSTA;
115+ if (csta & csta_rdy_bit)
116+ break;
117+ if (csta & S3C2410_SDICMDSTAT_CMDTIMEOUT) {
118+ printf("===============> MMC CMD Timeout\n");
119+ sdi->SDICSTA |= S3C2410_SDICMDSTAT_CMDTIMEOUT;
120+ break;
121+ }
122+ }
123+
124+ debug("final MMC CMD status 0x%x\n", csta);
125+
126+ sdi->SDICSTA |= csta_rdy_bit;
127+
128+ if (flags & CMD_F_RESP) {
129+ resp[0] = sdi->SDIRSP0;
130+ resp[1] = sdi->SDIRSP1;
131+ resp[2] = sdi->SDIRSP2;
132+ resp[3] = sdi->SDIRSP3;
133+ }
134+
135+ return resp;
136+}
137+
138+#define FIFO_FILL(host) ((host->SDIFSTA & S3C2410_SDIFSTA_COUNTMASK) >> 2)
139+
140+static int mmc_block_read(uchar *dst, ulong src, ulong len)
141+{
142+ u_int32_t dcon, fifo;
143+ u_int32_t *dst_u32 = (u_int32_t *)dst;
144+ u_int32_t *resp;
145+
146+ if (len == 0)
147+ return 0;
148+
149+ debug("mmc_block_rd dst %lx src %lx len %d\n", (ulong)dst, src, len);
150+
151+ /* set block len */
152+ resp = mmc_cmd(MMC_CMD_SET_BLOCKLEN, len, CMD_F_RESP);
153+ sdi->SDIBSIZE = len;
154+
155+ //sdi->SDIPRE = 0xff;
156+
157+ /* setup data */
158+ dcon = (len >> 9) & S3C2410_SDIDCON_BLKNUM;
159+ dcon |= S3C2410_SDIDCON_BLOCKMODE;
160+ dcon |= S3C2410_SDIDCON_RXAFTERCMD|S3C2410_SDIDCON_XFER_RXSTART;
161+ if (wide)
162+ dcon |= S3C2410_SDIDCON_WIDEBUS;
163+ sdi->SDIDCON = dcon;
164+
165+ /* send read command */
166+ resp = mmc_cmd(MMC_CMD_READ_BLOCK, src, CMD_F_RESP);
167+
168+ while (len > 0) {
169+ u_int32_t sdidsta = sdi->SDIDSTA;
170+ fifo = FIFO_FILL(sdi);
171+ if (sdidsta & (S3C2410_SDIDSTA_FIFOFAIL|
172+ S3C2410_SDIDSTA_CRCFAIL|
173+ S3C2410_SDIDSTA_RXCRCFAIL|
174+ S3C2410_SDIDSTA_DATATIMEOUT)) {
175+ printf("mmc_block_read: err SDIDSTA=0x%08x\n", sdidsta);
176+ return -EIO;
177+ }
178+
179+ while (fifo--) {
180+ //debug("dst_u32 = 0x%08x\n", dst_u32);
181+ *(dst_u32++) = sdi->SDIDAT;
182+ if (len >= 4)
183+ len -= 4;
184+ else {
185+ len = 0;
186+ break;
187+ }
188+ }
189+ }
190+
191+ debug("waiting for SDIDSTA (currently 0x%08x\n", sdi->SDIDSTA);
192+ while (!(sdi->SDIDSTA & (1 << 4))) {}
193+ debug("done waiting for SDIDSTA (currently 0x%08x\n", sdi->SDIDSTA);
194+
195+ sdi->SDIDCON = 0;
196+
197+ if (!(sdi->SDIDSTA & S3C2410_SDIDSTA_XFERFINISH))
198+ debug("mmc_block_read; transfer not finished!\n");
199+
200+ return 0;
201+}
202+
203+static int mmc_block_write(ulong dst, uchar *src, int len)
204+{
205+ printf("MMC block write not yet supported on S3C2410!\n");
206+ return -1;
207+}
208+
209+
210+int mmc_read(ulong src, uchar *dst, int size)
211+{
212+ ulong end, part_start, part_end, part_len, aligned_start, aligned_end;
213+ ulong mmc_block_size, mmc_block_address;
214+
215+ if (size == 0)
216+ return 0;
217+
218+ if (!mmc_ready) {
219+ printf("Please initialize the MMC first\n");
220+ return -1;
221+ }
222+
223+ mmc_block_size = MMC_BLOCK_SIZE;
224+ mmc_block_address = ~(mmc_block_size - 1);
225+
226+ src -= CFG_MMC_BASE;
227+ end = src + size;
228+ part_start = ~mmc_block_address & src;
229+ part_end = ~mmc_block_address & end;
230+ aligned_start = mmc_block_address & src;
231+ aligned_end = mmc_block_address & end;
232+
233+ /* all block aligned accesses */
234+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
235+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
236+ if (part_start) {
237+ part_len = mmc_block_size - part_start;
238+ debug("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
239+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
240+ if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < 0)
241+ return -1;
242+
243+ memcpy(dst, mmc_buf+part_start, part_len);
244+ dst += part_len;
245+ src += part_len;
246+ }
247+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
248+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
249+ for (; src < aligned_end; src += mmc_block_size, dst += mmc_block_size) {
250+ debug("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
251+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
252+ if ((mmc_block_read((uchar *)(dst), src, mmc_block_size)) < 0)
253+ return -1;
254+ }
255+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
256+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
257+ if (part_end && src < end) {
258+ debug("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
259+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
260+ if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0)
261+ return -1;
262+
263+ memcpy(dst, mmc_buf, part_end);
264+ }
265+ return 0;
266+}
267+
268+int mmc_write(uchar *src, ulong dst, int size)
269+{
270+ ulong end, part_start, part_end, part_len, aligned_start, aligned_end;
271+ ulong mmc_block_size, mmc_block_address;
272+
273+ if (size == 0)
274+ return 0;
275+
276+ if (!mmc_ready) {
277+ printf("Please initialize the MMC first\n");
278+ return -1;
279+ }
280+
281+ mmc_block_size = MMC_BLOCK_SIZE;
282+ mmc_block_address = ~(mmc_block_size - 1);
283+
284+ dst -= CFG_MMC_BASE;
285+ end = dst + size;
286+ part_start = ~mmc_block_address & dst;
287+ part_end = ~mmc_block_address & end;
288+ aligned_start = mmc_block_address & dst;
289+ aligned_end = mmc_block_address & end;
290+
291+ /* all block aligned accesses */
292+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
293+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
294+ if (part_start) {
295+ part_len = mmc_block_size - part_start;
296+ debug("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
297+ (ulong)src, dst, end, part_start, part_end, aligned_start, aligned_end);
298+ if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < 0)
299+ return -1;
300+
301+ memcpy(mmc_buf+part_start, src, part_len);
302+ if ((mmc_block_write(aligned_start, mmc_buf, mmc_block_size)) < 0)
303+ return -1;
304+
305+ dst += part_len;
306+ src += part_len;
307+ }
308+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
309+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
310+ for (; dst < aligned_end; src += mmc_block_size, dst += mmc_block_size) {
311+ debug("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
312+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
313+ if ((mmc_block_write(dst, (uchar *)src, mmc_block_size)) < 0)
314+ return -1;
315+
316+ }
317+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
318+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
319+ if (part_end && dst < end) {
320+ debug("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
321+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
322+ if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0)
323+ return -1;
324+
325+ memcpy(mmc_buf, src, part_end);
326+ if ((mmc_block_write(aligned_end, mmc_buf, mmc_block_size)) < 0)
327+ return -1;
328+
329+ }
330+ return 0;
331+}
332+
333+ulong mmc_bread(int dev_num, ulong blknr, ulong blkcnt, void *dst)
334+{
335+ int mmc_block_size = MMC_BLOCK_SIZE;
336+ ulong src = blknr * mmc_block_size + CFG_MMC_BASE;
337+
338+ mmc_read(src, dst, blkcnt*mmc_block_size);
339+ return blkcnt;
340+}
341+
342+/* MMC_DEFAULT_RCA should probably be just 1, but this may break other code
343+ that expects it to be shifted. */
344+static u_int16_t rca = MMC_DEFAULT_RCA >> 16;
345+
346+static u_int32_t mmc_size(const struct mmc_csd *csd)
347+{
348+ u_int32_t block_len, mult, blocknr;
349+
350+ block_len = csd->read_bl_len << 12;
351+ mult = csd->c_size_mult1 << 8;
352+ blocknr = (csd->c_size+1) * mult;
353+
354+ return blocknr * block_len;
355+}
356+
357+struct sd_cid {
358+ char pnm_0; /* product name */
359+ char oid_1; /* OEM/application ID */
360+ char oid_0;
361+ uint8_t mid; /* manufacturer ID */
362+ char pnm_4;
363+ char pnm_3;
364+ char pnm_2;
365+ char pnm_1;
366+ uint8_t psn_2; /* product serial number */
367+ uint8_t psn_1;
368+ uint8_t psn_0; /* MSB */
369+ uint8_t prv; /* product revision */
370+ uint8_t crc; /* CRC7 checksum, b0 is unused and set to 1 */
371+ uint8_t mdt_1; /* manufacturing date, LSB, RRRRyyyy yyyymmmm */
372+ uint8_t mdt_0; /* MSB */
373+ uint8_t psn_3; /* LSB */
374+};
375+
376+static void print_mmc_cid(mmc_cid_t *cid)
377+{
378+ printf("MMC found. Card desciption is:\n");
379+ printf("Manufacturer ID = %02x%02x%02x\n",
380+ cid->id[0], cid->id[1], cid->id[2]);
381+ printf("HW/FW Revision = %x %x\n",cid->hwrev, cid->fwrev);
382+ cid->hwrev = cid->fwrev = 0; /* null terminate string */
383+ printf("Product Name = %s\n",cid->name);
384+ printf("Serial Number = %02x%02x%02x\n",
385+ cid->sn[0], cid->sn[1], cid->sn[2]);
386+ printf("Month = %d\n",cid->month);
387+ printf("Year = %d\n",1997 + cid->year);
388+}
389+
390+static void print_sd_cid(const struct sd_cid *cid)
391+{
392+ printf("Manufacturer: 0x%02x, OEM \"%c%c\"\n",
393+ cid->mid, cid->oid_0, cid->oid_1);
394+ printf("Product name: \"%c%c%c%c%c\", revision %d.%d\n",
395+ cid->pnm_0, cid->pnm_1, cid->pnm_2, cid->pnm_3, cid->pnm_4,
396+ cid->prv >> 4, cid->prv & 15);
397+ printf("Serial number: %u\n",
398+ cid->psn_0 << 24 | cid->psn_1 << 16 | cid->psn_2 << 8 |
399+ cid->psn_3);
400+ printf("Manufacturing date: %d/%d\n",
401+ cid->mdt_1 & 15,
402+ 2000+((cid->mdt_0 & 15) << 4)+((cid->mdt_1 & 0xf0) >> 4));
403+ printf("CRC: 0x%02x, b0 = %d\n",
404+ cid->crc >> 1, cid->crc & 1);
405+}
406+
407+int mmc_init(int verbose)
408+{
409+ int retries, rc = -ENODEV;
410+ int is_sd = 0;
411+ u_int32_t *resp;
412+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
413+
414+ sdi = S3C2410_GetBase_SDI();
415+
416+ debug("mmc_init(PCLK=%u)\n", get_PCLK());
417+
418+ clk_power->CLKCON |= (1 << 9);
419+
420+ /* S3C2410 has some bug that prevents reliable operation at higher speed */
421+ //sdi->SDIPRE = 0x3e; /* SDCLK = PCLK/2 / (SDIPRE+1) = 396kHz */
422+ sdi->SDIPRE = 0x02; /* SDCLK = PCLK/2 / (SDIPRE+1) = 396kHz */
423+ sdi->SDIBSIZE = 512;
424+ sdi->SDIDTIMER = 0xffff;
425+ sdi->SDIIMSK = 0x0;
426+ sdi->SDICON = S3C2410_SDICON_FIFORESET|S3C2440_SDICON_MMCCLOCK;
427+ udelay(125000); /* FIXME: 74 SDCLK cycles */
428+
429+ mmc_csd.c_size = 0;
430+
431+ /* reset */
432+ retries = 10;
433+ resp = mmc_cmd(MMC_CMD_RESET, 0, 0);
434+
435+ printf("trying to detect SD Card...\n");
436+ while (retries--) {
437+ udelay(100000);
438+ resp = mmc_cmd(55, 0x00000000, CMD_F_RESP);
439+ resp = mmc_cmd(41, 0x00300000, CMD_F_RESP);
440+
441+ if (resp[0] & (1 << 31)) {
442+ is_sd = 1;
443+ break;
444+ }
445+ }
446+
447+ if (retries == 0 && !is_sd) {
448+ retries = 10;
449+ printf("failed to detect SD Card, trying MMC\n");
450+ resp = mmc_cmd(MMC_CMD_SEND_OP_COND, 0x00ffc000, CMD_F_RESP);
451+ while (retries-- && resp && !(resp[4] & 0x80)) {
452+ debug("resp %x %x\n", resp[0], resp[1]);
453+ udelay(50);
454+ resp = mmc_cmd(1, 0x00ffff00, CMD_F_RESP);
455+ }
456+ }
457+
458+ /* try to get card id */
459+ resp = mmc_cmd(MMC_CMD_ALL_SEND_CID, 0, CMD_F_RESP|CMD_F_RESP_LONG);
460+ if (resp) {
461+ if (!is_sd) {
462+ /* TODO configure mmc driver depending on card
463+ attributes */
464+ mmc_cid_t *cid = (mmc_cid_t *)resp;
465+
466+ if (verbose)
467+ print_mmc_cid(cid);
468+ sprintf((char *) mmc_dev.vendor,
469+ "Man %02x%02x%02x Snr %02x%02x%02x",
470+ cid->id[0], cid->id[1], cid->id[2],
471+ cid->sn[0], cid->sn[1], cid->sn[2]);
472+ sprintf((char *) mmc_dev.product,"%s",cid->name);
473+ sprintf((char *) mmc_dev.revision,"%x %x",
474+ cid->hwrev, cid->fwrev);
475+ }
476+ else {
477+ struct sd_cid *cid = (struct sd_cid *) resp;
478+
479+ if (verbose)
480+ print_sd_cid(cid);
481+ sprintf((char *) mmc_dev.vendor,
482+ "Man %02 OEM %c%c \"%c%c%c%c%c\"",
483+ cid->mid, cid->oid_0, cid->oid_1,
484+ cid->pnm_0, cid->pnm_1, cid->pnm_2, cid->pnm_3,
485+ cid->pnm_4);
486+ sprintf((char *) mmc_dev.product, "%d",
487+ cid->psn_0 << 24 | cid->psn_1 << 16 |
488+ cid->psn_2 << 8 | cid->psn_3);
489+ sprintf((char *) mmc_dev.revision, "%d.%d",
490+ cid->prv >> 4, cid->prv & 15);
491+ }
492+
493+ /* fill in device description */
494+ mmc_dev.if_type = IF_TYPE_MMC;
495+ mmc_dev.part_type = PART_TYPE_DOS;
496+ mmc_dev.dev = 0;
497+ mmc_dev.lun = 0;
498+ mmc_dev.type = 0;
499+ /* FIXME fill in the correct size (is set to 32MByte) */
500+ mmc_dev.blksz = 512;
501+ mmc_dev.lba = 0x10000;
502+ mmc_dev.removable = 0;
503+ mmc_dev.block_read = mmc_bread;
504+
505+ /* MMC exists, get CSD too */
506+ resp = mmc_cmd(MMC_CMD_SET_RCA, MMC_DEFAULT_RCA, CMD_F_RESP);
507+ if (is_sd)
508+ rca = resp[0] >> 16;
509+
510+ resp = mmc_cmd(MMC_CMD_SEND_CSD, rca<<16, CMD_F_RESP|CMD_F_RESP_LONG);
511+ if (resp) {
512+ mmc_csd_t *csd = (mmc_csd_t *)resp;
513+ memcpy(&mmc_csd, csd, sizeof(csd));
514+ rc = 0;
515+ mmc_ready = 1;
516+ /* FIXME add verbose printout for csd */
517+ printf("READ_BL_LEN=%u, C_SIZE_MULT=%u, C_SIZE=%u\n",
518+ csd->read_bl_len, csd->c_size_mult1, csd->c_size);
519+ printf("size = %u\n", mmc_size(csd));
520+ }
521+ }
522+
523+ resp = mmc_cmd(MMC_CMD_SELECT_CARD, rca<<16, CMD_F_RESP);
524+
525+#ifdef CONFIG_MMC_WIDE
526+ if (is_sd) {
527+ resp = mmc_cmd(55, rca<<16, CMD_F_RESP);
528+ resp = mmc_cmd(6, 0x02, CMD_F_RESP);
529+ wide = 1;
530+ }
531+#endif
532+
533+ fat_register_device(&mmc_dev,1); /* partitions start counting with 1 */
534+
535+ return rc;
536+}
537+
538+int
539+mmc_ident(block_dev_desc_t *dev)
540+{
541+ return 0;
542+}
543+
544+int
545+mmc2info(ulong addr)
546+{
547+ /* FIXME hard codes to 32 MB device */
548+ if (addr >= CFG_MMC_BASE && addr < CFG_MMC_BASE + 0x02000000)
549+ return 1;
550+
551+ return 0;
552+}
553+
554+#endif /* CONFIG_MMC */
555Index: u-boot/include/asm-arm/arch-s3c24x0/mmc.h
556===================================================================
557--- /dev/null
558+++ u-boot/include/asm-arm/arch-s3c24x0/mmc.h
559@@ -0,0 +1,112 @@
560+/*
561+ * linux/drivers/mmc/mmc_pxa.h
562+ *
563+ * Author: Vladimir Shebordaev, Igor Oblakov
564+ * Copyright: MontaVista Software Inc.
565+ *
566+ * $Id: mmc_pxa.h,v 0.3.1.6 2002/09/25 19:25:48 ted Exp ted $
567+ *
568+ * This program is free software; you can redistribute it and/or modify
569+ * it under the terms of the GNU General Public License version 2 as
570+ * published by the Free Software Foundation.
571+ */
572+#ifndef __MMC_PXA_P_H__
573+#define __MMC_PXA_P_H__
574+
575+#include <asm/arch/regs-sdi.h>
576+
577+#define MMC_DEFAULT_RCA (1<<16)
578+
579+#define MMC_BLOCK_SIZE 512
580+#define MMC_CMD_RESET 0
581+#define MMC_CMD_SEND_OP_COND 1
582+#define MMC_CMD_ALL_SEND_CID 2
583+#define MMC_CMD_SET_RCA 3
584+#define MMC_CMD_SELECT_CARD 7
585+#define MMC_CMD_SEND_CSD 9
586+#define MMC_CMD_SEND_CID 10
587+#define MMC_CMD_SEND_STATUS 13
588+#define MMC_CMD_SET_BLOCKLEN 16
589+#define MMC_CMD_READ_BLOCK 17
590+#define MMC_CMD_RD_BLK_MULTI 18
591+#define MMC_CMD_WRITE_BLOCK 24
592+
593+#define MMC_MAX_BLOCK_SIZE 512
594+
595+#define MMC_R1_IDLE_STATE 0x01
596+#define MMC_R1_ERASE_STATE 0x02
597+#define MMC_R1_ILLEGAL_CMD 0x04
598+#define MMC_R1_COM_CRC_ERR 0x08
599+#define MMC_R1_ERASE_SEQ_ERR 0x01
600+#define MMC_R1_ADDR_ERR 0x02
601+#define MMC_R1_PARAM_ERR 0x04
602+
603+#define MMC_R1B_WP_ERASE_SKIP 0x0002
604+#define MMC_R1B_ERR 0x0004
605+#define MMC_R1B_CC_ERR 0x0008
606+#define MMC_R1B_CARD_ECC_ERR 0x0010
607+#define MMC_R1B_WP_VIOLATION 0x0020
608+#define MMC_R1B_ERASE_PARAM 0x0040
609+#define MMC_R1B_OOR 0x0080
610+#define MMC_R1B_IDLE_STATE 0x0100
611+#define MMC_R1B_ERASE_RESET 0x0200
612+#define MMC_R1B_ILLEGAL_CMD 0x0400
613+#define MMC_R1B_COM_CRC_ERR 0x0800
614+#define MMC_R1B_ERASE_SEQ_ERR 0x1000
615+#define MMC_R1B_ADDR_ERR 0x2000
616+#define MMC_R1B_PARAM_ERR 0x4000
617+
618+typedef struct mmc_cid
619+{
620+ /* FIXME: BYTE_ORDER */
621+ uchar year:4,
622+ month:4;
623+ uchar sn[3];
624+ uchar fwrev:4,
625+ hwrev:4;
626+ uchar name[6];
627+ uchar id[3];
628+} mmc_cid_t;
629+
630+typedef struct mmc_csd
631+{
632+ uchar ecc:2,
633+ file_format:2,
634+ tmp_write_protect:1,
635+ perm_write_protect:1,
636+ copy:1,
637+ file_format_grp:1;
638+ uint64_t content_prot_app:1,
639+ rsvd3:4,
640+ write_bl_partial:1,
641+ write_bl_len:4,
642+ r2w_factor:3,
643+ default_ecc:2,
644+ wp_grp_enable:1,
645+ wp_grp_size:5,
646+ erase_grp_mult:5,
647+ erase_grp_size:5,
648+ c_size_mult1:3,
649+ vdd_w_curr_max:3,
650+ vdd_w_curr_min:3,
651+ vdd_r_curr_max:3,
652+ vdd_r_curr_min:3,
653+ c_size:12,
654+ rsvd2:2,
655+ dsr_imp:1,
656+ read_blk_misalign:1,
657+ write_blk_misalign:1,
658+ read_bl_partial:1;
659+
660+ ushort read_bl_len:4,
661+ ccc:12;
662+ uchar tran_speed;
663+ uchar nsac;
664+ uchar taac;
665+ uchar rsvd1:2,
666+ spec_vers:4,
667+ csd_structure:2;
668+} mmc_csd_t;
669+
670+
671+#endif /* __MMC_PXA_P_H__ */
672Index: u-boot/include/asm-arm/arch-s3c24x0/regs-sdi.h
673===================================================================
674--- /dev/null
675+++ u-boot/include/asm-arm/arch-s3c24x0/regs-sdi.h
676@@ -0,0 +1,110 @@
677+/* linux/include/asm/arch-s3c2410/regs-sdi.h
678+ *
679+ * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>
680+ * http://www.simtec.co.uk/products/SWLINUX/
681+ *
682+ * This program is free software; you can redistribute it and/or modify
683+ * it under the terms of the GNU General Public License version 2 as
684+ * published by the Free Software Foundation.
685+ *
686+ * S3C2410 MMC/SDIO register definitions
687+ *
688+ * Changelog:
689+ * 18-Aug-2004 Ben Dooks Created initial file
690+ * 29-Nov-2004 Koen Martens Added some missing defines, fixed duplicates
691+ * 29-Nov-2004 Ben Dooks Updated Koen's patch
692+*/
693+
694+#ifndef __ASM_ARM_REGS_SDI
695+#define __ASM_ARM_REGS_SDI "regs-sdi.h"
696+
697+#define S3C2440_SDICON_SDRESET (1<<8)
698+#define S3C2440_SDICON_MMCCLOCK (1<<5)
699+#define S3C2410_SDICON_BYTEORDER (1<<4)
700+#define S3C2410_SDICON_SDIOIRQ (1<<3)
701+#define S3C2410_SDICON_RWAITEN (1<<2)
702+#define S3C2410_SDICON_FIFORESET (1<<1)
703+#define S3C2410_SDICON_CLOCKTYPE (1<<0)
704+
705+#define S3C2410_SDICMDCON_ABORT (1<<12)
706+#define S3C2410_SDICMDCON_WITHDATA (1<<11)
707+#define S3C2410_SDICMDCON_LONGRSP (1<<10)
708+#define S3C2410_SDICMDCON_WAITRSP (1<<9)
709+#define S3C2410_SDICMDCON_CMDSTART (1<<8)
710+#define S3C2410_SDICMDCON_SENDERHOST (1<<6)
711+#define S3C2410_SDICMDCON_INDEX (0x3f)
712+
713+#define S3C2410_SDICMDSTAT_CRCFAIL (1<<12)
714+#define S3C2410_SDICMDSTAT_CMDSENT (1<<11)
715+#define S3C2410_SDICMDSTAT_CMDTIMEOUT (1<<10)
716+#define S3C2410_SDICMDSTAT_RSPFIN (1<<9)
717+#define S3C2410_SDICMDSTAT_XFERING (1<<8)
718+#define S3C2410_SDICMDSTAT_INDEX (0xff)
719+
720+#define S3C2440_SDIDCON_DS_BYTE (0<<22)
721+#define S3C2440_SDIDCON_DS_HALFWORD (1<<22)
722+#define S3C2440_SDIDCON_DS_WORD (2<<22)
723+#define S3C2410_SDIDCON_IRQPERIOD (1<<21)
724+#define S3C2410_SDIDCON_TXAFTERRESP (1<<20)
725+#define S3C2410_SDIDCON_RXAFTERCMD (1<<19)
726+#define S3C2410_SDIDCON_BUSYAFTERCMD (1<<18)
727+#define S3C2410_SDIDCON_BLOCKMODE (1<<17)
728+#define S3C2410_SDIDCON_WIDEBUS (1<<16)
729+#define S3C2410_SDIDCON_DMAEN (1<<15)
730+#define S3C2410_SDIDCON_STOP (1<<14)
731+#define S3C2440_SDIDCON_DATSTART (1<<14)
732+#define S3C2410_SDIDCON_DATMODE (3<<12)
733+#define S3C2410_SDIDCON_BLKNUM (0x7ff)
734+
735+/* constants for S3C2410_SDIDCON_DATMODE */
736+#define S3C2410_SDIDCON_XFER_READY (0<<12)
737+#define S3C2410_SDIDCON_XFER_CHKSTART (1<<12)
738+#define S3C2410_SDIDCON_XFER_RXSTART (2<<12)
739+#define S3C2410_SDIDCON_XFER_TXSTART (3<<12)
740+
741+#define S3C2410_SDIDCNT_BLKNUM_MASK (0xFFF)
742+#define S3C2410_SDIDCNT_BLKNUM_SHIFT (12)
743+
744+#define S3C2410_SDIDSTA_RDYWAITREQ (1<<10)
745+#define S3C2410_SDIDSTA_SDIOIRQDETECT (1<<9)
746+#define S3C2410_SDIDSTA_FIFOFAIL (1<<8) /* reserved on 2440 */
747+#define S3C2410_SDIDSTA_CRCFAIL (1<<7)
748+#define S3C2410_SDIDSTA_RXCRCFAIL (1<<6)
749+#define S3C2410_SDIDSTA_DATATIMEOUT (1<<5)
750+#define S3C2410_SDIDSTA_XFERFINISH (1<<4)
751+#define S3C2410_SDIDSTA_BUSYFINISH (1<<3)
752+#define S3C2410_SDIDSTA_SBITERR (1<<2) /* reserved on 2410a/2440 */
753+#define S3C2410_SDIDSTA_TXDATAON (1<<1)
754+#define S3C2410_SDIDSTA_RXDATAON (1<<0)
755+
756+#define S3C2440_SDIFSTA_FIFORESET (1<<16)
757+#define S3C2440_SDIFSTA_FIFOFAIL (3<<14) /* 3 is correct (2 bits) */
758+#define S3C2410_SDIFSTA_TFDET (1<<13)
759+#define S3C2410_SDIFSTA_RFDET (1<<12)
760+#define S3C2410_SDIFSTA_TFHALF (1<<11)
761+#define S3C2410_SDIFSTA_TFEMPTY (1<<10)
762+#define S3C2410_SDIFSTA_RFLAST (1<<9)
763+#define S3C2410_SDIFSTA_RFFULL (1<<8)
764+#define S3C2410_SDIFSTA_RFHALF (1<<7)
765+#define S3C2410_SDIFSTA_COUNTMASK (0x7f)
766+
767+#define S3C2410_SDIIMSK_RESPONSECRC (1<<17)
768+#define S3C2410_SDIIMSK_CMDSENT (1<<16)
769+#define S3C2410_SDIIMSK_CMDTIMEOUT (1<<15)
770+#define S3C2410_SDIIMSK_RESPONSEND (1<<14)
771+#define S3C2410_SDIIMSK_READWAIT (1<<13)
772+#define S3C2410_SDIIMSK_SDIOIRQ (1<<12)
773+#define S3C2410_SDIIMSK_FIFOFAIL (1<<11)
774+#define S3C2410_SDIIMSK_CRCSTATUS (1<<10)
775+#define S3C2410_SDIIMSK_DATACRC (1<<9)
776+#define S3C2410_SDIIMSK_DATATIMEOUT (1<<8)
777+#define S3C2410_SDIIMSK_DATAFINISH (1<<7)
778+#define S3C2410_SDIIMSK_BUSYFINISH (1<<6)
779+#define S3C2410_SDIIMSK_SBITERR (1<<5) /* reserved 2440/2410a */
780+#define S3C2410_SDIIMSK_TXFIFOHALF (1<<4)
781+#define S3C2410_SDIIMSK_TXFIFOEMPTY (1<<3)
782+#define S3C2410_SDIIMSK_RXFIFOLAST (1<<2)
783+#define S3C2410_SDIIMSK_RXFIFOFULL (1<<1)
784+#define S3C2410_SDIIMSK_RXFIFOHALF (1<<0)
785+
786+#endif /* __ASM_ARM_REGS_SDI */
787Index: u-boot/include/s3c24x0.h
788===================================================================
789--- u-boot.orig/include/s3c24x0.h
790+++ u-boot/include/s3c24x0.h
791@@ -637,13 +637,7 @@
792 S3C24X0_REG32 SDIDCNT;
793 S3C24X0_REG32 SDIDSTA;
794 S3C24X0_REG32 SDIFSTA;
795-#ifdef __BIG_ENDIAN
796- S3C24X0_REG8 res[3];
797- S3C24X0_REG8 SDIDAT;
798-#else
799- S3C24X0_REG8 SDIDAT;
800- S3C24X0_REG8 res[3];
801-#endif
802+ S3C24X0_REG32 SDIDAT;
803 S3C24X0_REG32 SDIIMSK;
804 } /*__attribute__((__packed__))*/ S3C2410_SDI;
805
806@@ -1123,11 +1117,7 @@
807 #define rSDIDatCnt (*(volatile unsigned *)0x5A000030)
808 #define rSDIDatSta (*(volatile unsigned *)0x5A000034)
809 #define rSDIFSTA (*(volatile unsigned *)0x5A000038)
810-#ifdef __BIG_ENDIAN
811-#define rSDIDAT (*(volatile unsigned char *)0x5A00003F)
812-#else
813-#define rSDIDAT (*(volatile unsigned char *)0x5A00003C)
814-#endif
815+#define rSDIDAT (*(volatile unsigned *)0x5A00003C)
816 #define rSDIIntMsk (*(volatile unsigned *)0x5A000040)
817
818 #endif
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-01-12 13:38:03 +0000