1 files changed, 45 insertions, 0 deletions
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch
new file mode 100644
index 0000000000..6efe24651a
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch
@@ -0,0 +1,45 @@
+Index: u-boot/include/s3c2410.h
+===================================================================
+--- u-boot.orig/include/s3c2410.h
+++ u-boot/include/s3c2410.h
+@@ -233,4 +233,40 @@ static inline S3C2410_SDI * S3C2410_GetB
+                 rINTPND;\
+                 }
+ /* Wait until rINTPND is changed for the case that the ISR is very short. */
+
+#define S3C2410_MISCCR_USBDEV      (0<<3)
+#define S3C2410_MISCCR_USBHOST     (1<<3)
+
+#define S3C2410_MISCCR_CLK0_MPLL    (0<<4)
+#define S3C2410_MISCCR_CLK0_UPLL    (1<<4)
+#define S3C2410_MISCCR_CLK0_FCLK    (2<<4)
+#define S3C2410_MISCCR_CLK0_HCLK    (3<<4)
+#define S3C2410_MISCCR_CLK0_PCLK    (4<<4)
+#define S3C2410_MISCCR_CLK0_DCLK0   (5<<4)
+#define S3C2410_MISCCR_CLK0_MASK    (7<<4)
+
+#define S3C2410_MISCCR_CLK1_MPLL    (0<<8)
+#define S3C2410_MISCCR_CLK1_UPLL    (1<<8)
+#define S3C2410_MISCCR_CLK1_FCLK    (2<<8)
+#define S3C2410_MISCCR_CLK1_HCLK    (3<<8)
+#define S3C2410_MISCCR_CLK1_PCLK    (4<<8)
+#define S3C2410_MISCCR_CLK1_DCLK1   (5<<8)
+#define S3C2410_MISCCR_CLK1_MASK    (7<<8)
+
+#define S3C2410_MISCCR_USBSUSPND0   (1<<12)
+#define S3C2410_MISCCR_USBSUSPND1   (1<<13)
+
+#define S3C2410_MISCCR_nRSTCON     (1<<16)
+
+#define S3C2410_MISCCR_nEN_SCLK0    (1<<17)
+#define S3C2410_MISCCR_nEN_SCLK1    (1<<18)
+#define S3C2410_MISCCR_nEN_SCLKE    (1<<19)
+#define S3C2410_MISCCR_SDSLEEP     (7<<17)
+
+#define S3C2410_CLKSLOW_UCLK_OFF       (1<<7)
+#define S3C2410_CLKSLOW_MPLL_OFF       (1<<5)
+#define S3C2410_CLKSLOW_SLOW           (1<<4)
+#define S3C2410_CLKSLOW_SLOWVAL(x)     (x)
+#define S3C2410_CLKSLOW_GET_SLOWVAL(x) ((x) & 7)
+
+ #endif /*__S3C2410_H__*/

diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch new file mode 100644 index 0000000000..6efe24651a --- /dev/null +++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch
@@ -0,0 +1,45 @@
	1	Index: u-boot/include/s3c2410.h
	2	===================================================================
	3	--- u-boot.orig/include/s3c2410.h
	4	+++ u-boot/include/s3c2410.h
	5	@@ -233,4 +233,40 @@ static inline S3C2410_SDI * S3C2410_GetB
	6	rINTPND;\
	7	}
	8	/* Wait until rINTPND is changed for the case that the ISR is very short. */
	9	+
	10	+#define S3C2410_MISCCR_USBDEV (0<<3)
	11	+#define S3C2410_MISCCR_USBHOST (1<<3)
	12	+
	13	+#define S3C2410_MISCCR_CLK0_MPLL (0<<4)
	14	+#define S3C2410_MISCCR_CLK0_UPLL (1<<4)
	15	+#define S3C2410_MISCCR_CLK0_FCLK (2<<4)
	16	+#define S3C2410_MISCCR_CLK0_HCLK (3<<4)
	17	+#define S3C2410_MISCCR_CLK0_PCLK (4<<4)
	18	+#define S3C2410_MISCCR_CLK0_DCLK0 (5<<4)
	19	+#define S3C2410_MISCCR_CLK0_MASK (7<<4)
	20	+
	21	+#define S3C2410_MISCCR_CLK1_MPLL (0<<8)
	22	+#define S3C2410_MISCCR_CLK1_UPLL (1<<8)
	23	+#define S3C2410_MISCCR_CLK1_FCLK (2<<8)
	24	+#define S3C2410_MISCCR_CLK1_HCLK (3<<8)
	25	+#define S3C2410_MISCCR_CLK1_PCLK (4<<8)
	26	+#define S3C2410_MISCCR_CLK1_DCLK1 (5<<8)
	27	+#define S3C2410_MISCCR_CLK1_MASK (7<<8)
	28	+
	29	+#define S3C2410_MISCCR_USBSUSPND0 (1<<12)
	30	+#define S3C2410_MISCCR_USBSUSPND1 (1<<13)
	31	+
	32	+#define S3C2410_MISCCR_nRSTCON (1<<16)
	33	+
	34	+#define S3C2410_MISCCR_nEN_SCLK0 (1<<17)
	35	+#define S3C2410_MISCCR_nEN_SCLK1 (1<<18)
	36	+#define S3C2410_MISCCR_nEN_SCLKE (1<<19)
	37	+#define S3C2410_MISCCR_SDSLEEP (7<<17)
	38	+
	39	+#define S3C2410_CLKSLOW_UCLK_OFF (1<<7)
	40	+#define S3C2410_CLKSLOW_MPLL_OFF (1<<5)
	41	+#define S3C2410_CLKSLOW_SLOW (1<<4)
	42	+#define S3C2410_CLKSLOW_SLOWVAL(x) (x)
	43	+#define S3C2410_CLKSLOW_GET_SLOWVAL(x) ((x) & 7)
	44	+
	45	#endif /__S3C2410_H__/