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-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-cmd_s3c2410.patch175
1 files changed, 175 insertions, 0 deletions
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-cmd_s3c2410.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-cmd_s3c2410.patch
new file mode 100644
index 0000000000..993ef4f6f2
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-cmd_s3c2410.patch
@@ -0,0 +1,175 @@
1This patch adds a new 's3c2410' command which currently supports 's3c2410 speed
2{set,get,list} and thus allows dynamic change of the CPU clock.
3
4Signed-off-by: Harald Welte <laforge@openmoko.org>
5
6Index: u-boot/cpu/arm920t/s3c24x0/Makefile
7===================================================================
8--- u-boot.orig/cpu/arm920t/s3c24x0/Makefile 2007-02-24 15:14:00.000000000 +0100
9+++ u-boot/cpu/arm920t/s3c24x0/Makefile 2007-02-24 15:21:02.000000000 +0100
10@@ -26,7 +26,7 @@
11 LIB = $(obj)lib$(SOC).a
12
13 COBJS = i2c.o interrupts.o serial.o speed.o \
14- usb_ohci.o nand_read.o nand.o
15+ usb_ohci.o nand_read.o nand.o cmd_s3c2410.o
16
17 SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
18 OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
19Index: u-boot/cpu/arm920t/s3c24x0/cmd_s3c2410.c
20===================================================================
21--- /dev/null 1970-01-01 00:00:00.000000000 +0000
22+++ u-boot/cpu/arm920t/s3c24x0/cmd_s3c2410.c 2007-02-24 15:22:17.000000000 +0100
23@@ -0,0 +1,152 @@
24+/*
25+ * (C) Copyright 2006 by OpenMoko, Inc.
26+ * Author: Harald Welte <laforge@openmoko.org>
27+ *
28+ * See file CREDITS for list of people who contributed to this
29+ * project.
30+ *
31+ * This program is free software; you can redistribute it and/or
32+ * modify it under the terms of the GNU General Public License as
33+ * published by the Free Software Foundation; either version 2 of
34+ * the License, or (at your option) any later version.
35+ *
36+ * This program is distributed in the hope that it will be useful,
37+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
38+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
39+ * GNU General Public License for more details.
40+ *
41+ * You should have received a copy of the GNU General Public License
42+ * along with this program; if not, write to the Free Software
43+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
44+ * MA 02111-1307 USA
45+ */
46+
47+/*
48+ * Boot support
49+ */
50+#include <common.h>
51+#include <command.h>
52+#include <net.h> /* for print_IPaddr */
53+#include <s3c2410.h>
54+
55+DECLARE_GLOBAL_DATA_PTR;
56+
57+#if (CONFIG_COMMANDS & CFG_CMD_BDI)
58+
59+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
60+#define MHZ 1000000
61+
62+static void print_cpu_speed(void)
63+{
64+ printf("FCLK = %u MHz, HCLK = %u MHz, PCLK = %u MHz\n",
65+ get_FCLK()/MHZ, get_HCLK()/MHZ, get_PCLK()/MHZ);
66+}
67+
68+struct s3c2410_pll_speed {
69+ u_int16_t mhz;
70+ u_int32_t mpllcon;
71+ u_int32_t clkdivn;
72+};
73+
74+#define CLKDIVN_1_1_1 0x00
75+#define CLKDIVN_1_2_2 0x02
76+#define CLKDIVN_1_2_4 0x03
77+#define CLKDIVN_1_4_4 0x04
78+
79+static const struct s3c2410_pll_speed pll_configs[] = {
80+ {
81+ .mhz = 50,
82+ .mpllcon = ((0x5c << 12) + (0x4 << 4) + 0x2),
83+ .clkdivn = CLKDIVN_1_1_1,
84+ },
85+ {
86+ .mhz = 101,
87+ .mpllcon = ((0x7f << 12) + (0x2 << 4) + 0x2),
88+ .clkdivn = CLKDIVN_1_2_2,
89+ },
90+ {
91+ .mhz = 202,
92+ .mpllcon = ((0x90 << 12) + (0x7 << 4) + 0x0),
93+ .clkdivn = CLKDIVN_1_2_4,
94+ },
95+ {
96+ .mhz = 266,
97+ .mpllcon = ((0x7d << 12) + (0x1 << 4) + 0x1),
98+ .clkdivn = CLKDIVN_1_2_4,
99+ },
100+};
101+
102+static void list_cpu_speeds(void)
103+{
104+ int i;
105+ for (i = 0; i < ARRAY_SIZE(pll_configs); i++)
106+ printf("%u MHz\n", pll_configs[i].mhz);
107+}
108+
109+static int reconfig_mpll(u_int16_t mhz)
110+{
111+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
112+ int i;
113+
114+ for (i = 0; i < ARRAY_SIZE(pll_configs); i++) {
115+ if (pll_configs[i].mhz == mhz) {
116+ /* to reduce PLL lock time, adjust the LOCKTIME register */
117+ clk_power->LOCKTIME = 0xFFFFFF;
118+
119+ /* configure MPLL */
120+ clk_power->MPLLCON = pll_configs[i].mpllcon;
121+ clk_power->UPLLCON = ((0x78 << 12) + (0x2 << 4) + 0x3),
122+ clk_power->CLKDIVN = pll_configs[i].clkdivn;
123+
124+ /* If we changed the speed, we need to re-configure
125+ * the serial baud rate generator */
126+ serial_setbrg();
127+ return 0;
128+ }
129+ }
130+ return -1;
131+}
132+
133+int do_s3c2410 ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
134+{
135+ if (!strcmp(argv[1], "speed")) {
136+ if (argc < 2)
137+ goto out_help;
138+ if (!strcmp(argv[2], "get"))
139+ print_cpu_speed();
140+ else if (!strcmp(argv[2], "list"))
141+ list_cpu_speeds();
142+ else if (!strcmp(argv[2], "set")) {
143+ unsigned long mhz;
144+ if (argc < 3)
145+ goto out_help;
146+
147+ mhz = simple_strtoul(argv[3], NULL, 10);
148+
149+ if (reconfig_mpll(mhz) < 0)
150+ printf("error, speed %uMHz unknown\n", mhz);
151+ else
152+ print_cpu_speed();
153+ } else
154+ goto out_help;
155+ } else {
156+out_help:
157+ printf("Usage:\n%s\n", cmdtp->usage);
158+ return 1;
159+ }
160+
161+ return 0;
162+}
163+
164+/* -------------------------------------------------------------------- */
165+
166+
167+U_BOOT_CMD(
168+ s3c2410, 4, 1, do_s3c2410,
169+ "s3c2410 - SoC specific commands\n",
170+ "speed get - display current PLL speed config\n"
171+ "s3c2410 speed list - display supporte PLL speed configs\n"
172+ "s3c2410 speed set - set PLL speed\n"
173+);
174+
175+#endif
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