diff options
Diffstat (limited to 'meta/packages/linux/linux-omap3-pm-git/zoom2/0001-OMAP3-MMC-Add-mux-for-pins.patch')
-rw-r--r-- | meta/packages/linux/linux-omap3-pm-git/zoom2/0001-OMAP3-MMC-Add-mux-for-pins.patch | 170 |
1 files changed, 170 insertions, 0 deletions
diff --git a/meta/packages/linux/linux-omap3-pm-git/zoom2/0001-OMAP3-MMC-Add-mux-for-pins.patch b/meta/packages/linux/linux-omap3-pm-git/zoom2/0001-OMAP3-MMC-Add-mux-for-pins.patch new file mode 100644 index 0000000000..70db8219ae --- /dev/null +++ b/meta/packages/linux/linux-omap3-pm-git/zoom2/0001-OMAP3-MMC-Add-mux-for-pins.patch | |||
@@ -0,0 +1,170 @@ | |||
1 | From be0e1c0f2f529d6f5adb9c5050731d881874c34b Mon Sep 17 00:00:00 2001 | ||
2 | From: Vikram Pandita <vikram.pandita@ti.com> | ||
3 | Date: Thu, 18 Jun 2009 13:40:08 -0500 | ||
4 | Subject: [PATCH 1/8] OMAP3: MMC: Add mux for pins | ||
5 | |||
6 | For OMAP3 add MMC1 MMC2 pin mux | ||
7 | |||
8 | Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> | ||
9 | Signed-off-by: Chikkature Rajashekar <madhu.cr@ti.com> | ||
10 | --- | ||
11 | arch/arm/mach-omap2/devices.c | 42 ++++++++++++++++++++++++++++ | ||
12 | arch/arm/mach-omap2/mux.c | 49 +++++++++++++++++++++++++++++++++ | ||
13 | arch/arm/plat-omap/include/mach/mux.h | 28 +++++++++++++++++++ | ||
14 | 3 files changed, 119 insertions(+), 0 deletions(-) | ||
15 | |||
16 | diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c | ||
17 | index 81f47d9..243815e 100644 | ||
18 | --- a/arch/arm/mach-omap2/devices.c | ||
19 | +++ b/arch/arm/mach-omap2/devices.c | ||
20 | @@ -455,6 +455,48 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller, | ||
21 | omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); | ||
22 | } | ||
23 | } | ||
24 | + | ||
25 | + if (cpu_is_omap3430()) { | ||
26 | + if (controller_nr == 0) { | ||
27 | + omap_cfg_reg(N28_3430_MMC1_CLK); | ||
28 | + omap_cfg_reg(M27_3430_MMC1_CMD); | ||
29 | + omap_cfg_reg(N27_3430_MMC1_DAT0); | ||
30 | + if (mmc_controller->slots[0].wires == 4 || | ||
31 | + mmc_controller->slots[0].wires == 8) { | ||
32 | + omap_cfg_reg(N26_3430_MMC1_DAT1); | ||
33 | + omap_cfg_reg(N25_3430_MMC1_DAT2); | ||
34 | + omap_cfg_reg(P28_3430_MMC1_DAT3); | ||
35 | + } | ||
36 | + if (mmc_controller->slots[0].wires == 8) { | ||
37 | + omap_cfg_reg(P27_3430_MMC1_DAT4); | ||
38 | + omap_cfg_reg(P26_3430_MMC1_DAT5); | ||
39 | + omap_cfg_reg(R27_3430_MMC1_DAT6); | ||
40 | + omap_cfg_reg(R25_3430_MMC1_DAT7); | ||
41 | + } | ||
42 | + } | ||
43 | + if (controller_nr == 1) { | ||
44 | + /* MMC2 */ | ||
45 | + omap_cfg_reg(AE2_3430_MMC2_CLK); | ||
46 | + omap_cfg_reg(AG5_3430_MMC2_CMD); | ||
47 | + omap_cfg_reg(AH5_3430_MMC2_DAT0); | ||
48 | + if (mmc_controller->slots[0].wires == 4 || | ||
49 | + mmc_controller->slots[0].wires == 8) { | ||
50 | + omap_cfg_reg(AH4_3430_MMC2_DAT1); | ||
51 | + omap_cfg_reg(AG4_3430_MMC2_DAT2); | ||
52 | + omap_cfg_reg(AF4_3430_MMC2_DAT3); | ||
53 | + } | ||
54 | + if (mmc_controller->slots[0].wires == 8) | ||
55 | + printk(KERN_WARNING | ||
56 | + "\n MMC2: DAT4, DAT5, DAT6, DAT7: " | ||
57 | + "Setup the mux in board file"); | ||
58 | + } | ||
59 | + if (controller_nr == 2) { | ||
60 | + /* MMC3 */ | ||
61 | + printk(KERN_WARNING | ||
62 | + "\n MMC3: Setup the mux in board file: " | ||
63 | + "Multiple options exist, so is board specific"); | ||
64 | + } | ||
65 | + } | ||
66 | } | ||
67 | |||
68 | #define MAX_OMAP_MMC_HWMOD_NAME_LEN 16 | ||
69 | diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c | ||
70 | index 026c4fc..d49b9a7 100644 | ||
71 | --- a/arch/arm/mach-omap2/mux.c | ||
72 | +++ b/arch/arm/mach-omap2/mux.c | ||
73 | @@ -486,6 +486,55 @@ MUX_CFG_34XX("H19_34XX_GPIO164_OUT", 0x19c, | ||
74 | OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT) | ||
75 | MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6, | ||
76 | OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT) | ||
77 | +/* MMC1 */ | ||
78 | +MUX_CFG_34XX("N28_3430_MMC1_CLK", 0x144, | ||
79 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
80 | +MUX_CFG_34XX("M27_3430_MMC1_CMD", 0x146, | ||
81 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
82 | +MUX_CFG_34XX("N27_3430_MMC1_DAT0", 0x148, | ||
83 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
84 | +MUX_CFG_34XX("N26_3430_MMC1_DAT1", 0x14a, | ||
85 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
86 | +MUX_CFG_34XX("N25_3430_MMC1_DAT2", 0x14c, | ||
87 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
88 | +MUX_CFG_34XX("P28_3430_MMC1_DAT3", 0x14e, | ||
89 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
90 | +MUX_CFG_34XX("P27_3430_MMC1_DAT4", 0x150, | ||
91 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
92 | +MUX_CFG_34XX("P26_3430_MMC1_DAT5", 0x152, | ||
93 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
94 | +MUX_CFG_34XX("R27_3430_MMC1_DAT6", 0x154, | ||
95 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
96 | +MUX_CFG_34XX("R25_3430_MMC1_DAT7", 0x156, | ||
97 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
98 | + | ||
99 | +/* MMC2 */ | ||
100 | +MUX_CFG_34XX("AE2_3430_MMC2_CLK", 0x158, | ||
101 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
102 | +MUX_CFG_34XX("AG5_3430_MMC2_CMD", 0x15A, | ||
103 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
104 | +MUX_CFG_34XX("AH5_3430_MMC2_DAT0", 0x15c, | ||
105 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
106 | +MUX_CFG_34XX("AH4_3430_MMC2_DAT1", 0x15e, | ||
107 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
108 | +MUX_CFG_34XX("AG4_3430_MMC2_DAT2", 0x160, | ||
109 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
110 | +MUX_CFG_34XX("AF4_3430_MMC2_DAT3", 0x162, | ||
111 | + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
112 | + | ||
113 | +/* MMC3 */ | ||
114 | +MUX_CFG_34XX("AF10_3430_MMC3_CLK", 0x5d8, | ||
115 | + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) | ||
116 | +MUX_CFG_34XX("AC3_3430_MMC3_CMD", 0x1d0, | ||
117 | + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLUP) | ||
118 | +MUX_CFG_34XX("AE11_3430_MMC3_DAT0", 0x5e4, | ||
119 | + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) | ||
120 | +MUX_CFG_34XX("AH9_3430_MMC3_DAT1", 0x5e6, | ||
121 | + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) | ||
122 | +MUX_CFG_34XX("AF13_3430_MMC3_DAT2", 0x5e8, | ||
123 | + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) | ||
124 | +MUX_CFG_34XX("AF13_3430_MMC3_DAT3", 0x5e2, | ||
125 | + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) | ||
126 | }; | ||
127 | |||
128 | #define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) | ||
129 | diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h | ||
130 | index 85a6217..d24fdf9 100644 | ||
131 | --- a/arch/arm/plat-omap/include/mach/mux.h | ||
132 | +++ b/arch/arm/plat-omap/include/mach/mux.h | ||
133 | @@ -853,6 +853,34 @@ enum omap34xx_index { | ||
134 | AE5_34XX_GPIO143, | ||
135 | H19_34XX_GPIO164_OUT, | ||
136 | J25_34XX_GPIO170, | ||
137 | + | ||
138 | + /* MMC1 */ | ||
139 | + N28_3430_MMC1_CLK, | ||
140 | + M27_3430_MMC1_CMD, | ||
141 | + N27_3430_MMC1_DAT0, | ||
142 | + N26_3430_MMC1_DAT1, | ||
143 | + N25_3430_MMC1_DAT2, | ||
144 | + P28_3430_MMC1_DAT3, | ||
145 | + P27_3430_MMC1_DAT4, | ||
146 | + P26_3430_MMC1_DAT5, | ||
147 | + R27_3430_MMC1_DAT6, | ||
148 | + R25_3430_MMC1_DAT7, | ||
149 | + | ||
150 | + /* MMC2 */ | ||
151 | + AE2_3430_MMC2_CLK, | ||
152 | + AG5_3430_MMC2_CMD, | ||
153 | + AH5_3430_MMC2_DAT0, | ||
154 | + AH4_3430_MMC2_DAT1, | ||
155 | + AG4_3430_MMC2_DAT2, | ||
156 | + AF4_3430_MMC2_DAT3, | ||
157 | + | ||
158 | + /* MMC3 */ | ||
159 | + AF10_3430_MMC3_CLK, | ||
160 | + AC3_3430_MMC3_CMD, | ||
161 | + AE11_3430_MMC3_DAT0, | ||
162 | + AH9_3430_MMC3_DAT1, | ||
163 | + AF13_3430_MMC3_DAT2, | ||
164 | + AF13_3430_MMC3_DAT3, | ||
165 | }; | ||
166 | |||
167 | struct omap_mux_cfg { | ||
168 | -- | ||
169 | 1.6.3.2 | ||
170 | |||