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-rw-r--r--meta/packages/gcc/gcc-4.2.3/arm-crunch-64bit-disable-4.2.0.patch169
1 files changed, 169 insertions, 0 deletions
diff --git a/meta/packages/gcc/gcc-4.2.3/arm-crunch-64bit-disable-4.2.0.patch b/meta/packages/gcc/gcc-4.2.3/arm-crunch-64bit-disable-4.2.0.patch
new file mode 100644
index 0000000000..60b17852bd
--- /dev/null
+++ b/meta/packages/gcc/gcc-4.2.3/arm-crunch-64bit-disable-4.2.0.patch
@@ -0,0 +1,169 @@
1--- gcc-4.1.2/gcc/config/arm/cirrus.md-integer 2007-06-15 09:01:37.000000000 +1000
2+++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-15 09:04:45.000000000 +1000
3@@ -34,7 +34,7 @@
4 [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
5 (plus:DI (match_operand:DI 1 "cirrus_fp_register" "v")
6 (match_operand:DI 2 "cirrus_fp_register" "v")))]
7- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
8+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
9 "cfadd64%?\\t%V0, %V1, %V2"
10 [(set_attr "type" "mav_farith")
11 (set_attr "cirrus" "normal")]
12@@ -74,7 +74,7 @@
13 [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
14 (minus:DI (match_operand:DI 1 "cirrus_fp_register" "v")
15 (match_operand:DI 2 "cirrus_fp_register" "v")))]
16- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
17+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
18 "cfsub64%?\\t%V0, %V1, %V2"
19 [(set_attr "type" "mav_farith")
20 (set_attr "cirrus" "normal")]
21@@ -124,7 +124,7 @@
22 [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
23 (mult:DI (match_operand:DI 2 "cirrus_fp_register" "v")
24 (match_operand:DI 1 "cirrus_fp_register" "v")))]
25- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
26+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
27 "cfmul64%?\\t%V0, %V1, %V2"
28 [(set_attr "type" "mav_dmult")
29 (set_attr "cirrus" "normal")]
30@@ -206,7 +206,7 @@
31 [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
32 (ashift:DI (match_operand:DI 1 "cirrus_fp_register" "v")
33 (match_operand:SI 2 "register_operand" "r")))]
34- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
35+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
36 "cfrshl64%?\\t%V1, %V0, %s2"
37 [(set_attr "cirrus" "normal")]
38 )
39@@ -215,7 +215,7 @@
40 [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
41 (ashift:DI (match_operand:DI 1 "cirrus_fp_register" "v")
42 (match_operand:SI 2 "cirrus_shift_const" "")))]
43- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
44+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
45 "cfsh64%?\\t%V0, %V1, #%s2"
46 [(set_attr "cirrus" "normal")]
47 )
48@@ -224,7 +224,7 @@
49 [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
50 (ashiftrt:DI (match_operand:DI 1 "cirrus_fp_register" "v")
51 (match_operand:SI 2 "cirrus_shift_const" "")))]
52- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
53+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
54 "cfsh64%?\\t%V0, %V1, #-%s2"
55 [(set_attr "cirrus" "normal")]
56 )
57@@ -232,7 +232,7 @@
58 (define_insn "*cirrus_absdi2"
59 [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
60 (abs:DI (match_operand:DI 1 "cirrus_fp_register" "v")))]
61- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
62+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
63 "cfabs64%?\\t%V0, %V1"
64 [(set_attr "cirrus" "normal")]
65 )
66@@ -238,11 +238,12 @@
67 )
68
69 ;; This doesn't really clobber ``cc''. Fixme: aldyh.
70+;; maybe buggy?
71 (define_insn "*cirrus_negdi2"
72 [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
73 (neg:DI (match_operand:DI 1 "cirrus_fp_register" "v")))
74 (clobber (reg:CC CC_REGNUM))]
75- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
76+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
77 "cfneg64%?\\t%V0, %V1"
78 [(set_attr "cirrus" "normal")]
79 )
80@@ -324,14 +324,14 @@
81 (define_insn "floatdisf2"
82 [(set (match_operand:SF 0 "cirrus_fp_register" "=v")
83 (float:SF (match_operand:DI 1 "cirrus_fp_register" "v")))]
84- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
85+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
86 "cfcvt64s%?\\t%V0, %V1"
87 [(set_attr "cirrus" "normal")])
88
89 (define_insn "floatdidf2"
90 [(set (match_operand:DF 0 "cirrus_fp_register" "=v")
91 (float:DF (match_operand:DI 1 "cirrus_fp_register" "v")))]
92- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
93+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
94 "cfcvt64d%?\\t%V0, %V1"
95 [(set_attr "cirrus" "normal")])
96
97@@ -376,7 +376,7 @@
98 (define_insn "*cirrus_arm_movdi"
99 [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,o<>,v,r,v,m,v")
100 (match_operand:DI 1 "di_operand" "rIK,mi,r,r,v,mi,v,v"))]
101- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
102+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
103 "*
104 {
105 switch (which_alternative)
106--- gcc-4.1.2/gcc/config/arm/arm.md-64 2007-06-15 11:37:42.000000000 +1000
107+++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-15 11:40:45.000000000 +1000
108@@ -357,7 +357,7 @@
109 (clobber (reg:CC CC_REGNUM))])]
110 "TARGET_EITHER"
111 "
112- if (TARGET_HARD_FLOAT && TARGET_MAVERICK)
113+ if (TARGET_HARD_FLOAT && TARGET_MAVERICK && 0)
114 {
115 if (!cirrus_fp_register (operands[0], DImode))
116 operands[0] = force_reg (DImode, operands[0]);
117@@ -393,7 +393,7 @@
118 (plus:DI (match_operand:DI 1 "s_register_operand" "%0, 0")
119 (match_operand:DI 2 "s_register_operand" "r, 0")))
120 (clobber (reg:CC CC_REGNUM))]
121- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
122+ "TARGET_ARM"
123 "#"
124 "TARGET_ARM && reload_completed"
125 [(parallel [(set (reg:CC_C CC_REGNUM)
126@@ -421,7 +421,7 @@
127 (match_operand:SI 2 "s_register_operand" "r,r"))
128 (match_operand:DI 1 "s_register_operand" "r,0")))
129 (clobber (reg:CC CC_REGNUM))]
130- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
131+ "TARGET_ARM"
132 "#"
133 "TARGET_ARM && reload_completed"
134 [(parallel [(set (reg:CC_C CC_REGNUM)
135@@ -450,7 +450,7 @@
136 (match_operand:SI 2 "s_register_operand" "r,r"))
137 (match_operand:DI 1 "s_register_operand" "r,0")))
138 (clobber (reg:CC CC_REGNUM))]
139- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
140+ "TARGET_ARM"
141 "#"
142 "TARGET_ARM && reload_completed"
143 [(parallel [(set (reg:CC_C CC_REGNUM)
144@@ -838,7 +838,7 @@
145 if (TARGET_HARD_FLOAT && TARGET_MAVERICK
146 && TARGET_ARM
147 && cirrus_fp_register (operands[0], DImode)
148- && cirrus_fp_register (operands[1], DImode))
149+ && cirrus_fp_register (operands[1], DImode) && 0)
150 {
151 emit_insn (gen_cirrus_subdi3 (operands[0], operands[1], operands[2]));
152 DONE;
153@@ -2599,7 +2599,7 @@
154 values to iwmmxt regs and back. */
155 FAIL;
156 }
157- else if (!TARGET_REALLY_IWMMXT && !(TARGET_HARD_FLOAT && TARGET_MAVERICK))
158+ else if (!TARGET_REALLY_IWMMXT)
159 FAIL;
160 "
161 )
162@@ -4215,7 +4215,6 @@
163 [(set (match_operand:DI 0 "nonimmediate_operand" "=l,l,l,l,>,l, m,*r")
164 (match_operand:DI 1 "general_operand" "l, I,J,>,l,mi,l,*r"))]
165 "TARGET_THUMB
166- && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)
167 && ( register_operand (operands[0], DImode)
168 || register_operand (operands[1], DImode))"
169 "*