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1#
2# Copyright OpenEmbedded Contributors
3#
4# SPDX-License-Identifier: MIT
5#
6
7# Right now this is focused on arm-specific tune features.
8# We get away with this for now as one can only use x86-64 as the build host
9# (not arm).
10# Note that TUNE_FEATURES is _always_ refering to the target, so we really
11# don't want to use this for the host/build.
12def llvm_features_from_tune(d):
13 f = []
14 feat = d.getVar('TUNE_FEATURES')
15 if not feat:
16 return []
17 feat = frozenset(feat.split())
18
19 mach_overrides = d.getVar('MACHINEOVERRIDES')
20 mach_overrides = frozenset(mach_overrides.split(':'))
21
22 if 'vfpv4' in feat:
23 f.append("+vfp4")
24 if 'vfpv3' in feat:
25 f.append("+vfp3")
26 if 'vfpv3d16' in feat:
27 f.append("+d16")
28
29 if 'vfpv2' in feat or 'vfp' in feat:
30 f.append("+vfp2")
31
32 if 'neon' in feat:
33 f.append("+neon")
34
35 if 'mips32' in feat:
36 f.append("+mips32")
37
38 if 'mips32r2' in feat:
39 f.append("+mips32r2")
40
41 if target_is_armv7(d):
42 f.append('+v7')
43
44 if ('armv6' in mach_overrides) or ('armv6' in feat):
45 f.append("+v6")
46 if 'armv5te' in feat:
47 f.append("+strict-align")
48 f.append("+v5te")
49 elif 'armv5' in feat:
50 f.append("+strict-align")
51 f.append("+v5")
52
53 if ('armv4' in mach_overrides) or ('armv4' in feat):
54 f.append("+strict-align")
55
56 if 'dsp' in feat:
57 f.append("+dsp")
58
59 if 'thumb' in feat:
60 if d.getVar('ARM_THUMB_OPT') == "thumb":
61 if target_is_armv7(d):
62 f.append('+thumb2')
63 f.append("+thumb-mode")
64
65 if 'cortexa5' in feat:
66 f.append("+a5")
67 if 'cortexa7' in feat:
68 f.append("+a7")
69 if 'cortexa9' in feat:
70 f.append("+a9")
71 if 'cortexa15' in feat:
72 f.append("+a15")
73 if 'cortexa17' in feat:
74 f.append("+a17")
75 if ('riscv64' in feat) or ('riscv32' in feat):
76 f.append("+a,+c,+d,+f,+m")
77 return f
78llvm_features_from_tune[vardepvalue] = "${@llvm_features_from_tune(d)}"
79
80# TARGET_CC_ARCH changes from build/cross/target so it'll do the right thing
81# this should go away when https://github.com/rust-lang/rust/pull/31709 is
82# stable (1.9.0?)
83def llvm_features_from_cc_arch(d):
84 f = []
85 feat = d.getVar('TARGET_CC_ARCH')
86 if not feat:
87 return []
88 feat = frozenset(feat.split())
89
90 if '-mmmx' in feat:
91 f.append("+mmx")
92 if '-msse' in feat:
93 f.append("+sse")
94 if '-msse2' in feat:
95 f.append("+sse2")
96 if '-msse3' in feat:
97 f.append("+sse3")
98 if '-mssse3' in feat:
99 f.append("+ssse3")
100 if '-msse4.1' in feat:
101 f.append("+sse4.1")
102 if '-msse4.2' in feat:
103 f.append("+sse4.2")
104 if '-msse4a' in feat:
105 f.append("+sse4a")
106 if '-mavx' in feat:
107 f.append("+avx")
108 if '-mavx2' in feat:
109 f.append("+avx2")
110
111 return f
112
113def llvm_features_from_target_fpu(d):
114 # TARGET_FPU can be hard or soft. +soft-float tell llvm to use soft float
115 # ABI. There is no option for hard.
116
117 fpu = d.getVar('TARGET_FPU', True)
118 return ["+soft-float"] if fpu == "soft" else []
119
120def llvm_features(d):
121 return ','.join(llvm_features_from_tune(d) +
122 llvm_features_from_cc_arch(d) +
123 llvm_features_from_target_fpu(d))
124
125llvm_features[vardepvalue] = "${@llvm_features(d)}"
126
127## arm-unknown-linux-gnueabihf
128DATA_LAYOUT[arm-eabi] = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
129TARGET_ENDIAN[arm-eabi] = "little"
130TARGET_POINTER_WIDTH[arm-eabi] = "32"
131TARGET_C_INT_WIDTH[arm-eabi] = "32"
132MAX_ATOMIC_WIDTH[arm-eabi] = "64"
133FEATURES[arm-eabi] = "+v6,+vfp2"
134
135## armv7-unknown-linux-gnueabihf
136DATA_LAYOUT[armv7-eabi] = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
137TARGET_ENDIAN[armv7-eabi] = "little"
138TARGET_POINTER_WIDTH[armv7-eabi] = "32"
139TARGET_C_INT_WIDTH[armv7-eabi] = "32"
140MAX_ATOMIC_WIDTH[armv7-eabi] = "64"
141FEATURES[armv7-eabi] = "+v7,+vfp2,+thumb2"
142
143## aarch64-unknown-linux-{gnu, musl}
144DATA_LAYOUT[aarch64] = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
145TARGET_ENDIAN[aarch64] = "little"
146TARGET_POINTER_WIDTH[aarch64] = "64"
147TARGET_C_INT_WIDTH[aarch64] = "32"
148MAX_ATOMIC_WIDTH[aarch64] = "128"
149
150## x86_64-unknown-linux-{gnu, musl}
151DATA_LAYOUT[x86_64] = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
152TARGET_ENDIAN[x86_64] = "little"
153TARGET_POINTER_WIDTH[x86_64] = "64"
154TARGET_C_INT_WIDTH[x86_64] = "32"
155MAX_ATOMIC_WIDTH[x86_64] = "64"
156
157## x86_64-unknown-linux-gnux32
158DATA_LAYOUT[x86_64-x32] = "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
159TARGET_ENDIAN[x86_64-x32] = "little"
160TARGET_POINTER_WIDTH[x86_64-x32] = "32"
161TARGET_C_INT_WIDTH[x86_64-x32] = "32"
162MAX_ATOMIC_WIDTH[x86_64-x32] = "64"
163
164## i686-unknown-linux-{gnu, musl}
165DATA_LAYOUT[i686] = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
166TARGET_ENDIAN[i686] = "little"
167TARGET_POINTER_WIDTH[i686] = "32"
168TARGET_C_INT_WIDTH[i686] = "32"
169MAX_ATOMIC_WIDTH[i686] = "64"
170
171## XXX: a bit of a hack so qemux86 builds, clone of i686-unknown-linux-{gnu, musl} above
172DATA_LAYOUT[i586] = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
173TARGET_ENDIAN[i586] = "little"
174TARGET_POINTER_WIDTH[i586] = "32"
175TARGET_C_INT_WIDTH[i586] = "32"
176MAX_ATOMIC_WIDTH[i586] = "64"
177
178## mips-unknown-linux-{gnu, musl}
179DATA_LAYOUT[mips] = "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
180TARGET_ENDIAN[mips] = "big"
181TARGET_POINTER_WIDTH[mips] = "32"
182TARGET_C_INT_WIDTH[mips] = "32"
183MAX_ATOMIC_WIDTH[mips] = "32"
184
185## mipsel-unknown-linux-{gnu, musl}
186DATA_LAYOUT[mipsel] = "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
187TARGET_ENDIAN[mipsel] = "little"
188TARGET_POINTER_WIDTH[mipsel] = "32"
189TARGET_C_INT_WIDTH[mipsel] = "32"
190MAX_ATOMIC_WIDTH[mipsel] = "32"
191
192## mips64-unknown-linux-{gnu, musl}
193DATA_LAYOUT[mips64] = "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128"
194TARGET_ENDIAN[mips64] = "big"
195TARGET_POINTER_WIDTH[mips64] = "64"
196TARGET_C_INT_WIDTH[mips64] = "64"
197MAX_ATOMIC_WIDTH[mips64] = "64"
198
199## mips64-n32-unknown-linux-{gnu, musl}
200DATA_LAYOUT[mips64-n32] = "E-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128"
201TARGET_ENDIAN[mips64-n32] = "big"
202TARGET_POINTER_WIDTH[mips64-n32] = "32"
203TARGET_C_INT_WIDTH[mips64-n32] = "32"
204MAX_ATOMIC_WIDTH[mips64-n32] = "64"
205
206## mips64el-unknown-linux-{gnu, musl}
207DATA_LAYOUT[mips64el] = "e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128"
208TARGET_ENDIAN[mips64el] = "little"
209TARGET_POINTER_WIDTH[mips64el] = "64"
210TARGET_C_INT_WIDTH[mips64el] = "64"
211MAX_ATOMIC_WIDTH[mips64el] = "64"
212
213## powerpc-unknown-linux-{gnu, musl}
214DATA_LAYOUT[powerpc] = "E-m:e-p:32:32-i64:64-n32"
215TARGET_ENDIAN[powerpc] = "big"
216TARGET_POINTER_WIDTH[powerpc] = "32"
217TARGET_C_INT_WIDTH[powerpc] = "32"
218MAX_ATOMIC_WIDTH[powerpc] = "32"
219
220## powerpc64-unknown-linux-{gnu, musl}
221DATA_LAYOUT[powerpc64] = "E-m:e-i64:64-n32:64-S128-v256:256:256-v512:512:512"
222TARGET_ENDIAN[powerpc64] = "big"
223TARGET_POINTER_WIDTH[powerpc64] = "64"
224TARGET_C_INT_WIDTH[powerpc64] = "64"
225MAX_ATOMIC_WIDTH[powerpc64] = "64"
226
227## powerpc64le-unknown-linux-{gnu, musl}
228DATA_LAYOUT[powerpc64le] = "e-m:e-i64:64-n32:64-v256:256:256-v512:512:512"
229TARGET_ENDIAN[powerpc64le] = "little"
230TARGET_POINTER_WIDTH[powerpc64le] = "64"
231TARGET_C_INT_WIDTH[powerpc64le] = "64"
232MAX_ATOMIC_WIDTH[powerpc64le] = "64"
233
234## riscv32-unknown-linux-{gnu, musl}
235DATA_LAYOUT[riscv32] = "e-m:e-p:32:32-i64:64-n32-S128"
236TARGET_ENDIAN[riscv32] = "little"
237TARGET_POINTER_WIDTH[riscv32] = "32"
238TARGET_C_INT_WIDTH[riscv32] = "32"
239MAX_ATOMIC_WIDTH[riscv32] = "32"
240
241## riscv64-unknown-linux-{gnu, musl}
242DATA_LAYOUT[riscv64] = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
243TARGET_ENDIAN[riscv64] = "little"
244TARGET_POINTER_WIDTH[riscv64] = "64"
245TARGET_C_INT_WIDTH[riscv64] = "64"
246MAX_ATOMIC_WIDTH[riscv64] = "64"
247
248# Convert a normal arch (HOST_ARCH, TARGET_ARCH, BUILD_ARCH, etc) to something
249# rust's internals won't choke on.
250def arch_to_rust_target_arch(arch):
251 if arch == "i586" or arch == "i686":
252 return "x86"
253 elif arch == "mipsel":
254 return "mips"
255 elif arch == "mip64sel":
256 return "mips64"
257 elif arch == "armv7":
258 return "arm"
259 elif arch == "powerpc64le":
260 return "powerpc64"
261 else:
262 return arch
263
264# generates our target CPU value
265def llvm_cpu(d):
266 cpu = d.getVar('PACKAGE_ARCH')
267 target = d.getVar('TRANSLATED_TARGET_ARCH')
268
269 trans = {}
270 trans['corei7-64'] = "corei7"
271 trans['core2-32'] = "core2"
272 trans['x86-64'] = "x86-64"
273 trans['i686'] = "i686"
274 trans['i586'] = "i586"
275 trans['powerpc'] = "powerpc"
276 trans['mips64'] = "mips64"
277 trans['mips64el'] = "mips64"
278 trans['riscv64'] = "generic-rv64"
279 trans['riscv32'] = "generic-rv32"
280
281 if target in ["mips", "mipsel"]:
282 feat = frozenset(d.getVar('TUNE_FEATURES').split())
283 if "mips32r2" in feat:
284 trans['mipsel'] = "mips32r2"
285 trans['mips'] = "mips32r2"
286 elif "mips32" in feat:
287 trans['mipsel'] = "mips32"
288 trans['mips'] = "mips32"
289
290 try:
291 return trans[cpu]
292 except:
293 return trans.get(target, "generic")
294
295llvm_cpu[vardepvalue] = "${@llvm_cpu(d)}"
296
297def rust_gen_target(d, thing, wd, arch):
298 import json
299
300 build_sys = d.getVar('BUILD_SYS')
301 target_sys = d.getVar('TARGET_SYS')
302
303 sys = d.getVar('{}_SYS'.format(thing))
304 prefix = d.getVar('{}_PREFIX'.format(thing))
305 rustsys = d.getVar('RUST_{}_SYS'.format(thing))
306
307 abi = None
308 cpu = "generic"
309 features = ""
310
311 # Need to apply the target tuning consitently, only if the triplet applies to the target
312 # and not in the native case
313 if sys == target_sys and sys != build_sys:
314 abi = d.getVar('ABIEXTENSION')
315 cpu = llvm_cpu(d)
316 if bb.data.inherits_class('native', d):
317 features = ','.join(llvm_features_from_cc_arch(d))
318 else:
319 features = llvm_features(d) or ""
320 # arm and armv7 have different targets in llvm
321 if arch == "arm" and target_is_armv7(d):
322 arch = 'armv7'
323
324 rust_arch = oe.rust.arch_to_rust_arch(arch)
325
326 if abi:
327 arch_abi = "{}-{}".format(rust_arch, abi)
328 else:
329 arch_abi = rust_arch
330
331 features = features or d.getVarFlag('FEATURES', arch_abi) or ""
332 features = features.strip()
333
334 # build tspec
335 tspec = {}
336 tspec['llvm-target'] = rustsys
337 tspec['data-layout'] = d.getVarFlag('DATA_LAYOUT', arch_abi)
338 if tspec['data-layout'] is None:
339 bb.fatal("No rust target defined for %s" % arch_abi)
340 tspec['max-atomic-width'] = int(d.getVarFlag('MAX_ATOMIC_WIDTH', arch_abi))
341 tspec['target-pointer-width'] = d.getVarFlag('TARGET_POINTER_WIDTH', arch_abi)
342 tspec['target-c-int-width'] = d.getVarFlag('TARGET_C_INT_WIDTH', arch_abi)
343 tspec['target-endian'] = d.getVarFlag('TARGET_ENDIAN', arch_abi)
344 tspec['arch'] = arch_to_rust_target_arch(rust_arch)
345 tspec['os'] = "linux"
346 if "musl" in tspec['llvm-target']:
347 tspec['env'] = "musl"
348 else:
349 tspec['env'] = "gnu"
350 if "riscv64" in tspec['llvm-target']:
351 tspec['llvm-abiname'] = "lp64d"
352 if "riscv32" in tspec['llvm-target']:
353 tspec['llvm-abiname'] = "ilp32d"
354 tspec['vendor'] = "unknown"
355 tspec['target-family'] = "unix"
356 tspec['linker'] = "{}{}gcc".format(d.getVar('CCACHE'), prefix)
357 tspec['cpu'] = cpu
358 if features != "":
359 tspec['features'] = features
360 tspec['dynamic-linking'] = True
361 tspec['executables'] = True
362 tspec['linker-is-gnu'] = True
363 tspec['linker-flavor'] = "gcc"
364 tspec['has-rpath'] = True
365 tspec['has-elf-tls'] = True
366 tspec['position-independent-executables'] = True
367 tspec['panic-strategy'] = d.getVar("RUST_PANIC_STRATEGY")
368
369 # write out the target spec json file
370 with open(wd + rustsys + '.json', 'w') as f:
371 json.dump(tspec, f, indent=4)
372
373# These are accounted for in tmpdir path names so don't need to be in the task sig
374rust_gen_target[vardepsexclude] += "ABIEXTENSION llvm_cpu"
375
376do_rust_gen_targets[vardeps] += "DATA_LAYOUT TARGET_ENDIAN TARGET_POINTER_WIDTH TARGET_C_INT_WIDTH MAX_ATOMIC_WIDTH FEATURES"
377
378RUST_TARGETS_DIR = "${WORKDIR}/rust-targets/"
379export RUST_TARGET_PATH = "${RUST_TARGETS_DIR}"
380
381python do_rust_gen_targets () {
382 wd = d.getVar('RUST_TARGETS_DIR')
383 # Order of BUILD, HOST, TARGET is important in case the files overwrite, most specific last
384 rust_gen_target(d, 'BUILD', wd, d.getVar('BUILD_ARCH'))
385 rust_gen_target(d, 'HOST', wd, d.getVar('HOST_ARCH'))
386 rust_gen_target(d, 'TARGET', wd, d.getVar('TARGET_ARCH'))
387}
388
389addtask rust_gen_targets after do_patch before do_compile
390do_rust_gen_targets[dirs] += "${RUST_TARGETS_DIR}"
391
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