diff options
Diffstat (limited to 'meta-moblin/packages/linux/linux-moblin-2.6.27/0041-r8169-8101e.patch')
-rw-r--r-- | meta-moblin/packages/linux/linux-moblin-2.6.27/0041-r8169-8101e.patch | 940 |
1 files changed, 940 insertions, 0 deletions
diff --git a/meta-moblin/packages/linux/linux-moblin-2.6.27/0041-r8169-8101e.patch b/meta-moblin/packages/linux/linux-moblin-2.6.27/0041-r8169-8101e.patch new file mode 100644 index 0000000000..781c9a127e --- /dev/null +++ b/meta-moblin/packages/linux/linux-moblin-2.6.27/0041-r8169-8101e.patch | |||
@@ -0,0 +1,940 @@ | |||
1 | From 771c0d99c0ab3ca7f1a9bc400e8259171b518d5f Mon Sep 17 00:00:00 2001 | ||
2 | From: Francois Romieu <romieu@fr.zoreil.com> | ||
3 | Date: Thu, 21 Aug 2008 23:20:40 +0200 | ||
4 | Subject: [PATCH] r8169: fix RxMissed register access | ||
5 | |||
6 | - the register location is defined for the 8169 chipset only and | ||
7 | there is no 8169 beyond RTL_GIGA_MAC_VER_06 | ||
8 | - only the lower 3 bytes of the register are valid | ||
9 | |||
10 | Fixes: | ||
11 | 1. http://bugzilla.kernel.org/show_bug.cgi?id=10180 | ||
12 | 2. http://bugzilla.kernel.org/show_bug.cgi?id=11062 (bits of) | ||
13 | |||
14 | Tested by Hermann Gausterer and Adam Huffman. | ||
15 | |||
16 | Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> | ||
17 | Cc: Edward Hsu <edward_hsu@realtek.com.tw> | ||
18 | --- | ||
19 | drivers/net/r8169.c | 25 ++++++++++++++----------- | ||
20 | 1 files changed, 14 insertions(+), 11 deletions(-) | ||
21 | |||
22 | diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c | ||
23 | index 0f6f974..4190ee7 100644 | ||
24 | --- a/drivers/net/r8169.c | ||
25 | +++ b/drivers/net/r8169.c | ||
26 | @@ -2099,8 +2099,6 @@ static void rtl_hw_start_8168(struct net_device *dev) | ||
27 | |||
28 | RTL_R8(IntrMask); | ||
29 | |||
30 | - RTL_W32(RxMissed, 0); | ||
31 | - | ||
32 | rtl_set_rx_mode(dev); | ||
33 | |||
34 | RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); | ||
35 | @@ -2143,8 +2141,6 @@ static void rtl_hw_start_8101(struct net_device *dev) | ||
36 | |||
37 | RTL_R8(IntrMask); | ||
38 | |||
39 | - RTL_W32(RxMissed, 0); | ||
40 | - | ||
41 | rtl_set_rx_mode(dev); | ||
42 | |||
43 | RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); | ||
44 | @@ -2922,6 +2918,17 @@ static int rtl8169_poll(struct napi_struct *napi, int budget) | ||
45 | return work_done; | ||
46 | } | ||
47 | |||
48 | +static void rtl8169_rx_missed(struct net_device *dev, void __iomem *ioaddr) | ||
49 | +{ | ||
50 | + struct rtl8169_private *tp = netdev_priv(dev); | ||
51 | + | ||
52 | + if (tp->mac_version > RTL_GIGA_MAC_VER_06) | ||
53 | + return; | ||
54 | + | ||
55 | + dev->stats.rx_missed_errors += (RTL_R32(RxMissed) & 0xffffff); | ||
56 | + RTL_W32(RxMissed, 0); | ||
57 | +} | ||
58 | + | ||
59 | static void rtl8169_down(struct net_device *dev) | ||
60 | { | ||
61 | struct rtl8169_private *tp = netdev_priv(dev); | ||
62 | @@ -2939,9 +2946,7 @@ core_down: | ||
63 | |||
64 | rtl8169_asic_down(ioaddr); | ||
65 | |||
66 | - /* Update the error counts. */ | ||
67 | - dev->stats.rx_missed_errors += RTL_R32(RxMissed); | ||
68 | - RTL_W32(RxMissed, 0); | ||
69 | + rtl8169_rx_missed(dev, ioaddr); | ||
70 | |||
71 | spin_unlock_irq(&tp->lock); | ||
72 | |||
73 | @@ -3063,8 +3068,7 @@ static struct net_device_stats *rtl8169_get_stats(struct net_device *dev) | ||
74 | |||
75 | if (netif_running(dev)) { | ||
76 | spin_lock_irqsave(&tp->lock, flags); | ||
77 | - dev->stats.rx_missed_errors += RTL_R32(RxMissed); | ||
78 | - RTL_W32(RxMissed, 0); | ||
79 | + rtl8169_rx_missed(dev, ioaddr); | ||
80 | spin_unlock_irqrestore(&tp->lock, flags); | ||
81 | } | ||
82 | |||
83 | @@ -3089,8 +3093,7 @@ static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state) | ||
84 | |||
85 | rtl8169_asic_down(ioaddr); | ||
86 | |||
87 | - dev->stats.rx_missed_errors += RTL_R32(RxMissed); | ||
88 | - RTL_W32(RxMissed, 0); | ||
89 | + rtl8169_rx_missed(dev, ioaddr); | ||
90 | |||
91 | spin_unlock_irq(&tp->lock); | ||
92 | |||
93 | -- | ||
94 | 1.5.3.3 | ||
95 | |||
96 | From 6ee4bc96d446a9c466a18b715c7ab2d662c03ebd Mon Sep 17 00:00:00 2001 | ||
97 | From: Francois Romieu <romieu@fr.zoreil.com> | ||
98 | Date: Sat, 26 Jul 2008 14:26:06 +0200 | ||
99 | Subject: [PATCH] r8169: get ethtool settings through the generic mii helper | ||
100 | |||
101 | It avoids to report unsupported link capabilities with | ||
102 | the fast-ethernet only 8101/8102. | ||
103 | |||
104 | Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> | ||
105 | Tested-by: Martin Capitanio <martin@capitanio.org> | ||
106 | Fixed-by: Ivan Vecera <ivecera@redhat.com> | ||
107 | Cc: Edward Hsu <edward_hsu@realtek.com.tw> | ||
108 | --- | ||
109 | drivers/net/r8169.c | 99 +++++++++++++++++++++++--------------------------- | ||
110 | 1 files changed, 46 insertions(+), 53 deletions(-) | ||
111 | |||
112 | diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c | ||
113 | index 4190ee7..7e026a6 100644 | ||
114 | --- a/drivers/net/r8169.c | ||
115 | +++ b/drivers/net/r8169.c | ||
116 | @@ -370,8 +370,9 @@ struct ring_info { | ||
117 | }; | ||
118 | |||
119 | enum features { | ||
120 | - RTL_FEATURE_WOL = (1 << 0), | ||
121 | - RTL_FEATURE_MSI = (1 << 1), | ||
122 | + RTL_FEATURE_WOL = (1 << 0), | ||
123 | + RTL_FEATURE_MSI = (1 << 1), | ||
124 | + RTL_FEATURE_GMII = (1 << 2), | ||
125 | }; | ||
126 | |||
127 | struct rtl8169_private { | ||
128 | @@ -406,13 +407,15 @@ struct rtl8169_private { | ||
129 | struct vlan_group *vlgrp; | ||
130 | #endif | ||
131 | int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex); | ||
132 | - void (*get_settings)(struct net_device *, struct ethtool_cmd *); | ||
133 | + int (*get_settings)(struct net_device *, struct ethtool_cmd *); | ||
134 | void (*phy_reset_enable)(void __iomem *); | ||
135 | void (*hw_start)(struct net_device *); | ||
136 | unsigned int (*phy_reset_pending)(void __iomem *); | ||
137 | unsigned int (*link_ok)(void __iomem *); | ||
138 | struct delayed_work task; | ||
139 | unsigned features; | ||
140 | + | ||
141 | + struct mii_if_info mii; | ||
142 | }; | ||
143 | |||
144 | MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>"); | ||
145 | @@ -482,6 +485,23 @@ static int mdio_read(void __iomem *ioaddr, int reg_addr) | ||
146 | return value; | ||
147 | } | ||
148 | |||
149 | +static void rtl_mdio_write(struct net_device *dev, int phy_id, int location, | ||
150 | + int val) | ||
151 | +{ | ||
152 | + struct rtl8169_private *tp = netdev_priv(dev); | ||
153 | + void __iomem *ioaddr = tp->mmio_addr; | ||
154 | + | ||
155 | + mdio_write(ioaddr, location, val); | ||
156 | +} | ||
157 | + | ||
158 | +static int rtl_mdio_read(struct net_device *dev, int phy_id, int location) | ||
159 | +{ | ||
160 | + struct rtl8169_private *tp = netdev_priv(dev); | ||
161 | + void __iomem *ioaddr = tp->mmio_addr; | ||
162 | + | ||
163 | + return mdio_read(ioaddr, location); | ||
164 | +} | ||
165 | + | ||
166 | static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr) | ||
167 | { | ||
168 | RTL_W16(IntrMask, 0x0000); | ||
169 | @@ -850,7 +870,7 @@ static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc, | ||
170 | |||
171 | #endif | ||
172 | |||
173 | -static void rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd) | ||
174 | +static int rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd) | ||
175 | { | ||
176 | struct rtl8169_private *tp = netdev_priv(dev); | ||
177 | void __iomem *ioaddr = tp->mmio_addr; | ||
178 | @@ -867,65 +887,29 @@ static void rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd) | ||
179 | |||
180 | cmd->speed = SPEED_1000; | ||
181 | cmd->duplex = DUPLEX_FULL; /* Always set */ | ||
182 | + | ||
183 | + return 0; | ||
184 | } | ||
185 | |||
186 | -static void rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd) | ||
187 | +static int rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd) | ||
188 | { | ||
189 | struct rtl8169_private *tp = netdev_priv(dev); | ||
190 | - void __iomem *ioaddr = tp->mmio_addr; | ||
191 | - u8 status; | ||
192 | - | ||
193 | - cmd->supported = SUPPORTED_10baseT_Half | | ||
194 | - SUPPORTED_10baseT_Full | | ||
195 | - SUPPORTED_100baseT_Half | | ||
196 | - SUPPORTED_100baseT_Full | | ||
197 | - SUPPORTED_1000baseT_Full | | ||
198 | - SUPPORTED_Autoneg | | ||
199 | - SUPPORTED_TP; | ||
200 | - | ||
201 | - cmd->autoneg = 1; | ||
202 | - cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg; | ||
203 | - | ||
204 | - if (tp->phy_auto_nego_reg & ADVERTISE_10HALF) | ||
205 | - cmd->advertising |= ADVERTISED_10baseT_Half; | ||
206 | - if (tp->phy_auto_nego_reg & ADVERTISE_10FULL) | ||
207 | - cmd->advertising |= ADVERTISED_10baseT_Full; | ||
208 | - if (tp->phy_auto_nego_reg & ADVERTISE_100HALF) | ||
209 | - cmd->advertising |= ADVERTISED_100baseT_Half; | ||
210 | - if (tp->phy_auto_nego_reg & ADVERTISE_100FULL) | ||
211 | - cmd->advertising |= ADVERTISED_100baseT_Full; | ||
212 | - if (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL) | ||
213 | - cmd->advertising |= ADVERTISED_1000baseT_Full; | ||
214 | - | ||
215 | - status = RTL_R8(PHYstatus); | ||
216 | - | ||
217 | - if (status & _1000bpsF) | ||
218 | - cmd->speed = SPEED_1000; | ||
219 | - else if (status & _100bps) | ||
220 | - cmd->speed = SPEED_100; | ||
221 | - else if (status & _10bps) | ||
222 | - cmd->speed = SPEED_10; | ||
223 | - | ||
224 | - if (status & TxFlowCtrl) | ||
225 | - cmd->advertising |= ADVERTISED_Asym_Pause; | ||
226 | - if (status & RxFlowCtrl) | ||
227 | - cmd->advertising |= ADVERTISED_Pause; | ||
228 | - | ||
229 | - cmd->duplex = ((status & _1000bpsF) || (status & FullDup)) ? | ||
230 | - DUPLEX_FULL : DUPLEX_HALF; | ||
231 | + | ||
232 | + return mii_ethtool_gset(&tp->mii, cmd); | ||
233 | } | ||
234 | |||
235 | static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | ||
236 | { | ||
237 | struct rtl8169_private *tp = netdev_priv(dev); | ||
238 | unsigned long flags; | ||
239 | + int rc; | ||
240 | |||
241 | spin_lock_irqsave(&tp->lock, flags); | ||
242 | |||
243 | - tp->get_settings(dev, cmd); | ||
244 | + rc = tp->get_settings(dev, cmd); | ||
245 | |||
246 | spin_unlock_irqrestore(&tp->lock, flags); | ||
247 | - return 0; | ||
248 | + return rc; | ||
249 | } | ||
250 | |||
251 | static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs, | ||
252 | @@ -1513,7 +1497,7 @@ static const struct rtl_cfg_info { | ||
253 | unsigned int align; | ||
254 | u16 intr_event; | ||
255 | u16 napi_event; | ||
256 | - unsigned msi; | ||
257 | + unsigned features; | ||
258 | } rtl_cfg_infos [] = { | ||
259 | [RTL_CFG_0] = { | ||
260 | .hw_start = rtl_hw_start_8169, | ||
261 | @@ -1522,7 +1506,7 @@ static const struct rtl_cfg_info { | ||
262 | .intr_event = SYSErr | LinkChg | RxOverflow | | ||
263 | RxFIFOOver | TxErr | TxOK | RxOK | RxErr, | ||
264 | .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, | ||
265 | - .msi = 0 | ||
266 | + .features = RTL_FEATURE_GMII | ||
267 | }, | ||
268 | [RTL_CFG_1] = { | ||
269 | .hw_start = rtl_hw_start_8168, | ||
270 | @@ -1531,7 +1515,7 @@ static const struct rtl_cfg_info { | ||
271 | .intr_event = SYSErr | LinkChg | RxOverflow | | ||
272 | TxErr | TxOK | RxOK | RxErr, | ||
273 | .napi_event = TxErr | TxOK | RxOK | RxOverflow, | ||
274 | - .msi = RTL_FEATURE_MSI | ||
275 | + .features = RTL_FEATURE_GMII | RTL_FEATURE_MSI | ||
276 | }, | ||
277 | [RTL_CFG_2] = { | ||
278 | .hw_start = rtl_hw_start_8101, | ||
279 | @@ -1540,7 +1524,7 @@ static const struct rtl_cfg_info { | ||
280 | .intr_event = SYSErr | LinkChg | RxOverflow | PCSTimeout | | ||
281 | RxFIFOOver | TxErr | TxOK | RxOK | RxErr, | ||
282 | .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, | ||
283 | - .msi = RTL_FEATURE_MSI | ||
284 | + .features = RTL_FEATURE_MSI | ||
285 | } | ||
286 | }; | ||
287 | |||
288 | @@ -1552,7 +1536,7 @@ static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr, | ||
289 | u8 cfg2; | ||
290 | |||
291 | cfg2 = RTL_R8(Config2) & ~MSIEnable; | ||
292 | - if (cfg->msi) { | ||
293 | + if (cfg->features & RTL_FEATURE_MSI) { | ||
294 | if (pci_enable_msi(pdev)) { | ||
295 | dev_info(&pdev->dev, "no MSI. Back to INTx.\n"); | ||
296 | } else { | ||
297 | @@ -1578,6 +1562,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | ||
298 | const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data; | ||
299 | const unsigned int region = cfg->region; | ||
300 | struct rtl8169_private *tp; | ||
301 | + struct mii_if_info *mii; | ||
302 | struct net_device *dev; | ||
303 | void __iomem *ioaddr; | ||
304 | unsigned int i; | ||
305 | @@ -1602,6 +1587,14 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | ||
306 | tp->pci_dev = pdev; | ||
307 | tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT); | ||
308 | |||
309 | + mii = &tp->mii; | ||
310 | + mii->dev = dev; | ||
311 | + mii->mdio_read = rtl_mdio_read; | ||
312 | + mii->mdio_write = rtl_mdio_write; | ||
313 | + mii->phy_id_mask = 0x1f; | ||
314 | + mii->reg_num_mask = 0x1f; | ||
315 | + mii->supports_gmii = !!(cfg->features & RTL_FEATURE_GMII); | ||
316 | + | ||
317 | /* enable device (incl. PCI PM wakeup and hotplug setup) */ | ||
318 | rc = pci_enable_device(pdev); | ||
319 | if (rc < 0) { | ||
320 | -- | ||
321 | 1.5.3.3 | ||
322 | |||
323 | From ef60b2a38e223a331e13ef503aee7cd5d4d5c12c Mon Sep 17 00:00:00 2001 | ||
324 | From: Hugh Dickins <hugh@veritas.com> | ||
325 | Date: Mon, 8 Sep 2008 21:49:01 +0100 | ||
326 | Subject: [PATCH] r8169: select MII in Kconfig | ||
327 | |||
328 | drivers/built-in.o: In function `rtl8169_gset_xmii': | ||
329 | r8169.c:(.text+0x82259): undefined reference to `mii_ethtool_gset' | ||
330 | suggests that the r8169 driver now needs to select MII. | ||
331 | |||
332 | Signed-off-by: Hugh Dickins <hugh@veritas.com> | ||
333 | Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> | ||
334 | Cc: Edward Hsu <edward_hsu@realtek.com.tw> | ||
335 | --- | ||
336 | drivers/net/Kconfig | 1 + | ||
337 | 1 files changed, 1 insertions(+), 0 deletions(-) | ||
338 | |||
339 | diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig | ||
340 | index 4a11296..60a0453 100644 | ||
341 | --- a/drivers/net/Kconfig | ||
342 | +++ b/drivers/net/Kconfig | ||
343 | @@ -2046,6 +2046,7 @@ config R8169 | ||
344 | tristate "Realtek 8169 gigabit ethernet support" | ||
345 | depends on PCI | ||
346 | select CRC32 | ||
347 | + select MII | ||
348 | ---help--- | ||
349 | Say Y here if you have a Realtek 8169 PCI Gigabit Ethernet adapter. | ||
350 | |||
351 | -- | ||
352 | 1.5.3.3 | ||
353 | |||
354 | From bca31864fca6004c4a4a9bd549e95c93b3c3bb10 Mon Sep 17 00:00:00 2001 | ||
355 | From: Francois Romieu <romieu@fr.zoreil.com> | ||
356 | Date: Sat, 2 Aug 2008 15:50:02 +0200 | ||
357 | Subject: [PATCH] r8169: Tx performance tweak helper | ||
358 | |||
359 | Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> | ||
360 | Cc: Edward Hsu <edward_hsu@realtek.com.tw> | ||
361 | --- | ||
362 | drivers/net/r8169.c | 15 ++++++++++----- | ||
363 | 1 files changed, 10 insertions(+), 5 deletions(-) | ||
364 | |||
365 | diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c | ||
366 | index 7e026a6..eea96fb 100644 | ||
367 | --- a/drivers/net/r8169.c | ||
368 | +++ b/drivers/net/r8169.c | ||
369 | @@ -2054,12 +2054,20 @@ static void rtl_hw_start_8169(struct net_device *dev) | ||
370 | RTL_W16(IntrMask, tp->intr_event); | ||
371 | } | ||
372 | |||
373 | +static void rtl_tx_performance_tweak(struct pci_dev *pdev, u8 force) | ||
374 | +{ | ||
375 | + u8 ctl; | ||
376 | + | ||
377 | + pci_read_config_byte(pdev, 0x69, &ctl); | ||
378 | + ctl = (ctl & ~0x70) | force; | ||
379 | + pci_write_config_byte(pdev, 0x69, ctl); | ||
380 | +} | ||
381 | + | ||
382 | static void rtl_hw_start_8168(struct net_device *dev) | ||
383 | { | ||
384 | struct rtl8169_private *tp = netdev_priv(dev); | ||
385 | void __iomem *ioaddr = tp->mmio_addr; | ||
386 | struct pci_dev *pdev = tp->pci_dev; | ||
387 | - u8 ctl; | ||
388 | |||
389 | RTL_W8(Cfg9346, Cfg9346_Unlock); | ||
390 | |||
391 | @@ -2073,10 +2081,7 @@ static void rtl_hw_start_8168(struct net_device *dev) | ||
392 | |||
393 | RTL_W16(CPlusCmd, tp->cp_cmd); | ||
394 | |||
395 | - /* Tx performance tweak. */ | ||
396 | - pci_read_config_byte(pdev, 0x69, &ctl); | ||
397 | - ctl = (ctl & ~0x70) | 0x50; | ||
398 | - pci_write_config_byte(pdev, 0x69, ctl); | ||
399 | + rtl_tx_performance_tweak(pdev, 0x50); | ||
400 | |||
401 | RTL_W16(IntrMitigate, 0x5151); | ||
402 | |||
403 | -- | ||
404 | 1.5.3.3 | ||
405 | |||
406 | From 7a929ae7d5a3618f56bf1ccaf8c62df628e820aa Mon Sep 17 00:00:00 2001 | ||
407 | From: Francois Romieu <romieu@fr.zoreil.com> | ||
408 | Date: Sat, 5 Jul 2008 00:21:15 +0200 | ||
409 | Subject: [PATCH] r8169: use pci_find_capability for the PCI-E features | ||
410 | |||
411 | Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> | ||
412 | Cc: Edward Hsu <edward_hsu@realtek.com.tw> | ||
413 | --- | ||
414 | drivers/net/r8169.c | 32 ++++++++++++++++++++++++-------- | ||
415 | 1 files changed, 24 insertions(+), 8 deletions(-) | ||
416 | |||
417 | diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c | ||
418 | index eea96fb..5c00522 100644 | ||
419 | --- a/drivers/net/r8169.c | ||
420 | +++ b/drivers/net/r8169.c | ||
421 | @@ -61,6 +61,7 @@ static const int multicast_filter_limit = 32; | ||
422 | /* MAC address length */ | ||
423 | #define MAC_ADDR_LEN 6 | ||
424 | |||
425 | +#define MAX_READ_REQUEST_SHIFT 12 | ||
426 | #define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */ | ||
427 | #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ | ||
428 | #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ | ||
429 | @@ -412,6 +413,7 @@ struct rtl8169_private { | ||
430 | void (*hw_start)(struct net_device *); | ||
431 | unsigned int (*phy_reset_pending)(void __iomem *); | ||
432 | unsigned int (*link_ok)(void __iomem *); | ||
433 | + int pcie_cap; | ||
434 | struct delayed_work task; | ||
435 | unsigned features; | ||
436 | |||
437 | @@ -1663,6 +1665,10 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | ||
438 | goto err_out_free_res_4; | ||
439 | } | ||
440 | |||
441 | + tp->pcie_cap = pci_find_capability(pdev, PCI_CAP_ID_EXP); | ||
442 | + if (!tp->pcie_cap && netif_msg_probe(tp)) | ||
443 | + dev_info(&pdev->dev, "no PCI Express capability\n"); | ||
444 | + | ||
445 | /* Unneeded ? Don't mess with Mrs. Murphy. */ | ||
446 | rtl8169_irq_mask_and_ack(ioaddr); | ||
447 | |||
448 | @@ -2054,13 +2060,19 @@ static void rtl_hw_start_8169(struct net_device *dev) | ||
449 | RTL_W16(IntrMask, tp->intr_event); | ||
450 | } | ||
451 | |||
452 | -static void rtl_tx_performance_tweak(struct pci_dev *pdev, u8 force) | ||
453 | +static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force) | ||
454 | { | ||
455 | - u8 ctl; | ||
456 | + struct net_device *dev = pci_get_drvdata(pdev); | ||
457 | + struct rtl8169_private *tp = netdev_priv(dev); | ||
458 | + int cap = tp->pcie_cap; | ||
459 | + | ||
460 | + if (cap) { | ||
461 | + u16 ctl; | ||
462 | |||
463 | - pci_read_config_byte(pdev, 0x69, &ctl); | ||
464 | - ctl = (ctl & ~0x70) | force; | ||
465 | - pci_write_config_byte(pdev, 0x69, ctl); | ||
466 | + pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl); | ||
467 | + ctl = (ctl & ~PCI_EXP_DEVCTL_READRQ) | force; | ||
468 | + pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl); | ||
469 | + } | ||
470 | } | ||
471 | |||
472 | static void rtl_hw_start_8168(struct net_device *dev) | ||
473 | @@ -2081,7 +2093,7 @@ static void rtl_hw_start_8168(struct net_device *dev) | ||
474 | |||
475 | RTL_W16(CPlusCmd, tp->cp_cmd); | ||
476 | |||
477 | - rtl_tx_performance_tweak(pdev, 0x50); | ||
478 | + rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); | ||
479 | |||
480 | RTL_W16(IntrMitigate, 0x5151); | ||
481 | |||
482 | @@ -2114,8 +2126,12 @@ static void rtl_hw_start_8101(struct net_device *dev) | ||
483 | |||
484 | if ((tp->mac_version == RTL_GIGA_MAC_VER_13) || | ||
485 | (tp->mac_version == RTL_GIGA_MAC_VER_16)) { | ||
486 | - pci_write_config_word(pdev, 0x68, 0x00); | ||
487 | - pci_write_config_word(pdev, 0x69, 0x08); | ||
488 | + int cap = tp->pcie_cap; | ||
489 | + | ||
490 | + if (cap) { | ||
491 | + pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, | ||
492 | + PCI_EXP_DEVCTL_NOSNOOP_EN); | ||
493 | + } | ||
494 | } | ||
495 | |||
496 | RTL_W8(Cfg9346, Cfg9346_Unlock); | ||
497 | -- | ||
498 | 1.5.3.3 | ||
499 | |||
500 | From ba648bdcbca93084360d348eb43dde4b19b2489e Mon Sep 17 00:00:00 2001 | ||
501 | From: Francois Romieu <romieu@fr.zoreil.com> | ||
502 | Date: Sun, 1 Jun 2008 22:37:49 +0200 | ||
503 | Subject: [PATCH] r8169: add 8168/8101 registers description | ||
504 | |||
505 | Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> | ||
506 | Cc: Edward Hsu <edward_hsu@realtek.com.tw> | ||
507 | --- | ||
508 | drivers/net/r8169.c | 47 +++++++++++++++++++++++++++++++++++++++++++---- | ||
509 | 1 files changed, 43 insertions(+), 4 deletions(-) | ||
510 | |||
511 | diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c | ||
512 | index 5c00522..0b8db03 100644 | ||
513 | --- a/drivers/net/r8169.c | ||
514 | +++ b/drivers/net/r8169.c | ||
515 | @@ -197,9 +197,6 @@ enum rtl_registers { | ||
516 | Config5 = 0x56, | ||
517 | MultiIntr = 0x5c, | ||
518 | PHYAR = 0x60, | ||
519 | - TBICSR = 0x64, | ||
520 | - TBI_ANAR = 0x68, | ||
521 | - TBI_LPAR = 0x6a, | ||
522 | PHYstatus = 0x6c, | ||
523 | RxMaxSize = 0xda, | ||
524 | CPlusCmd = 0xe0, | ||
525 | @@ -213,6 +210,32 @@ enum rtl_registers { | ||
526 | FuncForceEvent = 0xfc, | ||
527 | }; | ||
528 | |||
529 | +enum rtl8110_registers { | ||
530 | + TBICSR = 0x64, | ||
531 | + TBI_ANAR = 0x68, | ||
532 | + TBI_LPAR = 0x6a, | ||
533 | +}; | ||
534 | + | ||
535 | +enum rtl8168_8101_registers { | ||
536 | + CSIDR = 0x64, | ||
537 | + CSIAR = 0x68, | ||
538 | +#define CSIAR_FLAG 0x80000000 | ||
539 | +#define CSIAR_WRITE_CMD 0x80000000 | ||
540 | +#define CSIAR_BYTE_ENABLE 0x0f | ||
541 | +#define CSIAR_BYTE_ENABLE_SHIFT 12 | ||
542 | +#define CSIAR_ADDR_MASK 0x0fff | ||
543 | + | ||
544 | + EPHYAR = 0x80, | ||
545 | +#define EPHYAR_FLAG 0x80000000 | ||
546 | +#define EPHYAR_WRITE_CMD 0x80000000 | ||
547 | +#define EPHYAR_REG_MASK 0x1f | ||
548 | +#define EPHYAR_REG_SHIFT 16 | ||
549 | +#define EPHYAR_DATA_MASK 0xffff | ||
550 | + DBG_REG = 0xd1, | ||
551 | +#define FIX_NAK_1 (1 << 4) | ||
552 | +#define FIX_NAK_2 (1 << 3) | ||
553 | +}; | ||
554 | + | ||
555 | enum rtl_register_content { | ||
556 | /* InterruptStatusBits */ | ||
557 | SYSErr = 0x8000, | ||
558 | @@ -266,7 +289,13 @@ enum rtl_register_content { | ||
559 | TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */ | ||
560 | |||
561 | /* Config1 register p.24 */ | ||
562 | + LEDS1 = (1 << 7), | ||
563 | + LEDS0 = (1 << 6), | ||
564 | MSIEnable = (1 << 5), /* Enable Message Signaled Interrupt */ | ||
565 | + Speed_down = (1 << 4), | ||
566 | + MEMMAP = (1 << 3), | ||
567 | + IOMAP = (1 << 2), | ||
568 | + VPD = (1 << 1), | ||
569 | PMEnable = (1 << 0), /* Power Management Enable */ | ||
570 | |||
571 | /* Config2 register p. 25 */ | ||
572 | @@ -276,6 +305,7 @@ enum rtl_register_content { | ||
573 | /* Config3 register p.25 */ | ||
574 | MagicPacket = (1 << 5), /* Wake up when receives a Magic Packet */ | ||
575 | LinkUp = (1 << 4), /* Wake up when the cable connection is re-established */ | ||
576 | + Beacon_en = (1 << 0), /* 8168 only. Reserved in the 8168b */ | ||
577 | |||
578 | /* Config5 register p.27 */ | ||
579 | BWF = (1 << 6), /* Accept Broadcast wakeup frame */ | ||
580 | @@ -293,7 +323,16 @@ enum rtl_register_content { | ||
581 | TBINwComplete = 0x01000000, | ||
582 | |||
583 | /* CPlusCmd p.31 */ | ||
584 | - PktCntrDisable = (1 << 7), // 8168 | ||
585 | + EnableBist = (1 << 15), // 8168 8101 | ||
586 | + Mac_dbgo_oe = (1 << 14), // 8168 8101 | ||
587 | + Normal_mode = (1 << 13), // unused | ||
588 | + Force_half_dup = (1 << 12), // 8168 8101 | ||
589 | + Force_rxflow_en = (1 << 11), // 8168 8101 | ||
590 | + Force_txflow_en = (1 << 10), // 8168 8101 | ||
591 | + Cxpl_dbg_sel = (1 << 9), // 8168 8101 | ||
592 | + ASF = (1 << 8), // 8168 8101 | ||
593 | + PktCntrDisable = (1 << 7), // 8168 8101 | ||
594 | + Mac_dbgo_sel = 0x001c, // 8168 | ||
595 | RxVlan = (1 << 6), | ||
596 | RxChkSum = (1 << 5), | ||
597 | PCIDAC = (1 << 4), | ||
598 | -- | ||
599 | 1.5.3.3 | ||
600 | |||
601 | From 61650c9e3d637b0990d9f26b1421ac4b55f5c744 Mon Sep 17 00:00:00 2001 | ||
602 | From: Francois Romieu <romieu@fr.zoreil.com> | ||
603 | Date: Sat, 2 Aug 2008 20:44:13 +0200 | ||
604 | Subject: [PATCH] r8169: add hw start helpers for the 8168 and the 8101 | ||
605 | |||
606 | This commit triggers three 'defined but not used' warnings but | ||
607 | I prefer avoiding to tie these helpers to a specific change in | ||
608 | the hw start sequences of the 8168 or of the 8101. | ||
609 | |||
610 | Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> | ||
611 | Cc: Edward Hsu <edward_hsu@realtek.com.tw> | ||
612 | --- | ||
613 | drivers/net/r8169.c | 96 +++++++++++++++++++++++++++++++++++++++++++++++++++ | ||
614 | 1 files changed, 96 insertions(+), 0 deletions(-) | ||
615 | |||
616 | diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c | ||
617 | index 0b8db03..52eba5c 100644 | ||
618 | --- a/drivers/net/r8169.c | ||
619 | +++ b/drivers/net/r8169.c | ||
620 | @@ -526,6 +526,11 @@ static int mdio_read(void __iomem *ioaddr, int reg_addr) | ||
621 | return value; | ||
622 | } | ||
623 | |||
624 | +static void mdio_patch(void __iomem *ioaddr, int reg_addr, int value) | ||
625 | +{ | ||
626 | + mdio_write(ioaddr, reg_addr, mdio_read(ioaddr, reg_addr) | value); | ||
627 | +} | ||
628 | + | ||
629 | static void rtl_mdio_write(struct net_device *dev, int phy_id, int location, | ||
630 | int val) | ||
631 | { | ||
632 | @@ -543,6 +548,72 @@ static int rtl_mdio_read(struct net_device *dev, int phy_id, int location) | ||
633 | return mdio_read(ioaddr, location); | ||
634 | } | ||
635 | |||
636 | +static void rtl_ephy_write(void __iomem *ioaddr, int reg_addr, int value) | ||
637 | +{ | ||
638 | + unsigned int i; | ||
639 | + | ||
640 | + RTL_W32(EPHYAR, EPHYAR_WRITE_CMD | (value & EPHYAR_DATA_MASK) | | ||
641 | + (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT); | ||
642 | + | ||
643 | + for (i = 0; i < 100; i++) { | ||
644 | + if (!(RTL_R32(EPHYAR) & EPHYAR_FLAG)) | ||
645 | + break; | ||
646 | + udelay(10); | ||
647 | + } | ||
648 | +} | ||
649 | + | ||
650 | +static u16 rtl_ephy_read(void __iomem *ioaddr, int reg_addr) | ||
651 | +{ | ||
652 | + u16 value = 0xffff; | ||
653 | + unsigned int i; | ||
654 | + | ||
655 | + RTL_W32(EPHYAR, (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT); | ||
656 | + | ||
657 | + for (i = 0; i < 100; i++) { | ||
658 | + if (RTL_R32(EPHYAR) & EPHYAR_FLAG) { | ||
659 | + value = RTL_R32(EPHYAR) & EPHYAR_DATA_MASK; | ||
660 | + break; | ||
661 | + } | ||
662 | + udelay(10); | ||
663 | + } | ||
664 | + | ||
665 | + return value; | ||
666 | +} | ||
667 | + | ||
668 | +static void rtl_csi_write(void __iomem *ioaddr, int addr, int value) | ||
669 | +{ | ||
670 | + unsigned int i; | ||
671 | + | ||
672 | + RTL_W32(CSIDR, value); | ||
673 | + RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr & CSIAR_ADDR_MASK) | | ||
674 | + CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT); | ||
675 | + | ||
676 | + for (i = 0; i < 100; i++) { | ||
677 | + if (!(RTL_R32(CSIAR) & CSIAR_FLAG)) | ||
678 | + break; | ||
679 | + udelay(10); | ||
680 | + } | ||
681 | +} | ||
682 | + | ||
683 | +static u32 rtl_csi_read(void __iomem *ioaddr, int addr) | ||
684 | +{ | ||
685 | + u32 value = ~0x00; | ||
686 | + unsigned int i; | ||
687 | + | ||
688 | + RTL_W32(CSIAR, (addr & CSIAR_ADDR_MASK) | | ||
689 | + CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT); | ||
690 | + | ||
691 | + for (i = 0; i < 100; i++) { | ||
692 | + if (RTL_R32(CSIAR) & CSIAR_FLAG) { | ||
693 | + value = RTL_R32(CSIDR); | ||
694 | + break; | ||
695 | + } | ||
696 | + udelay(10); | ||
697 | + } | ||
698 | + | ||
699 | + return value; | ||
700 | +} | ||
701 | + | ||
702 | static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr) | ||
703 | { | ||
704 | RTL_W16(IntrMask, 0x0000); | ||
705 | @@ -2114,6 +2185,31 @@ static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force) | ||
706 | } | ||
707 | } | ||
708 | |||
709 | +static void rtl_csi_access_enable(void __iomem *ioaddr) | ||
710 | +{ | ||
711 | + u32 csi; | ||
712 | + | ||
713 | + csi = rtl_csi_read(ioaddr, 0x070c) & 0x00ffffff; | ||
714 | + rtl_csi_write(ioaddr, 0x070c, csi | 0x27000000); | ||
715 | +} | ||
716 | + | ||
717 | +struct ephy_info { | ||
718 | + unsigned int offset; | ||
719 | + u16 mask; | ||
720 | + u16 bits; | ||
721 | +}; | ||
722 | + | ||
723 | +static void rtl_ephy_init(void __iomem *ioaddr, struct ephy_info *e, int len) | ||
724 | +{ | ||
725 | + u16 w; | ||
726 | + | ||
727 | + while (len-- > 0) { | ||
728 | + w = (rtl_ephy_read(ioaddr, e->offset) & ~e->mask) | e->bits; | ||
729 | + rtl_ephy_write(ioaddr, e->offset, w); | ||
730 | + e++; | ||
731 | + } | ||
732 | +} | ||
733 | + | ||
734 | static void rtl_hw_start_8168(struct net_device *dev) | ||
735 | { | ||
736 | struct rtl8169_private *tp = netdev_priv(dev); | ||
737 | -- | ||
738 | 1.5.3.3 | ||
739 | |||
740 | From 81fbfc404f2a13646bee46fa98545c0023e3a67a Mon Sep 17 00:00:00 2001 | ||
741 | From: Francois Romieu <romieu@fr.zoreil.com> | ||
742 | Date: Sat, 2 Aug 2008 21:08:49 +0200 | ||
743 | Subject: [PATCH] r8169: additional 8101 and 8102 support | ||
744 | |||
745 | Signed-off-by: Ivan Vecera <ivecera@redhat.com> | ||
746 | Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> | ||
747 | Cc: Edward Hsu <edward_hsu@realtek.com.tw> | ||
748 | --- | ||
749 | drivers/net/r8169.c | 124 ++++++++++++++++++++++++++++++++++++++++++++++++++- | ||
750 | 1 files changed, 122 insertions(+), 2 deletions(-) | ||
751 | |||
752 | diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c | ||
753 | index 52eba5c..f28c202 100644 | ||
754 | --- a/drivers/net/r8169.c | ||
755 | +++ b/drivers/net/r8169.c | ||
756 | @@ -96,6 +96,10 @@ enum mac_version { | ||
757 | RTL_GIGA_MAC_VER_04 = 0x04, // 8169SB | ||
758 | RTL_GIGA_MAC_VER_05 = 0x05, // 8110SCd | ||
759 | RTL_GIGA_MAC_VER_06 = 0x06, // 8110SCe | ||
760 | + RTL_GIGA_MAC_VER_07 = 0x07, // 8102e | ||
761 | + RTL_GIGA_MAC_VER_08 = 0x08, // 8102e | ||
762 | + RTL_GIGA_MAC_VER_09 = 0x09, // 8102e | ||
763 | + RTL_GIGA_MAC_VER_10 = 0x0a, // 8101e | ||
764 | RTL_GIGA_MAC_VER_11 = 0x0b, // 8168Bb | ||
765 | RTL_GIGA_MAC_VER_12 = 0x0c, // 8168Be | ||
766 | RTL_GIGA_MAC_VER_13 = 0x0d, // 8101Eb | ||
767 | @@ -122,6 +126,10 @@ static const struct { | ||
768 | _R("RTL8169sb/8110sb", RTL_GIGA_MAC_VER_04, 0xff7e1880), // 8169SB | ||
769 | _R("RTL8169sc/8110sc", RTL_GIGA_MAC_VER_05, 0xff7e1880), // 8110SCd | ||
770 | _R("RTL8169sc/8110sc", RTL_GIGA_MAC_VER_06, 0xff7e1880), // 8110SCe | ||
771 | + _R("RTL8102e", RTL_GIGA_MAC_VER_07, 0xff7e1880), // PCI-E | ||
772 | + _R("RTL8102e", RTL_GIGA_MAC_VER_08, 0xff7e1880), // PCI-E | ||
773 | + _R("RTL8102e", RTL_GIGA_MAC_VER_09, 0xff7e1880), // PCI-E | ||
774 | + _R("RTL8101e", RTL_GIGA_MAC_VER_10, 0xff7e1880), // PCI-E | ||
775 | _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_11, 0xff7e1880), // PCI-E | ||
776 | _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_12, 0xff7e1880), // PCI-E | ||
777 | _R("RTL8101e", RTL_GIGA_MAC_VER_13, 0xff7e1880), // PCI-E 8139 | ||
778 | @@ -837,8 +845,12 @@ static int rtl8169_set_speed_xmii(struct net_device *dev, | ||
779 | } | ||
780 | } | ||
781 | |||
782 | - /* The 8100e/8101e do Fast Ethernet only. */ | ||
783 | - if ((tp->mac_version == RTL_GIGA_MAC_VER_13) || | ||
784 | + /* The 8100e/8101e/8102e do Fast Ethernet only. */ | ||
785 | + if ((tp->mac_version == RTL_GIGA_MAC_VER_07) || | ||
786 | + (tp->mac_version == RTL_GIGA_MAC_VER_08) || | ||
787 | + (tp->mac_version == RTL_GIGA_MAC_VER_09) || | ||
788 | + (tp->mac_version == RTL_GIGA_MAC_VER_10) || | ||
789 | + (tp->mac_version == RTL_GIGA_MAC_VER_13) || | ||
790 | (tp->mac_version == RTL_GIGA_MAC_VER_14) || | ||
791 | (tp->mac_version == RTL_GIGA_MAC_VER_15) || | ||
792 | (tp->mac_version == RTL_GIGA_MAC_VER_16)) { | ||
793 | @@ -1212,8 +1224,17 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp, | ||
794 | { 0x7c800000, 0x30000000, RTL_GIGA_MAC_VER_11 }, | ||
795 | |||
796 | /* 8101 family. */ | ||
797 | + { 0x7cf00000, 0x34a00000, RTL_GIGA_MAC_VER_09 }, | ||
798 | + { 0x7cf00000, 0x24a00000, RTL_GIGA_MAC_VER_09 }, | ||
799 | + { 0x7cf00000, 0x34900000, RTL_GIGA_MAC_VER_08 }, | ||
800 | + { 0x7cf00000, 0x24900000, RTL_GIGA_MAC_VER_08 }, | ||
801 | + { 0x7cf00000, 0x34800000, RTL_GIGA_MAC_VER_07 }, | ||
802 | + { 0x7cf00000, 0x24800000, RTL_GIGA_MAC_VER_07 }, | ||
803 | { 0x7cf00000, 0x34000000, RTL_GIGA_MAC_VER_13 }, | ||
804 | + { 0x7cf00000, 0x34300000, RTL_GIGA_MAC_VER_10 }, | ||
805 | { 0x7cf00000, 0x34200000, RTL_GIGA_MAC_VER_16 }, | ||
806 | + { 0x7c800000, 0x34800000, RTL_GIGA_MAC_VER_09 }, | ||
807 | + { 0x7c800000, 0x24800000, RTL_GIGA_MAC_VER_09 }, | ||
808 | { 0x7c800000, 0x34000000, RTL_GIGA_MAC_VER_16 }, | ||
809 | /* FIXME: where did these entries come from ? -- FR */ | ||
810 | { 0xfc800000, 0x38800000, RTL_GIGA_MAC_VER_15 }, | ||
811 | @@ -1375,6 +1396,22 @@ static void rtl8168cx_hw_phy_config(void __iomem *ioaddr) | ||
812 | rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); | ||
813 | } | ||
814 | |||
815 | +static void rtl8102e_hw_phy_config(void __iomem *ioaddr) | ||
816 | +{ | ||
817 | + struct phy_reg phy_reg_init[] = { | ||
818 | + { 0x1f, 0x0003 }, | ||
819 | + { 0x08, 0x441d }, | ||
820 | + { 0x01, 0x9100 }, | ||
821 | + { 0x1f, 0x0000 } | ||
822 | + }; | ||
823 | + | ||
824 | + mdio_write(ioaddr, 0x1f, 0x0000); | ||
825 | + mdio_patch(ioaddr, 0x11, 1 << 12); | ||
826 | + mdio_patch(ioaddr, 0x19, 1 << 13); | ||
827 | + | ||
828 | + rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); | ||
829 | +} | ||
830 | + | ||
831 | static void rtl_hw_phy_config(struct net_device *dev) | ||
832 | { | ||
833 | struct rtl8169_private *tp = netdev_priv(dev); | ||
834 | @@ -1392,6 +1429,11 @@ static void rtl_hw_phy_config(struct net_device *dev) | ||
835 | case RTL_GIGA_MAC_VER_04: | ||
836 | rtl8169sb_hw_phy_config(ioaddr); | ||
837 | break; | ||
838 | + case RTL_GIGA_MAC_VER_07: | ||
839 | + case RTL_GIGA_MAC_VER_08: | ||
840 | + case RTL_GIGA_MAC_VER_09: | ||
841 | + rtl8102e_hw_phy_config(ioaddr); | ||
842 | + break; | ||
843 | case RTL_GIGA_MAC_VER_18: | ||
844 | rtl8168cp_hw_phy_config(ioaddr); | ||
845 | break; | ||
846 | @@ -2253,6 +2295,70 @@ static void rtl_hw_start_8168(struct net_device *dev) | ||
847 | RTL_W16(IntrMask, tp->intr_event); | ||
848 | } | ||
849 | |||
850 | +#define R810X_CPCMD_QUIRK_MASK (\ | ||
851 | + EnableBist | \ | ||
852 | + Mac_dbgo_oe | \ | ||
853 | + Force_half_dup | \ | ||
854 | + Force_half_dup | \ | ||
855 | + Force_txflow_en | \ | ||
856 | + Cxpl_dbg_sel | \ | ||
857 | + ASF | \ | ||
858 | + PktCntrDisable | \ | ||
859 | + PCIDAC | \ | ||
860 | + PCIMulRW) | ||
861 | + | ||
862 | +static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev) | ||
863 | +{ | ||
864 | + static struct ephy_info e_info_8102e_1[] = { | ||
865 | + { 0x01, 0, 0x6e65 }, | ||
866 | + { 0x02, 0, 0x091f }, | ||
867 | + { 0x03, 0, 0xc2f9 }, | ||
868 | + { 0x06, 0, 0xafb5 }, | ||
869 | + { 0x07, 0, 0x0e00 }, | ||
870 | + { 0x19, 0, 0xec80 }, | ||
871 | + { 0x01, 0, 0x2e65 }, | ||
872 | + { 0x01, 0, 0x6e65 } | ||
873 | + }; | ||
874 | + u8 cfg1; | ||
875 | + | ||
876 | + rtl_csi_access_enable(ioaddr); | ||
877 | + | ||
878 | + RTL_W8(DBG_REG, FIX_NAK_1); | ||
879 | + | ||
880 | + rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); | ||
881 | + | ||
882 | + RTL_W8(Config1, | ||
883 | + LEDS1 | LEDS0 | Speed_down | MEMMAP | IOMAP | VPD | PMEnable); | ||
884 | + RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); | ||
885 | + | ||
886 | + cfg1 = RTL_R8(Config1); | ||
887 | + if ((cfg1 & LEDS0) && (cfg1 & LEDS1)) | ||
888 | + RTL_W8(Config1, cfg1 & ~LEDS0); | ||
889 | + | ||
890 | + RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK); | ||
891 | + | ||
892 | + rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1)); | ||
893 | +} | ||
894 | + | ||
895 | +static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev) | ||
896 | +{ | ||
897 | + rtl_csi_access_enable(ioaddr); | ||
898 | + | ||
899 | + rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); | ||
900 | + | ||
901 | + RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable); | ||
902 | + RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); | ||
903 | + | ||
904 | + RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK); | ||
905 | +} | ||
906 | + | ||
907 | +static void rtl_hw_start_8102e_3(void __iomem *ioaddr, struct pci_dev *pdev) | ||
908 | +{ | ||
909 | + rtl_hw_start_8102e_2(ioaddr, pdev); | ||
910 | + | ||
911 | + rtl_ephy_write(ioaddr, 0x03, 0xc2f9); | ||
912 | +} | ||
913 | + | ||
914 | static void rtl_hw_start_8101(struct net_device *dev) | ||
915 | { | ||
916 | struct rtl8169_private *tp = netdev_priv(dev); | ||
917 | @@ -2269,6 +2375,20 @@ static void rtl_hw_start_8101(struct net_device *dev) | ||
918 | } | ||
919 | } | ||
920 | |||
921 | + switch (tp->mac_version) { | ||
922 | + case RTL_GIGA_MAC_VER_07: | ||
923 | + rtl_hw_start_8102e_1(ioaddr, pdev); | ||
924 | + break; | ||
925 | + | ||
926 | + case RTL_GIGA_MAC_VER_08: | ||
927 | + rtl_hw_start_8102e_3(ioaddr, pdev); | ||
928 | + break; | ||
929 | + | ||
930 | + case RTL_GIGA_MAC_VER_09: | ||
931 | + rtl_hw_start_8102e_2(ioaddr, pdev); | ||
932 | + break; | ||
933 | + } | ||
934 | + | ||
935 | RTL_W8(Cfg9346, Cfg9346_Unlock); | ||
936 | |||
937 | RTL_W8(EarlyTxThres, EarlyTxThld); | ||
938 | -- | ||
939 | 1.5.3.3 | ||
940 | |||