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-rw-r--r--meta-moblin/packages/linux/linux-moblin-2.6.27/0008-Add-Intel-ACPI-IGD-OpRegion-support.patch572
1 files changed, 572 insertions, 0 deletions
diff --git a/meta-moblin/packages/linux/linux-moblin-2.6.27/0008-Add-Intel-ACPI-IGD-OpRegion-support.patch b/meta-moblin/packages/linux/linux-moblin-2.6.27/0008-Add-Intel-ACPI-IGD-OpRegion-support.patch
new file mode 100644
index 0000000000..afa6f96345
--- /dev/null
+++ b/meta-moblin/packages/linux/linux-moblin-2.6.27/0008-Add-Intel-ACPI-IGD-OpRegion-support.patch
@@ -0,0 +1,572 @@
1commit 91c2ebb8e78aa64f4807399b506ec0090ae5f3d6
2Author: Matthew Garrett <mjg59@srcf.ucam.org>
3Date: Tue Aug 5 19:37:25 2008 +0100
4
5 Add Intel ACPI IGD OpRegion support
6
7 This adds the support necessary for allowing ACPI backlight control to
8 work on some newer Intel-based graphics systems. Tested on Thinkpad T61
9 and HP 2510p hardware.
10
11 Signed-off-by: Matthew Garrett <mjg@redhat.com>
12 Signed-off-by: Dave Airlie <airlied@linux.ie>
13
14diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
15index a9e6046..b032808 100644
16--- a/drivers/gpu/drm/i915/Makefile
17+++ b/drivers/gpu/drm/i915/Makefile
18@@ -3,7 +3,7 @@
19 # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
20
21 ccflags-y := -Iinclude/drm
22-i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o
23+i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o i915_opregion.o
24
25 i915-$(CONFIG_COMPAT) += i915_ioc32.o
26
27diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
28index b3c4ac9..cead62f 100644
29--- a/drivers/gpu/drm/i915/i915_dma.c
30+++ b/drivers/gpu/drm/i915/i915_dma.c
31@@ -810,6 +810,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
32 if (!IS_I945G(dev) && !IS_I945GM(dev))
33 pci_enable_msi(dev->pdev);
34
35+ intel_opregion_init(dev);
36+
37 spin_lock_init(&dev_priv->user_irq_lock);
38
39 return ret;
40@@ -827,6 +829,8 @@ int i915_driver_unload(struct drm_device *dev)
41 if (dev_priv->mmio_map)
42 drm_rmmap(dev, dev_priv->mmio_map);
43
44+ intel_opregion_free(dev);
45+
46 drm_free(dev->dev_private, sizeof(drm_i915_private_t),
47 DRM_MEM_DRIVER);
48
49diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
50index 6c99aab..d95eca2 100644
51--- a/drivers/gpu/drm/i915/i915_drv.c
52+++ b/drivers/gpu/drm/i915/i915_drv.c
53@@ -371,6 +371,8 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state)
54
55 i915_save_vga(dev);
56
57+ intel_opregion_free(dev);
58+
59 if (state.event == PM_EVENT_SUSPEND) {
60 /* Shut down the device */
61 pci_disable_device(dev->pdev);
62@@ -532,6 +534,8 @@ static int i915_resume(struct drm_device *dev)
63
64 i915_restore_vga(dev);
65
66+ intel_opregion_init(dev);
67+
68 return 0;
69 }
70
71diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
72index 8daf0d8..e4bd01c 100644
73--- a/drivers/gpu/drm/i915/i915_drv.h
74+++ b/drivers/gpu/drm/i915/i915_drv.h
75@@ -82,6 +82,14 @@ typedef struct _drm_i915_vbl_swap {
76 unsigned int sequence;
77 } drm_i915_vbl_swap_t;
78
79+struct intel_opregion {
80+ struct opregion_header *header;
81+ struct opregion_acpi *acpi;
82+ struct opregion_swsci *swsci;
83+ struct opregion_asle *asle;
84+ int enabled;
85+};
86+
87 typedef struct drm_i915_private {
88 drm_local_map_t *sarea;
89 drm_local_map_t *mmio_map;
90@@ -122,6 +130,8 @@ typedef struct drm_i915_private {
91 drm_i915_vbl_swap_t vbl_swaps;
92 unsigned int swaps_pending;
93
94+ struct intel_opregion opregion;
95+
96 /* Register state */
97 u8 saveLBB;
98 u32 saveDSPACNTR;
99@@ -244,6 +254,7 @@ extern int i915_vblank_pipe_get(struct drm_device *dev, void *data,
100 struct drm_file *file_priv);
101 extern int i915_vblank_swap(struct drm_device *dev, void *data,
102 struct drm_file *file_priv);
103+extern void i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask);
104
105 /* i915_mem.c */
106 extern int i915_mem_alloc(struct drm_device *dev, void *data,
107@@ -258,6 +269,12 @@ extern void i915_mem_takedown(struct mem_block **heap);
108 extern void i915_mem_release(struct drm_device * dev,
109 struct drm_file *file_priv, struct mem_block *heap);
110
111+/* i915_opregion.c */
112+extern int intel_opregion_init(struct drm_device *dev);
113+extern void intel_opregion_free(struct drm_device *dev);
114+extern void opregion_asle_intr(struct drm_device *dev);
115+extern void opregion_enable_asle(struct drm_device *dev);
116+
117 #define I915_READ(reg) DRM_READ32(dev_priv->mmio_map, (reg))
118 #define I915_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, (reg), (val))
119 #define I915_READ16(reg) DRM_READ16(dev_priv->mmio_map, (reg))
120diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
121index 24d11ed..ae7d3a8 100644
122--- a/drivers/gpu/drm/i915/i915_irq.c
123+++ b/drivers/gpu/drm/i915/i915_irq.c
124@@ -36,9 +36,11 @@
125 /** These are the interrupts used by the driver */
126 #define I915_INTERRUPT_ENABLE_MASK (I915_USER_INTERRUPT | \
127 I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT | \
128- I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT)
129+ I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT | \
130+ I915_ASLE_INTERRUPT | \
131+ I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
132
133-static inline void
134+void
135 i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask)
136 {
137 if ((dev_priv->irq_mask_reg & mask) != 0) {
138@@ -274,6 +276,9 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
139 return IRQ_NONE;
140 }
141
142+ I915_WRITE(PIPEASTAT, pipea_stats);
143+ I915_WRITE(PIPEBSTAT, pipeb_stats);
144+
145 I915_WRITE(IIR, iir);
146 if (dev->pdev->msi_enabled)
147 I915_WRITE(IMR, dev_priv->irq_mask_reg);
148@@ -306,14 +311,14 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
149
150 if (dev_priv->swaps_pending > 0)
151 drm_locked_tasklet(dev, i915_vblank_tasklet);
152- I915_WRITE(PIPEASTAT,
153- pipea_stats|I915_VBLANK_INTERRUPT_ENABLE|
154- PIPE_VBLANK_INTERRUPT_STATUS);
155- I915_WRITE(PIPEBSTAT,
156- pipeb_stats|I915_VBLANK_INTERRUPT_ENABLE|
157- PIPE_VBLANK_INTERRUPT_STATUS);
158 }
159
160+ if (iir & I915_ASLE_INTERRUPT)
161+ opregion_asle_intr(dev);
162+
163+ if (iir & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
164+ opregion_asle_intr(dev);
165+
166 return IRQ_HANDLED;
167 }
168
169@@ -661,10 +666,14 @@ void i915_driver_irq_postinstall(struct drm_device * dev)
170 if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B)
171 dev_priv->irq_mask_reg &= ~I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
172
173+ dev_priv->irq_mask_reg &= I915_INTERRUPT_ENABLE_MASK;
174+
175 I915_WRITE(IMR, dev_priv->irq_mask_reg);
176 I915_WRITE(IER, I915_INTERRUPT_ENABLE_MASK);
177 (void) I915_READ(IER);
178
179+ opregion_enable_asle(dev);
180+
181 DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
182 }
183
184diff --git a/drivers/gpu/drm/i915/i915_opregion.c b/drivers/gpu/drm/i915/i915_opregion.c
185new file mode 100644
186index 0000000..1787a0c
187--- /dev/null
188+++ b/drivers/gpu/drm/i915/i915_opregion.c
189@@ -0,0 +1,371 @@
190+/*
191+ * Copyright 2008 Intel Corporation <hong.liu@intel.com>
192+ * Copyright 2008 Red Hat <mjg@redhat.com>
193+ *
194+ * Permission is hereby granted, free of charge, to any person obtaining
195+ * a copy of this software and associated documentation files (the
196+ * "Software"), to deal in the Software without restriction, including
197+ * without limitation the rights to use, copy, modify, merge, publish,
198+ * distribute, sub license, and/or sell copies of the Software, and to
199+ * permit persons to whom the Software is furnished to do so, subject to
200+ * the following conditions:
201+ *
202+ * The above copyright notice and this permission notice (including the
203+ * next paragraph) shall be included in all copies or substantial
204+ * portions of the Software.
205+ *
206+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
207+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
208+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
209+ * NON-INFRINGEMENT. IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE
210+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
211+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
212+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
213+ * SOFTWARE.
214+ *
215+ */
216+
217+#include <linux/acpi.h>
218+
219+#include "drmP.h"
220+#include "i915_drm.h"
221+#include "i915_drv.h"
222+
223+#define PCI_ASLE 0xe4
224+#define PCI_LBPC 0xf4
225+#define PCI_ASLS 0xfc
226+
227+#define OPREGION_SZ (8*1024)
228+#define OPREGION_HEADER_OFFSET 0
229+#define OPREGION_ACPI_OFFSET 0x100
230+#define OPREGION_SWSCI_OFFSET 0x200
231+#define OPREGION_ASLE_OFFSET 0x300
232+#define OPREGION_VBT_OFFSET 0x1000
233+
234+#define OPREGION_SIGNATURE "IntelGraphicsMem"
235+#define MBOX_ACPI (1<<0)
236+#define MBOX_SWSCI (1<<1)
237+#define MBOX_ASLE (1<<2)
238+
239+struct opregion_header {
240+ u8 signature[16];
241+ u32 size;
242+ u32 opregion_ver;
243+ u8 bios_ver[32];
244+ u8 vbios_ver[16];
245+ u8 driver_ver[16];
246+ u32 mboxes;
247+ u8 reserved[164];
248+} __attribute__((packed));
249+
250+/* OpRegion mailbox #1: public ACPI methods */
251+struct opregion_acpi {
252+ u32 drdy; /* driver readiness */
253+ u32 csts; /* notification status */
254+ u32 cevt; /* current event */
255+ u8 rsvd1[20];
256+ u32 didl[8]; /* supported display devices ID list */
257+ u32 cpdl[8]; /* currently presented display list */
258+ u32 cadl[8]; /* currently active display list */
259+ u32 nadl[8]; /* next active devices list */
260+ u32 aslp; /* ASL sleep time-out */
261+ u32 tidx; /* toggle table index */
262+ u32 chpd; /* current hotplug enable indicator */
263+ u32 clid; /* current lid state*/
264+ u32 cdck; /* current docking state */
265+ u32 sxsw; /* Sx state resume */
266+ u32 evts; /* ASL supported events */
267+ u32 cnot; /* current OS notification */
268+ u32 nrdy; /* driver status */
269+ u8 rsvd2[60];
270+} __attribute__((packed));
271+
272+/* OpRegion mailbox #2: SWSCI */
273+struct opregion_swsci {
274+ u32 scic; /* SWSCI command|status|data */
275+ u32 parm; /* command parameters */
276+ u32 dslp; /* driver sleep time-out */
277+ u8 rsvd[244];
278+} __attribute__((packed));
279+
280+/* OpRegion mailbox #3: ASLE */
281+struct opregion_asle {
282+ u32 ardy; /* driver readiness */
283+ u32 aslc; /* ASLE interrupt command */
284+ u32 tche; /* technology enabled indicator */
285+ u32 alsi; /* current ALS illuminance reading */
286+ u32 bclp; /* backlight brightness to set */
287+ u32 pfit; /* panel fitting state */
288+ u32 cblv; /* current brightness level */
289+ u16 bclm[20]; /* backlight level duty cycle mapping table */
290+ u32 cpfm; /* current panel fitting mode */
291+ u32 epfm; /* enabled panel fitting modes */
292+ u8 plut[74]; /* panel LUT and identifier */
293+ u32 pfmb; /* PWM freq and min brightness */
294+ u8 rsvd[102];
295+} __attribute__((packed));
296+
297+/* ASLE irq request bits */
298+#define ASLE_SET_ALS_ILLUM (1 << 0)
299+#define ASLE_SET_BACKLIGHT (1 << 1)
300+#define ASLE_SET_PFIT (1 << 2)
301+#define ASLE_SET_PWM_FREQ (1 << 3)
302+#define ASLE_REQ_MSK 0xf
303+
304+/* response bits of ASLE irq request */
305+#define ASLE_ALS_ILLUM_FAIL (2<<10)
306+#define ASLE_BACKLIGHT_FAIL (2<<12)
307+#define ASLE_PFIT_FAIL (2<<14)
308+#define ASLE_PWM_FREQ_FAIL (2<<16)
309+
310+/* ASLE backlight brightness to set */
311+#define ASLE_BCLP_VALID (1<<31)
312+#define ASLE_BCLP_MSK (~(1<<31))
313+
314+/* ASLE panel fitting request */
315+#define ASLE_PFIT_VALID (1<<31)
316+#define ASLE_PFIT_CENTER (1<<0)
317+#define ASLE_PFIT_STRETCH_TEXT (1<<1)
318+#define ASLE_PFIT_STRETCH_GFX (1<<2)
319+
320+/* PWM frequency and minimum brightness */
321+#define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
322+#define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
323+#define ASLE_PFMB_PWM_MASK (0x7ffffe00)
324+#define ASLE_PFMB_PWM_VALID (1<<31)
325+
326+#define ASLE_CBLV_VALID (1<<31)
327+
328+static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
329+{
330+ struct drm_i915_private *dev_priv = dev->dev_private;
331+ struct opregion_asle *asle = dev_priv->opregion.asle;
332+ u32 blc_pwm_ctl, blc_pwm_ctl2;
333+
334+ if (!(bclp & ASLE_BCLP_VALID))
335+ return ASLE_BACKLIGHT_FAIL;
336+
337+ bclp &= ASLE_BCLP_MSK;
338+ if (bclp < 0 || bclp > 255)
339+ return ASLE_BACKLIGHT_FAIL;
340+
341+ blc_pwm_ctl = I915_READ(BLC_PWM_CTL);
342+ blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
343+ blc_pwm_ctl2 = I915_READ(BLC_PWM_CTL2);
344+
345+ if (blc_pwm_ctl2 & BLM_COMBINATION_MODE)
346+ pci_write_config_dword(dev->pdev, PCI_LBPC, bclp);
347+ else
348+ I915_WRITE(BLC_PWM_CTL, blc_pwm_ctl | ((bclp * 0x101)-1));
349+
350+ asle->cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID;
351+
352+ return 0;
353+}
354+
355+static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi)
356+{
357+ /* alsi is the current ALS reading in lux. 0 indicates below sensor
358+ range, 0xffff indicates above sensor range. 1-0xfffe are valid */
359+ return 0;
360+}
361+
362+static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb)
363+{
364+ struct drm_i915_private *dev_priv = dev->dev_private;
365+ if (pfmb & ASLE_PFMB_PWM_VALID) {
366+ u32 blc_pwm_ctl = I915_READ(BLC_PWM_CTL);
367+ u32 pwm = pfmb & ASLE_PFMB_PWM_MASK;
368+ blc_pwm_ctl &= BACKLIGHT_DUTY_CYCLE_MASK;
369+ pwm = pwm >> 9;
370+ /* FIXME - what do we do with the PWM? */
371+ }
372+ return 0;
373+}
374+
375+static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)
376+{
377+ /* Panel fitting is currently controlled by the X code, so this is a
378+ noop until modesetting support works fully */
379+ if (!(pfit & ASLE_PFIT_VALID))
380+ return ASLE_PFIT_FAIL;
381+ return 0;
382+}
383+
384+void opregion_asle_intr(struct drm_device *dev)
385+{
386+ struct drm_i915_private *dev_priv = dev->dev_private;
387+ struct opregion_asle *asle = dev_priv->opregion.asle;
388+ u32 asle_stat = 0;
389+ u32 asle_req;
390+
391+ if (!asle)
392+ return;
393+
394+ asle_req = asle->aslc & ASLE_REQ_MSK;
395+
396+ if (!asle_req) {
397+ DRM_DEBUG("non asle set request??\n");
398+ return;
399+ }
400+
401+ if (asle_req & ASLE_SET_ALS_ILLUM)
402+ asle_stat |= asle_set_als_illum(dev, asle->alsi);
403+
404+ if (asle_req & ASLE_SET_BACKLIGHT)
405+ asle_stat |= asle_set_backlight(dev, asle->bclp);
406+
407+ if (asle_req & ASLE_SET_PFIT)
408+ asle_stat |= asle_set_pfit(dev, asle->pfit);
409+
410+ if (asle_req & ASLE_SET_PWM_FREQ)
411+ asle_stat |= asle_set_pwm_freq(dev, asle->pfmb);
412+
413+ asle->aslc = asle_stat;
414+}
415+
416+#define ASLE_ALS_EN (1<<0)
417+#define ASLE_BLC_EN (1<<1)
418+#define ASLE_PFIT_EN (1<<2)
419+#define ASLE_PFMB_EN (1<<3)
420+
421+void opregion_enable_asle(struct drm_device *dev)
422+{
423+ struct drm_i915_private *dev_priv = dev->dev_private;
424+ struct opregion_asle *asle = dev_priv->opregion.asle;
425+
426+ if (asle) {
427+ u32 pipeb_stats = I915_READ(PIPEBSTAT);
428+ if (IS_MOBILE(dev)) {
429+ /* Many devices trigger events with a write to the
430+ legacy backlight controller, so we need to ensure
431+ that it's able to generate interrupts */
432+ I915_WRITE(PIPEBSTAT, pipeb_stats |=
433+ I915_LEGACY_BLC_EVENT_ENABLE);
434+ i915_enable_irq(dev_priv, I915_ASLE_INTERRUPT |
435+ I915_DISPLAY_PIPE_B_EVENT_INTERRUPT);
436+ } else
437+ i915_enable_irq(dev_priv, I915_ASLE_INTERRUPT);
438+
439+ asle->tche = ASLE_ALS_EN | ASLE_BLC_EN | ASLE_PFIT_EN |
440+ ASLE_PFMB_EN;
441+ asle->ardy = 1;
442+ }
443+}
444+
445+#define ACPI_EV_DISPLAY_SWITCH (1<<0)
446+#define ACPI_EV_LID (1<<1)
447+#define ACPI_EV_DOCK (1<<2)
448+
449+static struct intel_opregion *system_opregion;
450+
451+int intel_opregion_video_event(struct notifier_block *nb, unsigned long val,
452+ void *data)
453+{
454+ /* The only video events relevant to opregion are 0x80. These indicate
455+ either a docking event, lid switch or display switch request. In
456+ Linux, these are handled by the dock, button and video drivers.
457+ We might want to fix the video driver to be opregion-aware in
458+ future, but right now we just indicate to the firmware that the
459+ request has been handled */
460+
461+ struct opregion_acpi *acpi;
462+
463+ if (!system_opregion)
464+ return NOTIFY_DONE;
465+
466+ acpi = system_opregion->acpi;
467+ acpi->csts = 0;
468+
469+ return NOTIFY_OK;
470+}
471+
472+static struct notifier_block intel_opregion_notifier = {
473+ .notifier_call = intel_opregion_video_event,
474+};
475+
476+int intel_opregion_init(struct drm_device *dev)
477+{
478+ struct drm_i915_private *dev_priv = dev->dev_private;
479+ struct intel_opregion *opregion = &dev_priv->opregion;
480+ void *base;
481+ u32 asls, mboxes;
482+ int err = 0;
483+
484+ pci_read_config_dword(dev->pdev, PCI_ASLS, &asls);
485+ DRM_DEBUG("graphic opregion physical addr: 0x%x\n", asls);
486+ if (asls == 0) {
487+ DRM_DEBUG("ACPI OpRegion not supported!\n");
488+ return -ENOTSUPP;
489+ }
490+
491+ base = ioremap(asls, OPREGION_SZ);
492+ if (!base)
493+ return -ENOMEM;
494+
495+ opregion->header = base;
496+ if (memcmp(opregion->header->signature, OPREGION_SIGNATURE, 16)) {
497+ DRM_DEBUG("opregion signature mismatch\n");
498+ err = -EINVAL;
499+ goto err_out;
500+ }
501+
502+ mboxes = opregion->header->mboxes;
503+ if (mboxes & MBOX_ACPI) {
504+ DRM_DEBUG("Public ACPI methods supported\n");
505+ opregion->acpi = base + OPREGION_ACPI_OFFSET;
506+ } else {
507+ DRM_DEBUG("Public ACPI methods not supported\n");
508+ err = -ENOTSUPP;
509+ goto err_out;
510+ }
511+ opregion->enabled = 1;
512+
513+ if (mboxes & MBOX_SWSCI) {
514+ DRM_DEBUG("SWSCI supported\n");
515+ opregion->swsci = base + OPREGION_SWSCI_OFFSET;
516+ }
517+ if (mboxes & MBOX_ASLE) {
518+ DRM_DEBUG("ASLE supported\n");
519+ opregion->asle = base + OPREGION_ASLE_OFFSET;
520+ }
521+
522+ /* Notify BIOS we are ready to handle ACPI video ext notifs.
523+ * Right now, all the events are handled by the ACPI video module.
524+ * We don't actually need to do anything with them. */
525+ opregion->acpi->csts = 0;
526+ opregion->acpi->drdy = 1;
527+
528+ system_opregion = opregion;
529+ register_acpi_notifier(&intel_opregion_notifier);
530+
531+ return 0;
532+
533+err_out:
534+ iounmap(opregion->header);
535+ opregion->header = NULL;
536+ return err;
537+}
538+
539+void intel_opregion_free(struct drm_device *dev)
540+{
541+ struct drm_i915_private *dev_priv = dev->dev_private;
542+ struct intel_opregion *opregion = &dev_priv->opregion;
543+
544+ if (!opregion->enabled)
545+ return;
546+
547+ opregion->acpi->drdy = 0;
548+
549+ system_opregion = NULL;
550+ unregister_acpi_notifier(&intel_opregion_notifier);
551+
552+ /* just clear all opregion memory pointers now */
553+ iounmap(opregion->header);
554+ opregion->header = NULL;
555+ opregion->acpi = NULL;
556+ opregion->swsci = NULL;
557+ opregion->asle = NULL;
558+
559+ opregion->enabled = 0;
560+}
561diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
562index 477c64e..43ad2cb 100644
563--- a/drivers/gpu/drm/i915/i915_reg.h
564+++ b/drivers/gpu/drm/i915/i915_reg.h
565@@ -740,6 +740,7 @@
566 #define BLC_PWM_CTL 0x61254
567 #define BACKLIGHT_MODULATION_FREQ_SHIFT (17)
568 #define BLC_PWM_CTL2 0x61250 /* 965+ only */
569+#define BLM_COMBINATION_MODE (1 << 30)
570 /*
571 * This is the most significant 15 bits of the number of backlight cycles in a
572 * complete cycle of the modulated backlight control.
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-03-01 15:13:53 +0000