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-rw-r--r--meta/recipes-devtools/binutils/binutils-2.26.inc1
-rw-r--r--meta/recipes-devtools/binutils/binutils/0015-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch36
2 files changed, 37 insertions, 0 deletions
diff --git a/meta/recipes-devtools/binutils/binutils-2.26.inc b/meta/recipes-devtools/binutils/binutils-2.26.inc
index 6d535fcaa3..6d77452f5f 100644
--- a/meta/recipes-devtools/binutils/binutils-2.26.inc
+++ b/meta/recipes-devtools/binutils/binutils-2.26.inc
@@ -34,6 +34,7 @@ SRC_URI = "\
34 file://0012-Add-support-for-Netlogic-XLP.patch \ 34 file://0012-Add-support-for-Netlogic-XLP.patch \
35 file://0013-Fix-GOT-address-computations-in-initial-PLT-entries-.patch \ 35 file://0013-Fix-GOT-address-computations-in-initial-PLT-entries-.patch \
36 file://0014-Correct-nios2-_gp-address-computation.patch \ 36 file://0014-Correct-nios2-_gp-address-computation.patch \
37 file://0015-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch \
37" 38"
38S = "${WORKDIR}/git" 39S = "${WORKDIR}/git"
39 40
diff --git a/meta/recipes-devtools/binutils/binutils/0015-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch b/meta/recipes-devtools/binutils/binutils/0015-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch
new file mode 100644
index 0000000000..5aa5e318e9
--- /dev/null
+++ b/meta/recipes-devtools/binutils/binutils/0015-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch
@@ -0,0 +1,36 @@
1From 78decbeb84fb60db4e549ad3e8eb34e030e96d39 Mon Sep 17 00:00:00 2001
2From: Zhenhua Luo <zhenhua.luo@nxp.com>
3Date: Sat, 11 Jun 2016 22:08:29 -0500
4Subject: [PATCH] fix the incorrect assembling for ppc wait mnemonic
5
6Signed-off-by: Zhenhua Luo <zhenhua.luo@nxp.com>
7
8Upstream-Status: Pending
9---
10 opcodes/ppc-opc.c | 3 +--
11 1 file changed, 1 insertion(+), 2 deletions(-)
12
13diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
14index e8c92f6..a9de474 100644
15--- a/opcodes/ppc-opc.c
16+++ b/opcodes/ppc-opc.c
17@@ -4777,7 +4777,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
18 {"ldepx", X(31,29), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RT, RA0, RB}},
19
20 {"waitasec", X(31,30), XRTRARB_MASK,POWER8, POWER9, {0}},
21-{"wait", X(31,30), XWC_MASK, POWER9, PPCNONE, {WC}},
22
23 {"lwepx", X(31,31), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RT, RA0, RB}},
24
25@@ -4831,7 +4830,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
26
27 {"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, PPCNONE, {0}},
28 {"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, PPCNONE, {0}},
29-{"wait", X(31,62), XWC_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {WC}},
30+{"wait", X(31,62), XWC_MASK, E500MC|PPCA2|PPCVLE|POWER9, PPCNONE, {WC}},
31
32 {"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RA0, RB}},
33
34--
352.5.0
36