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-rw-r--r--meta/recipes-devtools/binutils/binutils-2.28.inc1
-rw-r--r--meta/recipes-devtools/binutils/binutils/0016-Detect-64-bit-MIPS-targets.patch50
2 files changed, 51 insertions, 0 deletions
diff --git a/meta/recipes-devtools/binutils/binutils-2.28.inc b/meta/recipes-devtools/binutils/binutils-2.28.inc
index fcf30357f6..76b81b04ca 100644
--- a/meta/recipes-devtools/binutils/binutils-2.28.inc
+++ b/meta/recipes-devtools/binutils/binutils-2.28.inc
@@ -34,6 +34,7 @@ SRC_URI = "\
34 file://0013-Add-support-for-Netlogic-XLP.patch \ 34 file://0013-Add-support-for-Netlogic-XLP.patch \
35 file://0014-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch \ 35 file://0014-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch \
36 file://0015-sync-with-OE-libtool-changes.patch \ 36 file://0015-sync-with-OE-libtool-changes.patch \
37 file://0016-Detect-64-bit-MIPS-targets.patch \
37" 38"
38S = "${WORKDIR}/git" 39S = "${WORKDIR}/git"
39 40
diff --git a/meta/recipes-devtools/binutils/binutils/0016-Detect-64-bit-MIPS-targets.patch b/meta/recipes-devtools/binutils/binutils/0016-Detect-64-bit-MIPS-targets.patch
new file mode 100644
index 0000000000..1b2eb8485c
--- /dev/null
+++ b/meta/recipes-devtools/binutils/binutils/0016-Detect-64-bit-MIPS-targets.patch
@@ -0,0 +1,50 @@
1From c3ebde5d8cc3b0092966b4d725cad7cfd074fd8d Mon Sep 17 00:00:00 2001
2From: Khem Raj <raj.khem@gmail.com>
3Date: Fri, 31 Mar 2017 11:42:03 -0700
4Subject: [PATCH 16/16] Detect 64-bit MIPS targets
5
6Add mips64 target triplets and default to N64
7
8Upstream-Status: Submitted
9https://sourceware.org/ml/binutils/2016-08/msg00048.html
10
11Signed-off-by: Khem Raj <raj.khem@gmail.com>
12---
13 gold/configure.tgt | 14 ++++++++++++++
14 1 file changed, 14 insertions(+)
15
16diff --git a/gold/configure.tgt b/gold/configure.tgt
17index 3d63027297..c1f92a1360 100644
18--- a/gold/configure.tgt
19+++ b/gold/configure.tgt
20@@ -153,6 +153,13 @@ aarch64*-*)
21 targ_big_endian=false
22 targ_extra_big_endian=true
23 ;;
24+mips*64*el*-*-*|mips*64*le*-*-*)
25+ targ_obj=mips
26+ targ_machine=EM_MIPS_RS3_LE
27+ targ_size=64
28+ targ_big_endian=false
29+ targ_extra_big_endian=true
30+ ;;
31 mips*el*-*-*|mips*le*-*-*)
32 targ_obj=mips
33 targ_machine=EM_MIPS_RS3_LE
34@@ -160,6 +167,13 @@ mips*el*-*-*|mips*le*-*-*)
35 targ_big_endian=false
36 targ_extra_big_endian=true
37 ;;
38+mips*64*-*-*)
39+ targ_obj=mips
40+ targ_machine=EM_MIPS
41+ targ_size=64
42+ targ_big_endian=true
43+ targ_extra_big_endian=false
44+ ;;
45 mips*-*-*)
46 targ_obj=mips
47 targ_machine=EM_MIPS
48--
492.12.1
50