summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--meta/recipes-devtools/gcc/gcc-4.9.inc1
-rw-r--r--meta/recipes-devtools/gcc/gcc-4.9/0052-Fix-GCC-targeting-E500-SPE-errors-with-the-_Decimal64-type.patch98
2 files changed, 99 insertions, 0 deletions
diff --git a/meta/recipes-devtools/gcc/gcc-4.9.inc b/meta/recipes-devtools/gcc/gcc-4.9.inc
index a409430f5e..9b4fc2c9ee 100644
--- a/meta/recipes-devtools/gcc/gcc-4.9.inc
+++ b/meta/recipes-devtools/gcc/gcc-4.9.inc
@@ -65,6 +65,7 @@ SRC_URI = "${GNU_MIRROR}/gcc/gcc-${PV}/gcc-${PV}.tar.bz2 \
65 file://0049-Enable-SPE-AltiVec-generation-on-powepc-linux-target.patch \ 65 file://0049-Enable-SPE-AltiVec-generation-on-powepc-linux-target.patch \
66 file://0050-Revert-Use-dbx_reg_number-for-spanning-registers.patch \ 66 file://0050-Revert-Use-dbx_reg_number-for-spanning-registers.patch \
67 file://0051-eabispe.patch \ 67 file://0051-eabispe.patch \
68 file://0052-Fix-GCC-targeting-E500-SPE-errors-with-the-_Decimal64-type.patch \
68 " 69 "
69SRC_URI[md5sum] = "9709b49ae0e904cbb0a6a1b62853b556" 70SRC_URI[md5sum] = "9709b49ae0e904cbb0a6a1b62853b556"
70SRC_URI[sha256sum] = "b9b047a97bade9c1c89970bc8e211ff57b7b8998a1730a80a653d329f8ed1257" 71SRC_URI[sha256sum] = "b9b047a97bade9c1c89970bc8e211ff57b7b8998a1730a80a653d329f8ed1257"
diff --git a/meta/recipes-devtools/gcc/gcc-4.9/0052-Fix-GCC-targeting-E500-SPE-errors-with-the-_Decimal64-type.patch b/meta/recipes-devtools/gcc/gcc-4.9/0052-Fix-GCC-targeting-E500-SPE-errors-with-the-_Decimal64-type.patch
new file mode 100644
index 0000000000..b4be18e212
--- /dev/null
+++ b/meta/recipes-devtools/gcc/gcc-4.9/0052-Fix-GCC-targeting-E500-SPE-errors-with-the-_Decimal64-type.patch
@@ -0,0 +1,98 @@
1From e44a6d438db4848c2a555be773568a3cf7994206 Mon Sep 17 00:00:00 2001
2From: Alexandru-Cezar Sardan <alexandru.sardan-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
3Date: Mon, 26 May 2014 12:11:13 +0300
4Subject: [PATCH] Fix E500 with SPE errors with the _Decimal64 type
5
6[gcc]
72014-04-21 Michael Meissner <meissner-23VcF4HTsmIX0ybBhKVfKdBPR1lH4CV8@public.gmane.org>
8
9 PR target/60735
10 * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64 case):
11 If mode is DDmode and TARGET_E500_DOUBLE allow move.
12
13 * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print some
14 more debug information for E500 if -mdebug=reg.
15
16[gcc/testsuite]
172014-04-21 Michael Meissner <meissner-23VcF4HTsmIX0ybBhKVfKdBPR1lH4CV8@public.gmane.org>
18
19 PR target/60735
20 * gcc.target/powerpc/pr60735.c: New test. Insure _Decimal64 does
21 not cause errors if -mspe.
22
23Upstream status: Accepted
24
25This solves upstream bug 60735
26(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735).
27
28Patch taken from https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=209664
29---
30 gcc/config/rs6000/rs6000.c | 18 ++++++++++++++++++
31 gcc/config/rs6000/rs6000.md | 3 ++-
32 gcc/testsuite/gcc.target/powerpc/pr60735.c | 11 +++++++++++
33 3 files changed, 31 insertions(+), 1 deletion(-)
34 create mode 100644 gcc/testsuite/gcc.target/powerpc/pr60735.c
35
36diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
37index 494efc5..6dcf440 100644
38--- a/gcc/config/rs6000/rs6000.c
39+++ b/gcc/config/rs6000/rs6000.c
40@@ -2283,6 +2283,24 @@ rs6000_debug_reg_global (void)
41 if (rs6000_float_gprs)
42 fprintf (stderr, DEBUG_FMT_S, "float_gprs", "true");
43
44+ fprintf (stderr, DEBUG_FMT_S, "fprs",
45+ (TARGET_FPRS ? "true" : "false"));
46+
47+ fprintf (stderr, DEBUG_FMT_S, "single_float",
48+ (TARGET_SINGLE_FLOAT ? "true" : "false"));
49+
50+ fprintf (stderr, DEBUG_FMT_S, "double_float",
51+ (TARGET_DOUBLE_FLOAT ? "true" : "false"));
52+
53+ fprintf (stderr, DEBUG_FMT_S, "soft_float",
54+ (TARGET_SOFT_FLOAT ? "true" : "false"));
55+
56+ fprintf (stderr, DEBUG_FMT_S, "e500_single",
57+ (TARGET_E500_SINGLE ? "true" : "false"));
58+
59+ fprintf (stderr, DEBUG_FMT_S, "e500_double",
60+ (TARGET_E500_DOUBLE ? "true" : "false"));
61+
62 if (TARGET_LINK_STACK)
63 fprintf (stderr, DEBUG_FMT_S, "link_stack", "true");
64
65diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
66index 64c9e7c..9cefe15 100644
67--- a/gcc/config/rs6000/rs6000.md
68+++ b/gcc/config/rs6000/rs6000.md
69@@ -9395,7 +9395,8 @@
70 (match_operand:FMOVE64 1 "input_operand" "r,Y,r,G,H,F"))]
71 "! TARGET_POWERPC64
72 && ((TARGET_FPRS && TARGET_SINGLE_FLOAT)
73- || TARGET_SOFT_FLOAT || TARGET_E500_SINGLE)
74+ || TARGET_SOFT_FLOAT || TARGET_E500_SINGLE
75+ || (<MODE>mode == DDmode && TARGET_E500_DOUBLE))
76 && (gpc_reg_operand (operands[0], <MODE>mode)
77 || gpc_reg_operand (operands[1], <MODE>mode))"
78 "#"
79diff --git a/gcc/testsuite/gcc.target/powerpc/pr60735.c b/gcc/testsuite/gcc.target/powerpc/pr60735.c
80new file mode 100644
81index 0000000..9bac30b
82--- /dev/null
83+++ b/gcc/testsuite/gcc.target/powerpc/pr60735.c
84@@ -0,0 +1,11 @@
85+/* { dg-do compile } */
86+/* { dg-options "-mcpu=8548 -mspe -mabi=spe -O2" } */
87+/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */
88+
89+/* In PR60735, the type _Decimal64 generated an insn not found message. */
90+
91+void
92+pr60735 (_Decimal64 *p, _Decimal64 *q)
93+{
94+ *p = *q;
95+}
96--
971.7.9.5
98