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author | Limeng <Meng.Li@windriver.com> | 2019-09-11 17:59:47 +0800 |
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committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2019-09-16 23:02:44 +0100 |
commit | 1edc497a80fb967c5ccf5293b4f746645260b780 (patch) | |
tree | a4f83af18336fffd2a24e42a7803114fccc142d7 /scripts/combo-layer-hook-default.sh | |
parent | 6606a86979f596877b60184a81d7bfc3f06c1751 (diff) | |
download | poky-1edc497a80fb967c5ccf5293b4f746645260b780.tar.gz |
tune-cortexa57-cortexa53: add tunes for ARM Cortex-A53-Cortex-A57
commit 3613b2780a6b5d5d70ea6802be5060a8214cbdb5 from
git://github.com/renesas-rcar/meta-renesas
The renesas rcar SoC H3/M3 is big.LITTLE architecture(cortex-a57.cortex-a53).
In order to optimize the performance of the code running on SoC H3/M3,
add a tune file for ARM Cortex-A53-Cortex-A57.
Create this tune file by refering GCC doc, 3.18.5 ARM Options.
(From OE-Core rev: 7e0c9290a9971b92bcb313742f126ca7488d91c3)
Signed-off-by: Meng Li <Meng.Li@windriver.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'scripts/combo-layer-hook-default.sh')
0 files changed, 0 insertions, 0 deletions