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authorTaras Kondratiuk via Openembedded-core <openembedded-core@lists.openembedded.org>2020-02-04 02:20:06 +0000
committerRichard Purdie <richard.purdie@linuxfoundation.org>2020-02-11 23:05:12 +0000
commit2b0ad2bcad0ef7bbae833f38cbcf017a529ba40e (patch)
tree1108aeb95ae357184adacecb7cb8a5481ab4c69c /meta
parent743578651661a8de67574474cbd96df1a7f1190e (diff)
downloadpoky-2b0ad2bcad0ef7bbae833f38cbcf017a529ba40e.tar.gz
gcc-9.2: fix bug #91102 'aarch64 ICE on Linux kernel with -Os'
Linux kernel compilation for aarch64 triggers ICE if CONFIG_CC_OPTIMIZE_FOR_SIZE=y. The rootcause is GCC bug #91102 'aarch64 ICE on Linux kernel with -Os'. Apply the fix to 9.2. (From OE-Core rev: 14f34d32bfdaa752f5043e62750d2e7b92c4b419) (From OE-Core rev: 8ebd3b4ed4995f27c1568cf873067ce24b1998bd) Signed-off-by: Taras Kondratiuk <takondra@cisco.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org> Signed-off-by: Anuj Mittal <anuj.mittal@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta')
-rw-r--r--meta/recipes-devtools/gcc/gcc-9.2.inc1
-rw-r--r--meta/recipes-devtools/gcc/gcc-9.2/re-PR-target-91102-aarch64-ICE-on-Linux-kernel-with-.patch95
2 files changed, 96 insertions, 0 deletions
diff --git a/meta/recipes-devtools/gcc/gcc-9.2.inc b/meta/recipes-devtools/gcc/gcc-9.2.inc
index c6395998d5..4f068231f3 100644
--- a/meta/recipes-devtools/gcc/gcc-9.2.inc
+++ b/meta/recipes-devtools/gcc/gcc-9.2.inc
@@ -68,6 +68,7 @@ SRC_URI = "\
68 file://CVE-2019-15847_1.patch \ 68 file://CVE-2019-15847_1.patch \
69 file://CVE-2019-15847_2.patch \ 69 file://CVE-2019-15847_2.patch \
70 file://CVE-2019-15847_3.patch \ 70 file://CVE-2019-15847_3.patch \
71 file://re-PR-target-91102-aarch64-ICE-on-Linux-kernel-with-.patch \
71" 72"
72S = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/gcc-${PV}" 73S = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/gcc-${PV}"
73SRC_URI[md5sum] = "3818ad8600447f05349098232c2ddc78" 74SRC_URI[md5sum] = "3818ad8600447f05349098232c2ddc78"
diff --git a/meta/recipes-devtools/gcc/gcc-9.2/re-PR-target-91102-aarch64-ICE-on-Linux-kernel-with-.patch b/meta/recipes-devtools/gcc/gcc-9.2/re-PR-target-91102-aarch64-ICE-on-Linux-kernel-with-.patch
new file mode 100644
index 0000000000..c37e0bb9dd
--- /dev/null
+++ b/meta/recipes-devtools/gcc/gcc-9.2/re-PR-target-91102-aarch64-ICE-on-Linux-kernel-with-.patch
@@ -0,0 +1,95 @@
1From efb0ee06f5c0186c2d1442ecd4dbbd55dbd97b44 Mon Sep 17 00:00:00 2001
2From: Vladimir Makarov <vmakarov@redhat.com>
3Date: Wed, 10 Jul 2019 16:07:10 +0000
4Subject: [PATCH] re PR target/91102 (aarch64 ICE on Linux kernel with -Os
5 starting with r270266)
6
72019-07-10 Vladimir Makarov <vmakarov@redhat.com>
8
9 PR target/91102
10 * lra-constraints.c (process_alt_operands): Don't match user
11 defined regs only if they are early clobbers.
12
132019-07-10 Vladimir Makarov <vmakarov@redhat.com>
14
15 PR target/91102
16 * gcc.target/aarch64/pr91102.c: New test.
17
18From-SVN: r273357
19Upstream-Status: Backport [https://github.com/gcc-mirror/gcc/commit/613caed2feb9cfc8158308670b59df3d031ec629]
20[takondra: dropped conflicting ChangeLog changes]
21Signed-off-by: Taras Kondratiuk <takondra@cisco.com>
22---
23 gcc/lra-constraints.c | 17 ++++++++++----
24 gcc/testsuite/gcc.target/aarch64/pr91102.c | 26 ++++++++++++++++++++++
25 2 files changed, 39 insertions(+), 4 deletions(-)
26 create mode 100644 gcc/testsuite/gcc.target/aarch64/pr91102.c
27
28diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
29index cf33da8013e4..6382dbf852b6 100644
30--- a/gcc/lra-constraints.c
31+++ b/gcc/lra-constraints.c
32@@ -2172,8 +2172,9 @@ process_alt_operands (int only_alternative)
33 else
34 {
35 /* Operands don't match. If the operands are
36- different user defined explicit hard registers,
37- then we cannot make them match. */
38+ different user defined explicit hard
39+ registers, then we cannot make them match
40+ when one is early clobber operand. */
41 if ((REG_P (*curr_id->operand_loc[nop])
42 || SUBREG_P (*curr_id->operand_loc[nop]))
43 && (REG_P (*curr_id->operand_loc[m])
44@@ -2192,9 +2193,17 @@ process_alt_operands (int only_alternative)
45 && REG_P (m_reg)
46 && HARD_REGISTER_P (m_reg)
47 && REG_USERVAR_P (m_reg))
48- break;
49+ {
50+ int i;
51+
52+ for (i = 0; i < early_clobbered_regs_num; i++)
53+ if (m == early_clobbered_nops[i])
54+ break;
55+ if (i < early_clobbered_regs_num
56+ || early_clobber_p)
57+ break;
58+ }
59 }
60-
61 /* Both operands must allow a reload register,
62 otherwise we cannot make them match. */
63 if (curr_alt[m] == NO_REGS)
64diff --git a/gcc/testsuite/gcc.target/aarch64/pr91102.c b/gcc/testsuite/gcc.target/aarch64/pr91102.c
65new file mode 100644
66index 000000000000..70b99045a48e
67--- /dev/null
68+++ b/gcc/testsuite/gcc.target/aarch64/pr91102.c
69@@ -0,0 +1,26 @@
70+/* PR target/91102 */
71+/* { dg-do compile } */
72+/* { dg-options "-O2" } */
73+
74+int
75+foo (long d, long l)
76+{
77+ register long e asm ("x1") = d;
78+ register long f asm("x2") = l;
79+ asm ("" : : "r" (e), "r" (f));
80+ return 3;
81+}
82+
83+struct T { int i; int j; };
84+union S { long h; struct T t; };
85+
86+void
87+bar (union S b)
88+{
89+ while (1)
90+ {
91+ union S c = b;
92+ c.t.j++;
93+ b.h = foo (b.h, c.h);
94+ }
95+}