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authorRichard Purdie <rpurdie@linux.intel.com>2010-08-27 15:14:24 +0100
committerRichard Purdie <rpurdie@linux.intel.com>2010-08-27 15:29:45 +0100
commit29d6678fd546377459ef75cf54abeef5b969b5cf (patch)
tree8edd65790e37a00d01c3f203f773fe4b5012db18 /meta/recipes-kernel/linux/linux-omap-2.6.29/beagleboard/ehci.patch
parentda49de6885ee1bc424e70bc02f21f6ab920efb55 (diff)
downloadpoky-29d6678fd546377459ef75cf54abeef5b969b5cf.tar.gz
Major layout change to the packages directory
Having one monolithic packages directory makes it hard to find things and is generally overwhelming. This commit splits it into several logical sections roughly based on function, recipes.txt gives more information about the classifications used. The opportunity is also used to switch from "packages" to "recipes" as used in OpenEmbedded as the term "packages" can be confusing to people and has many different meanings. Not all recipes have been classified yet, this is just a first pass at separating things out. Some packages are moved to meta-extras as they're no longer actively used or maintained. Signed-off-by: Richard Purdie <rpurdie@linux.intel.com>
Diffstat (limited to 'meta/recipes-kernel/linux/linux-omap-2.6.29/beagleboard/ehci.patch')
-rw-r--r--meta/recipes-kernel/linux/linux-omap-2.6.29/beagleboard/ehci.patch131
1 files changed, 131 insertions, 0 deletions
diff --git a/meta/recipes-kernel/linux/linux-omap-2.6.29/beagleboard/ehci.patch b/meta/recipes-kernel/linux/linux-omap-2.6.29/beagleboard/ehci.patch
new file mode 100644
index 0000000000..5a8c84471b
--- /dev/null
+++ b/meta/recipes-kernel/linux/linux-omap-2.6.29/beagleboard/ehci.patch
@@ -0,0 +1,131 @@
1Index: git/arch/arm/mach-omap2/board-omap3beagle.c
2===================================================================
3--- git.orig/arch/arm/mach-omap2/board-omap3beagle.c
4+++ git/arch/arm/mach-omap2/board-omap3beagle.c
5@@ -154,6 +154,7 @@ static int beagle_twl_gpio_setup(struct
6 * power switch and overcurrent detect
7 */
8
9+#if 0 /* TODO: This needs to be modified to not rely on u-boot */
10 gpio_request(gpio + 1, "EHCI_nOC");
11 gpio_direction_input(gpio + 1);
12
13@@ -163,7 +164,7 @@ static int beagle_twl_gpio_setup(struct
14
15 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
16 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
17-
18+#endif
19 return 0;
20 }
21
22Index: git/arch/arm/mach-omap2/usb-ehci.c
23===================================================================
24--- git.orig/arch/arm/mach-omap2/usb-ehci.c
25+++ git/arch/arm/mach-omap2/usb-ehci.c
26@@ -147,9 +147,11 @@ static void setup_ehci_io_mux(void)
27
28 void __init usb_ehci_init(void)
29 {
30+#if 0 /* TODO: Setup Pin IO MUX for EHCI - moved this temporarily to U-boot */
31 /* Setup Pin IO MUX for EHCI */
32 if (cpu_is_omap34xx())
33 setup_ehci_io_mux();
34+#endif
35
36 if (platform_device_register(&ehci_device) < 0) {
37 printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n");
38Index: git/drivers/usb/host/ehci-omap.c
39===================================================================
40--- git.orig/drivers/usb/host/ehci-omap.c
41+++ git/drivers/usb/host/ehci-omap.c
42@@ -48,16 +48,25 @@
43 * to get the PHY state machine in working state
44 */
45 #define EXTERNAL_PHY_RESET
46+#ifdef CONFIG_MACH_OMAP3_BEAGLE
47+#define EXT_PHY_RESET_GPIO_PORT2 (147)
48+#else
49 #define EXT_PHY_RESET_GPIO_PORT1 (57)
50 #define EXT_PHY_RESET_GPIO_PORT2 (61)
51+#endif
52 #define EXT_PHY_RESET_DELAY (10)
53
54+#define PHY_STP_PULLUP_ENABLE (0x10)
55+#define PHY_STP_PULLUP_DISABLE (0x90)
56+
57 /* ISSUE2:
58 * USBHOST supports External charge pump PHYs only
59 * Use the VBUS from Port1 to power VBUS of Port2 externally
60 * So use Port2 as the working ULPI port
61 */
62+#ifndef CONFIG_MACH_OMAP3_BEAGLE
63 #define VBUS_INTERNAL_CHARGEPUMP_HACK
64+#endif
65
66 #endif /* CONFIG_OMAP_EHCI_PHY_MODE */
67
68@@ -225,14 +234,43 @@ static int omap_start_ehc(struct platfor
69
70 #ifdef EXTERNAL_PHY_RESET
71 /* Refer: ISSUE1 */
72+#ifndef CONFIG_MACH_OMAP3_BEAGLE
73 gpio_request(EXT_PHY_RESET_GPIO_PORT1, "USB1 PHY reset");
74 gpio_direction_output(EXT_PHY_RESET_GPIO_PORT1, 0);
75+#endif
76 gpio_request(EXT_PHY_RESET_GPIO_PORT2, "USB2 PHY reset");
77 gpio_direction_output(EXT_PHY_RESET_GPIO_PORT2, 0);
78+ gpio_set_value(EXT_PHY_RESET_GPIO_PORT2, 0);
79 /* Hold the PHY in RESET for enough time till DIR is high */
80 udelay(EXT_PHY_RESET_DELAY);
81 #endif
82
83+ /*
84+ * The PHY register 0x7 - Interface Control register is
85+ * configured to disable the integrated STP pull-up resistor
86+ * used for interface protection.
87+ *
88+ * May not need to be here.
89+ */
90+ omap_writel((0x7 << EHCI_INSNREG05_ULPI_REGADD_SHIFT) |/* interface reg */
91+ (2 << EHCI_INSNREG05_ULPI_OPSEL_SHIFT) |/* Write */
92+ (1 << EHCI_INSNREG05_ULPI_PORTSEL_SHIFT) |/* Port1 */
93+ (1 << EHCI_INSNREG05_ULPI_CONTROL_SHIFT) |/* Start */
94+ (PHY_STP_PULLUP_DISABLE),
95+ EHCI_INSNREG05_ULPI);
96+
97+ while (!(omap_readl(EHCI_INSNREG05_ULPI) & (1<<EHCI_INSNREG05_ULPI_CONTROL_SHIFT)));
98+
99+ /* Force PHY to HS */
100+ omap_writel((0x4 << EHCI_INSNREG05_ULPI_REGADD_SHIFT) |/* function ctrl */
101+ (2 << EHCI_INSNREG05_ULPI_OPSEL_SHIFT) |/* Write */
102+ (1 << EHCI_INSNREG05_ULPI_PORTSEL_SHIFT) |/* Port1 */
103+ (1 << EHCI_INSNREG05_ULPI_CONTROL_SHIFT) |/* Start */
104+ (0x40),
105+ EHCI_INSNREG05_ULPI);
106+
107+ while (!(omap_readl(EHCI_INSNREG05_ULPI) & (1<<EHCI_INSNREG05_ULPI_CONTROL_SHIFT)));
108+
109 /* Configure TLL for 60Mhz clk for ULPI */
110 ehci_clocks->usbtll_fck_clk = clk_get(&dev->dev, USBHOST_TLL_FCLK);
111 if (IS_ERR(ehci_clocks->usbtll_fck_clk))
112@@ -307,7 +345,9 @@ static int omap_start_ehc(struct platfor
113 * Hold the PHY in RESET for enough time till PHY is settled and ready
114 */
115 udelay(EXT_PHY_RESET_DELAY);
116+#ifndef CONFIG_MACH_OMAP3_BEAGLE
117 gpio_set_value(EXT_PHY_RESET_GPIO_PORT1, 1);
118+#endif
119 gpio_set_value(EXT_PHY_RESET_GPIO_PORT2, 1);
120 #endif
121
122@@ -393,7 +433,9 @@ static void omap_stop_ehc(struct platfor
123
124
125 #ifdef EXTERNAL_PHY_RESET
126+#ifndef CONFIG_MACH_OMAP3_BEAGLE
127 gpio_free(EXT_PHY_RESET_GPIO_PORT1);
128+#endif
129 gpio_free(EXT_PHY_RESET_GPIO_PORT2);
130 #endif
131