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authorAneesh Bansal <aneesh.bansal@freescale.com>2012-01-16 17:08:15 +0530
committerRichard Purdie <richard.purdie@linuxfoundation.org>2012-01-17 14:57:47 +0000
commit93d70e4b863b17688c855c032c628bc34d7b6dd0 (patch)
tree98f1b8a5e1b367d4d62aabadfeab73bf5c34c2bf /meta/recipes-devtools
parente1d3a32bb1299b55ff8f024fdd36e508e0d3b204 (diff)
downloadpoky-93d70e4b863b17688c855c032c628bc34d7b6dd0.tar.gz
valgrind: Add mfatbu/mfatbl instructions support for pcc
This adds a patch submitted to upstream to add support for these missing ppc instructions. Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-devtools')
-rw-r--r--meta/recipes-devtools/valgrind/valgrind-3.7.0/Added-support-for-PPC-instructions-mfatbu-mfatbl.patch96
-rw-r--r--meta/recipes-devtools/valgrind/valgrind_3.7.0.bb3
2 files changed, 98 insertions, 1 deletions
diff --git a/meta/recipes-devtools/valgrind/valgrind-3.7.0/Added-support-for-PPC-instructions-mfatbu-mfatbl.patch b/meta/recipes-devtools/valgrind/valgrind-3.7.0/Added-support-for-PPC-instructions-mfatbu-mfatbl.patch
new file mode 100644
index 0000000000..41268650e1
--- /dev/null
+++ b/meta/recipes-devtools/valgrind/valgrind-3.7.0/Added-support-for-PPC-instructions-mfatbu-mfatbl.patch
@@ -0,0 +1,96 @@
1From 0bf4b0ac18d1ea41b32ad781d214b295ca1998f3 Mon Sep 17 00:00:00 2001
2From: Aneesh Bansal <aneesh.bansal@freescale.com>
3Date: Mon, 21 Nov 2011 17:31:39 +0530
4Subject: [PATCH] Added support for PPC instructions mfatbu, mfatbl.
5
6Upstream-Status: Submitted
7
8Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
9---
10Currently Valgrind 3.7.0 does not have support for PPC instructions mfatbu and mfatbl. When we run a USDPAA application with VALGRIND, the following error is given by valgrind :
11dis_proc_ctl(ppc)(mfspr,SPR)(0x20F)
12disInstr(ppc): unhandled instruction: 0x7C0F82A6
13
14
15 VEX/priv/guest_ppc_defs.h | 2 ++
16 VEX/priv/guest_ppc_helpers.c | 18 ++++++++++++++++++
17 VEX/priv/guest_ppc_toIR.c | 22 ++++++++++++++++++++++
18 3 files changed, 42 insertions(+), 0 deletions(-)
19
20diff --git a/VEX/priv/guest_ppc_defs.h b/VEX/priv/guest_ppc_defs.h
21index dd3c62e..11a34aa 100644
22--- a/VEX/priv/guest_ppc_defs.h
23+++ b/VEX/priv/guest_ppc_defs.h
24@@ -146,6 +146,8 @@ extern UInt ppc32g_dirtyhelper_MFSPR_268_269 ( UInt );
25
26 extern UInt ppc32g_dirtyhelper_MFSPR_287 ( void );
27
28+extern UInt ppc32g_dirtyhelper_MFSPR_526_527 ( UInt );
29+
30 extern void ppc32g_dirtyhelper_LVS ( VexGuestPPC32State* gst,
31 UInt vD_idx, UInt sh,
32 UInt shift_right );
33diff --git a/VEX/priv/guest_ppc_helpers.c b/VEX/priv/guest_ppc_helpers.c
34index 11aa428..b49ea3f 100644
35--- a/VEX/priv/guest_ppc_helpers.c
36+++ b/VEX/priv/guest_ppc_helpers.c
37@@ -119,6 +119,24 @@ UInt ppc32g_dirtyhelper_MFSPR_287 ( void )
38 # endif
39 }
40
41+/* CALLED FROM GENERATED CODE */
42+/* DIRTY HELPER (non-referentially transparent) */
43+UInt ppc32g_dirtyhelper_MFSPR_526_527 ( UInt r527 )
44+{
45+# if defined(__powerpc__) || defined(_AIX)
46+ UInt spr;
47+ if (r527) {
48+ __asm__ __volatile__("mfspr %0,527" : "=b"(spr));
49+ } else {
50+ __asm__ __volatile__("mfspr %0,526" : "=b"(spr));
51+ }
52+ return spr;
53+# else
54+ return 0;
55+# endif
56+}
57+
58+
59
60 /* CALLED FROM GENERATED CODE */
61 /* DIRTY HELPER (reads guest state, writes guest mem) */
62diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c
63index f8d220d..37c8974 100644
64--- a/VEX/priv/guest_ppc_toIR.c
65+++ b/VEX/priv/guest_ppc_toIR.c
66@@ -5657,6 +5657,28 @@ static Bool dis_proc_ctl ( VexAbiInfo* vbi, UInt theInstr )
67 break;
68 }
69
70+
71+ case 526 /* 0x20E */:
72+ case 527 /* 0x20F */: {
73+ UInt arg = SPR==526 ? 0 : 1;
74+ IRTemp val = newTemp(Ity_I32);
75+ IRExpr** args = mkIRExprVec_1( mkU32(arg) );
76+ IRDirty* d = unsafeIRDirty_1_N(
77+ val,
78+ 0/*regparms*/,
79+ "ppc32g_dirtyhelper_MFSPR_526_527",
80+ fnptr_to_fnentry
81+ (vbi, &ppc32g_dirtyhelper_MFSPR_526_527),
82+ args
83+ );
84+ /* execute the dirty call, dumping the result in val. */
85+ stmt( IRStmt_Dirty(d) );
86+ putIReg( rD_addr,
87+ mkWidenFrom32(ty, mkexpr(val), False/*unsigned*/) );
88+ DIP("mfspr r%u,%u", rD_addr, (UInt)SPR);
89+ break;
90+ }
91+
92 default:
93 vex_printf("dis_proc_ctl(ppc)(mfspr,SPR)(0x%x)\n", SPR);
94 return False;
95--
961.7.0.4
diff --git a/meta/recipes-devtools/valgrind/valgrind_3.7.0.bb b/meta/recipes-devtools/valgrind/valgrind_3.7.0.bb
index d2c44677f1..858bf3dda6 100644
--- a/meta/recipes-devtools/valgrind/valgrind_3.7.0.bb
+++ b/meta/recipes-devtools/valgrind/valgrind_3.7.0.bb
@@ -14,7 +14,8 @@ SRC_URI = "http://www.valgrind.org/downloads/valgrind-${PV}.tar.bz2 \
14 file://fix_unsupporting_kernel_3.patch \ 14 file://fix_unsupporting_kernel_3.patch \
15 file://fixed-perl-path.patch \ 15 file://fixed-perl-path.patch \
16 file://fix_for_automake_1.11.2.patch \ 16 file://fix_for_automake_1.11.2.patch \
17 file://configure-fix.patch" 17 file://configure-fix.patch \
18 file://Added-support-for-PPC-instructions-mfatbu-mfatbl.patch"
18 19
19SRC_URI[md5sum] = "a855fda56edf05614f099dca316d1775" 20SRC_URI[md5sum] = "a855fda56edf05614f099dca316d1775"
20SRC_URI[sha256sum] = "5d62c0330f1481fe2c593249192fa68ff454c19c34343978cc9ce91aa324cbf6" 21SRC_URI[sha256sum] = "5d62c0330f1481fe2c593249192fa68ff454c19c34343978cc9ce91aa324cbf6"