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author | Chee Yang Lee <chee.yang.lee@intel.com> | 2022-09-14 14:04:11 +0800 |
---|---|---|
committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2022-09-23 16:22:59 +0100 |
commit | b44d2090439187bcdc740736abd5a9879f455e51 (patch) | |
tree | ba68286c3d0e5f131ca625055bda0b0b2c6474f1 /meta/recipes-devtools/qemu/qemu/CVE-2020-13754-4.patch | |
parent | 20087e04b32722b0b24f8da3e3bf4dce3281571e (diff) | |
download | poky-b44d2090439187bcdc740736abd5a9879f455e51.tar.gz |
qemu: fix and ignore several CVEs
backport fixes:
CVE-2020-13754, backport patches as debian security tracker notes
https://security-tracker.debian.org/tracker/CVE-2020-13754
CVE-2021-3713
CVE-2021-3748
CVE-2021-3930
CVE-2021-4206
CVE-2021-4207
CVE-2022-0216, does not include qtest in patches, the qtest code were not available in v4.2.
Ignore:
CVE-2020-27661, issue introduced in v5.1.0-rc0
https://security-tracker.debian.org/tracker/CVE-2020-27661
(From OE-Core rev: 16a6e8530c4820f070973a1b4d64764c20706087)
Signed-off-by: Chee Yang Lee <chee.yang.lee@intel.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-devtools/qemu/qemu/CVE-2020-13754-4.patch')
-rw-r--r-- | meta/recipes-devtools/qemu/qemu/CVE-2020-13754-4.patch | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/meta/recipes-devtools/qemu/qemu/CVE-2020-13754-4.patch b/meta/recipes-devtools/qemu/qemu/CVE-2020-13754-4.patch new file mode 100644 index 0000000000..6bad07d03f --- /dev/null +++ b/meta/recipes-devtools/qemu/qemu/CVE-2020-13754-4.patch | |||
@@ -0,0 +1,39 @@ | |||
1 | From 70b78d4e71494c90d2ccb40381336bc9b9a22f79 Mon Sep 17 00:00:00 2001 | ||
2 | From: Alistair Francis <alistair.francis@wdc.com> | ||
3 | Date: Tue, 30 Jun 2020 13:12:11 -0700 | ||
4 | Subject: [PATCH] hw/riscv: Allow 64 bit access to SiFive CLINT | ||
5 | |||
6 | Commit 5d971f9e672507210e77d020d89e0e89165c8fc9 | ||
7 | "memory: Revert "memory: accept mismatching sizes in | ||
8 | memory_region_access_valid"" broke most RISC-V boards as they do 64 bit | ||
9 | accesses to the CLINT and QEMU would trigger a fault. Fix this failure | ||
10 | by allowing 8 byte accesses. | ||
11 | |||
12 | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> | ||
13 | Reviewed-by: LIU Zhiwei<zhiwei_liu@c-sky.com> | ||
14 | Message-Id: <122b78825b077e4dfd39b444d3a46fe894a7804c.1593547870.git.alistair.francis@wdc.com> | ||
15 | |||
16 | https://git.qemu.org/?p=qemu.git;a=patch;h=70b78d4e71494c90d2ccb40381336bc9b9a22f79 | ||
17 | CVE: CVE-2020-13754 | ||
18 | Upstream-Status: Backport | ||
19 | Signed-off-by: Chee Yang Lee <chee.yang.lee@intel.com> | ||
20 | --- | ||
21 | hw/riscv/sifive_clint.c | 2 +- | ||
22 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
23 | |||
24 | diff --git a/hw/riscv/sifive_clint.c b/hw/riscv/sifive_clint.c | ||
25 | index b11ffa0..669c21a 100644 | ||
26 | --- a/hw/riscv/sifive_clint.c | ||
27 | +++ b/hw/riscv/sifive_clint.c | ||
28 | @@ -181,7 +181,7 @@ static const MemoryRegionOps sifive_clint_ops = { | ||
29 | .endianness = DEVICE_LITTLE_ENDIAN, | ||
30 | .valid = { | ||
31 | .min_access_size = 4, | ||
32 | - .max_access_size = 4 | ||
33 | + .max_access_size = 8 | ||
34 | } | ||
35 | }; | ||
36 | |||
37 | -- | ||
38 | 1.8.3.1 | ||
39 | |||