diff options
author | Cristian Iorga <cristian.iorga@intel.com> | 2015-08-12 17:48:31 +0300 |
---|---|---|
committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2015-08-19 18:05:32 +0100 |
commit | a56d7e90eef4f1a16378dd9c9f47dfa70a9502d1 (patch) | |
tree | 25e572c087f8c55c72842d1c4ac088709bd6e44d /meta/recipes-devtools/qemu/qemu/04-xen-MSI-dont-open-code-pass-through-of-enable-bit-mod-CVE-2015-4106.patch | |
parent | c348fa50186fb0796bc7b793c4b8d710419f2a0d (diff) | |
download | poky-a56d7e90eef4f1a16378dd9c9f47dfa70a9502d1.tar.gz |
qemu: upgrade to 2.4.0
All CVE patches removed, included in release.
(From OE-Core rev: 3b57ca0ad44e66a1ecd39c410f63d99705c56b1e)
Signed-off-by: Cristian Iorga <cristian.iorga@intel.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-devtools/qemu/qemu/04-xen-MSI-dont-open-code-pass-through-of-enable-bit-mod-CVE-2015-4106.patch')
-rw-r--r-- | meta/recipes-devtools/qemu/qemu/04-xen-MSI-dont-open-code-pass-through-of-enable-bit-mod-CVE-2015-4106.patch | 76 |
1 files changed, 0 insertions, 76 deletions
diff --git a/meta/recipes-devtools/qemu/qemu/04-xen-MSI-dont-open-code-pass-through-of-enable-bit-mod-CVE-2015-4106.patch b/meta/recipes-devtools/qemu/qemu/04-xen-MSI-dont-open-code-pass-through-of-enable-bit-mod-CVE-2015-4106.patch deleted file mode 100644 index 87fb7f6fb7..0000000000 --- a/meta/recipes-devtools/qemu/qemu/04-xen-MSI-dont-open-code-pass-through-of-enable-bit-mod-CVE-2015-4106.patch +++ /dev/null | |||
@@ -1,76 +0,0 @@ | |||
1 | Upstream-Status: Backport | ||
2 | |||
3 | Signed-off-by: Kai Kang <kai.kang@windriver.com> | ||
4 | |||
5 | From d1d35cf4ffb6a60a356193397919e83306d0bb74 Mon Sep 17 00:00:00 2001 | ||
6 | From: Jan Beulich <jbeulich@suse.com> | ||
7 | Date: Tue, 2 Jun 2015 15:07:01 +0000 | ||
8 | Subject: xen/MSI: don't open-code pass-through of enable bit modifications | ||
9 | Bug-Debian: http://bugs.debian.org/787547 | ||
10 | |||
11 | Without this the actual XSA-131 fix would cause the enable bit to not | ||
12 | get set anymore (due to the write back getting suppressed there based | ||
13 | on the OR of emu_mask, ro_mask, and res_mask). | ||
14 | |||
15 | Note that the fiddling with the enable bit shouldn't really be done by | ||
16 | qemu, but making this work right (via libxc and the hypervisor) will | ||
17 | require more extensive changes, which can be postponed until after the | ||
18 | security issue got addressed. | ||
19 | |||
20 | This is a preparatory patch for XSA-131. | ||
21 | |||
22 | Signed-off-by: Jan Beulich <jbeulich@suse.com> | ||
23 | Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> | ||
24 | --- | ||
25 | hw/xen/xen_pt_config_init.c | 10 ++-------- | ||
26 | 1 file changed, 2 insertions(+), 8 deletions(-) | ||
27 | |||
28 | diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c | ||
29 | index 68b8f22..436d0fd 100644 | ||
30 | --- a/hw/xen/xen_pt_config_init.c | ||
31 | +++ b/hw/xen/xen_pt_config_init.c | ||
32 | @@ -1053,7 +1053,6 @@ static int xen_pt_msgctrl_reg_write(XenPCIPassthroughState *s, | ||
33 | XenPTMSI *msi = s->msi; | ||
34 | uint16_t writable_mask = 0; | ||
35 | uint16_t throughable_mask = 0; | ||
36 | - uint16_t raw_val; | ||
37 | |||
38 | /* Currently no support for multi-vector */ | ||
39 | if (*val & PCI_MSI_FLAGS_QSIZE) { | ||
40 | @@ -1066,12 +1065,11 @@ static int xen_pt_msgctrl_reg_write(XenPCIPassthroughState *s, | ||
41 | msi->flags |= cfg_entry->data & ~PCI_MSI_FLAGS_ENABLE; | ||
42 | |||
43 | /* create value for writing to I/O device register */ | ||
44 | - raw_val = *val; | ||
45 | throughable_mask = ~reg->emu_mask & valid_mask; | ||
46 | *val = XEN_PT_MERGE_VALUE(*val, dev_value, throughable_mask); | ||
47 | |||
48 | /* update MSI */ | ||
49 | - if (raw_val & PCI_MSI_FLAGS_ENABLE) { | ||
50 | + if (*val & PCI_MSI_FLAGS_ENABLE) { | ||
51 | /* setup MSI pirq for the first time */ | ||
52 | if (!msi->initialized) { | ||
53 | /* Init physical one */ | ||
54 | @@ -1099,10 +1097,6 @@ static int xen_pt_msgctrl_reg_write(XenPCIPassthroughState *s, | ||
55 | xen_pt_msi_disable(s); | ||
56 | } | ||
57 | |||
58 | - /* pass through MSI_ENABLE bit */ | ||
59 | - *val &= ~PCI_MSI_FLAGS_ENABLE; | ||
60 | - *val |= raw_val & PCI_MSI_FLAGS_ENABLE; | ||
61 | - | ||
62 | return 0; | ||
63 | } | ||
64 | |||
65 | @@ -1301,7 +1295,7 @@ static XenPTRegInfo xen_pt_emu_reg_msi[] = { | ||
66 | .size = 2, | ||
67 | .init_val = 0x0000, | ||
68 | .ro_mask = 0xFF8E, | ||
69 | - .emu_mask = 0x017F, | ||
70 | + .emu_mask = 0x017E, | ||
71 | .init = xen_pt_msgctrl_reg_init, | ||
72 | .u.w.read = xen_pt_word_reg_read, | ||
73 | .u.w.write = xen_pt_msgctrl_reg_write, | ||
74 | -- | ||
75 | 2.1.4 | ||
76 | |||