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authorKhem Raj <raj.khem@gmail.com>2020-11-16 11:55:59 -0800
committerRichard Purdie <richard.purdie@linuxfoundation.org>2020-11-17 21:53:14 +0000
commitc8bb402a3eaa97a415587848856d62819d268d4b (patch)
tree9d9f070a114670b6da6927eb683cf2758986f019 /meta/recipes-devtools/python-numpy/files
parent3ca9265dbe37e9dc86313c40f09165ae04c44d3d (diff)
downloadpoky-c8bb402a3eaa97a415587848856d62819d268d4b.tar.gz
python-numpy: Add support for riscv32
(From OE-Core rev: 151bb4a369fd1eab83d68b06010c282eec551517) Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-devtools/python-numpy/files')
-rw-r--r--meta/recipes-devtools/python-numpy/files/0001-numpy-core-Define-RISCV-32-support.patch56
1 files changed, 56 insertions, 0 deletions
diff --git a/meta/recipes-devtools/python-numpy/files/0001-numpy-core-Define-RISCV-32-support.patch b/meta/recipes-devtools/python-numpy/files/0001-numpy-core-Define-RISCV-32-support.patch
new file mode 100644
index 0000000000..b60ca1d216
--- /dev/null
+++ b/meta/recipes-devtools/python-numpy/files/0001-numpy-core-Define-RISCV-32-support.patch
@@ -0,0 +1,56 @@
1From dbcf296f84e5cef6a3ff0f1c469a4508f1e0fb15 Mon Sep 17 00:00:00 2001
2From: Khem Raj <raj.khem@gmail.com>
3Date: Sun, 15 Nov 2020 15:32:39 -0800
4Subject: [PATCH] numpy/core: Define RISCV-32 support
5
6Helps compile on riscv32
7
8Upstream-Status: Submitted [https://github.com/numpy/numpy/pull/17780]
9Signed-off-by: Khem Raj <raj.khem@gmail.com>
10---
11 numpy/core/include/numpy/npy_cpu.h | 9 +++++++--
12 numpy/core/include/numpy/npy_endian.h | 1 +
13 2 files changed, 8 insertions(+), 2 deletions(-)
14
15diff --git a/numpy/core/include/numpy/npy_cpu.h b/numpy/core/include/numpy/npy_cpu.h
16index 4dbf9d84e..bc41a7eda 100644
17--- a/numpy/core/include/numpy/npy_cpu.h
18+++ b/numpy/core/include/numpy/npy_cpu.h
19@@ -18,6 +18,7 @@
20 * NPY_CPU_ARCEL
21 * NPY_CPU_ARCEB
22 * NPY_CPU_RISCV64
23+ * NPY_CPU_RISCV32
24 * NPY_CPU_WASM
25 */
26 #ifndef _NPY_CPUARCH_H_
27@@ -100,8 +101,12 @@
28 #define NPY_CPU_ARCEL
29 #elif defined(__arc__) && defined(__BIG_ENDIAN__)
30 #define NPY_CPU_ARCEB
31-#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 64
32- #define NPY_CPU_RISCV64
33+#elif defined(__riscv)
34+ #if __riscv_xlen == 64
35+ #define NPY_CPU_RISCV64
36+ #elif __riscv_xlen == 32
37+ #define NPY_CPU_RISCV32
38+ #endif
39 #elif defined(__EMSCRIPTEN__)
40 /* __EMSCRIPTEN__ is defined by emscripten: an LLVM-to-Web compiler */
41 #define NPY_CPU_WASM
42diff --git a/numpy/core/include/numpy/npy_endian.h b/numpy/core/include/numpy/npy_endian.h
43index aa367a002..d59484573 100644
44--- a/numpy/core/include/numpy/npy_endian.h
45+++ b/numpy/core/include/numpy/npy_endian.h
46@@ -49,6 +49,7 @@
47 || defined(NPY_CPU_PPC64LE) \
48 || defined(NPY_CPU_ARCEL) \
49 || defined(NPY_CPU_RISCV64) \
50+ || defined(NPY_CPU_RISCV32) \
51 || defined(NPY_CPU_WASM)
52 #define NPY_BYTE_ORDER NPY_LITTLE_ENDIAN
53 #elif defined(NPY_CPU_PPC) \
54--
552.29.2
56