gcc-4.6.0: Bring in patches from FSF 4.6 branch

This brings in new patches from 4.6 release branch
updates the comment section of existing branch to not
contain patch numbers.

Tested build on qemu for arm ppc mips x86 and x86_64

(From OE-Core rev: 3968f33b6542cf20cf63cf49bfbc033bd2486295)

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>

1 files changed, 40 insertions, 0 deletions

diff --git a/meta/recipes-devtools/gcc/gcc-4.6.0/gcc-4_6-branch-backports/0269-PR-target-48986.patch b/meta/recipes-devtools/gcc/gcc-4.6.0/gcc-4_6-branch-backports/0269-PR-target-48986.patch
new file mode 100644
index 0000000000..8e20e6eea8
--- /dev/null
+++ b/meta/recipes-devtools/gcc/gcc-4.6.0/gcc-4_6-branch-backports/0269-PR-target-48986.patch
@@ -0,0 +1,40 @@
+From 56cf6a6c3274fd4af2ccfc2ca019904d873d30fe Mon Sep 17 00:00:00 2001
+From: jakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4>
+Date: Tue, 17 May 2011 07:42:30 +0000
+Subject: [PATCH]        PR target/48986
+        * config/i386/sync.md (sync_old_add<mode>): Relax operand 2
+        predicate to allow CONST_INT.
+
+git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_6-branch@173817 138bc75d-0d04-0410-961f-82ee72b054a4
+
+index 22f3648..3fdfee2 100644
+--- a/gcc/config/i386/sync.md
++++ b/gcc/config/i386/sync.md
+@@ -1,5 +1,5 @@
+ ;; GCC machine description for i386 synchronization instructions.
+-;; Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010
++;; Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010, 2011
+ ;; Free Software Foundation, Inc.
+ ;;
+ ;; This file is part of GCC.
+@@ -164,13 +164,16 @@
+   "!TARGET_64BIT && TARGET_CMPXCHG8B && flag_pic"
+   "xchg{l}\t%%ebx, %3\;lock{%;} cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3")
+ 
++;; For operand 2 nonmemory_operand predicate is used instead of
++;; register_operand to allow combiner to better optimize atomic
++;; additions of constants.
+ (define_insn "sync_old_add<mode>"
+   [(set (match_operand:SWI 0 "register_operand" "=<r>")
+        (unspec_volatile:SWI
+          [(match_operand:SWI 1 "memory_operand" "+m")] UNSPECV_XCHG))
+    (set (match_dup 1)
+        (plus:SWI (match_dup 1)
+-                 (match_operand:SWI 2 "register_operand" "0")))
++                 (match_operand:SWI 2 "nonmemory_operand" "0")))
+    (clobber (reg:CC FLAGS_REG))]
+   "TARGET_XADD"
+   "lock{%;} xadd{<imodesuffix>}\t{%0, %1|%1, %0}")
+-- 
+1.7.0.4
+