diff options
author | Armin Kuster <akuster808@gmail.com> | 2017-11-26 16:27:45 -0800 |
---|---|---|
committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2017-12-11 22:02:59 +0000 |
commit | 64ccf9b291cd7cf3cf8531b41eb5af373965ced1 (patch) | |
tree | 0b811eb1efe61f0c4f8faeda6460da9da9fc7a0c /meta/recipes-devtools/binutils | |
parent | 60bd16df85b462ef3aeadcd63841833310306208 (diff) | |
download | poky-64ccf9b291cd7cf3cf8531b41eb5af373965ced1.tar.gz |
binutls: Security fix for CVE-2017-9751
Affects: <= 2.28
(From OE-Core rev: 6e6544eb51d8041fd939581dc2a5178db948ec4a)
Signed-off-by: Armin Kuster <akuster808@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-devtools/binutils')
-rw-r--r-- | meta/recipes-devtools/binutils/binutils-2.28.inc | 1 | ||||
-rw-r--r-- | meta/recipes-devtools/binutils/binutils/CVE-2017-9751.patch | 3748 |
2 files changed, 3749 insertions, 0 deletions
diff --git a/meta/recipes-devtools/binutils/binutils-2.28.inc b/meta/recipes-devtools/binutils/binutils-2.28.inc index c63a2e5bab..99fc1b1ffa 100644 --- a/meta/recipes-devtools/binutils/binutils-2.28.inc +++ b/meta/recipes-devtools/binutils/binutils-2.28.inc | |||
@@ -62,6 +62,7 @@ SRC_URI = "\ | |||
62 | file://CVE-2017-9748.patch \ | 62 | file://CVE-2017-9748.patch \ |
63 | file://CVE-2017-9749.patch \ | 63 | file://CVE-2017-9749.patch \ |
64 | file://CVE-2017-9750.patch \ | 64 | file://CVE-2017-9750.patch \ |
65 | file://CVE-2017-9751.patch \ | ||
65 | " | 66 | " |
66 | S = "${WORKDIR}/git" | 67 | S = "${WORKDIR}/git" |
67 | 68 | ||
diff --git a/meta/recipes-devtools/binutils/binutils/CVE-2017-9751.patch b/meta/recipes-devtools/binutils/binutils/CVE-2017-9751.patch new file mode 100644 index 0000000000..d7c18cf85a --- /dev/null +++ b/meta/recipes-devtools/binutils/binutils/CVE-2017-9751.patch | |||
@@ -0,0 +1,3748 @@ | |||
1 | From 63323b5b23bd83fa7b04ea00dff593c933e9b0e3 Mon Sep 17 00:00:00 2001 | ||
2 | From: Nick Clifton <nickc@redhat.com> | ||
3 | Date: Thu, 15 Jun 2017 12:37:01 +0100 | ||
4 | Subject: [PATCH] Fix address violation when disassembling a corrupt RL78 | ||
5 | binary. | ||
6 | |||
7 | PR binutils/21588 | ||
8 | * rl78-decode.opc (OP_BUF_LEN): Define. | ||
9 | (GETBYTE): Check for the index exceeding OP_BUF_LEN. | ||
10 | (rl78_decode_opcode): Use OP_BUF_LEN as the length of the op_buf | ||
11 | array. | ||
12 | * rl78-decode.c: Regenerate. | ||
13 | |||
14 | Upstream-Status: Backport | ||
15 | CVE: CVE-2017-9751 | ||
16 | Signed-off-by: Armin Kuster <akuster@mvista.com> | ||
17 | |||
18 | --- | ||
19 | opcodes/ChangeLog | 9 + | ||
20 | opcodes/rl78-decode.c | 820 ++++++++++++++++++++++++------------------------ | ||
21 | opcodes/rl78-decode.opc | 6 +- | ||
22 | 3 files changed, 424 insertions(+), 411 deletions(-) | ||
23 | |||
24 | diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog | ||
25 | index 34b1844..c77f00a 100644 | ||
26 | --- a/opcodes/ChangeLog | ||
27 | +++ b/opcodes/ChangeLog | ||
28 | @@ -1,5 +1,14 @@ | ||
29 | 2017-06-15 Nick Clifton <nickc@redhat.com> | ||
30 | |||
31 | + PR binutils/21588 | ||
32 | + * rl78-decode.opc (OP_BUF_LEN): Define. | ||
33 | + (GETBYTE): Check for the index exceeding OP_BUF_LEN. | ||
34 | + (rl78_decode_opcode): Use OP_BUF_LEN as the length of the op_buf | ||
35 | + array. | ||
36 | + * rl78-decode.c: Regenerate. | ||
37 | + | ||
38 | +2017-06-15 Nick Clifton <nickc@redhat.com> | ||
39 | + | ||
40 | PR binutils/21586 | ||
41 | * bfin-dis.c (gregs): Clip index to prevent overflow. | ||
42 | (regs): Likewise. | ||
43 | diff --git a/opcodes/rl78-decode.c b/opcodes/rl78-decode.c | ||
44 | index d0566ea..b2d4bd6 100644 | ||
45 | --- a/opcodes/rl78-decode.c | ||
46 | +++ b/opcodes/rl78-decode.c | ||
47 | @@ -51,7 +51,9 @@ typedef struct | ||
48 | #define W() rl78->size = RL78_Word | ||
49 | |||
50 | #define AU ATTRIBUTE_UNUSED | ||
51 | -#define GETBYTE() (ld->op [ld->rl78->n_bytes++] = ld->getbyte (ld->ptr)) | ||
52 | + | ||
53 | +#define OP_BUF_LEN 20 | ||
54 | +#define GETBYTE() (ld->rl78->n_bytes < (OP_BUF_LEN - 1) ? ld->op [ld->rl78->n_bytes++] = ld->getbyte (ld->ptr): 0) | ||
55 | #define B ((unsigned long) GETBYTE()) | ||
56 | |||
57 | #define SYNTAX(x) rl78->syntax = x | ||
58 | @@ -169,7 +171,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
59 | RL78_Dis_Isa isa) | ||
60 | { | ||
61 | LocalData lds, * ld = &lds; | ||
62 | - unsigned char op_buf[20] = {0}; | ||
63 | + unsigned char op_buf[OP_BUF_LEN] = {0}; | ||
64 | unsigned char *op = op_buf; | ||
65 | int op0, op1; | ||
66 | |||
67 | @@ -201,7 +203,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
68 | op[0]); | ||
69 | } | ||
70 | SYNTAX("nop"); | ||
71 | -#line 911 "rl78-decode.opc" | ||
72 | +#line 913 "rl78-decode.opc" | ||
73 | ID(nop); | ||
74 | |||
75 | /*----------------------------------------------------------------------*/ | ||
76 | @@ -214,7 +216,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
77 | case 0x07: | ||
78 | { | ||
79 | /** 0000 0rw1 addw %0, %1 */ | ||
80 | -#line 274 "rl78-decode.opc" | ||
81 | +#line 276 "rl78-decode.opc" | ||
82 | int rw AU = (op[0] >> 1) & 0x03; | ||
83 | if (trace) | ||
84 | { | ||
85 | @@ -224,7 +226,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
86 | printf (" rw = 0x%x\n", rw); | ||
87 | } | ||
88 | SYNTAX("addw %0, %1"); | ||
89 | -#line 274 "rl78-decode.opc" | ||
90 | +#line 276 "rl78-decode.opc" | ||
91 | ID(add); W(); DR(AX); SRW(rw); Fzac; | ||
92 | |||
93 | } | ||
94 | @@ -239,7 +241,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
95 | op[0]); | ||
96 | } | ||
97 | SYNTAX("addw %0, %e!1"); | ||
98 | -#line 265 "rl78-decode.opc" | ||
99 | +#line 267 "rl78-decode.opc" | ||
100 | ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac; | ||
101 | |||
102 | } | ||
103 | @@ -254,7 +256,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
104 | op[0]); | ||
105 | } | ||
106 | SYNTAX("addw %0, #%1"); | ||
107 | -#line 271 "rl78-decode.opc" | ||
108 | +#line 273 "rl78-decode.opc" | ||
109 | ID(add); W(); DR(AX); SC(IMMU(2)); Fzac; | ||
110 | |||
111 | } | ||
112 | @@ -269,7 +271,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
113 | op[0]); | ||
114 | } | ||
115 | SYNTAX("addw %0, %1"); | ||
116 | -#line 277 "rl78-decode.opc" | ||
117 | +#line 279 "rl78-decode.opc" | ||
118 | ID(add); W(); DR(AX); SM(None, SADDR); Fzac; | ||
119 | |||
120 | } | ||
121 | @@ -284,7 +286,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
122 | op[0]); | ||
123 | } | ||
124 | SYNTAX("xch a, x"); | ||
125 | -#line 1234 "rl78-decode.opc" | ||
126 | +#line 1236 "rl78-decode.opc" | ||
127 | ID(xch); DR(A); SR(X); | ||
128 | |||
129 | /*----------------------------------------------------------------------*/ | ||
130 | @@ -301,7 +303,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
131 | op[0]); | ||
132 | } | ||
133 | SYNTAX("mov %0, %e1"); | ||
134 | -#line 678 "rl78-decode.opc" | ||
135 | +#line 680 "rl78-decode.opc" | ||
136 | ID(mov); DR(A); SM(B, IMMU(2)); | ||
137 | |||
138 | } | ||
139 | @@ -316,7 +318,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
140 | op[0]); | ||
141 | } | ||
142 | SYNTAX("add %0, #%1"); | ||
143 | -#line 228 "rl78-decode.opc" | ||
144 | +#line 230 "rl78-decode.opc" | ||
145 | ID(add); DM(None, SADDR); SC(IMMU(1)); Fzac; | ||
146 | |||
147 | /*----------------------------------------------------------------------*/ | ||
148 | @@ -333,7 +335,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
149 | op[0]); | ||
150 | } | ||
151 | SYNTAX("add %0, %1"); | ||
152 | -#line 222 "rl78-decode.opc" | ||
153 | +#line 224 "rl78-decode.opc" | ||
154 | ID(add); DR(A); SM(None, SADDR); Fzac; | ||
155 | |||
156 | } | ||
157 | @@ -348,7 +350,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
158 | op[0]); | ||
159 | } | ||
160 | SYNTAX("add %0, #%1"); | ||
161 | -#line 216 "rl78-decode.opc" | ||
162 | +#line 218 "rl78-decode.opc" | ||
163 | ID(add); DR(A); SC(IMMU(1)); Fzac; | ||
164 | |||
165 | } | ||
166 | @@ -363,7 +365,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
167 | op[0]); | ||
168 | } | ||
169 | SYNTAX("add %0, %e1"); | ||
170 | -#line 204 "rl78-decode.opc" | ||
171 | +#line 206 "rl78-decode.opc" | ||
172 | ID(add); DR(A); SM(HL, 0); Fzac; | ||
173 | |||
174 | } | ||
175 | @@ -378,7 +380,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
176 | op[0]); | ||
177 | } | ||
178 | SYNTAX("add %0, %ea1"); | ||
179 | -#line 210 "rl78-decode.opc" | ||
180 | +#line 212 "rl78-decode.opc" | ||
181 | ID(add); DR(A); SM(HL, IMMU(1)); Fzac; | ||
182 | |||
183 | } | ||
184 | @@ -393,7 +395,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
185 | op[0]); | ||
186 | } | ||
187 | SYNTAX("add %0, %e!1"); | ||
188 | -#line 201 "rl78-decode.opc" | ||
189 | +#line 203 "rl78-decode.opc" | ||
190 | ID(add); DR(A); SM(None, IMMU(2)); Fzac; | ||
191 | |||
192 | } | ||
193 | @@ -408,7 +410,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
194 | op[0]); | ||
195 | } | ||
196 | SYNTAX("addw %0, #%1"); | ||
197 | -#line 280 "rl78-decode.opc" | ||
198 | +#line 282 "rl78-decode.opc" | ||
199 | ID(add); W(); DR(SP); SC(IMMU(1)); Fzac; | ||
200 | |||
201 | /*----------------------------------------------------------------------*/ | ||
202 | @@ -425,7 +427,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
203 | op[0]); | ||
204 | } | ||
205 | SYNTAX("es:"); | ||
206 | -#line 193 "rl78-decode.opc" | ||
207 | +#line 195 "rl78-decode.opc" | ||
208 | DE(); SE(); | ||
209 | op ++; | ||
210 | pc ++; | ||
211 | @@ -440,7 +442,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
212 | case 0x16: | ||
213 | { | ||
214 | /** 0001 0ra0 movw %0, %1 */ | ||
215 | -#line 859 "rl78-decode.opc" | ||
216 | +#line 861 "rl78-decode.opc" | ||
217 | int ra AU = (op[0] >> 1) & 0x03; | ||
218 | if (trace) | ||
219 | { | ||
220 | @@ -450,7 +452,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
221 | printf (" ra = 0x%x\n", ra); | ||
222 | } | ||
223 | SYNTAX("movw %0, %1"); | ||
224 | -#line 859 "rl78-decode.opc" | ||
225 | +#line 861 "rl78-decode.opc" | ||
226 | ID(mov); W(); DRW(ra); SR(AX); | ||
227 | |||
228 | } | ||
229 | @@ -460,7 +462,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
230 | case 0x17: | ||
231 | { | ||
232 | /** 0001 0ra1 movw %0, %1 */ | ||
233 | -#line 856 "rl78-decode.opc" | ||
234 | +#line 858 "rl78-decode.opc" | ||
235 | int ra AU = (op[0] >> 1) & 0x03; | ||
236 | if (trace) | ||
237 | { | ||
238 | @@ -470,7 +472,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
239 | printf (" ra = 0x%x\n", ra); | ||
240 | } | ||
241 | SYNTAX("movw %0, %1"); | ||
242 | -#line 856 "rl78-decode.opc" | ||
243 | +#line 858 "rl78-decode.opc" | ||
244 | ID(mov); W(); DR(AX); SRW(ra); | ||
245 | |||
246 | } | ||
247 | @@ -485,7 +487,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
248 | op[0]); | ||
249 | } | ||
250 | SYNTAX("mov %e0, %1"); | ||
251 | -#line 729 "rl78-decode.opc" | ||
252 | +#line 731 "rl78-decode.opc" | ||
253 | ID(mov); DM(B, IMMU(2)); SR(A); | ||
254 | |||
255 | } | ||
256 | @@ -500,7 +502,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
257 | op[0]); | ||
258 | } | ||
259 | SYNTAX("mov %e0, #%1"); | ||
260 | -#line 726 "rl78-decode.opc" | ||
261 | +#line 728 "rl78-decode.opc" | ||
262 | ID(mov); DM(B, IMMU(2)); SC(IMMU(1)); | ||
263 | |||
264 | } | ||
265 | @@ -515,7 +517,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
266 | op[0]); | ||
267 | } | ||
268 | SYNTAX("addc %0, #%1"); | ||
269 | -#line 260 "rl78-decode.opc" | ||
270 | +#line 262 "rl78-decode.opc" | ||
271 | ID(addc); DM(None, SADDR); SC(IMMU(1)); Fzac; | ||
272 | |||
273 | /*----------------------------------------------------------------------*/ | ||
274 | @@ -532,7 +534,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
275 | op[0]); | ||
276 | } | ||
277 | SYNTAX("addc %0, %1"); | ||
278 | -#line 257 "rl78-decode.opc" | ||
279 | +#line 259 "rl78-decode.opc" | ||
280 | ID(addc); DR(A); SM(None, SADDR); Fzac; | ||
281 | |||
282 | } | ||
283 | @@ -547,7 +549,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
284 | op[0]); | ||
285 | } | ||
286 | SYNTAX("addc %0, #%1"); | ||
287 | -#line 248 "rl78-decode.opc" | ||
288 | +#line 250 "rl78-decode.opc" | ||
289 | ID(addc); DR(A); SC(IMMU(1)); Fzac; | ||
290 | |||
291 | } | ||
292 | @@ -562,7 +564,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
293 | op[0]); | ||
294 | } | ||
295 | SYNTAX("addc %0, %e1"); | ||
296 | -#line 236 "rl78-decode.opc" | ||
297 | +#line 238 "rl78-decode.opc" | ||
298 | ID(addc); DR(A); SM(HL, 0); Fzac; | ||
299 | |||
300 | } | ||
301 | @@ -577,7 +579,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
302 | op[0]); | ||
303 | } | ||
304 | SYNTAX("addc %0, %ea1"); | ||
305 | -#line 245 "rl78-decode.opc" | ||
306 | +#line 247 "rl78-decode.opc" | ||
307 | ID(addc); DR(A); SM(HL, IMMU(1)); Fzac; | ||
308 | |||
309 | } | ||
310 | @@ -592,7 +594,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
311 | op[0]); | ||
312 | } | ||
313 | SYNTAX("addc %0, %e!1"); | ||
314 | -#line 233 "rl78-decode.opc" | ||
315 | +#line 235 "rl78-decode.opc" | ||
316 | ID(addc); DR(A); SM(None, IMMU(2)); Fzac; | ||
317 | |||
318 | } | ||
319 | @@ -607,7 +609,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
320 | op[0]); | ||
321 | } | ||
322 | SYNTAX("subw %0, #%1"); | ||
323 | -#line 1198 "rl78-decode.opc" | ||
324 | +#line 1200 "rl78-decode.opc" | ||
325 | ID(sub); W(); DR(SP); SC(IMMU(1)); Fzac; | ||
326 | |||
327 | /*----------------------------------------------------------------------*/ | ||
328 | @@ -620,7 +622,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
329 | case 0x27: | ||
330 | { | ||
331 | /** 0010 0rw1 subw %0, %1 */ | ||
332 | -#line 1192 "rl78-decode.opc" | ||
333 | +#line 1194 "rl78-decode.opc" | ||
334 | int rw AU = (op[0] >> 1) & 0x03; | ||
335 | if (trace) | ||
336 | { | ||
337 | @@ -630,7 +632,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
338 | printf (" rw = 0x%x\n", rw); | ||
339 | } | ||
340 | SYNTAX("subw %0, %1"); | ||
341 | -#line 1192 "rl78-decode.opc" | ||
342 | +#line 1194 "rl78-decode.opc" | ||
343 | ID(sub); W(); DR(AX); SRW(rw); Fzac; | ||
344 | |||
345 | } | ||
346 | @@ -645,7 +647,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
347 | op[0]); | ||
348 | } | ||
349 | SYNTAX("subw %0, %e!1"); | ||
350 | -#line 1183 "rl78-decode.opc" | ||
351 | +#line 1185 "rl78-decode.opc" | ||
352 | ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac; | ||
353 | |||
354 | } | ||
355 | @@ -660,7 +662,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
356 | op[0]); | ||
357 | } | ||
358 | SYNTAX("subw %0, #%1"); | ||
359 | -#line 1189 "rl78-decode.opc" | ||
360 | +#line 1191 "rl78-decode.opc" | ||
361 | ID(sub); W(); DR(AX); SC(IMMU(2)); Fzac; | ||
362 | |||
363 | } | ||
364 | @@ -675,7 +677,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
365 | op[0]); | ||
366 | } | ||
367 | SYNTAX("subw %0, %1"); | ||
368 | -#line 1195 "rl78-decode.opc" | ||
369 | +#line 1197 "rl78-decode.opc" | ||
370 | ID(sub); W(); DR(AX); SM(None, SADDR); Fzac; | ||
371 | |||
372 | } | ||
373 | @@ -690,7 +692,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
374 | op[0]); | ||
375 | } | ||
376 | SYNTAX("mov %e0, %1"); | ||
377 | -#line 741 "rl78-decode.opc" | ||
378 | +#line 743 "rl78-decode.opc" | ||
379 | ID(mov); DM(C, IMMU(2)); SR(A); | ||
380 | |||
381 | } | ||
382 | @@ -705,7 +707,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
383 | op[0]); | ||
384 | } | ||
385 | SYNTAX("mov %0, %e1"); | ||
386 | -#line 684 "rl78-decode.opc" | ||
387 | +#line 686 "rl78-decode.opc" | ||
388 | ID(mov); DR(A); SM(C, IMMU(2)); | ||
389 | |||
390 | } | ||
391 | @@ -720,7 +722,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
392 | op[0]); | ||
393 | } | ||
394 | SYNTAX("sub %0, #%1"); | ||
395 | -#line 1146 "rl78-decode.opc" | ||
396 | +#line 1148 "rl78-decode.opc" | ||
397 | ID(sub); DM(None, SADDR); SC(IMMU(1)); Fzac; | ||
398 | |||
399 | /*----------------------------------------------------------------------*/ | ||
400 | @@ -737,7 +739,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
401 | op[0]); | ||
402 | } | ||
403 | SYNTAX("sub %0, %1"); | ||
404 | -#line 1140 "rl78-decode.opc" | ||
405 | +#line 1142 "rl78-decode.opc" | ||
406 | ID(sub); DR(A); SM(None, SADDR); Fzac; | ||
407 | |||
408 | } | ||
409 | @@ -752,7 +754,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
410 | op[0]); | ||
411 | } | ||
412 | SYNTAX("sub %0, #%1"); | ||
413 | -#line 1134 "rl78-decode.opc" | ||
414 | +#line 1136 "rl78-decode.opc" | ||
415 | ID(sub); DR(A); SC(IMMU(1)); Fzac; | ||
416 | |||
417 | } | ||
418 | @@ -767,7 +769,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
419 | op[0]); | ||
420 | } | ||
421 | SYNTAX("sub %0, %e1"); | ||
422 | -#line 1122 "rl78-decode.opc" | ||
423 | +#line 1124 "rl78-decode.opc" | ||
424 | ID(sub); DR(A); SM(HL, 0); Fzac; | ||
425 | |||
426 | } | ||
427 | @@ -782,7 +784,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
428 | op[0]); | ||
429 | } | ||
430 | SYNTAX("sub %0, %ea1"); | ||
431 | -#line 1128 "rl78-decode.opc" | ||
432 | +#line 1130 "rl78-decode.opc" | ||
433 | ID(sub); DR(A); SM(HL, IMMU(1)); Fzac; | ||
434 | |||
435 | } | ||
436 | @@ -797,7 +799,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
437 | op[0]); | ||
438 | } | ||
439 | SYNTAX("sub %0, %e!1"); | ||
440 | -#line 1119 "rl78-decode.opc" | ||
441 | +#line 1121 "rl78-decode.opc" | ||
442 | ID(sub); DR(A); SM(None, IMMU(2)); Fzac; | ||
443 | |||
444 | } | ||
445 | @@ -808,7 +810,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
446 | case 0x36: | ||
447 | { | ||
448 | /** 0011 0rg0 movw %0, #%1 */ | ||
449 | -#line 853 "rl78-decode.opc" | ||
450 | +#line 855 "rl78-decode.opc" | ||
451 | int rg AU = (op[0] >> 1) & 0x03; | ||
452 | if (trace) | ||
453 | { | ||
454 | @@ -818,7 +820,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
455 | printf (" rg = 0x%x\n", rg); | ||
456 | } | ||
457 | SYNTAX("movw %0, #%1"); | ||
458 | -#line 853 "rl78-decode.opc" | ||
459 | +#line 855 "rl78-decode.opc" | ||
460 | ID(mov); W(); DRW(rg); SC(IMMU(2)); | ||
461 | |||
462 | } | ||
463 | @@ -830,7 +832,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
464 | case 0x00: | ||
465 | { | ||
466 | /** 0011 0001 0bit 0000 btclr %s1, $%a0 */ | ||
467 | -#line 416 "rl78-decode.opc" | ||
468 | +#line 418 "rl78-decode.opc" | ||
469 | int bit AU = (op[1] >> 4) & 0x07; | ||
470 | if (trace) | ||
471 | { | ||
472 | @@ -840,7 +842,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
473 | printf (" bit = 0x%x\n", bit); | ||
474 | } | ||
475 | SYNTAX("btclr %s1, $%a0"); | ||
476 | -#line 416 "rl78-decode.opc" | ||
477 | +#line 418 "rl78-decode.opc" | ||
478 | ID(branch_cond_clear); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T); | ||
479 | |||
480 | /*----------------------------------------------------------------------*/ | ||
481 | @@ -850,7 +852,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
482 | case 0x01: | ||
483 | { | ||
484 | /** 0011 0001 0bit 0001 btclr %1, $%a0 */ | ||
485 | -#line 410 "rl78-decode.opc" | ||
486 | +#line 412 "rl78-decode.opc" | ||
487 | int bit AU = (op[1] >> 4) & 0x07; | ||
488 | if (trace) | ||
489 | { | ||
490 | @@ -860,7 +862,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
491 | printf (" bit = 0x%x\n", bit); | ||
492 | } | ||
493 | SYNTAX("btclr %1, $%a0"); | ||
494 | -#line 410 "rl78-decode.opc" | ||
495 | +#line 412 "rl78-decode.opc" | ||
496 | ID(branch_cond_clear); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T); | ||
497 | |||
498 | } | ||
499 | @@ -868,7 +870,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
500 | case 0x02: | ||
501 | { | ||
502 | /** 0011 0001 0bit 0010 bt %s1, $%a0 */ | ||
503 | -#line 402 "rl78-decode.opc" | ||
504 | +#line 404 "rl78-decode.opc" | ||
505 | int bit AU = (op[1] >> 4) & 0x07; | ||
506 | if (trace) | ||
507 | { | ||
508 | @@ -878,7 +880,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
509 | printf (" bit = 0x%x\n", bit); | ||
510 | } | ||
511 | SYNTAX("bt %s1, $%a0"); | ||
512 | -#line 402 "rl78-decode.opc" | ||
513 | +#line 404 "rl78-decode.opc" | ||
514 | ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T); | ||
515 | |||
516 | /*----------------------------------------------------------------------*/ | ||
517 | @@ -888,7 +890,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
518 | case 0x03: | ||
519 | { | ||
520 | /** 0011 0001 0bit 0011 bt %1, $%a0 */ | ||
521 | -#line 396 "rl78-decode.opc" | ||
522 | +#line 398 "rl78-decode.opc" | ||
523 | int bit AU = (op[1] >> 4) & 0x07; | ||
524 | if (trace) | ||
525 | { | ||
526 | @@ -898,7 +900,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
527 | printf (" bit = 0x%x\n", bit); | ||
528 | } | ||
529 | SYNTAX("bt %1, $%a0"); | ||
530 | -#line 396 "rl78-decode.opc" | ||
531 | +#line 398 "rl78-decode.opc" | ||
532 | ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T); | ||
533 | |||
534 | } | ||
535 | @@ -906,7 +908,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
536 | case 0x04: | ||
537 | { | ||
538 | /** 0011 0001 0bit 0100 bf %s1, $%a0 */ | ||
539 | -#line 363 "rl78-decode.opc" | ||
540 | +#line 365 "rl78-decode.opc" | ||
541 | int bit AU = (op[1] >> 4) & 0x07; | ||
542 | if (trace) | ||
543 | { | ||
544 | @@ -916,7 +918,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
545 | printf (" bit = 0x%x\n", bit); | ||
546 | } | ||
547 | SYNTAX("bf %s1, $%a0"); | ||
548 | -#line 363 "rl78-decode.opc" | ||
549 | +#line 365 "rl78-decode.opc" | ||
550 | ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(F); | ||
551 | |||
552 | /*----------------------------------------------------------------------*/ | ||
553 | @@ -926,7 +928,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
554 | case 0x05: | ||
555 | { | ||
556 | /** 0011 0001 0bit 0101 bf %1, $%a0 */ | ||
557 | -#line 357 "rl78-decode.opc" | ||
558 | +#line 359 "rl78-decode.opc" | ||
559 | int bit AU = (op[1] >> 4) & 0x07; | ||
560 | if (trace) | ||
561 | { | ||
562 | @@ -936,7 +938,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
563 | printf (" bit = 0x%x\n", bit); | ||
564 | } | ||
565 | SYNTAX("bf %1, $%a0"); | ||
566 | -#line 357 "rl78-decode.opc" | ||
567 | +#line 359 "rl78-decode.opc" | ||
568 | ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(F); | ||
569 | |||
570 | } | ||
571 | @@ -944,7 +946,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
572 | case 0x07: | ||
573 | { | ||
574 | /** 0011 0001 0cnt 0111 shl %0, %1 */ | ||
575 | -#line 1075 "rl78-decode.opc" | ||
576 | +#line 1077 "rl78-decode.opc" | ||
577 | int cnt AU = (op[1] >> 4) & 0x07; | ||
578 | if (trace) | ||
579 | { | ||
580 | @@ -954,7 +956,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
581 | printf (" cnt = 0x%x\n", cnt); | ||
582 | } | ||
583 | SYNTAX("shl %0, %1"); | ||
584 | -#line 1075 "rl78-decode.opc" | ||
585 | +#line 1077 "rl78-decode.opc" | ||
586 | ID(shl); DR(C); SC(cnt); | ||
587 | |||
588 | } | ||
589 | @@ -962,7 +964,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
590 | case 0x08: | ||
591 | { | ||
592 | /** 0011 0001 0cnt 1000 shl %0, %1 */ | ||
593 | -#line 1072 "rl78-decode.opc" | ||
594 | +#line 1074 "rl78-decode.opc" | ||
595 | int cnt AU = (op[1] >> 4) & 0x07; | ||
596 | if (trace) | ||
597 | { | ||
598 | @@ -972,7 +974,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
599 | printf (" cnt = 0x%x\n", cnt); | ||
600 | } | ||
601 | SYNTAX("shl %0, %1"); | ||
602 | -#line 1072 "rl78-decode.opc" | ||
603 | +#line 1074 "rl78-decode.opc" | ||
604 | ID(shl); DR(B); SC(cnt); | ||
605 | |||
606 | } | ||
607 | @@ -980,7 +982,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
608 | case 0x09: | ||
609 | { | ||
610 | /** 0011 0001 0cnt 1001 shl %0, %1 */ | ||
611 | -#line 1069 "rl78-decode.opc" | ||
612 | +#line 1071 "rl78-decode.opc" | ||
613 | int cnt AU = (op[1] >> 4) & 0x07; | ||
614 | if (trace) | ||
615 | { | ||
616 | @@ -990,7 +992,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
617 | printf (" cnt = 0x%x\n", cnt); | ||
618 | } | ||
619 | SYNTAX("shl %0, %1"); | ||
620 | -#line 1069 "rl78-decode.opc" | ||
621 | +#line 1071 "rl78-decode.opc" | ||
622 | ID(shl); DR(A); SC(cnt); | ||
623 | |||
624 | } | ||
625 | @@ -998,7 +1000,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
626 | case 0x0a: | ||
627 | { | ||
628 | /** 0011 0001 0cnt 1010 shr %0, %1 */ | ||
629 | -#line 1086 "rl78-decode.opc" | ||
630 | +#line 1088 "rl78-decode.opc" | ||
631 | int cnt AU = (op[1] >> 4) & 0x07; | ||
632 | if (trace) | ||
633 | { | ||
634 | @@ -1008,7 +1010,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
635 | printf (" cnt = 0x%x\n", cnt); | ||
636 | } | ||
637 | SYNTAX("shr %0, %1"); | ||
638 | -#line 1086 "rl78-decode.opc" | ||
639 | +#line 1088 "rl78-decode.opc" | ||
640 | ID(shr); DR(A); SC(cnt); | ||
641 | |||
642 | } | ||
643 | @@ -1016,7 +1018,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
644 | case 0x0b: | ||
645 | { | ||
646 | /** 0011 0001 0cnt 1011 sar %0, %1 */ | ||
647 | -#line 1033 "rl78-decode.opc" | ||
648 | +#line 1035 "rl78-decode.opc" | ||
649 | int cnt AU = (op[1] >> 4) & 0x07; | ||
650 | if (trace) | ||
651 | { | ||
652 | @@ -1026,7 +1028,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
653 | printf (" cnt = 0x%x\n", cnt); | ||
654 | } | ||
655 | SYNTAX("sar %0, %1"); | ||
656 | -#line 1033 "rl78-decode.opc" | ||
657 | +#line 1035 "rl78-decode.opc" | ||
658 | ID(sar); DR(A); SC(cnt); | ||
659 | |||
660 | } | ||
661 | @@ -1035,7 +1037,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
662 | case 0x8c: | ||
663 | { | ||
664 | /** 0011 0001 wcnt 1100 shlw %0, %1 */ | ||
665 | -#line 1081 "rl78-decode.opc" | ||
666 | +#line 1083 "rl78-decode.opc" | ||
667 | int wcnt AU = (op[1] >> 4) & 0x0f; | ||
668 | if (trace) | ||
669 | { | ||
670 | @@ -1045,7 +1047,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
671 | printf (" wcnt = 0x%x\n", wcnt); | ||
672 | } | ||
673 | SYNTAX("shlw %0, %1"); | ||
674 | -#line 1081 "rl78-decode.opc" | ||
675 | +#line 1083 "rl78-decode.opc" | ||
676 | ID(shl); W(); DR(BC); SC(wcnt); | ||
677 | |||
678 | /*----------------------------------------------------------------------*/ | ||
679 | @@ -1056,7 +1058,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
680 | case 0x8d: | ||
681 | { | ||
682 | /** 0011 0001 wcnt 1101 shlw %0, %1 */ | ||
683 | -#line 1078 "rl78-decode.opc" | ||
684 | +#line 1080 "rl78-decode.opc" | ||
685 | int wcnt AU = (op[1] >> 4) & 0x0f; | ||
686 | if (trace) | ||
687 | { | ||
688 | @@ -1066,7 +1068,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
689 | printf (" wcnt = 0x%x\n", wcnt); | ||
690 | } | ||
691 | SYNTAX("shlw %0, %1"); | ||
692 | -#line 1078 "rl78-decode.opc" | ||
693 | +#line 1080 "rl78-decode.opc" | ||
694 | ID(shl); W(); DR(AX); SC(wcnt); | ||
695 | |||
696 | } | ||
697 | @@ -1075,7 +1077,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
698 | case 0x8e: | ||
699 | { | ||
700 | /** 0011 0001 wcnt 1110 shrw %0, %1 */ | ||
701 | -#line 1089 "rl78-decode.opc" | ||
702 | +#line 1091 "rl78-decode.opc" | ||
703 | int wcnt AU = (op[1] >> 4) & 0x0f; | ||
704 | if (trace) | ||
705 | { | ||
706 | @@ -1085,7 +1087,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
707 | printf (" wcnt = 0x%x\n", wcnt); | ||
708 | } | ||
709 | SYNTAX("shrw %0, %1"); | ||
710 | -#line 1089 "rl78-decode.opc" | ||
711 | +#line 1091 "rl78-decode.opc" | ||
712 | ID(shr); W(); DR(AX); SC(wcnt); | ||
713 | |||
714 | /*----------------------------------------------------------------------*/ | ||
715 | @@ -1096,7 +1098,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
716 | case 0x8f: | ||
717 | { | ||
718 | /** 0011 0001 wcnt 1111 sarw %0, %1 */ | ||
719 | -#line 1036 "rl78-decode.opc" | ||
720 | +#line 1038 "rl78-decode.opc" | ||
721 | int wcnt AU = (op[1] >> 4) & 0x0f; | ||
722 | if (trace) | ||
723 | { | ||
724 | @@ -1106,7 +1108,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
725 | printf (" wcnt = 0x%x\n", wcnt); | ||
726 | } | ||
727 | SYNTAX("sarw %0, %1"); | ||
728 | -#line 1036 "rl78-decode.opc" | ||
729 | +#line 1038 "rl78-decode.opc" | ||
730 | ID(sar); W(); DR(AX); SC(wcnt); | ||
731 | |||
732 | /*----------------------------------------------------------------------*/ | ||
733 | @@ -1116,7 +1118,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
734 | case 0x80: | ||
735 | { | ||
736 | /** 0011 0001 1bit 0000 btclr %s1, $%a0 */ | ||
737 | -#line 413 "rl78-decode.opc" | ||
738 | +#line 415 "rl78-decode.opc" | ||
739 | int bit AU = (op[1] >> 4) & 0x07; | ||
740 | if (trace) | ||
741 | { | ||
742 | @@ -1126,7 +1128,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
743 | printf (" bit = 0x%x\n", bit); | ||
744 | } | ||
745 | SYNTAX("btclr %s1, $%a0"); | ||
746 | -#line 413 "rl78-decode.opc" | ||
747 | +#line 415 "rl78-decode.opc" | ||
748 | ID(branch_cond_clear); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T); | ||
749 | |||
750 | } | ||
751 | @@ -1134,7 +1136,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
752 | case 0x81: | ||
753 | { | ||
754 | /** 0011 0001 1bit 0001 btclr %e1, $%a0 */ | ||
755 | -#line 407 "rl78-decode.opc" | ||
756 | +#line 409 "rl78-decode.opc" | ||
757 | int bit AU = (op[1] >> 4) & 0x07; | ||
758 | if (trace) | ||
759 | { | ||
760 | @@ -1144,7 +1146,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
761 | printf (" bit = 0x%x\n", bit); | ||
762 | } | ||
763 | SYNTAX("btclr %e1, $%a0"); | ||
764 | -#line 407 "rl78-decode.opc" | ||
765 | +#line 409 "rl78-decode.opc" | ||
766 | ID(branch_cond_clear); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T); | ||
767 | |||
768 | } | ||
769 | @@ -1152,7 +1154,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
770 | case 0x82: | ||
771 | { | ||
772 | /** 0011 0001 1bit 0010 bt %s1, $%a0 */ | ||
773 | -#line 399 "rl78-decode.opc" | ||
774 | +#line 401 "rl78-decode.opc" | ||
775 | int bit AU = (op[1] >> 4) & 0x07; | ||
776 | if (trace) | ||
777 | { | ||
778 | @@ -1162,7 +1164,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
779 | printf (" bit = 0x%x\n", bit); | ||
780 | } | ||
781 | SYNTAX("bt %s1, $%a0"); | ||
782 | -#line 399 "rl78-decode.opc" | ||
783 | +#line 401 "rl78-decode.opc" | ||
784 | ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T); | ||
785 | |||
786 | } | ||
787 | @@ -1170,7 +1172,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
788 | case 0x83: | ||
789 | { | ||
790 | /** 0011 0001 1bit 0011 bt %e1, $%a0 */ | ||
791 | -#line 393 "rl78-decode.opc" | ||
792 | +#line 395 "rl78-decode.opc" | ||
793 | int bit AU = (op[1] >> 4) & 0x07; | ||
794 | if (trace) | ||
795 | { | ||
796 | @@ -1180,7 +1182,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
797 | printf (" bit = 0x%x\n", bit); | ||
798 | } | ||
799 | SYNTAX("bt %e1, $%a0"); | ||
800 | -#line 393 "rl78-decode.opc" | ||
801 | +#line 395 "rl78-decode.opc" | ||
802 | ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T); | ||
803 | |||
804 | } | ||
805 | @@ -1188,7 +1190,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
806 | case 0x84: | ||
807 | { | ||
808 | /** 0011 0001 1bit 0100 bf %s1, $%a0 */ | ||
809 | -#line 360 "rl78-decode.opc" | ||
810 | +#line 362 "rl78-decode.opc" | ||
811 | int bit AU = (op[1] >> 4) & 0x07; | ||
812 | if (trace) | ||
813 | { | ||
814 | @@ -1198,7 +1200,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
815 | printf (" bit = 0x%x\n", bit); | ||
816 | } | ||
817 | SYNTAX("bf %s1, $%a0"); | ||
818 | -#line 360 "rl78-decode.opc" | ||
819 | +#line 362 "rl78-decode.opc" | ||
820 | ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(F); | ||
821 | |||
822 | } | ||
823 | @@ -1206,7 +1208,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
824 | case 0x85: | ||
825 | { | ||
826 | /** 0011 0001 1bit 0101 bf %e1, $%a0 */ | ||
827 | -#line 354 "rl78-decode.opc" | ||
828 | +#line 356 "rl78-decode.opc" | ||
829 | int bit AU = (op[1] >> 4) & 0x07; | ||
830 | if (trace) | ||
831 | { | ||
832 | @@ -1216,7 +1218,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
833 | printf (" bit = 0x%x\n", bit); | ||
834 | } | ||
835 | SYNTAX("bf %e1, $%a0"); | ||
836 | -#line 354 "rl78-decode.opc" | ||
837 | +#line 356 "rl78-decode.opc" | ||
838 | ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(F); | ||
839 | |||
840 | } | ||
841 | @@ -1229,7 +1231,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
842 | case 0x37: | ||
843 | { | ||
844 | /** 0011 0ra1 xchw %0, %1 */ | ||
845 | -#line 1239 "rl78-decode.opc" | ||
846 | +#line 1241 "rl78-decode.opc" | ||
847 | int ra AU = (op[0] >> 1) & 0x03; | ||
848 | if (trace) | ||
849 | { | ||
850 | @@ -1239,7 +1241,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
851 | printf (" ra = 0x%x\n", ra); | ||
852 | } | ||
853 | SYNTAX("xchw %0, %1"); | ||
854 | -#line 1239 "rl78-decode.opc" | ||
855 | +#line 1241 "rl78-decode.opc" | ||
856 | ID(xch); W(); DR(AX); SRW(ra); | ||
857 | |||
858 | /*----------------------------------------------------------------------*/ | ||
859 | @@ -1256,7 +1258,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
860 | op[0]); | ||
861 | } | ||
862 | SYNTAX("mov %e0, #%1"); | ||
863 | -#line 738 "rl78-decode.opc" | ||
864 | +#line 740 "rl78-decode.opc" | ||
865 | ID(mov); DM(C, IMMU(2)); SC(IMMU(1)); | ||
866 | |||
867 | } | ||
868 | @@ -1271,7 +1273,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
869 | op[0]); | ||
870 | } | ||
871 | SYNTAX("mov %e0, #%1"); | ||
872 | -#line 732 "rl78-decode.opc" | ||
873 | +#line 734 "rl78-decode.opc" | ||
874 | ID(mov); DM(BC, IMMU(2)); SC(IMMU(1)); | ||
875 | |||
876 | } | ||
877 | @@ -1286,7 +1288,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
878 | op[0]); | ||
879 | } | ||
880 | SYNTAX("subc %0, #%1"); | ||
881 | -#line 1178 "rl78-decode.opc" | ||
882 | +#line 1180 "rl78-decode.opc" | ||
883 | ID(subc); DM(None, SADDR); SC(IMMU(1)); Fzac; | ||
884 | |||
885 | /*----------------------------------------------------------------------*/ | ||
886 | @@ -1303,7 +1305,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
887 | op[0]); | ||
888 | } | ||
889 | SYNTAX("subc %0, %1"); | ||
890 | -#line 1175 "rl78-decode.opc" | ||
891 | +#line 1177 "rl78-decode.opc" | ||
892 | ID(subc); DR(A); SM(None, SADDR); Fzac; | ||
893 | |||
894 | } | ||
895 | @@ -1318,7 +1320,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
896 | op[0]); | ||
897 | } | ||
898 | SYNTAX("subc %0, #%1"); | ||
899 | -#line 1166 "rl78-decode.opc" | ||
900 | +#line 1168 "rl78-decode.opc" | ||
901 | ID(subc); DR(A); SC(IMMU(1)); Fzac; | ||
902 | |||
903 | } | ||
904 | @@ -1333,7 +1335,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
905 | op[0]); | ||
906 | } | ||
907 | SYNTAX("subc %0, %e1"); | ||
908 | -#line 1154 "rl78-decode.opc" | ||
909 | +#line 1156 "rl78-decode.opc" | ||
910 | ID(subc); DR(A); SM(HL, 0); Fzac; | ||
911 | |||
912 | } | ||
913 | @@ -1348,7 +1350,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
914 | op[0]); | ||
915 | } | ||
916 | SYNTAX("subc %0, %ea1"); | ||
917 | -#line 1163 "rl78-decode.opc" | ||
918 | +#line 1165 "rl78-decode.opc" | ||
919 | ID(subc); DR(A); SM(HL, IMMU(1)); Fzac; | ||
920 | |||
921 | } | ||
922 | @@ -1363,7 +1365,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
923 | op[0]); | ||
924 | } | ||
925 | SYNTAX("subc %0, %e!1"); | ||
926 | -#line 1151 "rl78-decode.opc" | ||
927 | +#line 1153 "rl78-decode.opc" | ||
928 | ID(subc); DR(A); SM(None, IMMU(2)); Fzac; | ||
929 | |||
930 | } | ||
931 | @@ -1378,7 +1380,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
932 | op[0]); | ||
933 | } | ||
934 | SYNTAX("cmp %e!0, #%1"); | ||
935 | -#line 480 "rl78-decode.opc" | ||
936 | +#line 482 "rl78-decode.opc" | ||
937 | ID(cmp); DM(None, IMMU(2)); SC(IMMU(1)); Fzac; | ||
938 | |||
939 | } | ||
940 | @@ -1393,7 +1395,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
941 | op[0]); | ||
942 | } | ||
943 | SYNTAX("mov %0, #%1"); | ||
944 | -#line 717 "rl78-decode.opc" | ||
945 | +#line 719 "rl78-decode.opc" | ||
946 | ID(mov); DR(ES); SC(IMMU(1)); | ||
947 | |||
948 | } | ||
949 | @@ -1408,7 +1410,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
950 | op[0]); | ||
951 | } | ||
952 | SYNTAX("cmpw %0, %e!1"); | ||
953 | -#line 531 "rl78-decode.opc" | ||
954 | +#line 533 "rl78-decode.opc" | ||
955 | ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac; | ||
956 | |||
957 | } | ||
958 | @@ -1418,7 +1420,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
959 | case 0x47: | ||
960 | { | ||
961 | /** 0100 0ra1 cmpw %0, %1 */ | ||
962 | -#line 540 "rl78-decode.opc" | ||
963 | +#line 542 "rl78-decode.opc" | ||
964 | int ra AU = (op[0] >> 1) & 0x03; | ||
965 | if (trace) | ||
966 | { | ||
967 | @@ -1428,7 +1430,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
968 | printf (" ra = 0x%x\n", ra); | ||
969 | } | ||
970 | SYNTAX("cmpw %0, %1"); | ||
971 | -#line 540 "rl78-decode.opc" | ||
972 | +#line 542 "rl78-decode.opc" | ||
973 | ID(cmp); W(); DR(AX); SRW(ra); Fzac; | ||
974 | |||
975 | } | ||
976 | @@ -1443,7 +1445,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
977 | op[0]); | ||
978 | } | ||
979 | SYNTAX("cmpw %0, #%1"); | ||
980 | -#line 537 "rl78-decode.opc" | ||
981 | +#line 539 "rl78-decode.opc" | ||
982 | ID(cmp); W(); DR(AX); SC(IMMU(2)); Fzac; | ||
983 | |||
984 | } | ||
985 | @@ -1458,7 +1460,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
986 | op[0]); | ||
987 | } | ||
988 | SYNTAX("cmpw %0, %1"); | ||
989 | -#line 543 "rl78-decode.opc" | ||
990 | +#line 545 "rl78-decode.opc" | ||
991 | ID(cmp); W(); DR(AX); SM(None, SADDR); Fzac; | ||
992 | |||
993 | /*----------------------------------------------------------------------*/ | ||
994 | @@ -1475,7 +1477,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
995 | op[0]); | ||
996 | } | ||
997 | SYNTAX("mov %e0, %1"); | ||
998 | -#line 735 "rl78-decode.opc" | ||
999 | +#line 737 "rl78-decode.opc" | ||
1000 | ID(mov); DM(BC, IMMU(2)); SR(A); | ||
1001 | |||
1002 | } | ||
1003 | @@ -1490,7 +1492,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1004 | op[0]); | ||
1005 | } | ||
1006 | SYNTAX("mov %0, %e1"); | ||
1007 | -#line 681 "rl78-decode.opc" | ||
1008 | +#line 683 "rl78-decode.opc" | ||
1009 | ID(mov); DR(A); SM(BC, IMMU(2)); | ||
1010 | |||
1011 | } | ||
1012 | @@ -1505,7 +1507,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1013 | op[0]); | ||
1014 | } | ||
1015 | SYNTAX("cmp %0, #%1"); | ||
1016 | -#line 483 "rl78-decode.opc" | ||
1017 | +#line 485 "rl78-decode.opc" | ||
1018 | ID(cmp); DM(None, SADDR); SC(IMMU(1)); Fzac; | ||
1019 | |||
1020 | } | ||
1021 | @@ -1520,7 +1522,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1022 | op[0]); | ||
1023 | } | ||
1024 | SYNTAX("cmp %0, %1"); | ||
1025 | -#line 510 "rl78-decode.opc" | ||
1026 | +#line 512 "rl78-decode.opc" | ||
1027 | ID(cmp); DR(A); SM(None, SADDR); Fzac; | ||
1028 | |||
1029 | /*----------------------------------------------------------------------*/ | ||
1030 | @@ -1537,7 +1539,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1031 | op[0]); | ||
1032 | } | ||
1033 | SYNTAX("cmp %0, #%1"); | ||
1034 | -#line 501 "rl78-decode.opc" | ||
1035 | +#line 503 "rl78-decode.opc" | ||
1036 | ID(cmp); DR(A); SC(IMMU(1)); Fzac; | ||
1037 | |||
1038 | } | ||
1039 | @@ -1552,7 +1554,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1040 | op[0]); | ||
1041 | } | ||
1042 | SYNTAX("cmp %0, %e1"); | ||
1043 | -#line 489 "rl78-decode.opc" | ||
1044 | +#line 491 "rl78-decode.opc" | ||
1045 | ID(cmp); DR(A); SM(HL, 0); Fzac; | ||
1046 | |||
1047 | } | ||
1048 | @@ -1567,7 +1569,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1049 | op[0]); | ||
1050 | } | ||
1051 | SYNTAX("cmp %0, %ea1"); | ||
1052 | -#line 498 "rl78-decode.opc" | ||
1053 | +#line 500 "rl78-decode.opc" | ||
1054 | ID(cmp); DR(A); SM(HL, IMMU(1)); Fzac; | ||
1055 | |||
1056 | } | ||
1057 | @@ -1582,7 +1584,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1058 | op[0]); | ||
1059 | } | ||
1060 | SYNTAX("cmp %0, %e!1"); | ||
1061 | -#line 486 "rl78-decode.opc" | ||
1062 | +#line 488 "rl78-decode.opc" | ||
1063 | ID(cmp); DR(A); SM(None, IMMU(2)); Fzac; | ||
1064 | |||
1065 | } | ||
1066 | @@ -1597,7 +1599,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1067 | case 0x57: | ||
1068 | { | ||
1069 | /** 0101 0reg mov %0, #%1 */ | ||
1070 | -#line 669 "rl78-decode.opc" | ||
1071 | +#line 671 "rl78-decode.opc" | ||
1072 | int reg AU = op[0] & 0x07; | ||
1073 | if (trace) | ||
1074 | { | ||
1075 | @@ -1607,7 +1609,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1076 | printf (" reg = 0x%x\n", reg); | ||
1077 | } | ||
1078 | SYNTAX("mov %0, #%1"); | ||
1079 | -#line 669 "rl78-decode.opc" | ||
1080 | +#line 671 "rl78-decode.opc" | ||
1081 | ID(mov); DRB(reg); SC(IMMU(1)); | ||
1082 | |||
1083 | } | ||
1084 | @@ -1622,7 +1624,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1085 | op[0]); | ||
1086 | } | ||
1087 | SYNTAX("movw %e0, %1"); | ||
1088 | -#line 871 "rl78-decode.opc" | ||
1089 | +#line 873 "rl78-decode.opc" | ||
1090 | ID(mov); W(); DM(B, IMMU(2)); SR(AX); | ||
1091 | |||
1092 | } | ||
1093 | @@ -1637,7 +1639,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1094 | op[0]); | ||
1095 | } | ||
1096 | SYNTAX("movw %0, %e1"); | ||
1097 | -#line 862 "rl78-decode.opc" | ||
1098 | +#line 864 "rl78-decode.opc" | ||
1099 | ID(mov); W(); DR(AX); SM(B, IMMU(2)); | ||
1100 | |||
1101 | } | ||
1102 | @@ -1652,7 +1654,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1103 | op[0]); | ||
1104 | } | ||
1105 | SYNTAX("and %0, #%1"); | ||
1106 | -#line 312 "rl78-decode.opc" | ||
1107 | +#line 314 "rl78-decode.opc" | ||
1108 | ID(and); DM(None, SADDR); SC(IMMU(1)); Fz; | ||
1109 | |||
1110 | /*----------------------------------------------------------------------*/ | ||
1111 | @@ -1669,7 +1671,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1112 | op[0]); | ||
1113 | } | ||
1114 | SYNTAX("and %0, %1"); | ||
1115 | -#line 309 "rl78-decode.opc" | ||
1116 | +#line 311 "rl78-decode.opc" | ||
1117 | ID(and); DR(A); SM(None, SADDR); Fz; | ||
1118 | |||
1119 | } | ||
1120 | @@ -1684,7 +1686,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1121 | op[0]); | ||
1122 | } | ||
1123 | SYNTAX("and %0, #%1"); | ||
1124 | -#line 300 "rl78-decode.opc" | ||
1125 | +#line 302 "rl78-decode.opc" | ||
1126 | ID(and); DR(A); SC(IMMU(1)); Fz; | ||
1127 | |||
1128 | } | ||
1129 | @@ -1699,7 +1701,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1130 | op[0]); | ||
1131 | } | ||
1132 | SYNTAX("and %0, %e1"); | ||
1133 | -#line 288 "rl78-decode.opc" | ||
1134 | +#line 290 "rl78-decode.opc" | ||
1135 | ID(and); DR(A); SM(HL, 0); Fz; | ||
1136 | |||
1137 | } | ||
1138 | @@ -1714,7 +1716,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1139 | op[0]); | ||
1140 | } | ||
1141 | SYNTAX("and %0, %ea1"); | ||
1142 | -#line 294 "rl78-decode.opc" | ||
1143 | +#line 296 "rl78-decode.opc" | ||
1144 | ID(and); DR(A); SM(HL, IMMU(1)); Fz; | ||
1145 | |||
1146 | } | ||
1147 | @@ -1729,7 +1731,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1148 | op[0]); | ||
1149 | } | ||
1150 | SYNTAX("and %0, %e!1"); | ||
1151 | -#line 285 "rl78-decode.opc" | ||
1152 | +#line 287 "rl78-decode.opc" | ||
1153 | ID(and); DR(A); SM(None, IMMU(2)); Fz; | ||
1154 | |||
1155 | } | ||
1156 | @@ -1743,7 +1745,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1157 | case 0x67: | ||
1158 | { | ||
1159 | /** 0110 0rba mov %0, %1 */ | ||
1160 | -#line 672 "rl78-decode.opc" | ||
1161 | +#line 674 "rl78-decode.opc" | ||
1162 | int rba AU = op[0] & 0x07; | ||
1163 | if (trace) | ||
1164 | { | ||
1165 | @@ -1753,7 +1755,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1166 | printf (" rba = 0x%x\n", rba); | ||
1167 | } | ||
1168 | SYNTAX("mov %0, %1"); | ||
1169 | -#line 672 "rl78-decode.opc" | ||
1170 | +#line 674 "rl78-decode.opc" | ||
1171 | ID(mov); DR(A); SRB(rba); | ||
1172 | |||
1173 | } | ||
1174 | @@ -1772,7 +1774,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1175 | case 0x07: | ||
1176 | { | ||
1177 | /** 0110 0001 0000 0reg add %0, %1 */ | ||
1178 | -#line 225 "rl78-decode.opc" | ||
1179 | +#line 227 "rl78-decode.opc" | ||
1180 | int reg AU = op[1] & 0x07; | ||
1181 | if (trace) | ||
1182 | { | ||
1183 | @@ -1782,7 +1784,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1184 | printf (" reg = 0x%x\n", reg); | ||
1185 | } | ||
1186 | SYNTAX("add %0, %1"); | ||
1187 | -#line 225 "rl78-decode.opc" | ||
1188 | +#line 227 "rl78-decode.opc" | ||
1189 | ID(add); DRB(reg); SR(A); Fzac; | ||
1190 | |||
1191 | } | ||
1192 | @@ -1796,7 +1798,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1193 | case 0x0f: | ||
1194 | { | ||
1195 | /** 0110 0001 0000 1rba add %0, %1 */ | ||
1196 | -#line 219 "rl78-decode.opc" | ||
1197 | +#line 221 "rl78-decode.opc" | ||
1198 | int rba AU = op[1] & 0x07; | ||
1199 | if (trace) | ||
1200 | { | ||
1201 | @@ -1806,7 +1808,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1202 | printf (" rba = 0x%x\n", rba); | ||
1203 | } | ||
1204 | SYNTAX("add %0, %1"); | ||
1205 | -#line 219 "rl78-decode.opc" | ||
1206 | +#line 221 "rl78-decode.opc" | ||
1207 | ID(add); DR(A); SRB(rba); Fzac; | ||
1208 | |||
1209 | } | ||
1210 | @@ -1821,7 +1823,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1211 | op[0], op[1]); | ||
1212 | } | ||
1213 | SYNTAX("addw %0, %ea1"); | ||
1214 | -#line 268 "rl78-decode.opc" | ||
1215 | +#line 270 "rl78-decode.opc" | ||
1216 | ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac; | ||
1217 | |||
1218 | } | ||
1219 | @@ -1836,7 +1838,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1220 | case 0x17: | ||
1221 | { | ||
1222 | /** 0110 0001 0001 0reg addc %0, %1 */ | ||
1223 | -#line 254 "rl78-decode.opc" | ||
1224 | +#line 256 "rl78-decode.opc" | ||
1225 | int reg AU = op[1] & 0x07; | ||
1226 | if (trace) | ||
1227 | { | ||
1228 | @@ -1846,7 +1848,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1229 | printf (" reg = 0x%x\n", reg); | ||
1230 | } | ||
1231 | SYNTAX("addc %0, %1"); | ||
1232 | -#line 254 "rl78-decode.opc" | ||
1233 | +#line 256 "rl78-decode.opc" | ||
1234 | ID(addc); DRB(reg); SR(A); Fzac; | ||
1235 | |||
1236 | } | ||
1237 | @@ -1860,7 +1862,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1238 | case 0x1f: | ||
1239 | { | ||
1240 | /** 0110 0001 0001 1rba addc %0, %1 */ | ||
1241 | -#line 251 "rl78-decode.opc" | ||
1242 | +#line 253 "rl78-decode.opc" | ||
1243 | int rba AU = op[1] & 0x07; | ||
1244 | if (trace) | ||
1245 | { | ||
1246 | @@ -1870,7 +1872,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1247 | printf (" rba = 0x%x\n", rba); | ||
1248 | } | ||
1249 | SYNTAX("addc %0, %1"); | ||
1250 | -#line 251 "rl78-decode.opc" | ||
1251 | +#line 253 "rl78-decode.opc" | ||
1252 | ID(addc); DR(A); SRB(rba); Fzac; | ||
1253 | |||
1254 | } | ||
1255 | @@ -1885,7 +1887,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1256 | case 0x27: | ||
1257 | { | ||
1258 | /** 0110 0001 0010 0reg sub %0, %1 */ | ||
1259 | -#line 1143 "rl78-decode.opc" | ||
1260 | +#line 1145 "rl78-decode.opc" | ||
1261 | int reg AU = op[1] & 0x07; | ||
1262 | if (trace) | ||
1263 | { | ||
1264 | @@ -1895,7 +1897,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1265 | printf (" reg = 0x%x\n", reg); | ||
1266 | } | ||
1267 | SYNTAX("sub %0, %1"); | ||
1268 | -#line 1143 "rl78-decode.opc" | ||
1269 | +#line 1145 "rl78-decode.opc" | ||
1270 | ID(sub); DRB(reg); SR(A); Fzac; | ||
1271 | |||
1272 | } | ||
1273 | @@ -1909,7 +1911,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1274 | case 0x2f: | ||
1275 | { | ||
1276 | /** 0110 0001 0010 1rba sub %0, %1 */ | ||
1277 | -#line 1137 "rl78-decode.opc" | ||
1278 | +#line 1139 "rl78-decode.opc" | ||
1279 | int rba AU = op[1] & 0x07; | ||
1280 | if (trace) | ||
1281 | { | ||
1282 | @@ -1919,7 +1921,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1283 | printf (" rba = 0x%x\n", rba); | ||
1284 | } | ||
1285 | SYNTAX("sub %0, %1"); | ||
1286 | -#line 1137 "rl78-decode.opc" | ||
1287 | +#line 1139 "rl78-decode.opc" | ||
1288 | ID(sub); DR(A); SRB(rba); Fzac; | ||
1289 | |||
1290 | } | ||
1291 | @@ -1934,7 +1936,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1292 | op[0], op[1]); | ||
1293 | } | ||
1294 | SYNTAX("subw %0, %ea1"); | ||
1295 | -#line 1186 "rl78-decode.opc" | ||
1296 | +#line 1188 "rl78-decode.opc" | ||
1297 | ID(sub); W(); DR(AX); SM(HL, IMMU(1)); Fzac; | ||
1298 | |||
1299 | } | ||
1300 | @@ -1949,7 +1951,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1301 | case 0x37: | ||
1302 | { | ||
1303 | /** 0110 0001 0011 0reg subc %0, %1 */ | ||
1304 | -#line 1172 "rl78-decode.opc" | ||
1305 | +#line 1174 "rl78-decode.opc" | ||
1306 | int reg AU = op[1] & 0x07; | ||
1307 | if (trace) | ||
1308 | { | ||
1309 | @@ -1959,7 +1961,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1310 | printf (" reg = 0x%x\n", reg); | ||
1311 | } | ||
1312 | SYNTAX("subc %0, %1"); | ||
1313 | -#line 1172 "rl78-decode.opc" | ||
1314 | +#line 1174 "rl78-decode.opc" | ||
1315 | ID(subc); DRB(reg); SR(A); Fzac; | ||
1316 | |||
1317 | } | ||
1318 | @@ -1973,7 +1975,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1319 | case 0x3f: | ||
1320 | { | ||
1321 | /** 0110 0001 0011 1rba subc %0, %1 */ | ||
1322 | -#line 1169 "rl78-decode.opc" | ||
1323 | +#line 1171 "rl78-decode.opc" | ||
1324 | int rba AU = op[1] & 0x07; | ||
1325 | if (trace) | ||
1326 | { | ||
1327 | @@ -1983,7 +1985,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1328 | printf (" rba = 0x%x\n", rba); | ||
1329 | } | ||
1330 | SYNTAX("subc %0, %1"); | ||
1331 | -#line 1169 "rl78-decode.opc" | ||
1332 | +#line 1171 "rl78-decode.opc" | ||
1333 | ID(subc); DR(A); SRB(rba); Fzac; | ||
1334 | |||
1335 | } | ||
1336 | @@ -1998,7 +2000,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1337 | case 0x47: | ||
1338 | { | ||
1339 | /** 0110 0001 0100 0reg cmp %0, %1 */ | ||
1340 | -#line 507 "rl78-decode.opc" | ||
1341 | +#line 509 "rl78-decode.opc" | ||
1342 | int reg AU = op[1] & 0x07; | ||
1343 | if (trace) | ||
1344 | { | ||
1345 | @@ -2008,7 +2010,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1346 | printf (" reg = 0x%x\n", reg); | ||
1347 | } | ||
1348 | SYNTAX("cmp %0, %1"); | ||
1349 | -#line 507 "rl78-decode.opc" | ||
1350 | +#line 509 "rl78-decode.opc" | ||
1351 | ID(cmp); DRB(reg); SR(A); Fzac; | ||
1352 | |||
1353 | } | ||
1354 | @@ -2022,7 +2024,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1355 | case 0x4f: | ||
1356 | { | ||
1357 | /** 0110 0001 0100 1rba cmp %0, %1 */ | ||
1358 | -#line 504 "rl78-decode.opc" | ||
1359 | +#line 506 "rl78-decode.opc" | ||
1360 | int rba AU = op[1] & 0x07; | ||
1361 | if (trace) | ||
1362 | { | ||
1363 | @@ -2032,7 +2034,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1364 | printf (" rba = 0x%x\n", rba); | ||
1365 | } | ||
1366 | SYNTAX("cmp %0, %1"); | ||
1367 | -#line 504 "rl78-decode.opc" | ||
1368 | +#line 506 "rl78-decode.opc" | ||
1369 | ID(cmp); DR(A); SRB(rba); Fzac; | ||
1370 | |||
1371 | } | ||
1372 | @@ -2047,7 +2049,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1373 | op[0], op[1]); | ||
1374 | } | ||
1375 | SYNTAX("cmpw %0, %ea1"); | ||
1376 | -#line 534 "rl78-decode.opc" | ||
1377 | +#line 536 "rl78-decode.opc" | ||
1378 | ID(cmp); W(); DR(AX); SM(HL, IMMU(1)); Fzac; | ||
1379 | |||
1380 | } | ||
1381 | @@ -2062,7 +2064,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1382 | case 0x57: | ||
1383 | { | ||
1384 | /** 0110 0001 0101 0reg and %0, %1 */ | ||
1385 | -#line 306 "rl78-decode.opc" | ||
1386 | +#line 308 "rl78-decode.opc" | ||
1387 | int reg AU = op[1] & 0x07; | ||
1388 | if (trace) | ||
1389 | { | ||
1390 | @@ -2072,7 +2074,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1391 | printf (" reg = 0x%x\n", reg); | ||
1392 | } | ||
1393 | SYNTAX("and %0, %1"); | ||
1394 | -#line 306 "rl78-decode.opc" | ||
1395 | +#line 308 "rl78-decode.opc" | ||
1396 | ID(and); DRB(reg); SR(A); Fz; | ||
1397 | |||
1398 | } | ||
1399 | @@ -2086,7 +2088,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1400 | case 0x5f: | ||
1401 | { | ||
1402 | /** 0110 0001 0101 1rba and %0, %1 */ | ||
1403 | -#line 303 "rl78-decode.opc" | ||
1404 | +#line 305 "rl78-decode.opc" | ||
1405 | int rba AU = op[1] & 0x07; | ||
1406 | if (trace) | ||
1407 | { | ||
1408 | @@ -2096,7 +2098,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1409 | printf (" rba = 0x%x\n", rba); | ||
1410 | } | ||
1411 | SYNTAX("and %0, %1"); | ||
1412 | -#line 303 "rl78-decode.opc" | ||
1413 | +#line 305 "rl78-decode.opc" | ||
1414 | ID(and); DR(A); SRB(rba); Fz; | ||
1415 | |||
1416 | } | ||
1417 | @@ -2111,7 +2113,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1418 | op[0], op[1]); | ||
1419 | } | ||
1420 | SYNTAX("inc %ea0"); | ||
1421 | -#line 584 "rl78-decode.opc" | ||
1422 | +#line 586 "rl78-decode.opc" | ||
1423 | ID(add); DM(HL, IMMU(1)); SC(1); Fza; | ||
1424 | |||
1425 | } | ||
1426 | @@ -2126,7 +2128,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1427 | case 0x67: | ||
1428 | { | ||
1429 | /** 0110 0001 0110 0reg or %0, %1 */ | ||
1430 | -#line 961 "rl78-decode.opc" | ||
1431 | +#line 963 "rl78-decode.opc" | ||
1432 | int reg AU = op[1] & 0x07; | ||
1433 | if (trace) | ||
1434 | { | ||
1435 | @@ -2136,7 +2138,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1436 | printf (" reg = 0x%x\n", reg); | ||
1437 | } | ||
1438 | SYNTAX("or %0, %1"); | ||
1439 | -#line 961 "rl78-decode.opc" | ||
1440 | +#line 963 "rl78-decode.opc" | ||
1441 | ID(or); DRB(reg); SR(A); Fz; | ||
1442 | |||
1443 | } | ||
1444 | @@ -2150,7 +2152,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1445 | case 0x6f: | ||
1446 | { | ||
1447 | /** 0110 0001 0110 1rba or %0, %1 */ | ||
1448 | -#line 958 "rl78-decode.opc" | ||
1449 | +#line 960 "rl78-decode.opc" | ||
1450 | int rba AU = op[1] & 0x07; | ||
1451 | if (trace) | ||
1452 | { | ||
1453 | @@ -2160,7 +2162,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1454 | printf (" rba = 0x%x\n", rba); | ||
1455 | } | ||
1456 | SYNTAX("or %0, %1"); | ||
1457 | -#line 958 "rl78-decode.opc" | ||
1458 | +#line 960 "rl78-decode.opc" | ||
1459 | ID(or); DR(A); SRB(rba); Fz; | ||
1460 | |||
1461 | } | ||
1462 | @@ -2175,7 +2177,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1463 | op[0], op[1]); | ||
1464 | } | ||
1465 | SYNTAX("dec %ea0"); | ||
1466 | -#line 551 "rl78-decode.opc" | ||
1467 | +#line 553 "rl78-decode.opc" | ||
1468 | ID(sub); DM(HL, IMMU(1)); SC(1); Fza; | ||
1469 | |||
1470 | } | ||
1471 | @@ -2190,7 +2192,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1472 | case 0x77: | ||
1473 | { | ||
1474 | /** 0110 0001 0111 0reg xor %0, %1 */ | ||
1475 | -#line 1265 "rl78-decode.opc" | ||
1476 | +#line 1267 "rl78-decode.opc" | ||
1477 | int reg AU = op[1] & 0x07; | ||
1478 | if (trace) | ||
1479 | { | ||
1480 | @@ -2200,7 +2202,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1481 | printf (" reg = 0x%x\n", reg); | ||
1482 | } | ||
1483 | SYNTAX("xor %0, %1"); | ||
1484 | -#line 1265 "rl78-decode.opc" | ||
1485 | +#line 1267 "rl78-decode.opc" | ||
1486 | ID(xor); DRB(reg); SR(A); Fz; | ||
1487 | |||
1488 | } | ||
1489 | @@ -2214,7 +2216,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1490 | case 0x7f: | ||
1491 | { | ||
1492 | /** 0110 0001 0111 1rba xor %0, %1 */ | ||
1493 | -#line 1262 "rl78-decode.opc" | ||
1494 | +#line 1264 "rl78-decode.opc" | ||
1495 | int rba AU = op[1] & 0x07; | ||
1496 | if (trace) | ||
1497 | { | ||
1498 | @@ -2224,7 +2226,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1499 | printf (" rba = 0x%x\n", rba); | ||
1500 | } | ||
1501 | SYNTAX("xor %0, %1"); | ||
1502 | -#line 1262 "rl78-decode.opc" | ||
1503 | +#line 1264 "rl78-decode.opc" | ||
1504 | ID(xor); DR(A); SRB(rba); Fz; | ||
1505 | |||
1506 | } | ||
1507 | @@ -2239,7 +2241,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1508 | op[0], op[1]); | ||
1509 | } | ||
1510 | SYNTAX("incw %ea0"); | ||
1511 | -#line 598 "rl78-decode.opc" | ||
1512 | +#line 600 "rl78-decode.opc" | ||
1513 | ID(add); W(); DM(HL, IMMU(1)); SC(1); | ||
1514 | |||
1515 | } | ||
1516 | @@ -2255,7 +2257,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1517 | op[0], op[1]); | ||
1518 | } | ||
1519 | SYNTAX("add %0, %e1"); | ||
1520 | -#line 207 "rl78-decode.opc" | ||
1521 | +#line 209 "rl78-decode.opc" | ||
1522 | ID(add); DR(A); SM2(HL, B, 0); Fzac; | ||
1523 | |||
1524 | } | ||
1525 | @@ -2270,7 +2272,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1526 | op[0], op[1]); | ||
1527 | } | ||
1528 | SYNTAX("add %0, %e1"); | ||
1529 | -#line 213 "rl78-decode.opc" | ||
1530 | +#line 215 "rl78-decode.opc" | ||
1531 | ID(add); DR(A); SM2(HL, C, 0); Fzac; | ||
1532 | |||
1533 | } | ||
1534 | @@ -2309,9 +2311,9 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1535 | case 0xf7: | ||
1536 | { | ||
1537 | /** 0110 0001 1nnn 01mm callt [%x0] */ | ||
1538 | -#line 433 "rl78-decode.opc" | ||
1539 | +#line 435 "rl78-decode.opc" | ||
1540 | int nnn AU = (op[1] >> 4) & 0x07; | ||
1541 | -#line 433 "rl78-decode.opc" | ||
1542 | +#line 435 "rl78-decode.opc" | ||
1543 | int mm AU = op[1] & 0x03; | ||
1544 | if (trace) | ||
1545 | { | ||
1546 | @@ -2322,7 +2324,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1547 | printf (" mm = 0x%x\n", mm); | ||
1548 | } | ||
1549 | SYNTAX("callt [%x0]"); | ||
1550 | -#line 433 "rl78-decode.opc" | ||
1551 | +#line 435 "rl78-decode.opc" | ||
1552 | ID(call); DM(None, 0x80 + mm*16 + nnn*2); | ||
1553 | |||
1554 | /*----------------------------------------------------------------------*/ | ||
1555 | @@ -2338,7 +2340,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1556 | case 0x8f: | ||
1557 | { | ||
1558 | /** 0110 0001 1000 1reg xch %0, %1 */ | ||
1559 | -#line 1224 "rl78-decode.opc" | ||
1560 | +#line 1226 "rl78-decode.opc" | ||
1561 | int reg AU = op[1] & 0x07; | ||
1562 | if (trace) | ||
1563 | { | ||
1564 | @@ -2348,7 +2350,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1565 | printf (" reg = 0x%x\n", reg); | ||
1566 | } | ||
1567 | SYNTAX("xch %0, %1"); | ||
1568 | -#line 1224 "rl78-decode.opc" | ||
1569 | +#line 1226 "rl78-decode.opc" | ||
1570 | /* Note: DECW uses reg == X, so this must follow DECW */ | ||
1571 | ID(xch); DR(A); SRB(reg); | ||
1572 | |||
1573 | @@ -2364,7 +2366,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1574 | op[0], op[1]); | ||
1575 | } | ||
1576 | SYNTAX("decw %ea0"); | ||
1577 | -#line 565 "rl78-decode.opc" | ||
1578 | +#line 567 "rl78-decode.opc" | ||
1579 | ID(sub); W(); DM(HL, IMMU(1)); SC(1); | ||
1580 | |||
1581 | } | ||
1582 | @@ -2379,7 +2381,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1583 | op[0], op[1]); | ||
1584 | } | ||
1585 | SYNTAX("addc %0, %e1"); | ||
1586 | -#line 239 "rl78-decode.opc" | ||
1587 | +#line 241 "rl78-decode.opc" | ||
1588 | ID(addc); DR(A); SM2(HL, B, 0); Fzac; | ||
1589 | |||
1590 | } | ||
1591 | @@ -2394,7 +2396,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1592 | op[0], op[1]); | ||
1593 | } | ||
1594 | SYNTAX("addc %0, %e1"); | ||
1595 | -#line 242 "rl78-decode.opc" | ||
1596 | +#line 244 "rl78-decode.opc" | ||
1597 | ID(addc); DR(A); SM2(HL, C, 0); Fzac; | ||
1598 | |||
1599 | } | ||
1600 | @@ -2410,7 +2412,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1601 | op[0], op[1]); | ||
1602 | } | ||
1603 | SYNTAX("sub %0, %e1"); | ||
1604 | -#line 1125 "rl78-decode.opc" | ||
1605 | +#line 1127 "rl78-decode.opc" | ||
1606 | ID(sub); DR(A); SM2(HL, B, 0); Fzac; | ||
1607 | |||
1608 | } | ||
1609 | @@ -2425,7 +2427,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1610 | op[0], op[1]); | ||
1611 | } | ||
1612 | SYNTAX("sub %0, %e1"); | ||
1613 | -#line 1131 "rl78-decode.opc" | ||
1614 | +#line 1133 "rl78-decode.opc" | ||
1615 | ID(sub); DR(A); SM2(HL, C, 0); Fzac; | ||
1616 | |||
1617 | } | ||
1618 | @@ -2440,7 +2442,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1619 | op[0], op[1]); | ||
1620 | } | ||
1621 | SYNTAX("xch %0, %1"); | ||
1622 | -#line 1228 "rl78-decode.opc" | ||
1623 | +#line 1230 "rl78-decode.opc" | ||
1624 | ID(xch); DR(A); SM(None, SADDR); | ||
1625 | |||
1626 | } | ||
1627 | @@ -2455,7 +2457,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1628 | op[0], op[1]); | ||
1629 | } | ||
1630 | SYNTAX("xch %0, %e1"); | ||
1631 | -#line 1221 "rl78-decode.opc" | ||
1632 | +#line 1223 "rl78-decode.opc" | ||
1633 | ID(xch); DR(A); SM2(HL, C, 0); | ||
1634 | |||
1635 | } | ||
1636 | @@ -2470,7 +2472,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1637 | op[0], op[1]); | ||
1638 | } | ||
1639 | SYNTAX("xch %0, %e!1"); | ||
1640 | -#line 1203 "rl78-decode.opc" | ||
1641 | +#line 1205 "rl78-decode.opc" | ||
1642 | ID(xch); DR(A); SM(None, IMMU(2)); | ||
1643 | |||
1644 | } | ||
1645 | @@ -2485,7 +2487,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1646 | op[0], op[1]); | ||
1647 | } | ||
1648 | SYNTAX("xch %0, %s1"); | ||
1649 | -#line 1231 "rl78-decode.opc" | ||
1650 | +#line 1233 "rl78-decode.opc" | ||
1651 | ID(xch); DR(A); SM(None, SFR); | ||
1652 | |||
1653 | } | ||
1654 | @@ -2500,7 +2502,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1655 | op[0], op[1]); | ||
1656 | } | ||
1657 | SYNTAX("xch %0, %e1"); | ||
1658 | -#line 1212 "rl78-decode.opc" | ||
1659 | +#line 1214 "rl78-decode.opc" | ||
1660 | ID(xch); DR(A); SM(HL, 0); | ||
1661 | |||
1662 | } | ||
1663 | @@ -2515,7 +2517,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1664 | op[0], op[1]); | ||
1665 | } | ||
1666 | SYNTAX("xch %0, %ea1"); | ||
1667 | -#line 1218 "rl78-decode.opc" | ||
1668 | +#line 1220 "rl78-decode.opc" | ||
1669 | ID(xch); DR(A); SM(HL, IMMU(1)); | ||
1670 | |||
1671 | } | ||
1672 | @@ -2530,7 +2532,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1673 | op[0], op[1]); | ||
1674 | } | ||
1675 | SYNTAX("xch %0, %e1"); | ||
1676 | -#line 1206 "rl78-decode.opc" | ||
1677 | +#line 1208 "rl78-decode.opc" | ||
1678 | ID(xch); DR(A); SM(DE, 0); | ||
1679 | |||
1680 | } | ||
1681 | @@ -2545,7 +2547,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1682 | op[0], op[1]); | ||
1683 | } | ||
1684 | SYNTAX("xch %0, %ea1"); | ||
1685 | -#line 1209 "rl78-decode.opc" | ||
1686 | +#line 1211 "rl78-decode.opc" | ||
1687 | ID(xch); DR(A); SM(DE, IMMU(1)); | ||
1688 | |||
1689 | } | ||
1690 | @@ -2560,7 +2562,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1691 | op[0], op[1]); | ||
1692 | } | ||
1693 | SYNTAX("subc %0, %e1"); | ||
1694 | -#line 1157 "rl78-decode.opc" | ||
1695 | +#line 1159 "rl78-decode.opc" | ||
1696 | ID(subc); DR(A); SM2(HL, B, 0); Fzac; | ||
1697 | |||
1698 | } | ||
1699 | @@ -2575,7 +2577,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1700 | op[0], op[1]); | ||
1701 | } | ||
1702 | SYNTAX("subc %0, %e1"); | ||
1703 | -#line 1160 "rl78-decode.opc" | ||
1704 | +#line 1162 "rl78-decode.opc" | ||
1705 | ID(subc); DR(A); SM2(HL, C, 0); Fzac; | ||
1706 | |||
1707 | } | ||
1708 | @@ -2590,7 +2592,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1709 | op[0], op[1]); | ||
1710 | } | ||
1711 | SYNTAX("mov %0, %1"); | ||
1712 | -#line 723 "rl78-decode.opc" | ||
1713 | +#line 725 "rl78-decode.opc" | ||
1714 | ID(mov); DR(ES); SM(None, SADDR); | ||
1715 | |||
1716 | } | ||
1717 | @@ -2605,7 +2607,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1718 | op[0], op[1]); | ||
1719 | } | ||
1720 | SYNTAX("xch %0, %e1"); | ||
1721 | -#line 1215 "rl78-decode.opc" | ||
1722 | +#line 1217 "rl78-decode.opc" | ||
1723 | ID(xch); DR(A); SM2(HL, B, 0); | ||
1724 | |||
1725 | } | ||
1726 | @@ -2620,7 +2622,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1727 | op[0], op[1]); | ||
1728 | } | ||
1729 | SYNTAX("cmp %0, %e1"); | ||
1730 | -#line 492 "rl78-decode.opc" | ||
1731 | +#line 494 "rl78-decode.opc" | ||
1732 | ID(cmp); DR(A); SM2(HL, B, 0); Fzac; | ||
1733 | |||
1734 | } | ||
1735 | @@ -2635,7 +2637,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1736 | op[0], op[1]); | ||
1737 | } | ||
1738 | SYNTAX("cmp %0, %e1"); | ||
1739 | -#line 495 "rl78-decode.opc" | ||
1740 | +#line 497 "rl78-decode.opc" | ||
1741 | ID(cmp); DR(A); SM2(HL, C, 0); Fzac; | ||
1742 | |||
1743 | } | ||
1744 | @@ -2650,7 +2652,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1745 | op[0], op[1]); | ||
1746 | } | ||
1747 | SYNTAX("bh $%a0"); | ||
1748 | -#line 340 "rl78-decode.opc" | ||
1749 | +#line 342 "rl78-decode.opc" | ||
1750 | ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(H); | ||
1751 | |||
1752 | } | ||
1753 | @@ -2665,7 +2667,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1754 | op[0], op[1]); | ||
1755 | } | ||
1756 | SYNTAX("sk%c1"); | ||
1757 | -#line 1094 "rl78-decode.opc" | ||
1758 | +#line 1096 "rl78-decode.opc" | ||
1759 | ID(skip); COND(C); | ||
1760 | |||
1761 | } | ||
1762 | @@ -2680,7 +2682,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1763 | op[0], op[1]); | ||
1764 | } | ||
1765 | SYNTAX("mov %0, %e1"); | ||
1766 | -#line 660 "rl78-decode.opc" | ||
1767 | +#line 662 "rl78-decode.opc" | ||
1768 | ID(mov); DR(A); SM2(HL, B, 0); | ||
1769 | |||
1770 | } | ||
1771 | @@ -2691,7 +2693,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1772 | case 0xfa: | ||
1773 | { | ||
1774 | /** 0110 0001 11rg 1010 call %0 */ | ||
1775 | -#line 430 "rl78-decode.opc" | ||
1776 | +#line 432 "rl78-decode.opc" | ||
1777 | int rg AU = (op[1] >> 4) & 0x03; | ||
1778 | if (trace) | ||
1779 | { | ||
1780 | @@ -2701,7 +2703,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1781 | printf (" rg = 0x%x\n", rg); | ||
1782 | } | ||
1783 | SYNTAX("call %0"); | ||
1784 | -#line 430 "rl78-decode.opc" | ||
1785 | +#line 432 "rl78-decode.opc" | ||
1786 | ID(call); DRW(rg); | ||
1787 | |||
1788 | } | ||
1789 | @@ -2716,7 +2718,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1790 | op[0], op[1]); | ||
1791 | } | ||
1792 | SYNTAX("br ax"); | ||
1793 | -#line 380 "rl78-decode.opc" | ||
1794 | +#line 382 "rl78-decode.opc" | ||
1795 | ID(branch); DR(AX); | ||
1796 | |||
1797 | /*----------------------------------------------------------------------*/ | ||
1798 | @@ -2733,7 +2735,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1799 | op[0], op[1]); | ||
1800 | } | ||
1801 | SYNTAX("brk"); | ||
1802 | -#line 388 "rl78-decode.opc" | ||
1803 | +#line 390 "rl78-decode.opc" | ||
1804 | ID(break); | ||
1805 | |||
1806 | /*----------------------------------------------------------------------*/ | ||
1807 | @@ -2750,7 +2752,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1808 | op[0], op[1]); | ||
1809 | } | ||
1810 | SYNTAX("pop %s0"); | ||
1811 | -#line 989 "rl78-decode.opc" | ||
1812 | +#line 991 "rl78-decode.opc" | ||
1813 | ID(mov); W(); DR(PSW); SPOP(); | ||
1814 | |||
1815 | /*----------------------------------------------------------------------*/ | ||
1816 | @@ -2767,7 +2769,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1817 | op[0], op[1]); | ||
1818 | } | ||
1819 | SYNTAX("movs %ea0, %1"); | ||
1820 | -#line 811 "rl78-decode.opc" | ||
1821 | +#line 813 "rl78-decode.opc" | ||
1822 | ID(mov); DM(HL, IMMU(1)); SR(X); Fzc; | ||
1823 | |||
1824 | /*----------------------------------------------------------------------*/ | ||
1825 | @@ -2780,7 +2782,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1826 | case 0xff: | ||
1827 | { | ||
1828 | /** 0110 0001 11rb 1111 sel rb%1 */ | ||
1829 | -#line 1041 "rl78-decode.opc" | ||
1830 | +#line 1043 "rl78-decode.opc" | ||
1831 | int rb AU = (op[1] >> 4) & 0x03; | ||
1832 | if (trace) | ||
1833 | { | ||
1834 | @@ -2790,7 +2792,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1835 | printf (" rb = 0x%x\n", rb); | ||
1836 | } | ||
1837 | SYNTAX("sel rb%1"); | ||
1838 | -#line 1041 "rl78-decode.opc" | ||
1839 | +#line 1043 "rl78-decode.opc" | ||
1840 | ID(sel); SC(rb); | ||
1841 | |||
1842 | /*----------------------------------------------------------------------*/ | ||
1843 | @@ -2807,7 +2809,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1844 | op[0], op[1]); | ||
1845 | } | ||
1846 | SYNTAX("and %0, %e1"); | ||
1847 | -#line 291 "rl78-decode.opc" | ||
1848 | +#line 293 "rl78-decode.opc" | ||
1849 | ID(and); DR(A); SM2(HL, B, 0); Fz; | ||
1850 | |||
1851 | } | ||
1852 | @@ -2822,7 +2824,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1853 | op[0], op[1]); | ||
1854 | } | ||
1855 | SYNTAX("and %0, %e1"); | ||
1856 | -#line 297 "rl78-decode.opc" | ||
1857 | +#line 299 "rl78-decode.opc" | ||
1858 | ID(and); DR(A); SM2(HL, C, 0); Fz; | ||
1859 | |||
1860 | } | ||
1861 | @@ -2837,7 +2839,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1862 | op[0], op[1]); | ||
1863 | } | ||
1864 | SYNTAX("bnh $%a0"); | ||
1865 | -#line 343 "rl78-decode.opc" | ||
1866 | +#line 345 "rl78-decode.opc" | ||
1867 | ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(NH); | ||
1868 | |||
1869 | } | ||
1870 | @@ -2852,7 +2854,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1871 | op[0], op[1]); | ||
1872 | } | ||
1873 | SYNTAX("sk%c1"); | ||
1874 | -#line 1100 "rl78-decode.opc" | ||
1875 | +#line 1102 "rl78-decode.opc" | ||
1876 | ID(skip); COND(NC); | ||
1877 | |||
1878 | } | ||
1879 | @@ -2867,7 +2869,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1880 | op[0], op[1]); | ||
1881 | } | ||
1882 | SYNTAX("mov %e0, %1"); | ||
1883 | -#line 627 "rl78-decode.opc" | ||
1884 | +#line 629 "rl78-decode.opc" | ||
1885 | ID(mov); DM2(HL, B, 0); SR(A); | ||
1886 | |||
1887 | } | ||
1888 | @@ -2882,7 +2884,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1889 | op[0], op[1]); | ||
1890 | } | ||
1891 | SYNTAX("ror %0, %1"); | ||
1892 | -#line 1022 "rl78-decode.opc" | ||
1893 | +#line 1024 "rl78-decode.opc" | ||
1894 | ID(ror); DR(A); SC(1); | ||
1895 | |||
1896 | } | ||
1897 | @@ -2897,7 +2899,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1898 | op[0], op[1]); | ||
1899 | } | ||
1900 | SYNTAX("rolc %0, %1"); | ||
1901 | -#line 1016 "rl78-decode.opc" | ||
1902 | +#line 1018 "rl78-decode.opc" | ||
1903 | ID(rolc); DR(A); SC(1); | ||
1904 | |||
1905 | } | ||
1906 | @@ -2912,7 +2914,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1907 | op[0], op[1]); | ||
1908 | } | ||
1909 | SYNTAX("push %s1"); | ||
1910 | -#line 997 "rl78-decode.opc" | ||
1911 | +#line 999 "rl78-decode.opc" | ||
1912 | ID(mov); W(); DPUSH(); SR(PSW); | ||
1913 | |||
1914 | /*----------------------------------------------------------------------*/ | ||
1915 | @@ -2929,7 +2931,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1916 | op[0], op[1]); | ||
1917 | } | ||
1918 | SYNTAX("cmps %0, %ea1"); | ||
1919 | -#line 526 "rl78-decode.opc" | ||
1920 | +#line 528 "rl78-decode.opc" | ||
1921 | ID(cmp); DR(X); SM(HL, IMMU(1)); Fzac; | ||
1922 | |||
1923 | /*----------------------------------------------------------------------*/ | ||
1924 | @@ -2946,7 +2948,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1925 | op[0], op[1]); | ||
1926 | } | ||
1927 | SYNTAX("or %0, %e1"); | ||
1928 | -#line 946 "rl78-decode.opc" | ||
1929 | +#line 948 "rl78-decode.opc" | ||
1930 | ID(or); DR(A); SM2(HL, B, 0); Fz; | ||
1931 | |||
1932 | } | ||
1933 | @@ -2961,7 +2963,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1934 | op[0], op[1]); | ||
1935 | } | ||
1936 | SYNTAX("or %0, %e1"); | ||
1937 | -#line 952 "rl78-decode.opc" | ||
1938 | +#line 954 "rl78-decode.opc" | ||
1939 | ID(or); DR(A); SM2(HL, C, 0); Fz; | ||
1940 | |||
1941 | } | ||
1942 | @@ -2976,7 +2978,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1943 | op[0], op[1]); | ||
1944 | } | ||
1945 | SYNTAX("sk%c1"); | ||
1946 | -#line 1097 "rl78-decode.opc" | ||
1947 | +#line 1099 "rl78-decode.opc" | ||
1948 | ID(skip); COND(H); | ||
1949 | |||
1950 | } | ||
1951 | @@ -2991,7 +2993,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1952 | op[0], op[1]); | ||
1953 | } | ||
1954 | SYNTAX("sk%c1"); | ||
1955 | -#line 1109 "rl78-decode.opc" | ||
1956 | +#line 1111 "rl78-decode.opc" | ||
1957 | ID(skip); COND(Z); | ||
1958 | |||
1959 | /*----------------------------------------------------------------------*/ | ||
1960 | @@ -3008,7 +3010,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1961 | op[0], op[1]); | ||
1962 | } | ||
1963 | SYNTAX("mov %0, %e1"); | ||
1964 | -#line 663 "rl78-decode.opc" | ||
1965 | +#line 665 "rl78-decode.opc" | ||
1966 | ID(mov); DR(A); SM2(HL, C, 0); | ||
1967 | |||
1968 | } | ||
1969 | @@ -3023,7 +3025,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1970 | op[0], op[1]); | ||
1971 | } | ||
1972 | SYNTAX("rol %0, %1"); | ||
1973 | -#line 1013 "rl78-decode.opc" | ||
1974 | +#line 1015 "rl78-decode.opc" | ||
1975 | ID(rol); DR(A); SC(1); | ||
1976 | |||
1977 | } | ||
1978 | @@ -3038,7 +3040,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1979 | op[0], op[1]); | ||
1980 | } | ||
1981 | SYNTAX("retb"); | ||
1982 | -#line 1008 "rl78-decode.opc" | ||
1983 | +#line 1010 "rl78-decode.opc" | ||
1984 | ID(reti); | ||
1985 | |||
1986 | /*----------------------------------------------------------------------*/ | ||
1987 | @@ -3055,7 +3057,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1988 | op[0], op[1]); | ||
1989 | } | ||
1990 | SYNTAX("halt"); | ||
1991 | -#line 576 "rl78-decode.opc" | ||
1992 | +#line 578 "rl78-decode.opc" | ||
1993 | ID(halt); | ||
1994 | |||
1995 | /*----------------------------------------------------------------------*/ | ||
1996 | @@ -3066,7 +3068,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
1997 | case 0xfe: | ||
1998 | { | ||
1999 | /** 0110 0001 111r 1110 rolwc %0, %1 */ | ||
2000 | -#line 1019 "rl78-decode.opc" | ||
2001 | +#line 1021 "rl78-decode.opc" | ||
2002 | int r AU = (op[1] >> 4) & 0x01; | ||
2003 | if (trace) | ||
2004 | { | ||
2005 | @@ -3076,7 +3078,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2006 | printf (" r = 0x%x\n", r); | ||
2007 | } | ||
2008 | SYNTAX("rolwc %0, %1"); | ||
2009 | -#line 1019 "rl78-decode.opc" | ||
2010 | +#line 1021 "rl78-decode.opc" | ||
2011 | ID(rolc); W(); DRW(r); SC(1); | ||
2012 | |||
2013 | } | ||
2014 | @@ -3091,7 +3093,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2015 | op[0], op[1]); | ||
2016 | } | ||
2017 | SYNTAX("xor %0, %e1"); | ||
2018 | -#line 1250 "rl78-decode.opc" | ||
2019 | +#line 1252 "rl78-decode.opc" | ||
2020 | ID(xor); DR(A); SM2(HL, B, 0); Fz; | ||
2021 | |||
2022 | } | ||
2023 | @@ -3106,7 +3108,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2024 | op[0], op[1]); | ||
2025 | } | ||
2026 | SYNTAX("xor %0, %e1"); | ||
2027 | -#line 1256 "rl78-decode.opc" | ||
2028 | +#line 1258 "rl78-decode.opc" | ||
2029 | ID(xor); DR(A); SM2(HL, C, 0); Fz; | ||
2030 | |||
2031 | } | ||
2032 | @@ -3121,7 +3123,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2033 | op[0], op[1]); | ||
2034 | } | ||
2035 | SYNTAX("sk%c1"); | ||
2036 | -#line 1103 "rl78-decode.opc" | ||
2037 | +#line 1105 "rl78-decode.opc" | ||
2038 | ID(skip); COND(NH); | ||
2039 | |||
2040 | } | ||
2041 | @@ -3136,7 +3138,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2042 | op[0], op[1]); | ||
2043 | } | ||
2044 | SYNTAX("sk%c1"); | ||
2045 | -#line 1106 "rl78-decode.opc" | ||
2046 | +#line 1108 "rl78-decode.opc" | ||
2047 | ID(skip); COND(NZ); | ||
2048 | |||
2049 | } | ||
2050 | @@ -3151,7 +3153,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2051 | op[0], op[1]); | ||
2052 | } | ||
2053 | SYNTAX("mov %e0, %1"); | ||
2054 | -#line 636 "rl78-decode.opc" | ||
2055 | +#line 638 "rl78-decode.opc" | ||
2056 | ID(mov); DM2(HL, C, 0); SR(A); | ||
2057 | |||
2058 | } | ||
2059 | @@ -3166,7 +3168,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2060 | op[0], op[1]); | ||
2061 | } | ||
2062 | SYNTAX("rorc %0, %1"); | ||
2063 | -#line 1025 "rl78-decode.opc" | ||
2064 | +#line 1027 "rl78-decode.opc" | ||
2065 | ID(rorc); DR(A); SC(1); | ||
2066 | |||
2067 | /*----------------------------------------------------------------------*/ | ||
2068 | @@ -3186,7 +3188,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2069 | op[0], op[1]); | ||
2070 | } | ||
2071 | SYNTAX("reti"); | ||
2072 | -#line 1005 "rl78-decode.opc" | ||
2073 | +#line 1007 "rl78-decode.opc" | ||
2074 | ID(reti); | ||
2075 | |||
2076 | } | ||
2077 | @@ -3201,7 +3203,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2078 | op[0], op[1]); | ||
2079 | } | ||
2080 | SYNTAX("stop"); | ||
2081 | -#line 1114 "rl78-decode.opc" | ||
2082 | +#line 1116 "rl78-decode.opc" | ||
2083 | ID(stop); | ||
2084 | |||
2085 | /*----------------------------------------------------------------------*/ | ||
2086 | @@ -3221,7 +3223,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2087 | op[0]); | ||
2088 | } | ||
2089 | SYNTAX("movw %e0, %1"); | ||
2090 | -#line 874 "rl78-decode.opc" | ||
2091 | +#line 876 "rl78-decode.opc" | ||
2092 | ID(mov); W(); DM(C, IMMU(2)); SR(AX); | ||
2093 | |||
2094 | } | ||
2095 | @@ -3236,7 +3238,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2096 | op[0]); | ||
2097 | } | ||
2098 | SYNTAX("movw %0, %e1"); | ||
2099 | -#line 865 "rl78-decode.opc" | ||
2100 | +#line 867 "rl78-decode.opc" | ||
2101 | ID(mov); W(); DR(AX); SM(C, IMMU(2)); | ||
2102 | |||
2103 | } | ||
2104 | @@ -3251,7 +3253,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2105 | op[0]); | ||
2106 | } | ||
2107 | SYNTAX("or %0, #%1"); | ||
2108 | -#line 967 "rl78-decode.opc" | ||
2109 | +#line 969 "rl78-decode.opc" | ||
2110 | ID(or); DM(None, SADDR); SC(IMMU(1)); Fz; | ||
2111 | |||
2112 | /*----------------------------------------------------------------------*/ | ||
2113 | @@ -3268,7 +3270,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2114 | op[0]); | ||
2115 | } | ||
2116 | SYNTAX("or %0, %1"); | ||
2117 | -#line 964 "rl78-decode.opc" | ||
2118 | +#line 966 "rl78-decode.opc" | ||
2119 | ID(or); DR(A); SM(None, SADDR); Fz; | ||
2120 | |||
2121 | } | ||
2122 | @@ -3283,7 +3285,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2123 | op[0]); | ||
2124 | } | ||
2125 | SYNTAX("or %0, #%1"); | ||
2126 | -#line 955 "rl78-decode.opc" | ||
2127 | +#line 957 "rl78-decode.opc" | ||
2128 | ID(or); DR(A); SC(IMMU(1)); Fz; | ||
2129 | |||
2130 | } | ||
2131 | @@ -3298,7 +3300,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2132 | op[0]); | ||
2133 | } | ||
2134 | SYNTAX("or %0, %e1"); | ||
2135 | -#line 943 "rl78-decode.opc" | ||
2136 | +#line 945 "rl78-decode.opc" | ||
2137 | ID(or); DR(A); SM(HL, 0); Fz; | ||
2138 | |||
2139 | } | ||
2140 | @@ -3313,7 +3315,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2141 | op[0]); | ||
2142 | } | ||
2143 | SYNTAX("or %0, %ea1"); | ||
2144 | -#line 949 "rl78-decode.opc" | ||
2145 | +#line 951 "rl78-decode.opc" | ||
2146 | ID(or); DR(A); SM(HL, IMMU(1)); Fz; | ||
2147 | |||
2148 | } | ||
2149 | @@ -3328,7 +3330,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2150 | op[0]); | ||
2151 | } | ||
2152 | SYNTAX("or %0, %e!1"); | ||
2153 | -#line 940 "rl78-decode.opc" | ||
2154 | +#line 942 "rl78-decode.opc" | ||
2155 | ID(or); DR(A); SM(None, IMMU(2)); Fz; | ||
2156 | |||
2157 | } | ||
2158 | @@ -3342,7 +3344,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2159 | case 0x77: | ||
2160 | { | ||
2161 | /** 0111 0rba mov %0, %1 */ | ||
2162 | -#line 696 "rl78-decode.opc" | ||
2163 | +#line 698 "rl78-decode.opc" | ||
2164 | int rba AU = op[0] & 0x07; | ||
2165 | if (trace) | ||
2166 | { | ||
2167 | @@ -3352,7 +3354,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2168 | printf (" rba = 0x%x\n", rba); | ||
2169 | } | ||
2170 | SYNTAX("mov %0, %1"); | ||
2171 | -#line 696 "rl78-decode.opc" | ||
2172 | +#line 698 "rl78-decode.opc" | ||
2173 | ID(mov); DRB(rba); SR(A); | ||
2174 | |||
2175 | } | ||
2176 | @@ -3371,7 +3373,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2177 | case 0x70: | ||
2178 | { | ||
2179 | /** 0111 0001 0bit 0000 set1 %e!0 */ | ||
2180 | -#line 1046 "rl78-decode.opc" | ||
2181 | +#line 1048 "rl78-decode.opc" | ||
2182 | int bit AU = (op[1] >> 4) & 0x07; | ||
2183 | if (trace) | ||
2184 | { | ||
2185 | @@ -3381,7 +3383,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2186 | printf (" bit = 0x%x\n", bit); | ||
2187 | } | ||
2188 | SYNTAX("set1 %e!0"); | ||
2189 | -#line 1046 "rl78-decode.opc" | ||
2190 | +#line 1048 "rl78-decode.opc" | ||
2191 | ID(mov); DM(None, IMMU(2)); DB(bit); SC(1); | ||
2192 | |||
2193 | } | ||
2194 | @@ -3396,7 +3398,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2195 | case 0x71: | ||
2196 | { | ||
2197 | /** 0111 0001 0bit 0001 mov1 %0, cy */ | ||
2198 | -#line 803 "rl78-decode.opc" | ||
2199 | +#line 805 "rl78-decode.opc" | ||
2200 | int bit AU = (op[1] >> 4) & 0x07; | ||
2201 | if (trace) | ||
2202 | { | ||
2203 | @@ -3406,7 +3408,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2204 | printf (" bit = 0x%x\n", bit); | ||
2205 | } | ||
2206 | SYNTAX("mov1 %0, cy"); | ||
2207 | -#line 803 "rl78-decode.opc" | ||
2208 | +#line 805 "rl78-decode.opc" | ||
2209 | ID(mov); DM(None, SADDR); DB(bit); SCY(); | ||
2210 | |||
2211 | } | ||
2212 | @@ -3421,7 +3423,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2213 | case 0x72: | ||
2214 | { | ||
2215 | /** 0111 0001 0bit 0010 set1 %0 */ | ||
2216 | -#line 1064 "rl78-decode.opc" | ||
2217 | +#line 1066 "rl78-decode.opc" | ||
2218 | int bit AU = (op[1] >> 4) & 0x07; | ||
2219 | if (trace) | ||
2220 | { | ||
2221 | @@ -3431,7 +3433,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2222 | printf (" bit = 0x%x\n", bit); | ||
2223 | } | ||
2224 | SYNTAX("set1 %0"); | ||
2225 | -#line 1064 "rl78-decode.opc" | ||
2226 | +#line 1066 "rl78-decode.opc" | ||
2227 | ID(mov); DM(None, SADDR); DB(bit); SC(1); | ||
2228 | |||
2229 | /*----------------------------------------------------------------------*/ | ||
2230 | @@ -3448,7 +3450,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2231 | case 0x73: | ||
2232 | { | ||
2233 | /** 0111 0001 0bit 0011 clr1 %0 */ | ||
2234 | -#line 456 "rl78-decode.opc" | ||
2235 | +#line 458 "rl78-decode.opc" | ||
2236 | int bit AU = (op[1] >> 4) & 0x07; | ||
2237 | if (trace) | ||
2238 | { | ||
2239 | @@ -3458,7 +3460,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2240 | printf (" bit = 0x%x\n", bit); | ||
2241 | } | ||
2242 | SYNTAX("clr1 %0"); | ||
2243 | -#line 456 "rl78-decode.opc" | ||
2244 | +#line 458 "rl78-decode.opc" | ||
2245 | ID(mov); DM(None, SADDR); DB(bit); SC(0); | ||
2246 | |||
2247 | /*----------------------------------------------------------------------*/ | ||
2248 | @@ -3475,7 +3477,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2249 | case 0x74: | ||
2250 | { | ||
2251 | /** 0111 0001 0bit 0100 mov1 cy, %1 */ | ||
2252 | -#line 797 "rl78-decode.opc" | ||
2253 | +#line 799 "rl78-decode.opc" | ||
2254 | int bit AU = (op[1] >> 4) & 0x07; | ||
2255 | if (trace) | ||
2256 | { | ||
2257 | @@ -3485,7 +3487,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2258 | printf (" bit = 0x%x\n", bit); | ||
2259 | } | ||
2260 | SYNTAX("mov1 cy, %1"); | ||
2261 | -#line 797 "rl78-decode.opc" | ||
2262 | +#line 799 "rl78-decode.opc" | ||
2263 | ID(mov); DCY(); SM(None, SADDR); SB(bit); | ||
2264 | |||
2265 | } | ||
2266 | @@ -3500,7 +3502,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2267 | case 0x75: | ||
2268 | { | ||
2269 | /** 0111 0001 0bit 0101 and1 cy, %s1 */ | ||
2270 | -#line 326 "rl78-decode.opc" | ||
2271 | +#line 328 "rl78-decode.opc" | ||
2272 | int bit AU = (op[1] >> 4) & 0x07; | ||
2273 | if (trace) | ||
2274 | { | ||
2275 | @@ -3510,7 +3512,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2276 | printf (" bit = 0x%x\n", bit); | ||
2277 | } | ||
2278 | SYNTAX("and1 cy, %s1"); | ||
2279 | -#line 326 "rl78-decode.opc" | ||
2280 | +#line 328 "rl78-decode.opc" | ||
2281 | ID(and); DCY(); SM(None, SADDR); SB(bit); | ||
2282 | |||
2283 | /*----------------------------------------------------------------------*/ | ||
2284 | @@ -3530,7 +3532,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2285 | case 0x76: | ||
2286 | { | ||
2287 | /** 0111 0001 0bit 0110 or1 cy, %s1 */ | ||
2288 | -#line 981 "rl78-decode.opc" | ||
2289 | +#line 983 "rl78-decode.opc" | ||
2290 | int bit AU = (op[1] >> 4) & 0x07; | ||
2291 | if (trace) | ||
2292 | { | ||
2293 | @@ -3540,7 +3542,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2294 | printf (" bit = 0x%x\n", bit); | ||
2295 | } | ||
2296 | SYNTAX("or1 cy, %s1"); | ||
2297 | -#line 981 "rl78-decode.opc" | ||
2298 | +#line 983 "rl78-decode.opc" | ||
2299 | ID(or); DCY(); SM(None, SADDR); SB(bit); | ||
2300 | |||
2301 | /*----------------------------------------------------------------------*/ | ||
2302 | @@ -3557,7 +3559,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2303 | case 0x77: | ||
2304 | { | ||
2305 | /** 0111 0001 0bit 0111 xor1 cy, %s1 */ | ||
2306 | -#line 1285 "rl78-decode.opc" | ||
2307 | +#line 1287 "rl78-decode.opc" | ||
2308 | int bit AU = (op[1] >> 4) & 0x07; | ||
2309 | if (trace) | ||
2310 | { | ||
2311 | @@ -3567,7 +3569,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2312 | printf (" bit = 0x%x\n", bit); | ||
2313 | } | ||
2314 | SYNTAX("xor1 cy, %s1"); | ||
2315 | -#line 1285 "rl78-decode.opc" | ||
2316 | +#line 1287 "rl78-decode.opc" | ||
2317 | ID(xor); DCY(); SM(None, SADDR); SB(bit); | ||
2318 | |||
2319 | /*----------------------------------------------------------------------*/ | ||
2320 | @@ -3584,7 +3586,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2321 | case 0x78: | ||
2322 | { | ||
2323 | /** 0111 0001 0bit 1000 clr1 %e!0 */ | ||
2324 | -#line 438 "rl78-decode.opc" | ||
2325 | +#line 440 "rl78-decode.opc" | ||
2326 | int bit AU = (op[1] >> 4) & 0x07; | ||
2327 | if (trace) | ||
2328 | { | ||
2329 | @@ -3594,7 +3596,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2330 | printf (" bit = 0x%x\n", bit); | ||
2331 | } | ||
2332 | SYNTAX("clr1 %e!0"); | ||
2333 | -#line 438 "rl78-decode.opc" | ||
2334 | +#line 440 "rl78-decode.opc" | ||
2335 | ID(mov); DM(None, IMMU(2)); DB(bit); SC(0); | ||
2336 | |||
2337 | } | ||
2338 | @@ -3609,7 +3611,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2339 | case 0x79: | ||
2340 | { | ||
2341 | /** 0111 0001 0bit 1001 mov1 %s0, cy */ | ||
2342 | -#line 806 "rl78-decode.opc" | ||
2343 | +#line 808 "rl78-decode.opc" | ||
2344 | int bit AU = (op[1] >> 4) & 0x07; | ||
2345 | if (trace) | ||
2346 | { | ||
2347 | @@ -3619,7 +3621,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2348 | printf (" bit = 0x%x\n", bit); | ||
2349 | } | ||
2350 | SYNTAX("mov1 %s0, cy"); | ||
2351 | -#line 806 "rl78-decode.opc" | ||
2352 | +#line 808 "rl78-decode.opc" | ||
2353 | ID(mov); DM(None, SFR); DB(bit); SCY(); | ||
2354 | |||
2355 | /*----------------------------------------------------------------------*/ | ||
2356 | @@ -3636,7 +3638,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2357 | case 0x7a: | ||
2358 | { | ||
2359 | /** 0111 0001 0bit 1010 set1 %s0 */ | ||
2360 | -#line 1058 "rl78-decode.opc" | ||
2361 | +#line 1060 "rl78-decode.opc" | ||
2362 | int bit AU = (op[1] >> 4) & 0x07; | ||
2363 | if (trace) | ||
2364 | { | ||
2365 | @@ -3646,7 +3648,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2366 | printf (" bit = 0x%x\n", bit); | ||
2367 | } | ||
2368 | SYNTAX("set1 %s0"); | ||
2369 | -#line 1058 "rl78-decode.opc" | ||
2370 | +#line 1060 "rl78-decode.opc" | ||
2371 | op0 = SFR; | ||
2372 | ID(mov); DM(None, op0); DB(bit); SC(1); | ||
2373 | if (op0 == RL78_SFR_PSW && bit == 7) | ||
2374 | @@ -3664,7 +3666,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2375 | case 0x7b: | ||
2376 | { | ||
2377 | /** 0111 0001 0bit 1011 clr1 %s0 */ | ||
2378 | -#line 450 "rl78-decode.opc" | ||
2379 | +#line 452 "rl78-decode.opc" | ||
2380 | int bit AU = (op[1] >> 4) & 0x07; | ||
2381 | if (trace) | ||
2382 | { | ||
2383 | @@ -3674,7 +3676,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2384 | printf (" bit = 0x%x\n", bit); | ||
2385 | } | ||
2386 | SYNTAX("clr1 %s0"); | ||
2387 | -#line 450 "rl78-decode.opc" | ||
2388 | +#line 452 "rl78-decode.opc" | ||
2389 | op0 = SFR; | ||
2390 | ID(mov); DM(None, op0); DB(bit); SC(0); | ||
2391 | if (op0 == RL78_SFR_PSW && bit == 7) | ||
2392 | @@ -3692,7 +3694,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2393 | case 0x7c: | ||
2394 | { | ||
2395 | /** 0111 0001 0bit 1100 mov1 cy, %s1 */ | ||
2396 | -#line 800 "rl78-decode.opc" | ||
2397 | +#line 802 "rl78-decode.opc" | ||
2398 | int bit AU = (op[1] >> 4) & 0x07; | ||
2399 | if (trace) | ||
2400 | { | ||
2401 | @@ -3702,7 +3704,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2402 | printf (" bit = 0x%x\n", bit); | ||
2403 | } | ||
2404 | SYNTAX("mov1 cy, %s1"); | ||
2405 | -#line 800 "rl78-decode.opc" | ||
2406 | +#line 802 "rl78-decode.opc" | ||
2407 | ID(mov); DCY(); SM(None, SFR); SB(bit); | ||
2408 | |||
2409 | } | ||
2410 | @@ -3717,7 +3719,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2411 | case 0x7d: | ||
2412 | { | ||
2413 | /** 0111 0001 0bit 1101 and1 cy, %s1 */ | ||
2414 | -#line 323 "rl78-decode.opc" | ||
2415 | +#line 325 "rl78-decode.opc" | ||
2416 | int bit AU = (op[1] >> 4) & 0x07; | ||
2417 | if (trace) | ||
2418 | { | ||
2419 | @@ -3727,7 +3729,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2420 | printf (" bit = 0x%x\n", bit); | ||
2421 | } | ||
2422 | SYNTAX("and1 cy, %s1"); | ||
2423 | -#line 323 "rl78-decode.opc" | ||
2424 | +#line 325 "rl78-decode.opc" | ||
2425 | ID(and); DCY(); SM(None, SFR); SB(bit); | ||
2426 | |||
2427 | } | ||
2428 | @@ -3742,7 +3744,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2429 | case 0x7e: | ||
2430 | { | ||
2431 | /** 0111 0001 0bit 1110 or1 cy, %s1 */ | ||
2432 | -#line 978 "rl78-decode.opc" | ||
2433 | +#line 980 "rl78-decode.opc" | ||
2434 | int bit AU = (op[1] >> 4) & 0x07; | ||
2435 | if (trace) | ||
2436 | { | ||
2437 | @@ -3752,7 +3754,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2438 | printf (" bit = 0x%x\n", bit); | ||
2439 | } | ||
2440 | SYNTAX("or1 cy, %s1"); | ||
2441 | -#line 978 "rl78-decode.opc" | ||
2442 | +#line 980 "rl78-decode.opc" | ||
2443 | ID(or); DCY(); SM(None, SFR); SB(bit); | ||
2444 | |||
2445 | } | ||
2446 | @@ -3767,7 +3769,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2447 | case 0x7f: | ||
2448 | { | ||
2449 | /** 0111 0001 0bit 1111 xor1 cy, %s1 */ | ||
2450 | -#line 1282 "rl78-decode.opc" | ||
2451 | +#line 1284 "rl78-decode.opc" | ||
2452 | int bit AU = (op[1] >> 4) & 0x07; | ||
2453 | if (trace) | ||
2454 | { | ||
2455 | @@ -3777,7 +3779,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2456 | printf (" bit = 0x%x\n", bit); | ||
2457 | } | ||
2458 | SYNTAX("xor1 cy, %s1"); | ||
2459 | -#line 1282 "rl78-decode.opc" | ||
2460 | +#line 1284 "rl78-decode.opc" | ||
2461 | ID(xor); DCY(); SM(None, SFR); SB(bit); | ||
2462 | |||
2463 | } | ||
2464 | @@ -3792,7 +3794,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2465 | op[0], op[1]); | ||
2466 | } | ||
2467 | SYNTAX("set1 cy"); | ||
2468 | -#line 1055 "rl78-decode.opc" | ||
2469 | +#line 1057 "rl78-decode.opc" | ||
2470 | ID(mov); DCY(); SC(1); | ||
2471 | |||
2472 | } | ||
2473 | @@ -3807,7 +3809,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2474 | case 0xf1: | ||
2475 | { | ||
2476 | /** 0111 0001 1bit 0001 mov1 %e0, cy */ | ||
2477 | -#line 785 "rl78-decode.opc" | ||
2478 | +#line 787 "rl78-decode.opc" | ||
2479 | int bit AU = (op[1] >> 4) & 0x07; | ||
2480 | if (trace) | ||
2481 | { | ||
2482 | @@ -3817,7 +3819,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2483 | printf (" bit = 0x%x\n", bit); | ||
2484 | } | ||
2485 | SYNTAX("mov1 %e0, cy"); | ||
2486 | -#line 785 "rl78-decode.opc" | ||
2487 | +#line 787 "rl78-decode.opc" | ||
2488 | ID(mov); DM(HL, 0); DB(bit); SCY(); | ||
2489 | |||
2490 | } | ||
2491 | @@ -3832,7 +3834,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2492 | case 0xf2: | ||
2493 | { | ||
2494 | /** 0111 0001 1bit 0010 set1 %e0 */ | ||
2495 | -#line 1049 "rl78-decode.opc" | ||
2496 | +#line 1051 "rl78-decode.opc" | ||
2497 | int bit AU = (op[1] >> 4) & 0x07; | ||
2498 | if (trace) | ||
2499 | { | ||
2500 | @@ -3842,7 +3844,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2501 | printf (" bit = 0x%x\n", bit); | ||
2502 | } | ||
2503 | SYNTAX("set1 %e0"); | ||
2504 | -#line 1049 "rl78-decode.opc" | ||
2505 | +#line 1051 "rl78-decode.opc" | ||
2506 | ID(mov); DM(HL, 0); DB(bit); SC(1); | ||
2507 | |||
2508 | } | ||
2509 | @@ -3857,7 +3859,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2510 | case 0xf3: | ||
2511 | { | ||
2512 | /** 0111 0001 1bit 0011 clr1 %e0 */ | ||
2513 | -#line 441 "rl78-decode.opc" | ||
2514 | +#line 443 "rl78-decode.opc" | ||
2515 | int bit AU = (op[1] >> 4) & 0x07; | ||
2516 | if (trace) | ||
2517 | { | ||
2518 | @@ -3867,7 +3869,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2519 | printf (" bit = 0x%x\n", bit); | ||
2520 | } | ||
2521 | SYNTAX("clr1 %e0"); | ||
2522 | -#line 441 "rl78-decode.opc" | ||
2523 | +#line 443 "rl78-decode.opc" | ||
2524 | ID(mov); DM(HL, 0); DB(bit); SC(0); | ||
2525 | |||
2526 | } | ||
2527 | @@ -3882,7 +3884,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2528 | case 0xf4: | ||
2529 | { | ||
2530 | /** 0111 0001 1bit 0100 mov1 cy, %e1 */ | ||
2531 | -#line 791 "rl78-decode.opc" | ||
2532 | +#line 793 "rl78-decode.opc" | ||
2533 | int bit AU = (op[1] >> 4) & 0x07; | ||
2534 | if (trace) | ||
2535 | { | ||
2536 | @@ -3892,7 +3894,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2537 | printf (" bit = 0x%x\n", bit); | ||
2538 | } | ||
2539 | SYNTAX("mov1 cy, %e1"); | ||
2540 | -#line 791 "rl78-decode.opc" | ||
2541 | +#line 793 "rl78-decode.opc" | ||
2542 | ID(mov); DCY(); SM(HL, 0); SB(bit); | ||
2543 | |||
2544 | } | ||
2545 | @@ -3907,7 +3909,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2546 | case 0xf5: | ||
2547 | { | ||
2548 | /** 0111 0001 1bit 0101 and1 cy, %e1 */ | ||
2549 | -#line 317 "rl78-decode.opc" | ||
2550 | +#line 319 "rl78-decode.opc" | ||
2551 | int bit AU = (op[1] >> 4) & 0x07; | ||
2552 | if (trace) | ||
2553 | { | ||
2554 | @@ -3917,7 +3919,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2555 | printf (" bit = 0x%x\n", bit); | ||
2556 | } | ||
2557 | SYNTAX("and1 cy, %e1"); | ||
2558 | -#line 317 "rl78-decode.opc" | ||
2559 | +#line 319 "rl78-decode.opc" | ||
2560 | ID(and); DCY(); SM(HL, 0); SB(bit); | ||
2561 | |||
2562 | } | ||
2563 | @@ -3932,7 +3934,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2564 | case 0xf6: | ||
2565 | { | ||
2566 | /** 0111 0001 1bit 0110 or1 cy, %e1 */ | ||
2567 | -#line 972 "rl78-decode.opc" | ||
2568 | +#line 974 "rl78-decode.opc" | ||
2569 | int bit AU = (op[1] >> 4) & 0x07; | ||
2570 | if (trace) | ||
2571 | { | ||
2572 | @@ -3942,7 +3944,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2573 | printf (" bit = 0x%x\n", bit); | ||
2574 | } | ||
2575 | SYNTAX("or1 cy, %e1"); | ||
2576 | -#line 972 "rl78-decode.opc" | ||
2577 | +#line 974 "rl78-decode.opc" | ||
2578 | ID(or); DCY(); SM(HL, 0); SB(bit); | ||
2579 | |||
2580 | } | ||
2581 | @@ -3957,7 +3959,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2582 | case 0xf7: | ||
2583 | { | ||
2584 | /** 0111 0001 1bit 0111 xor1 cy, %e1 */ | ||
2585 | -#line 1276 "rl78-decode.opc" | ||
2586 | +#line 1278 "rl78-decode.opc" | ||
2587 | int bit AU = (op[1] >> 4) & 0x07; | ||
2588 | if (trace) | ||
2589 | { | ||
2590 | @@ -3967,7 +3969,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2591 | printf (" bit = 0x%x\n", bit); | ||
2592 | } | ||
2593 | SYNTAX("xor1 cy, %e1"); | ||
2594 | -#line 1276 "rl78-decode.opc" | ||
2595 | +#line 1278 "rl78-decode.opc" | ||
2596 | ID(xor); DCY(); SM(HL, 0); SB(bit); | ||
2597 | |||
2598 | } | ||
2599 | @@ -3982,7 +3984,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2600 | op[0], op[1]); | ||
2601 | } | ||
2602 | SYNTAX("clr1 cy"); | ||
2603 | -#line 447 "rl78-decode.opc" | ||
2604 | +#line 449 "rl78-decode.opc" | ||
2605 | ID(mov); DCY(); SC(0); | ||
2606 | |||
2607 | } | ||
2608 | @@ -3997,7 +3999,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2609 | case 0xf9: | ||
2610 | { | ||
2611 | /** 0111 0001 1bit 1001 mov1 %e0, cy */ | ||
2612 | -#line 788 "rl78-decode.opc" | ||
2613 | +#line 790 "rl78-decode.opc" | ||
2614 | int bit AU = (op[1] >> 4) & 0x07; | ||
2615 | if (trace) | ||
2616 | { | ||
2617 | @@ -4007,7 +4009,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2618 | printf (" bit = 0x%x\n", bit); | ||
2619 | } | ||
2620 | SYNTAX("mov1 %e0, cy"); | ||
2621 | -#line 788 "rl78-decode.opc" | ||
2622 | +#line 790 "rl78-decode.opc" | ||
2623 | ID(mov); DR(A); DB(bit); SCY(); | ||
2624 | |||
2625 | } | ||
2626 | @@ -4022,7 +4024,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2627 | case 0xfa: | ||
2628 | { | ||
2629 | /** 0111 0001 1bit 1010 set1 %0 */ | ||
2630 | -#line 1052 "rl78-decode.opc" | ||
2631 | +#line 1054 "rl78-decode.opc" | ||
2632 | int bit AU = (op[1] >> 4) & 0x07; | ||
2633 | if (trace) | ||
2634 | { | ||
2635 | @@ -4032,7 +4034,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2636 | printf (" bit = 0x%x\n", bit); | ||
2637 | } | ||
2638 | SYNTAX("set1 %0"); | ||
2639 | -#line 1052 "rl78-decode.opc" | ||
2640 | +#line 1054 "rl78-decode.opc" | ||
2641 | ID(mov); DR(A); DB(bit); SC(1); | ||
2642 | |||
2643 | } | ||
2644 | @@ -4047,7 +4049,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2645 | case 0xfb: | ||
2646 | { | ||
2647 | /** 0111 0001 1bit 1011 clr1 %0 */ | ||
2648 | -#line 444 "rl78-decode.opc" | ||
2649 | +#line 446 "rl78-decode.opc" | ||
2650 | int bit AU = (op[1] >> 4) & 0x07; | ||
2651 | if (trace) | ||
2652 | { | ||
2653 | @@ -4057,7 +4059,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2654 | printf (" bit = 0x%x\n", bit); | ||
2655 | } | ||
2656 | SYNTAX("clr1 %0"); | ||
2657 | -#line 444 "rl78-decode.opc" | ||
2658 | +#line 446 "rl78-decode.opc" | ||
2659 | ID(mov); DR(A); DB(bit); SC(0); | ||
2660 | |||
2661 | } | ||
2662 | @@ -4072,7 +4074,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2663 | case 0xfc: | ||
2664 | { | ||
2665 | /** 0111 0001 1bit 1100 mov1 cy, %e1 */ | ||
2666 | -#line 794 "rl78-decode.opc" | ||
2667 | +#line 796 "rl78-decode.opc" | ||
2668 | int bit AU = (op[1] >> 4) & 0x07; | ||
2669 | if (trace) | ||
2670 | { | ||
2671 | @@ -4082,7 +4084,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2672 | printf (" bit = 0x%x\n", bit); | ||
2673 | } | ||
2674 | SYNTAX("mov1 cy, %e1"); | ||
2675 | -#line 794 "rl78-decode.opc" | ||
2676 | +#line 796 "rl78-decode.opc" | ||
2677 | ID(mov); DCY(); SR(A); SB(bit); | ||
2678 | |||
2679 | } | ||
2680 | @@ -4097,7 +4099,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2681 | case 0xfd: | ||
2682 | { | ||
2683 | /** 0111 0001 1bit 1101 and1 cy, %1 */ | ||
2684 | -#line 320 "rl78-decode.opc" | ||
2685 | +#line 322 "rl78-decode.opc" | ||
2686 | int bit AU = (op[1] >> 4) & 0x07; | ||
2687 | if (trace) | ||
2688 | { | ||
2689 | @@ -4107,7 +4109,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2690 | printf (" bit = 0x%x\n", bit); | ||
2691 | } | ||
2692 | SYNTAX("and1 cy, %1"); | ||
2693 | -#line 320 "rl78-decode.opc" | ||
2694 | +#line 322 "rl78-decode.opc" | ||
2695 | ID(and); DCY(); SR(A); SB(bit); | ||
2696 | |||
2697 | } | ||
2698 | @@ -4122,7 +4124,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2699 | case 0xfe: | ||
2700 | { | ||
2701 | /** 0111 0001 1bit 1110 or1 cy, %1 */ | ||
2702 | -#line 975 "rl78-decode.opc" | ||
2703 | +#line 977 "rl78-decode.opc" | ||
2704 | int bit AU = (op[1] >> 4) & 0x07; | ||
2705 | if (trace) | ||
2706 | { | ||
2707 | @@ -4132,7 +4134,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2708 | printf (" bit = 0x%x\n", bit); | ||
2709 | } | ||
2710 | SYNTAX("or1 cy, %1"); | ||
2711 | -#line 975 "rl78-decode.opc" | ||
2712 | +#line 977 "rl78-decode.opc" | ||
2713 | ID(or); DCY(); SR(A); SB(bit); | ||
2714 | |||
2715 | } | ||
2716 | @@ -4147,7 +4149,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2717 | case 0xff: | ||
2718 | { | ||
2719 | /** 0111 0001 1bit 1111 xor1 cy, %1 */ | ||
2720 | -#line 1279 "rl78-decode.opc" | ||
2721 | +#line 1281 "rl78-decode.opc" | ||
2722 | int bit AU = (op[1] >> 4) & 0x07; | ||
2723 | if (trace) | ||
2724 | { | ||
2725 | @@ -4157,7 +4159,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2726 | printf (" bit = 0x%x\n", bit); | ||
2727 | } | ||
2728 | SYNTAX("xor1 cy, %1"); | ||
2729 | -#line 1279 "rl78-decode.opc" | ||
2730 | +#line 1281 "rl78-decode.opc" | ||
2731 | ID(xor); DCY(); SR(A); SB(bit); | ||
2732 | |||
2733 | } | ||
2734 | @@ -4172,7 +4174,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2735 | op[0], op[1]); | ||
2736 | } | ||
2737 | SYNTAX("not1 cy"); | ||
2738 | -#line 916 "rl78-decode.opc" | ||
2739 | +#line 918 "rl78-decode.opc" | ||
2740 | ID(xor); DCY(); SC(1); | ||
2741 | |||
2742 | /*----------------------------------------------------------------------*/ | ||
2743 | @@ -4192,7 +4194,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2744 | op[0]); | ||
2745 | } | ||
2746 | SYNTAX("movw %e0, %1"); | ||
2747 | -#line 877 "rl78-decode.opc" | ||
2748 | +#line 879 "rl78-decode.opc" | ||
2749 | ID(mov); W(); DM(BC, IMMU(2)); SR(AX); | ||
2750 | |||
2751 | } | ||
2752 | @@ -4207,7 +4209,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2753 | op[0]); | ||
2754 | } | ||
2755 | SYNTAX("movw %0, %e1"); | ||
2756 | -#line 868 "rl78-decode.opc" | ||
2757 | +#line 870 "rl78-decode.opc" | ||
2758 | ID(mov); W(); DR(AX); SM(BC, IMMU(2)); | ||
2759 | |||
2760 | } | ||
2761 | @@ -4222,7 +4224,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2762 | op[0]); | ||
2763 | } | ||
2764 | SYNTAX("xor %0, #%1"); | ||
2765 | -#line 1271 "rl78-decode.opc" | ||
2766 | +#line 1273 "rl78-decode.opc" | ||
2767 | ID(xor); DM(None, SADDR); SC(IMMU(1)); Fz; | ||
2768 | |||
2769 | /*----------------------------------------------------------------------*/ | ||
2770 | @@ -4239,7 +4241,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2771 | op[0]); | ||
2772 | } | ||
2773 | SYNTAX("xor %0, %1"); | ||
2774 | -#line 1268 "rl78-decode.opc" | ||
2775 | +#line 1270 "rl78-decode.opc" | ||
2776 | ID(xor); DR(A); SM(None, SADDR); Fz; | ||
2777 | |||
2778 | } | ||
2779 | @@ -4254,7 +4256,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2780 | op[0]); | ||
2781 | } | ||
2782 | SYNTAX("xor %0, #%1"); | ||
2783 | -#line 1259 "rl78-decode.opc" | ||
2784 | +#line 1261 "rl78-decode.opc" | ||
2785 | ID(xor); DR(A); SC(IMMU(1)); Fz; | ||
2786 | |||
2787 | } | ||
2788 | @@ -4269,7 +4271,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2789 | op[0]); | ||
2790 | } | ||
2791 | SYNTAX("xor %0, %e1"); | ||
2792 | -#line 1247 "rl78-decode.opc" | ||
2793 | +#line 1249 "rl78-decode.opc" | ||
2794 | ID(xor); DR(A); SM(HL, 0); Fz; | ||
2795 | |||
2796 | } | ||
2797 | @@ -4284,7 +4286,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2798 | op[0]); | ||
2799 | } | ||
2800 | SYNTAX("xor %0, %ea1"); | ||
2801 | -#line 1253 "rl78-decode.opc" | ||
2802 | +#line 1255 "rl78-decode.opc" | ||
2803 | ID(xor); DR(A); SM(HL, IMMU(1)); Fz; | ||
2804 | |||
2805 | } | ||
2806 | @@ -4299,7 +4301,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2807 | op[0]); | ||
2808 | } | ||
2809 | SYNTAX("xor %0, %e!1"); | ||
2810 | -#line 1244 "rl78-decode.opc" | ||
2811 | +#line 1246 "rl78-decode.opc" | ||
2812 | ID(xor); DR(A); SM(None, IMMU(2)); Fz; | ||
2813 | |||
2814 | } | ||
2815 | @@ -4314,7 +4316,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2816 | case 0x87: | ||
2817 | { | ||
2818 | /** 1000 0reg inc %0 */ | ||
2819 | -#line 587 "rl78-decode.opc" | ||
2820 | +#line 589 "rl78-decode.opc" | ||
2821 | int reg AU = op[0] & 0x07; | ||
2822 | if (trace) | ||
2823 | { | ||
2824 | @@ -4324,7 +4326,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2825 | printf (" reg = 0x%x\n", reg); | ||
2826 | } | ||
2827 | SYNTAX("inc %0"); | ||
2828 | -#line 587 "rl78-decode.opc" | ||
2829 | +#line 589 "rl78-decode.opc" | ||
2830 | ID(add); DRB(reg); SC(1); Fza; | ||
2831 | |||
2832 | } | ||
2833 | @@ -4339,7 +4341,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2834 | op[0]); | ||
2835 | } | ||
2836 | SYNTAX("mov %0, %ea1"); | ||
2837 | -#line 666 "rl78-decode.opc" | ||
2838 | +#line 668 "rl78-decode.opc" | ||
2839 | ID(mov); DR(A); SM(SP, IMMU(1)); | ||
2840 | |||
2841 | } | ||
2842 | @@ -4354,7 +4356,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2843 | op[0]); | ||
2844 | } | ||
2845 | SYNTAX("mov %0, %e1"); | ||
2846 | -#line 648 "rl78-decode.opc" | ||
2847 | +#line 650 "rl78-decode.opc" | ||
2848 | ID(mov); DR(A); SM(DE, 0); | ||
2849 | |||
2850 | } | ||
2851 | @@ -4369,7 +4371,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2852 | op[0]); | ||
2853 | } | ||
2854 | SYNTAX("mov %0, %ea1"); | ||
2855 | -#line 651 "rl78-decode.opc" | ||
2856 | +#line 653 "rl78-decode.opc" | ||
2857 | ID(mov); DR(A); SM(DE, IMMU(1)); | ||
2858 | |||
2859 | } | ||
2860 | @@ -4384,7 +4386,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2861 | op[0]); | ||
2862 | } | ||
2863 | SYNTAX("mov %0, %e1"); | ||
2864 | -#line 654 "rl78-decode.opc" | ||
2865 | +#line 656 "rl78-decode.opc" | ||
2866 | ID(mov); DR(A); SM(HL, 0); | ||
2867 | |||
2868 | } | ||
2869 | @@ -4399,7 +4401,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2870 | op[0]); | ||
2871 | } | ||
2872 | SYNTAX("mov %0, %ea1"); | ||
2873 | -#line 657 "rl78-decode.opc" | ||
2874 | +#line 659 "rl78-decode.opc" | ||
2875 | ID(mov); DR(A); SM(HL, IMMU(1)); | ||
2876 | |||
2877 | } | ||
2878 | @@ -4414,7 +4416,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2879 | op[0]); | ||
2880 | } | ||
2881 | SYNTAX("mov %0, %1"); | ||
2882 | -#line 690 "rl78-decode.opc" | ||
2883 | +#line 692 "rl78-decode.opc" | ||
2884 | ID(mov); DR(A); SM(None, SADDR); | ||
2885 | |||
2886 | } | ||
2887 | @@ -4429,7 +4431,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2888 | op[0]); | ||
2889 | } | ||
2890 | SYNTAX("mov %0, %s1"); | ||
2891 | -#line 687 "rl78-decode.opc" | ||
2892 | +#line 689 "rl78-decode.opc" | ||
2893 | ID(mov); DR(A); SM(None, SFR); | ||
2894 | |||
2895 | } | ||
2896 | @@ -4444,7 +4446,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2897 | op[0]); | ||
2898 | } | ||
2899 | SYNTAX("mov %0, %e!1"); | ||
2900 | -#line 645 "rl78-decode.opc" | ||
2901 | +#line 647 "rl78-decode.opc" | ||
2902 | ID(mov); DR(A); SM(None, IMMU(2)); | ||
2903 | |||
2904 | } | ||
2905 | @@ -4459,7 +4461,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2906 | case 0x97: | ||
2907 | { | ||
2908 | /** 1001 0reg dec %0 */ | ||
2909 | -#line 554 "rl78-decode.opc" | ||
2910 | +#line 556 "rl78-decode.opc" | ||
2911 | int reg AU = op[0] & 0x07; | ||
2912 | if (trace) | ||
2913 | { | ||
2914 | @@ -4469,7 +4471,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2915 | printf (" reg = 0x%x\n", reg); | ||
2916 | } | ||
2917 | SYNTAX("dec %0"); | ||
2918 | -#line 554 "rl78-decode.opc" | ||
2919 | +#line 556 "rl78-decode.opc" | ||
2920 | ID(sub); DRB(reg); SC(1); Fza; | ||
2921 | |||
2922 | } | ||
2923 | @@ -4484,7 +4486,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2924 | op[0]); | ||
2925 | } | ||
2926 | SYNTAX("mov %a0, %1"); | ||
2927 | -#line 642 "rl78-decode.opc" | ||
2928 | +#line 644 "rl78-decode.opc" | ||
2929 | ID(mov); DM(SP, IMMU(1)); SR(A); | ||
2930 | |||
2931 | } | ||
2932 | @@ -4499,7 +4501,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2933 | op[0]); | ||
2934 | } | ||
2935 | SYNTAX("mov %e0, %1"); | ||
2936 | -#line 615 "rl78-decode.opc" | ||
2937 | +#line 617 "rl78-decode.opc" | ||
2938 | ID(mov); DM(DE, 0); SR(A); | ||
2939 | |||
2940 | } | ||
2941 | @@ -4514,7 +4516,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2942 | op[0]); | ||
2943 | } | ||
2944 | SYNTAX("mov %ea0, %1"); | ||
2945 | -#line 621 "rl78-decode.opc" | ||
2946 | +#line 623 "rl78-decode.opc" | ||
2947 | ID(mov); DM(DE, IMMU(1)); SR(A); | ||
2948 | |||
2949 | } | ||
2950 | @@ -4529,7 +4531,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2951 | op[0]); | ||
2952 | } | ||
2953 | SYNTAX("mov %e0, %1"); | ||
2954 | -#line 624 "rl78-decode.opc" | ||
2955 | +#line 626 "rl78-decode.opc" | ||
2956 | ID(mov); DM(HL, 0); SR(A); | ||
2957 | |||
2958 | } | ||
2959 | @@ -4544,7 +4546,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2960 | op[0]); | ||
2961 | } | ||
2962 | SYNTAX("mov %ea0, %1"); | ||
2963 | -#line 633 "rl78-decode.opc" | ||
2964 | +#line 635 "rl78-decode.opc" | ||
2965 | ID(mov); DM(HL, IMMU(1)); SR(A); | ||
2966 | |||
2967 | } | ||
2968 | @@ -4559,7 +4561,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2969 | op[0]); | ||
2970 | } | ||
2971 | SYNTAX("mov %0, %1"); | ||
2972 | -#line 747 "rl78-decode.opc" | ||
2973 | +#line 749 "rl78-decode.opc" | ||
2974 | ID(mov); DM(None, SADDR); SR(A); | ||
2975 | |||
2976 | } | ||
2977 | @@ -4574,7 +4576,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2978 | op[0]); | ||
2979 | } | ||
2980 | SYNTAX("mov %s0, %1"); | ||
2981 | -#line 780 "rl78-decode.opc" | ||
2982 | +#line 782 "rl78-decode.opc" | ||
2983 | ID(mov); DM(None, SFR); SR(A); | ||
2984 | |||
2985 | /*----------------------------------------------------------------------*/ | ||
2986 | @@ -4591,7 +4593,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2987 | op[0]); | ||
2988 | } | ||
2989 | SYNTAX("mov %e!0, %1"); | ||
2990 | -#line 612 "rl78-decode.opc" | ||
2991 | +#line 614 "rl78-decode.opc" | ||
2992 | ID(mov); DM(None, IMMU(2)); SR(A); | ||
2993 | |||
2994 | } | ||
2995 | @@ -4606,7 +4608,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
2996 | op[0]); | ||
2997 | } | ||
2998 | SYNTAX("inc %e!0"); | ||
2999 | -#line 581 "rl78-decode.opc" | ||
3000 | +#line 583 "rl78-decode.opc" | ||
3001 | ID(add); DM(None, IMMU(2)); SC(1); Fza; | ||
3002 | |||
3003 | } | ||
3004 | @@ -4617,7 +4619,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3005 | case 0xa7: | ||
3006 | { | ||
3007 | /** 1010 0rg1 incw %0 */ | ||
3008 | -#line 601 "rl78-decode.opc" | ||
3009 | +#line 603 "rl78-decode.opc" | ||
3010 | int rg AU = (op[0] >> 1) & 0x03; | ||
3011 | if (trace) | ||
3012 | { | ||
3013 | @@ -4627,7 +4629,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3014 | printf (" rg = 0x%x\n", rg); | ||
3015 | } | ||
3016 | SYNTAX("incw %0"); | ||
3017 | -#line 601 "rl78-decode.opc" | ||
3018 | +#line 603 "rl78-decode.opc" | ||
3019 | ID(add); W(); DRW(rg); SC(1); | ||
3020 | |||
3021 | } | ||
3022 | @@ -4642,7 +4644,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3023 | op[0]); | ||
3024 | } | ||
3025 | SYNTAX("incw %e!0"); | ||
3026 | -#line 595 "rl78-decode.opc" | ||
3027 | +#line 597 "rl78-decode.opc" | ||
3028 | ID(add); W(); DM(None, IMMU(2)); SC(1); | ||
3029 | |||
3030 | } | ||
3031 | @@ -4657,7 +4659,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3032 | op[0]); | ||
3033 | } | ||
3034 | SYNTAX("inc %0"); | ||
3035 | -#line 590 "rl78-decode.opc" | ||
3036 | +#line 592 "rl78-decode.opc" | ||
3037 | ID(add); DM(None, SADDR); SC(1); Fza; | ||
3038 | |||
3039 | /*----------------------------------------------------------------------*/ | ||
3040 | @@ -4674,7 +4676,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3041 | op[0]); | ||
3042 | } | ||
3043 | SYNTAX("incw %0"); | ||
3044 | -#line 604 "rl78-decode.opc" | ||
3045 | +#line 606 "rl78-decode.opc" | ||
3046 | ID(add); W(); DM(None, SADDR); SC(1); | ||
3047 | |||
3048 | /*----------------------------------------------------------------------*/ | ||
3049 | @@ -4691,7 +4693,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3050 | op[0]); | ||
3051 | } | ||
3052 | SYNTAX("movw %0, %a1"); | ||
3053 | -#line 850 "rl78-decode.opc" | ||
3054 | +#line 852 "rl78-decode.opc" | ||
3055 | ID(mov); W(); DR(AX); SM(SP, IMMU(1)); | ||
3056 | |||
3057 | } | ||
3058 | @@ -4706,7 +4708,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3059 | op[0]); | ||
3060 | } | ||
3061 | SYNTAX("movw %0, %e1"); | ||
3062 | -#line 838 "rl78-decode.opc" | ||
3063 | +#line 840 "rl78-decode.opc" | ||
3064 | ID(mov); W(); DR(AX); SM(DE, 0); | ||
3065 | |||
3066 | } | ||
3067 | @@ -4721,7 +4723,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3068 | op[0]); | ||
3069 | } | ||
3070 | SYNTAX("movw %0, %ea1"); | ||
3071 | -#line 841 "rl78-decode.opc" | ||
3072 | +#line 843 "rl78-decode.opc" | ||
3073 | ID(mov); W(); DR(AX); SM(DE, IMMU(1)); | ||
3074 | |||
3075 | } | ||
3076 | @@ -4736,7 +4738,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3077 | op[0]); | ||
3078 | } | ||
3079 | SYNTAX("movw %0, %e1"); | ||
3080 | -#line 844 "rl78-decode.opc" | ||
3081 | +#line 846 "rl78-decode.opc" | ||
3082 | ID(mov); W(); DR(AX); SM(HL, 0); | ||
3083 | |||
3084 | } | ||
3085 | @@ -4751,7 +4753,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3086 | op[0]); | ||
3087 | } | ||
3088 | SYNTAX("movw %0, %ea1"); | ||
3089 | -#line 847 "rl78-decode.opc" | ||
3090 | +#line 849 "rl78-decode.opc" | ||
3091 | ID(mov); W(); DR(AX); SM(HL, IMMU(1)); | ||
3092 | |||
3093 | } | ||
3094 | @@ -4766,7 +4768,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3095 | op[0]); | ||
3096 | } | ||
3097 | SYNTAX("movw %0, %1"); | ||
3098 | -#line 880 "rl78-decode.opc" | ||
3099 | +#line 882 "rl78-decode.opc" | ||
3100 | ID(mov); W(); DR(AX); SM(None, SADDR); | ||
3101 | |||
3102 | } | ||
3103 | @@ -4781,7 +4783,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3104 | op[0]); | ||
3105 | } | ||
3106 | SYNTAX("movw %0, %s1"); | ||
3107 | -#line 883 "rl78-decode.opc" | ||
3108 | +#line 885 "rl78-decode.opc" | ||
3109 | ID(mov); W(); DR(AX); SM(None, SFR); | ||
3110 | |||
3111 | } | ||
3112 | @@ -4796,7 +4798,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3113 | op[0]); | ||
3114 | } | ||
3115 | SYNTAX("movw %0, %e!1"); | ||
3116 | -#line 834 "rl78-decode.opc" | ||
3117 | +#line 836 "rl78-decode.opc" | ||
3118 | ID(mov); W(); DR(AX); SM(None, IMMU(2)); | ||
3119 | |||
3120 | |||
3121 | @@ -4812,7 +4814,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3122 | op[0]); | ||
3123 | } | ||
3124 | SYNTAX("dec %e!0"); | ||
3125 | -#line 548 "rl78-decode.opc" | ||
3126 | +#line 550 "rl78-decode.opc" | ||
3127 | ID(sub); DM(None, IMMU(2)); SC(1); Fza; | ||
3128 | |||
3129 | } | ||
3130 | @@ -4823,7 +4825,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3131 | case 0xb7: | ||
3132 | { | ||
3133 | /** 1011 0rg1 decw %0 */ | ||
3134 | -#line 568 "rl78-decode.opc" | ||
3135 | +#line 570 "rl78-decode.opc" | ||
3136 | int rg AU = (op[0] >> 1) & 0x03; | ||
3137 | if (trace) | ||
3138 | { | ||
3139 | @@ -4833,7 +4835,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3140 | printf (" rg = 0x%x\n", rg); | ||
3141 | } | ||
3142 | SYNTAX("decw %0"); | ||
3143 | -#line 568 "rl78-decode.opc" | ||
3144 | +#line 570 "rl78-decode.opc" | ||
3145 | ID(sub); W(); DRW(rg); SC(1); | ||
3146 | |||
3147 | } | ||
3148 | @@ -4848,7 +4850,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3149 | op[0]); | ||
3150 | } | ||
3151 | SYNTAX("decw %e!0"); | ||
3152 | -#line 562 "rl78-decode.opc" | ||
3153 | +#line 564 "rl78-decode.opc" | ||
3154 | ID(sub); W(); DM(None, IMMU(2)); SC(1); | ||
3155 | |||
3156 | } | ||
3157 | @@ -4863,7 +4865,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3158 | op[0]); | ||
3159 | } | ||
3160 | SYNTAX("dec %0"); | ||
3161 | -#line 557 "rl78-decode.opc" | ||
3162 | +#line 559 "rl78-decode.opc" | ||
3163 | ID(sub); DM(None, SADDR); SC(1); Fza; | ||
3164 | |||
3165 | /*----------------------------------------------------------------------*/ | ||
3166 | @@ -4880,7 +4882,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3167 | op[0]); | ||
3168 | } | ||
3169 | SYNTAX("decw %0"); | ||
3170 | -#line 571 "rl78-decode.opc" | ||
3171 | +#line 573 "rl78-decode.opc" | ||
3172 | ID(sub); W(); DM(None, SADDR); SC(1); | ||
3173 | |||
3174 | /*----------------------------------------------------------------------*/ | ||
3175 | @@ -4897,7 +4899,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3176 | op[0]); | ||
3177 | } | ||
3178 | SYNTAX("movw %a0, %1"); | ||
3179 | -#line 831 "rl78-decode.opc" | ||
3180 | +#line 833 "rl78-decode.opc" | ||
3181 | ID(mov); W(); DM(SP, IMMU(1)); SR(AX); | ||
3182 | |||
3183 | } | ||
3184 | @@ -4912,7 +4914,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3185 | op[0]); | ||
3186 | } | ||
3187 | SYNTAX("movw %e0, %1"); | ||
3188 | -#line 819 "rl78-decode.opc" | ||
3189 | +#line 821 "rl78-decode.opc" | ||
3190 | ID(mov); W(); DM(DE, 0); SR(AX); | ||
3191 | |||
3192 | } | ||
3193 | @@ -4927,7 +4929,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3194 | op[0]); | ||
3195 | } | ||
3196 | SYNTAX("movw %ea0, %1"); | ||
3197 | -#line 822 "rl78-decode.opc" | ||
3198 | +#line 824 "rl78-decode.opc" | ||
3199 | ID(mov); W(); DM(DE, IMMU(1)); SR(AX); | ||
3200 | |||
3201 | } | ||
3202 | @@ -4942,7 +4944,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3203 | op[0]); | ||
3204 | } | ||
3205 | SYNTAX("movw %e0, %1"); | ||
3206 | -#line 825 "rl78-decode.opc" | ||
3207 | +#line 827 "rl78-decode.opc" | ||
3208 | ID(mov); W(); DM(HL, 0); SR(AX); | ||
3209 | |||
3210 | } | ||
3211 | @@ -4957,7 +4959,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3212 | op[0]); | ||
3213 | } | ||
3214 | SYNTAX("movw %ea0, %1"); | ||
3215 | -#line 828 "rl78-decode.opc" | ||
3216 | +#line 830 "rl78-decode.opc" | ||
3217 | ID(mov); W(); DM(HL, IMMU(1)); SR(AX); | ||
3218 | |||
3219 | } | ||
3220 | @@ -4972,7 +4974,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3221 | op[0]); | ||
3222 | } | ||
3223 | SYNTAX("movw %0, %1"); | ||
3224 | -#line 895 "rl78-decode.opc" | ||
3225 | +#line 897 "rl78-decode.opc" | ||
3226 | ID(mov); W(); DM(None, SADDR); SR(AX); | ||
3227 | |||
3228 | } | ||
3229 | @@ -4987,7 +4989,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3230 | op[0]); | ||
3231 | } | ||
3232 | SYNTAX("movw %s0, %1"); | ||
3233 | -#line 901 "rl78-decode.opc" | ||
3234 | +#line 903 "rl78-decode.opc" | ||
3235 | ID(mov); W(); DM(None, SFR); SR(AX); | ||
3236 | |||
3237 | /*----------------------------------------------------------------------*/ | ||
3238 | @@ -5004,7 +5006,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3239 | op[0]); | ||
3240 | } | ||
3241 | SYNTAX("movw %e!0, %1"); | ||
3242 | -#line 816 "rl78-decode.opc" | ||
3243 | +#line 818 "rl78-decode.opc" | ||
3244 | ID(mov); W(); DM(None, IMMU(2)); SR(AX); | ||
3245 | |||
3246 | } | ||
3247 | @@ -5015,7 +5017,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3248 | case 0xc6: | ||
3249 | { | ||
3250 | /** 1100 0rg0 pop %0 */ | ||
3251 | -#line 986 "rl78-decode.opc" | ||
3252 | +#line 988 "rl78-decode.opc" | ||
3253 | int rg AU = (op[0] >> 1) & 0x03; | ||
3254 | if (trace) | ||
3255 | { | ||
3256 | @@ -5025,7 +5027,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3257 | printf (" rg = 0x%x\n", rg); | ||
3258 | } | ||
3259 | SYNTAX("pop %0"); | ||
3260 | -#line 986 "rl78-decode.opc" | ||
3261 | +#line 988 "rl78-decode.opc" | ||
3262 | ID(mov); W(); DRW(rg); SPOP(); | ||
3263 | |||
3264 | } | ||
3265 | @@ -5036,7 +5038,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3266 | case 0xc7: | ||
3267 | { | ||
3268 | /** 1100 0rg1 push %1 */ | ||
3269 | -#line 994 "rl78-decode.opc" | ||
3270 | +#line 996 "rl78-decode.opc" | ||
3271 | int rg AU = (op[0] >> 1) & 0x03; | ||
3272 | if (trace) | ||
3273 | { | ||
3274 | @@ -5046,7 +5048,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3275 | printf (" rg = 0x%x\n", rg); | ||
3276 | } | ||
3277 | SYNTAX("push %1"); | ||
3278 | -#line 994 "rl78-decode.opc" | ||
3279 | +#line 996 "rl78-decode.opc" | ||
3280 | ID(mov); W(); DPUSH(); SRW(rg); | ||
3281 | |||
3282 | } | ||
3283 | @@ -5061,7 +5063,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3284 | op[0]); | ||
3285 | } | ||
3286 | SYNTAX("mov %a0, #%1"); | ||
3287 | -#line 639 "rl78-decode.opc" | ||
3288 | +#line 641 "rl78-decode.opc" | ||
3289 | ID(mov); DM(SP, IMMU(1)); SC(IMMU(1)); | ||
3290 | |||
3291 | } | ||
3292 | @@ -5076,7 +5078,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3293 | op[0]); | ||
3294 | } | ||
3295 | SYNTAX("movw %0, #%1"); | ||
3296 | -#line 892 "rl78-decode.opc" | ||
3297 | +#line 894 "rl78-decode.opc" | ||
3298 | ID(mov); W(); DM(None, SADDR); SC(IMMU(2)); | ||
3299 | |||
3300 | } | ||
3301 | @@ -5091,7 +5093,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3302 | op[0]); | ||
3303 | } | ||
3304 | SYNTAX("mov %ea0, #%1"); | ||
3305 | -#line 618 "rl78-decode.opc" | ||
3306 | +#line 620 "rl78-decode.opc" | ||
3307 | ID(mov); DM(DE, IMMU(1)); SC(IMMU(1)); | ||
3308 | |||
3309 | } | ||
3310 | @@ -5106,7 +5108,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3311 | op[0]); | ||
3312 | } | ||
3313 | SYNTAX("movw %s0, #%1"); | ||
3314 | -#line 898 "rl78-decode.opc" | ||
3315 | +#line 900 "rl78-decode.opc" | ||
3316 | ID(mov); W(); DM(None, SFR); SC(IMMU(2)); | ||
3317 | |||
3318 | } | ||
3319 | @@ -5121,7 +5123,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3320 | op[0]); | ||
3321 | } | ||
3322 | SYNTAX("mov %ea0, #%1"); | ||
3323 | -#line 630 "rl78-decode.opc" | ||
3324 | +#line 632 "rl78-decode.opc" | ||
3325 | ID(mov); DM(HL, IMMU(1)); SC(IMMU(1)); | ||
3326 | |||
3327 | } | ||
3328 | @@ -5136,7 +5138,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3329 | op[0]); | ||
3330 | } | ||
3331 | SYNTAX("mov %0, #%1"); | ||
3332 | -#line 744 "rl78-decode.opc" | ||
3333 | +#line 746 "rl78-decode.opc" | ||
3334 | ID(mov); DM(None, SADDR); SC(IMMU(1)); | ||
3335 | |||
3336 | } | ||
3337 | @@ -5151,7 +5153,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3338 | op[0]); | ||
3339 | } | ||
3340 | SYNTAX("mov %s0, #%1"); | ||
3341 | -#line 750 "rl78-decode.opc" | ||
3342 | +#line 752 "rl78-decode.opc" | ||
3343 | op0 = SFR; | ||
3344 | op1 = IMMU(1); | ||
3345 | ID(mov); DM(None, op0); SC(op1); | ||
3346 | @@ -5193,7 +5195,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3347 | op[0]); | ||
3348 | } | ||
3349 | SYNTAX("mov %e!0, #%1"); | ||
3350 | -#line 609 "rl78-decode.opc" | ||
3351 | +#line 611 "rl78-decode.opc" | ||
3352 | ID(mov); DM(None, IMMU(2)); SC(IMMU(1)); | ||
3353 | |||
3354 | } | ||
3355 | @@ -5204,7 +5206,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3356 | case 0xd3: | ||
3357 | { | ||
3358 | /** 1101 00rg cmp0 %0 */ | ||
3359 | -#line 518 "rl78-decode.opc" | ||
3360 | +#line 520 "rl78-decode.opc" | ||
3361 | int rg AU = op[0] & 0x03; | ||
3362 | if (trace) | ||
3363 | { | ||
3364 | @@ -5214,7 +5216,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3365 | printf (" rg = 0x%x\n", rg); | ||
3366 | } | ||
3367 | SYNTAX("cmp0 %0"); | ||
3368 | -#line 518 "rl78-decode.opc" | ||
3369 | +#line 520 "rl78-decode.opc" | ||
3370 | ID(cmp); DRB(rg); SC(0); Fzac; | ||
3371 | |||
3372 | } | ||
3373 | @@ -5229,7 +5231,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3374 | op[0]); | ||
3375 | } | ||
3376 | SYNTAX("cmp0 %0"); | ||
3377 | -#line 521 "rl78-decode.opc" | ||
3378 | +#line 523 "rl78-decode.opc" | ||
3379 | ID(cmp); DM(None, SADDR); SC(0); Fzac; | ||
3380 | |||
3381 | /*----------------------------------------------------------------------*/ | ||
3382 | @@ -5246,7 +5248,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3383 | op[0]); | ||
3384 | } | ||
3385 | SYNTAX("cmp0 %e!0"); | ||
3386 | -#line 515 "rl78-decode.opc" | ||
3387 | +#line 517 "rl78-decode.opc" | ||
3388 | ID(cmp); DM(None, IMMU(2)); SC(0); Fzac; | ||
3389 | |||
3390 | } | ||
3391 | @@ -5261,7 +5263,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3392 | op[0]); | ||
3393 | } | ||
3394 | SYNTAX("mulu x"); | ||
3395 | -#line 906 "rl78-decode.opc" | ||
3396 | +#line 908 "rl78-decode.opc" | ||
3397 | ID(mulu); | ||
3398 | |||
3399 | /*----------------------------------------------------------------------*/ | ||
3400 | @@ -5278,7 +5280,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3401 | op[0]); | ||
3402 | } | ||
3403 | SYNTAX("ret"); | ||
3404 | -#line 1002 "rl78-decode.opc" | ||
3405 | +#line 1004 "rl78-decode.opc" | ||
3406 | ID(ret); | ||
3407 | |||
3408 | } | ||
3409 | @@ -5293,7 +5295,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3410 | op[0]); | ||
3411 | } | ||
3412 | SYNTAX("mov %0, %1"); | ||
3413 | -#line 711 "rl78-decode.opc" | ||
3414 | +#line 713 "rl78-decode.opc" | ||
3415 | ID(mov); DR(X); SM(None, SADDR); | ||
3416 | |||
3417 | } | ||
3418 | @@ -5308,7 +5310,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3419 | op[0]); | ||
3420 | } | ||
3421 | SYNTAX("mov %0, %e!1"); | ||
3422 | -#line 708 "rl78-decode.opc" | ||
3423 | +#line 710 "rl78-decode.opc" | ||
3424 | ID(mov); DR(X); SM(None, IMMU(2)); | ||
3425 | |||
3426 | } | ||
3427 | @@ -5318,7 +5320,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3428 | case 0xfa: | ||
3429 | { | ||
3430 | /** 11ra 1010 movw %0, %1 */ | ||
3431 | -#line 889 "rl78-decode.opc" | ||
3432 | +#line 891 "rl78-decode.opc" | ||
3433 | int ra AU = (op[0] >> 4) & 0x03; | ||
3434 | if (trace) | ||
3435 | { | ||
3436 | @@ -5328,7 +5330,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3437 | printf (" ra = 0x%x\n", ra); | ||
3438 | } | ||
3439 | SYNTAX("movw %0, %1"); | ||
3440 | -#line 889 "rl78-decode.opc" | ||
3441 | +#line 891 "rl78-decode.opc" | ||
3442 | ID(mov); W(); DRW(ra); SM(None, SADDR); | ||
3443 | |||
3444 | } | ||
3445 | @@ -5338,7 +5340,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3446 | case 0xfb: | ||
3447 | { | ||
3448 | /** 11ra 1011 movw %0, %es!1 */ | ||
3449 | -#line 886 "rl78-decode.opc" | ||
3450 | +#line 888 "rl78-decode.opc" | ||
3451 | int ra AU = (op[0] >> 4) & 0x03; | ||
3452 | if (trace) | ||
3453 | { | ||
3454 | @@ -5348,7 +5350,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3455 | printf (" ra = 0x%x\n", ra); | ||
3456 | } | ||
3457 | SYNTAX("movw %0, %es!1"); | ||
3458 | -#line 886 "rl78-decode.opc" | ||
3459 | +#line 888 "rl78-decode.opc" | ||
3460 | ID(mov); W(); DRW(ra); SM(None, IMMU(2)); | ||
3461 | |||
3462 | } | ||
3463 | @@ -5363,7 +5365,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3464 | op[0]); | ||
3465 | } | ||
3466 | SYNTAX("bc $%a0"); | ||
3467 | -#line 334 "rl78-decode.opc" | ||
3468 | +#line 336 "rl78-decode.opc" | ||
3469 | ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(C); | ||
3470 | |||
3471 | } | ||
3472 | @@ -5378,7 +5380,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3473 | op[0]); | ||
3474 | } | ||
3475 | SYNTAX("bz $%a0"); | ||
3476 | -#line 346 "rl78-decode.opc" | ||
3477 | +#line 348 "rl78-decode.opc" | ||
3478 | ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(Z); | ||
3479 | |||
3480 | } | ||
3481 | @@ -5393,7 +5395,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3482 | op[0]); | ||
3483 | } | ||
3484 | SYNTAX("bnc $%a0"); | ||
3485 | -#line 337 "rl78-decode.opc" | ||
3486 | +#line 339 "rl78-decode.opc" | ||
3487 | ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NC); | ||
3488 | |||
3489 | } | ||
3490 | @@ -5408,7 +5410,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3491 | op[0]); | ||
3492 | } | ||
3493 | SYNTAX("bnz $%a0"); | ||
3494 | -#line 349 "rl78-decode.opc" | ||
3495 | +#line 351 "rl78-decode.opc" | ||
3496 | ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NZ); | ||
3497 | |||
3498 | /*----------------------------------------------------------------------*/ | ||
3499 | @@ -5421,7 +5423,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3500 | case 0xe3: | ||
3501 | { | ||
3502 | /** 1110 00rg oneb %0 */ | ||
3503 | -#line 924 "rl78-decode.opc" | ||
3504 | +#line 926 "rl78-decode.opc" | ||
3505 | int rg AU = op[0] & 0x03; | ||
3506 | if (trace) | ||
3507 | { | ||
3508 | @@ -5431,7 +5433,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3509 | printf (" rg = 0x%x\n", rg); | ||
3510 | } | ||
3511 | SYNTAX("oneb %0"); | ||
3512 | -#line 924 "rl78-decode.opc" | ||
3513 | +#line 926 "rl78-decode.opc" | ||
3514 | ID(mov); DRB(rg); SC(1); | ||
3515 | |||
3516 | } | ||
3517 | @@ -5446,7 +5448,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3518 | op[0]); | ||
3519 | } | ||
3520 | SYNTAX("oneb %0"); | ||
3521 | -#line 927 "rl78-decode.opc" | ||
3522 | +#line 929 "rl78-decode.opc" | ||
3523 | ID(mov); DM(None, SADDR); SC(1); | ||
3524 | |||
3525 | /*----------------------------------------------------------------------*/ | ||
3526 | @@ -5463,7 +5465,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3527 | op[0]); | ||
3528 | } | ||
3529 | SYNTAX("oneb %e!0"); | ||
3530 | -#line 921 "rl78-decode.opc" | ||
3531 | +#line 923 "rl78-decode.opc" | ||
3532 | ID(mov); DM(None, IMMU(2)); SC(1); | ||
3533 | |||
3534 | } | ||
3535 | @@ -5478,7 +5480,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3536 | op[0]); | ||
3537 | } | ||
3538 | SYNTAX("onew %0"); | ||
3539 | -#line 932 "rl78-decode.opc" | ||
3540 | +#line 934 "rl78-decode.opc" | ||
3541 | ID(mov); DR(AX); SC(1); | ||
3542 | |||
3543 | } | ||
3544 | @@ -5493,7 +5495,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3545 | op[0]); | ||
3546 | } | ||
3547 | SYNTAX("onew %0"); | ||
3548 | -#line 935 "rl78-decode.opc" | ||
3549 | +#line 937 "rl78-decode.opc" | ||
3550 | ID(mov); DR(BC); SC(1); | ||
3551 | |||
3552 | /*----------------------------------------------------------------------*/ | ||
3553 | @@ -5510,7 +5512,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3554 | op[0]); | ||
3555 | } | ||
3556 | SYNTAX("mov %0, %1"); | ||
3557 | -#line 699 "rl78-decode.opc" | ||
3558 | +#line 701 "rl78-decode.opc" | ||
3559 | ID(mov); DR(B); SM(None, SADDR); | ||
3560 | |||
3561 | } | ||
3562 | @@ -5525,7 +5527,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3563 | op[0]); | ||
3564 | } | ||
3565 | SYNTAX("mov %0, %e!1"); | ||
3566 | -#line 693 "rl78-decode.opc" | ||
3567 | +#line 695 "rl78-decode.opc" | ||
3568 | ID(mov); DR(B); SM(None, IMMU(2)); | ||
3569 | |||
3570 | } | ||
3571 | @@ -5540,7 +5542,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3572 | op[0]); | ||
3573 | } | ||
3574 | SYNTAX("br !%!a0"); | ||
3575 | -#line 368 "rl78-decode.opc" | ||
3576 | +#line 370 "rl78-decode.opc" | ||
3577 | ID(branch); DC(IMMU(3)); | ||
3578 | |||
3579 | } | ||
3580 | @@ -5555,7 +5557,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3581 | op[0]); | ||
3582 | } | ||
3583 | SYNTAX("br %!a0"); | ||
3584 | -#line 371 "rl78-decode.opc" | ||
3585 | +#line 373 "rl78-decode.opc" | ||
3586 | ID(branch); DC(IMMU(2)); | ||
3587 | |||
3588 | } | ||
3589 | @@ -5570,7 +5572,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3590 | op[0]); | ||
3591 | } | ||
3592 | SYNTAX("br $%!a0"); | ||
3593 | -#line 374 "rl78-decode.opc" | ||
3594 | +#line 376 "rl78-decode.opc" | ||
3595 | ID(branch); DC(pc+IMMS(2)+3); | ||
3596 | |||
3597 | } | ||
3598 | @@ -5585,7 +5587,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3599 | op[0]); | ||
3600 | } | ||
3601 | SYNTAX("br $%a0"); | ||
3602 | -#line 377 "rl78-decode.opc" | ||
3603 | +#line 379 "rl78-decode.opc" | ||
3604 | ID(branch); DC(pc+IMMS(1)+2); | ||
3605 | |||
3606 | } | ||
3607 | @@ -5596,7 +5598,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3608 | case 0xf3: | ||
3609 | { | ||
3610 | /** 1111 00rg clrb %0 */ | ||
3611 | -#line 464 "rl78-decode.opc" | ||
3612 | +#line 466 "rl78-decode.opc" | ||
3613 | int rg AU = op[0] & 0x03; | ||
3614 | if (trace) | ||
3615 | { | ||
3616 | @@ -5606,7 +5608,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3617 | printf (" rg = 0x%x\n", rg); | ||
3618 | } | ||
3619 | SYNTAX("clrb %0"); | ||
3620 | -#line 464 "rl78-decode.opc" | ||
3621 | +#line 466 "rl78-decode.opc" | ||
3622 | ID(mov); DRB(rg); SC(0); | ||
3623 | |||
3624 | } | ||
3625 | @@ -5621,7 +5623,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3626 | op[0]); | ||
3627 | } | ||
3628 | SYNTAX("clrb %0"); | ||
3629 | -#line 467 "rl78-decode.opc" | ||
3630 | +#line 469 "rl78-decode.opc" | ||
3631 | ID(mov); DM(None, SADDR); SC(0); | ||
3632 | |||
3633 | /*----------------------------------------------------------------------*/ | ||
3634 | @@ -5638,7 +5640,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3635 | op[0]); | ||
3636 | } | ||
3637 | SYNTAX("clrb %e!0"); | ||
3638 | -#line 461 "rl78-decode.opc" | ||
3639 | +#line 463 "rl78-decode.opc" | ||
3640 | ID(mov); DM(None, IMMU(2)); SC(0); | ||
3641 | |||
3642 | } | ||
3643 | @@ -5653,7 +5655,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3644 | op[0]); | ||
3645 | } | ||
3646 | SYNTAX("clrw %0"); | ||
3647 | -#line 472 "rl78-decode.opc" | ||
3648 | +#line 474 "rl78-decode.opc" | ||
3649 | ID(mov); DR(AX); SC(0); | ||
3650 | |||
3651 | } | ||
3652 | @@ -5668,7 +5670,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3653 | op[0]); | ||
3654 | } | ||
3655 | SYNTAX("clrw %0"); | ||
3656 | -#line 475 "rl78-decode.opc" | ||
3657 | +#line 477 "rl78-decode.opc" | ||
3658 | ID(mov); DR(BC); SC(0); | ||
3659 | |||
3660 | /*----------------------------------------------------------------------*/ | ||
3661 | @@ -5685,7 +5687,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3662 | op[0]); | ||
3663 | } | ||
3664 | SYNTAX("mov %0, %1"); | ||
3665 | -#line 705 "rl78-decode.opc" | ||
3666 | +#line 707 "rl78-decode.opc" | ||
3667 | ID(mov); DR(C); SM(None, SADDR); | ||
3668 | |||
3669 | } | ||
3670 | @@ -5700,7 +5702,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3671 | op[0]); | ||
3672 | } | ||
3673 | SYNTAX("mov %0, %e!1"); | ||
3674 | -#line 702 "rl78-decode.opc" | ||
3675 | +#line 704 "rl78-decode.opc" | ||
3676 | ID(mov); DR(C); SM(None, IMMU(2)); | ||
3677 | |||
3678 | } | ||
3679 | @@ -5715,7 +5717,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3680 | op[0]); | ||
3681 | } | ||
3682 | SYNTAX("call !%!a0"); | ||
3683 | -#line 421 "rl78-decode.opc" | ||
3684 | +#line 423 "rl78-decode.opc" | ||
3685 | ID(call); DC(IMMU(3)); | ||
3686 | |||
3687 | } | ||
3688 | @@ -5730,7 +5732,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3689 | op[0]); | ||
3690 | } | ||
3691 | SYNTAX("call %!a0"); | ||
3692 | -#line 424 "rl78-decode.opc" | ||
3693 | +#line 426 "rl78-decode.opc" | ||
3694 | ID(call); DC(IMMU(2)); | ||
3695 | |||
3696 | } | ||
3697 | @@ -5745,7 +5747,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3698 | op[0]); | ||
3699 | } | ||
3700 | SYNTAX("call $%!a0"); | ||
3701 | -#line 427 "rl78-decode.opc" | ||
3702 | +#line 429 "rl78-decode.opc" | ||
3703 | ID(call); DC(pc+IMMS(2)+3); | ||
3704 | |||
3705 | } | ||
3706 | @@ -5760,13 +5762,13 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3707 | op[0]); | ||
3708 | } | ||
3709 | SYNTAX("brk1"); | ||
3710 | -#line 385 "rl78-decode.opc" | ||
3711 | +#line 387 "rl78-decode.opc" | ||
3712 | ID(break); | ||
3713 | |||
3714 | } | ||
3715 | break; | ||
3716 | } | ||
3717 | -#line 1290 "rl78-decode.opc" | ||
3718 | +#line 1292 "rl78-decode.opc" | ||
3719 | |||
3720 | return rl78->n_bytes; | ||
3721 | } | ||
3722 | diff --git a/opcodes/rl78-decode.opc b/opcodes/rl78-decode.opc | ||
3723 | index 6212f08..b25e441 100644 | ||
3724 | --- a/opcodes/rl78-decode.opc | ||
3725 | +++ b/opcodes/rl78-decode.opc | ||
3726 | @@ -50,7 +50,9 @@ typedef struct | ||
3727 | #define W() rl78->size = RL78_Word | ||
3728 | |||
3729 | #define AU ATTRIBUTE_UNUSED | ||
3730 | -#define GETBYTE() (ld->op [ld->rl78->n_bytes++] = ld->getbyte (ld->ptr)) | ||
3731 | + | ||
3732 | +#define OP_BUF_LEN 20 | ||
3733 | +#define GETBYTE() (ld->rl78->n_bytes < (OP_BUF_LEN - 1) ? ld->op [ld->rl78->n_bytes++] = ld->getbyte (ld->ptr): 0) | ||
3734 | #define B ((unsigned long) GETBYTE()) | ||
3735 | |||
3736 | #define SYNTAX(x) rl78->syntax = x | ||
3737 | @@ -168,7 +170,7 @@ rl78_decode_opcode (unsigned long pc AU, | ||
3738 | RL78_Dis_Isa isa) | ||
3739 | { | ||
3740 | LocalData lds, * ld = &lds; | ||
3741 | - unsigned char op_buf[20] = {0}; | ||
3742 | + unsigned char op_buf[OP_BUF_LEN] = {0}; | ||
3743 | unsigned char *op = op_buf; | ||
3744 | int op0, op1; | ||
3745 | |||
3746 | -- | ||
3747 | 2.7.4 | ||
3748 | |||