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author | Khem Raj <raj.khem@gmail.com> | 2017-04-14 18:23:20 -0700 |
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committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2017-07-11 15:57:08 +0100 |
commit | 1f4f343ff290019987f25d06ea0c00d495660919 (patch) | |
tree | f139bbba8e209a1094a0fc14d446a4e0aba9e9be /meta/recipes-core/glibc/glibc/0019-eglibc-Clear-cache-lines-on-ppc8xx.patch | |
parent | 715b05e9e193200c2e41fe4881b2ab1fdb639cc2 (diff) | |
download | poky-1f4f343ff290019987f25d06ea0c00d495660919.tar.gz |
glibc: Upgrade to 2.25.90
Eventually it will be released as 2.26 final
(From OE-Core rev: 5a58883258206893d15990953c8691b05473eecb)
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-core/glibc/glibc/0019-eglibc-Clear-cache-lines-on-ppc8xx.patch')
-rw-r--r-- | meta/recipes-core/glibc/glibc/0019-eglibc-Clear-cache-lines-on-ppc8xx.patch | 83 |
1 files changed, 83 insertions, 0 deletions
diff --git a/meta/recipes-core/glibc/glibc/0019-eglibc-Clear-cache-lines-on-ppc8xx.patch b/meta/recipes-core/glibc/glibc/0019-eglibc-Clear-cache-lines-on-ppc8xx.patch new file mode 100644 index 0000000000..adb28cfd34 --- /dev/null +++ b/meta/recipes-core/glibc/glibc/0019-eglibc-Clear-cache-lines-on-ppc8xx.patch | |||
@@ -0,0 +1,83 @@ | |||
1 | From 1732c7f25453c879c17701839ef34876a7357008 Mon Sep 17 00:00:00 2001 | ||
2 | From: Khem Raj <raj.khem@gmail.com> | ||
3 | Date: Thu, 31 Dec 2015 15:15:09 -0800 | ||
4 | Subject: [PATCH 19/25] eglibc: Clear cache lines on ppc8xx | ||
5 | |||
6 | 2007-06-13 Nathan Sidwell <nathan@codesourcery.com> | ||
7 | Mark Shinwell <shinwell@codesourcery.com> | ||
8 | |||
9 | * sysdeps/unix/sysv/linux/powerpc/libc-start.c | ||
10 | (__libc_start_main): Detect 8xx parts and clear | ||
11 | __cache_line_size if detected. | ||
12 | * sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c | ||
13 | (DL_PLATFORM_AUXV): Likewise. | ||
14 | |||
15 | Upstream-Status: Pending | ||
16 | |||
17 | Signed-off-by: Khem Raj <raj.khem@gmail.com> | ||
18 | --- | ||
19 | sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c | 14 +++++++++++++- | ||
20 | sysdeps/unix/sysv/linux/powerpc/libc-start.c | 16 +++++++++++++++- | ||
21 | 2 files changed, 28 insertions(+), 2 deletions(-) | ||
22 | |||
23 | diff --git a/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c b/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c | ||
24 | index 23f5d5d388..7e45288db7 100644 | ||
25 | --- a/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c | ||
26 | +++ b/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c | ||
27 | @@ -24,9 +24,21 @@ int __cache_line_size attribute_hidden; | ||
28 | /* Scan the Aux Vector for the "Data Cache Block Size" entry. If found | ||
29 | verify that the static extern __cache_line_size is defined by checking | ||
30 | for not NULL. If it is defined then assign the cache block size | ||
31 | - value to __cache_line_size. */ | ||
32 | + value to __cache_line_size. This is used by memset to | ||
33 | + optimize setting to zero. We have to detect 8xx processors, which | ||
34 | + have buggy dcbz implementations that cannot report page faults | ||
35 | + correctly. That requires reading SPR, which is a privileged | ||
36 | + operation. Fortunately 2.2.18 and later emulates PowerPC mfspr | ||
37 | + reads from the PVR register. */ | ||
38 | #define DL_PLATFORM_AUXV \ | ||
39 | case AT_DCACHEBSIZE: \ | ||
40 | + if (__LINUX_KERNEL_VERSION >= 0x020218) \ | ||
41 | + { \ | ||
42 | + unsigned pvr = 0; \ | ||
43 | + asm ("mfspr %0, 287" : "=r" (pvr)); \ | ||
44 | + if ((pvr & 0xffff0000) == 0x00500000) \ | ||
45 | + break; \ | ||
46 | + } \ | ||
47 | __cache_line_size = av->a_un.a_val; \ | ||
48 | break; | ||
49 | |||
50 | diff --git a/sysdeps/unix/sysv/linux/powerpc/libc-start.c b/sysdeps/unix/sysv/linux/powerpc/libc-start.c | ||
51 | index ad036c1e4b..afee56a3da 100644 | ||
52 | --- a/sysdeps/unix/sysv/linux/powerpc/libc-start.c | ||
53 | +++ b/sysdeps/unix/sysv/linux/powerpc/libc-start.c | ||
54 | @@ -73,11 +73,25 @@ __libc_start_main (int argc, char **argv, | ||
55 | |||
56 | /* Initialize the __cache_line_size variable from the aux vector. For the | ||
57 | static case, we also need _dl_hwcap, _dl_hwcap2 and _dl_platform, so we | ||
58 | - can call __tcb_parse_hwcap_and_convert_at_platform (). */ | ||
59 | + can call __tcb_parse_hwcap_and_convert_at_platform (). | ||
60 | + | ||
61 | + This is used by memset to optimize setting to zero. We have to | ||
62 | + detect 8xx processors, which have buggy dcbz implementations that | ||
63 | + cannot report page faults correctly. That requires reading SPR, | ||
64 | + which is a privileged operation. Fortunately 2.2.18 and later | ||
65 | + emulates PowerPC mfspr reads from the PVR register. */ | ||
66 | for (ElfW (auxv_t) * av = auxvec; av->a_type != AT_NULL; ++av) | ||
67 | switch (av->a_type) | ||
68 | { | ||
69 | case AT_DCACHEBSIZE: | ||
70 | + if (__LINUX_KERNEL_VERSION >= 0x020218) | ||
71 | + { | ||
72 | + unsigned pvr = 0; | ||
73 | + | ||
74 | + asm ("mfspr %0, 287" : "=r" (pvr) :); | ||
75 | + if ((pvr & 0xffff0000) == 0x00500000) | ||
76 | + break; | ||
77 | + } | ||
78 | __cache_line_size = av->a_un.a_val; | ||
79 | break; | ||
80 | #ifndef SHARED | ||
81 | -- | ||
82 | 2.13.2 | ||
83 | |||