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authorCristian Iorga <cristian.iorga@intel.com>2014-05-30 20:11:11 +0300
committerRichard Purdie <richard.purdie@linuxfoundation.org>2014-06-03 16:49:18 +0100
commit79ac26cc57415ea0e8f95fd0b3261b09fe13eb57 (patch)
tree23c2f054c1b3cbe30fdaacd665be10109b64ff95 /meta/recipes-bsp/v86d
parent99006ef296369c0fa7a40b83ef84b01d438fe98a (diff)
downloadpoky-79ac26cc57415ea0e8f95fd0b3261b09fe13eb57.tar.gz
v86d: fix for SeaBIOS VGA BIOS compatibility
This fixes a compatibility issue between v86d and SeaBIOS VGA BIOS where the leal instruction is not decoded properly. Read the http://thread.gmane.org/gmane.comp.emulators.qemu/271806 thread for more details. Patch taken from upstream. (From OE-Core rev: 3e890dd00ed27cc30800caefa85827cb16da5a3a) Signed-off-by: Cristian Iorga <cristian.iorga@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-bsp/v86d')
-rw-r--r--meta/recipes-bsp/v86d/v86d/Update-x86emu-from-X.org.patch21766
-rw-r--r--meta/recipes-bsp/v86d/v86d_0.1.10.bb3
2 files changed, 21768 insertions, 1 deletions
diff --git a/meta/recipes-bsp/v86d/v86d/Update-x86emu-from-X.org.patch b/meta/recipes-bsp/v86d/v86d/Update-x86emu-from-X.org.patch
new file mode 100644
index 0000000000..a09e2a257e
--- /dev/null
+++ b/meta/recipes-bsp/v86d/v86d/Update-x86emu-from-X.org.patch
@@ -0,0 +1,21766 @@
1From 1a410ae58f28eeab32fa87626cfd5a663ba33c51 Mon Sep 17 00:00:00 2001
2From: Bernhard Walle <bernhard@bwalle.de>
3Date: Tue, 13 May 2014 23:40:56 +0200
4Subject: [PATCH 2/2] Update x86emu from X.org
5
6This commit updates the x86emu copy from X.org tarball
7(ftp://mirror.csclub.uwaterloo.ca/x.org/current/src/xserver/xorg-server-1.12.2.tar.bz2).
8
9This fixes a compatibility issue between v86d and SeaBIOS VGA BIOS where
10the leal instruction is not decoded properly. Read the
11http://thread.gmane.org/gmane.comp.emulators.qemu/271806 thread for more
12details.
13
14Upstream-Status: Backport
15
16Signed-off-by: Bernhard Walle <bernhard@bwalle.de>
17---
18 libs/x86emu/LICENSE | 17 -
19 libs/x86emu/debug.c | 509 +++---
20 libs/x86emu/decode.c | 1069 ++++++------
21 libs/x86emu/fpu.c | 463 +++---
22 libs/x86emu/ops.c | 2940 +++++++++++++++++++--------------
23 libs/x86emu/ops2.c | 1929 +++++++++++-----------
24 libs/x86emu/prim_ops.c | 3219 +++++++++++++++++++------------------
25 libs/x86emu/sys.c | 583 +++----
26 libs/x86emu/validate.c | 52 +-
27 libs/x86emu/x86emu.h | 75 +-
28 libs/x86emu/x86emu/debug.h | 163 +-
29 libs/x86emu/x86emu/decode.h | 57 +-
30 libs/x86emu/x86emu/fpu.h | 23 +-
31 libs/x86emu/x86emu/fpu_regs.h | 44 +-
32 libs/x86emu/x86emu/ops.h | 6 +-
33 libs/x86emu/x86emu/prim_asm.h | 251 ++-
34 libs/x86emu/x86emu/prim_ops.h | 188 +--
35 libs/x86emu/x86emu/prim_x86_gcc.h | 77 +
36 libs/x86emu/x86emu/regs.h | 101 +-
37 libs/x86emu/x86emu/types.h | 50 +-
38 libs/x86emu/x86emu/x86emui.h | 34 +-
39 21 files changed, 6379 insertions(+), 5471 deletions(-)
40 delete mode 100644 libs/x86emu/LICENSE
41 create mode 100644 libs/x86emu/x86emu/prim_x86_gcc.h
42
43diff --git a/libs/x86emu/LICENSE b/libs/x86emu/LICENSE
44deleted file mode 100644
45index a3ede4a..0000000
46--- a/libs/x86emu/LICENSE
47+++ /dev/null
48@@ -1,17 +0,0 @@
49- License information
50- -------------------
51-
52-The x86emu library is under a BSD style license, comaptible
53-with the XFree86 and X licenses used by XFree86. The
54-original x86emu libraries were under the GNU General Public
55-License. Due to license incompatibilities between the GPL
56-and the XFree86 license, the original authors of the code
57-decided to allow a license change. If you have submitted
58-code to the original x86emu project, and you don't agree
59-with the license change, please contact us and let you
60-know. Your code will be removed to comply with your wishes.
61-
62-If you have any questions about this, please send email to
63-x86emu@linuxlabs.com or KendallB@scitechsoft.com for
64-clarification.
65-
66diff --git a/libs/x86emu/debug.c b/libs/x86emu/debug.c
67index 6fd7f11..1a8d1d6 100644
68--- a/libs/x86emu/debug.c
69+++ b/libs/x86emu/debug.c
70@@ -38,6 +38,8 @@
71 ****************************************************************************/
72
73 #include "x86emu/x86emui.h"
74+#include <stdio.h>
75+#include <string.h>
76 #ifndef NO_SYS_HEADERS
77 #include <stdarg.h>
78 #include <stdlib.h>
79@@ -47,46 +49,51 @@
80
81 #ifdef DEBUG
82
83-static void print_encoded_bytes (u16 s, u16 o);
84-static void print_decoded_instruction (void);
85-static int parse_line (char *s, int *ps, int *n);
86-
87+static void print_encoded_bytes(u16 s, u16 o);
88+static void print_decoded_instruction(void);
89+static int parse_line(char *s, int *ps, int *n);
90+
91 /* should look something like debug's output. */
92-void X86EMU_trace_regs (void)
93+void
94+X86EMU_trace_regs(void)
95 {
96- if (DEBUG_TRACE()) {
97- x86emu_dump_regs();
98+ if (DEBUG_TRACE()) {
99+ x86emu_dump_regs();
100 }
101- if (DEBUG_DECODE() && ! DEBUG_DECODE_NOPRINT()) {
102- printk("%04x:%04x ",M.x86.saved_cs, M.x86.saved_ip);
103- print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip);
104- print_decoded_instruction();
105+ if (DEBUG_DECODE() && !DEBUG_DECODE_NOPRINT()) {
106+ printk("%04x:%04x ", M.x86.saved_cs, M.x86.saved_ip);
107+ print_encoded_bytes(M.x86.saved_cs, M.x86.saved_ip);
108+ print_decoded_instruction();
109 }
110 }
111
112-void X86EMU_trace_xregs (void)
113+void
114+X86EMU_trace_xregs(void)
115 {
116- if (DEBUG_TRACE()) {
117- x86emu_dump_xregs();
118+ if (DEBUG_TRACE()) {
119+ x86emu_dump_xregs();
120 }
121 }
122
123-void x86emu_just_disassemble (void)
124+void
125+x86emu_just_disassemble(void)
126 {
127 /*
128 * This routine called if the flag DEBUG_DISASSEMBLE is set kind
129 * of a hack!
130 */
131- printk("%04x:%04x ",M.x86.saved_cs, M.x86.saved_ip);
132- print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip);
133- print_decoded_instruction();
134+ printk("%04x:%04x ", M.x86.saved_cs, M.x86.saved_ip);
135+ print_encoded_bytes(M.x86.saved_cs, M.x86.saved_ip);
136+ print_decoded_instruction();
137 }
138
139-static void disassemble_forward (u16 seg, u16 off, int n)
140+static void
141+disassemble_forward(u16 seg, u16 off, int n)
142 {
143- X86EMU_sysEnv tregs;
144- int i;
145- u8 op1;
146+ X86EMU_sysEnv tregs;
147+ int i;
148+ u8 op1;
149+
150 /*
151 * hack, hack, hack. What we do is use the exact machinery set up
152 * for execution, except that now there is an additional state
153@@ -111,17 +118,17 @@ static void disassemble_forward (u16 seg, u16 off, int n)
154 * This was done for an entirely different reason, but makes a
155 * nice way to get the system to help debug codes.
156 */
157- tregs = M;
158+ tregs = M;
159 tregs.x86.R_IP = off;
160 tregs.x86.R_CS = seg;
161-
162+
163 /* reset the decoding buffers */
164 tregs.x86.enc_str_pos = 0;
165 tregs.x86.enc_pos = 0;
166-
167+
168 /* turn on the "disassemble only, no execute" flag */
169 tregs.x86.debug |= DEBUG_DISASSEMBLE_F;
170-
171+
172 /* DUMP NEXT n instructions to screen in straight_line fashion */
173 /*
174 * This looks like the regular instruction fetch stream, except
175@@ -130,299 +137,359 @@ static void disassemble_forward (u16 seg, u16 off, int n)
176 * the instruction. XXX --- CHECK THAT MEM IS NOT AFFECTED!!!
177 * Note the use of a copy of the register structure...
178 */
179- for (i=0; i<n; i++) {
180- op1 = (*sys_rdb)(((u32)M.x86.R_CS<<4) + (M.x86.R_IP++));
181- (x86emu_optab[op1])(op1);
182+ for (i = 0; i < n; i++) {
183+ op1 = (*sys_rdb) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP++));
184+ (x86emu_optab[op1]) (op1);
185 }
186 /* end major hack mode. */
187 }
188
189-void x86emu_check_ip_access (void)
190+void
191+x86emu_check_ip_access(void)
192 {
193 /* NULL as of now */
194 }
195
196-void x86emu_check_sp_access (void)
197+void
198+x86emu_check_sp_access(void)
199 {
200 }
201
202-void x86emu_check_mem_access (u32 dummy)
203+void
204+x86emu_check_mem_access(u32 dummy)
205 {
206- /* check bounds, etc */
207+ /* check bounds, etc */
208 }
209
210-void x86emu_check_data_access (uint dummy1, uint dummy2)
211+void
212+x86emu_check_data_access(uint dummy1, uint dummy2)
213 {
214- /* check bounds, etc */
215+ /* check bounds, etc */
216 }
217
218-void x86emu_inc_decoded_inst_len (int x)
219+void
220+x86emu_inc_decoded_inst_len(int x)
221 {
222- M.x86.enc_pos += x;
223+ M.x86.enc_pos += x;
224 }
225
226-void x86emu_decode_printf (char *x)
227+void
228+x86emu_decode_printf(const char *x)
229 {
230- sprintf(M.x86.decoded_buf+M.x86.enc_str_pos,"%s",x);
231- M.x86.enc_str_pos += strlen(x);
232+ sprintf(M.x86.decoded_buf + M.x86.enc_str_pos, "%s", x);
233+ M.x86.enc_str_pos += strlen(x);
234 }
235
236-void x86emu_decode_printf2 (char *x, int y)
237+void
238+x86emu_decode_printf2(const char *x, int y)
239 {
240- char temp[100];
241- sprintf(temp,x,y);
242- sprintf(M.x86.decoded_buf+M.x86.enc_str_pos,"%s",temp);
243- M.x86.enc_str_pos += strlen(temp);
244+ char temp[100];
245+
246+ snprintf(temp, sizeof(temp), x, y);
247+ sprintf(M.x86.decoded_buf + M.x86.enc_str_pos, "%s", temp);
248+ M.x86.enc_str_pos += strlen(temp);
249 }
250
251-void x86emu_end_instr (void)
252+void
253+x86emu_end_instr(void)
254 {
255- M.x86.enc_str_pos = 0;
256- M.x86.enc_pos = 0;
257+ M.x86.enc_str_pos = 0;
258+ M.x86.enc_pos = 0;
259 }
260
261-static void print_encoded_bytes (u16 s, u16 o)
262+static void
263+print_encoded_bytes(u16 s, u16 o)
264 {
265 int i;
266 char buf1[64];
267- for (i=0; i< M.x86.enc_pos; i++) {
268- sprintf(buf1+2*i,"%02x", fetch_data_byte_abs(s,o+i));
269+
270+ for (i = 0; i < M.x86.enc_pos; i++) {
271+ sprintf(buf1 + 2 * i, "%02x", fetch_data_byte_abs(s, o + i));
272 }
273- printk("%-20s",buf1);
274+ printk("%-20s", buf1);
275 }
276
277-static void print_decoded_instruction (void)
278+static void
279+print_decoded_instruction(void)
280 {
281- printk("%s", M.x86.decoded_buf);
282+ printk("%s", M.x86.decoded_buf);
283 }
284
285-void x86emu_print_int_vect (u16 iv)
286+void
287+x86emu_print_int_vect(u16 iv)
288 {
289- u16 seg,off;
290+ u16 seg, off;
291
292- if (iv > 256) return;
293- seg = fetch_data_word_abs(0,iv*4);
294- off = fetch_data_word_abs(0,iv*4+2);
295- printk("%04x:%04x ", seg, off);
296+ if (iv > 256)
297+ return;
298+ seg = fetch_data_word_abs(0, iv * 4);
299+ off = fetch_data_word_abs(0, iv * 4 + 2);
300+ printk("%04x:%04x ", seg, off);
301 }
302
303-void X86EMU_dump_memory (u16 seg, u16 off, u32 amt)
304+void
305+X86EMU_dump_memory(u16 seg, u16 off, u32 amt)
306 {
307- u32 start = off & 0xfffffff0;
308- u32 end = (off+16) & 0xfffffff0;
309- u32 i;
310- u32 current;
311-
312- current = start;
313- while (end <= off + amt) {
314- printk("%04x:%04x ", seg, start);
315- for (i=start; i< off; i++)
316- printk(" ");
317- for ( ; i< end; i++)
318- printk("%02x ", fetch_data_byte_abs(seg,i));
319- printk("\n");
320- start = end;
321- end = start + 16;
322- }
323+ u32 start = off & 0xfffffff0;
324+ u32 end = (off + 16) & 0xfffffff0;
325+ u32 i;
326+ u32 current;
327+
328+ current = start;
329+ while (end <= off + amt) {
330+ printk("%04x:%04x ", seg, start);
331+ for (i = start; i < off; i++)
332+ printk(" ");
333+ for (; i < end; i++)
334+ printk("%02x ", fetch_data_byte_abs(seg, i));
335+ printk("\n");
336+ start = end;
337+ end = start + 16;
338+ }
339 }
340
341-void x86emu_single_step (void)
342+void
343+x86emu_single_step(void)
344 {
345 char s[1024];
346 int ps[10];
347 int ntok;
348 int cmd;
349 int done;
350- int segment;
351+ int segment;
352 int offset;
353 static int breakpoint;
354 static int noDecode = 1;
355-
356+
357 char *p;
358
359- if (DEBUG_BREAK()) {
360- if (M.x86.saved_ip != breakpoint) {
361- return;
362- } else {
363- M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
364- M.x86.debug |= DEBUG_TRACE_F;
365- M.x86.debug &= ~DEBUG_BREAK_F;
366- print_decoded_instruction ();
367- X86EMU_trace_regs();
368- }
369- }
370- done=0;
371- offset = M.x86.saved_ip;
372+ if (DEBUG_BREAK()) {
373+ if (M.x86.saved_ip != breakpoint) {
374+ return;
375+ }
376+ else {
377+ M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
378+ M.x86.debug |= DEBUG_TRACE_F;
379+ M.x86.debug &= ~DEBUG_BREAK_F;
380+ print_decoded_instruction();
381+ X86EMU_trace_regs();
382+ }
383+ }
384+ done = 0;
385+ offset = M.x86.saved_ip;
386 while (!done) {
387 printk("-");
388 p = fgets(s, 1023, stdin);
389 cmd = parse_line(s, ps, &ntok);
390- switch(cmd) {
391- case 'u':
392- disassemble_forward(M.x86.saved_cs,(u16)offset,10);
393+ switch (cmd) {
394+ case 'u':
395+ disassemble_forward(M.x86.saved_cs, (u16) offset, 10);
396 break;
397- case 'd':
398- if (ntok == 2) {
399- segment = M.x86.saved_cs;
400- offset = ps[1];
401- X86EMU_dump_memory(segment,(u16)offset,16);
402- offset += 16;
403- } else if (ntok == 3) {
404- segment = ps[1];
405- offset = ps[2];
406- X86EMU_dump_memory(segment,(u16)offset,16);
407- offset += 16;
408- } else {
409- segment = M.x86.saved_cs;
410- X86EMU_dump_memory(segment,(u16)offset,16);
411- offset += 16;
412- }
413+ case 'd':
414+ if (ntok == 2) {
415+ segment = M.x86.saved_cs;
416+ offset = ps[1];
417+ X86EMU_dump_memory(segment, (u16) offset, 16);
418+ offset += 16;
419+ }
420+ else if (ntok == 3) {
421+ segment = ps[1];
422+ offset = ps[2];
423+ X86EMU_dump_memory(segment, (u16) offset, 16);
424+ offset += 16;
425+ }
426+ else {
427+ segment = M.x86.saved_cs;
428+ X86EMU_dump_memory(segment, (u16) offset, 16);
429+ offset += 16;
430+ }
431 break;
432- case 'c':
433- M.x86.debug ^= DEBUG_TRACECALL_F;
434+ case 'c':
435+ M.x86.debug ^= DEBUG_TRACECALL_F;
436 break;
437- case 's':
438- M.x86.debug ^= DEBUG_SVC_F | DEBUG_SYS_F | DEBUG_SYSINT_F;
439+ case 's':
440+ M.x86.debug ^= DEBUG_SVC_F | DEBUG_SYS_F | DEBUG_SYSINT_F;
441 break;
442- case 'r':
443- X86EMU_trace_regs();
444+ case 'r':
445+ X86EMU_trace_regs();
446 break;
447- case 'x':
448- X86EMU_trace_xregs();
449+ case 'x':
450+ X86EMU_trace_xregs();
451 break;
452- case 'g':
453+ case 'g':
454 if (ntok == 2) {
455 breakpoint = ps[1];
456- if (noDecode) {
457- M.x86.debug |= DEBUG_DECODE_NOPRINT_F;
458- } else {
459- M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
460- }
461- M.x86.debug &= ~DEBUG_TRACE_F;
462- M.x86.debug |= DEBUG_BREAK_F;
463- done = 1;
464+ if (noDecode) {
465+ M.x86.debug |= DEBUG_DECODE_NOPRINT_F;
466+ }
467+ else {
468+ M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
469+ }
470+ M.x86.debug &= ~DEBUG_TRACE_F;
471+ M.x86.debug |= DEBUG_BREAK_F;
472+ done = 1;
473 }
474 break;
475- case 'q':
476- M.x86.debug |= DEBUG_EXIT;
477- return;
478- case 'P':
479- noDecode = (noDecode)?0:1;
480- printk("Toggled decoding to %s\n",(noDecode)?"FALSE":"TRUE");
481- break;
482- case 't':
483- case 0:
484+ case 'q':
485+ M.x86.debug |= DEBUG_EXIT;
486+ return;
487+ case 'P':
488+ noDecode = (noDecode) ? 0 : 1;
489+ printk("Toggled decoding to %s\n", (noDecode) ? "FALSE" : "TRUE");
490+ break;
491+ case 't':
492+ case 0:
493 done = 1;
494 break;
495- }
496+ }
497 }
498 }
499
500-int X86EMU_trace_on(void)
501+int
502+X86EMU_trace_on(void)
503 {
504- return M.x86.debug |= DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F;
505+ return M.x86.debug |= DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F;
506 }
507
508-int X86EMU_trace_off(void)
509+int
510+X86EMU_trace_off(void)
511 {
512- return M.x86.debug &= ~(DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F);
513+ return M.x86.debug &= ~(DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F);
514 }
515
516-static int parse_line (char *s, int *ps, int *n)
517+static int
518+parse_line(char *s, int *ps, int *n)
519 {
520 int cmd;
521
522 *n = 0;
523- while(*s == ' ' || *s == '\t') s++;
524+ while (*s == ' ' || *s == '\t')
525+ s++;
526 ps[*n] = *s;
527 switch (*s) {
528- case '\n':
529+ case '\n':
530 *n += 1;
531 return 0;
532- default:
533+ default:
534 cmd = *s;
535 *n += 1;
536 }
537
538- while (1) {
539- while (*s != ' ' && *s != '\t' && *s != '\n') s++;
540-
541- if (*s == '\n')
542- return cmd;
543-
544- while(*s == ' ' || *s == '\t') s++;
545-
546- sscanf(s,"%x",&ps[*n]);
547- *n += 1;
548- }
549+ while (1) {
550+ while (*s != ' ' && *s != '\t' && *s != '\n')
551+ s++;
552+
553+ if (*s == '\n')
554+ return cmd;
555+
556+ while (*s == ' ' || *s == '\t')
557+ s++;
558+
559+ sscanf(s, "%x", &ps[*n]);
560+ *n += 1;
561+ }
562 }
563
564-#endif /* DEBUG */
565+#endif /* DEBUG */
566
567-void x86emu_dump_regs (void)
568+void
569+x86emu_dump_regs(void)
570 {
571- printk("\tAX=%04x ", M.x86.R_AX );
572- printk("BX=%04x ", M.x86.R_BX );
573- printk("CX=%04x ", M.x86.R_CX );
574- printk("DX=%04x ", M.x86.R_DX );
575- printk("SP=%04x ", M.x86.R_SP );
576- printk("BP=%04x ", M.x86.R_BP );
577- printk("SI=%04x ", M.x86.R_SI );
578- printk("DI=%04x\n", M.x86.R_DI );
579- printk("\tDS=%04x ", M.x86.R_DS );
580- printk("ES=%04x ", M.x86.R_ES );
581- printk("SS=%04x ", M.x86.R_SS );
582- printk("CS=%04x ", M.x86.R_CS );
583- printk("IP=%04x ", M.x86.R_IP );
584- if (ACCESS_FLAG(F_OF)) printk("OV "); /* CHECKED... */
585- else printk("NV ");
586- if (ACCESS_FLAG(F_DF)) printk("DN ");
587- else printk("UP ");
588- if (ACCESS_FLAG(F_IF)) printk("EI ");
589- else printk("DI ");
590- if (ACCESS_FLAG(F_SF)) printk("NG ");
591- else printk("PL ");
592- if (ACCESS_FLAG(F_ZF)) printk("ZR ");
593- else printk("NZ ");
594- if (ACCESS_FLAG(F_AF)) printk("AC ");
595- else printk("NA ");
596- if (ACCESS_FLAG(F_PF)) printk("PE ");
597- else printk("PO ");
598- if (ACCESS_FLAG(F_CF)) printk("CY ");
599- else printk("NC ");
600- printk("\n");
601+ printk("\tAX=%04x ", M.x86.R_AX);
602+ printk("BX=%04x ", M.x86.R_BX);
603+ printk("CX=%04x ", M.x86.R_CX);
604+ printk("DX=%04x ", M.x86.R_DX);
605+ printk("SP=%04x ", M.x86.R_SP);
606+ printk("BP=%04x ", M.x86.R_BP);
607+ printk("SI=%04x ", M.x86.R_SI);
608+ printk("DI=%04x\n", M.x86.R_DI);
609+ printk("\tDS=%04x ", M.x86.R_DS);
610+ printk("ES=%04x ", M.x86.R_ES);
611+ printk("SS=%04x ", M.x86.R_SS);
612+ printk("CS=%04x ", M.x86.R_CS);
613+ printk("IP=%04x ", M.x86.R_IP);
614+ if (ACCESS_FLAG(F_OF))
615+ printk("OV "); /* CHECKED... */
616+ else
617+ printk("NV ");
618+ if (ACCESS_FLAG(F_DF))
619+ printk("DN ");
620+ else
621+ printk("UP ");
622+ if (ACCESS_FLAG(F_IF))
623+ printk("EI ");
624+ else
625+ printk("DI ");
626+ if (ACCESS_FLAG(F_SF))
627+ printk("NG ");
628+ else
629+ printk("PL ");
630+ if (ACCESS_FLAG(F_ZF))
631+ printk("ZR ");
632+ else
633+ printk("NZ ");
634+ if (ACCESS_FLAG(F_AF))
635+ printk("AC ");
636+ else
637+ printk("NA ");
638+ if (ACCESS_FLAG(F_PF))
639+ printk("PE ");
640+ else
641+ printk("PO ");
642+ if (ACCESS_FLAG(F_CF))
643+ printk("CY ");
644+ else
645+ printk("NC ");
646+ printk("\n");
647 }
648
649-void x86emu_dump_xregs (void)
650+void
651+x86emu_dump_xregs(void)
652 {
653- printk("\tEAX=%08x ", M.x86.R_EAX );
654- printk("EBX=%08x ", M.x86.R_EBX );
655- printk("ECX=%08x ", M.x86.R_ECX );
656- printk("EDX=%08x \n", M.x86.R_EDX );
657- printk("\tESP=%08x ", M.x86.R_ESP );
658- printk("EBP=%08x ", M.x86.R_EBP );
659- printk("ESI=%08x ", M.x86.R_ESI );
660- printk("EDI=%08x\n", M.x86.R_EDI );
661- printk("\tDS=%04x ", M.x86.R_DS );
662- printk("ES=%04x ", M.x86.R_ES );
663- printk("SS=%04x ", M.x86.R_SS );
664- printk("CS=%04x ", M.x86.R_CS );
665- printk("EIP=%08x\n\t", M.x86.R_EIP );
666- if (ACCESS_FLAG(F_OF)) printk("OV "); /* CHECKED... */
667- else printk("NV ");
668- if (ACCESS_FLAG(F_DF)) printk("DN ");
669- else printk("UP ");
670- if (ACCESS_FLAG(F_IF)) printk("EI ");
671- else printk("DI ");
672- if (ACCESS_FLAG(F_SF)) printk("NG ");
673- else printk("PL ");
674- if (ACCESS_FLAG(F_ZF)) printk("ZR ");
675- else printk("NZ ");
676- if (ACCESS_FLAG(F_AF)) printk("AC ");
677- else printk("NA ");
678- if (ACCESS_FLAG(F_PF)) printk("PE ");
679- else printk("PO ");
680- if (ACCESS_FLAG(F_CF)) printk("CY ");
681- else printk("NC ");
682- printk("\n");
683+ printk("\tEAX=%08x ", M.x86.R_EAX);
684+ printk("EBX=%08x ", M.x86.R_EBX);
685+ printk("ECX=%08x ", M.x86.R_ECX);
686+ printk("EDX=%08x \n", M.x86.R_EDX);
687+ printk("\tESP=%08x ", M.x86.R_ESP);
688+ printk("EBP=%08x ", M.x86.R_EBP);
689+ printk("ESI=%08x ", M.x86.R_ESI);
690+ printk("EDI=%08x\n", M.x86.R_EDI);
691+ printk("\tDS=%04x ", M.x86.R_DS);
692+ printk("ES=%04x ", M.x86.R_ES);
693+ printk("SS=%04x ", M.x86.R_SS);
694+ printk("CS=%04x ", M.x86.R_CS);
695+ printk("EIP=%08x\n\t", M.x86.R_EIP);
696+ if (ACCESS_FLAG(F_OF))
697+ printk("OV "); /* CHECKED... */
698+ else
699+ printk("NV ");
700+ if (ACCESS_FLAG(F_DF))
701+ printk("DN ");
702+ else
703+ printk("UP ");
704+ if (ACCESS_FLAG(F_IF))
705+ printk("EI ");
706+ else
707+ printk("DI ");
708+ if (ACCESS_FLAG(F_SF))
709+ printk("NG ");
710+ else
711+ printk("PL ");
712+ if (ACCESS_FLAG(F_ZF))
713+ printk("ZR ");
714+ else
715+ printk("NZ ");
716+ if (ACCESS_FLAG(F_AF))
717+ printk("AC ");
718+ else
719+ printk("NA ");
720+ if (ACCESS_FLAG(F_PF))
721+ printk("PE ");
722+ else
723+ printk("PO ");
724+ if (ACCESS_FLAG(F_CF))
725+ printk("CY ");
726+ else
727+ printk("NC ");
728+ printk("\n");
729 }
730diff --git a/libs/x86emu/decode.c b/libs/x86emu/decode.c
731index 7d9a34a..12f8fb8 100644
732--- a/libs/x86emu/decode.c
733+++ b/libs/x86emu/decode.c
734@@ -46,25 +46,27 @@
735 REMARKS:
736 Handles any pending asychronous interrupts.
737 ****************************************************************************/
738-static void x86emu_intr_handle(void)
739+static void
740+x86emu_intr_handle(void)
741 {
742- u8 intno;
743-
744- if (M.x86.intr & INTR_SYNCH) {
745- intno = M.x86.intno;
746- if (_X86EMU_intrTab[intno]) {
747- (*_X86EMU_intrTab[intno])(intno);
748- } else {
749- push_word((u16)M.x86.R_FLG);
750- CLEAR_FLAG(F_IF);
751- CLEAR_FLAG(F_TF);
752- push_word(M.x86.R_CS);
753- M.x86.R_CS = mem_access_word(intno * 4 + 2);
754- push_word(M.x86.R_IP);
755- M.x86.R_IP = mem_access_word(intno * 4);
756- M.x86.intr = 0;
757- }
758- }
759+ u8 intno;
760+
761+ if (M.x86.intr & INTR_SYNCH) {
762+ intno = M.x86.intno;
763+ if (_X86EMU_intrTab[intno]) {
764+ (*_X86EMU_intrTab[intno]) (intno);
765+ }
766+ else {
767+ push_word((u16) M.x86.R_FLG);
768+ CLEAR_FLAG(F_IF);
769+ CLEAR_FLAG(F_TF);
770+ push_word(M.x86.R_CS);
771+ M.x86.R_CS = mem_access_word(intno * 4 + 2);
772+ push_word(M.x86.R_IP);
773+ M.x86.R_IP = mem_access_word(intno * 4);
774+ M.x86.intr = 0;
775+ }
776+ }
777 }
778
779 /****************************************************************************
780@@ -75,11 +77,11 @@ REMARKS:
781 Raise the specified interrupt to be handled before the execution of the
782 next instruction.
783 ****************************************************************************/
784-void x86emu_intr_raise(
785- u8 intrnum)
786+void
787+x86emu_intr_raise(u8 intrnum)
788 {
789- M.x86.intno = intrnum;
790- M.x86.intr |= INTR_SYNCH;
791+ M.x86.intno = intrnum;
792+ M.x86.intr |= INTR_SYNCH;
793 }
794
795 /****************************************************************************
796@@ -88,39 +90,39 @@ Main execution loop for the emulator. We return from here when the system
797 halts, which is normally caused by a stack fault when we return from the
798 original real mode call.
799 ****************************************************************************/
800-void X86EMU_exec(void)
801+void
802+X86EMU_exec(void)
803 {
804- u8 op1;
805-
806- M.x86.intr = 0;
807- DB(x86emu_end_instr();)
808-
809- for (;;) {
810-DB( if (CHECK_IP_FETCH())
811- x86emu_check_ip_access();)
812- /* If debugging, save the IP and CS values. */
813- SAVE_IP_CS(M.x86.R_CS, M.x86.R_IP);
814- INC_DECODED_INST_LEN(1);
815- if (M.x86.intr) {
816- if (M.x86.intr & INTR_HALTED) {
817-DB( if (M.x86.R_SP != 0) {
818- printk("halted\n");
819- X86EMU_trace_regs();
820- }
821- else {
822- if (M.x86.debug)
823- printk("Service completed successfully\n");
824- })
825- return;
826+ u8 op1;
827+
828+ M.x86.intr = 0;
829+ DB(x86emu_end_instr();
830+ )
831+
832+ for (;;) {
833+ DB(if (CHECK_IP_FETCH())
834+ x86emu_check_ip_access();)
835+ /* If debugging, save the IP and CS values. */
836+ SAVE_IP_CS(M.x86.R_CS, M.x86.R_IP);
837+ INC_DECODED_INST_LEN(1);
838+ if (M.x86.intr) {
839+ if (M.x86.intr & INTR_HALTED) {
840+ DB(if (M.x86.R_SP != 0) {
841+ printk("halted\n"); X86EMU_trace_regs();}
842+ else {
843+ if (M.x86.debug)
844+ printk("Service completed successfully\n");}
845+ )
846+ return;
847 }
848- if (((M.x86.intr & INTR_SYNCH) && (M.x86.intno == 0 || M.x86.intno == 2)) ||
849- !ACCESS_FLAG(F_IF)) {
850- x86emu_intr_handle();
851- }
852- }
853-
854- op1 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
855- (*x86emu_optab[op1])(op1);
856+ if (((M.x86.intr & INTR_SYNCH) &&
857+ (M.x86.intno == 0 || M.x86.intno == 2)) ||
858+ !ACCESS_FLAG(F_IF)) {
859+ x86emu_intr_handle();
860+ }
861+ }
862+ op1 = (*sys_rdb) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP++));
863+ (*x86emu_optab[op1]) (op1);
864 if (M.x86.debug & DEBUG_EXIT) {
865 M.x86.debug &= ~DEBUG_EXIT;
866 return;
867@@ -132,9 +134,10 @@ DB( if (M.x86.R_SP != 0) {
868 REMARKS:
869 Halts the system by setting the halted system flag.
870 ****************************************************************************/
871-void X86EMU_halt_sys(void)
872+void
873+X86EMU_halt_sys(void)
874 {
875- M.x86.intr |= INTR_HALTED;
876+ M.x86.intr |= INTR_HALTED;
877 }
878
879 /****************************************************************************
880@@ -149,19 +152,17 @@ next instruction.
881
882 NOTE: Do not inline this function, as (*sys_rdb) is already inline!
883 ****************************************************************************/
884-void fetch_decode_modrm(
885- int *mod,
886- int *regh,
887- int *regl)
888+void
889+fetch_decode_modrm(int *mod, int *regh, int *regl)
890 {
891- int fetched;
892-
893-DB( if (CHECK_IP_FETCH())
894- x86emu_check_ip_access();)
895- fetched = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
896- INC_DECODED_INST_LEN(1);
897- *mod = (fetched >> 6) & 0x03;
898- *regh = (fetched >> 3) & 0x07;
899+ int fetched;
900+
901+ DB(if (CHECK_IP_FETCH())
902+ x86emu_check_ip_access();)
903+ fetched = (*sys_rdb) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP++));
904+ INC_DECODED_INST_LEN(1);
905+ *mod = (fetched >> 6) & 0x03;
906+ *regh = (fetched >> 3) & 0x07;
907 *regl = (fetched >> 0) & 0x07;
908 }
909
910@@ -175,15 +176,16 @@ moves the instruction pointer to the next value.
911
912 NOTE: Do not inline this function, as (*sys_rdb) is already inline!
913 ****************************************************************************/
914-u8 fetch_byte_imm(void)
915+u8
916+fetch_byte_imm(void)
917 {
918- u8 fetched;
919+ u8 fetched;
920
921-DB( if (CHECK_IP_FETCH())
922- x86emu_check_ip_access();)
923- fetched = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
924- INC_DECODED_INST_LEN(1);
925- return fetched;
926+ DB(if (CHECK_IP_FETCH())
927+ x86emu_check_ip_access();)
928+ fetched = (*sys_rdb) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP++));
929+ INC_DECODED_INST_LEN(1);
930+ return fetched;
931 }
932
933 /****************************************************************************
934@@ -196,16 +198,17 @@ moves the instruction pointer to the next value.
935
936 NOTE: Do not inline this function, as (*sys_rdw) is already inline!
937 ****************************************************************************/
938-u16 fetch_word_imm(void)
939+u16
940+fetch_word_imm(void)
941 {
942- u16 fetched;
943-
944-DB( if (CHECK_IP_FETCH())
945- x86emu_check_ip_access();)
946- fetched = (*sys_rdw)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP));
947- M.x86.R_IP += 2;
948- INC_DECODED_INST_LEN(2);
949- return fetched;
950+ u16 fetched;
951+
952+ DB(if (CHECK_IP_FETCH())
953+ x86emu_check_ip_access();)
954+ fetched = (*sys_rdw) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP));
955+ M.x86.R_IP += 2;
956+ INC_DECODED_INST_LEN(2);
957+ return fetched;
958 }
959
960 /****************************************************************************
961@@ -218,16 +221,17 @@ moves the instruction pointer to the next value.
962
963 NOTE: Do not inline this function, as (*sys_rdw) is already inline!
964 ****************************************************************************/
965-u32 fetch_long_imm(void)
966+u32
967+fetch_long_imm(void)
968 {
969- u32 fetched;
970-
971-DB( if (CHECK_IP_FETCH())
972- x86emu_check_ip_access();)
973- fetched = (*sys_rdl)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP));
974- M.x86.R_IP += 4;
975- INC_DECODED_INST_LEN(4);
976- return fetched;
977+ u32 fetched;
978+
979+ DB(if (CHECK_IP_FETCH())
980+ x86emu_check_ip_access();)
981+ fetched = (*sys_rdl) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP));
982+ M.x86.R_IP += 4;
983+ INC_DECODED_INST_LEN(4);
984+ return fetched;
985 }
986
987 /****************************************************************************
988@@ -259,38 +263,39 @@ cpu-state-varible M.x86.mode. There are several potential states:
989
990 Each of the above 7 items are handled with a bit in the mode field.
991 ****************************************************************************/
992-_INLINE u32 get_data_segment(void)
993+_INLINE u32
994+get_data_segment(void)
995 {
996 #define GET_SEGMENT(segment)
997- switch (M.x86.mode & SYSMODE_SEGMASK) {
998- case 0: /* default case: use ds register */
999- case SYSMODE_SEGOVR_DS:
1000- case SYSMODE_SEGOVR_DS | SYSMODE_SEG_DS_SS:
1001- return M.x86.R_DS;
1002- case SYSMODE_SEG_DS_SS: /* non-overridden, use ss register */
1003- return M.x86.R_SS;
1004- case SYSMODE_SEGOVR_CS:
1005- case SYSMODE_SEGOVR_CS | SYSMODE_SEG_DS_SS:
1006- return M.x86.R_CS;
1007- case SYSMODE_SEGOVR_ES:
1008- case SYSMODE_SEGOVR_ES | SYSMODE_SEG_DS_SS:
1009- return M.x86.R_ES;
1010- case SYSMODE_SEGOVR_FS:
1011- case SYSMODE_SEGOVR_FS | SYSMODE_SEG_DS_SS:
1012- return M.x86.R_FS;
1013- case SYSMODE_SEGOVR_GS:
1014- case SYSMODE_SEGOVR_GS | SYSMODE_SEG_DS_SS:
1015- return M.x86.R_GS;
1016- case SYSMODE_SEGOVR_SS:
1017- case SYSMODE_SEGOVR_SS | SYSMODE_SEG_DS_SS:
1018- return M.x86.R_SS;
1019- default:
1020+ switch (M.x86.mode & SYSMODE_SEGMASK) {
1021+ case 0: /* default case: use ds register */
1022+ case SYSMODE_SEGOVR_DS:
1023+ case SYSMODE_SEGOVR_DS | SYSMODE_SEG_DS_SS:
1024+ return M.x86.R_DS;
1025+ case SYSMODE_SEG_DS_SS: /* non-overridden, use ss register */
1026+ return M.x86.R_SS;
1027+ case SYSMODE_SEGOVR_CS:
1028+ case SYSMODE_SEGOVR_CS | SYSMODE_SEG_DS_SS:
1029+ return M.x86.R_CS;
1030+ case SYSMODE_SEGOVR_ES:
1031+ case SYSMODE_SEGOVR_ES | SYSMODE_SEG_DS_SS:
1032+ return M.x86.R_ES;
1033+ case SYSMODE_SEGOVR_FS:
1034+ case SYSMODE_SEGOVR_FS | SYSMODE_SEG_DS_SS:
1035+ return M.x86.R_FS;
1036+ case SYSMODE_SEGOVR_GS:
1037+ case SYSMODE_SEGOVR_GS | SYSMODE_SEG_DS_SS:
1038+ return M.x86.R_GS;
1039+ case SYSMODE_SEGOVR_SS:
1040+ case SYSMODE_SEGOVR_SS | SYSMODE_SEG_DS_SS:
1041+ return M.x86.R_SS;
1042+ default:
1043 #ifdef DEBUG
1044- printk("error: should not happen: multiple overrides.\n");
1045+ printk("error: should not happen: multiple overrides.\n");
1046 #endif
1047- HALT_SYS();
1048- return 0;
1049- }
1050+ HALT_SYS();
1051+ return 0;
1052+ }
1053 }
1054
1055 /****************************************************************************
1056@@ -302,14 +307,14 @@ Byte value read from the absolute memory location.
1057
1058 NOTE: Do not inline this function as (*sys_rdX) is already inline!
1059 ****************************************************************************/
1060-u8 fetch_data_byte(
1061- uint offset)
1062+u8
1063+fetch_data_byte(uint offset)
1064 {
1065 #ifdef DEBUG
1066- if (CHECK_DATA_ACCESS())
1067- x86emu_check_data_access((u16)get_data_segment(), offset);
1068+ if (CHECK_DATA_ACCESS())
1069+ x86emu_check_data_access((u16) get_data_segment(), offset);
1070 #endif
1071- return (*sys_rdb)((get_data_segment() << 4) + offset);
1072+ return (*sys_rdb) ((get_data_segment() << 4) + offset);
1073 }
1074
1075 /****************************************************************************
1076@@ -321,14 +326,14 @@ Word value read from the absolute memory location.
1077
1078 NOTE: Do not inline this function as (*sys_rdX) is already inline!
1079 ****************************************************************************/
1080-u16 fetch_data_word(
1081- uint offset)
1082+u16
1083+fetch_data_word(uint offset)
1084 {
1085 #ifdef DEBUG
1086- if (CHECK_DATA_ACCESS())
1087- x86emu_check_data_access((u16)get_data_segment(), offset);
1088+ if (CHECK_DATA_ACCESS())
1089+ x86emu_check_data_access((u16) get_data_segment(), offset);
1090 #endif
1091- return (*sys_rdw)((get_data_segment() << 4) + offset);
1092+ return (*sys_rdw) ((get_data_segment() << 4) + offset);
1093 }
1094
1095 /****************************************************************************
1096@@ -340,14 +345,14 @@ Long value read from the absolute memory location.
1097
1098 NOTE: Do not inline this function as (*sys_rdX) is already inline!
1099 ****************************************************************************/
1100-u32 fetch_data_long(
1101- uint offset)
1102+u32
1103+fetch_data_long(uint offset)
1104 {
1105 #ifdef DEBUG
1106- if (CHECK_DATA_ACCESS())
1107- x86emu_check_data_access((u16)get_data_segment(), offset);
1108+ if (CHECK_DATA_ACCESS())
1109+ x86emu_check_data_access((u16) get_data_segment(), offset);
1110 #endif
1111- return (*sys_rdl)((get_data_segment() << 4) + offset);
1112+ return (*sys_rdl) ((get_data_segment() << 4) + offset);
1113 }
1114
1115 /****************************************************************************
1116@@ -360,15 +365,14 @@ Byte value read from the absolute memory location.
1117
1118 NOTE: Do not inline this function as (*sys_rdX) is already inline!
1119 ****************************************************************************/
1120-u8 fetch_data_byte_abs(
1121- uint segment,
1122- uint offset)
1123+u8
1124+fetch_data_byte_abs(uint segment, uint offset)
1125 {
1126 #ifdef DEBUG
1127- if (CHECK_DATA_ACCESS())
1128- x86emu_check_data_access(segment, offset);
1129+ if (CHECK_DATA_ACCESS())
1130+ x86emu_check_data_access(segment, offset);
1131 #endif
1132- return (*sys_rdb)(((u32)segment << 4) + offset);
1133+ return (*sys_rdb) (((u32) segment << 4) + offset);
1134 }
1135
1136 /****************************************************************************
1137@@ -381,15 +385,14 @@ Word value read from the absolute memory location.
1138
1139 NOTE: Do not inline this function as (*sys_rdX) is already inline!
1140 ****************************************************************************/
1141-u16 fetch_data_word_abs(
1142- uint segment,
1143- uint offset)
1144+u16
1145+fetch_data_word_abs(uint segment, uint offset)
1146 {
1147 #ifdef DEBUG
1148- if (CHECK_DATA_ACCESS())
1149- x86emu_check_data_access(segment, offset);
1150+ if (CHECK_DATA_ACCESS())
1151+ x86emu_check_data_access(segment, offset);
1152 #endif
1153- return (*sys_rdw)(((u32)segment << 4) + offset);
1154+ return (*sys_rdw) (((u32) segment << 4) + offset);
1155 }
1156
1157 /****************************************************************************
1158@@ -402,15 +405,14 @@ Long value read from the absolute memory location.
1159
1160 NOTE: Do not inline this function as (*sys_rdX) is already inline!
1161 ****************************************************************************/
1162-u32 fetch_data_long_abs(
1163- uint segment,
1164- uint offset)
1165+u32
1166+fetch_data_long_abs(uint segment, uint offset)
1167 {
1168 #ifdef DEBUG
1169- if (CHECK_DATA_ACCESS())
1170- x86emu_check_data_access(segment, offset);
1171+ if (CHECK_DATA_ACCESS())
1172+ x86emu_check_data_access(segment, offset);
1173 #endif
1174- return (*sys_rdl)(((u32)segment << 4) + offset);
1175+ return (*sys_rdl) (((u32) segment << 4) + offset);
1176 }
1177
1178 /****************************************************************************
1179@@ -424,15 +426,14 @@ the current 'default' segment, which may have been overridden.
1180
1181 NOTE: Do not inline this function as (*sys_wrX) is already inline!
1182 ****************************************************************************/
1183-void store_data_byte(
1184- uint offset,
1185- u8 val)
1186+void
1187+store_data_byte(uint offset, u8 val)
1188 {
1189 #ifdef DEBUG
1190- if (CHECK_DATA_ACCESS())
1191- x86emu_check_data_access((u16)get_data_segment(), offset);
1192+ if (CHECK_DATA_ACCESS())
1193+ x86emu_check_data_access((u16) get_data_segment(), offset);
1194 #endif
1195- (*sys_wrb)((get_data_segment() << 4) + offset, val);
1196+ (*sys_wrb) ((get_data_segment() << 4) + offset, val);
1197 }
1198
1199 /****************************************************************************
1200@@ -446,15 +447,14 @@ the current 'default' segment, which may have been overridden.
1201
1202 NOTE: Do not inline this function as (*sys_wrX) is already inline!
1203 ****************************************************************************/
1204-void store_data_word(
1205- uint offset,
1206- u16 val)
1207+void
1208+store_data_word(uint offset, u16 val)
1209 {
1210 #ifdef DEBUG
1211- if (CHECK_DATA_ACCESS())
1212- x86emu_check_data_access((u16)get_data_segment(), offset);
1213+ if (CHECK_DATA_ACCESS())
1214+ x86emu_check_data_access((u16) get_data_segment(), offset);
1215 #endif
1216- (*sys_wrw)((get_data_segment() << 4) + offset, val);
1217+ (*sys_wrw) ((get_data_segment() << 4) + offset, val);
1218 }
1219
1220 /****************************************************************************
1221@@ -468,15 +468,14 @@ the current 'default' segment, which may have been overridden.
1222
1223 NOTE: Do not inline this function as (*sys_wrX) is already inline!
1224 ****************************************************************************/
1225-void store_data_long(
1226- uint offset,
1227- u32 val)
1228+void
1229+store_data_long(uint offset, u32 val)
1230 {
1231 #ifdef DEBUG
1232- if (CHECK_DATA_ACCESS())
1233- x86emu_check_data_access((u16)get_data_segment(), offset);
1234+ if (CHECK_DATA_ACCESS())
1235+ x86emu_check_data_access((u16) get_data_segment(), offset);
1236 #endif
1237- (*sys_wrl)((get_data_segment() << 4) + offset, val);
1238+ (*sys_wrl) ((get_data_segment() << 4) + offset, val);
1239 }
1240
1241 /****************************************************************************
1242@@ -490,16 +489,14 @@ Writes a byte value to an absolute memory location.
1243
1244 NOTE: Do not inline this function as (*sys_wrX) is already inline!
1245 ****************************************************************************/
1246-void store_data_byte_abs(
1247- uint segment,
1248- uint offset,
1249- u8 val)
1250+void
1251+store_data_byte_abs(uint segment, uint offset, u8 val)
1252 {
1253 #ifdef DEBUG
1254- if (CHECK_DATA_ACCESS())
1255- x86emu_check_data_access(segment, offset);
1256+ if (CHECK_DATA_ACCESS())
1257+ x86emu_check_data_access(segment, offset);
1258 #endif
1259- (*sys_wrb)(((u32)segment << 4) + offset, val);
1260+ (*sys_wrb) (((u32) segment << 4) + offset, val);
1261 }
1262
1263 /****************************************************************************
1264@@ -513,16 +510,14 @@ Writes a word value to an absolute memory location.
1265
1266 NOTE: Do not inline this function as (*sys_wrX) is already inline!
1267 ****************************************************************************/
1268-void store_data_word_abs(
1269- uint segment,
1270- uint offset,
1271- u16 val)
1272+void
1273+store_data_word_abs(uint segment, uint offset, u16 val)
1274 {
1275 #ifdef DEBUG
1276- if (CHECK_DATA_ACCESS())
1277- x86emu_check_data_access(segment, offset);
1278+ if (CHECK_DATA_ACCESS())
1279+ x86emu_check_data_access(segment, offset);
1280 #endif
1281- (*sys_wrw)(((u32)segment << 4) + offset, val);
1282+ (*sys_wrw) (((u32) segment << 4) + offset, val);
1283 }
1284
1285 /****************************************************************************
1286@@ -536,16 +531,14 @@ Writes a long value to an absolute memory location.
1287
1288 NOTE: Do not inline this function as (*sys_wrX) is already inline!
1289 ****************************************************************************/
1290-void store_data_long_abs(
1291- uint segment,
1292- uint offset,
1293- u32 val)
1294+void
1295+store_data_long_abs(uint segment, uint offset, u32 val)
1296 {
1297 #ifdef DEBUG
1298- if (CHECK_DATA_ACCESS())
1299- x86emu_check_data_access(segment, offset);
1300+ if (CHECK_DATA_ACCESS())
1301+ x86emu_check_data_access(segment, offset);
1302 #endif
1303- (*sys_wrl)(((u32)segment << 4) + offset, val);
1304+ (*sys_wrl) (((u32) segment << 4) + offset, val);
1305 }
1306
1307 /****************************************************************************
1308@@ -559,37 +552,37 @@ REMARKS:
1309 Return a pointer to the register given by the R/RM field of the
1310 modrm byte, for byte operands. Also enables the decoding of instructions.
1311 ****************************************************************************/
1312-u8* decode_rm_byte_register(
1313- int reg)
1314+u8 *
1315+decode_rm_byte_register(int reg)
1316 {
1317- switch (reg) {
1318- case 0:
1319- DECODE_PRINTF("AL");
1320- return &M.x86.R_AL;
1321- case 1:
1322- DECODE_PRINTF("CL");
1323- return &M.x86.R_CL;
1324- case 2:
1325- DECODE_PRINTF("DL");
1326- return &M.x86.R_DL;
1327- case 3:
1328- DECODE_PRINTF("BL");
1329- return &M.x86.R_BL;
1330- case 4:
1331- DECODE_PRINTF("AH");
1332- return &M.x86.R_AH;
1333- case 5:
1334- DECODE_PRINTF("CH");
1335- return &M.x86.R_CH;
1336- case 6:
1337- DECODE_PRINTF("DH");
1338- return &M.x86.R_DH;
1339- case 7:
1340- DECODE_PRINTF("BH");
1341- return &M.x86.R_BH;
1342- }
1343- HALT_SYS();
1344- return NULL; /* NOT REACHED OR REACHED ON ERROR */
1345+ switch (reg) {
1346+ case 0:
1347+ DECODE_PRINTF("AL");
1348+ return &M.x86.R_AL;
1349+ case 1:
1350+ DECODE_PRINTF("CL");
1351+ return &M.x86.R_CL;
1352+ case 2:
1353+ DECODE_PRINTF("DL");
1354+ return &M.x86.R_DL;
1355+ case 3:
1356+ DECODE_PRINTF("BL");
1357+ return &M.x86.R_BL;
1358+ case 4:
1359+ DECODE_PRINTF("AH");
1360+ return &M.x86.R_AH;
1361+ case 5:
1362+ DECODE_PRINTF("CH");
1363+ return &M.x86.R_CH;
1364+ case 6:
1365+ DECODE_PRINTF("DH");
1366+ return &M.x86.R_DH;
1367+ case 7:
1368+ DECODE_PRINTF("BH");
1369+ return &M.x86.R_BH;
1370+ }
1371+ HALT_SYS();
1372+ return NULL; /* NOT REACHED OR REACHED ON ERROR */
1373 }
1374
1375 /****************************************************************************
1376@@ -603,36 +596,36 @@ REMARKS:
1377 Return a pointer to the register given by the R/RM field of the
1378 modrm byte, for word operands. Also enables the decoding of instructions.
1379 ****************************************************************************/
1380-u16* decode_rm_word_register(
1381- int reg)
1382+u16 *
1383+decode_rm_word_register(int reg)
1384 {
1385- switch (reg) {
1386- case 0:
1387- DECODE_PRINTF("AX");
1388- return &M.x86.R_AX;
1389- case 1:
1390- DECODE_PRINTF("CX");
1391- return &M.x86.R_CX;
1392- case 2:
1393- DECODE_PRINTF("DX");
1394- return &M.x86.R_DX;
1395- case 3:
1396- DECODE_PRINTF("BX");
1397- return &M.x86.R_BX;
1398- case 4:
1399- DECODE_PRINTF("SP");
1400- return &M.x86.R_SP;
1401- case 5:
1402- DECODE_PRINTF("BP");
1403- return &M.x86.R_BP;
1404- case 6:
1405- DECODE_PRINTF("SI");
1406- return &M.x86.R_SI;
1407- case 7:
1408- DECODE_PRINTF("DI");
1409- return &M.x86.R_DI;
1410- }
1411- HALT_SYS();
1412+ switch (reg) {
1413+ case 0:
1414+ DECODE_PRINTF("AX");
1415+ return &M.x86.R_AX;
1416+ case 1:
1417+ DECODE_PRINTF("CX");
1418+ return &M.x86.R_CX;
1419+ case 2:
1420+ DECODE_PRINTF("DX");
1421+ return &M.x86.R_DX;
1422+ case 3:
1423+ DECODE_PRINTF("BX");
1424+ return &M.x86.R_BX;
1425+ case 4:
1426+ DECODE_PRINTF("SP");
1427+ return &M.x86.R_SP;
1428+ case 5:
1429+ DECODE_PRINTF("BP");
1430+ return &M.x86.R_BP;
1431+ case 6:
1432+ DECODE_PRINTF("SI");
1433+ return &M.x86.R_SI;
1434+ case 7:
1435+ DECODE_PRINTF("DI");
1436+ return &M.x86.R_DI;
1437+ }
1438+ HALT_SYS();
1439 return NULL; /* NOTREACHED OR REACHED ON ERROR */
1440 }
1441
1442@@ -647,36 +640,36 @@ REMARKS:
1443 Return a pointer to the register given by the R/RM field of the
1444 modrm byte, for dword operands. Also enables the decoding of instructions.
1445 ****************************************************************************/
1446-u32* decode_rm_long_register(
1447- int reg)
1448+u32 *
1449+decode_rm_long_register(int reg)
1450 {
1451 switch (reg) {
1452- case 0:
1453- DECODE_PRINTF("EAX");
1454- return &M.x86.R_EAX;
1455- case 1:
1456- DECODE_PRINTF("ECX");
1457- return &M.x86.R_ECX;
1458- case 2:
1459- DECODE_PRINTF("EDX");
1460- return &M.x86.R_EDX;
1461- case 3:
1462- DECODE_PRINTF("EBX");
1463- return &M.x86.R_EBX;
1464- case 4:
1465- DECODE_PRINTF("ESP");
1466- return &M.x86.R_ESP;
1467- case 5:
1468- DECODE_PRINTF("EBP");
1469- return &M.x86.R_EBP;
1470- case 6:
1471- DECODE_PRINTF("ESI");
1472- return &M.x86.R_ESI;
1473- case 7:
1474- DECODE_PRINTF("EDI");
1475- return &M.x86.R_EDI;
1476- }
1477- HALT_SYS();
1478+ case 0:
1479+ DECODE_PRINTF("EAX");
1480+ return &M.x86.R_EAX;
1481+ case 1:
1482+ DECODE_PRINTF("ECX");
1483+ return &M.x86.R_ECX;
1484+ case 2:
1485+ DECODE_PRINTF("EDX");
1486+ return &M.x86.R_EDX;
1487+ case 3:
1488+ DECODE_PRINTF("EBX");
1489+ return &M.x86.R_EBX;
1490+ case 4:
1491+ DECODE_PRINTF("ESP");
1492+ return &M.x86.R_ESP;
1493+ case 5:
1494+ DECODE_PRINTF("EBP");
1495+ return &M.x86.R_EBP;
1496+ case 6:
1497+ DECODE_PRINTF("ESI");
1498+ return &M.x86.R_ESI;
1499+ case 7:
1500+ DECODE_PRINTF("EDI");
1501+ return &M.x86.R_EDI;
1502+ }
1503+ HALT_SYS();
1504 return NULL; /* NOTREACHED OR REACHED ON ERROR */
1505 }
1506
1507@@ -692,126 +685,129 @@ Return a pointer to the register given by the R/RM field of the
1508 modrm byte, for word operands, modified from above for the weirdo
1509 special case of segreg operands. Also enables the decoding of instructions.
1510 ****************************************************************************/
1511-u16* decode_rm_seg_register(
1512- int reg)
1513+u16 *
1514+decode_rm_seg_register(int reg)
1515 {
1516- switch (reg) {
1517- case 0:
1518- DECODE_PRINTF("ES");
1519- return &M.x86.R_ES;
1520- case 1:
1521- DECODE_PRINTF("CS");
1522- return &M.x86.R_CS;
1523- case 2:
1524- DECODE_PRINTF("SS");
1525- return &M.x86.R_SS;
1526- case 3:
1527- DECODE_PRINTF("DS");
1528- return &M.x86.R_DS;
1529- case 4:
1530- DECODE_PRINTF("FS");
1531- return &M.x86.R_FS;
1532- case 5:
1533- DECODE_PRINTF("GS");
1534- return &M.x86.R_GS;
1535- case 6:
1536- case 7:
1537- DECODE_PRINTF("ILLEGAL SEGREG");
1538- break;
1539- }
1540- HALT_SYS();
1541- return NULL; /* NOT REACHED OR REACHED ON ERROR */
1542+ switch (reg) {
1543+ case 0:
1544+ DECODE_PRINTF("ES");
1545+ return &M.x86.R_ES;
1546+ case 1:
1547+ DECODE_PRINTF("CS");
1548+ return &M.x86.R_CS;
1549+ case 2:
1550+ DECODE_PRINTF("SS");
1551+ return &M.x86.R_SS;
1552+ case 3:
1553+ DECODE_PRINTF("DS");
1554+ return &M.x86.R_DS;
1555+ case 4:
1556+ DECODE_PRINTF("FS");
1557+ return &M.x86.R_FS;
1558+ case 5:
1559+ DECODE_PRINTF("GS");
1560+ return &M.x86.R_GS;
1561+ case 6:
1562+ case 7:
1563+ DECODE_PRINTF("ILLEGAL SEGREG");
1564+ break;
1565+ }
1566+ HALT_SYS();
1567+ return NULL; /* NOT REACHED OR REACHED ON ERROR */
1568 }
1569
1570 /*
1571 *
1572 * return offset from the SIB Byte
1573 */
1574-u32 decode_sib_address(int sib, int mod)
1575+u32
1576+decode_sib_address(int sib, int mod)
1577 {
1578 u32 base = 0, i = 0, scale = 1;
1579
1580- switch(sib & 0x07) {
1581+ switch (sib & 0x07) {
1582 case 0:
1583- DECODE_PRINTF("[EAX]");
1584- base = M.x86.R_EAX;
1585- break;
1586+ DECODE_PRINTF("[EAX]");
1587+ base = M.x86.R_EAX;
1588+ break;
1589 case 1:
1590- DECODE_PRINTF("[ECX]");
1591- base = M.x86.R_ECX;
1592- break;
1593+ DECODE_PRINTF("[ECX]");
1594+ base = M.x86.R_ECX;
1595+ break;
1596 case 2:
1597- DECODE_PRINTF("[EDX]");
1598- base = M.x86.R_EDX;
1599- break;
1600+ DECODE_PRINTF("[EDX]");
1601+ base = M.x86.R_EDX;
1602+ break;
1603 case 3:
1604- DECODE_PRINTF("[EBX]");
1605- base = M.x86.R_EBX;
1606- break;
1607+ DECODE_PRINTF("[EBX]");
1608+ base = M.x86.R_EBX;
1609+ break;
1610 case 4:
1611- DECODE_PRINTF("[ESP]");
1612- base = M.x86.R_ESP;
1613- M.x86.mode |= SYSMODE_SEG_DS_SS;
1614- break;
1615+ DECODE_PRINTF("[ESP]");
1616+ base = M.x86.R_ESP;
1617+ M.x86.mode |= SYSMODE_SEG_DS_SS;
1618+ break;
1619 case 5:
1620- if (mod == 0) {
1621- base = fetch_long_imm();
1622- DECODE_PRINTF2("%08x", base);
1623- } else {
1624- DECODE_PRINTF("[EBP]");
1625- base = M.x86.R_ESP;
1626- M.x86.mode |= SYSMODE_SEG_DS_SS;
1627- }
1628- break;
1629+ if (mod == 0) {
1630+ base = fetch_long_imm();
1631+ DECODE_PRINTF2("%08x", base);
1632+ }
1633+ else {
1634+ DECODE_PRINTF("[EBP]");
1635+ base = M.x86.R_ESP;
1636+ M.x86.mode |= SYSMODE_SEG_DS_SS;
1637+ }
1638+ break;
1639 case 6:
1640- DECODE_PRINTF("[ESI]");
1641- base = M.x86.R_ESI;
1642- break;
1643+ DECODE_PRINTF("[ESI]");
1644+ base = M.x86.R_ESI;
1645+ break;
1646 case 7:
1647- DECODE_PRINTF("[EDI]");
1648- base = M.x86.R_EDI;
1649- break;
1650+ DECODE_PRINTF("[EDI]");
1651+ base = M.x86.R_EDI;
1652+ break;
1653 }
1654 switch ((sib >> 3) & 0x07) {
1655 case 0:
1656- DECODE_PRINTF("[EAX");
1657- i = M.x86.R_EAX;
1658- break;
1659+ DECODE_PRINTF("[EAX");
1660+ i = M.x86.R_EAX;
1661+ break;
1662 case 1:
1663- DECODE_PRINTF("[ECX");
1664- i = M.x86.R_ECX;
1665- break;
1666+ DECODE_PRINTF("[ECX");
1667+ i = M.x86.R_ECX;
1668+ break;
1669 case 2:
1670- DECODE_PRINTF("[EDX");
1671- i = M.x86.R_EDX;
1672- break;
1673+ DECODE_PRINTF("[EDX");
1674+ i = M.x86.R_EDX;
1675+ break;
1676 case 3:
1677- DECODE_PRINTF("[EBX");
1678- i = M.x86.R_EBX;
1679- break;
1680+ DECODE_PRINTF("[EBX");
1681+ i = M.x86.R_EBX;
1682+ break;
1683 case 4:
1684- i = 0;
1685- break;
1686+ i = 0;
1687+ break;
1688 case 5:
1689- DECODE_PRINTF("[EBP");
1690- i = M.x86.R_EBP;
1691- break;
1692+ DECODE_PRINTF("[EBP");
1693+ i = M.x86.R_EBP;
1694+ break;
1695 case 6:
1696- DECODE_PRINTF("[ESI");
1697- i = M.x86.R_ESI;
1698- break;
1699+ DECODE_PRINTF("[ESI");
1700+ i = M.x86.R_ESI;
1701+ break;
1702 case 7:
1703- DECODE_PRINTF("[EDI");
1704- i = M.x86.R_EDI;
1705- break;
1706+ DECODE_PRINTF("[EDI");
1707+ i = M.x86.R_EDI;
1708+ break;
1709 }
1710 scale = 1 << ((sib >> 6) & 0x03);
1711 if (((sib >> 3) & 0x07) != 4) {
1712- if (scale == 1) {
1713- DECODE_PRINTF("]");
1714- } else {
1715- DECODE_PRINTF2("*%d]", scale);
1716- }
1717+ if (scale == 1) {
1718+ DECODE_PRINTF("]");
1719+ }
1720+ else {
1721+ DECODE_PRINTF2("*%d]", scale);
1722+ }
1723 }
1724 return base + (i * scale);
1725 }
1726@@ -836,74 +832,75 @@ NOTE: The code which specifies the corresponding segment (ds vs ss)
1727 if a SS access is needed, set this bit. Otherwise, DS access
1728 occurs (unless any of the segment override bits are set).
1729 ****************************************************************************/
1730-u32 decode_rm00_address(
1731- int rm)
1732+u32
1733+decode_rm00_address(int rm)
1734 {
1735 u32 offset;
1736 int sib;
1737
1738 if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
1739 /* 32-bit addressing */
1740- switch (rm) {
1741- case 0:
1742- DECODE_PRINTF("[EAX]");
1743- return M.x86.R_EAX;
1744- case 1:
1745- DECODE_PRINTF("[ECX]");
1746- return M.x86.R_ECX;
1747- case 2:
1748- DECODE_PRINTF("[EDX]");
1749- return M.x86.R_EDX;
1750- case 3:
1751- DECODE_PRINTF("[EBX]");
1752- return M.x86.R_EBX;
1753- case 4:
1754- sib = fetch_byte_imm();
1755- return decode_sib_address(sib, 0);
1756- case 5:
1757- offset = fetch_long_imm();
1758- DECODE_PRINTF2("[%08x]", offset);
1759- return offset;
1760- case 6:
1761- DECODE_PRINTF("[ESI]");
1762- return M.x86.R_ESI;
1763- case 7:
1764- DECODE_PRINTF("[EDI]");
1765- return M.x86.R_EDI;
1766- }
1767- HALT_SYS();
1768- } else {
1769+ switch (rm) {
1770+ case 0:
1771+ DECODE_PRINTF("[EAX]");
1772+ return M.x86.R_EAX;
1773+ case 1:
1774+ DECODE_PRINTF("[ECX]");
1775+ return M.x86.R_ECX;
1776+ case 2:
1777+ DECODE_PRINTF("[EDX]");
1778+ return M.x86.R_EDX;
1779+ case 3:
1780+ DECODE_PRINTF("[EBX]");
1781+ return M.x86.R_EBX;
1782+ case 4:
1783+ sib = fetch_byte_imm();
1784+ return decode_sib_address(sib, 0);
1785+ case 5:
1786+ offset = fetch_long_imm();
1787+ DECODE_PRINTF2("[%08x]", offset);
1788+ return offset;
1789+ case 6:
1790+ DECODE_PRINTF("[ESI]");
1791+ return M.x86.R_ESI;
1792+ case 7:
1793+ DECODE_PRINTF("[EDI]");
1794+ return M.x86.R_EDI;
1795+ }
1796+ HALT_SYS();
1797+ }
1798+ else {
1799 /* 16-bit addressing */
1800- switch (rm) {
1801- case 0:
1802- DECODE_PRINTF("[BX+SI]");
1803+ switch (rm) {
1804+ case 0:
1805+ DECODE_PRINTF("[BX+SI]");
1806 return (M.x86.R_BX + M.x86.R_SI) & 0xffff;
1807- case 1:
1808- DECODE_PRINTF("[BX+DI]");
1809+ case 1:
1810+ DECODE_PRINTF("[BX+DI]");
1811 return (M.x86.R_BX + M.x86.R_DI) & 0xffff;
1812- case 2:
1813- DECODE_PRINTF("[BP+SI]");
1814- M.x86.mode |= SYSMODE_SEG_DS_SS;
1815+ case 2:
1816+ DECODE_PRINTF("[BP+SI]");
1817+ M.x86.mode |= SYSMODE_SEG_DS_SS;
1818 return (M.x86.R_BP + M.x86.R_SI) & 0xffff;
1819- case 3:
1820- DECODE_PRINTF("[BP+DI]");
1821- M.x86.mode |= SYSMODE_SEG_DS_SS;
1822+ case 3:
1823+ DECODE_PRINTF("[BP+DI]");
1824+ M.x86.mode |= SYSMODE_SEG_DS_SS;
1825 return (M.x86.R_BP + M.x86.R_DI) & 0xffff;
1826- case 4:
1827- DECODE_PRINTF("[SI]");
1828- return M.x86.R_SI;
1829- case 5:
1830- DECODE_PRINTF("[DI]");
1831- return M.x86.R_DI;
1832- case 6:
1833- offset = fetch_word_imm();
1834- DECODE_PRINTF2("[%04x]", offset);
1835- return offset;
1836- case 7:
1837- DECODE_PRINTF("[BX]");
1838- return M.x86.R_BX;
1839- }
1840- HALT_SYS();
1841+ case 4:
1842+ DECODE_PRINTF("[SI]");
1843+ return M.x86.R_SI;
1844+ case 5:
1845+ DECODE_PRINTF("[DI]");
1846+ return M.x86.R_DI;
1847+ case 6:
1848+ offset = fetch_word_imm();
1849+ DECODE_PRINTF2("[%04x]", offset);
1850+ return offset;
1851+ case 7:
1852+ DECODE_PRINTF("[BX]");
1853+ return M.x86.R_BX;
1854+ }
1855+ HALT_SYS();
1856 }
1857 return 0;
1858 }
1859@@ -919,79 +916,80 @@ REMARKS:
1860 Return the offset given by mod=01 addressing. Also enables the
1861 decoding of instructions.
1862 ****************************************************************************/
1863-u32 decode_rm01_address(
1864- int rm)
1865+u32
1866+decode_rm01_address(int rm)
1867 {
1868 int displacement = 0;
1869 int sib;
1870
1871 /* Fetch disp8 if no SIB byte */
1872 if (!((M.x86.mode & SYSMODE_PREFIX_ADDR) && (rm == 4)))
1873- displacement = (s8)fetch_byte_imm();
1874+ displacement = (s8) fetch_byte_imm();
1875
1876 if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
1877 /* 32-bit addressing */
1878- switch (rm) {
1879- case 0:
1880- DECODE_PRINTF2("%d[EAX]", displacement);
1881- return M.x86.R_EAX + displacement;
1882- case 1:
1883- DECODE_PRINTF2("%d[ECX]", displacement);
1884- return M.x86.R_ECX + displacement;
1885- case 2:
1886- DECODE_PRINTF2("%d[EDX]", displacement);
1887- return M.x86.R_EDX + displacement;
1888- case 3:
1889- DECODE_PRINTF2("%d[EBX]", displacement);
1890- return M.x86.R_EBX + displacement;
1891- case 4:
1892- sib = fetch_byte_imm();
1893- displacement = (s8)fetch_byte_imm();
1894- DECODE_PRINTF2("%d", displacement);
1895- return decode_sib_address(sib, 1) + displacement;
1896- case 5:
1897- DECODE_PRINTF2("%d[EBP]", displacement);
1898- return M.x86.R_EBP + displacement;
1899- case 6:
1900- DECODE_PRINTF2("%d[ESI]", displacement);
1901- return M.x86.R_ESI + displacement;
1902- case 7:
1903- DECODE_PRINTF2("%d[EDI]", displacement);
1904- return M.x86.R_EDI + displacement;
1905- }
1906- HALT_SYS();
1907- } else {
1908+ switch (rm) {
1909+ case 0:
1910+ DECODE_PRINTF2("%d[EAX]", displacement);
1911+ return M.x86.R_EAX + displacement;
1912+ case 1:
1913+ DECODE_PRINTF2("%d[ECX]", displacement);
1914+ return M.x86.R_ECX + displacement;
1915+ case 2:
1916+ DECODE_PRINTF2("%d[EDX]", displacement);
1917+ return M.x86.R_EDX + displacement;
1918+ case 3:
1919+ DECODE_PRINTF2("%d[EBX]", displacement);
1920+ return M.x86.R_EBX + displacement;
1921+ case 4:
1922+ sib = fetch_byte_imm();
1923+ displacement = (s8) fetch_byte_imm();
1924+ DECODE_PRINTF2("%d", displacement);
1925+ return decode_sib_address(sib, 1) + displacement;
1926+ case 5:
1927+ DECODE_PRINTF2("%d[EBP]", displacement);
1928+ return M.x86.R_EBP + displacement;
1929+ case 6:
1930+ DECODE_PRINTF2("%d[ESI]", displacement);
1931+ return M.x86.R_ESI + displacement;
1932+ case 7:
1933+ DECODE_PRINTF2("%d[EDI]", displacement);
1934+ return M.x86.R_EDI + displacement;
1935+ }
1936+ HALT_SYS();
1937+ }
1938+ else {
1939 /* 16-bit addressing */
1940- switch (rm) {
1941- case 0:
1942- DECODE_PRINTF2("%d[BX+SI]", displacement);
1943+ switch (rm) {
1944+ case 0:
1945+ DECODE_PRINTF2("%d[BX+SI]", displacement);
1946 return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff;
1947- case 1:
1948- DECODE_PRINTF2("%d[BX+DI]", displacement);
1949+ case 1:
1950+ DECODE_PRINTF2("%d[BX+DI]", displacement);
1951 return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff;
1952- case 2:
1953- DECODE_PRINTF2("%d[BP+SI]", displacement);
1954- M.x86.mode |= SYSMODE_SEG_DS_SS;
1955+ case 2:
1956+ DECODE_PRINTF2("%d[BP+SI]", displacement);
1957+ M.x86.mode |= SYSMODE_SEG_DS_SS;
1958 return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff;
1959- case 3:
1960- DECODE_PRINTF2("%d[BP+DI]", displacement);
1961- M.x86.mode |= SYSMODE_SEG_DS_SS;
1962+ case 3:
1963+ DECODE_PRINTF2("%d[BP+DI]", displacement);
1964+ M.x86.mode |= SYSMODE_SEG_DS_SS;
1965 return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff;
1966- case 4:
1967- DECODE_PRINTF2("%d[SI]", displacement);
1968+ case 4:
1969+ DECODE_PRINTF2("%d[SI]", displacement);
1970 return (M.x86.R_SI + displacement) & 0xffff;
1971- case 5:
1972- DECODE_PRINTF2("%d[DI]", displacement);
1973+ case 5:
1974+ DECODE_PRINTF2("%d[DI]", displacement);
1975 return (M.x86.R_DI + displacement) & 0xffff;
1976- case 6:
1977- DECODE_PRINTF2("%d[BP]", displacement);
1978- M.x86.mode |= SYSMODE_SEG_DS_SS;
1979+ case 6:
1980+ DECODE_PRINTF2("%d[BP]", displacement);
1981+ M.x86.mode |= SYSMODE_SEG_DS_SS;
1982 return (M.x86.R_BP + displacement) & 0xffff;
1983- case 7:
1984- DECODE_PRINTF2("%d[BX]", displacement);
1985+ case 7:
1986+ DECODE_PRINTF2("%d[BX]", displacement);
1987 return (M.x86.R_BX + displacement) & 0xffff;
1988- }
1989- HALT_SYS();
1990+ }
1991+ HALT_SYS();
1992 }
1993 return 0; /* SHOULD NOT HAPPEN */
1994 }
1995@@ -1007,86 +1005,87 @@ REMARKS:
1996 Return the offset given by mod=10 addressing. Also enables the
1997 decoding of instructions.
1998 ****************************************************************************/
1999-u32 decode_rm10_address(
2000- int rm)
2001+u32
2002+decode_rm10_address(int rm)
2003 {
2004 u32 displacement = 0;
2005 int sib;
2006
2007 /* Fetch disp16 if 16-bit addr mode */
2008 if (!(M.x86.mode & SYSMODE_PREFIX_ADDR))
2009- displacement = (u16)fetch_word_imm();
2010+ displacement = (u16) fetch_word_imm();
2011 else {
2012- /* Fetch disp32 if no SIB byte */
2013- if (rm != 4)
2014- displacement = (u32)fetch_long_imm();
2015+ /* Fetch disp32 if no SIB byte */
2016+ if (rm != 4)
2017+ displacement = (u32) fetch_long_imm();
2018 }
2019
2020 if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
2021 /* 32-bit addressing */
2022- switch (rm) {
2023- case 0:
2024- DECODE_PRINTF2("%08x[EAX]", displacement);
2025- return M.x86.R_EAX + displacement;
2026- case 1:
2027- DECODE_PRINTF2("%08x[ECX]", displacement);
2028- return M.x86.R_ECX + displacement;
2029- case 2:
2030- DECODE_PRINTF2("%08x[EDX]", displacement);
2031- M.x86.mode |= SYSMODE_SEG_DS_SS;
2032- return M.x86.R_EDX + displacement;
2033- case 3:
2034- DECODE_PRINTF2("%08x[EBX]", displacement);
2035- return M.x86.R_EBX + displacement;
2036- case 4:
2037- sib = fetch_byte_imm();
2038- displacement = (u32)fetch_long_imm();
2039- DECODE_PRINTF2("%08x", displacement);
2040- return decode_sib_address(sib, 2) + displacement;
2041- break;
2042- case 5:
2043- DECODE_PRINTF2("%08x[EBP]", displacement);
2044- return M.x86.R_EBP + displacement;
2045- case 6:
2046- DECODE_PRINTF2("%08x[ESI]", displacement);
2047- return M.x86.R_ESI + displacement;
2048- case 7:
2049- DECODE_PRINTF2("%08x[EDI]", displacement);
2050- return M.x86.R_EDI + displacement;
2051- }
2052- HALT_SYS();
2053- } else {
2054+ switch (rm) {
2055+ case 0:
2056+ DECODE_PRINTF2("%08x[EAX]", displacement);
2057+ return M.x86.R_EAX + displacement;
2058+ case 1:
2059+ DECODE_PRINTF2("%08x[ECX]", displacement);
2060+ return M.x86.R_ECX + displacement;
2061+ case 2:
2062+ DECODE_PRINTF2("%08x[EDX]", displacement);
2063+ M.x86.mode |= SYSMODE_SEG_DS_SS;
2064+ return M.x86.R_EDX + displacement;
2065+ case 3:
2066+ DECODE_PRINTF2("%08x[EBX]", displacement);
2067+ return M.x86.R_EBX + displacement;
2068+ case 4:
2069+ sib = fetch_byte_imm();
2070+ displacement = (u32) fetch_long_imm();
2071+ DECODE_PRINTF2("%08x", displacement);
2072+ return decode_sib_address(sib, 2) + displacement;
2073+ break;
2074+ case 5:
2075+ DECODE_PRINTF2("%08x[EBP]", displacement);
2076+ return M.x86.R_EBP + displacement;
2077+ case 6:
2078+ DECODE_PRINTF2("%08x[ESI]", displacement);
2079+ return M.x86.R_ESI + displacement;
2080+ case 7:
2081+ DECODE_PRINTF2("%08x[EDI]", displacement);
2082+ return M.x86.R_EDI + displacement;
2083+ }
2084+ HALT_SYS();
2085+ }
2086+ else {
2087 /* 16-bit addressing */
2088- switch (rm) {
2089- case 0:
2090+ switch (rm) {
2091+ case 0:
2092 DECODE_PRINTF2("%04x[BX+SI]", displacement);
2093 return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff;
2094- case 1:
2095+ case 1:
2096 DECODE_PRINTF2("%04x[BX+DI]", displacement);
2097 return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff;
2098- case 2:
2099- DECODE_PRINTF2("%04x[BP+SI]", displacement);
2100- M.x86.mode |= SYSMODE_SEG_DS_SS;
2101+ case 2:
2102+ DECODE_PRINTF2("%04x[BP+SI]", displacement);
2103+ M.x86.mode |= SYSMODE_SEG_DS_SS;
2104 return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff;
2105- case 3:
2106- DECODE_PRINTF2("%04x[BP+DI]", displacement);
2107- M.x86.mode |= SYSMODE_SEG_DS_SS;
2108+ case 3:
2109+ DECODE_PRINTF2("%04x[BP+DI]", displacement);
2110+ M.x86.mode |= SYSMODE_SEG_DS_SS;
2111 return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff;
2112- case 4:
2113+ case 4:
2114 DECODE_PRINTF2("%04x[SI]", displacement);
2115 return (M.x86.R_SI + displacement) & 0xffff;
2116- case 5:
2117+ case 5:
2118 DECODE_PRINTF2("%04x[DI]", displacement);
2119 return (M.x86.R_DI + displacement) & 0xffff;
2120- case 6:
2121- DECODE_PRINTF2("%04x[BP]", displacement);
2122- M.x86.mode |= SYSMODE_SEG_DS_SS;
2123+ case 6:
2124+ DECODE_PRINTF2("%04x[BP]", displacement);
2125+ M.x86.mode |= SYSMODE_SEG_DS_SS;
2126 return (M.x86.R_BP + displacement) & 0xffff;
2127- case 7:
2128+ case 7:
2129 DECODE_PRINTF2("%04x[BX]", displacement);
2130 return (M.x86.R_BX + displacement) & 0xffff;
2131- }
2132- HALT_SYS();
2133+ }
2134+ HALT_SYS();
2135 }
2136 return 0;
2137 /*NOTREACHED */
2138diff --git a/libs/x86emu/fpu.c b/libs/x86emu/fpu.c
2139index b72de1e..0dab05c 100644
2140--- a/libs/x86emu/fpu.c
2141+++ b/libs/x86emu/fpu.c
2142@@ -42,7 +42,8 @@
2143 /*----------------------------- Implementation ----------------------------*/
2144
2145 /* opcode=0xd8 */
2146-void x86emuOp_esc_coprocess_d8(u8 X86EMU_UNUSED(op1))
2147+void
2148+x86emuOp_esc_coprocess_d8(u8 X86EMU_UNUSED(op1))
2149 {
2150 START_OF_INSTR();
2151 DECODE_PRINTF("ESC D8\n");
2152@@ -52,7 +53,7 @@ void x86emuOp_esc_coprocess_d8(u8 X86EMU_UNUSED(op1))
2153
2154 #ifdef DEBUG
2155
2156-static char *x86emu_fpu_op_d9_tab[] = {
2157+static const char *x86emu_fpu_op_d9_tab[] = {
2158 "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",
2159 "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",
2160
2161@@ -63,7 +64,7 @@ static char *x86emu_fpu_op_d9_tab[] = {
2162 "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",
2163 };
2164
2165-static char *x86emu_fpu_op_d9_tab1[] = {
2166+static const char *x86emu_fpu_op_d9_tab1[] = {
2167 "FLD\t", "FLD\t", "FLD\t", "FLD\t",
2168 "FLD\t", "FLD\t", "FLD\t", "FLD\t",
2169
2170@@ -89,10 +90,11 @@ static char *x86emu_fpu_op_d9_tab1[] = {
2171 "FRNDINT", "FSCALE", "ESC_D9", "ESC_D9",
2172 };
2173
2174-#endif /* DEBUG */
2175+#endif /* DEBUG */
2176
2177 /* opcode=0xd9 */
2178-void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1))
2179+void
2180+x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1))
2181 {
2182 int mod, rl, rh;
2183 uint destoffset = 0;
2184@@ -103,56 +105,58 @@ void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1))
2185 #ifdef DEBUG
2186 if (mod != 3) {
2187 DECODE_PRINTINSTR32(x86emu_fpu_op_d9_tab, mod, rh, rl);
2188- } else {
2189+ }
2190+ else {
2191 DECODE_PRINTF(x86emu_fpu_op_d9_tab1[(rh << 3) + rl]);
2192 }
2193 #endif
2194 switch (mod) {
2195- case 0:
2196+ case 0:
2197 destoffset = decode_rm00_address(rl);
2198 DECODE_PRINTF("\n");
2199 break;
2200- case 1:
2201+ case 1:
2202 destoffset = decode_rm01_address(rl);
2203 DECODE_PRINTF("\n");
2204 break;
2205- case 2:
2206+ case 2:
2207 destoffset = decode_rm10_address(rl);
2208 DECODE_PRINTF("\n");
2209 break;
2210- case 3: /* register to register */
2211- stkelem = (u8)rl;
2212- if (rh < 4) {
2213- DECODE_PRINTF2("ST(%d)\n", stkelem);
2214- } else {
2215- DECODE_PRINTF("\n");
2216- }
2217+ case 3: /* register to register */
2218+ stkelem = (u8) rl;
2219+ if (rh < 4) {
2220+ DECODE_PRINTF2("ST(%d)\n", stkelem);
2221+ }
2222+ else {
2223+ DECODE_PRINTF("\n");
2224+ }
2225 break;
2226 }
2227 #ifdef X86EMU_FPU_PRESENT
2228 /* execute */
2229 switch (mod) {
2230- case 3:
2231+ case 3:
2232 switch (rh) {
2233- case 0:
2234+ case 0:
2235 x86emu_fpu_R_fld(X86EMU_FPU_STKTOP, stkelem);
2236 break;
2237- case 1:
2238+ case 1:
2239 x86emu_fpu_R_fxch(X86EMU_FPU_STKTOP, stkelem);
2240 break;
2241- case 2:
2242+ case 2:
2243 switch (rl) {
2244- case 0:
2245+ case 0:
2246 x86emu_fpu_R_nop();
2247 break;
2248- default:
2249+ default:
2250 x86emu_fpu_illegal();
2251 break;
2252 }
2253- case 3:
2254+ case 3:
2255 x86emu_fpu_R_fstp(X86EMU_FPU_STKTOP, stkelem);
2256 break;
2257- case 4:
2258+ case 4:
2259 switch (rl) {
2260 case 0:
2261 x86emu_fpu_R_fchs(X86EMU_FPU_STKTOP);
2262@@ -173,133 +177,133 @@ void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1))
2263 }
2264 break;
2265
2266- case 5:
2267+ case 5:
2268 switch (rl) {
2269- case 0:
2270+ case 0:
2271 x86emu_fpu_R_fld1(X86EMU_FPU_STKTOP);
2272 break;
2273- case 1:
2274+ case 1:
2275 x86emu_fpu_R_fldl2t(X86EMU_FPU_STKTOP);
2276 break;
2277- case 2:
2278+ case 2:
2279 x86emu_fpu_R_fldl2e(X86EMU_FPU_STKTOP);
2280 break;
2281- case 3:
2282+ case 3:
2283 x86emu_fpu_R_fldpi(X86EMU_FPU_STKTOP);
2284 break;
2285- case 4:
2286+ case 4:
2287 x86emu_fpu_R_fldlg2(X86EMU_FPU_STKTOP);
2288 break;
2289- case 5:
2290+ case 5:
2291 x86emu_fpu_R_fldln2(X86EMU_FPU_STKTOP);
2292 break;
2293- case 6:
2294+ case 6:
2295 x86emu_fpu_R_fldz(X86EMU_FPU_STKTOP);
2296 break;
2297- default:
2298+ default:
2299 /* 7 */
2300 x86emu_fpu_illegal();
2301 break;
2302 }
2303 break;
2304
2305- case 6:
2306+ case 6:
2307 switch (rl) {
2308- case 0:
2309+ case 0:
2310 x86emu_fpu_R_f2xm1(X86EMU_FPU_STKTOP);
2311 break;
2312- case 1:
2313+ case 1:
2314 x86emu_fpu_R_fyl2x(X86EMU_FPU_STKTOP);
2315 break;
2316- case 2:
2317+ case 2:
2318 x86emu_fpu_R_fptan(X86EMU_FPU_STKTOP);
2319 break;
2320- case 3:
2321+ case 3:
2322 x86emu_fpu_R_fpatan(X86EMU_FPU_STKTOP);
2323 break;
2324- case 4:
2325+ case 4:
2326 x86emu_fpu_R_fxtract(X86EMU_FPU_STKTOP);
2327 break;
2328- case 5:
2329+ case 5:
2330 x86emu_fpu_illegal();
2331 break;
2332- case 6:
2333+ case 6:
2334 x86emu_fpu_R_decstp();
2335 break;
2336- case 7:
2337+ case 7:
2338 x86emu_fpu_R_incstp();
2339 break;
2340 }
2341 break;
2342
2343- case 7:
2344+ case 7:
2345 switch (rl) {
2346- case 0:
2347+ case 0:
2348 x86emu_fpu_R_fprem(X86EMU_FPU_STKTOP);
2349 break;
2350- case 1:
2351+ case 1:
2352 x86emu_fpu_R_fyl2xp1(X86EMU_FPU_STKTOP);
2353 break;
2354- case 2:
2355+ case 2:
2356 x86emu_fpu_R_fsqrt(X86EMU_FPU_STKTOP);
2357 break;
2358- case 3:
2359+ case 3:
2360 x86emu_fpu_illegal();
2361 break;
2362- case 4:
2363+ case 4:
2364 x86emu_fpu_R_frndint(X86EMU_FPU_STKTOP);
2365 break;
2366- case 5:
2367+ case 5:
2368 x86emu_fpu_R_fscale(X86EMU_FPU_STKTOP);
2369 break;
2370- case 6:
2371- case 7:
2372- default:
2373+ case 6:
2374+ case 7:
2375+ default:
2376 x86emu_fpu_illegal();
2377 break;
2378 }
2379 break;
2380
2381- default:
2382+ default:
2383 switch (rh) {
2384- case 0:
2385+ case 0:
2386 x86emu_fpu_M_fld(X86EMU_FPU_FLOAT, destoffset);
2387 break;
2388- case 1:
2389+ case 1:
2390 x86emu_fpu_illegal();
2391 break;
2392- case 2:
2393+ case 2:
2394 x86emu_fpu_M_fst(X86EMU_FPU_FLOAT, destoffset);
2395 break;
2396- case 3:
2397+ case 3:
2398 x86emu_fpu_M_fstp(X86EMU_FPU_FLOAT, destoffset);
2399 break;
2400- case 4:
2401+ case 4:
2402 x86emu_fpu_M_fldenv(X86EMU_FPU_WORD, destoffset);
2403 break;
2404- case 5:
2405+ case 5:
2406 x86emu_fpu_M_fldcw(X86EMU_FPU_WORD, destoffset);
2407 break;
2408- case 6:
2409+ case 6:
2410 x86emu_fpu_M_fstenv(X86EMU_FPU_WORD, destoffset);
2411 break;
2412- case 7:
2413+ case 7:
2414 x86emu_fpu_M_fstcw(X86EMU_FPU_WORD, destoffset);
2415 break;
2416 }
2417 }
2418 }
2419 #else
2420- (void)destoffset;
2421- (void)stkelem;
2422-#endif /* X86EMU_FPU_PRESENT */
2423+ (void) destoffset;
2424+ (void) stkelem;
2425+#endif /* X86EMU_FPU_PRESENT */
2426 DECODE_CLEAR_SEGOVR();
2427 END_OF_INSTR_NO_TRACE();
2428 }
2429
2430 #ifdef DEBUG
2431
2432-char *x86emu_fpu_op_da_tab[] = {
2433+static const char *x86emu_fpu_op_da_tab[] = {
2434 "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",
2435 "FICOMP\tDWORD PTR ",
2436 "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",
2437@@ -309,7 +313,7 @@ char *x86emu_fpu_op_da_tab[] = {
2438 "FICOMP\tDWORD PTR ",
2439 "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",
2440 "FIDIVR\tDWORD PTR ",
2441-
2442+
2443 "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",
2444 "FICOMP\tDWORD PTR ",
2445 "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",
2446@@ -319,10 +323,11 @@ char *x86emu_fpu_op_da_tab[] = {
2447 "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ",
2448 };
2449
2450-#endif /* DEBUG */
2451+#endif /* DEBUG */
2452
2453 /* opcode=0xda */
2454-void x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1))
2455+void
2456+x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1))
2457 {
2458 int mod, rl, rh;
2459 uint destoffset = 0;
2460@@ -332,59 +337,59 @@ void x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1))
2461 FETCH_DECODE_MODRM(mod, rh, rl);
2462 DECODE_PRINTINSTR32(x86emu_fpu_op_da_tab, mod, rh, rl);
2463 switch (mod) {
2464- case 0:
2465+ case 0:
2466 destoffset = decode_rm00_address(rl);
2467 DECODE_PRINTF("\n");
2468 break;
2469- case 1:
2470+ case 1:
2471 destoffset = decode_rm01_address(rl);
2472 DECODE_PRINTF("\n");
2473 break;
2474- case 2:
2475+ case 2:
2476 destoffset = decode_rm10_address(rl);
2477 DECODE_PRINTF("\n");
2478 break;
2479- case 3: /* register to register */
2480- stkelem = (u8)rl;
2481+ case 3: /* register to register */
2482+ stkelem = (u8) rl;
2483 DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
2484 break;
2485 }
2486 #ifdef X86EMU_FPU_PRESENT
2487 switch (mod) {
2488- case 3:
2489+ case 3:
2490 x86emu_fpu_illegal();
2491 break;
2492- default:
2493+ default:
2494 switch (rh) {
2495- case 0:
2496+ case 0:
2497 x86emu_fpu_M_iadd(X86EMU_FPU_SHORT, destoffset);
2498 break;
2499- case 1:
2500+ case 1:
2501 x86emu_fpu_M_imul(X86EMU_FPU_SHORT, destoffset);
2502 break;
2503- case 2:
2504+ case 2:
2505 x86emu_fpu_M_icom(X86EMU_FPU_SHORT, destoffset);
2506 break;
2507- case 3:
2508+ case 3:
2509 x86emu_fpu_M_icomp(X86EMU_FPU_SHORT, destoffset);
2510 break;
2511- case 4:
2512+ case 4:
2513 x86emu_fpu_M_isub(X86EMU_FPU_SHORT, destoffset);
2514 break;
2515- case 5:
2516+ case 5:
2517 x86emu_fpu_M_isubr(X86EMU_FPU_SHORT, destoffset);
2518 break;
2519- case 6:
2520+ case 6:
2521 x86emu_fpu_M_idiv(X86EMU_FPU_SHORT, destoffset);
2522 break;
2523- case 7:
2524+ case 7:
2525 x86emu_fpu_M_idivr(X86EMU_FPU_SHORT, destoffset);
2526 break;
2527 }
2528 }
2529 #else
2530- (void)destoffset;
2531- (void)stkelem;
2532+ (void) destoffset;
2533+ (void) stkelem;
2534 #endif
2535 DECODE_CLEAR_SEGOVR();
2536 END_OF_INSTR_NO_TRACE();
2537@@ -392,7 +397,7 @@ void x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1))
2538
2539 #ifdef DEBUG
2540
2541-char *x86emu_fpu_op_db_tab[] = {
2542+static const char *x86emu_fpu_op_db_tab[] = {
2543 "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",
2544 "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",
2545
2546@@ -403,10 +408,11 @@ char *x86emu_fpu_op_db_tab[] = {
2547 "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",
2548 };
2549
2550-#endif /* DEBUG */
2551+#endif /* DEBUG */
2552
2553 /* opcode=0xdb */
2554-void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1))
2555+void
2556+x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1))
2557 {
2558 int mod, rl, rh;
2559 uint destoffset = 0;
2560@@ -416,104 +422,106 @@ void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1))
2561 #ifdef DEBUG
2562 if (mod != 3) {
2563 DECODE_PRINTINSTR32(x86emu_fpu_op_db_tab, mod, rh, rl);
2564- } else if (rh == 4) { /* === 11 10 0 nnn */
2565+ }
2566+ else if (rh == 4) { /* === 11 10 0 nnn */
2567 switch (rl) {
2568- case 0:
2569+ case 0:
2570 DECODE_PRINTF("FENI\n");
2571 break;
2572- case 1:
2573+ case 1:
2574 DECODE_PRINTF("FDISI\n");
2575 break;
2576- case 2:
2577+ case 2:
2578 DECODE_PRINTF("FCLEX\n");
2579 break;
2580- case 3:
2581+ case 3:
2582 DECODE_PRINTF("FINIT\n");
2583 break;
2584 }
2585- } else {
2586+ }
2587+ else {
2588 DECODE_PRINTF2("ESC_DB %0x\n", (mod << 6) + (rh << 3) + (rl));
2589 }
2590-#endif /* DEBUG */
2591+#endif /* DEBUG */
2592 switch (mod) {
2593- case 0:
2594+ case 0:
2595 destoffset = decode_rm00_address(rl);
2596 break;
2597- case 1:
2598+ case 1:
2599 destoffset = decode_rm01_address(rl);
2600 break;
2601- case 2:
2602+ case 2:
2603 destoffset = decode_rm10_address(rl);
2604 break;
2605- case 3: /* register to register */
2606+ case 3: /* register to register */
2607 break;
2608 }
2609 #ifdef X86EMU_FPU_PRESENT
2610 /* execute */
2611 switch (mod) {
2612- case 3:
2613+ case 3:
2614 switch (rh) {
2615- case 4:
2616+ case 4:
2617 switch (rl) {
2618- case 0:
2619+ case 0:
2620 x86emu_fpu_R_feni();
2621 break;
2622- case 1:
2623+ case 1:
2624 x86emu_fpu_R_fdisi();
2625 break;
2626- case 2:
2627+ case 2:
2628 x86emu_fpu_R_fclex();
2629 break;
2630- case 3:
2631+ case 3:
2632 x86emu_fpu_R_finit();
2633 break;
2634- default:
2635+ default:
2636 x86emu_fpu_illegal();
2637 break;
2638 }
2639 break;
2640- default:
2641+ default:
2642 x86emu_fpu_illegal();
2643 break;
2644 }
2645 break;
2646- default:
2647+ default:
2648 switch (rh) {
2649- case 0:
2650+ case 0:
2651 x86emu_fpu_M_fild(X86EMU_FPU_SHORT, destoffset);
2652 break;
2653- case 1:
2654+ case 1:
2655 x86emu_fpu_illegal();
2656 break;
2657- case 2:
2658+ case 2:
2659 x86emu_fpu_M_fist(X86EMU_FPU_SHORT, destoffset);
2660 break;
2661- case 3:
2662+ case 3:
2663 x86emu_fpu_M_fistp(X86EMU_FPU_SHORT, destoffset);
2664 break;
2665- case 4:
2666+ case 4:
2667 x86emu_fpu_illegal();
2668 break;
2669- case 5:
2670+ case 5:
2671 x86emu_fpu_M_fld(X86EMU_FPU_LDBL, destoffset);
2672 break;
2673- case 6:
2674+ case 6:
2675 x86emu_fpu_illegal();
2676 break;
2677- case 7:
2678+ case 7:
2679 x86emu_fpu_M_fstp(X86EMU_FPU_LDBL, destoffset);
2680 break;
2681 }
2682 }
2683 #else
2684- (void)destoffset;
2685+ (void) destoffset;
2686 #endif
2687 DECODE_CLEAR_SEGOVR();
2688 END_OF_INSTR_NO_TRACE();
2689 }
2690
2691 #ifdef DEBUG
2692-char *x86emu_fpu_op_dc_tab[] = {
2693+static const char *x86emu_fpu_op_dc_tab[] = {
2694 "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",
2695 "FCOMP\tQWORD PTR ",
2696 "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",
2697@@ -532,10 +540,11 @@ char *x86emu_fpu_op_dc_tab[] = {
2698 "FADD\t", "FMUL\t", "FCOM\t", "FCOMP\t",
2699 "FSUBR\t", "FSUB\t", "FDIVR\t", "FDIV\t",
2700 };
2701-#endif /* DEBUG */
2702+#endif /* DEBUG */
2703
2704 /* opcode=0xdc */
2705-void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1))
2706+void
2707+x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1))
2708 {
2709 int mod, rl, rh;
2710 uint destoffset = 0;
2711@@ -545,85 +554,85 @@ void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1))
2712 FETCH_DECODE_MODRM(mod, rh, rl);
2713 DECODE_PRINTINSTR32(x86emu_fpu_op_dc_tab, mod, rh, rl);
2714 switch (mod) {
2715- case 0:
2716+ case 0:
2717 destoffset = decode_rm00_address(rl);
2718 DECODE_PRINTF("\n");
2719 break;
2720- case 1:
2721+ case 1:
2722 destoffset = decode_rm01_address(rl);
2723 DECODE_PRINTF("\n");
2724 break;
2725- case 2:
2726+ case 2:
2727 destoffset = decode_rm10_address(rl);
2728 DECODE_PRINTF("\n");
2729 break;
2730- case 3: /* register to register */
2731- stkelem = (u8)rl;
2732+ case 3: /* register to register */
2733+ stkelem = (u8) rl;
2734 DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
2735 break;
2736 }
2737 #ifdef X86EMU_FPU_PRESENT
2738 /* execute */
2739 switch (mod) {
2740- case 3:
2741+ case 3:
2742 switch (rh) {
2743- case 0:
2744+ case 0:
2745 x86emu_fpu_R_fadd(stkelem, X86EMU_FPU_STKTOP);
2746 break;
2747- case 1:
2748+ case 1:
2749 x86emu_fpu_R_fmul(stkelem, X86EMU_FPU_STKTOP);
2750 break;
2751- case 2:
2752+ case 2:
2753 x86emu_fpu_R_fcom(stkelem, X86EMU_FPU_STKTOP);
2754 break;
2755- case 3:
2756+ case 3:
2757 x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);
2758 break;
2759- case 4:
2760+ case 4:
2761 x86emu_fpu_R_fsubr(stkelem, X86EMU_FPU_STKTOP);
2762 break;
2763- case 5:
2764+ case 5:
2765 x86emu_fpu_R_fsub(stkelem, X86EMU_FPU_STKTOP);
2766 break;
2767- case 6:
2768+ case 6:
2769 x86emu_fpu_R_fdivr(stkelem, X86EMU_FPU_STKTOP);
2770 break;
2771- case 7:
2772+ case 7:
2773 x86emu_fpu_R_fdiv(stkelem, X86EMU_FPU_STKTOP);
2774 break;
2775 }
2776 break;
2777- default:
2778+ default:
2779 switch (rh) {
2780- case 0:
2781+ case 0:
2782 x86emu_fpu_M_fadd(X86EMU_FPU_DOUBLE, destoffset);
2783 break;
2784- case 1:
2785+ case 1:
2786 x86emu_fpu_M_fmul(X86EMU_FPU_DOUBLE, destoffset);
2787 break;
2788- case 2:
2789+ case 2:
2790 x86emu_fpu_M_fcom(X86EMU_FPU_DOUBLE, destoffset);
2791 break;
2792- case 3:
2793+ case 3:
2794 x86emu_fpu_M_fcomp(X86EMU_FPU_DOUBLE, destoffset);
2795 break;
2796- case 4:
2797+ case 4:
2798 x86emu_fpu_M_fsub(X86EMU_FPU_DOUBLE, destoffset);
2799 break;
2800- case 5:
2801+ case 5:
2802 x86emu_fpu_M_fsubr(X86EMU_FPU_DOUBLE, destoffset);
2803 break;
2804- case 6:
2805+ case 6:
2806 x86emu_fpu_M_fdiv(X86EMU_FPU_DOUBLE, destoffset);
2807 break;
2808- case 7:
2809+ case 7:
2810 x86emu_fpu_M_fdivr(X86EMU_FPU_DOUBLE, destoffset);
2811 break;
2812 }
2813 }
2814 #else
2815- (void)destoffset;
2816- (void)stkelem;
2817+ (void) destoffset;
2818+ (void) stkelem;
2819 #endif
2820 DECODE_CLEAR_SEGOVR();
2821 END_OF_INSTR_NO_TRACE();
2822@@ -631,7 +640,7 @@ void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1))
2823
2824 #ifdef DEBUG
2825
2826-static char *x86emu_fpu_op_dd_tab[] = {
2827+static const char *x86emu_fpu_op_dd_tab[] = {
2828 "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",
2829 "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",
2830
2831@@ -645,10 +654,11 @@ static char *x86emu_fpu_op_dd_tab[] = {
2832 "ESC_DD\t2C,", "ESC_DD\t2D,", "ESC_DD\t2E,", "ESC_DD\t2F,",
2833 };
2834
2835-#endif /* DEBUG */
2836+#endif /* DEBUG */
2837
2838 /* opcode=0xdd */
2839-void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1))
2840+void
2841+x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1))
2842 {
2843 int mod, rl, rh;
2844 uint destoffset = 0;
2845@@ -658,75 +668,75 @@ void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1))
2846 FETCH_DECODE_MODRM(mod, rh, rl);
2847 DECODE_PRINTINSTR32(x86emu_fpu_op_dd_tab, mod, rh, rl);
2848 switch (mod) {
2849- case 0:
2850+ case 0:
2851 destoffset = decode_rm00_address(rl);
2852 DECODE_PRINTF("\n");
2853 break;
2854- case 1:
2855+ case 1:
2856 destoffset = decode_rm01_address(rl);
2857 DECODE_PRINTF("\n");
2858 break;
2859- case 2:
2860+ case 2:
2861 destoffset = decode_rm10_address(rl);
2862 DECODE_PRINTF("\n");
2863 break;
2864- case 3: /* register to register */
2865- stkelem = (u8)rl;
2866+ case 3: /* register to register */
2867+ stkelem = (u8) rl;
2868 DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
2869 break;
2870 }
2871 #ifdef X86EMU_FPU_PRESENT
2872 switch (mod) {
2873- case 3:
2874+ case 3:
2875 switch (rh) {
2876- case 0:
2877+ case 0:
2878 x86emu_fpu_R_ffree(stkelem);
2879 break;
2880- case 1:
2881+ case 1:
2882 x86emu_fpu_R_fxch(stkelem);
2883 break;
2884- case 2:
2885+ case 2:
2886 x86emu_fpu_R_fst(stkelem); /* register version */
2887 break;
2888- case 3:
2889+ case 3:
2890 x86emu_fpu_R_fstp(stkelem); /* register version */
2891 break;
2892- default:
2893+ default:
2894 x86emu_fpu_illegal();
2895 break;
2896 }
2897 break;
2898- default:
2899+ default:
2900 switch (rh) {
2901- case 0:
2902+ case 0:
2903 x86emu_fpu_M_fld(X86EMU_FPU_DOUBLE, destoffset);
2904 break;
2905- case 1:
2906+ case 1:
2907 x86emu_fpu_illegal();
2908 break;
2909- case 2:
2910+ case 2:
2911 x86emu_fpu_M_fst(X86EMU_FPU_DOUBLE, destoffset);
2912 break;
2913- case 3:
2914+ case 3:
2915 x86emu_fpu_M_fstp(X86EMU_FPU_DOUBLE, destoffset);
2916 break;
2917- case 4:
2918+ case 4:
2919 x86emu_fpu_M_frstor(X86EMU_FPU_WORD, destoffset);
2920 break;
2921- case 5:
2922+ case 5:
2923 x86emu_fpu_illegal();
2924 break;
2925- case 6:
2926+ case 6:
2927 x86emu_fpu_M_fsave(X86EMU_FPU_WORD, destoffset);
2928 break;
2929- case 7:
2930+ case 7:
2931 x86emu_fpu_M_fstsw(X86EMU_FPU_WORD, destoffset);
2932 break;
2933 }
2934 }
2935 #else
2936- (void)destoffset;
2937- (void)stkelem;
2938+ (void) destoffset;
2939+ (void) stkelem;
2940 #endif
2941 DECODE_CLEAR_SEGOVR();
2942 END_OF_INSTR_NO_TRACE();
2943@@ -734,8 +744,7 @@ void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1))
2944
2945 #ifdef DEBUG
2946
2947-static char *x86emu_fpu_op_de_tab[] =
2948-{
2949+static const char *x86emu_fpu_op_de_tab[] = {
2950 "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",
2951 "FICOMP\tWORD PTR ",
2952 "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",
2953@@ -755,10 +764,11 @@ static char *x86emu_fpu_op_de_tab[] =
2954 "FSUBRP\t", "FSUBP\t", "FDIVRP\t", "FDIVP\t",
2955 };
2956
2957-#endif /* DEBUG */
2958+#endif /* DEBUG */
2959
2960 /* opcode=0xde */
2961-void x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1))
2962+void
2963+x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1))
2964 {
2965 int mod, rl, rh;
2966 uint destoffset = 0;
2967@@ -768,87 +778,87 @@ void x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1))
2968 FETCH_DECODE_MODRM(mod, rh, rl);
2969 DECODE_PRINTINSTR32(x86emu_fpu_op_de_tab, mod, rh, rl);
2970 switch (mod) {
2971- case 0:
2972+ case 0:
2973 destoffset = decode_rm00_address(rl);
2974 DECODE_PRINTF("\n");
2975 break;
2976- case 1:
2977+ case 1:
2978 destoffset = decode_rm01_address(rl);
2979 DECODE_PRINTF("\n");
2980 break;
2981- case 2:
2982+ case 2:
2983 destoffset = decode_rm10_address(rl);
2984 DECODE_PRINTF("\n");
2985 break;
2986- case 3: /* register to register */
2987- stkelem = (u8)rl;
2988+ case 3: /* register to register */
2989+ stkelem = (u8) rl;
2990 DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
2991 break;
2992 }
2993 #ifdef X86EMU_FPU_PRESENT
2994 switch (mod) {
2995- case 3:
2996+ case 3:
2997 switch (rh) {
2998- case 0:
2999+ case 0:
3000 x86emu_fpu_R_faddp(stkelem, X86EMU_FPU_STKTOP);
3001 break;
3002- case 1:
3003+ case 1:
3004 x86emu_fpu_R_fmulp(stkelem, X86EMU_FPU_STKTOP);
3005 break;
3006- case 2:
3007+ case 2:
3008 x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);
3009 break;
3010- case 3:
3011+ case 3:
3012 if (stkelem == 1)
3013- x86emu_fpu_R_fcompp(stkelem, X86EMU_FPU_STKTOP);
3014+ x86emu_fpu_R_fcompp(stkelem, X86EMU_FPU_STKTOP);
3015 else
3016- x86emu_fpu_illegal();
3017+ x86emu_fpu_illegal();
3018 break;
3019- case 4:
3020+ case 4:
3021 x86emu_fpu_R_fsubrp(stkelem, X86EMU_FPU_STKTOP);
3022 break;
3023- case 5:
3024+ case 5:
3025 x86emu_fpu_R_fsubp(stkelem, X86EMU_FPU_STKTOP);
3026 break;
3027- case 6:
3028+ case 6:
3029 x86emu_fpu_R_fdivrp(stkelem, X86EMU_FPU_STKTOP);
3030 break;
3031- case 7:
3032+ case 7:
3033 x86emu_fpu_R_fdivp(stkelem, X86EMU_FPU_STKTOP);
3034 break;
3035 }
3036 break;
3037- default:
3038+ default:
3039 switch (rh) {
3040- case 0:
3041+ case 0:
3042 x86emu_fpu_M_fiadd(X86EMU_FPU_WORD, destoffset);
3043 break;
3044- case 1:
3045+ case 1:
3046 x86emu_fpu_M_fimul(X86EMU_FPU_WORD, destoffset);
3047 break;
3048- case 2:
3049+ case 2:
3050 x86emu_fpu_M_ficom(X86EMU_FPU_WORD, destoffset);
3051 break;
3052- case 3:
3053+ case 3:
3054 x86emu_fpu_M_ficomp(X86EMU_FPU_WORD, destoffset);
3055 break;
3056- case 4:
3057+ case 4:
3058 x86emu_fpu_M_fisub(X86EMU_FPU_WORD, destoffset);
3059 break;
3060- case 5:
3061+ case 5:
3062 x86emu_fpu_M_fisubr(X86EMU_FPU_WORD, destoffset);
3063 break;
3064- case 6:
3065+ case 6:
3066 x86emu_fpu_M_fidiv(X86EMU_FPU_WORD, destoffset);
3067 break;
3068- case 7:
3069+ case 7:
3070 x86emu_fpu_M_fidivr(X86EMU_FPU_WORD, destoffset);
3071 break;
3072 }
3073 }
3074 #else
3075- (void)destoffset;
3076- (void)stkelem;
3077+ (void) destoffset;
3078+ (void) stkelem;
3079 #endif
3080 DECODE_CLEAR_SEGOVR();
3081 END_OF_INSTR_NO_TRACE();
3082@@ -856,7 +866,7 @@ void x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1))
3083
3084 #ifdef DEBUG
3085
3086-static char *x86emu_fpu_op_df_tab[] = {
3087+static const char *x86emu_fpu_op_df_tab[] = {
3088 /* mod == 00 */
3089 "FILD\tWORD PTR ", "ESC_DF\t39\n", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",
3090 "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",
3091@@ -877,10 +887,11 @@ static char *x86emu_fpu_op_df_tab[] = {
3092 "ESC_DF\t3C,", "ESC_DF\t3D,", "ESC_DF\t3E,", "ESC_DF\t3F,"
3093 };
3094
3095-#endif /* DEBUG */
3096+#endif /* DEBUG */
3097
3098 /* opcode=0xdf */
3099-void x86emuOp_esc_coprocess_df(u8 X86EMU_UNUSED(op1))
3100+void
3101+x86emuOp_esc_coprocess_df(u8 X86EMU_UNUSED(op1))
3102 {
3103 int mod, rl, rh;
3104 uint destoffset = 0;
3105@@ -890,75 +901,75 @@ void x86emuOp_esc_coprocess_df(u8 X86EMU_UNUSED(op1))
3106 FETCH_DECODE_MODRM(mod, rh, rl);
3107 DECODE_PRINTINSTR32(x86emu_fpu_op_df_tab, mod, rh, rl);
3108 switch (mod) {
3109- case 0:
3110+ case 0:
3111 destoffset = decode_rm00_address(rl);
3112 DECODE_PRINTF("\n");
3113 break;
3114- case 1:
3115+ case 1:
3116 destoffset = decode_rm01_address(rl);
3117 DECODE_PRINTF("\n");
3118 break;
3119- case 2:
3120+ case 2:
3121 destoffset = decode_rm10_address(rl);
3122 DECODE_PRINTF("\n");
3123 break;
3124- case 3: /* register to register */
3125- stkelem = (u8)rl;
3126+ case 3: /* register to register */
3127+ stkelem = (u8) rl;
3128 DECODE_PRINTF2("\tST(%d)\n", stkelem);
3129 break;
3130 }
3131 #ifdef X86EMU_FPU_PRESENT
3132 switch (mod) {
3133- case 3:
3134+ case 3:
3135 switch (rh) {
3136- case 0:
3137+ case 0:
3138 x86emu_fpu_R_ffree(stkelem);
3139 break;
3140- case 1:
3141+ case 1:
3142 x86emu_fpu_R_fxch(stkelem);
3143 break;
3144- case 2:
3145+ case 2:
3146 x86emu_fpu_R_fst(stkelem); /* register version */
3147 break;
3148- case 3:
3149+ case 3:
3150 x86emu_fpu_R_fstp(stkelem); /* register version */
3151 break;
3152- default:
3153+ default:
3154 x86emu_fpu_illegal();
3155 break;
3156 }
3157 break;
3158- default:
3159+ default:
3160 switch (rh) {
3161- case 0:
3162+ case 0:
3163 x86emu_fpu_M_fild(X86EMU_FPU_WORD, destoffset);
3164 break;
3165- case 1:
3166+ case 1:
3167 x86emu_fpu_illegal();
3168 break;
3169- case 2:
3170+ case 2:
3171 x86emu_fpu_M_fist(X86EMU_FPU_WORD, destoffset);
3172 break;
3173- case 3:
3174+ case 3:
3175 x86emu_fpu_M_fistp(X86EMU_FPU_WORD, destoffset);
3176 break;
3177- case 4:
3178+ case 4:
3179 x86emu_fpu_M_fbld(X86EMU_FPU_BSD, destoffset);
3180 break;
3181- case 5:
3182+ case 5:
3183 x86emu_fpu_M_fild(X86EMU_FPU_LONG, destoffset);
3184 break;
3185- case 6:
3186+ case 6:
3187 x86emu_fpu_M_fbstp(X86EMU_FPU_BSD, destoffset);
3188 break;
3189- case 7:
3190+ case 7:
3191 x86emu_fpu_M_fistp(X86EMU_FPU_LONG, destoffset);
3192 break;
3193 }
3194 }
3195 #else
3196- (void)destoffset;
3197- (void)stkelem;
3198+ (void) destoffset;
3199+ (void) stkelem;
3200 #endif
3201 DECODE_CLEAR_SEGOVR();
3202 END_OF_INSTR_NO_TRACE();
3203diff --git a/libs/x86emu/ops.c b/libs/x86emu/ops.c
3204index 4f504c9..76b8358 100644
3205--- a/libs/x86emu/ops.c
3206+++ b/libs/x86emu/ops.c
3207@@ -81,17 +81,17 @@ op1 - Instruction op code
3208 REMARKS:
3209 Handles illegal opcodes.
3210 ****************************************************************************/
3211-static void x86emuOp_illegal_op(
3212- u8 op1)
3213+static void
3214+x86emuOp_illegal_op(u8 op1)
3215 {
3216 START_OF_INSTR();
3217 if (M.x86.R_SP != 0) {
3218- DECODE_PRINTF("ILLEGAL X86 OPCODE\n");
3219- TRACE_REGS();
3220- printk("%04x:%04x: %02X ILLEGAL X86 OPCODE!\n",
3221- M.x86.R_CS, M.x86.R_IP-1,op1);
3222- HALT_SYS();
3223- }
3224+ DECODE_PRINTF("ILLEGAL X86 OPCODE\n");
3225+ TRACE_REGS();
3226+ DB(printk("%04x:%04x: %02X ILLEGAL X86 OPCODE!\n",
3227+ M.x86.R_CS, M.x86.R_IP - 1, op1));
3228+ HALT_SYS();
3229+ }
3230 else {
3231 /* If we get here, it means the stack pointer is back to zero
3232 * so we are just returning from an emulator service call
3233@@ -100,7 +100,7 @@ static void x86emuOp_illegal_op(
3234 * call.
3235 */
3236 X86EMU_halt_sys();
3237- }
3238+ }
3239 END_OF_INSTR();
3240 }
3241
3242@@ -108,7 +108,8 @@ static void x86emuOp_illegal_op(
3243 REMARKS:
3244 Handles opcode 0x00
3245 ****************************************************************************/
3246-static void x86emuOp_add_byte_RM_R(u8 X86EMU_UNUSED(op1))
3247+static void
3248+x86emuOp_add_byte_RM_R(u8 X86EMU_UNUSED(op1))
3249 {
3250 int mod, rl, rh;
3251 uint destoffset;
3252@@ -149,7 +150,7 @@ static void x86emuOp_add_byte_RM_R(u8 X86EMU_UNUSED(op1))
3253 destval = add_byte(destval, *srcreg);
3254 store_data_byte(destoffset, destval);
3255 break;
3256- case 3: /* register to register */
3257+ case 3: /* register to register */
3258 destreg = DECODE_RM_BYTE_REGISTER(rl);
3259 DECODE_PRINTF(",");
3260 srcreg = DECODE_RM_BYTE_REGISTER(rh);
3261@@ -166,7 +167,8 @@ static void x86emuOp_add_byte_RM_R(u8 X86EMU_UNUSED(op1))
3262 REMARKS:
3263 Handles opcode 0x01
3264 ****************************************************************************/
3265-static void x86emuOp_add_word_RM_R(u8 X86EMU_UNUSED(op1))
3266+static void
3267+x86emuOp_add_word_RM_R(u8 X86EMU_UNUSED(op1))
3268 {
3269 int mod, rl, rh;
3270 uint destoffset;
3271@@ -188,7 +190,8 @@ static void x86emuOp_add_word_RM_R(u8 X86EMU_UNUSED(op1))
3272 TRACE_AND_STEP();
3273 destval = add_long(destval, *srcreg);
3274 store_data_long(destoffset, destval);
3275- } else {
3276+ }
3277+ else {
3278 u16 destval;
3279 u16 *srcreg;
3280
3281@@ -215,7 +218,8 @@ static void x86emuOp_add_word_RM_R(u8 X86EMU_UNUSED(op1))
3282 TRACE_AND_STEP();
3283 destval = add_long(destval, *srcreg);
3284 store_data_long(destoffset, destval);
3285- } else {
3286+ }
3287+ else {
3288 u16 destval;
3289 u16 *srcreg;
3290
3291@@ -242,7 +246,8 @@ static void x86emuOp_add_word_RM_R(u8 X86EMU_UNUSED(op1))
3292 TRACE_AND_STEP();
3293 destval = add_long(destval, *srcreg);
3294 store_data_long(destoffset, destval);
3295- } else {
3296+ }
3297+ else {
3298 u16 destval;
3299 u16 *srcreg;
3300
3301@@ -256,9 +261,9 @@ static void x86emuOp_add_word_RM_R(u8 X86EMU_UNUSED(op1))
3302 store_data_word(destoffset, destval);
3303 }
3304 break;
3305- case 3: /* register to register */
3306+ case 3: /* register to register */
3307 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
3308- u32 *destreg,*srcreg;
3309+ u32 *destreg, *srcreg;
3310
3311 destreg = DECODE_RM_LONG_REGISTER(rl);
3312 DECODE_PRINTF(",");
3313@@ -266,8 +271,9 @@ static void x86emuOp_add_word_RM_R(u8 X86EMU_UNUSED(op1))
3314 DECODE_PRINTF("\n");
3315 TRACE_AND_STEP();
3316 *destreg = add_long(*destreg, *srcreg);
3317- } else {
3318- u16 *destreg,*srcreg;
3319+ }
3320+ else {
3321+ u16 *destreg, *srcreg;
3322
3323 destreg = DECODE_RM_WORD_REGISTER(rl);
3324 DECODE_PRINTF(",");
3325@@ -286,7 +292,8 @@ static void x86emuOp_add_word_RM_R(u8 X86EMU_UNUSED(op1))
3326 REMARKS:
3327 Handles opcode 0x02
3328 ****************************************************************************/
3329-static void x86emuOp_add_byte_R_RM(u8 X86EMU_UNUSED(op1))
3330+static void
3331+x86emuOp_add_byte_R_RM(u8 X86EMU_UNUSED(op1))
3332 {
3333 int mod, rl, rh;
3334 u8 *destreg, *srcreg;
3335@@ -324,7 +331,7 @@ static void x86emuOp_add_byte_R_RM(u8 X86EMU_UNUSED(op1))
3336 TRACE_AND_STEP();
3337 *destreg = add_byte(*destreg, srcval);
3338 break;
3339- case 3: /* register to register */
3340+ case 3: /* register to register */
3341 destreg = DECODE_RM_BYTE_REGISTER(rh);
3342 DECODE_PRINTF(",");
3343 srcreg = DECODE_RM_BYTE_REGISTER(rl);
3344@@ -341,7 +348,8 @@ static void x86emuOp_add_byte_R_RM(u8 X86EMU_UNUSED(op1))
3345 REMARKS:
3346 Handles opcode 0x03
3347 ****************************************************************************/
3348-static void x86emuOp_add_word_R_RM(u8 X86EMU_UNUSED(op1))
3349+static void
3350+x86emuOp_add_word_R_RM(u8 X86EMU_UNUSED(op1))
3351 {
3352 int mod, rl, rh;
3353 uint srcoffset;
3354@@ -362,7 +370,8 @@ static void x86emuOp_add_word_R_RM(u8 X86EMU_UNUSED(op1))
3355 DECODE_PRINTF("\n");
3356 TRACE_AND_STEP();
3357 *destreg = add_long(*destreg, srcval);
3358- } else {
3359+ }
3360+ else {
3361 u16 *destreg;
3362 u16 srcval;
3363
3364@@ -387,7 +396,8 @@ static void x86emuOp_add_word_R_RM(u8 X86EMU_UNUSED(op1))
3365 DECODE_PRINTF("\n");
3366 TRACE_AND_STEP();
3367 *destreg = add_long(*destreg, srcval);
3368- } else {
3369+ }
3370+ else {
3371 u16 *destreg;
3372 u16 srcval;
3373
3374@@ -412,7 +422,8 @@ static void x86emuOp_add_word_R_RM(u8 X86EMU_UNUSED(op1))
3375 DECODE_PRINTF("\n");
3376 TRACE_AND_STEP();
3377 *destreg = add_long(*destreg, srcval);
3378- } else {
3379+ }
3380+ else {
3381 u16 *destreg;
3382 u16 srcval;
3383
3384@@ -425,9 +436,9 @@ static void x86emuOp_add_word_R_RM(u8 X86EMU_UNUSED(op1))
3385 *destreg = add_word(*destreg, srcval);
3386 }
3387 break;
3388- case 3: /* register to register */
3389+ case 3: /* register to register */
3390 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
3391- u32 *destreg,*srcreg;
3392+ u32 *destreg, *srcreg;
3393
3394 destreg = DECODE_RM_LONG_REGISTER(rh);
3395 DECODE_PRINTF(",");
3396@@ -435,8 +446,9 @@ static void x86emuOp_add_word_R_RM(u8 X86EMU_UNUSED(op1))
3397 DECODE_PRINTF("\n");
3398 TRACE_AND_STEP();
3399 *destreg = add_long(*destreg, *srcreg);
3400- } else {
3401- u16 *destreg,*srcreg;
3402+ }
3403+ else {
3404+ u16 *destreg, *srcreg;
3405
3406 destreg = DECODE_RM_WORD_REGISTER(rh);
3407 DECODE_PRINTF(",");
3408@@ -455,7 +467,8 @@ static void x86emuOp_add_word_R_RM(u8 X86EMU_UNUSED(op1))
3409 REMARKS:
3410 Handles opcode 0x04
3411 ****************************************************************************/
3412-static void x86emuOp_add_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
3413+static void
3414+x86emuOp_add_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
3415 {
3416 u8 srcval;
3417
3418@@ -473,7 +486,8 @@ static void x86emuOp_add_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
3419 REMARKS:
3420 Handles opcode 0x05
3421 ****************************************************************************/
3422-static void x86emuOp_add_word_AX_IMM(u8 X86EMU_UNUSED(op1))
3423+static void
3424+x86emuOp_add_word_AX_IMM(u8 X86EMU_UNUSED(op1))
3425 {
3426 u32 srcval;
3427
3428@@ -481,7 +495,8 @@ static void x86emuOp_add_word_AX_IMM(u8 X86EMU_UNUSED(op1))
3429 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
3430 DECODE_PRINTF("ADD\tEAX,");
3431 srcval = fetch_long_imm();
3432- } else {
3433+ }
3434+ else {
3435 DECODE_PRINTF("ADD\tAX,");
3436 srcval = fetch_word_imm();
3437 }
3438@@ -489,8 +504,9 @@ static void x86emuOp_add_word_AX_IMM(u8 X86EMU_UNUSED(op1))
3439 TRACE_AND_STEP();
3440 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
3441 M.x86.R_EAX = add_long(M.x86.R_EAX, srcval);
3442- } else {
3443- M.x86.R_AX = add_word(M.x86.R_AX, (u16)srcval);
3444+ }
3445+ else {
3446+ M.x86.R_AX = add_word(M.x86.R_AX, (u16) srcval);
3447 }
3448 DECODE_CLEAR_SEGOVR();
3449 END_OF_INSTR();
3450@@ -500,7 +516,8 @@ static void x86emuOp_add_word_AX_IMM(u8 X86EMU_UNUSED(op1))
3451 REMARKS:
3452 Handles opcode 0x06
3453 ****************************************************************************/
3454-static void x86emuOp_push_ES(u8 X86EMU_UNUSED(op1))
3455+static void
3456+x86emuOp_push_ES(u8 X86EMU_UNUSED(op1))
3457 {
3458 START_OF_INSTR();
3459 DECODE_PRINTF("PUSH\tES\n");
3460@@ -514,7 +531,8 @@ static void x86emuOp_push_ES(u8 X86EMU_UNUSED(op1))
3461 REMARKS:
3462 Handles opcode 0x07
3463 ****************************************************************************/
3464-static void x86emuOp_pop_ES(u8 X86EMU_UNUSED(op1))
3465+static void
3466+x86emuOp_pop_ES(u8 X86EMU_UNUSED(op1))
3467 {
3468 START_OF_INSTR();
3469 DECODE_PRINTF("POP\tES\n");
3470@@ -528,7 +546,8 @@ static void x86emuOp_pop_ES(u8 X86EMU_UNUSED(op1))
3471 REMARKS:
3472 Handles opcode 0x08
3473 ****************************************************************************/
3474-static void x86emuOp_or_byte_RM_R(u8 X86EMU_UNUSED(op1))
3475+static void
3476+x86emuOp_or_byte_RM_R(u8 X86EMU_UNUSED(op1))
3477 {
3478 int mod, rl, rh;
3479 u8 *destreg, *srcreg;
3480@@ -569,7 +588,7 @@ static void x86emuOp_or_byte_RM_R(u8 X86EMU_UNUSED(op1))
3481 destval = or_byte(destval, *srcreg);
3482 store_data_byte(destoffset, destval);
3483 break;
3484- case 3: /* register to register */
3485+ case 3: /* register to register */
3486 destreg = DECODE_RM_BYTE_REGISTER(rl);
3487 DECODE_PRINTF(",");
3488 srcreg = DECODE_RM_BYTE_REGISTER(rh);
3489@@ -586,7 +605,8 @@ static void x86emuOp_or_byte_RM_R(u8 X86EMU_UNUSED(op1))
3490 REMARKS:
3491 Handles opcode 0x09
3492 ****************************************************************************/
3493-static void x86emuOp_or_word_RM_R(u8 X86EMU_UNUSED(op1))
3494+static void
3495+x86emuOp_or_word_RM_R(u8 X86EMU_UNUSED(op1))
3496 {
3497 int mod, rl, rh;
3498 uint destoffset;
3499@@ -608,7 +628,8 @@ static void x86emuOp_or_word_RM_R(u8 X86EMU_UNUSED(op1))
3500 TRACE_AND_STEP();
3501 destval = or_long(destval, *srcreg);
3502 store_data_long(destoffset, destval);
3503- } else {
3504+ }
3505+ else {
3506 u16 destval;
3507 u16 *srcreg;
3508
3509@@ -635,7 +656,8 @@ static void x86emuOp_or_word_RM_R(u8 X86EMU_UNUSED(op1))
3510 TRACE_AND_STEP();
3511 destval = or_long(destval, *srcreg);
3512 store_data_long(destoffset, destval);
3513- } else {
3514+ }
3515+ else {
3516 u16 destval;
3517 u16 *srcreg;
3518
3519@@ -662,7 +684,8 @@ static void x86emuOp_or_word_RM_R(u8 X86EMU_UNUSED(op1))
3520 TRACE_AND_STEP();
3521 destval = or_long(destval, *srcreg);
3522 store_data_long(destoffset, destval);
3523- } else {
3524+ }
3525+ else {
3526 u16 destval;
3527 u16 *srcreg;
3528
3529@@ -676,9 +699,9 @@ static void x86emuOp_or_word_RM_R(u8 X86EMU_UNUSED(op1))
3530 store_data_word(destoffset, destval);
3531 }
3532 break;
3533- case 3: /* register to register */
3534+ case 3: /* register to register */
3535 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
3536- u32 *destreg,*srcreg;
3537+ u32 *destreg, *srcreg;
3538
3539 destreg = DECODE_RM_LONG_REGISTER(rl);
3540 DECODE_PRINTF(",");
3541@@ -686,8 +709,9 @@ static void x86emuOp_or_word_RM_R(u8 X86EMU_UNUSED(op1))
3542 DECODE_PRINTF("\n");
3543 TRACE_AND_STEP();
3544 *destreg = or_long(*destreg, *srcreg);
3545- } else {
3546- u16 *destreg,*srcreg;
3547+ }
3548+ else {
3549+ u16 *destreg, *srcreg;
3550
3551 destreg = DECODE_RM_WORD_REGISTER(rl);
3552 DECODE_PRINTF(",");
3553@@ -706,7 +730,8 @@ static void x86emuOp_or_word_RM_R(u8 X86EMU_UNUSED(op1))
3554 REMARKS:
3555 Handles opcode 0x0a
3556 ****************************************************************************/
3557-static void x86emuOp_or_byte_R_RM(u8 X86EMU_UNUSED(op1))
3558+static void
3559+x86emuOp_or_byte_R_RM(u8 X86EMU_UNUSED(op1))
3560 {
3561 int mod, rl, rh;
3562 u8 *destreg, *srcreg;
3563@@ -744,7 +769,7 @@ static void x86emuOp_or_byte_R_RM(u8 X86EMU_UNUSED(op1))
3564 TRACE_AND_STEP();
3565 *destreg = or_byte(*destreg, srcval);
3566 break;
3567- case 3: /* register to register */
3568+ case 3: /* register to register */
3569 destreg = DECODE_RM_BYTE_REGISTER(rh);
3570 DECODE_PRINTF(",");
3571 srcreg = DECODE_RM_BYTE_REGISTER(rl);
3572@@ -761,7 +786,8 @@ static void x86emuOp_or_byte_R_RM(u8 X86EMU_UNUSED(op1))
3573 REMARKS:
3574 Handles opcode 0x0b
3575 ****************************************************************************/
3576-static void x86emuOp_or_word_R_RM(u8 X86EMU_UNUSED(op1))
3577+static void
3578+x86emuOp_or_word_R_RM(u8 X86EMU_UNUSED(op1))
3579 {
3580 int mod, rl, rh;
3581 uint srcoffset;
3582@@ -782,7 +808,8 @@ static void x86emuOp_or_word_R_RM(u8 X86EMU_UNUSED(op1))
3583 DECODE_PRINTF("\n");
3584 TRACE_AND_STEP();
3585 *destreg = or_long(*destreg, srcval);
3586- } else {
3587+ }
3588+ else {
3589 u16 *destreg;
3590 u16 srcval;
3591
3592@@ -807,7 +834,8 @@ static void x86emuOp_or_word_R_RM(u8 X86EMU_UNUSED(op1))
3593 DECODE_PRINTF("\n");
3594 TRACE_AND_STEP();
3595 *destreg = or_long(*destreg, srcval);
3596- } else {
3597+ }
3598+ else {
3599 u16 *destreg;
3600 u16 srcval;
3601
3602@@ -832,7 +860,8 @@ static void x86emuOp_or_word_R_RM(u8 X86EMU_UNUSED(op1))
3603 DECODE_PRINTF("\n");
3604 TRACE_AND_STEP();
3605 *destreg = or_long(*destreg, srcval);
3606- } else {
3607+ }
3608+ else {
3609 u16 *destreg;
3610 u16 srcval;
3611
3612@@ -845,9 +874,9 @@ static void x86emuOp_or_word_R_RM(u8 X86EMU_UNUSED(op1))
3613 *destreg = or_word(*destreg, srcval);
3614 }
3615 break;
3616- case 3: /* register to register */
3617+ case 3: /* register to register */
3618 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
3619- u32 *destreg,*srcreg;
3620+ u32 *destreg, *srcreg;
3621
3622 destreg = DECODE_RM_LONG_REGISTER(rh);
3623 DECODE_PRINTF(",");
3624@@ -855,8 +884,9 @@ static void x86emuOp_or_word_R_RM(u8 X86EMU_UNUSED(op1))
3625 DECODE_PRINTF("\n");
3626 TRACE_AND_STEP();
3627 *destreg = or_long(*destreg, *srcreg);
3628- } else {
3629- u16 *destreg,*srcreg;
3630+ }
3631+ else {
3632+ u16 *destreg, *srcreg;
3633
3634 destreg = DECODE_RM_WORD_REGISTER(rh);
3635 DECODE_PRINTF(",");
3636@@ -875,7 +905,8 @@ static void x86emuOp_or_word_R_RM(u8 X86EMU_UNUSED(op1))
3637 REMARKS:
3638 Handles opcode 0x0c
3639 ****************************************************************************/
3640-static void x86emuOp_or_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
3641+static void
3642+x86emuOp_or_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
3643 {
3644 u8 srcval;
3645
3646@@ -893,7 +924,8 @@ static void x86emuOp_or_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
3647 REMARKS:
3648 Handles opcode 0x0d
3649 ****************************************************************************/
3650-static void x86emuOp_or_word_AX_IMM(u8 X86EMU_UNUSED(op1))
3651+static void
3652+x86emuOp_or_word_AX_IMM(u8 X86EMU_UNUSED(op1))
3653 {
3654 u32 srcval;
3655
3656@@ -901,7 +933,8 @@ static void x86emuOp_or_word_AX_IMM(u8 X86EMU_UNUSED(op1))
3657 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
3658 DECODE_PRINTF("OR\tEAX,");
3659 srcval = fetch_long_imm();
3660- } else {
3661+ }
3662+ else {
3663 DECODE_PRINTF("OR\tAX,");
3664 srcval = fetch_word_imm();
3665 }
3666@@ -909,8 +942,9 @@ static void x86emuOp_or_word_AX_IMM(u8 X86EMU_UNUSED(op1))
3667 TRACE_AND_STEP();
3668 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
3669 M.x86.R_EAX = or_long(M.x86.R_EAX, srcval);
3670- } else {
3671- M.x86.R_AX = or_word(M.x86.R_AX, (u16)srcval);
3672+ }
3673+ else {
3674+ M.x86.R_AX = or_word(M.x86.R_AX, (u16) srcval);
3675 }
3676 DECODE_CLEAR_SEGOVR();
3677 END_OF_INSTR();
3678@@ -920,7 +954,8 @@ static void x86emuOp_or_word_AX_IMM(u8 X86EMU_UNUSED(op1))
3679 REMARKS:
3680 Handles opcode 0x0e
3681 ****************************************************************************/
3682-static void x86emuOp_push_CS(u8 X86EMU_UNUSED(op1))
3683+static void
3684+x86emuOp_push_CS(u8 X86EMU_UNUSED(op1))
3685 {
3686 START_OF_INSTR();
3687 DECODE_PRINTF("PUSH\tCS\n");
3688@@ -934,18 +969,21 @@ static void x86emuOp_push_CS(u8 X86EMU_UNUSED(op1))
3689 REMARKS:
3690 Handles opcode 0x0f. Escape for two-byte opcode (286 or better)
3691 ****************************************************************************/
3692-static void x86emuOp_two_byte(u8 X86EMU_UNUSED(op1))
3693+static void
3694+x86emuOp_two_byte(u8 X86EMU_UNUSED(op1))
3695 {
3696- u8 op2 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
3697+ u8 op2 = (*sys_rdb) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP++));
3698+
3699 INC_DECODED_INST_LEN(1);
3700- (*x86emu_optab2[op2])(op2);
3701+ (*x86emu_optab2[op2]) (op2);
3702 }
3703
3704 /****************************************************************************
3705 REMARKS:
3706 Handles opcode 0x10
3707 ****************************************************************************/
3708-static void x86emuOp_adc_byte_RM_R(u8 X86EMU_UNUSED(op1))
3709+static void
3710+x86emuOp_adc_byte_RM_R(u8 X86EMU_UNUSED(op1))
3711 {
3712 int mod, rl, rh;
3713 u8 *destreg, *srcreg;
3714@@ -986,7 +1024,7 @@ static void x86emuOp_adc_byte_RM_R(u8 X86EMU_UNUSED(op1))
3715 destval = adc_byte(destval, *srcreg);
3716 store_data_byte(destoffset, destval);
3717 break;
3718- case 3: /* register to register */
3719+ case 3: /* register to register */
3720 destreg = DECODE_RM_BYTE_REGISTER(rl);
3721 DECODE_PRINTF(",");
3722 srcreg = DECODE_RM_BYTE_REGISTER(rh);
3723@@ -1003,7 +1041,8 @@ static void x86emuOp_adc_byte_RM_R(u8 X86EMU_UNUSED(op1))
3724 REMARKS:
3725 Handles opcode 0x11
3726 ****************************************************************************/
3727-static void x86emuOp_adc_word_RM_R(u8 X86EMU_UNUSED(op1))
3728+static void
3729+x86emuOp_adc_word_RM_R(u8 X86EMU_UNUSED(op1))
3730 {
3731 int mod, rl, rh;
3732 uint destoffset;
3733@@ -1025,7 +1064,8 @@ static void x86emuOp_adc_word_RM_R(u8 X86EMU_UNUSED(op1))
3734 TRACE_AND_STEP();
3735 destval = adc_long(destval, *srcreg);
3736 store_data_long(destoffset, destval);
3737- } else {
3738+ }
3739+ else {
3740 u16 destval;
3741 u16 *srcreg;
3742
3743@@ -1052,7 +1092,8 @@ static void x86emuOp_adc_word_RM_R(u8 X86EMU_UNUSED(op1))
3744 TRACE_AND_STEP();
3745 destval = adc_long(destval, *srcreg);
3746 store_data_long(destoffset, destval);
3747- } else {
3748+ }
3749+ else {
3750 u16 destval;
3751 u16 *srcreg;
3752
3753@@ -1079,7 +1120,8 @@ static void x86emuOp_adc_word_RM_R(u8 X86EMU_UNUSED(op1))
3754 TRACE_AND_STEP();
3755 destval = adc_long(destval, *srcreg);
3756 store_data_long(destoffset, destval);
3757- } else {
3758+ }
3759+ else {
3760 u16 destval;
3761 u16 *srcreg;
3762
3763@@ -1093,9 +1135,9 @@ static void x86emuOp_adc_word_RM_R(u8 X86EMU_UNUSED(op1))
3764 store_data_word(destoffset, destval);
3765 }
3766 break;
3767- case 3: /* register to register */
3768+ case 3: /* register to register */
3769 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
3770- u32 *destreg,*srcreg;
3771+ u32 *destreg, *srcreg;
3772
3773 destreg = DECODE_RM_LONG_REGISTER(rl);
3774 DECODE_PRINTF(",");
3775@@ -1103,8 +1145,9 @@ static void x86emuOp_adc_word_RM_R(u8 X86EMU_UNUSED(op1))
3776 DECODE_PRINTF("\n");
3777 TRACE_AND_STEP();
3778 *destreg = adc_long(*destreg, *srcreg);
3779- } else {
3780- u16 *destreg,*srcreg;
3781+ }
3782+ else {
3783+ u16 *destreg, *srcreg;
3784
3785 destreg = DECODE_RM_WORD_REGISTER(rl);
3786 DECODE_PRINTF(",");
3787@@ -1123,7 +1166,8 @@ static void x86emuOp_adc_word_RM_R(u8 X86EMU_UNUSED(op1))
3788 REMARKS:
3789 Handles opcode 0x12
3790 ****************************************************************************/
3791-static void x86emuOp_adc_byte_R_RM(u8 X86EMU_UNUSED(op1))
3792+static void
3793+x86emuOp_adc_byte_R_RM(u8 X86EMU_UNUSED(op1))
3794 {
3795 int mod, rl, rh;
3796 u8 *destreg, *srcreg;
3797@@ -1161,7 +1205,7 @@ static void x86emuOp_adc_byte_R_RM(u8 X86EMU_UNUSED(op1))
3798 TRACE_AND_STEP();
3799 *destreg = adc_byte(*destreg, srcval);
3800 break;
3801- case 3: /* register to register */
3802+ case 3: /* register to register */
3803 destreg = DECODE_RM_BYTE_REGISTER(rh);
3804 DECODE_PRINTF(",");
3805 srcreg = DECODE_RM_BYTE_REGISTER(rl);
3806@@ -1178,7 +1222,8 @@ static void x86emuOp_adc_byte_R_RM(u8 X86EMU_UNUSED(op1))
3807 REMARKS:
3808 Handles opcode 0x13
3809 ****************************************************************************/
3810-static void x86emuOp_adc_word_R_RM(u8 X86EMU_UNUSED(op1))
3811+static void
3812+x86emuOp_adc_word_R_RM(u8 X86EMU_UNUSED(op1))
3813 {
3814 int mod, rl, rh;
3815 uint srcoffset;
3816@@ -1199,7 +1244,8 @@ static void x86emuOp_adc_word_R_RM(u8 X86EMU_UNUSED(op1))
3817 DECODE_PRINTF("\n");
3818 TRACE_AND_STEP();
3819 *destreg = adc_long(*destreg, srcval);
3820- } else {
3821+ }
3822+ else {
3823 u16 *destreg;
3824 u16 srcval;
3825
3826@@ -1224,7 +1270,8 @@ static void x86emuOp_adc_word_R_RM(u8 X86EMU_UNUSED(op1))
3827 DECODE_PRINTF("\n");
3828 TRACE_AND_STEP();
3829 *destreg = adc_long(*destreg, srcval);
3830- } else {
3831+ }
3832+ else {
3833 u16 *destreg;
3834 u16 srcval;
3835
3836@@ -1249,7 +1296,8 @@ static void x86emuOp_adc_word_R_RM(u8 X86EMU_UNUSED(op1))
3837 DECODE_PRINTF("\n");
3838 TRACE_AND_STEP();
3839 *destreg = adc_long(*destreg, srcval);
3840- } else {
3841+ }
3842+ else {
3843 u16 *destreg;
3844 u16 srcval;
3845
3846@@ -1262,9 +1310,9 @@ static void x86emuOp_adc_word_R_RM(u8 X86EMU_UNUSED(op1))
3847 *destreg = adc_word(*destreg, srcval);
3848 }
3849 break;
3850- case 3: /* register to register */
3851+ case 3: /* register to register */
3852 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
3853- u32 *destreg,*srcreg;
3854+ u32 *destreg, *srcreg;
3855
3856 destreg = DECODE_RM_LONG_REGISTER(rh);
3857 DECODE_PRINTF(",");
3858@@ -1272,8 +1320,9 @@ static void x86emuOp_adc_word_R_RM(u8 X86EMU_UNUSED(op1))
3859 DECODE_PRINTF("\n");
3860 TRACE_AND_STEP();
3861 *destreg = adc_long(*destreg, *srcreg);
3862- } else {
3863- u16 *destreg,*srcreg;
3864+ }
3865+ else {
3866+ u16 *destreg, *srcreg;
3867
3868 destreg = DECODE_RM_WORD_REGISTER(rh);
3869 DECODE_PRINTF(",");
3870@@ -1292,7 +1341,8 @@ static void x86emuOp_adc_word_R_RM(u8 X86EMU_UNUSED(op1))
3871 REMARKS:
3872 Handles opcode 0x14
3873 ****************************************************************************/
3874-static void x86emuOp_adc_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
3875+static void
3876+x86emuOp_adc_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
3877 {
3878 u8 srcval;
3879
3880@@ -1310,7 +1360,8 @@ static void x86emuOp_adc_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
3881 REMARKS:
3882 Handles opcode 0x15
3883 ****************************************************************************/
3884-static void x86emuOp_adc_word_AX_IMM(u8 X86EMU_UNUSED(op1))
3885+static void
3886+x86emuOp_adc_word_AX_IMM(u8 X86EMU_UNUSED(op1))
3887 {
3888 u32 srcval;
3889
3890@@ -1318,7 +1369,8 @@ static void x86emuOp_adc_word_AX_IMM(u8 X86EMU_UNUSED(op1))
3891 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
3892 DECODE_PRINTF("ADC\tEAX,");
3893 srcval = fetch_long_imm();
3894- } else {
3895+ }
3896+ else {
3897 DECODE_PRINTF("ADC\tAX,");
3898 srcval = fetch_word_imm();
3899 }
3900@@ -1326,8 +1378,9 @@ static void x86emuOp_adc_word_AX_IMM(u8 X86EMU_UNUSED(op1))
3901 TRACE_AND_STEP();
3902 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
3903 M.x86.R_EAX = adc_long(M.x86.R_EAX, srcval);
3904- } else {
3905- M.x86.R_AX = adc_word(M.x86.R_AX, (u16)srcval);
3906+ }
3907+ else {
3908+ M.x86.R_AX = adc_word(M.x86.R_AX, (u16) srcval);
3909 }
3910 DECODE_CLEAR_SEGOVR();
3911 END_OF_INSTR();
3912@@ -1337,7 +1390,8 @@ static void x86emuOp_adc_word_AX_IMM(u8 X86EMU_UNUSED(op1))
3913 REMARKS:
3914 Handles opcode 0x16
3915 ****************************************************************************/
3916-static void x86emuOp_push_SS(u8 X86EMU_UNUSED(op1))
3917+static void
3918+x86emuOp_push_SS(u8 X86EMU_UNUSED(op1))
3919 {
3920 START_OF_INSTR();
3921 DECODE_PRINTF("PUSH\tSS\n");
3922@@ -1351,7 +1405,8 @@ static void x86emuOp_push_SS(u8 X86EMU_UNUSED(op1))
3923 REMARKS:
3924 Handles opcode 0x17
3925 ****************************************************************************/
3926-static void x86emuOp_pop_SS(u8 X86EMU_UNUSED(op1))
3927+static void
3928+x86emuOp_pop_SS(u8 X86EMU_UNUSED(op1))
3929 {
3930 START_OF_INSTR();
3931 DECODE_PRINTF("POP\tSS\n");
3932@@ -1365,7 +1420,8 @@ static void x86emuOp_pop_SS(u8 X86EMU_UNUSED(op1))
3933 REMARKS:
3934 Handles opcode 0x18
3935 ****************************************************************************/
3936-static void x86emuOp_sbb_byte_RM_R(u8 X86EMU_UNUSED(op1))
3937+static void
3938+x86emuOp_sbb_byte_RM_R(u8 X86EMU_UNUSED(op1))
3939 {
3940 int mod, rl, rh;
3941 u8 *destreg, *srcreg;
3942@@ -1406,7 +1462,7 @@ static void x86emuOp_sbb_byte_RM_R(u8 X86EMU_UNUSED(op1))
3943 destval = sbb_byte(destval, *srcreg);
3944 store_data_byte(destoffset, destval);
3945 break;
3946- case 3: /* register to register */
3947+ case 3: /* register to register */
3948 destreg = DECODE_RM_BYTE_REGISTER(rl);
3949 DECODE_PRINTF(",");
3950 srcreg = DECODE_RM_BYTE_REGISTER(rh);
3951@@ -1423,7 +1479,8 @@ static void x86emuOp_sbb_byte_RM_R(u8 X86EMU_UNUSED(op1))
3952 REMARKS:
3953 Handles opcode 0x19
3954 ****************************************************************************/
3955-static void x86emuOp_sbb_word_RM_R(u8 X86EMU_UNUSED(op1))
3956+static void
3957+x86emuOp_sbb_word_RM_R(u8 X86EMU_UNUSED(op1))
3958 {
3959 int mod, rl, rh;
3960 uint destoffset;
3961@@ -1445,7 +1502,8 @@ static void x86emuOp_sbb_word_RM_R(u8 X86EMU_UNUSED(op1))
3962 TRACE_AND_STEP();
3963 destval = sbb_long(destval, *srcreg);
3964 store_data_long(destoffset, destval);
3965- } else {
3966+ }
3967+ else {
3968 u16 destval;
3969 u16 *srcreg;
3970
3971@@ -1472,7 +1530,8 @@ static void x86emuOp_sbb_word_RM_R(u8 X86EMU_UNUSED(op1))
3972 TRACE_AND_STEP();
3973 destval = sbb_long(destval, *srcreg);
3974 store_data_long(destoffset, destval);
3975- } else {
3976+ }
3977+ else {
3978 u16 destval;
3979 u16 *srcreg;
3980
3981@@ -1499,7 +1558,8 @@ static void x86emuOp_sbb_word_RM_R(u8 X86EMU_UNUSED(op1))
3982 TRACE_AND_STEP();
3983 destval = sbb_long(destval, *srcreg);
3984 store_data_long(destoffset, destval);
3985- } else {
3986+ }
3987+ else {
3988 u16 destval;
3989 u16 *srcreg;
3990
3991@@ -1513,9 +1573,9 @@ static void x86emuOp_sbb_word_RM_R(u8 X86EMU_UNUSED(op1))
3992 store_data_word(destoffset, destval);
3993 }
3994 break;
3995- case 3: /* register to register */
3996+ case 3: /* register to register */
3997 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
3998- u32 *destreg,*srcreg;
3999+ u32 *destreg, *srcreg;
4000
4001 destreg = DECODE_RM_LONG_REGISTER(rl);
4002 DECODE_PRINTF(",");
4003@@ -1523,8 +1583,9 @@ static void x86emuOp_sbb_word_RM_R(u8 X86EMU_UNUSED(op1))
4004 DECODE_PRINTF("\n");
4005 TRACE_AND_STEP();
4006 *destreg = sbb_long(*destreg, *srcreg);
4007- } else {
4008- u16 *destreg,*srcreg;
4009+ }
4010+ else {
4011+ u16 *destreg, *srcreg;
4012
4013 destreg = DECODE_RM_WORD_REGISTER(rl);
4014 DECODE_PRINTF(",");
4015@@ -1543,7 +1604,8 @@ static void x86emuOp_sbb_word_RM_R(u8 X86EMU_UNUSED(op1))
4016 REMARKS:
4017 Handles opcode 0x1a
4018 ****************************************************************************/
4019-static void x86emuOp_sbb_byte_R_RM(u8 X86EMU_UNUSED(op1))
4020+static void
4021+x86emuOp_sbb_byte_R_RM(u8 X86EMU_UNUSED(op1))
4022 {
4023 int mod, rl, rh;
4024 u8 *destreg, *srcreg;
4025@@ -1581,7 +1643,7 @@ static void x86emuOp_sbb_byte_R_RM(u8 X86EMU_UNUSED(op1))
4026 TRACE_AND_STEP();
4027 *destreg = sbb_byte(*destreg, srcval);
4028 break;
4029- case 3: /* register to register */
4030+ case 3: /* register to register */
4031 destreg = DECODE_RM_BYTE_REGISTER(rh);
4032 DECODE_PRINTF(",");
4033 srcreg = DECODE_RM_BYTE_REGISTER(rl);
4034@@ -1598,7 +1660,8 @@ static void x86emuOp_sbb_byte_R_RM(u8 X86EMU_UNUSED(op1))
4035 REMARKS:
4036 Handles opcode 0x1b
4037 ****************************************************************************/
4038-static void x86emuOp_sbb_word_R_RM(u8 X86EMU_UNUSED(op1))
4039+static void
4040+x86emuOp_sbb_word_R_RM(u8 X86EMU_UNUSED(op1))
4041 {
4042 int mod, rl, rh;
4043 uint srcoffset;
4044@@ -1619,7 +1682,8 @@ static void x86emuOp_sbb_word_R_RM(u8 X86EMU_UNUSED(op1))
4045 DECODE_PRINTF("\n");
4046 TRACE_AND_STEP();
4047 *destreg = sbb_long(*destreg, srcval);
4048- } else {
4049+ }
4050+ else {
4051 u16 *destreg;
4052 u16 srcval;
4053
4054@@ -1644,7 +1708,8 @@ static void x86emuOp_sbb_word_R_RM(u8 X86EMU_UNUSED(op1))
4055 DECODE_PRINTF("\n");
4056 TRACE_AND_STEP();
4057 *destreg = sbb_long(*destreg, srcval);
4058- } else {
4059+ }
4060+ else {
4061 u16 *destreg;
4062 u16 srcval;
4063
4064@@ -1669,7 +1734,8 @@ static void x86emuOp_sbb_word_R_RM(u8 X86EMU_UNUSED(op1))
4065 DECODE_PRINTF("\n");
4066 TRACE_AND_STEP();
4067 *destreg = sbb_long(*destreg, srcval);
4068- } else {
4069+ }
4070+ else {
4071 u16 *destreg;
4072 u16 srcval;
4073
4074@@ -1682,9 +1748,9 @@ static void x86emuOp_sbb_word_R_RM(u8 X86EMU_UNUSED(op1))
4075 *destreg = sbb_word(*destreg, srcval);
4076 }
4077 break;
4078- case 3: /* register to register */
4079+ case 3: /* register to register */
4080 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4081- u32 *destreg,*srcreg;
4082+ u32 *destreg, *srcreg;
4083
4084 destreg = DECODE_RM_LONG_REGISTER(rh);
4085 DECODE_PRINTF(",");
4086@@ -1692,8 +1758,9 @@ static void x86emuOp_sbb_word_R_RM(u8 X86EMU_UNUSED(op1))
4087 DECODE_PRINTF("\n");
4088 TRACE_AND_STEP();
4089 *destreg = sbb_long(*destreg, *srcreg);
4090- } else {
4091- u16 *destreg,*srcreg;
4092+ }
4093+ else {
4094+ u16 *destreg, *srcreg;
4095
4096 destreg = DECODE_RM_WORD_REGISTER(rh);
4097 DECODE_PRINTF(",");
4098@@ -1712,7 +1779,8 @@ static void x86emuOp_sbb_word_R_RM(u8 X86EMU_UNUSED(op1))
4099 REMARKS:
4100 Handles opcode 0x1c
4101 ****************************************************************************/
4102-static void x86emuOp_sbb_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
4103+static void
4104+x86emuOp_sbb_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
4105 {
4106 u8 srcval;
4107
4108@@ -1730,7 +1798,8 @@ static void x86emuOp_sbb_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
4109 REMARKS:
4110 Handles opcode 0x1d
4111 ****************************************************************************/
4112-static void x86emuOp_sbb_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4113+static void
4114+x86emuOp_sbb_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4115 {
4116 u32 srcval;
4117
4118@@ -1738,7 +1807,8 @@ static void x86emuOp_sbb_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4119 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4120 DECODE_PRINTF("SBB\tEAX,");
4121 srcval = fetch_long_imm();
4122- } else {
4123+ }
4124+ else {
4125 DECODE_PRINTF("SBB\tAX,");
4126 srcval = fetch_word_imm();
4127 }
4128@@ -1746,8 +1816,9 @@ static void x86emuOp_sbb_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4129 TRACE_AND_STEP();
4130 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4131 M.x86.R_EAX = sbb_long(M.x86.R_EAX, srcval);
4132- } else {
4133- M.x86.R_AX = sbb_word(M.x86.R_AX, (u16)srcval);
4134+ }
4135+ else {
4136+ M.x86.R_AX = sbb_word(M.x86.R_AX, (u16) srcval);
4137 }
4138 DECODE_CLEAR_SEGOVR();
4139 END_OF_INSTR();
4140@@ -1757,7 +1828,8 @@ static void x86emuOp_sbb_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4141 REMARKS:
4142 Handles opcode 0x1e
4143 ****************************************************************************/
4144-static void x86emuOp_push_DS(u8 X86EMU_UNUSED(op1))
4145+static void
4146+x86emuOp_push_DS(u8 X86EMU_UNUSED(op1))
4147 {
4148 START_OF_INSTR();
4149 DECODE_PRINTF("PUSH\tDS\n");
4150@@ -1771,7 +1843,8 @@ static void x86emuOp_push_DS(u8 X86EMU_UNUSED(op1))
4151 REMARKS:
4152 Handles opcode 0x1f
4153 ****************************************************************************/
4154-static void x86emuOp_pop_DS(u8 X86EMU_UNUSED(op1))
4155+static void
4156+x86emuOp_pop_DS(u8 X86EMU_UNUSED(op1))
4157 {
4158 START_OF_INSTR();
4159 DECODE_PRINTF("POP\tDS\n");
4160@@ -1785,7 +1858,8 @@ static void x86emuOp_pop_DS(u8 X86EMU_UNUSED(op1))
4161 REMARKS:
4162 Handles opcode 0x20
4163 ****************************************************************************/
4164-static void x86emuOp_and_byte_RM_R(u8 X86EMU_UNUSED(op1))
4165+static void
4166+x86emuOp_and_byte_RM_R(u8 X86EMU_UNUSED(op1))
4167 {
4168 int mod, rl, rh;
4169 u8 *destreg, *srcreg;
4170@@ -1830,7 +1904,7 @@ static void x86emuOp_and_byte_RM_R(u8 X86EMU_UNUSED(op1))
4171 store_data_byte(destoffset, destval);
4172 break;
4173
4174- case 3: /* register to register */
4175+ case 3: /* register to register */
4176 destreg = DECODE_RM_BYTE_REGISTER(rl);
4177 DECODE_PRINTF(",");
4178 srcreg = DECODE_RM_BYTE_REGISTER(rh);
4179@@ -1847,7 +1921,8 @@ static void x86emuOp_and_byte_RM_R(u8 X86EMU_UNUSED(op1))
4180 REMARKS:
4181 Handles opcode 0x21
4182 ****************************************************************************/
4183-static void x86emuOp_and_word_RM_R(u8 X86EMU_UNUSED(op1))
4184+static void
4185+x86emuOp_and_word_RM_R(u8 X86EMU_UNUSED(op1))
4186 {
4187 int mod, rl, rh;
4188 uint destoffset;
4189@@ -1869,7 +1944,8 @@ static void x86emuOp_and_word_RM_R(u8 X86EMU_UNUSED(op1))
4190 TRACE_AND_STEP();
4191 destval = and_long(destval, *srcreg);
4192 store_data_long(destoffset, destval);
4193- } else {
4194+ }
4195+ else {
4196 u16 destval;
4197 u16 *srcreg;
4198
4199@@ -1896,7 +1972,8 @@ static void x86emuOp_and_word_RM_R(u8 X86EMU_UNUSED(op1))
4200 TRACE_AND_STEP();
4201 destval = and_long(destval, *srcreg);
4202 store_data_long(destoffset, destval);
4203- } else {
4204+ }
4205+ else {
4206 u16 destval;
4207 u16 *srcreg;
4208
4209@@ -1923,7 +2000,8 @@ static void x86emuOp_and_word_RM_R(u8 X86EMU_UNUSED(op1))
4210 TRACE_AND_STEP();
4211 destval = and_long(destval, *srcreg);
4212 store_data_long(destoffset, destval);
4213- } else {
4214+ }
4215+ else {
4216 u16 destval;
4217 u16 *srcreg;
4218
4219@@ -1937,9 +2015,9 @@ static void x86emuOp_and_word_RM_R(u8 X86EMU_UNUSED(op1))
4220 store_data_word(destoffset, destval);
4221 }
4222 break;
4223- case 3: /* register to register */
4224+ case 3: /* register to register */
4225 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4226- u32 *destreg,*srcreg;
4227+ u32 *destreg, *srcreg;
4228
4229 destreg = DECODE_RM_LONG_REGISTER(rl);
4230 DECODE_PRINTF(",");
4231@@ -1947,8 +2025,9 @@ static void x86emuOp_and_word_RM_R(u8 X86EMU_UNUSED(op1))
4232 DECODE_PRINTF("\n");
4233 TRACE_AND_STEP();
4234 *destreg = and_long(*destreg, *srcreg);
4235- } else {
4236- u16 *destreg,*srcreg;
4237+ }
4238+ else {
4239+ u16 *destreg, *srcreg;
4240
4241 destreg = DECODE_RM_WORD_REGISTER(rl);
4242 DECODE_PRINTF(",");
4243@@ -1967,7 +2046,8 @@ static void x86emuOp_and_word_RM_R(u8 X86EMU_UNUSED(op1))
4244 REMARKS:
4245 Handles opcode 0x22
4246 ****************************************************************************/
4247-static void x86emuOp_and_byte_R_RM(u8 X86EMU_UNUSED(op1))
4248+static void
4249+x86emuOp_and_byte_R_RM(u8 X86EMU_UNUSED(op1))
4250 {
4251 int mod, rl, rh;
4252 u8 *destreg, *srcreg;
4253@@ -2005,7 +2085,7 @@ static void x86emuOp_and_byte_R_RM(u8 X86EMU_UNUSED(op1))
4254 TRACE_AND_STEP();
4255 *destreg = and_byte(*destreg, srcval);
4256 break;
4257- case 3: /* register to register */
4258+ case 3: /* register to register */
4259 destreg = DECODE_RM_BYTE_REGISTER(rh);
4260 DECODE_PRINTF(",");
4261 srcreg = DECODE_RM_BYTE_REGISTER(rl);
4262@@ -2022,7 +2102,8 @@ static void x86emuOp_and_byte_R_RM(u8 X86EMU_UNUSED(op1))
4263 REMARKS:
4264 Handles opcode 0x23
4265 ****************************************************************************/
4266-static void x86emuOp_and_word_R_RM(u8 X86EMU_UNUSED(op1))
4267+static void
4268+x86emuOp_and_word_R_RM(u8 X86EMU_UNUSED(op1))
4269 {
4270 int mod, rl, rh;
4271 uint srcoffset;
4272@@ -2043,7 +2124,8 @@ static void x86emuOp_and_word_R_RM(u8 X86EMU_UNUSED(op1))
4273 DECODE_PRINTF("\n");
4274 TRACE_AND_STEP();
4275 *destreg = and_long(*destreg, srcval);
4276- } else {
4277+ }
4278+ else {
4279 u16 *destreg;
4280 u16 srcval;
4281
4282@@ -2069,7 +2151,8 @@ static void x86emuOp_and_word_R_RM(u8 X86EMU_UNUSED(op1))
4283 TRACE_AND_STEP();
4284 *destreg = and_long(*destreg, srcval);
4285 break;
4286- } else {
4287+ }
4288+ else {
4289 u16 *destreg;
4290 u16 srcval;
4291
4292@@ -2094,7 +2177,8 @@ static void x86emuOp_and_word_R_RM(u8 X86EMU_UNUSED(op1))
4293 DECODE_PRINTF("\n");
4294 TRACE_AND_STEP();
4295 *destreg = and_long(*destreg, srcval);
4296- } else {
4297+ }
4298+ else {
4299 u16 *destreg;
4300 u16 srcval;
4301
4302@@ -2107,9 +2191,9 @@ static void x86emuOp_and_word_R_RM(u8 X86EMU_UNUSED(op1))
4303 *destreg = and_word(*destreg, srcval);
4304 }
4305 break;
4306- case 3: /* register to register */
4307+ case 3: /* register to register */
4308 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4309- u32 *destreg,*srcreg;
4310+ u32 *destreg, *srcreg;
4311
4312 destreg = DECODE_RM_LONG_REGISTER(rh);
4313 DECODE_PRINTF(",");
4314@@ -2117,8 +2201,9 @@ static void x86emuOp_and_word_R_RM(u8 X86EMU_UNUSED(op1))
4315 DECODE_PRINTF("\n");
4316 TRACE_AND_STEP();
4317 *destreg = and_long(*destreg, *srcreg);
4318- } else {
4319- u16 *destreg,*srcreg;
4320+ }
4321+ else {
4322+ u16 *destreg, *srcreg;
4323
4324 destreg = DECODE_RM_WORD_REGISTER(rh);
4325 DECODE_PRINTF(",");
4326@@ -2137,7 +2222,8 @@ static void x86emuOp_and_word_R_RM(u8 X86EMU_UNUSED(op1))
4327 REMARKS:
4328 Handles opcode 0x24
4329 ****************************************************************************/
4330-static void x86emuOp_and_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
4331+static void
4332+x86emuOp_and_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
4333 {
4334 u8 srcval;
4335
4336@@ -2155,7 +2241,8 @@ static void x86emuOp_and_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
4337 REMARKS:
4338 Handles opcode 0x25
4339 ****************************************************************************/
4340-static void x86emuOp_and_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4341+static void
4342+x86emuOp_and_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4343 {
4344 u32 srcval;
4345
4346@@ -2163,7 +2250,8 @@ static void x86emuOp_and_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4347 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4348 DECODE_PRINTF("AND\tEAX,");
4349 srcval = fetch_long_imm();
4350- } else {
4351+ }
4352+ else {
4353 DECODE_PRINTF("AND\tAX,");
4354 srcval = fetch_word_imm();
4355 }
4356@@ -2171,8 +2259,9 @@ static void x86emuOp_and_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4357 TRACE_AND_STEP();
4358 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4359 M.x86.R_EAX = and_long(M.x86.R_EAX, srcval);
4360- } else {
4361- M.x86.R_AX = and_word(M.x86.R_AX, (u16)srcval);
4362+ }
4363+ else {
4364+ M.x86.R_AX = and_word(M.x86.R_AX, (u16) srcval);
4365 }
4366 DECODE_CLEAR_SEGOVR();
4367 END_OF_INSTR();
4368@@ -2182,7 +2271,8 @@ static void x86emuOp_and_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4369 REMARKS:
4370 Handles opcode 0x26
4371 ****************************************************************************/
4372-static void x86emuOp_segovr_ES(u8 X86EMU_UNUSED(op1))
4373+static void
4374+x86emuOp_segovr_ES(u8 X86EMU_UNUSED(op1))
4375 {
4376 START_OF_INSTR();
4377 DECODE_PRINTF("ES:\n");
4378@@ -2199,7 +2289,8 @@ static void x86emuOp_segovr_ES(u8 X86EMU_UNUSED(op1))
4379 REMARKS:
4380 Handles opcode 0x27
4381 ****************************************************************************/
4382-static void x86emuOp_daa(u8 X86EMU_UNUSED(op1))
4383+static void
4384+x86emuOp_daa(u8 X86EMU_UNUSED(op1))
4385 {
4386 START_OF_INSTR();
4387 DECODE_PRINTF("DAA\n");
4388@@ -2213,7 +2304,8 @@ static void x86emuOp_daa(u8 X86EMU_UNUSED(op1))
4389 REMARKS:
4390 Handles opcode 0x28
4391 ****************************************************************************/
4392-static void x86emuOp_sub_byte_RM_R(u8 X86EMU_UNUSED(op1))
4393+static void
4394+x86emuOp_sub_byte_RM_R(u8 X86EMU_UNUSED(op1))
4395 {
4396 int mod, rl, rh;
4397 u8 *destreg, *srcreg;
4398@@ -2254,7 +2346,7 @@ static void x86emuOp_sub_byte_RM_R(u8 X86EMU_UNUSED(op1))
4399 destval = sub_byte(destval, *srcreg);
4400 store_data_byte(destoffset, destval);
4401 break;
4402- case 3: /* register to register */
4403+ case 3: /* register to register */
4404 destreg = DECODE_RM_BYTE_REGISTER(rl);
4405 DECODE_PRINTF(",");
4406 srcreg = DECODE_RM_BYTE_REGISTER(rh);
4407@@ -2271,7 +2363,8 @@ static void x86emuOp_sub_byte_RM_R(u8 X86EMU_UNUSED(op1))
4408 REMARKS:
4409 Handles opcode 0x29
4410 ****************************************************************************/
4411-static void x86emuOp_sub_word_RM_R(u8 X86EMU_UNUSED(op1))
4412+static void
4413+x86emuOp_sub_word_RM_R(u8 X86EMU_UNUSED(op1))
4414 {
4415 int mod, rl, rh;
4416 uint destoffset;
4417@@ -2293,7 +2386,8 @@ static void x86emuOp_sub_word_RM_R(u8 X86EMU_UNUSED(op1))
4418 TRACE_AND_STEP();
4419 destval = sub_long(destval, *srcreg);
4420 store_data_long(destoffset, destval);
4421- } else {
4422+ }
4423+ else {
4424 u16 destval;
4425 u16 *srcreg;
4426
4427@@ -2320,7 +2414,8 @@ static void x86emuOp_sub_word_RM_R(u8 X86EMU_UNUSED(op1))
4428 TRACE_AND_STEP();
4429 destval = sub_long(destval, *srcreg);
4430 store_data_long(destoffset, destval);
4431- } else {
4432+ }
4433+ else {
4434 u16 destval;
4435 u16 *srcreg;
4436
4437@@ -2347,7 +2442,8 @@ static void x86emuOp_sub_word_RM_R(u8 X86EMU_UNUSED(op1))
4438 TRACE_AND_STEP();
4439 destval = sub_long(destval, *srcreg);
4440 store_data_long(destoffset, destval);
4441- } else {
4442+ }
4443+ else {
4444 u16 destval;
4445 u16 *srcreg;
4446
4447@@ -2361,9 +2457,9 @@ static void x86emuOp_sub_word_RM_R(u8 X86EMU_UNUSED(op1))
4448 store_data_word(destoffset, destval);
4449 }
4450 break;
4451- case 3: /* register to register */
4452+ case 3: /* register to register */
4453 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4454- u32 *destreg,*srcreg;
4455+ u32 *destreg, *srcreg;
4456
4457 destreg = DECODE_RM_LONG_REGISTER(rl);
4458 DECODE_PRINTF(",");
4459@@ -2371,8 +2467,9 @@ static void x86emuOp_sub_word_RM_R(u8 X86EMU_UNUSED(op1))
4460 DECODE_PRINTF("\n");
4461 TRACE_AND_STEP();
4462 *destreg = sub_long(*destreg, *srcreg);
4463- } else {
4464- u16 *destreg,*srcreg;
4465+ }
4466+ else {
4467+ u16 *destreg, *srcreg;
4468
4469 destreg = DECODE_RM_WORD_REGISTER(rl);
4470 DECODE_PRINTF(",");
4471@@ -2391,7 +2488,8 @@ static void x86emuOp_sub_word_RM_R(u8 X86EMU_UNUSED(op1))
4472 REMARKS:
4473 Handles opcode 0x2a
4474 ****************************************************************************/
4475-static void x86emuOp_sub_byte_R_RM(u8 X86EMU_UNUSED(op1))
4476+static void
4477+x86emuOp_sub_byte_R_RM(u8 X86EMU_UNUSED(op1))
4478 {
4479 int mod, rl, rh;
4480 u8 *destreg, *srcreg;
4481@@ -2429,7 +2527,7 @@ static void x86emuOp_sub_byte_R_RM(u8 X86EMU_UNUSED(op1))
4482 TRACE_AND_STEP();
4483 *destreg = sub_byte(*destreg, srcval);
4484 break;
4485- case 3: /* register to register */
4486+ case 3: /* register to register */
4487 destreg = DECODE_RM_BYTE_REGISTER(rh);
4488 DECODE_PRINTF(",");
4489 srcreg = DECODE_RM_BYTE_REGISTER(rl);
4490@@ -2446,7 +2544,8 @@ static void x86emuOp_sub_byte_R_RM(u8 X86EMU_UNUSED(op1))
4491 REMARKS:
4492 Handles opcode 0x2b
4493 ****************************************************************************/
4494-static void x86emuOp_sub_word_R_RM(u8 X86EMU_UNUSED(op1))
4495+static void
4496+x86emuOp_sub_word_R_RM(u8 X86EMU_UNUSED(op1))
4497 {
4498 int mod, rl, rh;
4499 uint srcoffset;
4500@@ -2467,7 +2566,8 @@ static void x86emuOp_sub_word_R_RM(u8 X86EMU_UNUSED(op1))
4501 DECODE_PRINTF("\n");
4502 TRACE_AND_STEP();
4503 *destreg = sub_long(*destreg, srcval);
4504- } else {
4505+ }
4506+ else {
4507 u16 *destreg;
4508 u16 srcval;
4509
4510@@ -2492,7 +2592,8 @@ static void x86emuOp_sub_word_R_RM(u8 X86EMU_UNUSED(op1))
4511 DECODE_PRINTF("\n");
4512 TRACE_AND_STEP();
4513 *destreg = sub_long(*destreg, srcval);
4514- } else {
4515+ }
4516+ else {
4517 u16 *destreg;
4518 u16 srcval;
4519
4520@@ -2517,7 +2618,8 @@ static void x86emuOp_sub_word_R_RM(u8 X86EMU_UNUSED(op1))
4521 DECODE_PRINTF("\n");
4522 TRACE_AND_STEP();
4523 *destreg = sub_long(*destreg, srcval);
4524- } else {
4525+ }
4526+ else {
4527 u16 *destreg;
4528 u16 srcval;
4529
4530@@ -2530,9 +2632,9 @@ static void x86emuOp_sub_word_R_RM(u8 X86EMU_UNUSED(op1))
4531 *destreg = sub_word(*destreg, srcval);
4532 }
4533 break;
4534- case 3: /* register to register */
4535+ case 3: /* register to register */
4536 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4537- u32 *destreg,*srcreg;
4538+ u32 *destreg, *srcreg;
4539
4540 destreg = DECODE_RM_LONG_REGISTER(rh);
4541 DECODE_PRINTF(",");
4542@@ -2540,8 +2642,9 @@ static void x86emuOp_sub_word_R_RM(u8 X86EMU_UNUSED(op1))
4543 DECODE_PRINTF("\n");
4544 TRACE_AND_STEP();
4545 *destreg = sub_long(*destreg, *srcreg);
4546- } else {
4547- u16 *destreg,*srcreg;
4548+ }
4549+ else {
4550+ u16 *destreg, *srcreg;
4551
4552 destreg = DECODE_RM_WORD_REGISTER(rh);
4553 DECODE_PRINTF(",");
4554@@ -2560,7 +2663,8 @@ static void x86emuOp_sub_word_R_RM(u8 X86EMU_UNUSED(op1))
4555 REMARKS:
4556 Handles opcode 0x2c
4557 ****************************************************************************/
4558-static void x86emuOp_sub_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
4559+static void
4560+x86emuOp_sub_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
4561 {
4562 u8 srcval;
4563
4564@@ -2578,7 +2682,8 @@ static void x86emuOp_sub_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
4565 REMARKS:
4566 Handles opcode 0x2d
4567 ****************************************************************************/
4568-static void x86emuOp_sub_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4569+static void
4570+x86emuOp_sub_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4571 {
4572 u32 srcval;
4573
4574@@ -2586,7 +2691,8 @@ static void x86emuOp_sub_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4575 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4576 DECODE_PRINTF("SUB\tEAX,");
4577 srcval = fetch_long_imm();
4578- } else {
4579+ }
4580+ else {
4581 DECODE_PRINTF("SUB\tAX,");
4582 srcval = fetch_word_imm();
4583 }
4584@@ -2594,8 +2700,9 @@ static void x86emuOp_sub_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4585 TRACE_AND_STEP();
4586 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4587 M.x86.R_EAX = sub_long(M.x86.R_EAX, srcval);
4588- } else {
4589- M.x86.R_AX = sub_word(M.x86.R_AX, (u16)srcval);
4590+ }
4591+ else {
4592+ M.x86.R_AX = sub_word(M.x86.R_AX, (u16) srcval);
4593 }
4594 DECODE_CLEAR_SEGOVR();
4595 END_OF_INSTR();
4596@@ -2605,7 +2712,8 @@ static void x86emuOp_sub_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4597 REMARKS:
4598 Handles opcode 0x2e
4599 ****************************************************************************/
4600-static void x86emuOp_segovr_CS(u8 X86EMU_UNUSED(op1))
4601+static void
4602+x86emuOp_segovr_CS(u8 X86EMU_UNUSED(op1))
4603 {
4604 START_OF_INSTR();
4605 DECODE_PRINTF("CS:\n");
4606@@ -2619,7 +2727,8 @@ static void x86emuOp_segovr_CS(u8 X86EMU_UNUSED(op1))
4607 REMARKS:
4608 Handles opcode 0x2f
4609 ****************************************************************************/
4610-static void x86emuOp_das(u8 X86EMU_UNUSED(op1))
4611+static void
4612+x86emuOp_das(u8 X86EMU_UNUSED(op1))
4613 {
4614 START_OF_INSTR();
4615 DECODE_PRINTF("DAS\n");
4616@@ -2633,7 +2742,8 @@ static void x86emuOp_das(u8 X86EMU_UNUSED(op1))
4617 REMARKS:
4618 Handles opcode 0x30
4619 ****************************************************************************/
4620-static void x86emuOp_xor_byte_RM_R(u8 X86EMU_UNUSED(op1))
4621+static void
4622+x86emuOp_xor_byte_RM_R(u8 X86EMU_UNUSED(op1))
4623 {
4624 int mod, rl, rh;
4625 u8 *destreg, *srcreg;
4626@@ -2674,7 +2784,7 @@ static void x86emuOp_xor_byte_RM_R(u8 X86EMU_UNUSED(op1))
4627 destval = xor_byte(destval, *srcreg);
4628 store_data_byte(destoffset, destval);
4629 break;
4630- case 3: /* register to register */
4631+ case 3: /* register to register */
4632 destreg = DECODE_RM_BYTE_REGISTER(rl);
4633 DECODE_PRINTF(",");
4634 srcreg = DECODE_RM_BYTE_REGISTER(rh);
4635@@ -2691,7 +2801,8 @@ static void x86emuOp_xor_byte_RM_R(u8 X86EMU_UNUSED(op1))
4636 REMARKS:
4637 Handles opcode 0x31
4638 ****************************************************************************/
4639-static void x86emuOp_xor_word_RM_R(u8 X86EMU_UNUSED(op1))
4640+static void
4641+x86emuOp_xor_word_RM_R(u8 X86EMU_UNUSED(op1))
4642 {
4643 int mod, rl, rh;
4644 uint destoffset;
4645@@ -2713,7 +2824,8 @@ static void x86emuOp_xor_word_RM_R(u8 X86EMU_UNUSED(op1))
4646 TRACE_AND_STEP();
4647 destval = xor_long(destval, *srcreg);
4648 store_data_long(destoffset, destval);
4649- } else {
4650+ }
4651+ else {
4652 u16 destval;
4653 u16 *srcreg;
4654
4655@@ -2740,7 +2852,8 @@ static void x86emuOp_xor_word_RM_R(u8 X86EMU_UNUSED(op1))
4656 TRACE_AND_STEP();
4657 destval = xor_long(destval, *srcreg);
4658 store_data_long(destoffset, destval);
4659- } else {
4660+ }
4661+ else {
4662 u16 destval;
4663 u16 *srcreg;
4664
4665@@ -2767,7 +2880,8 @@ static void x86emuOp_xor_word_RM_R(u8 X86EMU_UNUSED(op1))
4666 TRACE_AND_STEP();
4667 destval = xor_long(destval, *srcreg);
4668 store_data_long(destoffset, destval);
4669- } else {
4670+ }
4671+ else {
4672 u16 destval;
4673 u16 *srcreg;
4674
4675@@ -2781,9 +2895,9 @@ static void x86emuOp_xor_word_RM_R(u8 X86EMU_UNUSED(op1))
4676 store_data_word(destoffset, destval);
4677 }
4678 break;
4679- case 3: /* register to register */
4680+ case 3: /* register to register */
4681 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4682- u32 *destreg,*srcreg;
4683+ u32 *destreg, *srcreg;
4684
4685 destreg = DECODE_RM_LONG_REGISTER(rl);
4686 DECODE_PRINTF(",");
4687@@ -2791,8 +2905,9 @@ static void x86emuOp_xor_word_RM_R(u8 X86EMU_UNUSED(op1))
4688 DECODE_PRINTF("\n");
4689 TRACE_AND_STEP();
4690 *destreg = xor_long(*destreg, *srcreg);
4691- } else {
4692- u16 *destreg,*srcreg;
4693+ }
4694+ else {
4695+ u16 *destreg, *srcreg;
4696
4697 destreg = DECODE_RM_WORD_REGISTER(rl);
4698 DECODE_PRINTF(",");
4699@@ -2811,7 +2926,8 @@ static void x86emuOp_xor_word_RM_R(u8 X86EMU_UNUSED(op1))
4700 REMARKS:
4701 Handles opcode 0x32
4702 ****************************************************************************/
4703-static void x86emuOp_xor_byte_R_RM(u8 X86EMU_UNUSED(op1))
4704+static void
4705+x86emuOp_xor_byte_R_RM(u8 X86EMU_UNUSED(op1))
4706 {
4707 int mod, rl, rh;
4708 u8 *destreg, *srcreg;
4709@@ -2849,7 +2965,7 @@ static void x86emuOp_xor_byte_R_RM(u8 X86EMU_UNUSED(op1))
4710 TRACE_AND_STEP();
4711 *destreg = xor_byte(*destreg, srcval);
4712 break;
4713- case 3: /* register to register */
4714+ case 3: /* register to register */
4715 destreg = DECODE_RM_BYTE_REGISTER(rh);
4716 DECODE_PRINTF(",");
4717 srcreg = DECODE_RM_BYTE_REGISTER(rl);
4718@@ -2866,7 +2982,8 @@ static void x86emuOp_xor_byte_R_RM(u8 X86EMU_UNUSED(op1))
4719 REMARKS:
4720 Handles opcode 0x33
4721 ****************************************************************************/
4722-static void x86emuOp_xor_word_R_RM(u8 X86EMU_UNUSED(op1))
4723+static void
4724+x86emuOp_xor_word_R_RM(u8 X86EMU_UNUSED(op1))
4725 {
4726 int mod, rl, rh;
4727 uint srcoffset;
4728@@ -2887,7 +3004,8 @@ static void x86emuOp_xor_word_R_RM(u8 X86EMU_UNUSED(op1))
4729 DECODE_PRINTF("\n");
4730 TRACE_AND_STEP();
4731 *destreg = xor_long(*destreg, srcval);
4732- } else {
4733+ }
4734+ else {
4735 u16 *destreg;
4736 u16 srcval;
4737
4738@@ -2912,7 +3030,8 @@ static void x86emuOp_xor_word_R_RM(u8 X86EMU_UNUSED(op1))
4739 DECODE_PRINTF("\n");
4740 TRACE_AND_STEP();
4741 *destreg = xor_long(*destreg, srcval);
4742- } else {
4743+ }
4744+ else {
4745 u16 *destreg;
4746 u16 srcval;
4747
4748@@ -2937,7 +3056,8 @@ static void x86emuOp_xor_word_R_RM(u8 X86EMU_UNUSED(op1))
4749 DECODE_PRINTF("\n");
4750 TRACE_AND_STEP();
4751 *destreg = xor_long(*destreg, srcval);
4752- } else {
4753+ }
4754+ else {
4755 u16 *destreg;
4756 u16 srcval;
4757
4758@@ -2950,9 +3070,9 @@ static void x86emuOp_xor_word_R_RM(u8 X86EMU_UNUSED(op1))
4759 *destreg = xor_word(*destreg, srcval);
4760 }
4761 break;
4762- case 3: /* register to register */
4763+ case 3: /* register to register */
4764 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4765- u32 *destreg,*srcreg;
4766+ u32 *destreg, *srcreg;
4767
4768 destreg = DECODE_RM_LONG_REGISTER(rh);
4769 DECODE_PRINTF(",");
4770@@ -2960,8 +3080,9 @@ static void x86emuOp_xor_word_R_RM(u8 X86EMU_UNUSED(op1))
4771 DECODE_PRINTF("\n");
4772 TRACE_AND_STEP();
4773 *destreg = xor_long(*destreg, *srcreg);
4774- } else {
4775- u16 *destreg,*srcreg;
4776+ }
4777+ else {
4778+ u16 *destreg, *srcreg;
4779
4780 destreg = DECODE_RM_WORD_REGISTER(rh);
4781 DECODE_PRINTF(",");
4782@@ -2980,7 +3101,8 @@ static void x86emuOp_xor_word_R_RM(u8 X86EMU_UNUSED(op1))
4783 REMARKS:
4784 Handles opcode 0x34
4785 ****************************************************************************/
4786-static void x86emuOp_xor_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
4787+static void
4788+x86emuOp_xor_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
4789 {
4790 u8 srcval;
4791
4792@@ -2998,7 +3120,8 @@ static void x86emuOp_xor_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
4793 REMARKS:
4794 Handles opcode 0x35
4795 ****************************************************************************/
4796-static void x86emuOp_xor_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4797+static void
4798+x86emuOp_xor_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4799 {
4800 u32 srcval;
4801
4802@@ -3006,7 +3129,8 @@ static void x86emuOp_xor_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4803 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4804 DECODE_PRINTF("XOR\tEAX,");
4805 srcval = fetch_long_imm();
4806- } else {
4807+ }
4808+ else {
4809 DECODE_PRINTF("XOR\tAX,");
4810 srcval = fetch_word_imm();
4811 }
4812@@ -3014,8 +3138,9 @@ static void x86emuOp_xor_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4813 TRACE_AND_STEP();
4814 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4815 M.x86.R_EAX = xor_long(M.x86.R_EAX, srcval);
4816- } else {
4817- M.x86.R_AX = xor_word(M.x86.R_AX, (u16)srcval);
4818+ }
4819+ else {
4820+ M.x86.R_AX = xor_word(M.x86.R_AX, (u16) srcval);
4821 }
4822 DECODE_CLEAR_SEGOVR();
4823 END_OF_INSTR();
4824@@ -3025,7 +3150,8 @@ static void x86emuOp_xor_word_AX_IMM(u8 X86EMU_UNUSED(op1))
4825 REMARKS:
4826 Handles opcode 0x36
4827 ****************************************************************************/
4828-static void x86emuOp_segovr_SS(u8 X86EMU_UNUSED(op1))
4829+static void
4830+x86emuOp_segovr_SS(u8 X86EMU_UNUSED(op1))
4831 {
4832 START_OF_INSTR();
4833 DECODE_PRINTF("SS:\n");
4834@@ -3039,7 +3165,8 @@ static void x86emuOp_segovr_SS(u8 X86EMU_UNUSED(op1))
4835 REMARKS:
4836 Handles opcode 0x37
4837 ****************************************************************************/
4838-static void x86emuOp_aaa(u8 X86EMU_UNUSED(op1))
4839+static void
4840+x86emuOp_aaa(u8 X86EMU_UNUSED(op1))
4841 {
4842 START_OF_INSTR();
4843 DECODE_PRINTF("AAA\n");
4844@@ -3053,7 +3180,8 @@ static void x86emuOp_aaa(u8 X86EMU_UNUSED(op1))
4845 REMARKS:
4846 Handles opcode 0x38
4847 ****************************************************************************/
4848-static void x86emuOp_cmp_byte_RM_R(u8 X86EMU_UNUSED(op1))
4849+static void
4850+x86emuOp_cmp_byte_RM_R(u8 X86EMU_UNUSED(op1))
4851 {
4852 int mod, rl, rh;
4853 uint destoffset;
4854@@ -3091,7 +3219,7 @@ static void x86emuOp_cmp_byte_RM_R(u8 X86EMU_UNUSED(op1))
4855 TRACE_AND_STEP();
4856 cmp_byte(destval, *srcreg);
4857 break;
4858- case 3: /* register to register */
4859+ case 3: /* register to register */
4860 destreg = DECODE_RM_BYTE_REGISTER(rl);
4861 DECODE_PRINTF(",");
4862 srcreg = DECODE_RM_BYTE_REGISTER(rh);
4863@@ -3108,7 +3236,8 @@ static void x86emuOp_cmp_byte_RM_R(u8 X86EMU_UNUSED(op1))
4864 REMARKS:
4865 Handles opcode 0x39
4866 ****************************************************************************/
4867-static void x86emuOp_cmp_word_RM_R(u8 X86EMU_UNUSED(op1))
4868+static void
4869+x86emuOp_cmp_word_RM_R(u8 X86EMU_UNUSED(op1))
4870 {
4871 int mod, rl, rh;
4872 uint destoffset;
4873@@ -3129,7 +3258,8 @@ static void x86emuOp_cmp_word_RM_R(u8 X86EMU_UNUSED(op1))
4874 DECODE_PRINTF("\n");
4875 TRACE_AND_STEP();
4876 cmp_long(destval, *srcreg);
4877- } else {
4878+ }
4879+ else {
4880 u16 destval;
4881 u16 *srcreg;
4882
4883@@ -3154,7 +3284,8 @@ static void x86emuOp_cmp_word_RM_R(u8 X86EMU_UNUSED(op1))
4884 DECODE_PRINTF("\n");
4885 TRACE_AND_STEP();
4886 cmp_long(destval, *srcreg);
4887- } else {
4888+ }
4889+ else {
4890 u16 destval;
4891 u16 *srcreg;
4892
4893@@ -3179,7 +3310,8 @@ static void x86emuOp_cmp_word_RM_R(u8 X86EMU_UNUSED(op1))
4894 DECODE_PRINTF("\n");
4895 TRACE_AND_STEP();
4896 cmp_long(destval, *srcreg);
4897- } else {
4898+ }
4899+ else {
4900 u16 destval;
4901 u16 *srcreg;
4902
4903@@ -3192,9 +3324,9 @@ static void x86emuOp_cmp_word_RM_R(u8 X86EMU_UNUSED(op1))
4904 cmp_word(destval, *srcreg);
4905 }
4906 break;
4907- case 3: /* register to register */
4908+ case 3: /* register to register */
4909 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4910- u32 *destreg,*srcreg;
4911+ u32 *destreg, *srcreg;
4912
4913 destreg = DECODE_RM_LONG_REGISTER(rl);
4914 DECODE_PRINTF(",");
4915@@ -3202,8 +3334,9 @@ static void x86emuOp_cmp_word_RM_R(u8 X86EMU_UNUSED(op1))
4916 DECODE_PRINTF("\n");
4917 TRACE_AND_STEP();
4918 cmp_long(*destreg, *srcreg);
4919- } else {
4920- u16 *destreg,*srcreg;
4921+ }
4922+ else {
4923+ u16 *destreg, *srcreg;
4924
4925 destreg = DECODE_RM_WORD_REGISTER(rl);
4926 DECODE_PRINTF(",");
4927@@ -3222,7 +3355,8 @@ static void x86emuOp_cmp_word_RM_R(u8 X86EMU_UNUSED(op1))
4928 REMARKS:
4929 Handles opcode 0x3a
4930 ****************************************************************************/
4931-static void x86emuOp_cmp_byte_R_RM(u8 X86EMU_UNUSED(op1))
4932+static void
4933+x86emuOp_cmp_byte_R_RM(u8 X86EMU_UNUSED(op1))
4934 {
4935 int mod, rl, rh;
4936 u8 *destreg, *srcreg;
4937@@ -3260,7 +3394,7 @@ static void x86emuOp_cmp_byte_R_RM(u8 X86EMU_UNUSED(op1))
4938 TRACE_AND_STEP();
4939 cmp_byte(*destreg, srcval);
4940 break;
4941- case 3: /* register to register */
4942+ case 3: /* register to register */
4943 destreg = DECODE_RM_BYTE_REGISTER(rh);
4944 DECODE_PRINTF(",");
4945 srcreg = DECODE_RM_BYTE_REGISTER(rl);
4946@@ -3277,7 +3411,8 @@ static void x86emuOp_cmp_byte_R_RM(u8 X86EMU_UNUSED(op1))
4947 REMARKS:
4948 Handles opcode 0x3b
4949 ****************************************************************************/
4950-static void x86emuOp_cmp_word_R_RM(u8 X86EMU_UNUSED(op1))
4951+static void
4952+x86emuOp_cmp_word_R_RM(u8 X86EMU_UNUSED(op1))
4953 {
4954 int mod, rl, rh;
4955 uint srcoffset;
4956@@ -3298,7 +3433,8 @@ static void x86emuOp_cmp_word_R_RM(u8 X86EMU_UNUSED(op1))
4957 DECODE_PRINTF("\n");
4958 TRACE_AND_STEP();
4959 cmp_long(*destreg, srcval);
4960- } else {
4961+ }
4962+ else {
4963 u16 *destreg;
4964 u16 srcval;
4965
4966@@ -3323,7 +3459,8 @@ static void x86emuOp_cmp_word_R_RM(u8 X86EMU_UNUSED(op1))
4967 DECODE_PRINTF("\n");
4968 TRACE_AND_STEP();
4969 cmp_long(*destreg, srcval);
4970- } else {
4971+ }
4972+ else {
4973 u16 *destreg;
4974 u16 srcval;
4975
4976@@ -3348,7 +3485,8 @@ static void x86emuOp_cmp_word_R_RM(u8 X86EMU_UNUSED(op1))
4977 DECODE_PRINTF("\n");
4978 TRACE_AND_STEP();
4979 cmp_long(*destreg, srcval);
4980- } else {
4981+ }
4982+ else {
4983 u16 *destreg;
4984 u16 srcval;
4985
4986@@ -3361,9 +3499,9 @@ static void x86emuOp_cmp_word_R_RM(u8 X86EMU_UNUSED(op1))
4987 cmp_word(*destreg, srcval);
4988 }
4989 break;
4990- case 3: /* register to register */
4991+ case 3: /* register to register */
4992 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
4993- u32 *destreg,*srcreg;
4994+ u32 *destreg, *srcreg;
4995
4996 destreg = DECODE_RM_LONG_REGISTER(rh);
4997 DECODE_PRINTF(",");
4998@@ -3371,8 +3509,9 @@ static void x86emuOp_cmp_word_R_RM(u8 X86EMU_UNUSED(op1))
4999 DECODE_PRINTF("\n");
5000 TRACE_AND_STEP();
5001 cmp_long(*destreg, *srcreg);
5002- } else {
5003- u16 *destreg,*srcreg;
5004+ }
5005+ else {
5006+ u16 *destreg, *srcreg;
5007
5008 destreg = DECODE_RM_WORD_REGISTER(rh);
5009 DECODE_PRINTF(",");
5010@@ -3391,7 +3530,8 @@ static void x86emuOp_cmp_word_R_RM(u8 X86EMU_UNUSED(op1))
5011 REMARKS:
5012 Handles opcode 0x3c
5013 ****************************************************************************/
5014-static void x86emuOp_cmp_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
5015+static void
5016+x86emuOp_cmp_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
5017 {
5018 u8 srcval;
5019
5020@@ -3409,7 +3549,8 @@ static void x86emuOp_cmp_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
5021 REMARKS:
5022 Handles opcode 0x3d
5023 ****************************************************************************/
5024-static void x86emuOp_cmp_word_AX_IMM(u8 X86EMU_UNUSED(op1))
5025+static void
5026+x86emuOp_cmp_word_AX_IMM(u8 X86EMU_UNUSED(op1))
5027 {
5028 u32 srcval;
5029
5030@@ -3417,7 +3558,8 @@ static void x86emuOp_cmp_word_AX_IMM(u8 X86EMU_UNUSED(op1))
5031 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5032 DECODE_PRINTF("CMP\tEAX,");
5033 srcval = fetch_long_imm();
5034- } else {
5035+ }
5036+ else {
5037 DECODE_PRINTF("CMP\tAX,");
5038 srcval = fetch_word_imm();
5039 }
5040@@ -3425,8 +3567,9 @@ static void x86emuOp_cmp_word_AX_IMM(u8 X86EMU_UNUSED(op1))
5041 TRACE_AND_STEP();
5042 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5043 cmp_long(M.x86.R_EAX, srcval);
5044- } else {
5045- cmp_word(M.x86.R_AX, (u16)srcval);
5046+ }
5047+ else {
5048+ cmp_word(M.x86.R_AX, (u16) srcval);
5049 }
5050 DECODE_CLEAR_SEGOVR();
5051 END_OF_INSTR();
5052@@ -3436,7 +3579,8 @@ static void x86emuOp_cmp_word_AX_IMM(u8 X86EMU_UNUSED(op1))
5053 REMARKS:
5054 Handles opcode 0x3e
5055 ****************************************************************************/
5056-static void x86emuOp_segovr_DS(u8 X86EMU_UNUSED(op1))
5057+static void
5058+x86emuOp_segovr_DS(u8 X86EMU_UNUSED(op1))
5059 {
5060 START_OF_INSTR();
5061 DECODE_PRINTF("DS:\n");
5062@@ -3450,7 +3594,8 @@ static void x86emuOp_segovr_DS(u8 X86EMU_UNUSED(op1))
5063 REMARKS:
5064 Handles opcode 0x3f
5065 ****************************************************************************/
5066-static void x86emuOp_aas(u8 X86EMU_UNUSED(op1))
5067+static void
5068+x86emuOp_aas(u8 X86EMU_UNUSED(op1))
5069 {
5070 START_OF_INSTR();
5071 DECODE_PRINTF("AAS\n");
5072@@ -3464,18 +3609,21 @@ static void x86emuOp_aas(u8 X86EMU_UNUSED(op1))
5073 REMARKS:
5074 Handles opcode 0x40
5075 ****************************************************************************/
5076-static void x86emuOp_inc_AX(u8 X86EMU_UNUSED(op1))
5077+static void
5078+x86emuOp_inc_AX(u8 X86EMU_UNUSED(op1))
5079 {
5080 START_OF_INSTR();
5081 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5082 DECODE_PRINTF("INC\tEAX\n");
5083- } else {
5084+ }
5085+ else {
5086 DECODE_PRINTF("INC\tAX\n");
5087 }
5088 TRACE_AND_STEP();
5089 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5090 M.x86.R_EAX = inc_long(M.x86.R_EAX);
5091- } else {
5092+ }
5093+ else {
5094 M.x86.R_AX = inc_word(M.x86.R_AX);
5095 }
5096 DECODE_CLEAR_SEGOVR();
5097@@ -3486,18 +3634,21 @@ static void x86emuOp_inc_AX(u8 X86EMU_UNUSED(op1))
5098 REMARKS:
5099 Handles opcode 0x41
5100 ****************************************************************************/
5101-static void x86emuOp_inc_CX(u8 X86EMU_UNUSED(op1))
5102+static void
5103+x86emuOp_inc_CX(u8 X86EMU_UNUSED(op1))
5104 {
5105 START_OF_INSTR();
5106 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5107 DECODE_PRINTF("INC\tECX\n");
5108- } else {
5109+ }
5110+ else {
5111 DECODE_PRINTF("INC\tCX\n");
5112 }
5113 TRACE_AND_STEP();
5114 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5115 M.x86.R_ECX = inc_long(M.x86.R_ECX);
5116- } else {
5117+ }
5118+ else {
5119 M.x86.R_CX = inc_word(M.x86.R_CX);
5120 }
5121 DECODE_CLEAR_SEGOVR();
5122@@ -3508,18 +3659,21 @@ static void x86emuOp_inc_CX(u8 X86EMU_UNUSED(op1))
5123 REMARKS:
5124 Handles opcode 0x42
5125 ****************************************************************************/
5126-static void x86emuOp_inc_DX(u8 X86EMU_UNUSED(op1))
5127+static void
5128+x86emuOp_inc_DX(u8 X86EMU_UNUSED(op1))
5129 {
5130 START_OF_INSTR();
5131 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5132 DECODE_PRINTF("INC\tEDX\n");
5133- } else {
5134+ }
5135+ else {
5136 DECODE_PRINTF("INC\tDX\n");
5137 }
5138 TRACE_AND_STEP();
5139 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5140 M.x86.R_EDX = inc_long(M.x86.R_EDX);
5141- } else {
5142+ }
5143+ else {
5144 M.x86.R_DX = inc_word(M.x86.R_DX);
5145 }
5146 DECODE_CLEAR_SEGOVR();
5147@@ -3530,18 +3684,21 @@ static void x86emuOp_inc_DX(u8 X86EMU_UNUSED(op1))
5148 REMARKS:
5149 Handles opcode 0x43
5150 ****************************************************************************/
5151-static void x86emuOp_inc_BX(u8 X86EMU_UNUSED(op1))
5152+static void
5153+x86emuOp_inc_BX(u8 X86EMU_UNUSED(op1))
5154 {
5155 START_OF_INSTR();
5156 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5157 DECODE_PRINTF("INC\tEBX\n");
5158- } else {
5159+ }
5160+ else {
5161 DECODE_PRINTF("INC\tBX\n");
5162 }
5163 TRACE_AND_STEP();
5164 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5165 M.x86.R_EBX = inc_long(M.x86.R_EBX);
5166- } else {
5167+ }
5168+ else {
5169 M.x86.R_BX = inc_word(M.x86.R_BX);
5170 }
5171 DECODE_CLEAR_SEGOVR();
5172@@ -3552,18 +3709,21 @@ static void x86emuOp_inc_BX(u8 X86EMU_UNUSED(op1))
5173 REMARKS:
5174 Handles opcode 0x44
5175 ****************************************************************************/
5176-static void x86emuOp_inc_SP(u8 X86EMU_UNUSED(op1))
5177+static void
5178+x86emuOp_inc_SP(u8 X86EMU_UNUSED(op1))
5179 {
5180 START_OF_INSTR();
5181 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5182 DECODE_PRINTF("INC\tESP\n");
5183- } else {
5184+ }
5185+ else {
5186 DECODE_PRINTF("INC\tSP\n");
5187 }
5188 TRACE_AND_STEP();
5189 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5190 M.x86.R_ESP = inc_long(M.x86.R_ESP);
5191- } else {
5192+ }
5193+ else {
5194 M.x86.R_SP = inc_word(M.x86.R_SP);
5195 }
5196 DECODE_CLEAR_SEGOVR();
5197@@ -3574,18 +3734,21 @@ static void x86emuOp_inc_SP(u8 X86EMU_UNUSED(op1))
5198 REMARKS:
5199 Handles opcode 0x45
5200 ****************************************************************************/
5201-static void x86emuOp_inc_BP(u8 X86EMU_UNUSED(op1))
5202+static void
5203+x86emuOp_inc_BP(u8 X86EMU_UNUSED(op1))
5204 {
5205 START_OF_INSTR();
5206 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5207 DECODE_PRINTF("INC\tEBP\n");
5208- } else {
5209+ }
5210+ else {
5211 DECODE_PRINTF("INC\tBP\n");
5212 }
5213 TRACE_AND_STEP();
5214 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5215 M.x86.R_EBP = inc_long(M.x86.R_EBP);
5216- } else {
5217+ }
5218+ else {
5219 M.x86.R_BP = inc_word(M.x86.R_BP);
5220 }
5221 DECODE_CLEAR_SEGOVR();
5222@@ -3596,18 +3759,21 @@ static void x86emuOp_inc_BP(u8 X86EMU_UNUSED(op1))
5223 REMARKS:
5224 Handles opcode 0x46
5225 ****************************************************************************/
5226-static void x86emuOp_inc_SI(u8 X86EMU_UNUSED(op1))
5227+static void
5228+x86emuOp_inc_SI(u8 X86EMU_UNUSED(op1))
5229 {
5230 START_OF_INSTR();
5231 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5232 DECODE_PRINTF("INC\tESI\n");
5233- } else {
5234+ }
5235+ else {
5236 DECODE_PRINTF("INC\tSI\n");
5237 }
5238 TRACE_AND_STEP();
5239 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5240 M.x86.R_ESI = inc_long(M.x86.R_ESI);
5241- } else {
5242+ }
5243+ else {
5244 M.x86.R_SI = inc_word(M.x86.R_SI);
5245 }
5246 DECODE_CLEAR_SEGOVR();
5247@@ -3618,18 +3784,21 @@ static void x86emuOp_inc_SI(u8 X86EMU_UNUSED(op1))
5248 REMARKS:
5249 Handles opcode 0x47
5250 ****************************************************************************/
5251-static void x86emuOp_inc_DI(u8 X86EMU_UNUSED(op1))
5252+static void
5253+x86emuOp_inc_DI(u8 X86EMU_UNUSED(op1))
5254 {
5255 START_OF_INSTR();
5256 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5257 DECODE_PRINTF("INC\tEDI\n");
5258- } else {
5259+ }
5260+ else {
5261 DECODE_PRINTF("INC\tDI\n");
5262 }
5263 TRACE_AND_STEP();
5264 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5265 M.x86.R_EDI = inc_long(M.x86.R_EDI);
5266- } else {
5267+ }
5268+ else {
5269 M.x86.R_DI = inc_word(M.x86.R_DI);
5270 }
5271 DECODE_CLEAR_SEGOVR();
5272@@ -3640,18 +3809,21 @@ static void x86emuOp_inc_DI(u8 X86EMU_UNUSED(op1))
5273 REMARKS:
5274 Handles opcode 0x48
5275 ****************************************************************************/
5276-static void x86emuOp_dec_AX(u8 X86EMU_UNUSED(op1))
5277+static void
5278+x86emuOp_dec_AX(u8 X86EMU_UNUSED(op1))
5279 {
5280 START_OF_INSTR();
5281 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5282 DECODE_PRINTF("DEC\tEAX\n");
5283- } else {
5284+ }
5285+ else {
5286 DECODE_PRINTF("DEC\tAX\n");
5287 }
5288 TRACE_AND_STEP();
5289 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5290 M.x86.R_EAX = dec_long(M.x86.R_EAX);
5291- } else {
5292+ }
5293+ else {
5294 M.x86.R_AX = dec_word(M.x86.R_AX);
5295 }
5296 DECODE_CLEAR_SEGOVR();
5297@@ -3662,18 +3834,21 @@ static void x86emuOp_dec_AX(u8 X86EMU_UNUSED(op1))
5298 REMARKS:
5299 Handles opcode 0x49
5300 ****************************************************************************/
5301-static void x86emuOp_dec_CX(u8 X86EMU_UNUSED(op1))
5302+static void
5303+x86emuOp_dec_CX(u8 X86EMU_UNUSED(op1))
5304 {
5305 START_OF_INSTR();
5306 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5307 DECODE_PRINTF("DEC\tECX\n");
5308- } else {
5309+ }
5310+ else {
5311 DECODE_PRINTF("DEC\tCX\n");
5312 }
5313 TRACE_AND_STEP();
5314 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5315 M.x86.R_ECX = dec_long(M.x86.R_ECX);
5316- } else {
5317+ }
5318+ else {
5319 M.x86.R_CX = dec_word(M.x86.R_CX);
5320 }
5321 DECODE_CLEAR_SEGOVR();
5322@@ -3684,18 +3859,21 @@ static void x86emuOp_dec_CX(u8 X86EMU_UNUSED(op1))
5323 REMARKS:
5324 Handles opcode 0x4a
5325 ****************************************************************************/
5326-static void x86emuOp_dec_DX(u8 X86EMU_UNUSED(op1))
5327+static void
5328+x86emuOp_dec_DX(u8 X86EMU_UNUSED(op1))
5329 {
5330 START_OF_INSTR();
5331 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5332 DECODE_PRINTF("DEC\tEDX\n");
5333- } else {
5334+ }
5335+ else {
5336 DECODE_PRINTF("DEC\tDX\n");
5337 }
5338 TRACE_AND_STEP();
5339 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5340 M.x86.R_EDX = dec_long(M.x86.R_EDX);
5341- } else {
5342+ }
5343+ else {
5344 M.x86.R_DX = dec_word(M.x86.R_DX);
5345 }
5346 DECODE_CLEAR_SEGOVR();
5347@@ -3706,18 +3884,21 @@ static void x86emuOp_dec_DX(u8 X86EMU_UNUSED(op1))
5348 REMARKS:
5349 Handles opcode 0x4b
5350 ****************************************************************************/
5351-static void x86emuOp_dec_BX(u8 X86EMU_UNUSED(op1))
5352+static void
5353+x86emuOp_dec_BX(u8 X86EMU_UNUSED(op1))
5354 {
5355 START_OF_INSTR();
5356 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5357 DECODE_PRINTF("DEC\tEBX\n");
5358- } else {
5359+ }
5360+ else {
5361 DECODE_PRINTF("DEC\tBX\n");
5362 }
5363 TRACE_AND_STEP();
5364 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5365 M.x86.R_EBX = dec_long(M.x86.R_EBX);
5366- } else {
5367+ }
5368+ else {
5369 M.x86.R_BX = dec_word(M.x86.R_BX);
5370 }
5371 DECODE_CLEAR_SEGOVR();
5372@@ -3728,18 +3909,21 @@ static void x86emuOp_dec_BX(u8 X86EMU_UNUSED(op1))
5373 REMARKS:
5374 Handles opcode 0x4c
5375 ****************************************************************************/
5376-static void x86emuOp_dec_SP(u8 X86EMU_UNUSED(op1))
5377+static void
5378+x86emuOp_dec_SP(u8 X86EMU_UNUSED(op1))
5379 {
5380 START_OF_INSTR();
5381 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5382 DECODE_PRINTF("DEC\tESP\n");
5383- } else {
5384+ }
5385+ else {
5386 DECODE_PRINTF("DEC\tSP\n");
5387 }
5388 TRACE_AND_STEP();
5389 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5390 M.x86.R_ESP = dec_long(M.x86.R_ESP);
5391- } else {
5392+ }
5393+ else {
5394 M.x86.R_SP = dec_word(M.x86.R_SP);
5395 }
5396 DECODE_CLEAR_SEGOVR();
5397@@ -3750,18 +3934,21 @@ static void x86emuOp_dec_SP(u8 X86EMU_UNUSED(op1))
5398 REMARKS:
5399 Handles opcode 0x4d
5400 ****************************************************************************/
5401-static void x86emuOp_dec_BP(u8 X86EMU_UNUSED(op1))
5402+static void
5403+x86emuOp_dec_BP(u8 X86EMU_UNUSED(op1))
5404 {
5405 START_OF_INSTR();
5406 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5407 DECODE_PRINTF("DEC\tEBP\n");
5408- } else {
5409+ }
5410+ else {
5411 DECODE_PRINTF("DEC\tBP\n");
5412 }
5413 TRACE_AND_STEP();
5414 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5415 M.x86.R_EBP = dec_long(M.x86.R_EBP);
5416- } else {
5417+ }
5418+ else {
5419 M.x86.R_BP = dec_word(M.x86.R_BP);
5420 }
5421 DECODE_CLEAR_SEGOVR();
5422@@ -3772,18 +3959,21 @@ static void x86emuOp_dec_BP(u8 X86EMU_UNUSED(op1))
5423 REMARKS:
5424 Handles opcode 0x4e
5425 ****************************************************************************/
5426-static void x86emuOp_dec_SI(u8 X86EMU_UNUSED(op1))
5427+static void
5428+x86emuOp_dec_SI(u8 X86EMU_UNUSED(op1))
5429 {
5430 START_OF_INSTR();
5431 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5432 DECODE_PRINTF("DEC\tESI\n");
5433- } else {
5434+ }
5435+ else {
5436 DECODE_PRINTF("DEC\tSI\n");
5437 }
5438 TRACE_AND_STEP();
5439 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5440 M.x86.R_ESI = dec_long(M.x86.R_ESI);
5441- } else {
5442+ }
5443+ else {
5444 M.x86.R_SI = dec_word(M.x86.R_SI);
5445 }
5446 DECODE_CLEAR_SEGOVR();
5447@@ -3794,18 +3984,21 @@ static void x86emuOp_dec_SI(u8 X86EMU_UNUSED(op1))
5448 REMARKS:
5449 Handles opcode 0x4f
5450 ****************************************************************************/
5451-static void x86emuOp_dec_DI(u8 X86EMU_UNUSED(op1))
5452+static void
5453+x86emuOp_dec_DI(u8 X86EMU_UNUSED(op1))
5454 {
5455 START_OF_INSTR();
5456 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5457 DECODE_PRINTF("DEC\tEDI\n");
5458- } else {
5459+ }
5460+ else {
5461 DECODE_PRINTF("DEC\tDI\n");
5462 }
5463 TRACE_AND_STEP();
5464 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5465 M.x86.R_EDI = dec_long(M.x86.R_EDI);
5466- } else {
5467+ }
5468+ else {
5469 M.x86.R_DI = dec_word(M.x86.R_DI);
5470 }
5471 DECODE_CLEAR_SEGOVR();
5472@@ -3816,18 +4009,21 @@ static void x86emuOp_dec_DI(u8 X86EMU_UNUSED(op1))
5473 REMARKS:
5474 Handles opcode 0x50
5475 ****************************************************************************/
5476-static void x86emuOp_push_AX(u8 X86EMU_UNUSED(op1))
5477+static void
5478+x86emuOp_push_AX(u8 X86EMU_UNUSED(op1))
5479 {
5480 START_OF_INSTR();
5481 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5482 DECODE_PRINTF("PUSH\tEAX\n");
5483- } else {
5484+ }
5485+ else {
5486 DECODE_PRINTF("PUSH\tAX\n");
5487 }
5488 TRACE_AND_STEP();
5489 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5490 push_long(M.x86.R_EAX);
5491- } else {
5492+ }
5493+ else {
5494 push_word(M.x86.R_AX);
5495 }
5496 DECODE_CLEAR_SEGOVR();
5497@@ -3838,18 +4034,21 @@ static void x86emuOp_push_AX(u8 X86EMU_UNUSED(op1))
5498 REMARKS:
5499 Handles opcode 0x51
5500 ****************************************************************************/
5501-static void x86emuOp_push_CX(u8 X86EMU_UNUSED(op1))
5502+static void
5503+x86emuOp_push_CX(u8 X86EMU_UNUSED(op1))
5504 {
5505 START_OF_INSTR();
5506 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5507 DECODE_PRINTF("PUSH\tECX\n");
5508- } else {
5509+ }
5510+ else {
5511 DECODE_PRINTF("PUSH\tCX\n");
5512 }
5513 TRACE_AND_STEP();
5514 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5515 push_long(M.x86.R_ECX);
5516- } else {
5517+ }
5518+ else {
5519 push_word(M.x86.R_CX);
5520 }
5521 DECODE_CLEAR_SEGOVR();
5522@@ -3860,18 +4059,21 @@ static void x86emuOp_push_CX(u8 X86EMU_UNUSED(op1))
5523 REMARKS:
5524 Handles opcode 0x52
5525 ****************************************************************************/
5526-static void x86emuOp_push_DX(u8 X86EMU_UNUSED(op1))
5527+static void
5528+x86emuOp_push_DX(u8 X86EMU_UNUSED(op1))
5529 {
5530 START_OF_INSTR();
5531 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5532 DECODE_PRINTF("PUSH\tEDX\n");
5533- } else {
5534+ }
5535+ else {
5536 DECODE_PRINTF("PUSH\tDX\n");
5537 }
5538 TRACE_AND_STEP();
5539 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5540 push_long(M.x86.R_EDX);
5541- } else {
5542+ }
5543+ else {
5544 push_word(M.x86.R_DX);
5545 }
5546 DECODE_CLEAR_SEGOVR();
5547@@ -3882,18 +4084,21 @@ static void x86emuOp_push_DX(u8 X86EMU_UNUSED(op1))
5548 REMARKS:
5549 Handles opcode 0x53
5550 ****************************************************************************/
5551-static void x86emuOp_push_BX(u8 X86EMU_UNUSED(op1))
5552+static void
5553+x86emuOp_push_BX(u8 X86EMU_UNUSED(op1))
5554 {
5555 START_OF_INSTR();
5556 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5557 DECODE_PRINTF("PUSH\tEBX\n");
5558- } else {
5559+ }
5560+ else {
5561 DECODE_PRINTF("PUSH\tBX\n");
5562 }
5563 TRACE_AND_STEP();
5564 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5565 push_long(M.x86.R_EBX);
5566- } else {
5567+ }
5568+ else {
5569 push_word(M.x86.R_BX);
5570 }
5571 DECODE_CLEAR_SEGOVR();
5572@@ -3904,23 +4109,26 @@ static void x86emuOp_push_BX(u8 X86EMU_UNUSED(op1))
5573 REMARKS:
5574 Handles opcode 0x54
5575 ****************************************************************************/
5576-static void x86emuOp_push_SP(u8 X86EMU_UNUSED(op1))
5577+static void
5578+x86emuOp_push_SP(u8 X86EMU_UNUSED(op1))
5579 {
5580 START_OF_INSTR();
5581 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5582 DECODE_PRINTF("PUSH\tESP\n");
5583- } else {
5584+ }
5585+ else {
5586 DECODE_PRINTF("PUSH\tSP\n");
5587 }
5588 TRACE_AND_STEP();
5589- /* Always push (E)SP, since we are emulating an i386 and above
5590- * processor. This is necessary as some BIOS'es use this to check
5591- * what type of processor is in the system.
5592- */
5593- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5594- push_long(M.x86.R_ESP);
5595- } else {
5596- push_word((u16)(M.x86.R_SP));
5597+ /* Always push (E)SP, since we are emulating an i386 and above
5598+ * processor. This is necessary as some BIOS'es use this to check
5599+ * what type of processor is in the system.
5600+ */
5601+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5602+ push_long(M.x86.R_ESP);
5603+ }
5604+ else {
5605+ push_word((u16) (M.x86.R_SP));
5606 }
5607 DECODE_CLEAR_SEGOVR();
5608 END_OF_INSTR();
5609@@ -3930,18 +4138,21 @@ static void x86emuOp_push_SP(u8 X86EMU_UNUSED(op1))
5610 REMARKS:
5611 Handles opcode 0x55
5612 ****************************************************************************/
5613-static void x86emuOp_push_BP(u8 X86EMU_UNUSED(op1))
5614+static void
5615+x86emuOp_push_BP(u8 X86EMU_UNUSED(op1))
5616 {
5617 START_OF_INSTR();
5618 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5619 DECODE_PRINTF("PUSH\tEBP\n");
5620- } else {
5621+ }
5622+ else {
5623 DECODE_PRINTF("PUSH\tBP\n");
5624 }
5625 TRACE_AND_STEP();
5626 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5627 push_long(M.x86.R_EBP);
5628- } else {
5629+ }
5630+ else {
5631 push_word(M.x86.R_BP);
5632 }
5633 DECODE_CLEAR_SEGOVR();
5634@@ -3952,18 +4163,21 @@ static void x86emuOp_push_BP(u8 X86EMU_UNUSED(op1))
5635 REMARKS:
5636 Handles opcode 0x56
5637 ****************************************************************************/
5638-static void x86emuOp_push_SI(u8 X86EMU_UNUSED(op1))
5639+static void
5640+x86emuOp_push_SI(u8 X86EMU_UNUSED(op1))
5641 {
5642 START_OF_INSTR();
5643 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5644 DECODE_PRINTF("PUSH\tESI\n");
5645- } else {
5646+ }
5647+ else {
5648 DECODE_PRINTF("PUSH\tSI\n");
5649 }
5650 TRACE_AND_STEP();
5651 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5652 push_long(M.x86.R_ESI);
5653- } else {
5654+ }
5655+ else {
5656 push_word(M.x86.R_SI);
5657 }
5658 DECODE_CLEAR_SEGOVR();
5659@@ -3974,18 +4188,21 @@ static void x86emuOp_push_SI(u8 X86EMU_UNUSED(op1))
5660 REMARKS:
5661 Handles opcode 0x57
5662 ****************************************************************************/
5663-static void x86emuOp_push_DI(u8 X86EMU_UNUSED(op1))
5664+static void
5665+x86emuOp_push_DI(u8 X86EMU_UNUSED(op1))
5666 {
5667 START_OF_INSTR();
5668 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5669 DECODE_PRINTF("PUSH\tEDI\n");
5670- } else {
5671+ }
5672+ else {
5673 DECODE_PRINTF("PUSH\tDI\n");
5674 }
5675 TRACE_AND_STEP();
5676 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5677 push_long(M.x86.R_EDI);
5678- } else {
5679+ }
5680+ else {
5681 push_word(M.x86.R_DI);
5682 }
5683 DECODE_CLEAR_SEGOVR();
5684@@ -3996,18 +4213,21 @@ static void x86emuOp_push_DI(u8 X86EMU_UNUSED(op1))
5685 REMARKS:
5686 Handles opcode 0x58
5687 ****************************************************************************/
5688-static void x86emuOp_pop_AX(u8 X86EMU_UNUSED(op1))
5689+static void
5690+x86emuOp_pop_AX(u8 X86EMU_UNUSED(op1))
5691 {
5692 START_OF_INSTR();
5693 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5694 DECODE_PRINTF("POP\tEAX\n");
5695- } else {
5696+ }
5697+ else {
5698 DECODE_PRINTF("POP\tAX\n");
5699 }
5700 TRACE_AND_STEP();
5701 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5702 M.x86.R_EAX = pop_long();
5703- } else {
5704+ }
5705+ else {
5706 M.x86.R_AX = pop_word();
5707 }
5708 DECODE_CLEAR_SEGOVR();
5709@@ -4018,18 +4238,21 @@ static void x86emuOp_pop_AX(u8 X86EMU_UNUSED(op1))
5710 REMARKS:
5711 Handles opcode 0x59
5712 ****************************************************************************/
5713-static void x86emuOp_pop_CX(u8 X86EMU_UNUSED(op1))
5714+static void
5715+x86emuOp_pop_CX(u8 X86EMU_UNUSED(op1))
5716 {
5717 START_OF_INSTR();
5718 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5719 DECODE_PRINTF("POP\tECX\n");
5720- } else {
5721+ }
5722+ else {
5723 DECODE_PRINTF("POP\tCX\n");
5724 }
5725 TRACE_AND_STEP();
5726 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5727 M.x86.R_ECX = pop_long();
5728- } else {
5729+ }
5730+ else {
5731 M.x86.R_CX = pop_word();
5732 }
5733 DECODE_CLEAR_SEGOVR();
5734@@ -4040,18 +4263,21 @@ static void x86emuOp_pop_CX(u8 X86EMU_UNUSED(op1))
5735 REMARKS:
5736 Handles opcode 0x5a
5737 ****************************************************************************/
5738-static void x86emuOp_pop_DX(u8 X86EMU_UNUSED(op1))
5739+static void
5740+x86emuOp_pop_DX(u8 X86EMU_UNUSED(op1))
5741 {
5742 START_OF_INSTR();
5743 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5744 DECODE_PRINTF("POP\tEDX\n");
5745- } else {
5746+ }
5747+ else {
5748 DECODE_PRINTF("POP\tDX\n");
5749 }
5750 TRACE_AND_STEP();
5751 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5752 M.x86.R_EDX = pop_long();
5753- } else {
5754+ }
5755+ else {
5756 M.x86.R_DX = pop_word();
5757 }
5758 DECODE_CLEAR_SEGOVR();
5759@@ -4062,18 +4288,21 @@ static void x86emuOp_pop_DX(u8 X86EMU_UNUSED(op1))
5760 REMARKS:
5761 Handles opcode 0x5b
5762 ****************************************************************************/
5763-static void x86emuOp_pop_BX(u8 X86EMU_UNUSED(op1))
5764+static void
5765+x86emuOp_pop_BX(u8 X86EMU_UNUSED(op1))
5766 {
5767 START_OF_INSTR();
5768 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5769 DECODE_PRINTF("POP\tEBX\n");
5770- } else {
5771+ }
5772+ else {
5773 DECODE_PRINTF("POP\tBX\n");
5774 }
5775 TRACE_AND_STEP();
5776 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5777 M.x86.R_EBX = pop_long();
5778- } else {
5779+ }
5780+ else {
5781 M.x86.R_BX = pop_word();
5782 }
5783 DECODE_CLEAR_SEGOVR();
5784@@ -4084,18 +4313,21 @@ static void x86emuOp_pop_BX(u8 X86EMU_UNUSED(op1))
5785 REMARKS:
5786 Handles opcode 0x5c
5787 ****************************************************************************/
5788-static void x86emuOp_pop_SP(u8 X86EMU_UNUSED(op1))
5789+static void
5790+x86emuOp_pop_SP(u8 X86EMU_UNUSED(op1))
5791 {
5792 START_OF_INSTR();
5793 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5794 DECODE_PRINTF("POP\tESP\n");
5795- } else {
5796+ }
5797+ else {
5798 DECODE_PRINTF("POP\tSP\n");
5799 }
5800 TRACE_AND_STEP();
5801 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5802 M.x86.R_ESP = pop_long();
5803- } else {
5804+ }
5805+ else {
5806 M.x86.R_SP = pop_word();
5807 }
5808 DECODE_CLEAR_SEGOVR();
5809@@ -4106,18 +4338,21 @@ static void x86emuOp_pop_SP(u8 X86EMU_UNUSED(op1))
5810 REMARKS:
5811 Handles opcode 0x5d
5812 ****************************************************************************/
5813-static void x86emuOp_pop_BP(u8 X86EMU_UNUSED(op1))
5814+static void
5815+x86emuOp_pop_BP(u8 X86EMU_UNUSED(op1))
5816 {
5817 START_OF_INSTR();
5818 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5819 DECODE_PRINTF("POP\tEBP\n");
5820- } else {
5821+ }
5822+ else {
5823 DECODE_PRINTF("POP\tBP\n");
5824 }
5825 TRACE_AND_STEP();
5826 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5827 M.x86.R_EBP = pop_long();
5828- } else {
5829+ }
5830+ else {
5831 M.x86.R_BP = pop_word();
5832 }
5833 DECODE_CLEAR_SEGOVR();
5834@@ -4128,18 +4363,21 @@ static void x86emuOp_pop_BP(u8 X86EMU_UNUSED(op1))
5835 REMARKS:
5836 Handles opcode 0x5e
5837 ****************************************************************************/
5838-static void x86emuOp_pop_SI(u8 X86EMU_UNUSED(op1))
5839+static void
5840+x86emuOp_pop_SI(u8 X86EMU_UNUSED(op1))
5841 {
5842 START_OF_INSTR();
5843 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5844 DECODE_PRINTF("POP\tESI\n");
5845- } else {
5846+ }
5847+ else {
5848 DECODE_PRINTF("POP\tSI\n");
5849 }
5850 TRACE_AND_STEP();
5851 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5852 M.x86.R_ESI = pop_long();
5853- } else {
5854+ }
5855+ else {
5856 M.x86.R_SI = pop_word();
5857 }
5858 DECODE_CLEAR_SEGOVR();
5859@@ -4150,18 +4388,21 @@ static void x86emuOp_pop_SI(u8 X86EMU_UNUSED(op1))
5860 REMARKS:
5861 Handles opcode 0x5f
5862 ****************************************************************************/
5863-static void x86emuOp_pop_DI(u8 X86EMU_UNUSED(op1))
5864+static void
5865+x86emuOp_pop_DI(u8 X86EMU_UNUSED(op1))
5866 {
5867 START_OF_INSTR();
5868 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5869 DECODE_PRINTF("POP\tEDI\n");
5870- } else {
5871+ }
5872+ else {
5873 DECODE_PRINTF("POP\tDI\n");
5874 }
5875 TRACE_AND_STEP();
5876 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5877 M.x86.R_EDI = pop_long();
5878- } else {
5879+ }
5880+ else {
5881 M.x86.R_DI = pop_word();
5882 }
5883 DECODE_CLEAR_SEGOVR();
5884@@ -4172,12 +4413,14 @@ static void x86emuOp_pop_DI(u8 X86EMU_UNUSED(op1))
5885 REMARKS:
5886 Handles opcode 0x60
5887 ****************************************************************************/
5888-static void x86emuOp_push_all(u8 X86EMU_UNUSED(op1))
5889+static void
5890+x86emuOp_push_all(u8 X86EMU_UNUSED(op1))
5891 {
5892 START_OF_INSTR();
5893 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5894 DECODE_PRINTF("PUSHAD\n");
5895- } else {
5896+ }
5897+ else {
5898 DECODE_PRINTF("PUSHA\n");
5899 }
5900 TRACE_AND_STEP();
5901@@ -4192,7 +4435,8 @@ static void x86emuOp_push_all(u8 X86EMU_UNUSED(op1))
5902 push_long(M.x86.R_EBP);
5903 push_long(M.x86.R_ESI);
5904 push_long(M.x86.R_EDI);
5905- } else {
5906+ }
5907+ else {
5908 u16 old_sp = M.x86.R_SP;
5909
5910 push_word(M.x86.R_AX);
5911@@ -4212,12 +4456,14 @@ static void x86emuOp_push_all(u8 X86EMU_UNUSED(op1))
5912 REMARKS:
5913 Handles opcode 0x61
5914 ****************************************************************************/
5915-static void x86emuOp_pop_all(u8 X86EMU_UNUSED(op1))
5916+static void
5917+x86emuOp_pop_all(u8 X86EMU_UNUSED(op1))
5918 {
5919 START_OF_INSTR();
5920 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
5921 DECODE_PRINTF("POPAD\n");
5922- } else {
5923+ }
5924+ else {
5925 DECODE_PRINTF("POPA\n");
5926 }
5927 TRACE_AND_STEP();
5928@@ -4225,16 +4471,17 @@ static void x86emuOp_pop_all(u8 X86EMU_UNUSED(op1))
5929 M.x86.R_EDI = pop_long();
5930 M.x86.R_ESI = pop_long();
5931 M.x86.R_EBP = pop_long();
5932- M.x86.R_ESP += 4; /* skip ESP */
5933+ M.x86.R_ESP += 4; /* skip ESP */
5934 M.x86.R_EBX = pop_long();
5935 M.x86.R_EDX = pop_long();
5936 M.x86.R_ECX = pop_long();
5937 M.x86.R_EAX = pop_long();
5938- } else {
5939+ }
5940+ else {
5941 M.x86.R_DI = pop_word();
5942 M.x86.R_SI = pop_word();
5943 M.x86.R_BP = pop_word();
5944- M.x86.R_SP += 2; /* skip SP */
5945+ M.x86.R_SP += 2; /* skip SP */
5946 M.x86.R_BX = pop_word();
5947 M.x86.R_DX = pop_word();
5948 M.x86.R_CX = pop_word();
5949@@ -4251,7 +4498,8 @@ static void x86emuOp_pop_all(u8 X86EMU_UNUSED(op1))
5950 REMARKS:
5951 Handles opcode 0x64
5952 ****************************************************************************/
5953-static void x86emuOp_segovr_FS(u8 X86EMU_UNUSED(op1))
5954+static void
5955+x86emuOp_segovr_FS(u8 X86EMU_UNUSED(op1))
5956 {
5957 START_OF_INSTR();
5958 DECODE_PRINTF("FS:\n");
5959@@ -4268,7 +4516,8 @@ static void x86emuOp_segovr_FS(u8 X86EMU_UNUSED(op1))
5960 REMARKS:
5961 Handles opcode 0x65
5962 ****************************************************************************/
5963-static void x86emuOp_segovr_GS(u8 X86EMU_UNUSED(op1))
5964+static void
5965+x86emuOp_segovr_GS(u8 X86EMU_UNUSED(op1))
5966 {
5967 START_OF_INSTR();
5968 DECODE_PRINTF("GS:\n");
5969@@ -4285,7 +4534,8 @@ static void x86emuOp_segovr_GS(u8 X86EMU_UNUSED(op1))
5970 REMARKS:
5971 Handles opcode 0x66 - prefix for 32-bit register
5972 ****************************************************************************/
5973-static void x86emuOp_prefix_data(u8 X86EMU_UNUSED(op1))
5974+static void
5975+x86emuOp_prefix_data(u8 X86EMU_UNUSED(op1))
5976 {
5977 START_OF_INSTR();
5978 DECODE_PRINTF("DATA:\n");
5979@@ -4299,7 +4549,8 @@ static void x86emuOp_prefix_data(u8 X86EMU_UNUSED(op1))
5980 REMARKS:
5981 Handles opcode 0x67 - prefix for 32-bit address
5982 ****************************************************************************/
5983-static void x86emuOp_prefix_addr(u8 X86EMU_UNUSED(op1))
5984+static void
5985+x86emuOp_prefix_addr(u8 X86EMU_UNUSED(op1))
5986 {
5987 START_OF_INSTR();
5988 DECODE_PRINTF("ADDR:\n");
5989@@ -4313,22 +4564,25 @@ static void x86emuOp_prefix_addr(u8 X86EMU_UNUSED(op1))
5990 REMARKS:
5991 Handles opcode 0x68
5992 ****************************************************************************/
5993-static void x86emuOp_push_word_IMM(u8 X86EMU_UNUSED(op1))
5994+static void
5995+x86emuOp_push_word_IMM(u8 X86EMU_UNUSED(op1))
5996 {
5997 u32 imm;
5998
5999 START_OF_INSTR();
6000 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
6001 imm = fetch_long_imm();
6002- } else {
6003+ }
6004+ else {
6005 imm = fetch_word_imm();
6006 }
6007 DECODE_PRINTF2("PUSH\t%x\n", imm);
6008 TRACE_AND_STEP();
6009 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
6010 push_long(imm);
6011- } else {
6012- push_word((u16)imm);
6013+ }
6014+ else {
6015+ push_word((u16) imm);
6016 }
6017 DECODE_CLEAR_SEGOVR();
6018 END_OF_INSTR();
6019@@ -4338,7 +4592,8 @@ static void x86emuOp_push_word_IMM(u8 X86EMU_UNUSED(op1))
6020 REMARKS:
6021 Handles opcode 0x69
6022 ****************************************************************************/
6023-static void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
6024+static void
6025+x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
6026 {
6027 int mod, rl, rh;
6028 uint srcoffset;
6029@@ -4351,7 +4606,7 @@ static void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
6030 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
6031 u32 *destreg;
6032 u32 srcval;
6033- u32 res_lo,res_hi;
6034+ u32 res_lo, res_hi;
6035 s32 imm;
6036
6037 destreg = DECODE_RM_LONG_REGISTER(rh);
6038@@ -4359,18 +4614,20 @@ static void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
6039 srcoffset = decode_rm00_address(rl);
6040 srcval = fetch_data_long(srcoffset);
6041 imm = fetch_long_imm();
6042- DECODE_PRINTF2(",%d\n", (s32)imm);
6043+ DECODE_PRINTF2(",%d\n", (s32) imm);
6044 TRACE_AND_STEP();
6045- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
6046+ imul_long_direct(&res_lo, &res_hi, (s32) srcval, (s32) imm);
6047 if (res_hi != 0) {
6048 SET_FLAG(F_CF);
6049 SET_FLAG(F_OF);
6050- } else {
6051+ }
6052+ else {
6053 CLEAR_FLAG(F_CF);
6054 CLEAR_FLAG(F_OF);
6055 }
6056- *destreg = (u32)res_lo;
6057- } else {
6058+ *destreg = (u32) res_lo;
6059+ }
6060+ else {
6061 u16 *destreg;
6062 u16 srcval;
6063 u32 res;
6064@@ -4381,24 +4638,26 @@ static void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
6065 srcoffset = decode_rm00_address(rl);
6066 srcval = fetch_data_word(srcoffset);
6067 imm = fetch_word_imm();
6068- DECODE_PRINTF2(",%d\n", (s32)imm);
6069+ DECODE_PRINTF2(",%d\n", (s32) imm);
6070 TRACE_AND_STEP();
6071- res = (s16)srcval * (s16)imm;
6072+ res = (s16) srcval *(s16) imm;
6073+
6074 if (res > 0xFFFF) {
6075 SET_FLAG(F_CF);
6076 SET_FLAG(F_OF);
6077- } else {
6078+ }
6079+ else {
6080 CLEAR_FLAG(F_CF);
6081 CLEAR_FLAG(F_OF);
6082 }
6083- *destreg = (u16)res;
6084+ *destreg = (u16) res;
6085 }
6086 break;
6087 case 1:
6088 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
6089 u32 *destreg;
6090 u32 srcval;
6091- u32 res_lo,res_hi;
6092+ u32 res_lo, res_hi;
6093 s32 imm;
6094
6095 destreg = DECODE_RM_LONG_REGISTER(rh);
6096@@ -4406,18 +4665,20 @@ static void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
6097 srcoffset = decode_rm01_address(rl);
6098 srcval = fetch_data_long(srcoffset);
6099 imm = fetch_long_imm();
6100- DECODE_PRINTF2(",%d\n", (s32)imm);
6101+ DECODE_PRINTF2(",%d\n", (s32) imm);
6102 TRACE_AND_STEP();
6103- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
6104+ imul_long_direct(&res_lo, &res_hi, (s32) srcval, (s32) imm);
6105 if (res_hi != 0) {
6106 SET_FLAG(F_CF);
6107 SET_FLAG(F_OF);
6108- } else {
6109+ }
6110+ else {
6111 CLEAR_FLAG(F_CF);
6112 CLEAR_FLAG(F_OF);
6113 }
6114- *destreg = (u32)res_lo;
6115- } else {
6116+ *destreg = (u32) res_lo;
6117+ }
6118+ else {
6119 u16 *destreg;
6120 u16 srcval;
6121 u32 res;
6122@@ -4428,24 +4689,26 @@ static void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
6123 srcoffset = decode_rm01_address(rl);
6124 srcval = fetch_data_word(srcoffset);
6125 imm = fetch_word_imm();
6126- DECODE_PRINTF2(",%d\n", (s32)imm);
6127+ DECODE_PRINTF2(",%d\n", (s32) imm);
6128 TRACE_AND_STEP();
6129- res = (s16)srcval * (s16)imm;
6130+ res = (s16) srcval *(s16) imm;
6131+
6132 if (res > 0xFFFF) {
6133 SET_FLAG(F_CF);
6134 SET_FLAG(F_OF);
6135- } else {
6136+ }
6137+ else {
6138 CLEAR_FLAG(F_CF);
6139 CLEAR_FLAG(F_OF);
6140 }
6141- *destreg = (u16)res;
6142+ *destreg = (u16) res;
6143 }
6144 break;
6145 case 2:
6146 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
6147 u32 *destreg;
6148 u32 srcval;
6149- u32 res_lo,res_hi;
6150+ u32 res_lo, res_hi;
6151 s32 imm;
6152
6153 destreg = DECODE_RM_LONG_REGISTER(rh);
6154@@ -4453,18 +4716,20 @@ static void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
6155 srcoffset = decode_rm10_address(rl);
6156 srcval = fetch_data_long(srcoffset);
6157 imm = fetch_long_imm();
6158- DECODE_PRINTF2(",%d\n", (s32)imm);
6159+ DECODE_PRINTF2(",%d\n", (s32) imm);
6160 TRACE_AND_STEP();
6161- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
6162+ imul_long_direct(&res_lo, &res_hi, (s32) srcval, (s32) imm);
6163 if (res_hi != 0) {
6164 SET_FLAG(F_CF);
6165 SET_FLAG(F_OF);
6166- } else {
6167+ }
6168+ else {
6169 CLEAR_FLAG(F_CF);
6170 CLEAR_FLAG(F_OF);
6171 }
6172- *destreg = (u32)res_lo;
6173- } else {
6174+ *destreg = (u32) res_lo;
6175+ }
6176+ else {
6177 u16 *destreg;
6178 u16 srcval;
6179 u32 res;
6180@@ -4475,42 +4740,46 @@ static void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
6181 srcoffset = decode_rm10_address(rl);
6182 srcval = fetch_data_word(srcoffset);
6183 imm = fetch_word_imm();
6184- DECODE_PRINTF2(",%d\n", (s32)imm);
6185+ DECODE_PRINTF2(",%d\n", (s32) imm);
6186 TRACE_AND_STEP();
6187- res = (s16)srcval * (s16)imm;
6188+ res = (s16) srcval *(s16) imm;
6189+
6190 if (res > 0xFFFF) {
6191 SET_FLAG(F_CF);
6192 SET_FLAG(F_OF);
6193- } else {
6194+ }
6195+ else {
6196 CLEAR_FLAG(F_CF);
6197 CLEAR_FLAG(F_OF);
6198 }
6199- *destreg = (u16)res;
6200+ *destreg = (u16) res;
6201 }
6202 break;
6203- case 3: /* register to register */
6204+ case 3: /* register to register */
6205 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
6206- u32 *destreg,*srcreg;
6207- u32 res_lo,res_hi;
6208+ u32 *destreg, *srcreg;
6209+ u32 res_lo, res_hi;
6210 s32 imm;
6211
6212 destreg = DECODE_RM_LONG_REGISTER(rh);
6213 DECODE_PRINTF(",");
6214 srcreg = DECODE_RM_LONG_REGISTER(rl);
6215 imm = fetch_long_imm();
6216- DECODE_PRINTF2(",%d\n", (s32)imm);
6217+ DECODE_PRINTF2(",%d\n", (s32) imm);
6218 TRACE_AND_STEP();
6219- imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm);
6220+ imul_long_direct(&res_lo, &res_hi, (s32) * srcreg, (s32) imm);
6221 if (res_hi != 0) {
6222 SET_FLAG(F_CF);
6223 SET_FLAG(F_OF);
6224- } else {
6225+ }
6226+ else {
6227 CLEAR_FLAG(F_CF);
6228 CLEAR_FLAG(F_OF);
6229 }
6230- *destreg = (u32)res_lo;
6231- } else {
6232- u16 *destreg,*srcreg;
6233+ *destreg = (u32) res_lo;
6234+ }
6235+ else {
6236+ u16 *destreg, *srcreg;
6237 u32 res;
6238 s16 imm;
6239
6240@@ -4518,16 +4787,17 @@ static void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
6241 DECODE_PRINTF(",");
6242 srcreg = DECODE_RM_WORD_REGISTER(rl);
6243 imm = fetch_word_imm();
6244- DECODE_PRINTF2(",%d\n", (s32)imm);
6245- res = (s16)*srcreg * (s16)imm;
6246+ DECODE_PRINTF2(",%d\n", (s32) imm);
6247+ res = (s16) * srcreg * (s16) imm;
6248 if (res > 0xFFFF) {
6249 SET_FLAG(F_CF);
6250 SET_FLAG(F_OF);
6251- } else {
6252+ }
6253+ else {
6254 CLEAR_FLAG(F_CF);
6255 CLEAR_FLAG(F_OF);
6256 }
6257- *destreg = (u16)res;
6258+ *destreg = (u16) res;
6259 }
6260 break;
6261 }
6262@@ -4539,18 +4809,20 @@ static void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
6263 REMARKS:
6264 Handles opcode 0x6a
6265 ****************************************************************************/
6266-static void x86emuOp_push_byte_IMM(u8 X86EMU_UNUSED(op1))
6267+static void
6268+x86emuOp_push_byte_IMM(u8 X86EMU_UNUSED(op1))
6269 {
6270 s16 imm;
6271
6272 START_OF_INSTR();
6273- imm = (s8)fetch_byte_imm();
6274+ imm = (s8) fetch_byte_imm();
6275 DECODE_PRINTF2("PUSH\t%d\n", imm);
6276 TRACE_AND_STEP();
6277 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
6278- push_long((s32)imm);
6279- } else {
6280- push_word(imm);
6281+ push_long((s32) imm);
6282+ }
6283+ else {
6284+ push_word(imm);
6285 }
6286 DECODE_CLEAR_SEGOVR();
6287 END_OF_INSTR();
6288@@ -4560,11 +4832,12 @@ static void x86emuOp_push_byte_IMM(u8 X86EMU_UNUSED(op1))
6289 REMARKS:
6290 Handles opcode 0x6b
6291 ****************************************************************************/
6292-static void x86emuOp_imul_byte_IMM(u8 X86EMU_UNUSED(op1))
6293+static void
6294+x86emuOp_imul_byte_IMM(u8 X86EMU_UNUSED(op1))
6295 {
6296 int mod, rl, rh;
6297 uint srcoffset;
6298- s8 imm;
6299+ s8 imm;
6300
6301 START_OF_INSTR();
6302 DECODE_PRINTF("IMUL\t");
6303@@ -4574,25 +4847,27 @@ static void x86emuOp_imul_byte_IMM(u8 X86EMU_UNUSED(op1))
6304 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
6305 u32 *destreg;
6306 u32 srcval;
6307- u32 res_lo,res_hi;
6308+ u32 res_lo, res_hi;
6309
6310 destreg = DECODE_RM_LONG_REGISTER(rh);
6311 DECODE_PRINTF(",");
6312 srcoffset = decode_rm00_address(rl);
6313 srcval = fetch_data_long(srcoffset);
6314 imm = fetch_byte_imm();
6315- DECODE_PRINTF2(",%d\n", (s32)imm);
6316+ DECODE_PRINTF2(",%d\n", (s32) imm);
6317 TRACE_AND_STEP();
6318- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
6319+ imul_long_direct(&res_lo, &res_hi, (s32) srcval, (s32) imm);
6320 if (res_hi != 0) {
6321 SET_FLAG(F_CF);
6322 SET_FLAG(F_OF);
6323- } else {
6324+ }
6325+ else {
6326 CLEAR_FLAG(F_CF);
6327 CLEAR_FLAG(F_OF);
6328 }
6329- *destreg = (u32)res_lo;
6330- } else {
6331+ *destreg = (u32) res_lo;
6332+ }
6333+ else {
6334 u16 *destreg;
6335 u16 srcval;
6336 u32 res;
6337@@ -4602,42 +4877,46 @@ static void x86emuOp_imul_byte_IMM(u8 X86EMU_UNUSED(op1))
6338 srcoffset = decode_rm00_address(rl);
6339 srcval = fetch_data_word(srcoffset);
6340 imm = fetch_byte_imm();
6341- DECODE_PRINTF2(",%d\n", (s32)imm);
6342+ DECODE_PRINTF2(",%d\n", (s32) imm);
6343 TRACE_AND_STEP();
6344- res = (s16)srcval * (s16)imm;
6345+ res = (s16) srcval *(s16) imm;
6346+
6347 if (res > 0xFFFF) {
6348 SET_FLAG(F_CF);
6349 SET_FLAG(F_OF);
6350- } else {
6351+ }
6352+ else {
6353 CLEAR_FLAG(F_CF);
6354 CLEAR_FLAG(F_OF);
6355 }
6356- *destreg = (u16)res;
6357+ *destreg = (u16) res;
6358 }
6359 break;
6360 case 1:
6361 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
6362 u32 *destreg;
6363 u32 srcval;
6364- u32 res_lo,res_hi;
6365+ u32 res_lo, res_hi;
6366
6367 destreg = DECODE_RM_LONG_REGISTER(rh);
6368 DECODE_PRINTF(",");
6369 srcoffset = decode_rm01_address(rl);
6370 srcval = fetch_data_long(srcoffset);
6371 imm = fetch_byte_imm();
6372- DECODE_PRINTF2(",%d\n", (s32)imm);
6373+ DECODE_PRINTF2(",%d\n", (s32) imm);
6374 TRACE_AND_STEP();
6375- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
6376+ imul_long_direct(&res_lo, &res_hi, (s32) srcval, (s32) imm);
6377 if (res_hi != 0) {
6378 SET_FLAG(F_CF);
6379 SET_FLAG(F_OF);
6380- } else {
6381+ }
6382+ else {
6383 CLEAR_FLAG(F_CF);
6384 CLEAR_FLAG(F_OF);
6385 }
6386- *destreg = (u32)res_lo;
6387- } else {
6388+ *destreg = (u32) res_lo;
6389+ }
6390+ else {
6391 u16 *destreg;
6392 u16 srcval;
6393 u32 res;
6394@@ -4647,42 +4926,46 @@ static void x86emuOp_imul_byte_IMM(u8 X86EMU_UNUSED(op1))
6395 srcoffset = decode_rm01_address(rl);
6396 srcval = fetch_data_word(srcoffset);
6397 imm = fetch_byte_imm();
6398- DECODE_PRINTF2(",%d\n", (s32)imm);
6399+ DECODE_PRINTF2(",%d\n", (s32) imm);
6400 TRACE_AND_STEP();
6401- res = (s16)srcval * (s16)imm;
6402+ res = (s16) srcval *(s16) imm;
6403+
6404 if (res > 0xFFFF) {
6405 SET_FLAG(F_CF);
6406 SET_FLAG(F_OF);
6407- } else {
6408+ }
6409+ else {
6410 CLEAR_FLAG(F_CF);
6411 CLEAR_FLAG(F_OF);
6412 }
6413- *destreg = (u16)res;
6414+ *destreg = (u16) res;
6415 }
6416 break;
6417 case 2:
6418 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
6419 u32 *destreg;
6420 u32 srcval;
6421- u32 res_lo,res_hi;
6422+ u32 res_lo, res_hi;
6423
6424 destreg = DECODE_RM_LONG_REGISTER(rh);
6425 DECODE_PRINTF(",");
6426 srcoffset = decode_rm10_address(rl);
6427 srcval = fetch_data_long(srcoffset);
6428 imm = fetch_byte_imm();
6429- DECODE_PRINTF2(",%d\n", (s32)imm);
6430+ DECODE_PRINTF2(",%d\n", (s32) imm);
6431 TRACE_AND_STEP();
6432- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
6433+ imul_long_direct(&res_lo, &res_hi, (s32) srcval, (s32) imm);
6434 if (res_hi != 0) {
6435 SET_FLAG(F_CF);
6436 SET_FLAG(F_OF);
6437- } else {
6438+ }
6439+ else {
6440 CLEAR_FLAG(F_CF);
6441 CLEAR_FLAG(F_OF);
6442 }
6443- *destreg = (u32)res_lo;
6444- } else {
6445+ *destreg = (u32) res_lo;
6446+ }
6447+ else {
6448 u16 *destreg;
6449 u16 srcval;
6450 u32 res;
6451@@ -4692,57 +4975,62 @@ static void x86emuOp_imul_byte_IMM(u8 X86EMU_UNUSED(op1))
6452 srcoffset = decode_rm10_address(rl);
6453 srcval = fetch_data_word(srcoffset);
6454 imm = fetch_byte_imm();
6455- DECODE_PRINTF2(",%d\n", (s32)imm);
6456+ DECODE_PRINTF2(",%d\n", (s32) imm);
6457 TRACE_AND_STEP();
6458- res = (s16)srcval * (s16)imm;
6459+ res = (s16) srcval *(s16) imm;
6460+
6461 if (res > 0xFFFF) {
6462 SET_FLAG(F_CF);
6463 SET_FLAG(F_OF);
6464- } else {
6465+ }
6466+ else {
6467 CLEAR_FLAG(F_CF);
6468 CLEAR_FLAG(F_OF);
6469 }
6470- *destreg = (u16)res;
6471+ *destreg = (u16) res;
6472 }
6473 break;
6474- case 3: /* register to register */
6475+ case 3: /* register to register */
6476 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
6477- u32 *destreg,*srcreg;
6478- u32 res_lo,res_hi;
6479+ u32 *destreg, *srcreg;
6480+ u32 res_lo, res_hi;
6481
6482 destreg = DECODE_RM_LONG_REGISTER(rh);
6483 DECODE_PRINTF(",");
6484 srcreg = DECODE_RM_LONG_REGISTER(rl);
6485 imm = fetch_byte_imm();
6486- DECODE_PRINTF2(",%d\n", (s32)imm);
6487+ DECODE_PRINTF2(",%d\n", (s32) imm);
6488 TRACE_AND_STEP();
6489- imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm);
6490+ imul_long_direct(&res_lo, &res_hi, (s32) * srcreg, (s32) imm);
6491 if (res_hi != 0) {
6492 SET_FLAG(F_CF);
6493 SET_FLAG(F_OF);
6494- } else {
6495+ }
6496+ else {
6497 CLEAR_FLAG(F_CF);
6498 CLEAR_FLAG(F_OF);
6499 }
6500- *destreg = (u32)res_lo;
6501- } else {
6502- u16 *destreg,*srcreg;
6503+ *destreg = (u32) res_lo;
6504+ }
6505+ else {
6506+ u16 *destreg, *srcreg;
6507 u32 res;
6508
6509 destreg = DECODE_RM_WORD_REGISTER(rh);
6510 DECODE_PRINTF(",");
6511 srcreg = DECODE_RM_WORD_REGISTER(rl);
6512 imm = fetch_byte_imm();
6513- DECODE_PRINTF2(",%d\n", (s32)imm);
6514- res = (s16)*srcreg * (s16)imm;
6515+ DECODE_PRINTF2(",%d\n", (s32) imm);
6516+ res = (s16) * srcreg * (s16) imm;
6517 if (res > 0xFFFF) {
6518 SET_FLAG(F_CF);
6519 SET_FLAG(F_OF);
6520- } else {
6521+ }
6522+ else {
6523 CLEAR_FLAG(F_CF);
6524 CLEAR_FLAG(F_OF);
6525 }
6526- *destreg = (u16)res;
6527+ *destreg = (u16) res;
6528 }
6529 break;
6530 }
6531@@ -4754,7 +5042,8 @@ static void x86emuOp_imul_byte_IMM(u8 X86EMU_UNUSED(op1))
6532 REMARKS:
6533 Handles opcode 0x6c
6534 ****************************************************************************/
6535-static void x86emuOp_ins_byte(u8 X86EMU_UNUSED(op1))
6536+static void
6537+x86emuOp_ins_byte(u8 X86EMU_UNUSED(op1))
6538 {
6539 START_OF_INSTR();
6540 DECODE_PRINTF("INSB\n");
6541@@ -4768,13 +5057,15 @@ static void x86emuOp_ins_byte(u8 X86EMU_UNUSED(op1))
6542 REMARKS:
6543 Handles opcode 0x6d
6544 ****************************************************************************/
6545-static void x86emuOp_ins_word(u8 X86EMU_UNUSED(op1))
6546+static void
6547+x86emuOp_ins_word(u8 X86EMU_UNUSED(op1))
6548 {
6549 START_OF_INSTR();
6550 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
6551 DECODE_PRINTF("INSD\n");
6552 ins(4);
6553- } else {
6554+ }
6555+ else {
6556 DECODE_PRINTF("INSW\n");
6557 ins(2);
6558 }
6559@@ -4787,7 +5078,8 @@ static void x86emuOp_ins_word(u8 X86EMU_UNUSED(op1))
6560 REMARKS:
6561 Handles opcode 0x6e
6562 ****************************************************************************/
6563-static void x86emuOp_outs_byte(u8 X86EMU_UNUSED(op1))
6564+static void
6565+x86emuOp_outs_byte(u8 X86EMU_UNUSED(op1))
6566 {
6567 START_OF_INSTR();
6568 DECODE_PRINTF("OUTSB\n");
6569@@ -4801,13 +5093,15 @@ static void x86emuOp_outs_byte(u8 X86EMU_UNUSED(op1))
6570 REMARKS:
6571 Handles opcode 0x6f
6572 ****************************************************************************/
6573-static void x86emuOp_outs_word(u8 X86EMU_UNUSED(op1))
6574+static void
6575+x86emuOp_outs_word(u8 X86EMU_UNUSED(op1))
6576 {
6577 START_OF_INSTR();
6578 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
6579 DECODE_PRINTF("OUTSD\n");
6580 outs(4);
6581- } else {
6582+ }
6583+ else {
6584 DECODE_PRINTF("OUTSW\n");
6585 outs(2);
6586 }
6587@@ -4820,7 +5114,8 @@ static void x86emuOp_outs_word(u8 X86EMU_UNUSED(op1))
6588 REMARKS:
6589 Handles opcode 0x70
6590 ****************************************************************************/
6591-static void x86emuOp_jump_near_O(u8 X86EMU_UNUSED(op1))
6592+static void
6593+x86emuOp_jump_near_O(u8 X86EMU_UNUSED(op1))
6594 {
6595 s8 offset;
6596 u16 target;
6597@@ -4828,8 +5123,8 @@ static void x86emuOp_jump_near_O(u8 X86EMU_UNUSED(op1))
6598 /* jump to byte offset if overflow flag is set */
6599 START_OF_INSTR();
6600 DECODE_PRINTF("JO\t");
6601- offset = (s8)fetch_byte_imm();
6602- target = (u16)(M.x86.R_IP + (s16)offset);
6603+ offset = (s8) fetch_byte_imm();
6604+ target = (u16) (M.x86.R_IP + (s16) offset);
6605 DECODE_PRINTF2("%x\n", target);
6606 TRACE_AND_STEP();
6607 if (ACCESS_FLAG(F_OF))
6608@@ -4842,7 +5137,8 @@ static void x86emuOp_jump_near_O(u8 X86EMU_UNUSED(op1))
6609 REMARKS:
6610 Handles opcode 0x71
6611 ****************************************************************************/
6612-static void x86emuOp_jump_near_NO(u8 X86EMU_UNUSED(op1))
6613+static void
6614+x86emuOp_jump_near_NO(u8 X86EMU_UNUSED(op1))
6615 {
6616 s8 offset;
6617 u16 target;
6618@@ -4850,8 +5146,8 @@ static void x86emuOp_jump_near_NO(u8 X86EMU_UNUSED(op1))
6619 /* jump to byte offset if overflow is not set */
6620 START_OF_INSTR();
6621 DECODE_PRINTF("JNO\t");
6622- offset = (s8)fetch_byte_imm();
6623- target = (u16)(M.x86.R_IP + (s16)offset);
6624+ offset = (s8) fetch_byte_imm();
6625+ target = (u16) (M.x86.R_IP + (s16) offset);
6626 DECODE_PRINTF2("%x\n", target);
6627 TRACE_AND_STEP();
6628 if (!ACCESS_FLAG(F_OF))
6629@@ -4864,7 +5160,8 @@ static void x86emuOp_jump_near_NO(u8 X86EMU_UNUSED(op1))
6630 REMARKS:
6631 Handles opcode 0x72
6632 ****************************************************************************/
6633-static void x86emuOp_jump_near_B(u8 X86EMU_UNUSED(op1))
6634+static void
6635+x86emuOp_jump_near_B(u8 X86EMU_UNUSED(op1))
6636 {
6637 s8 offset;
6638 u16 target;
6639@@ -4872,8 +5169,8 @@ static void x86emuOp_jump_near_B(u8 X86EMU_UNUSED(op1))
6640 /* jump to byte offset if carry flag is set. */
6641 START_OF_INSTR();
6642 DECODE_PRINTF("JB\t");
6643- offset = (s8)fetch_byte_imm();
6644- target = (u16)(M.x86.R_IP + (s16)offset);
6645+ offset = (s8) fetch_byte_imm();
6646+ target = (u16) (M.x86.R_IP + (s16) offset);
6647 DECODE_PRINTF2("%x\n", target);
6648 TRACE_AND_STEP();
6649 if (ACCESS_FLAG(F_CF))
6650@@ -4886,7 +5183,8 @@ static void x86emuOp_jump_near_B(u8 X86EMU_UNUSED(op1))
6651 REMARKS:
6652 Handles opcode 0x73
6653 ****************************************************************************/
6654-static void x86emuOp_jump_near_NB(u8 X86EMU_UNUSED(op1))
6655+static void
6656+x86emuOp_jump_near_NB(u8 X86EMU_UNUSED(op1))
6657 {
6658 s8 offset;
6659 u16 target;
6660@@ -4894,8 +5192,8 @@ static void x86emuOp_jump_near_NB(u8 X86EMU_UNUSED(op1))
6661 /* jump to byte offset if carry flag is clear. */
6662 START_OF_INSTR();
6663 DECODE_PRINTF("JNB\t");
6664- offset = (s8)fetch_byte_imm();
6665- target = (u16)(M.x86.R_IP + (s16)offset);
6666+ offset = (s8) fetch_byte_imm();
6667+ target = (u16) (M.x86.R_IP + (s16) offset);
6668 DECODE_PRINTF2("%x\n", target);
6669 TRACE_AND_STEP();
6670 if (!ACCESS_FLAG(F_CF))
6671@@ -4908,7 +5206,8 @@ static void x86emuOp_jump_near_NB(u8 X86EMU_UNUSED(op1))
6672 REMARKS:
6673 Handles opcode 0x74
6674 ****************************************************************************/
6675-static void x86emuOp_jump_near_Z(u8 X86EMU_UNUSED(op1))
6676+static void
6677+x86emuOp_jump_near_Z(u8 X86EMU_UNUSED(op1))
6678 {
6679 s8 offset;
6680 u16 target;
6681@@ -4916,8 +5215,8 @@ static void x86emuOp_jump_near_Z(u8 X86EMU_UNUSED(op1))
6682 /* jump to byte offset if zero flag is set. */
6683 START_OF_INSTR();
6684 DECODE_PRINTF("JZ\t");
6685- offset = (s8)fetch_byte_imm();
6686- target = (u16)(M.x86.R_IP + (s16)offset);
6687+ offset = (s8) fetch_byte_imm();
6688+ target = (u16) (M.x86.R_IP + (s16) offset);
6689 DECODE_PRINTF2("%x\n", target);
6690 TRACE_AND_STEP();
6691 if (ACCESS_FLAG(F_ZF))
6692@@ -4930,7 +5229,8 @@ static void x86emuOp_jump_near_Z(u8 X86EMU_UNUSED(op1))
6693 REMARKS:
6694 Handles opcode 0x75
6695 ****************************************************************************/
6696-static void x86emuOp_jump_near_NZ(u8 X86EMU_UNUSED(op1))
6697+static void
6698+x86emuOp_jump_near_NZ(u8 X86EMU_UNUSED(op1))
6699 {
6700 s8 offset;
6701 u16 target;
6702@@ -4938,8 +5238,8 @@ static void x86emuOp_jump_near_NZ(u8 X86EMU_UNUSED(op1))
6703 /* jump to byte offset if zero flag is clear. */
6704 START_OF_INSTR();
6705 DECODE_PRINTF("JNZ\t");
6706- offset = (s8)fetch_byte_imm();
6707- target = (u16)(M.x86.R_IP + (s16)offset);
6708+ offset = (s8) fetch_byte_imm();
6709+ target = (u16) (M.x86.R_IP + (s16) offset);
6710 DECODE_PRINTF2("%x\n", target);
6711 TRACE_AND_STEP();
6712 if (!ACCESS_FLAG(F_ZF))
6713@@ -4952,7 +5252,8 @@ static void x86emuOp_jump_near_NZ(u8 X86EMU_UNUSED(op1))
6714 REMARKS:
6715 Handles opcode 0x76
6716 ****************************************************************************/
6717-static void x86emuOp_jump_near_BE(u8 X86EMU_UNUSED(op1))
6718+static void
6719+x86emuOp_jump_near_BE(u8 X86EMU_UNUSED(op1))
6720 {
6721 s8 offset;
6722 u16 target;
6723@@ -4961,8 +5262,8 @@ static void x86emuOp_jump_near_BE(u8 X86EMU_UNUSED(op1))
6724 flag is set. */
6725 START_OF_INSTR();
6726 DECODE_PRINTF("JBE\t");
6727- offset = (s8)fetch_byte_imm();
6728- target = (u16)(M.x86.R_IP + (s16)offset);
6729+ offset = (s8) fetch_byte_imm();
6730+ target = (u16) (M.x86.R_IP + (s16) offset);
6731 DECODE_PRINTF2("%x\n", target);
6732 TRACE_AND_STEP();
6733 if (ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF))
6734@@ -4975,7 +5276,8 @@ static void x86emuOp_jump_near_BE(u8 X86EMU_UNUSED(op1))
6735 REMARKS:
6736 Handles opcode 0x77
6737 ****************************************************************************/
6738-static void x86emuOp_jump_near_NBE(u8 X86EMU_UNUSED(op1))
6739+static void
6740+x86emuOp_jump_near_NBE(u8 X86EMU_UNUSED(op1))
6741 {
6742 s8 offset;
6743 u16 target;
6744@@ -4984,8 +5286,8 @@ static void x86emuOp_jump_near_NBE(u8 X86EMU_UNUSED(op1))
6745 flag is clear */
6746 START_OF_INSTR();
6747 DECODE_PRINTF("JNBE\t");
6748- offset = (s8)fetch_byte_imm();
6749- target = (u16)(M.x86.R_IP + (s16)offset);
6750+ offset = (s8) fetch_byte_imm();
6751+ target = (u16) (M.x86.R_IP + (s16) offset);
6752 DECODE_PRINTF2("%x\n", target);
6753 TRACE_AND_STEP();
6754 if (!(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF)))
6755@@ -4998,7 +5300,8 @@ static void x86emuOp_jump_near_NBE(u8 X86EMU_UNUSED(op1))
6756 REMARKS:
6757 Handles opcode 0x78
6758 ****************************************************************************/
6759-static void x86emuOp_jump_near_S(u8 X86EMU_UNUSED(op1))
6760+static void
6761+x86emuOp_jump_near_S(u8 X86EMU_UNUSED(op1))
6762 {
6763 s8 offset;
6764 u16 target;
6765@@ -5006,8 +5309,8 @@ static void x86emuOp_jump_near_S(u8 X86EMU_UNUSED(op1))
6766 /* jump to byte offset if sign flag is set */
6767 START_OF_INSTR();
6768 DECODE_PRINTF("JS\t");
6769- offset = (s8)fetch_byte_imm();
6770- target = (u16)(M.x86.R_IP + (s16)offset);
6771+ offset = (s8) fetch_byte_imm();
6772+ target = (u16) (M.x86.R_IP + (s16) offset);
6773 DECODE_PRINTF2("%x\n", target);
6774 TRACE_AND_STEP();
6775 if (ACCESS_FLAG(F_SF))
6776@@ -5020,7 +5323,8 @@ static void x86emuOp_jump_near_S(u8 X86EMU_UNUSED(op1))
6777 REMARKS:
6778 Handles opcode 0x79
6779 ****************************************************************************/
6780-static void x86emuOp_jump_near_NS(u8 X86EMU_UNUSED(op1))
6781+static void
6782+x86emuOp_jump_near_NS(u8 X86EMU_UNUSED(op1))
6783 {
6784 s8 offset;
6785 u16 target;
6786@@ -5028,8 +5332,8 @@ static void x86emuOp_jump_near_NS(u8 X86EMU_UNUSED(op1))
6787 /* jump to byte offset if sign flag is clear */
6788 START_OF_INSTR();
6789 DECODE_PRINTF("JNS\t");
6790- offset = (s8)fetch_byte_imm();
6791- target = (u16)(M.x86.R_IP + (s16)offset);
6792+ offset = (s8) fetch_byte_imm();
6793+ target = (u16) (M.x86.R_IP + (s16) offset);
6794 DECODE_PRINTF2("%x\n", target);
6795 TRACE_AND_STEP();
6796 if (!ACCESS_FLAG(F_SF))
6797@@ -5042,7 +5346,8 @@ static void x86emuOp_jump_near_NS(u8 X86EMU_UNUSED(op1))
6798 REMARKS:
6799 Handles opcode 0x7a
6800 ****************************************************************************/
6801-static void x86emuOp_jump_near_P(u8 X86EMU_UNUSED(op1))
6802+static void
6803+x86emuOp_jump_near_P(u8 X86EMU_UNUSED(op1))
6804 {
6805 s8 offset;
6806 u16 target;
6807@@ -5050,8 +5355,8 @@ static void x86emuOp_jump_near_P(u8 X86EMU_UNUSED(op1))
6808 /* jump to byte offset if parity flag is set (even parity) */
6809 START_OF_INSTR();
6810 DECODE_PRINTF("JP\t");
6811- offset = (s8)fetch_byte_imm();
6812- target = (u16)(M.x86.R_IP + (s16)offset);
6813+ offset = (s8) fetch_byte_imm();
6814+ target = (u16) (M.x86.R_IP + (s16) offset);
6815 DECODE_PRINTF2("%x\n", target);
6816 TRACE_AND_STEP();
6817 if (ACCESS_FLAG(F_PF))
6818@@ -5064,7 +5369,8 @@ static void x86emuOp_jump_near_P(u8 X86EMU_UNUSED(op1))
6819 REMARKS:
6820 Handles opcode 0x7b
6821 ****************************************************************************/
6822-static void x86emuOp_jump_near_NP(u8 X86EMU_UNUSED(op1))
6823+static void
6824+x86emuOp_jump_near_NP(u8 X86EMU_UNUSED(op1))
6825 {
6826 s8 offset;
6827 u16 target;
6828@@ -5072,8 +5378,8 @@ static void x86emuOp_jump_near_NP(u8 X86EMU_UNUSED(op1))
6829 /* jump to byte offset if parity flag is clear (odd parity) */
6830 START_OF_INSTR();
6831 DECODE_PRINTF("JNP\t");
6832- offset = (s8)fetch_byte_imm();
6833- target = (u16)(M.x86.R_IP + (s16)offset);
6834+ offset = (s8) fetch_byte_imm();
6835+ target = (u16) (M.x86.R_IP + (s16) offset);
6836 DECODE_PRINTF2("%x\n", target);
6837 TRACE_AND_STEP();
6838 if (!ACCESS_FLAG(F_PF))
6839@@ -5086,7 +5392,8 @@ static void x86emuOp_jump_near_NP(u8 X86EMU_UNUSED(op1))
6840 REMARKS:
6841 Handles opcode 0x7c
6842 ****************************************************************************/
6843-static void x86emuOp_jump_near_L(u8 X86EMU_UNUSED(op1))
6844+static void
6845+x86emuOp_jump_near_L(u8 X86EMU_UNUSED(op1))
6846 {
6847 s8 offset;
6848 u16 target;
6849@@ -5095,8 +5402,8 @@ static void x86emuOp_jump_near_L(u8 X86EMU_UNUSED(op1))
6850 /* jump to byte offset if sign flag not equal to overflow flag. */
6851 START_OF_INSTR();
6852 DECODE_PRINTF("JL\t");
6853- offset = (s8)fetch_byte_imm();
6854- target = (u16)(M.x86.R_IP + (s16)offset);
6855+ offset = (s8) fetch_byte_imm();
6856+ target = (u16) (M.x86.R_IP + (s16) offset);
6857 DECODE_PRINTF2("%x\n", target);
6858 TRACE_AND_STEP();
6859 sf = ACCESS_FLAG(F_SF) != 0;
6860@@ -5111,7 +5418,8 @@ static void x86emuOp_jump_near_L(u8 X86EMU_UNUSED(op1))
6861 REMARKS:
6862 Handles opcode 0x7d
6863 ****************************************************************************/
6864-static void x86emuOp_jump_near_NL(u8 X86EMU_UNUSED(op1))
6865+static void
6866+x86emuOp_jump_near_NL(u8 X86EMU_UNUSED(op1))
6867 {
6868 s8 offset;
6869 u16 target;
6870@@ -5120,8 +5428,8 @@ static void x86emuOp_jump_near_NL(u8 X86EMU_UNUSED(op1))
6871 /* jump to byte offset if sign flag not equal to overflow flag. */
6872 START_OF_INSTR();
6873 DECODE_PRINTF("JNL\t");
6874- offset = (s8)fetch_byte_imm();
6875- target = (u16)(M.x86.R_IP + (s16)offset);
6876+ offset = (s8) fetch_byte_imm();
6877+ target = (u16) (M.x86.R_IP + (s16) offset);
6878 DECODE_PRINTF2("%x\n", target);
6879 TRACE_AND_STEP();
6880 sf = ACCESS_FLAG(F_SF) != 0;
6881@@ -5137,7 +5445,8 @@ static void x86emuOp_jump_near_NL(u8 X86EMU_UNUSED(op1))
6882 REMARKS:
6883 Handles opcode 0x7e
6884 ****************************************************************************/
6885-static void x86emuOp_jump_near_LE(u8 X86EMU_UNUSED(op1))
6886+static void
6887+x86emuOp_jump_near_LE(u8 X86EMU_UNUSED(op1))
6888 {
6889 s8 offset;
6890 u16 target;
6891@@ -5147,8 +5456,8 @@ static void x86emuOp_jump_near_LE(u8 X86EMU_UNUSED(op1))
6892 or the zero flag is set */
6893 START_OF_INSTR();
6894 DECODE_PRINTF("JLE\t");
6895- offset = (s8)fetch_byte_imm();
6896- target = (u16)(M.x86.R_IP + (s16)offset);
6897+ offset = (s8) fetch_byte_imm();
6898+ target = (u16) (M.x86.R_IP + (s16) offset);
6899 DECODE_PRINTF2("%x\n", target);
6900 TRACE_AND_STEP();
6901 sf = ACCESS_FLAG(F_SF) != 0;
6902@@ -5163,7 +5472,8 @@ static void x86emuOp_jump_near_LE(u8 X86EMU_UNUSED(op1))
6903 REMARKS:
6904 Handles opcode 0x7f
6905 ****************************************************************************/
6906-static void x86emuOp_jump_near_NLE(u8 X86EMU_UNUSED(op1))
6907+static void
6908+x86emuOp_jump_near_NLE(u8 X86EMU_UNUSED(op1))
6909 {
6910 s8 offset;
6911 u16 target;
6912@@ -5173,8 +5483,8 @@ static void x86emuOp_jump_near_NLE(u8 X86EMU_UNUSED(op1))
6913 and the zero flag is clear */
6914 START_OF_INSTR();
6915 DECODE_PRINTF("JNLE\t");
6916- offset = (s8)fetch_byte_imm();
6917- target = (u16)(M.x86.R_IP + (s16)offset);
6918+ offset = (s8) fetch_byte_imm();
6919+ target = (u16) (M.x86.R_IP + (s16) offset);
6920 DECODE_PRINTF2("%x\n", target);
6921 TRACE_AND_STEP();
6922 sf = ACCESS_FLAG(F_SF) != 0;
6923@@ -5185,23 +5495,23 @@ static void x86emuOp_jump_near_NLE(u8 X86EMU_UNUSED(op1))
6924 END_OF_INSTR();
6925 }
6926
6927-static u8 (*opc80_byte_operation[])(u8 d, u8 s) =
6928-{
6929- add_byte, /* 00 */
6930- or_byte, /* 01 */
6931- adc_byte, /* 02 */
6932- sbb_byte, /* 03 */
6933- and_byte, /* 04 */
6934- sub_byte, /* 05 */
6935- xor_byte, /* 06 */
6936- cmp_byte, /* 07 */
6937+static u8(*opc80_byte_operation[]) (u8 d, u8 s) = {
6938+ add_byte, /* 00 */
6939+ or_byte, /* 01 */
6940+ adc_byte, /* 02 */
6941+ sbb_byte, /* 03 */
6942+ and_byte, /* 04 */
6943+ sub_byte, /* 05 */
6944+ xor_byte, /* 06 */
6945+ cmp_byte, /* 07 */
6946 };
6947
6948 /****************************************************************************
6949 REMARKS:
6950 Handles opcode 0x80
6951 ****************************************************************************/
6952-static void x86emuOp_opc80_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
6953+static void
6954+x86emuOp_opc80_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
6955 {
6956 int mod, rl, rh;
6957 u8 *destreg;
6958@@ -5290,7 +5600,7 @@ static void x86emuOp_opc80_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
6959 if (rh != 7)
6960 store_data_byte(destoffset, destval);
6961 break;
6962- case 3: /* register to register */
6963+ case 3: /* register to register */
6964 destreg = DECODE_RM_BYTE_REGISTER(rl);
6965 DECODE_PRINTF(",");
6966 imm = fetch_byte_imm();
6967@@ -5305,35 +5615,34 @@ static void x86emuOp_opc80_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
6968 END_OF_INSTR();
6969 }
6970
6971-static u16 (*opc81_word_operation[])(u16 d, u16 s) =
6972-{
6973- add_word, /*00 */
6974- or_word, /*01 */
6975- adc_word, /*02 */
6976- sbb_word, /*03 */
6977- and_word, /*04 */
6978- sub_word, /*05 */
6979- xor_word, /*06 */
6980- cmp_word, /*07 */
6981+static u16(*opc81_word_operation[]) (u16 d, u16 s) = {
6982+ add_word, /*00 */
6983+ or_word, /*01 */
6984+ adc_word, /*02 */
6985+ sbb_word, /*03 */
6986+ and_word, /*04 */
6987+ sub_word, /*05 */
6988+ xor_word, /*06 */
6989+ cmp_word, /*07 */
6990 };
6991
6992-static u32 (*opc81_long_operation[])(u32 d, u32 s) =
6993-{
6994- add_long, /*00 */
6995- or_long, /*01 */
6996- adc_long, /*02 */
6997- sbb_long, /*03 */
6998- and_long, /*04 */
6999- sub_long, /*05 */
7000- xor_long, /*06 */
7001- cmp_long, /*07 */
7002+static u32(*opc81_long_operation[]) (u32 d, u32 s) = {
7003+ add_long, /*00 */
7004+ or_long, /*01 */
7005+ adc_long, /*02 */
7006+ sbb_long, /*03 */
7007+ and_long, /*04 */
7008+ sub_long, /*05 */
7009+ xor_long, /*06 */
7010+ cmp_long, /*07 */
7011 };
7012
7013 /****************************************************************************
7014 REMARKS:
7015 Handles opcode 0x81
7016 ****************************************************************************/
7017-static void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7018+static void
7019+x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7020 {
7021 int mod, rl, rh;
7022 uint destoffset;
7023@@ -5387,7 +5696,7 @@ static void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7024 switch (mod) {
7025 case 0:
7026 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7027- u32 destval,imm;
7028+ u32 destval, imm;
7029
7030 DECODE_PRINTF("DWORD PTR ");
7031 destoffset = decode_rm00_address(rl);
7032@@ -5399,8 +5708,9 @@ static void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7033 destval = (*opc81_long_operation[rh]) (destval, imm);
7034 if (rh != 7)
7035 store_data_long(destoffset, destval);
7036- } else {
7037- u16 destval,imm;
7038+ }
7039+ else {
7040+ u16 destval, imm;
7041
7042 DECODE_PRINTF("WORD PTR ");
7043 destoffset = decode_rm00_address(rl);
7044@@ -5416,7 +5726,7 @@ static void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7045 break;
7046 case 1:
7047 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7048- u32 destval,imm;
7049+ u32 destval, imm;
7050
7051 DECODE_PRINTF("DWORD PTR ");
7052 destoffset = decode_rm01_address(rl);
7053@@ -5428,8 +5738,9 @@ static void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7054 destval = (*opc81_long_operation[rh]) (destval, imm);
7055 if (rh != 7)
7056 store_data_long(destoffset, destval);
7057- } else {
7058- u16 destval,imm;
7059+ }
7060+ else {
7061+ u16 destval, imm;
7062
7063 DECODE_PRINTF("WORD PTR ");
7064 destoffset = decode_rm01_address(rl);
7065@@ -5445,7 +5756,7 @@ static void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7066 break;
7067 case 2:
7068 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7069- u32 destval,imm;
7070+ u32 destval, imm;
7071
7072 DECODE_PRINTF("DWORD PTR ");
7073 destoffset = decode_rm10_address(rl);
7074@@ -5457,8 +5768,9 @@ static void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7075 destval = (*opc81_long_operation[rh]) (destval, imm);
7076 if (rh != 7)
7077 store_data_long(destoffset, destval);
7078- } else {
7079- u16 destval,imm;
7080+ }
7081+ else {
7082+ u16 destval, imm;
7083
7084 DECODE_PRINTF("WORD PTR ");
7085 destoffset = decode_rm10_address(rl);
7086@@ -5472,10 +5784,10 @@ static void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7087 store_data_word(destoffset, destval);
7088 }
7089 break;
7090- case 3: /* register to register */
7091+ case 3: /* register to register */
7092 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7093 u32 *destreg;
7094- u32 destval,imm;
7095+ u32 destval, imm;
7096
7097 destreg = DECODE_RM_LONG_REGISTER(rl);
7098 DECODE_PRINTF(",");
7099@@ -5485,9 +5797,10 @@ static void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7100 destval = (*opc81_long_operation[rh]) (*destreg, imm);
7101 if (rh != 7)
7102 *destreg = destval;
7103- } else {
7104+ }
7105+ else {
7106 u16 *destreg;
7107- u16 destval,imm;
7108+ u16 destval, imm;
7109
7110 destreg = DECODE_RM_WORD_REGISTER(rl);
7111 DECODE_PRINTF(",");
7112@@ -5504,23 +5817,23 @@ static void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7113 END_OF_INSTR();
7114 }
7115
7116-static u8 (*opc82_byte_operation[])(u8 s, u8 d) =
7117-{
7118- add_byte, /*00 */
7119- or_byte, /*01 *//*YYY UNUSED ???? */
7120- adc_byte, /*02 */
7121- sbb_byte, /*03 */
7122- and_byte, /*04 *//*YYY UNUSED ???? */
7123- sub_byte, /*05 */
7124- xor_byte, /*06 *//*YYY UNUSED ???? */
7125- cmp_byte, /*07 */
7126+static u8(*opc82_byte_operation[]) (u8 s, u8 d) = {
7127+ add_byte, /*00 */
7128+ or_byte, /*01 *//*YYY UNUSED ???? */
7129+ adc_byte, /*02 */
7130+ sbb_byte, /*03 */
7131+ and_byte, /*04 *//*YYY UNUSED ???? */
7132+ sub_byte, /*05 */
7133+ xor_byte, /*06 *//*YYY UNUSED ???? */
7134+ cmp_byte, /*07 */
7135 };
7136
7137 /****************************************************************************
7138 REMARKS:
7139 Handles opcode 0x82
7140 ****************************************************************************/
7141-static void x86emuOp_opc82_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
7142+static void
7143+x86emuOp_opc82_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
7144 {
7145 int mod, rl, rh;
7146 u8 *destreg;
7147@@ -5606,7 +5919,7 @@ static void x86emuOp_opc82_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
7148 if (rh != 7)
7149 store_data_byte(destoffset, destval);
7150 break;
7151- case 3: /* register to register */
7152+ case 3: /* register to register */
7153 destreg = DECODE_RM_BYTE_REGISTER(rl);
7154 imm = fetch_byte_imm();
7155 DECODE_PRINTF2(",%x\n", imm);
7156@@ -5620,35 +5933,34 @@ static void x86emuOp_opc82_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
7157 END_OF_INSTR();
7158 }
7159
7160-static u16 (*opc83_word_operation[])(u16 s, u16 d) =
7161-{
7162- add_word, /*00 */
7163- or_word, /*01 *//*YYY UNUSED ???? */
7164- adc_word, /*02 */
7165- sbb_word, /*03 */
7166- and_word, /*04 *//*YYY UNUSED ???? */
7167- sub_word, /*05 */
7168- xor_word, /*06 *//*YYY UNUSED ???? */
7169- cmp_word, /*07 */
7170+static u16(*opc83_word_operation[]) (u16 s, u16 d) = {
7171+ add_word, /*00 */
7172+ or_word, /*01 *//*YYY UNUSED ???? */
7173+ adc_word, /*02 */
7174+ sbb_word, /*03 */
7175+ and_word, /*04 *//*YYY UNUSED ???? */
7176+ sub_word, /*05 */
7177+ xor_word, /*06 *//*YYY UNUSED ???? */
7178+ cmp_word, /*07 */
7179 };
7180
7181-static u32 (*opc83_long_operation[])(u32 s, u32 d) =
7182-{
7183- add_long, /*00 */
7184- or_long, /*01 *//*YYY UNUSED ???? */
7185- adc_long, /*02 */
7186- sbb_long, /*03 */
7187- and_long, /*04 *//*YYY UNUSED ???? */
7188- sub_long, /*05 */
7189- xor_long, /*06 *//*YYY UNUSED ???? */
7190- cmp_long, /*07 */
7191+static u32(*opc83_long_operation[]) (u32 s, u32 d) = {
7192+ add_long, /*00 */
7193+ or_long, /*01 *//*YYY UNUSED ???? */
7194+ adc_long, /*02 */
7195+ sbb_long, /*03 */
7196+ and_long, /*04 *//*YYY UNUSED ???? */
7197+ sub_long, /*05 */
7198+ xor_long, /*06 *//*YYY UNUSED ???? */
7199+ cmp_long, /*07 */
7200 };
7201
7202 /****************************************************************************
7203 REMARKS:
7204 Handles opcode 0x83
7205 ****************************************************************************/
7206-static void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7207+static void
7208+x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7209 {
7210 int mod, rl, rh;
7211 uint destoffset;
7212@@ -5667,7 +5979,7 @@ static void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7213 general, so that it is important to leave the strings
7214 in the same format, even though the result is that the
7215 above test is done twice. */
7216- switch (rh) {
7217+ switch (rh) {
7218 case 0:
7219 DECODE_PRINTF("ADD\t");
7220 break;
7221@@ -5700,7 +6012,7 @@ static void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7222 switch (mod) {
7223 case 0:
7224 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7225- u32 destval,imm;
7226+ u32 destval, imm;
7227
7228 DECODE_PRINTF("DWORD PTR ");
7229 destoffset = decode_rm00_address(rl);
7230@@ -5711,8 +6023,9 @@ static void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7231 destval = (*opc83_long_operation[rh]) (destval, imm);
7232 if (rh != 7)
7233 store_data_long(destoffset, destval);
7234- } else {
7235- u16 destval,imm;
7236+ }
7237+ else {
7238+ u16 destval, imm;
7239
7240 DECODE_PRINTF("WORD PTR ");
7241 destoffset = decode_rm00_address(rl);
7242@@ -5727,7 +6040,7 @@ static void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7243 break;
7244 case 1:
7245 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7246- u32 destval,imm;
7247+ u32 destval, imm;
7248
7249 DECODE_PRINTF("DWORD PTR ");
7250 destoffset = decode_rm01_address(rl);
7251@@ -5738,8 +6051,9 @@ static void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7252 destval = (*opc83_long_operation[rh]) (destval, imm);
7253 if (rh != 7)
7254 store_data_long(destoffset, destval);
7255- } else {
7256- u16 destval,imm;
7257+ }
7258+ else {
7259+ u16 destval, imm;
7260
7261 DECODE_PRINTF("WORD PTR ");
7262 destoffset = decode_rm01_address(rl);
7263@@ -5754,7 +6068,7 @@ static void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7264 break;
7265 case 2:
7266 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7267- u32 destval,imm;
7268+ u32 destval, imm;
7269
7270 DECODE_PRINTF("DWORD PTR ");
7271 destoffset = decode_rm10_address(rl);
7272@@ -5765,8 +6079,9 @@ static void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7273 destval = (*opc83_long_operation[rh]) (destval, imm);
7274 if (rh != 7)
7275 store_data_long(destoffset, destval);
7276- } else {
7277- u16 destval,imm;
7278+ }
7279+ else {
7280+ u16 destval, imm;
7281
7282 DECODE_PRINTF("WORD PTR ");
7283 destoffset = decode_rm10_address(rl);
7284@@ -5779,10 +6094,10 @@ static void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7285 store_data_word(destoffset, destval);
7286 }
7287 break;
7288- case 3: /* register to register */
7289+ case 3: /* register to register */
7290 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7291 u32 *destreg;
7292- u32 destval,imm;
7293+ u32 destval, imm;
7294
7295 destreg = DECODE_RM_LONG_REGISTER(rl);
7296 imm = (s8) fetch_byte_imm();
7297@@ -5791,9 +6106,10 @@ static void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7298 destval = (*opc83_long_operation[rh]) (*destreg, imm);
7299 if (rh != 7)
7300 *destreg = destval;
7301- } else {
7302+ }
7303+ else {
7304 u16 *destreg;
7305- u16 destval,imm;
7306+ u16 destval, imm;
7307
7308 destreg = DECODE_RM_WORD_REGISTER(rl);
7309 imm = (s8) fetch_byte_imm();
7310@@ -5813,7 +6129,8 @@ static void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
7311 REMARKS:
7312 Handles opcode 0x84
7313 ****************************************************************************/
7314-static void x86emuOp_test_byte_RM_R(u8 X86EMU_UNUSED(op1))
7315+static void
7316+x86emuOp_test_byte_RM_R(u8 X86EMU_UNUSED(op1))
7317 {
7318 int mod, rl, rh;
7319 u8 *destreg, *srcreg;
7320@@ -5851,7 +6168,7 @@ static void x86emuOp_test_byte_RM_R(u8 X86EMU_UNUSED(op1))
7321 TRACE_AND_STEP();
7322 test_byte(destval, *srcreg);
7323 break;
7324- case 3: /* register to register */
7325+ case 3: /* register to register */
7326 destreg = DECODE_RM_BYTE_REGISTER(rl);
7327 DECODE_PRINTF(",");
7328 srcreg = DECODE_RM_BYTE_REGISTER(rh);
7329@@ -5868,7 +6185,8 @@ static void x86emuOp_test_byte_RM_R(u8 X86EMU_UNUSED(op1))
7330 REMARKS:
7331 Handles opcode 0x85
7332 ****************************************************************************/
7333-static void x86emuOp_test_word_RM_R(u8 X86EMU_UNUSED(op1))
7334+static void
7335+x86emuOp_test_word_RM_R(u8 X86EMU_UNUSED(op1))
7336 {
7337 int mod, rl, rh;
7338 uint destoffset;
7339@@ -5889,7 +6207,8 @@ static void x86emuOp_test_word_RM_R(u8 X86EMU_UNUSED(op1))
7340 DECODE_PRINTF("\n");
7341 TRACE_AND_STEP();
7342 test_long(destval, *srcreg);
7343- } else {
7344+ }
7345+ else {
7346 u16 destval;
7347 u16 *srcreg;
7348
7349@@ -5914,7 +6233,8 @@ static void x86emuOp_test_word_RM_R(u8 X86EMU_UNUSED(op1))
7350 DECODE_PRINTF("\n");
7351 TRACE_AND_STEP();
7352 test_long(destval, *srcreg);
7353- } else {
7354+ }
7355+ else {
7356 u16 destval;
7357 u16 *srcreg;
7358
7359@@ -5939,7 +6259,8 @@ static void x86emuOp_test_word_RM_R(u8 X86EMU_UNUSED(op1))
7360 DECODE_PRINTF("\n");
7361 TRACE_AND_STEP();
7362 test_long(destval, *srcreg);
7363- } else {
7364+ }
7365+ else {
7366 u16 destval;
7367 u16 *srcreg;
7368
7369@@ -5952,9 +6273,9 @@ static void x86emuOp_test_word_RM_R(u8 X86EMU_UNUSED(op1))
7370 test_word(destval, *srcreg);
7371 }
7372 break;
7373- case 3: /* register to register */
7374+ case 3: /* register to register */
7375 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7376- u32 *destreg,*srcreg;
7377+ u32 *destreg, *srcreg;
7378
7379 destreg = DECODE_RM_LONG_REGISTER(rl);
7380 DECODE_PRINTF(",");
7381@@ -5962,8 +6283,9 @@ static void x86emuOp_test_word_RM_R(u8 X86EMU_UNUSED(op1))
7382 DECODE_PRINTF("\n");
7383 TRACE_AND_STEP();
7384 test_long(*destreg, *srcreg);
7385- } else {
7386- u16 *destreg,*srcreg;
7387+ }
7388+ else {
7389+ u16 *destreg, *srcreg;
7390
7391 destreg = DECODE_RM_WORD_REGISTER(rl);
7392 DECODE_PRINTF(",");
7393@@ -5982,7 +6304,8 @@ static void x86emuOp_test_word_RM_R(u8 X86EMU_UNUSED(op1))
7394 REMARKS:
7395 Handles opcode 0x86
7396 ****************************************************************************/
7397-static void x86emuOp_xchg_byte_RM_R(u8 X86EMU_UNUSED(op1))
7398+static void
7399+x86emuOp_xchg_byte_RM_R(u8 X86EMU_UNUSED(op1))
7400 {
7401 int mod, rl, rh;
7402 u8 *destreg, *srcreg;
7403@@ -6030,7 +6353,7 @@ static void x86emuOp_xchg_byte_RM_R(u8 X86EMU_UNUSED(op1))
7404 destval = tmp;
7405 store_data_byte(destoffset, destval);
7406 break;
7407- case 3: /* register to register */
7408+ case 3: /* register to register */
7409 destreg = DECODE_RM_BYTE_REGISTER(rl);
7410 DECODE_PRINTF(",");
7411 srcreg = DECODE_RM_BYTE_REGISTER(rh);
7412@@ -6049,7 +6372,8 @@ static void x86emuOp_xchg_byte_RM_R(u8 X86EMU_UNUSED(op1))
7413 REMARKS:
7414 Handles opcode 0x87
7415 ****************************************************************************/
7416-static void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
7417+static void
7418+x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
7419 {
7420 int mod, rl, rh;
7421 uint destoffset;
7422@@ -6061,7 +6385,7 @@ static void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
7423 case 0:
7424 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7425 u32 *srcreg;
7426- u32 destval,tmp;
7427+ u32 destval, tmp;
7428
7429 destoffset = decode_rm00_address(rl);
7430 DECODE_PRINTF(",");
7431@@ -6073,9 +6397,10 @@ static void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
7432 *srcreg = destval;
7433 destval = tmp;
7434 store_data_long(destoffset, destval);
7435- } else {
7436+ }
7437+ else {
7438 u16 *srcreg;
7439- u16 destval,tmp;
7440+ u16 destval, tmp;
7441
7442 destoffset = decode_rm00_address(rl);
7443 DECODE_PRINTF(",");
7444@@ -6092,7 +6417,7 @@ static void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
7445 case 1:
7446 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7447 u32 *srcreg;
7448- u32 destval,tmp;
7449+ u32 destval, tmp;
7450
7451 destoffset = decode_rm01_address(rl);
7452 DECODE_PRINTF(",");
7453@@ -6104,9 +6429,10 @@ static void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
7454 *srcreg = destval;
7455 destval = tmp;
7456 store_data_long(destoffset, destval);
7457- } else {
7458+ }
7459+ else {
7460 u16 *srcreg;
7461- u16 destval,tmp;
7462+ u16 destval, tmp;
7463
7464 destoffset = decode_rm01_address(rl);
7465 DECODE_PRINTF(",");
7466@@ -6123,7 +6449,7 @@ static void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
7467 case 2:
7468 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7469 u32 *srcreg;
7470- u32 destval,tmp;
7471+ u32 destval, tmp;
7472
7473 destoffset = decode_rm10_address(rl);
7474 DECODE_PRINTF(",");
7475@@ -6135,9 +6461,10 @@ static void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
7476 *srcreg = destval;
7477 destval = tmp;
7478 store_data_long(destoffset, destval);
7479- } else {
7480+ }
7481+ else {
7482 u16 *srcreg;
7483- u16 destval,tmp;
7484+ u16 destval, tmp;
7485
7486 destoffset = decode_rm10_address(rl);
7487 DECODE_PRINTF(",");
7488@@ -6151,9 +6478,9 @@ static void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
7489 store_data_word(destoffset, destval);
7490 }
7491 break;
7492- case 3: /* register to register */
7493+ case 3: /* register to register */
7494 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7495- u32 *destreg,*srcreg;
7496+ u32 *destreg, *srcreg;
7497 u32 tmp;
7498
7499 destreg = DECODE_RM_LONG_REGISTER(rl);
7500@@ -6164,8 +6491,9 @@ static void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
7501 tmp = *srcreg;
7502 *srcreg = *destreg;
7503 *destreg = tmp;
7504- } else {
7505- u16 *destreg,*srcreg;
7506+ }
7507+ else {
7508+ u16 *destreg, *srcreg;
7509 u16 tmp;
7510
7511 destreg = DECODE_RM_WORD_REGISTER(rl);
7512@@ -6187,7 +6515,8 @@ static void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
7513 REMARKS:
7514 Handles opcode 0x88
7515 ****************************************************************************/
7516-static void x86emuOp_mov_byte_RM_R(u8 X86EMU_UNUSED(op1))
7517+static void
7518+x86emuOp_mov_byte_RM_R(u8 X86EMU_UNUSED(op1))
7519 {
7520 int mod, rl, rh;
7521 u8 *destreg, *srcreg;
7522@@ -6221,7 +6550,7 @@ static void x86emuOp_mov_byte_RM_R(u8 X86EMU_UNUSED(op1))
7523 TRACE_AND_STEP();
7524 store_data_byte(destoffset, *srcreg);
7525 break;
7526- case 3: /* register to register */
7527+ case 3: /* register to register */
7528 destreg = DECODE_RM_BYTE_REGISTER(rl);
7529 DECODE_PRINTF(",");
7530 srcreg = DECODE_RM_BYTE_REGISTER(rh);
7531@@ -6238,7 +6567,8 @@ static void x86emuOp_mov_byte_RM_R(u8 X86EMU_UNUSED(op1))
7532 REMARKS:
7533 Handles opcode 0x89
7534 ****************************************************************************/
7535-static void x86emuOp_mov_word_RM_R(u8 X86EMU_UNUSED(op1))
7536+static void
7537+x86emuOp_mov_word_RM_R(u8 X86EMU_UNUSED(op1))
7538 {
7539 int mod, rl, rh;
7540 u32 destoffset;
7541@@ -6257,7 +6587,8 @@ static void x86emuOp_mov_word_RM_R(u8 X86EMU_UNUSED(op1))
7542 DECODE_PRINTF("\n");
7543 TRACE_AND_STEP();
7544 store_data_long(destoffset, *srcreg);
7545- } else {
7546+ }
7547+ else {
7548 u16 *srcreg;
7549
7550 destoffset = decode_rm00_address(rl);
7551@@ -6278,7 +6609,8 @@ static void x86emuOp_mov_word_RM_R(u8 X86EMU_UNUSED(op1))
7552 DECODE_PRINTF("\n");
7553 TRACE_AND_STEP();
7554 store_data_long(destoffset, *srcreg);
7555- } else {
7556+ }
7557+ else {
7558 u16 *srcreg;
7559
7560 destoffset = decode_rm01_address(rl);
7561@@ -6299,7 +6631,8 @@ static void x86emuOp_mov_word_RM_R(u8 X86EMU_UNUSED(op1))
7562 DECODE_PRINTF("\n");
7563 TRACE_AND_STEP();
7564 store_data_long(destoffset, *srcreg);
7565- } else {
7566+ }
7567+ else {
7568 u16 *srcreg;
7569
7570 destoffset = decode_rm10_address(rl);
7571@@ -6310,9 +6643,9 @@ static void x86emuOp_mov_word_RM_R(u8 X86EMU_UNUSED(op1))
7572 store_data_word(destoffset, *srcreg);
7573 }
7574 break;
7575- case 3: /* register to register */
7576+ case 3: /* register to register */
7577 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7578- u32 *destreg,*srcreg;
7579+ u32 *destreg, *srcreg;
7580
7581 destreg = DECODE_RM_LONG_REGISTER(rl);
7582 DECODE_PRINTF(",");
7583@@ -6320,8 +6653,9 @@ static void x86emuOp_mov_word_RM_R(u8 X86EMU_UNUSED(op1))
7584 DECODE_PRINTF("\n");
7585 TRACE_AND_STEP();
7586 *destreg = *srcreg;
7587- } else {
7588- u16 *destreg,*srcreg;
7589+ }
7590+ else {
7591+ u16 *destreg, *srcreg;
7592
7593 destreg = DECODE_RM_WORD_REGISTER(rl);
7594 DECODE_PRINTF(",");
7595@@ -6340,7 +6674,8 @@ static void x86emuOp_mov_word_RM_R(u8 X86EMU_UNUSED(op1))
7596 REMARKS:
7597 Handles opcode 0x8a
7598 ****************************************************************************/
7599-static void x86emuOp_mov_byte_R_RM(u8 X86EMU_UNUSED(op1))
7600+static void
7601+x86emuOp_mov_byte_R_RM(u8 X86EMU_UNUSED(op1))
7602 {
7603 int mod, rl, rh;
7604 u8 *destreg, *srcreg;
7605@@ -6378,7 +6713,7 @@ static void x86emuOp_mov_byte_R_RM(u8 X86EMU_UNUSED(op1))
7606 TRACE_AND_STEP();
7607 *destreg = srcval;
7608 break;
7609- case 3: /* register to register */
7610+ case 3: /* register to register */
7611 destreg = DECODE_RM_BYTE_REGISTER(rh);
7612 DECODE_PRINTF(",");
7613 srcreg = DECODE_RM_BYTE_REGISTER(rl);
7614@@ -6395,7 +6730,8 @@ static void x86emuOp_mov_byte_R_RM(u8 X86EMU_UNUSED(op1))
7615 REMARKS:
7616 Handles opcode 0x8b
7617 ****************************************************************************/
7618-static void x86emuOp_mov_word_R_RM(u8 X86EMU_UNUSED(op1))
7619+static void
7620+x86emuOp_mov_word_R_RM(u8 X86EMU_UNUSED(op1))
7621 {
7622 int mod, rl, rh;
7623 uint srcoffset;
7624@@ -6416,7 +6752,8 @@ static void x86emuOp_mov_word_R_RM(u8 X86EMU_UNUSED(op1))
7625 DECODE_PRINTF("\n");
7626 TRACE_AND_STEP();
7627 *destreg = srcval;
7628- } else {
7629+ }
7630+ else {
7631 u16 *destreg;
7632 u16 srcval;
7633
7634@@ -6441,7 +6778,8 @@ static void x86emuOp_mov_word_R_RM(u8 X86EMU_UNUSED(op1))
7635 DECODE_PRINTF("\n");
7636 TRACE_AND_STEP();
7637 *destreg = srcval;
7638- } else {
7639+ }
7640+ else {
7641 u16 *destreg;
7642 u16 srcval;
7643
7644@@ -6466,7 +6804,8 @@ static void x86emuOp_mov_word_R_RM(u8 X86EMU_UNUSED(op1))
7645 DECODE_PRINTF("\n");
7646 TRACE_AND_STEP();
7647 *destreg = srcval;
7648- } else {
7649+ }
7650+ else {
7651 u16 *destreg;
7652 u16 srcval;
7653
7654@@ -6479,7 +6818,7 @@ static void x86emuOp_mov_word_R_RM(u8 X86EMU_UNUSED(op1))
7655 *destreg = srcval;
7656 }
7657 break;
7658- case 3: /* register to register */
7659+ case 3: /* register to register */
7660 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7661 u32 *destreg, *srcreg;
7662
7663@@ -6489,7 +6828,8 @@ static void x86emuOp_mov_word_R_RM(u8 X86EMU_UNUSED(op1))
7664 DECODE_PRINTF("\n");
7665 TRACE_AND_STEP();
7666 *destreg = *srcreg;
7667- } else {
7668+ }
7669+ else {
7670 u16 *destreg, *srcreg;
7671
7672 destreg = DECODE_RM_WORD_REGISTER(rh);
7673@@ -6509,7 +6849,8 @@ static void x86emuOp_mov_word_R_RM(u8 X86EMU_UNUSED(op1))
7674 REMARKS:
7675 Handles opcode 0x8c
7676 ****************************************************************************/
7677-static void x86emuOp_mov_word_RM_SR(u8 X86EMU_UNUSED(op1))
7678+static void
7679+x86emuOp_mov_word_RM_SR(u8 X86EMU_UNUSED(op1))
7680 {
7681 int mod, rl, rh;
7682 u16 *destreg, *srcreg;
7683@@ -6547,7 +6888,7 @@ static void x86emuOp_mov_word_RM_SR(u8 X86EMU_UNUSED(op1))
7684 destval = *srcreg;
7685 store_data_word(destoffset, destval);
7686 break;
7687- case 3: /* register to register */
7688+ case 3: /* register to register */
7689 destreg = DECODE_RM_WORD_REGISTER(rl);
7690 DECODE_PRINTF(",");
7691 srcreg = decode_rm_seg_register(rh);
7692@@ -6564,47 +6905,77 @@ static void x86emuOp_mov_word_RM_SR(u8 X86EMU_UNUSED(op1))
7693 REMARKS:
7694 Handles opcode 0x8d
7695 ****************************************************************************/
7696-static void x86emuOp_lea_word_R_M(u8 X86EMU_UNUSED(op1))
7697+static void
7698+x86emuOp_lea_word_R_M(u8 X86EMU_UNUSED(op1))
7699 {
7700 int mod, rl, rh;
7701- u16 *srcreg;
7702 uint destoffset;
7703
7704-/*
7705- * TODO: Need to handle address size prefix!
7706- *
7707- * lea eax,[eax+ebx*2] ??
7708- */
7709-
7710 START_OF_INSTR();
7711 DECODE_PRINTF("LEA\t");
7712 FETCH_DECODE_MODRM(mod, rh, rl);
7713 switch (mod) {
7714 case 0:
7715- srcreg = DECODE_RM_WORD_REGISTER(rh);
7716- DECODE_PRINTF(",");
7717- destoffset = decode_rm00_address(rl);
7718- DECODE_PRINTF("\n");
7719- TRACE_AND_STEP();
7720- *srcreg = (u16)destoffset;
7721+ if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
7722+ u32 *srcreg = DECODE_RM_LONG_REGISTER(rh);
7723+
7724+ DECODE_PRINTF(",");
7725+ destoffset = decode_rm00_address(rl);
7726+ DECODE_PRINTF("\n");
7727+ TRACE_AND_STEP();
7728+ *srcreg = (u32) destoffset;
7729+ }
7730+ else {
7731+ u16 *srcreg = DECODE_RM_WORD_REGISTER(rh);
7732+
7733+ DECODE_PRINTF(",");
7734+ destoffset = decode_rm00_address(rl);
7735+ DECODE_PRINTF("\n");
7736+ TRACE_AND_STEP();
7737+ *srcreg = (u16) destoffset;
7738+ }
7739 break;
7740 case 1:
7741- srcreg = DECODE_RM_WORD_REGISTER(rh);
7742- DECODE_PRINTF(",");
7743- destoffset = decode_rm01_address(rl);
7744- DECODE_PRINTF("\n");
7745- TRACE_AND_STEP();
7746- *srcreg = (u16)destoffset;
7747+ if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
7748+ u32 *srcreg = DECODE_RM_LONG_REGISTER(rh);
7749+
7750+ DECODE_PRINTF(",");
7751+ destoffset = decode_rm01_address(rl);
7752+ DECODE_PRINTF("\n");
7753+ TRACE_AND_STEP();
7754+ *srcreg = (u32) destoffset;
7755+ }
7756+ else {
7757+ u16 *srcreg = DECODE_RM_WORD_REGISTER(rh);
7758+
7759+ DECODE_PRINTF(",");
7760+ destoffset = decode_rm01_address(rl);
7761+ DECODE_PRINTF("\n");
7762+ TRACE_AND_STEP();
7763+ *srcreg = (u16) destoffset;
7764+ }
7765 break;
7766 case 2:
7767- srcreg = DECODE_RM_WORD_REGISTER(rh);
7768- DECODE_PRINTF(",");
7769- destoffset = decode_rm10_address(rl);
7770- DECODE_PRINTF("\n");
7771- TRACE_AND_STEP();
7772- *srcreg = (u16)destoffset;
7773+ if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
7774+ u32 *srcreg = DECODE_RM_LONG_REGISTER(rh);
7775+
7776+ DECODE_PRINTF(",");
7777+ destoffset = decode_rm10_address(rl);
7778+ DECODE_PRINTF("\n");
7779+ TRACE_AND_STEP();
7780+ *srcreg = (u32) destoffset;
7781+ }
7782+ else {
7783+ u16 *srcreg = DECODE_RM_WORD_REGISTER(rh);
7784+
7785+ DECODE_PRINTF(",");
7786+ destoffset = decode_rm10_address(rl);
7787+ DECODE_PRINTF("\n");
7788+ TRACE_AND_STEP();
7789+ *srcreg = (u16) destoffset;
7790+ }
7791 break;
7792- case 3: /* register to register */
7793+ case 3: /* register to register */
7794 /* undefined. Do nothing. */
7795 break;
7796 }
7797@@ -6616,7 +6987,8 @@ static void x86emuOp_lea_word_R_M(u8 X86EMU_UNUSED(op1))
7798 REMARKS:
7799 Handles opcode 0x8e
7800 ****************************************************************************/
7801-static void x86emuOp_mov_word_SR_RM(u8 X86EMU_UNUSED(op1))
7802+static void
7803+x86emuOp_mov_word_SR_RM(u8 X86EMU_UNUSED(op1))
7804 {
7805 int mod, rl, rh;
7806 u16 *destreg, *srcreg;
7807@@ -6654,7 +7026,7 @@ static void x86emuOp_mov_word_SR_RM(u8 X86EMU_UNUSED(op1))
7808 TRACE_AND_STEP();
7809 *destreg = srcval;
7810 break;
7811- case 3: /* register to register */
7812+ case 3: /* register to register */
7813 destreg = decode_rm_seg_register(rh);
7814 DECODE_PRINTF(",");
7815 srcreg = DECODE_RM_WORD_REGISTER(rl);
7816@@ -6677,7 +7049,8 @@ static void x86emuOp_mov_word_SR_RM(u8 X86EMU_UNUSED(op1))
7817 REMARKS:
7818 Handles opcode 0x8f
7819 ****************************************************************************/
7820-static void x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))
7821+static void
7822+x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))
7823 {
7824 int mod, rl, rh;
7825 uint destoffset;
7826@@ -6699,7 +7072,8 @@ static void x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))
7827 TRACE_AND_STEP();
7828 destval = pop_long();
7829 store_data_long(destoffset, destval);
7830- } else {
7831+ }
7832+ else {
7833 u16 destval;
7834
7835 destoffset = decode_rm00_address(rl);
7836@@ -6718,7 +7092,8 @@ static void x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))
7837 TRACE_AND_STEP();
7838 destval = pop_long();
7839 store_data_long(destoffset, destval);
7840- } else {
7841+ }
7842+ else {
7843 u16 destval;
7844
7845 destoffset = decode_rm01_address(rl);
7846@@ -6737,7 +7112,8 @@ static void x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))
7847 TRACE_AND_STEP();
7848 destval = pop_long();
7849 store_data_long(destoffset, destval);
7850- } else {
7851+ }
7852+ else {
7853 u16 destval;
7854
7855 destoffset = decode_rm10_address(rl);
7856@@ -6747,7 +7123,7 @@ static void x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))
7857 store_data_word(destoffset, destval);
7858 }
7859 break;
7860- case 3: /* register to register */
7861+ case 3: /* register to register */
7862 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7863 u32 *destreg;
7864
7865@@ -6755,7 +7131,8 @@ static void x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))
7866 DECODE_PRINTF("\n");
7867 TRACE_AND_STEP();
7868 *destreg = pop_long();
7869- } else {
7870+ }
7871+ else {
7872 u16 *destreg;
7873
7874 destreg = DECODE_RM_WORD_REGISTER(rl);
7875@@ -6773,7 +7150,8 @@ static void x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))
7876 REMARKS:
7877 Handles opcode 0x90
7878 ****************************************************************************/
7879-static void x86emuOp_nop(u8 X86EMU_UNUSED(op1))
7880+static void
7881+x86emuOp_nop(u8 X86EMU_UNUSED(op1))
7882 {
7883 START_OF_INSTR();
7884 DECODE_PRINTF("NOP\n");
7885@@ -6786,14 +7164,16 @@ static void x86emuOp_nop(u8 X86EMU_UNUSED(op1))
7886 REMARKS:
7887 Handles opcode 0x91
7888 ****************************************************************************/
7889-static void x86emuOp_xchg_word_AX_CX(u8 X86EMU_UNUSED(op1))
7890+static void
7891+x86emuOp_xchg_word_AX_CX(u8 X86EMU_UNUSED(op1))
7892 {
7893 u32 tmp;
7894
7895 START_OF_INSTR();
7896 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7897 DECODE_PRINTF("XCHG\tEAX,ECX\n");
7898- } else {
7899+ }
7900+ else {
7901 DECODE_PRINTF("XCHG\tAX,CX\n");
7902 }
7903 TRACE_AND_STEP();
7904@@ -6801,10 +7181,11 @@ static void x86emuOp_xchg_word_AX_CX(u8 X86EMU_UNUSED(op1))
7905 tmp = M.x86.R_EAX;
7906 M.x86.R_EAX = M.x86.R_ECX;
7907 M.x86.R_ECX = tmp;
7908- } else {
7909+ }
7910+ else {
7911 tmp = M.x86.R_AX;
7912 M.x86.R_AX = M.x86.R_CX;
7913- M.x86.R_CX = (u16)tmp;
7914+ M.x86.R_CX = (u16) tmp;
7915 }
7916 DECODE_CLEAR_SEGOVR();
7917 END_OF_INSTR();
7918@@ -6814,14 +7195,16 @@ static void x86emuOp_xchg_word_AX_CX(u8 X86EMU_UNUSED(op1))
7919 REMARKS:
7920 Handles opcode 0x92
7921 ****************************************************************************/
7922-static void x86emuOp_xchg_word_AX_DX(u8 X86EMU_UNUSED(op1))
7923+static void
7924+x86emuOp_xchg_word_AX_DX(u8 X86EMU_UNUSED(op1))
7925 {
7926 u32 tmp;
7927
7928 START_OF_INSTR();
7929 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7930 DECODE_PRINTF("XCHG\tEAX,EDX\n");
7931- } else {
7932+ }
7933+ else {
7934 DECODE_PRINTF("XCHG\tAX,DX\n");
7935 }
7936 TRACE_AND_STEP();
7937@@ -6829,10 +7212,11 @@ static void x86emuOp_xchg_word_AX_DX(u8 X86EMU_UNUSED(op1))
7938 tmp = M.x86.R_EAX;
7939 M.x86.R_EAX = M.x86.R_EDX;
7940 M.x86.R_EDX = tmp;
7941- } else {
7942+ }
7943+ else {
7944 tmp = M.x86.R_AX;
7945 M.x86.R_AX = M.x86.R_DX;
7946- M.x86.R_DX = (u16)tmp;
7947+ M.x86.R_DX = (u16) tmp;
7948 }
7949 DECODE_CLEAR_SEGOVR();
7950 END_OF_INSTR();
7951@@ -6842,14 +7226,16 @@ static void x86emuOp_xchg_word_AX_DX(u8 X86EMU_UNUSED(op1))
7952 REMARKS:
7953 Handles opcode 0x93
7954 ****************************************************************************/
7955-static void x86emuOp_xchg_word_AX_BX(u8 X86EMU_UNUSED(op1))
7956+static void
7957+x86emuOp_xchg_word_AX_BX(u8 X86EMU_UNUSED(op1))
7958 {
7959 u32 tmp;
7960
7961 START_OF_INSTR();
7962 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7963 DECODE_PRINTF("XCHG\tEAX,EBX\n");
7964- } else {
7965+ }
7966+ else {
7967 DECODE_PRINTF("XCHG\tAX,BX\n");
7968 }
7969 TRACE_AND_STEP();
7970@@ -6857,10 +7243,11 @@ static void x86emuOp_xchg_word_AX_BX(u8 X86EMU_UNUSED(op1))
7971 tmp = M.x86.R_EAX;
7972 M.x86.R_EAX = M.x86.R_EBX;
7973 M.x86.R_EBX = tmp;
7974- } else {
7975+ }
7976+ else {
7977 tmp = M.x86.R_AX;
7978 M.x86.R_AX = M.x86.R_BX;
7979- M.x86.R_BX = (u16)tmp;
7980+ M.x86.R_BX = (u16) tmp;
7981 }
7982 DECODE_CLEAR_SEGOVR();
7983 END_OF_INSTR();
7984@@ -6870,14 +7257,16 @@ static void x86emuOp_xchg_word_AX_BX(u8 X86EMU_UNUSED(op1))
7985 REMARKS:
7986 Handles opcode 0x94
7987 ****************************************************************************/
7988-static void x86emuOp_xchg_word_AX_SP(u8 X86EMU_UNUSED(op1))
7989+static void
7990+x86emuOp_xchg_word_AX_SP(u8 X86EMU_UNUSED(op1))
7991 {
7992 u32 tmp;
7993
7994 START_OF_INSTR();
7995 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
7996 DECODE_PRINTF("XCHG\tEAX,ESP\n");
7997- } else {
7998+ }
7999+ else {
8000 DECODE_PRINTF("XCHG\tAX,SP\n");
8001 }
8002 TRACE_AND_STEP();
8003@@ -6885,10 +7274,11 @@ static void x86emuOp_xchg_word_AX_SP(u8 X86EMU_UNUSED(op1))
8004 tmp = M.x86.R_EAX;
8005 M.x86.R_EAX = M.x86.R_ESP;
8006 M.x86.R_ESP = tmp;
8007- } else {
8008+ }
8009+ else {
8010 tmp = M.x86.R_AX;
8011 M.x86.R_AX = M.x86.R_SP;
8012- M.x86.R_SP = (u16)tmp;
8013+ M.x86.R_SP = (u16) tmp;
8014 }
8015 DECODE_CLEAR_SEGOVR();
8016 END_OF_INSTR();
8017@@ -6898,14 +7288,16 @@ static void x86emuOp_xchg_word_AX_SP(u8 X86EMU_UNUSED(op1))
8018 REMARKS:
8019 Handles opcode 0x95
8020 ****************************************************************************/
8021-static void x86emuOp_xchg_word_AX_BP(u8 X86EMU_UNUSED(op1))
8022+static void
8023+x86emuOp_xchg_word_AX_BP(u8 X86EMU_UNUSED(op1))
8024 {
8025 u32 tmp;
8026
8027 START_OF_INSTR();
8028 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8029 DECODE_PRINTF("XCHG\tEAX,EBP\n");
8030- } else {
8031+ }
8032+ else {
8033 DECODE_PRINTF("XCHG\tAX,BP\n");
8034 }
8035 TRACE_AND_STEP();
8036@@ -6913,10 +7305,11 @@ static void x86emuOp_xchg_word_AX_BP(u8 X86EMU_UNUSED(op1))
8037 tmp = M.x86.R_EAX;
8038 M.x86.R_EAX = M.x86.R_EBP;
8039 M.x86.R_EBP = tmp;
8040- } else {
8041+ }
8042+ else {
8043 tmp = M.x86.R_AX;
8044 M.x86.R_AX = M.x86.R_BP;
8045- M.x86.R_BP = (u16)tmp;
8046+ M.x86.R_BP = (u16) tmp;
8047 }
8048 DECODE_CLEAR_SEGOVR();
8049 END_OF_INSTR();
8050@@ -6926,14 +7319,16 @@ static void x86emuOp_xchg_word_AX_BP(u8 X86EMU_UNUSED(op1))
8051 REMARKS:
8052 Handles opcode 0x96
8053 ****************************************************************************/
8054-static void x86emuOp_xchg_word_AX_SI(u8 X86EMU_UNUSED(op1))
8055+static void
8056+x86emuOp_xchg_word_AX_SI(u8 X86EMU_UNUSED(op1))
8057 {
8058 u32 tmp;
8059
8060 START_OF_INSTR();
8061 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8062 DECODE_PRINTF("XCHG\tEAX,ESI\n");
8063- } else {
8064+ }
8065+ else {
8066 DECODE_PRINTF("XCHG\tAX,SI\n");
8067 }
8068 TRACE_AND_STEP();
8069@@ -6941,10 +7336,11 @@ static void x86emuOp_xchg_word_AX_SI(u8 X86EMU_UNUSED(op1))
8070 tmp = M.x86.R_EAX;
8071 M.x86.R_EAX = M.x86.R_ESI;
8072 M.x86.R_ESI = tmp;
8073- } else {
8074+ }
8075+ else {
8076 tmp = M.x86.R_AX;
8077 M.x86.R_AX = M.x86.R_SI;
8078- M.x86.R_SI = (u16)tmp;
8079+ M.x86.R_SI = (u16) tmp;
8080 }
8081 DECODE_CLEAR_SEGOVR();
8082 END_OF_INSTR();
8083@@ -6954,14 +7350,16 @@ static void x86emuOp_xchg_word_AX_SI(u8 X86EMU_UNUSED(op1))
8084 REMARKS:
8085 Handles opcode 0x97
8086 ****************************************************************************/
8087-static void x86emuOp_xchg_word_AX_DI(u8 X86EMU_UNUSED(op1))
8088+static void
8089+x86emuOp_xchg_word_AX_DI(u8 X86EMU_UNUSED(op1))
8090 {
8091 u32 tmp;
8092
8093 START_OF_INSTR();
8094 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8095 DECODE_PRINTF("XCHG\tEAX,EDI\n");
8096- } else {
8097+ }
8098+ else {
8099 DECODE_PRINTF("XCHG\tAX,DI\n");
8100 }
8101 TRACE_AND_STEP();
8102@@ -6969,10 +7367,11 @@ static void x86emuOp_xchg_word_AX_DI(u8 X86EMU_UNUSED(op1))
8103 tmp = M.x86.R_EAX;
8104 M.x86.R_EAX = M.x86.R_EDI;
8105 M.x86.R_EDI = tmp;
8106- } else {
8107+ }
8108+ else {
8109 tmp = M.x86.R_AX;
8110 M.x86.R_AX = M.x86.R_DI;
8111- M.x86.R_DI = (u16)tmp;
8112+ M.x86.R_DI = (u16) tmp;
8113 }
8114 DECODE_CLEAR_SEGOVR();
8115 END_OF_INSTR();
8116@@ -6982,25 +7381,30 @@ static void x86emuOp_xchg_word_AX_DI(u8 X86EMU_UNUSED(op1))
8117 REMARKS:
8118 Handles opcode 0x98
8119 ****************************************************************************/
8120-static void x86emuOp_cbw(u8 X86EMU_UNUSED(op1))
8121+static void
8122+x86emuOp_cbw(u8 X86EMU_UNUSED(op1))
8123 {
8124 START_OF_INSTR();
8125 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8126 DECODE_PRINTF("CWDE\n");
8127- } else {
8128+ }
8129+ else {
8130 DECODE_PRINTF("CBW\n");
8131 }
8132 TRACE_AND_STEP();
8133 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8134 if (M.x86.R_AX & 0x8000) {
8135 M.x86.R_EAX |= 0xffff0000;
8136- } else {
8137+ }
8138+ else {
8139 M.x86.R_EAX &= 0x0000ffff;
8140 }
8141- } else {
8142+ }
8143+ else {
8144 if (M.x86.R_AL & 0x80) {
8145 M.x86.R_AH = 0xff;
8146- } else {
8147+ }
8148+ else {
8149 M.x86.R_AH = 0x0;
8150 }
8151 }
8152@@ -7012,12 +7416,14 @@ static void x86emuOp_cbw(u8 X86EMU_UNUSED(op1))
8153 REMARKS:
8154 Handles opcode 0x99
8155 ****************************************************************************/
8156-static void x86emuOp_cwd(u8 X86EMU_UNUSED(op1))
8157+static void
8158+x86emuOp_cwd(u8 X86EMU_UNUSED(op1))
8159 {
8160 START_OF_INSTR();
8161 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8162 DECODE_PRINTF("CDQ\n");
8163- } else {
8164+ }
8165+ else {
8166 DECODE_PRINTF("CWD\n");
8167 }
8168 DECODE_PRINTF("CWD\n");
8169@@ -7025,13 +7431,16 @@ static void x86emuOp_cwd(u8 X86EMU_UNUSED(op1))
8170 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8171 if (M.x86.R_EAX & 0x80000000) {
8172 M.x86.R_EDX = 0xffffffff;
8173- } else {
8174+ }
8175+ else {
8176 M.x86.R_EDX = 0x0;
8177 }
8178- } else {
8179+ }
8180+ else {
8181 if (M.x86.R_AX & 0x8000) {
8182 M.x86.R_DX = 0xffff;
8183- } else {
8184+ }
8185+ else {
8186 M.x86.R_DX = 0x0;
8187 }
8188 }
8189@@ -7043,17 +7452,24 @@ static void x86emuOp_cwd(u8 X86EMU_UNUSED(op1))
8190 REMARKS:
8191 Handles opcode 0x9a
8192 ****************************************************************************/
8193-static void x86emuOp_call_far_IMM(u8 X86EMU_UNUSED(op1))
8194+static void
8195+x86emuOp_call_far_IMM(u8 X86EMU_UNUSED(op1))
8196 {
8197- u16 farseg, faroff;
8198+ u32 farseg, faroff;
8199
8200 START_OF_INSTR();
8201- DECODE_PRINTF("CALL\t");
8202- faroff = fetch_word_imm();
8203- farseg = fetch_word_imm();
8204- DECODE_PRINTF2("%04x:", farseg);
8205- DECODE_PRINTF2("%04x\n", faroff);
8206- CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, farseg, faroff, "FAR ");
8207+ DECODE_PRINTF("CALL\t");
8208+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8209+ faroff = fetch_long_imm();
8210+ farseg = fetch_word_imm();
8211+ }
8212+ else {
8213+ faroff = fetch_word_imm();
8214+ farseg = fetch_word_imm();
8215+ }
8216+ DECODE_PRINTF2("%04x:", farseg);
8217+ DECODE_PRINTF2("%04x\n", faroff);
8218+ CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, farseg, faroff, "FAR ");
8219
8220 /* XXX
8221 *
8222@@ -7064,8 +7480,13 @@ static void x86emuOp_call_far_IMM(u8 X86EMU_UNUSED(op1))
8223 TRACE_AND_STEP();
8224 push_word(M.x86.R_CS);
8225 M.x86.R_CS = farseg;
8226- push_word(M.x86.R_IP);
8227- M.x86.R_IP = faroff;
8228+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8229+ push_long(M.x86.R_EIP);
8230+ }
8231+ else {
8232+ push_word(M.x86.R_IP);
8233+ }
8234+ M.x86.R_EIP = faroff & 0xffff;
8235 DECODE_CLEAR_SEGOVR();
8236 END_OF_INSTR();
8237 }
8238@@ -7074,7 +7495,8 @@ static void x86emuOp_call_far_IMM(u8 X86EMU_UNUSED(op1))
8239 REMARKS:
8240 Handles opcode 0x9b
8241 ****************************************************************************/
8242-static void x86emuOp_wait(u8 X86EMU_UNUSED(op1))
8243+static void
8244+x86emuOp_wait(u8 X86EMU_UNUSED(op1))
8245 {
8246 START_OF_INSTR();
8247 DECODE_PRINTF("WAIT");
8248@@ -7088,14 +7510,16 @@ static void x86emuOp_wait(u8 X86EMU_UNUSED(op1))
8249 REMARKS:
8250 Handles opcode 0x9c
8251 ****************************************************************************/
8252-static void x86emuOp_pushf_word(u8 X86EMU_UNUSED(op1))
8253+static void
8254+x86emuOp_pushf_word(u8 X86EMU_UNUSED(op1))
8255 {
8256 u32 flags;
8257
8258 START_OF_INSTR();
8259 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8260 DECODE_PRINTF("PUSHFD\n");
8261- } else {
8262+ }
8263+ else {
8264 DECODE_PRINTF("PUSHF\n");
8265 }
8266 TRACE_AND_STEP();
8267@@ -7104,8 +7528,9 @@ static void x86emuOp_pushf_word(u8 X86EMU_UNUSED(op1))
8268 flags = (M.x86.R_EFLG & F_MSK) | F_ALWAYS_ON;
8269 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8270 push_long(flags);
8271- } else {
8272- push_word((u16)flags);
8273+ }
8274+ else {
8275+ push_word((u16) flags);
8276 }
8277 DECODE_CLEAR_SEGOVR();
8278 END_OF_INSTR();
8279@@ -7115,18 +7540,21 @@ static void x86emuOp_pushf_word(u8 X86EMU_UNUSED(op1))
8280 REMARKS:
8281 Handles opcode 0x9d
8282 ****************************************************************************/
8283-static void x86emuOp_popf_word(u8 X86EMU_UNUSED(op1))
8284+static void
8285+x86emuOp_popf_word(u8 X86EMU_UNUSED(op1))
8286 {
8287 START_OF_INSTR();
8288 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8289 DECODE_PRINTF("POPFD\n");
8290- } else {
8291+ }
8292+ else {
8293 DECODE_PRINTF("POPF\n");
8294 }
8295 TRACE_AND_STEP();
8296 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8297 M.x86.R_EFLG = pop_long();
8298- } else {
8299+ }
8300+ else {
8301 M.x86.R_FLG = pop_word();
8302 }
8303 DECODE_CLEAR_SEGOVR();
8304@@ -7137,7 +7565,8 @@ static void x86emuOp_popf_word(u8 X86EMU_UNUSED(op1))
8305 REMARKS:
8306 Handles opcode 0x9e
8307 ****************************************************************************/
8308-static void x86emuOp_sahf(u8 X86EMU_UNUSED(op1))
8309+static void
8310+x86emuOp_sahf(u8 X86EMU_UNUSED(op1))
8311 {
8312 START_OF_INSTR();
8313 DECODE_PRINTF("SAHF\n");
8314@@ -7154,12 +7583,13 @@ static void x86emuOp_sahf(u8 X86EMU_UNUSED(op1))
8315 REMARKS:
8316 Handles opcode 0x9f
8317 ****************************************************************************/
8318-static void x86emuOp_lahf(u8 X86EMU_UNUSED(op1))
8319+static void
8320+x86emuOp_lahf(u8 X86EMU_UNUSED(op1))
8321 {
8322 START_OF_INSTR();
8323 DECODE_PRINTF("LAHF\n");
8324 TRACE_AND_STEP();
8325- M.x86.R_AH = (u8)(M.x86.R_FLG & 0xff);
8326+ M.x86.R_AH = (u8) (M.x86.R_FLG & 0xff);
8327 /*undocumented TC++ behavior??? Nope. It's documented, but
8328 you have too look real hard to notice it. */
8329 M.x86.R_AH |= 0x2;
8330@@ -7171,7 +7601,8 @@ static void x86emuOp_lahf(u8 X86EMU_UNUSED(op1))
8331 REMARKS:
8332 Handles opcode 0xa0
8333 ****************************************************************************/
8334-static void x86emuOp_mov_AL_M_IMM(u8 X86EMU_UNUSED(op1))
8335+static void
8336+x86emuOp_mov_AL_M_IMM(u8 X86EMU_UNUSED(op1))
8337 {
8338 u16 offset;
8339
8340@@ -7189,7 +7620,8 @@ static void x86emuOp_mov_AL_M_IMM(u8 X86EMU_UNUSED(op1))
8341 REMARKS:
8342 Handles opcode 0xa1
8343 ****************************************************************************/
8344-static void x86emuOp_mov_AX_M_IMM(u8 X86EMU_UNUSED(op1))
8345+static void
8346+x86emuOp_mov_AX_M_IMM(u8 X86EMU_UNUSED(op1))
8347 {
8348 u16 offset;
8349
8350@@ -7197,13 +7629,15 @@ static void x86emuOp_mov_AX_M_IMM(u8 X86EMU_UNUSED(op1))
8351 offset = fetch_word_imm();
8352 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8353 DECODE_PRINTF2("MOV\tEAX,[%04x]\n", offset);
8354- } else {
8355+ }
8356+ else {
8357 DECODE_PRINTF2("MOV\tAX,[%04x]\n", offset);
8358 }
8359 TRACE_AND_STEP();
8360 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8361 M.x86.R_EAX = fetch_data_long(offset);
8362- } else {
8363+ }
8364+ else {
8365 M.x86.R_AX = fetch_data_word(offset);
8366 }
8367 DECODE_CLEAR_SEGOVR();
8368@@ -7214,7 +7648,8 @@ static void x86emuOp_mov_AX_M_IMM(u8 X86EMU_UNUSED(op1))
8369 REMARKS:
8370 Handles opcode 0xa2
8371 ****************************************************************************/
8372-static void x86emuOp_mov_M_AL_IMM(u8 X86EMU_UNUSED(op1))
8373+static void
8374+x86emuOp_mov_M_AL_IMM(u8 X86EMU_UNUSED(op1))
8375 {
8376 u16 offset;
8377
8378@@ -7232,7 +7667,8 @@ static void x86emuOp_mov_M_AL_IMM(u8 X86EMU_UNUSED(op1))
8379 REMARKS:
8380 Handles opcode 0xa3
8381 ****************************************************************************/
8382-static void x86emuOp_mov_M_AX_IMM(u8 X86EMU_UNUSED(op1))
8383+static void
8384+x86emuOp_mov_M_AX_IMM(u8 X86EMU_UNUSED(op1))
8385 {
8386 u16 offset;
8387
8388@@ -7240,13 +7676,15 @@ static void x86emuOp_mov_M_AX_IMM(u8 X86EMU_UNUSED(op1))
8389 offset = fetch_word_imm();
8390 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8391 DECODE_PRINTF2("MOV\t[%04x],EAX\n", offset);
8392- } else {
8393+ }
8394+ else {
8395 DECODE_PRINTF2("MOV\t[%04x],AX\n", offset);
8396 }
8397 TRACE_AND_STEP();
8398 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8399 store_data_long(offset, M.x86.R_EAX);
8400- } else {
8401+ }
8402+ else {
8403 store_data_word(offset, M.x86.R_AX);
8404 }
8405 DECODE_CLEAR_SEGOVR();
8406@@ -7257,15 +7695,16 @@ static void x86emuOp_mov_M_AX_IMM(u8 X86EMU_UNUSED(op1))
8407 REMARKS:
8408 Handles opcode 0xa4
8409 ****************************************************************************/
8410-static void x86emuOp_movs_byte(u8 X86EMU_UNUSED(op1))
8411+static void
8412+x86emuOp_movs_byte(u8 X86EMU_UNUSED(op1))
8413 {
8414- u8 val;
8415+ u8 val;
8416 u32 count;
8417 int inc;
8418
8419 START_OF_INSTR();
8420 DECODE_PRINTF("MOVS\tBYTE\n");
8421- if (ACCESS_FLAG(F_DF)) /* down */
8422+ if (ACCESS_FLAG(F_DF)) /* down */
8423 inc = -1;
8424 else
8425 inc = 1;
8426@@ -7292,7 +7731,8 @@ static void x86emuOp_movs_byte(u8 X86EMU_UNUSED(op1))
8427 REMARKS:
8428 Handles opcode 0xa5
8429 ****************************************************************************/
8430-static void x86emuOp_movs_word(u8 X86EMU_UNUSED(op1))
8431+static void
8432+x86emuOp_movs_word(u8 X86EMU_UNUSED(op1))
8433 {
8434 u32 val;
8435 int inc;
8436@@ -7301,13 +7741,14 @@ static void x86emuOp_movs_word(u8 X86EMU_UNUSED(op1))
8437 START_OF_INSTR();
8438 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8439 DECODE_PRINTF("MOVS\tDWORD\n");
8440- if (ACCESS_FLAG(F_DF)) /* down */
8441+ if (ACCESS_FLAG(F_DF)) /* down */
8442 inc = -4;
8443 else
8444 inc = 4;
8445- } else {
8446+ }
8447+ else {
8448 DECODE_PRINTF("MOVS\tWORD\n");
8449- if (ACCESS_FLAG(F_DF)) /* down */
8450+ if (ACCESS_FLAG(F_DF)) /* down */
8451 inc = -2;
8452 else
8453 inc = 2;
8454@@ -7325,9 +7766,10 @@ static void x86emuOp_movs_word(u8 X86EMU_UNUSED(op1))
8455 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8456 val = fetch_data_long(M.x86.R_SI);
8457 store_data_long_abs(M.x86.R_ES, M.x86.R_DI, val);
8458- } else {
8459+ }
8460+ else {
8461 val = fetch_data_word(M.x86.R_SI);
8462- store_data_word_abs(M.x86.R_ES, M.x86.R_DI, (u16)val);
8463+ store_data_word_abs(M.x86.R_ES, M.x86.R_DI, (u16) val);
8464 }
8465 M.x86.R_SI += inc;
8466 M.x86.R_DI += inc;
8467@@ -7340,7 +7782,8 @@ static void x86emuOp_movs_word(u8 X86EMU_UNUSED(op1))
8468 REMARKS:
8469 Handles opcode 0xa6
8470 ****************************************************************************/
8471-static void x86emuOp_cmps_byte(u8 X86EMU_UNUSED(op1))
8472+static void
8473+x86emuOp_cmps_byte(u8 X86EMU_UNUSED(op1))
8474 {
8475 s8 val1, val2;
8476 int inc;
8477@@ -7348,7 +7791,7 @@ static void x86emuOp_cmps_byte(u8 X86EMU_UNUSED(op1))
8478 START_OF_INSTR();
8479 DECODE_PRINTF("CMPS\tBYTE\n");
8480 TRACE_AND_STEP();
8481- if (ACCESS_FLAG(F_DF)) /* down */
8482+ if (ACCESS_FLAG(F_DF)) /* down */
8483 inc = -1;
8484 else
8485 inc = 1;
8486@@ -7359,7 +7802,7 @@ static void x86emuOp_cmps_byte(u8 X86EMU_UNUSED(op1))
8487 while (M.x86.R_CX != 0) {
8488 val1 = fetch_data_byte(M.x86.R_SI);
8489 val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
8490- cmp_byte(val1, val2);
8491+ cmp_byte(val1, val2);
8492 M.x86.R_CX -= 1;
8493 M.x86.R_SI += inc;
8494 M.x86.R_DI += inc;
8495@@ -7367,7 +7810,8 @@ static void x86emuOp_cmps_byte(u8 X86EMU_UNUSED(op1))
8496 break;
8497 }
8498 M.x86.mode &= ~SYSMODE_PREFIX_REPE;
8499- } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
8500+ }
8501+ else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
8502 /* REPNE */
8503 /* move them until CX is ZERO. */
8504 while (M.x86.R_CX != 0) {
8505@@ -7381,7 +7825,8 @@ static void x86emuOp_cmps_byte(u8 X86EMU_UNUSED(op1))
8506 break; /* zero flag set means equal */
8507 }
8508 M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
8509- } else {
8510+ }
8511+ else {
8512 val1 = fetch_data_byte(M.x86.R_SI);
8513 val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
8514 cmp_byte(val1, val2);
8515@@ -7396,21 +7841,23 @@ static void x86emuOp_cmps_byte(u8 X86EMU_UNUSED(op1))
8516 REMARKS:
8517 Handles opcode 0xa7
8518 ****************************************************************************/
8519-static void x86emuOp_cmps_word(u8 X86EMU_UNUSED(op1))
8520+static void
8521+x86emuOp_cmps_word(u8 X86EMU_UNUSED(op1))
8522 {
8523- u32 val1,val2;
8524+ u32 val1, val2;
8525 int inc;
8526
8527 START_OF_INSTR();
8528 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8529 DECODE_PRINTF("CMPS\tDWORD\n");
8530- if (ACCESS_FLAG(F_DF)) /* down */
8531+ if (ACCESS_FLAG(F_DF)) /* down */
8532 inc = -4;
8533 else
8534 inc = 4;
8535- } else {
8536+ }
8537+ else {
8538 DECODE_PRINTF("CMPS\tWORD\n");
8539- if (ACCESS_FLAG(F_DF)) /* down */
8540+ if (ACCESS_FLAG(F_DF)) /* down */
8541 inc = -2;
8542 else
8543 inc = 2;
8544@@ -7424,10 +7871,11 @@ static void x86emuOp_cmps_word(u8 X86EMU_UNUSED(op1))
8545 val1 = fetch_data_long(M.x86.R_SI);
8546 val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
8547 cmp_long(val1, val2);
8548- } else {
8549+ }
8550+ else {
8551 val1 = fetch_data_word(M.x86.R_SI);
8552 val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
8553- cmp_word((u16)val1, (u16)val2);
8554+ cmp_word((u16) val1, (u16) val2);
8555 }
8556 M.x86.R_CX -= 1;
8557 M.x86.R_SI += inc;
8558@@ -7436,7 +7884,8 @@ static void x86emuOp_cmps_word(u8 X86EMU_UNUSED(op1))
8559 break;
8560 }
8561 M.x86.mode &= ~SYSMODE_PREFIX_REPE;
8562- } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
8563+ }
8564+ else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
8565 /* REPNE */
8566 /* move them until CX is ZERO. */
8567 while (M.x86.R_CX != 0) {
8568@@ -7444,10 +7893,11 @@ static void x86emuOp_cmps_word(u8 X86EMU_UNUSED(op1))
8569 val1 = fetch_data_long(M.x86.R_SI);
8570 val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
8571 cmp_long(val1, val2);
8572- } else {
8573+ }
8574+ else {
8575 val1 = fetch_data_word(M.x86.R_SI);
8576 val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
8577- cmp_word((u16)val1, (u16)val2);
8578+ cmp_word((u16) val1, (u16) val2);
8579 }
8580 M.x86.R_CX -= 1;
8581 M.x86.R_SI += inc;
8582@@ -7456,15 +7906,17 @@ static void x86emuOp_cmps_word(u8 X86EMU_UNUSED(op1))
8583 break; /* zero flag set means equal */
8584 }
8585 M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
8586- } else {
8587+ }
8588+ else {
8589 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8590 val1 = fetch_data_long(M.x86.R_SI);
8591 val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
8592 cmp_long(val1, val2);
8593- } else {
8594+ }
8595+ else {
8596 val1 = fetch_data_word(M.x86.R_SI);
8597 val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
8598- cmp_word((u16)val1, (u16)val2);
8599+ cmp_word((u16) val1, (u16) val2);
8600 }
8601 M.x86.R_SI += inc;
8602 M.x86.R_DI += inc;
8603@@ -7477,7 +7929,8 @@ static void x86emuOp_cmps_word(u8 X86EMU_UNUSED(op1))
8604 REMARKS:
8605 Handles opcode 0xa8
8606 ****************************************************************************/
8607-static void x86emuOp_test_AL_IMM(u8 X86EMU_UNUSED(op1))
8608+static void
8609+x86emuOp_test_AL_IMM(u8 X86EMU_UNUSED(op1))
8610 {
8611 int imm;
8612
8613@@ -7486,7 +7939,7 @@ static void x86emuOp_test_AL_IMM(u8 X86EMU_UNUSED(op1))
8614 imm = fetch_byte_imm();
8615 DECODE_PRINTF2("%04x\n", imm);
8616 TRACE_AND_STEP();
8617- test_byte(M.x86.R_AL, (u8)imm);
8618+ test_byte(M.x86.R_AL, (u8) imm);
8619 DECODE_CLEAR_SEGOVR();
8620 END_OF_INSTR();
8621 }
8622@@ -7495,7 +7948,8 @@ static void x86emuOp_test_AL_IMM(u8 X86EMU_UNUSED(op1))
8623 REMARKS:
8624 Handles opcode 0xa9
8625 ****************************************************************************/
8626-static void x86emuOp_test_AX_IMM(u8 X86EMU_UNUSED(op1))
8627+static void
8628+x86emuOp_test_AX_IMM(u8 X86EMU_UNUSED(op1))
8629 {
8630 u32 srcval;
8631
8632@@ -7503,7 +7957,8 @@ static void x86emuOp_test_AX_IMM(u8 X86EMU_UNUSED(op1))
8633 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8634 DECODE_PRINTF("TEST\tEAX,");
8635 srcval = fetch_long_imm();
8636- } else {
8637+ }
8638+ else {
8639 DECODE_PRINTF("TEST\tAX,");
8640 srcval = fetch_word_imm();
8641 }
8642@@ -7511,8 +7966,9 @@ static void x86emuOp_test_AX_IMM(u8 X86EMU_UNUSED(op1))
8643 TRACE_AND_STEP();
8644 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8645 test_long(M.x86.R_EAX, srcval);
8646- } else {
8647- test_word(M.x86.R_AX, (u16)srcval);
8648+ }
8649+ else {
8650+ test_word(M.x86.R_AX, (u16) srcval);
8651 }
8652 DECODE_CLEAR_SEGOVR();
8653 END_OF_INSTR();
8654@@ -7522,13 +7978,14 @@ static void x86emuOp_test_AX_IMM(u8 X86EMU_UNUSED(op1))
8655 REMARKS:
8656 Handles opcode 0xaa
8657 ****************************************************************************/
8658-static void x86emuOp_stos_byte(u8 X86EMU_UNUSED(op1))
8659+static void
8660+x86emuOp_stos_byte(u8 X86EMU_UNUSED(op1))
8661 {
8662 int inc;
8663
8664 START_OF_INSTR();
8665 DECODE_PRINTF("STOS\tBYTE\n");
8666- if (ACCESS_FLAG(F_DF)) /* down */
8667+ if (ACCESS_FLAG(F_DF)) /* down */
8668 inc = -1;
8669 else
8670 inc = 1;
8671@@ -7542,7 +7999,8 @@ static void x86emuOp_stos_byte(u8 X86EMU_UNUSED(op1))
8672 M.x86.R_DI += inc;
8673 }
8674 M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
8675- } else {
8676+ }
8677+ else {
8678 store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL);
8679 M.x86.R_DI += inc;
8680 }
8681@@ -7554,7 +8012,8 @@ static void x86emuOp_stos_byte(u8 X86EMU_UNUSED(op1))
8682 REMARKS:
8683 Handles opcode 0xab
8684 ****************************************************************************/
8685-static void x86emuOp_stos_word(u8 X86EMU_UNUSED(op1))
8686+static void
8687+x86emuOp_stos_word(u8 X86EMU_UNUSED(op1))
8688 {
8689 int inc;
8690 u32 count;
8691@@ -7562,13 +8021,14 @@ static void x86emuOp_stos_word(u8 X86EMU_UNUSED(op1))
8692 START_OF_INSTR();
8693 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8694 DECODE_PRINTF("STOS\tDWORD\n");
8695- if (ACCESS_FLAG(F_DF)) /* down */
8696+ if (ACCESS_FLAG(F_DF)) /* down */
8697 inc = -4;
8698 else
8699 inc = 4;
8700- } else {
8701+ }
8702+ else {
8703 DECODE_PRINTF("STOS\tWORD\n");
8704- if (ACCESS_FLAG(F_DF)) /* down */
8705+ if (ACCESS_FLAG(F_DF)) /* down */
8706 inc = -2;
8707 else
8708 inc = 2;
8709@@ -7585,7 +8045,8 @@ static void x86emuOp_stos_word(u8 X86EMU_UNUSED(op1))
8710 while (count--) {
8711 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8712 store_data_long_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_EAX);
8713- } else {
8714+ }
8715+ else {
8716 store_data_word_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AX);
8717 }
8718 M.x86.R_DI += inc;
8719@@ -7598,14 +8059,15 @@ static void x86emuOp_stos_word(u8 X86EMU_UNUSED(op1))
8720 REMARKS:
8721 Handles opcode 0xac
8722 ****************************************************************************/
8723-static void x86emuOp_lods_byte(u8 X86EMU_UNUSED(op1))
8724+static void
8725+x86emuOp_lods_byte(u8 X86EMU_UNUSED(op1))
8726 {
8727 int inc;
8728
8729 START_OF_INSTR();
8730 DECODE_PRINTF("LODS\tBYTE\n");
8731 TRACE_AND_STEP();
8732- if (ACCESS_FLAG(F_DF)) /* down */
8733+ if (ACCESS_FLAG(F_DF)) /* down */
8734 inc = -1;
8735 else
8736 inc = 1;
8737@@ -7618,7 +8080,8 @@ static void x86emuOp_lods_byte(u8 X86EMU_UNUSED(op1))
8738 M.x86.R_SI += inc;
8739 }
8740 M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
8741- } else {
8742+ }
8743+ else {
8744 M.x86.R_AL = fetch_data_byte(M.x86.R_SI);
8745 M.x86.R_SI += inc;
8746 }
8747@@ -7630,7 +8093,8 @@ static void x86emuOp_lods_byte(u8 X86EMU_UNUSED(op1))
8748 REMARKS:
8749 Handles opcode 0xad
8750 ****************************************************************************/
8751-static void x86emuOp_lods_word(u8 X86EMU_UNUSED(op1))
8752+static void
8753+x86emuOp_lods_word(u8 X86EMU_UNUSED(op1))
8754 {
8755 int inc;
8756 u32 count;
8757@@ -7638,13 +8102,14 @@ static void x86emuOp_lods_word(u8 X86EMU_UNUSED(op1))
8758 START_OF_INSTR();
8759 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8760 DECODE_PRINTF("LODS\tDWORD\n");
8761- if (ACCESS_FLAG(F_DF)) /* down */
8762+ if (ACCESS_FLAG(F_DF)) /* down */
8763 inc = -4;
8764 else
8765 inc = 4;
8766- } else {
8767+ }
8768+ else {
8769 DECODE_PRINTF("LODS\tWORD\n");
8770- if (ACCESS_FLAG(F_DF)) /* down */
8771+ if (ACCESS_FLAG(F_DF)) /* down */
8772 inc = -2;
8773 else
8774 inc = 2;
8775@@ -7661,7 +8126,8 @@ static void x86emuOp_lods_word(u8 X86EMU_UNUSED(op1))
8776 while (count--) {
8777 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8778 M.x86.R_EAX = fetch_data_long(M.x86.R_SI);
8779- } else {
8780+ }
8781+ else {
8782 M.x86.R_AX = fetch_data_word(M.x86.R_SI);
8783 }
8784 M.x86.R_SI += inc;
8785@@ -7674,7 +8140,8 @@ static void x86emuOp_lods_word(u8 X86EMU_UNUSED(op1))
8786 REMARKS:
8787 Handles opcode 0xae
8788 ****************************************************************************/
8789-static void x86emuOp_scas_byte(u8 X86EMU_UNUSED(op1))
8790+static void
8791+x86emuOp_scas_byte(u8 X86EMU_UNUSED(op1))
8792 {
8793 s8 val2;
8794 int inc;
8795@@ -7682,7 +8149,7 @@ static void x86emuOp_scas_byte(u8 X86EMU_UNUSED(op1))
8796 START_OF_INSTR();
8797 DECODE_PRINTF("SCAS\tBYTE\n");
8798 TRACE_AND_STEP();
8799- if (ACCESS_FLAG(F_DF)) /* down */
8800+ if (ACCESS_FLAG(F_DF)) /* down */
8801 inc = -1;
8802 else
8803 inc = 1;
8804@@ -7698,7 +8165,8 @@ static void x86emuOp_scas_byte(u8 X86EMU_UNUSED(op1))
8805 break;
8806 }
8807 M.x86.mode &= ~SYSMODE_PREFIX_REPE;
8808- } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
8809+ }
8810+ else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
8811 /* REPNE */
8812 /* move them until CX is ZERO. */
8813 while (M.x86.R_CX != 0) {
8814@@ -7710,7 +8178,8 @@ static void x86emuOp_scas_byte(u8 X86EMU_UNUSED(op1))
8815 break; /* zero flag set means equal */
8816 }
8817 M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
8818- } else {
8819+ }
8820+ else {
8821 val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
8822 cmp_byte(M.x86.R_AL, val2);
8823 M.x86.R_DI += inc;
8824@@ -7723,7 +8192,8 @@ static void x86emuOp_scas_byte(u8 X86EMU_UNUSED(op1))
8825 REMARKS:
8826 Handles opcode 0xaf
8827 ****************************************************************************/
8828-static void x86emuOp_scas_word(u8 X86EMU_UNUSED(op1))
8829+static void
8830+x86emuOp_scas_word(u8 X86EMU_UNUSED(op1))
8831 {
8832 int inc;
8833 u32 val;
8834@@ -7731,13 +8201,14 @@ static void x86emuOp_scas_word(u8 X86EMU_UNUSED(op1))
8835 START_OF_INSTR();
8836 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8837 DECODE_PRINTF("SCAS\tDWORD\n");
8838- if (ACCESS_FLAG(F_DF)) /* down */
8839+ if (ACCESS_FLAG(F_DF)) /* down */
8840 inc = -4;
8841 else
8842 inc = 4;
8843- } else {
8844+ }
8845+ else {
8846 DECODE_PRINTF("SCAS\tWORD\n");
8847- if (ACCESS_FLAG(F_DF)) /* down */
8848+ if (ACCESS_FLAG(F_DF)) /* down */
8849 inc = -2;
8850 else
8851 inc = 2;
8852@@ -7750,9 +8221,10 @@ static void x86emuOp_scas_word(u8 X86EMU_UNUSED(op1))
8853 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8854 val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
8855 cmp_long(M.x86.R_EAX, val);
8856- } else {
8857+ }
8858+ else {
8859 val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
8860- cmp_word(M.x86.R_AX, (u16)val);
8861+ cmp_word(M.x86.R_AX, (u16) val);
8862 }
8863 M.x86.R_CX -= 1;
8864 M.x86.R_DI += inc;
8865@@ -7760,16 +8232,18 @@ static void x86emuOp_scas_word(u8 X86EMU_UNUSED(op1))
8866 break;
8867 }
8868 M.x86.mode &= ~SYSMODE_PREFIX_REPE;
8869- } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
8870+ }
8871+ else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
8872 /* REPNE */
8873 /* move them until CX is ZERO. */
8874 while (M.x86.R_CX != 0) {
8875 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8876 val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
8877 cmp_long(M.x86.R_EAX, val);
8878- } else {
8879+ }
8880+ else {
8881 val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
8882- cmp_word(M.x86.R_AX, (u16)val);
8883+ cmp_word(M.x86.R_AX, (u16) val);
8884 }
8885 M.x86.R_CX -= 1;
8886 M.x86.R_DI += inc;
8887@@ -7777,13 +8251,15 @@ static void x86emuOp_scas_word(u8 X86EMU_UNUSED(op1))
8888 break; /* zero flag set means equal */
8889 }
8890 M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
8891- } else {
8892+ }
8893+ else {
8894 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8895 val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
8896 cmp_long(M.x86.R_EAX, val);
8897- } else {
8898+ }
8899+ else {
8900 val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
8901- cmp_word(M.x86.R_AX, (u16)val);
8902+ cmp_word(M.x86.R_AX, (u16) val);
8903 }
8904 M.x86.R_DI += inc;
8905 }
8906@@ -7795,7 +8271,8 @@ static void x86emuOp_scas_word(u8 X86EMU_UNUSED(op1))
8907 REMARKS:
8908 Handles opcode 0xb0
8909 ****************************************************************************/
8910-static void x86emuOp_mov_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
8911+static void
8912+x86emuOp_mov_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
8913 {
8914 u8 imm;
8915
8916@@ -7813,7 +8290,8 @@ static void x86emuOp_mov_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
8917 REMARKS:
8918 Handles opcode 0xb1
8919 ****************************************************************************/
8920-static void x86emuOp_mov_byte_CL_IMM(u8 X86EMU_UNUSED(op1))
8921+static void
8922+x86emuOp_mov_byte_CL_IMM(u8 X86EMU_UNUSED(op1))
8923 {
8924 u8 imm;
8925
8926@@ -7831,7 +8309,8 @@ static void x86emuOp_mov_byte_CL_IMM(u8 X86EMU_UNUSED(op1))
8927 REMARKS:
8928 Handles opcode 0xb2
8929 ****************************************************************************/
8930-static void x86emuOp_mov_byte_DL_IMM(u8 X86EMU_UNUSED(op1))
8931+static void
8932+x86emuOp_mov_byte_DL_IMM(u8 X86EMU_UNUSED(op1))
8933 {
8934 u8 imm;
8935
8936@@ -7849,7 +8328,8 @@ static void x86emuOp_mov_byte_DL_IMM(u8 X86EMU_UNUSED(op1))
8937 REMARKS:
8938 Handles opcode 0xb3
8939 ****************************************************************************/
8940-static void x86emuOp_mov_byte_BL_IMM(u8 X86EMU_UNUSED(op1))
8941+static void
8942+x86emuOp_mov_byte_BL_IMM(u8 X86EMU_UNUSED(op1))
8943 {
8944 u8 imm;
8945
8946@@ -7867,7 +8347,8 @@ static void x86emuOp_mov_byte_BL_IMM(u8 X86EMU_UNUSED(op1))
8947 REMARKS:
8948 Handles opcode 0xb4
8949 ****************************************************************************/
8950-static void x86emuOp_mov_byte_AH_IMM(u8 X86EMU_UNUSED(op1))
8951+static void
8952+x86emuOp_mov_byte_AH_IMM(u8 X86EMU_UNUSED(op1))
8953 {
8954 u8 imm;
8955
8956@@ -7885,7 +8366,8 @@ static void x86emuOp_mov_byte_AH_IMM(u8 X86EMU_UNUSED(op1))
8957 REMARKS:
8958 Handles opcode 0xb5
8959 ****************************************************************************/
8960-static void x86emuOp_mov_byte_CH_IMM(u8 X86EMU_UNUSED(op1))
8961+static void
8962+x86emuOp_mov_byte_CH_IMM(u8 X86EMU_UNUSED(op1))
8963 {
8964 u8 imm;
8965
8966@@ -7903,7 +8385,8 @@ static void x86emuOp_mov_byte_CH_IMM(u8 X86EMU_UNUSED(op1))
8967 REMARKS:
8968 Handles opcode 0xb6
8969 ****************************************************************************/
8970-static void x86emuOp_mov_byte_DH_IMM(u8 X86EMU_UNUSED(op1))
8971+static void
8972+x86emuOp_mov_byte_DH_IMM(u8 X86EMU_UNUSED(op1))
8973 {
8974 u8 imm;
8975
8976@@ -7921,7 +8404,8 @@ static void x86emuOp_mov_byte_DH_IMM(u8 X86EMU_UNUSED(op1))
8977 REMARKS:
8978 Handles opcode 0xb7
8979 ****************************************************************************/
8980-static void x86emuOp_mov_byte_BH_IMM(u8 X86EMU_UNUSED(op1))
8981+static void
8982+x86emuOp_mov_byte_BH_IMM(u8 X86EMU_UNUSED(op1))
8983 {
8984 u8 imm;
8985
8986@@ -7939,7 +8423,8 @@ static void x86emuOp_mov_byte_BH_IMM(u8 X86EMU_UNUSED(op1))
8987 REMARKS:
8988 Handles opcode 0xb8
8989 ****************************************************************************/
8990-static void x86emuOp_mov_word_AX_IMM(u8 X86EMU_UNUSED(op1))
8991+static void
8992+x86emuOp_mov_word_AX_IMM(u8 X86EMU_UNUSED(op1))
8993 {
8994 u32 srcval;
8995
8996@@ -7947,7 +8432,8 @@ static void x86emuOp_mov_word_AX_IMM(u8 X86EMU_UNUSED(op1))
8997 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
8998 DECODE_PRINTF("MOV\tEAX,");
8999 srcval = fetch_long_imm();
9000- } else {
9001+ }
9002+ else {
9003 DECODE_PRINTF("MOV\tAX,");
9004 srcval = fetch_word_imm();
9005 }
9006@@ -7955,8 +8441,9 @@ static void x86emuOp_mov_word_AX_IMM(u8 X86EMU_UNUSED(op1))
9007 TRACE_AND_STEP();
9008 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9009 M.x86.R_EAX = srcval;
9010- } else {
9011- M.x86.R_AX = (u16)srcval;
9012+ }
9013+ else {
9014+ M.x86.R_AX = (u16) srcval;
9015 }
9016 DECODE_CLEAR_SEGOVR();
9017 END_OF_INSTR();
9018@@ -7966,7 +8453,8 @@ static void x86emuOp_mov_word_AX_IMM(u8 X86EMU_UNUSED(op1))
9019 REMARKS:
9020 Handles opcode 0xb9
9021 ****************************************************************************/
9022-static void x86emuOp_mov_word_CX_IMM(u8 X86EMU_UNUSED(op1))
9023+static void
9024+x86emuOp_mov_word_CX_IMM(u8 X86EMU_UNUSED(op1))
9025 {
9026 u32 srcval;
9027
9028@@ -7974,7 +8462,8 @@ static void x86emuOp_mov_word_CX_IMM(u8 X86EMU_UNUSED(op1))
9029 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9030 DECODE_PRINTF("MOV\tECX,");
9031 srcval = fetch_long_imm();
9032- } else {
9033+ }
9034+ else {
9035 DECODE_PRINTF("MOV\tCX,");
9036 srcval = fetch_word_imm();
9037 }
9038@@ -7982,8 +8471,9 @@ static void x86emuOp_mov_word_CX_IMM(u8 X86EMU_UNUSED(op1))
9039 TRACE_AND_STEP();
9040 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9041 M.x86.R_ECX = srcval;
9042- } else {
9043- M.x86.R_CX = (u16)srcval;
9044+ }
9045+ else {
9046+ M.x86.R_CX = (u16) srcval;
9047 }
9048 DECODE_CLEAR_SEGOVR();
9049 END_OF_INSTR();
9050@@ -7993,7 +8483,8 @@ static void x86emuOp_mov_word_CX_IMM(u8 X86EMU_UNUSED(op1))
9051 REMARKS:
9052 Handles opcode 0xba
9053 ****************************************************************************/
9054-static void x86emuOp_mov_word_DX_IMM(u8 X86EMU_UNUSED(op1))
9055+static void
9056+x86emuOp_mov_word_DX_IMM(u8 X86EMU_UNUSED(op1))
9057 {
9058 u32 srcval;
9059
9060@@ -8001,7 +8492,8 @@ static void x86emuOp_mov_word_DX_IMM(u8 X86EMU_UNUSED(op1))
9061 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9062 DECODE_PRINTF("MOV\tEDX,");
9063 srcval = fetch_long_imm();
9064- } else {
9065+ }
9066+ else {
9067 DECODE_PRINTF("MOV\tDX,");
9068 srcval = fetch_word_imm();
9069 }
9070@@ -8009,8 +8501,9 @@ static void x86emuOp_mov_word_DX_IMM(u8 X86EMU_UNUSED(op1))
9071 TRACE_AND_STEP();
9072 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9073 M.x86.R_EDX = srcval;
9074- } else {
9075- M.x86.R_DX = (u16)srcval;
9076+ }
9077+ else {
9078+ M.x86.R_DX = (u16) srcval;
9079 }
9080 DECODE_CLEAR_SEGOVR();
9081 END_OF_INSTR();
9082@@ -8020,7 +8513,8 @@ static void x86emuOp_mov_word_DX_IMM(u8 X86EMU_UNUSED(op1))
9083 REMARKS:
9084 Handles opcode 0xbb
9085 ****************************************************************************/
9086-static void x86emuOp_mov_word_BX_IMM(u8 X86EMU_UNUSED(op1))
9087+static void
9088+x86emuOp_mov_word_BX_IMM(u8 X86EMU_UNUSED(op1))
9089 {
9090 u32 srcval;
9091
9092@@ -8028,7 +8522,8 @@ static void x86emuOp_mov_word_BX_IMM(u8 X86EMU_UNUSED(op1))
9093 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9094 DECODE_PRINTF("MOV\tEBX,");
9095 srcval = fetch_long_imm();
9096- } else {
9097+ }
9098+ else {
9099 DECODE_PRINTF("MOV\tBX,");
9100 srcval = fetch_word_imm();
9101 }
9102@@ -8036,8 +8531,9 @@ static void x86emuOp_mov_word_BX_IMM(u8 X86EMU_UNUSED(op1))
9103 TRACE_AND_STEP();
9104 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9105 M.x86.R_EBX = srcval;
9106- } else {
9107- M.x86.R_BX = (u16)srcval;
9108+ }
9109+ else {
9110+ M.x86.R_BX = (u16) srcval;
9111 }
9112 DECODE_CLEAR_SEGOVR();
9113 END_OF_INSTR();
9114@@ -8047,7 +8543,8 @@ static void x86emuOp_mov_word_BX_IMM(u8 X86EMU_UNUSED(op1))
9115 REMARKS:
9116 Handles opcode 0xbc
9117 ****************************************************************************/
9118-static void x86emuOp_mov_word_SP_IMM(u8 X86EMU_UNUSED(op1))
9119+static void
9120+x86emuOp_mov_word_SP_IMM(u8 X86EMU_UNUSED(op1))
9121 {
9122 u32 srcval;
9123
9124@@ -8055,7 +8552,8 @@ static void x86emuOp_mov_word_SP_IMM(u8 X86EMU_UNUSED(op1))
9125 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9126 DECODE_PRINTF("MOV\tESP,");
9127 srcval = fetch_long_imm();
9128- } else {
9129+ }
9130+ else {
9131 DECODE_PRINTF("MOV\tSP,");
9132 srcval = fetch_word_imm();
9133 }
9134@@ -8063,8 +8561,9 @@ static void x86emuOp_mov_word_SP_IMM(u8 X86EMU_UNUSED(op1))
9135 TRACE_AND_STEP();
9136 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9137 M.x86.R_ESP = srcval;
9138- } else {
9139- M.x86.R_SP = (u16)srcval;
9140+ }
9141+ else {
9142+ M.x86.R_SP = (u16) srcval;
9143 }
9144 DECODE_CLEAR_SEGOVR();
9145 END_OF_INSTR();
9146@@ -8074,7 +8573,8 @@ static void x86emuOp_mov_word_SP_IMM(u8 X86EMU_UNUSED(op1))
9147 REMARKS:
9148 Handles opcode 0xbd
9149 ****************************************************************************/
9150-static void x86emuOp_mov_word_BP_IMM(u8 X86EMU_UNUSED(op1))
9151+static void
9152+x86emuOp_mov_word_BP_IMM(u8 X86EMU_UNUSED(op1))
9153 {
9154 u32 srcval;
9155
9156@@ -8082,7 +8582,8 @@ static void x86emuOp_mov_word_BP_IMM(u8 X86EMU_UNUSED(op1))
9157 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9158 DECODE_PRINTF("MOV\tEBP,");
9159 srcval = fetch_long_imm();
9160- } else {
9161+ }
9162+ else {
9163 DECODE_PRINTF("MOV\tBP,");
9164 srcval = fetch_word_imm();
9165 }
9166@@ -8090,8 +8591,9 @@ static void x86emuOp_mov_word_BP_IMM(u8 X86EMU_UNUSED(op1))
9167 TRACE_AND_STEP();
9168 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9169 M.x86.R_EBP = srcval;
9170- } else {
9171- M.x86.R_BP = (u16)srcval;
9172+ }
9173+ else {
9174+ M.x86.R_BP = (u16) srcval;
9175 }
9176 DECODE_CLEAR_SEGOVR();
9177 END_OF_INSTR();
9178@@ -8101,7 +8603,8 @@ static void x86emuOp_mov_word_BP_IMM(u8 X86EMU_UNUSED(op1))
9179 REMARKS:
9180 Handles opcode 0xbe
9181 ****************************************************************************/
9182-static void x86emuOp_mov_word_SI_IMM(u8 X86EMU_UNUSED(op1))
9183+static void
9184+x86emuOp_mov_word_SI_IMM(u8 X86EMU_UNUSED(op1))
9185 {
9186 u32 srcval;
9187
9188@@ -8109,7 +8612,8 @@ static void x86emuOp_mov_word_SI_IMM(u8 X86EMU_UNUSED(op1))
9189 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9190 DECODE_PRINTF("MOV\tESI,");
9191 srcval = fetch_long_imm();
9192- } else {
9193+ }
9194+ else {
9195 DECODE_PRINTF("MOV\tSI,");
9196 srcval = fetch_word_imm();
9197 }
9198@@ -8117,8 +8621,9 @@ static void x86emuOp_mov_word_SI_IMM(u8 X86EMU_UNUSED(op1))
9199 TRACE_AND_STEP();
9200 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9201 M.x86.R_ESI = srcval;
9202- } else {
9203- M.x86.R_SI = (u16)srcval;
9204+ }
9205+ else {
9206+ M.x86.R_SI = (u16) srcval;
9207 }
9208 DECODE_CLEAR_SEGOVR();
9209 END_OF_INSTR();
9210@@ -8128,7 +8633,8 @@ static void x86emuOp_mov_word_SI_IMM(u8 X86EMU_UNUSED(op1))
9211 REMARKS:
9212 Handles opcode 0xbf
9213 ****************************************************************************/
9214-static void x86emuOp_mov_word_DI_IMM(u8 X86EMU_UNUSED(op1))
9215+static void
9216+x86emuOp_mov_word_DI_IMM(u8 X86EMU_UNUSED(op1))
9217 {
9218 u32 srcval;
9219
9220@@ -8136,7 +8642,8 @@ static void x86emuOp_mov_word_DI_IMM(u8 X86EMU_UNUSED(op1))
9221 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9222 DECODE_PRINTF("MOV\tEDI,");
9223 srcval = fetch_long_imm();
9224- } else {
9225+ }
9226+ else {
9227 DECODE_PRINTF("MOV\tDI,");
9228 srcval = fetch_word_imm();
9229 }
9230@@ -8144,31 +8651,25 @@ static void x86emuOp_mov_word_DI_IMM(u8 X86EMU_UNUSED(op1))
9231 TRACE_AND_STEP();
9232 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9233 M.x86.R_EDI = srcval;
9234- } else {
9235- M.x86.R_DI = (u16)srcval;
9236+ }
9237+ else {
9238+ M.x86.R_DI = (u16) srcval;
9239 }
9240 DECODE_CLEAR_SEGOVR();
9241 END_OF_INSTR();
9242 }
9243
9244 /* used by opcodes c0, d0, and d2. */
9245-static u8(*opcD0_byte_operation[])(u8 d, u8 s) =
9246-{
9247- rol_byte,
9248- ror_byte,
9249- rcl_byte,
9250- rcr_byte,
9251- shl_byte,
9252- shr_byte,
9253- shl_byte, /* sal_byte === shl_byte by definition */
9254- sar_byte,
9255-};
9256+static u8(*opcD0_byte_operation[]) (u8 d, u8 s) = {
9257+ rol_byte, ror_byte, rcl_byte, rcr_byte, shl_byte, shr_byte, shl_byte, /* sal_byte === shl_byte by definition */
9258+sar_byte,};
9259
9260 /****************************************************************************
9261 REMARKS:
9262 Handles opcode 0xc0
9263 ****************************************************************************/
9264-static void x86emuOp_opcC0_byte_RM_MEM(u8 X86EMU_UNUSED(op1))
9265+static void
9266+x86emuOp_opcC0_byte_RM_MEM(u8 X86EMU_UNUSED(op1))
9267 {
9268 int mod, rl, rh;
9269 u8 *destreg;
9270@@ -8251,7 +8752,7 @@ static void x86emuOp_opcC0_byte_RM_MEM(u8 X86EMU_UNUSED(op1))
9271 destval = (*opcD0_byte_operation[rh]) (destval, amt);
9272 store_data_byte(destoffset, destval);
9273 break;
9274- case 3: /* register to register */
9275+ case 3: /* register to register */
9276 destreg = DECODE_RM_BYTE_REGISTER(rl);
9277 amt = fetch_byte_imm();
9278 DECODE_PRINTF2(",%x\n", amt);
9279@@ -8265,36 +8766,21 @@ static void x86emuOp_opcC0_byte_RM_MEM(u8 X86EMU_UNUSED(op1))
9280 }
9281
9282 /* used by opcodes c1, d1, and d3. */
9283-static u16(*opcD1_word_operation[])(u16 s, u8 d) =
9284-{
9285- rol_word,
9286- ror_word,
9287- rcl_word,
9288- rcr_word,
9289- shl_word,
9290- shr_word,
9291- shl_word, /* sal_byte === shl_byte by definition */
9292- sar_word,
9293-};
9294+static u16(*opcD1_word_operation[]) (u16 s, u8 d) = {
9295+ rol_word, ror_word, rcl_word, rcr_word, shl_word, shr_word, shl_word, /* sal_byte === shl_byte by definition */
9296+sar_word,};
9297
9298 /* used by opcodes c1, d1, and d3. */
9299-static u32 (*opcD1_long_operation[])(u32 s, u8 d) =
9300-{
9301- rol_long,
9302- ror_long,
9303- rcl_long,
9304- rcr_long,
9305- shl_long,
9306- shr_long,
9307- shl_long, /* sal_byte === shl_byte by definition */
9308- sar_long,
9309-};
9310+static u32(*opcD1_long_operation[]) (u32 s, u8 d) = {
9311+ rol_long, ror_long, rcl_long, rcr_long, shl_long, shr_long, shl_long, /* sal_byte === shl_byte by definition */
9312+sar_long,};
9313
9314 /****************************************************************************
9315 REMARKS:
9316 Handles opcode 0xc1
9317 ****************************************************************************/
9318-static void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))
9319+static void
9320+x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))
9321 {
9322 int mod, rl, rh;
9323 uint destoffset;
9324@@ -8357,7 +8843,8 @@ static void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))
9325 TRACE_AND_STEP();
9326 destval = (*opcD1_long_operation[rh]) (destval, amt);
9327 store_data_long(destoffset, destval);
9328- } else {
9329+ }
9330+ else {
9331 u16 destval;
9332
9333 DECODE_PRINTF("WORD PTR ");
9334@@ -8382,7 +8869,8 @@ static void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))
9335 TRACE_AND_STEP();
9336 destval = (*opcD1_long_operation[rh]) (destval, amt);
9337 store_data_long(destoffset, destval);
9338- } else {
9339+ }
9340+ else {
9341 u16 destval;
9342
9343 DECODE_PRINTF("WORD PTR ");
9344@@ -8407,7 +8895,8 @@ static void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))
9345 TRACE_AND_STEP();
9346 destval = (*opcD1_long_operation[rh]) (destval, amt);
9347 store_data_long(destoffset, destval);
9348- } else {
9349+ }
9350+ else {
9351 u16 destval;
9352
9353 DECODE_PRINTF("WORD PTR ");
9354@@ -8420,7 +8909,7 @@ static void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))
9355 store_data_word(destoffset, destval);
9356 }
9357 break;
9358- case 3: /* register to register */
9359+ case 3: /* register to register */
9360 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9361 u32 *destreg;
9362
9363@@ -8429,7 +8918,8 @@ static void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))
9364 DECODE_PRINTF2(",%x\n", amt);
9365 TRACE_AND_STEP();
9366 *destreg = (*opcD1_long_operation[rh]) (*destreg, amt);
9367- } else {
9368+ }
9369+ else {
9370 u16 *destreg;
9371
9372 destreg = DECODE_RM_WORD_REGISTER(rl);
9373@@ -8448,7 +8938,8 @@ static void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))
9374 REMARKS:
9375 Handles opcode 0xc2
9376 ****************************************************************************/
9377-static void x86emuOp_ret_near_IMM(u8 X86EMU_UNUSED(op1))
9378+static void
9379+x86emuOp_ret_near_IMM(u8 X86EMU_UNUSED(op1))
9380 {
9381 u16 imm;
9382
9383@@ -8456,8 +8947,8 @@ static void x86emuOp_ret_near_IMM(u8 X86EMU_UNUSED(op1))
9384 DECODE_PRINTF("RET\t");
9385 imm = fetch_word_imm();
9386 DECODE_PRINTF2("%x\n", imm);
9387- RETURN_TRACE("RET",M.x86.saved_cs,M.x86.saved_ip);
9388- TRACE_AND_STEP();
9389+ RETURN_TRACE("RET", M.x86.saved_cs, M.x86.saved_ip);
9390+ TRACE_AND_STEP();
9391 M.x86.R_IP = pop_word();
9392 M.x86.R_SP += imm;
9393 DECODE_CLEAR_SEGOVR();
9394@@ -8468,12 +8959,13 @@ static void x86emuOp_ret_near_IMM(u8 X86EMU_UNUSED(op1))
9395 REMARKS:
9396 Handles opcode 0xc3
9397 ****************************************************************************/
9398-static void x86emuOp_ret_near(u8 X86EMU_UNUSED(op1))
9399+static void
9400+x86emuOp_ret_near(u8 X86EMU_UNUSED(op1))
9401 {
9402 START_OF_INSTR();
9403 DECODE_PRINTF("RET\n");
9404- RETURN_TRACE("RET",M.x86.saved_cs,M.x86.saved_ip);
9405- TRACE_AND_STEP();
9406+ RETURN_TRACE("RET", M.x86.saved_cs, M.x86.saved_ip);
9407+ TRACE_AND_STEP();
9408 M.x86.R_IP = pop_word();
9409 DECODE_CLEAR_SEGOVR();
9410 END_OF_INSTR();
9411@@ -8483,7 +8975,8 @@ static void x86emuOp_ret_near(u8 X86EMU_UNUSED(op1))
9412 REMARKS:
9413 Handles opcode 0xc4
9414 ****************************************************************************/
9415-static void x86emuOp_les_R_IMM(u8 X86EMU_UNUSED(op1))
9416+static void
9417+x86emuOp_les_R_IMM(u8 X86EMU_UNUSED(op1))
9418 {
9419 int mod, rh, rl;
9420 u16 *dstreg;
9421@@ -8520,7 +9013,7 @@ static void x86emuOp_les_R_IMM(u8 X86EMU_UNUSED(op1))
9422 *dstreg = fetch_data_word(srcoffset);
9423 M.x86.R_ES = fetch_data_word(srcoffset + 2);
9424 break;
9425- case 3: /* register to register */
9426+ case 3: /* register to register */
9427 /* UNDEFINED! */
9428 TRACE_AND_STEP();
9429 }
9430@@ -8532,7 +9025,8 @@ static void x86emuOp_les_R_IMM(u8 X86EMU_UNUSED(op1))
9431 REMARKS:
9432 Handles opcode 0xc5
9433 ****************************************************************************/
9434-static void x86emuOp_lds_R_IMM(u8 X86EMU_UNUSED(op1))
9435+static void
9436+x86emuOp_lds_R_IMM(u8 X86EMU_UNUSED(op1))
9437 {
9438 int mod, rh, rl;
9439 u16 *dstreg;
9440@@ -8569,7 +9063,7 @@ static void x86emuOp_lds_R_IMM(u8 X86EMU_UNUSED(op1))
9441 *dstreg = fetch_data_word(srcoffset);
9442 M.x86.R_DS = fetch_data_word(srcoffset + 2);
9443 break;
9444- case 3: /* register to register */
9445+ case 3: /* register to register */
9446 /* UNDEFINED! */
9447 TRACE_AND_STEP();
9448 }
9449@@ -8581,7 +9075,8 @@ static void x86emuOp_lds_R_IMM(u8 X86EMU_UNUSED(op1))
9450 REMARKS:
9451 Handles opcode 0xc6
9452 ****************************************************************************/
9453-static void x86emuOp_mov_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
9454+static void
9455+x86emuOp_mov_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
9456 {
9457 int mod, rl, rh;
9458 u8 *destreg;
9459@@ -8620,7 +9115,7 @@ static void x86emuOp_mov_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
9460 TRACE_AND_STEP();
9461 store_data_byte(destoffset, imm);
9462 break;
9463- case 3: /* register to register */
9464+ case 3: /* register to register */
9465 destreg = DECODE_RM_BYTE_REGISTER(rl);
9466 imm = fetch_byte_imm();
9467 DECODE_PRINTF2(",%2x\n", imm);
9468@@ -8636,7 +9131,8 @@ static void x86emuOp_mov_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
9469 REMARKS:
9470 Handles opcode 0xc7
9471 ****************************************************************************/
9472-static void x86emuOp_mov_word_RM_IMM(u8 X86EMU_UNUSED(op1))
9473+static void
9474+x86emuOp_mov_word_RM_IMM(u8 X86EMU_UNUSED(op1))
9475 {
9476 int mod, rl, rh;
9477 uint destoffset;
9478@@ -8659,7 +9155,8 @@ static void x86emuOp_mov_word_RM_IMM(u8 X86EMU_UNUSED(op1))
9479 DECODE_PRINTF2(",%x\n", imm);
9480 TRACE_AND_STEP();
9481 store_data_long(destoffset, imm);
9482- } else {
9483+ }
9484+ else {
9485 u16 imm;
9486
9487 DECODE_PRINTF("WORD PTR ");
9488@@ -8680,7 +9177,8 @@ static void x86emuOp_mov_word_RM_IMM(u8 X86EMU_UNUSED(op1))
9489 DECODE_PRINTF2(",%x\n", imm);
9490 TRACE_AND_STEP();
9491 store_data_long(destoffset, imm);
9492- } else {
9493+ }
9494+ else {
9495 u16 imm;
9496
9497 DECODE_PRINTF("WORD PTR ");
9498@@ -8701,7 +9199,8 @@ static void x86emuOp_mov_word_RM_IMM(u8 X86EMU_UNUSED(op1))
9499 DECODE_PRINTF2(",%x\n", imm);
9500 TRACE_AND_STEP();
9501 store_data_long(destoffset, imm);
9502- } else {
9503+ }
9504+ else {
9505 u16 imm;
9506
9507 DECODE_PRINTF("WORD PTR ");
9508@@ -8712,19 +9211,20 @@ static void x86emuOp_mov_word_RM_IMM(u8 X86EMU_UNUSED(op1))
9509 store_data_word(destoffset, imm);
9510 }
9511 break;
9512- case 3: /* register to register */
9513+ case 3: /* register to register */
9514 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9515- u32 *destreg;
9516- u32 imm;
9517+ u32 *destreg;
9518+ u32 imm;
9519
9520 destreg = DECODE_RM_LONG_REGISTER(rl);
9521 imm = fetch_long_imm();
9522 DECODE_PRINTF2(",%x\n", imm);
9523 TRACE_AND_STEP();
9524 *destreg = imm;
9525- } else {
9526- u16 *destreg;
9527- u16 imm;
9528+ }
9529+ else {
9530+ u16 *destreg;
9531+ u16 imm;
9532
9533 destreg = DECODE_RM_WORD_REGISTER(rl);
9534 imm = fetch_word_imm();
9535@@ -8742,10 +9242,11 @@ static void x86emuOp_mov_word_RM_IMM(u8 X86EMU_UNUSED(op1))
9536 REMARKS:
9537 Handles opcode 0xc8
9538 ****************************************************************************/
9539-static void x86emuOp_enter(u8 X86EMU_UNUSED(op1))
9540+static void
9541+x86emuOp_enter(u8 X86EMU_UNUSED(op1))
9542 {
9543- u16 local,frame_pointer;
9544- u8 nesting;
9545+ u16 local, frame_pointer;
9546+ u8 nesting;
9547 int i;
9548
9549 START_OF_INSTR();
9550@@ -8760,11 +9261,11 @@ static void x86emuOp_enter(u8 X86EMU_UNUSED(op1))
9551 for (i = 1; i < nesting; i++) {
9552 M.x86.R_BP -= 2;
9553 push_word(fetch_data_word_abs(M.x86.R_SS, M.x86.R_BP));
9554- }
9555- push_word(frame_pointer);
9556 }
9557+ push_word(frame_pointer);
9558+ }
9559 M.x86.R_BP = frame_pointer;
9560- M.x86.R_SP = (u16)(M.x86.R_SP - local);
9561+ M.x86.R_SP = (u16) (M.x86.R_SP - local);
9562 DECODE_CLEAR_SEGOVR();
9563 END_OF_INSTR();
9564 }
9565@@ -8773,7 +9274,8 @@ static void x86emuOp_enter(u8 X86EMU_UNUSED(op1))
9566 REMARKS:
9567 Handles opcode 0xc9
9568 ****************************************************************************/
9569-static void x86emuOp_leave(u8 X86EMU_UNUSED(op1))
9570+static void
9571+x86emuOp_leave(u8 X86EMU_UNUSED(op1))
9572 {
9573 START_OF_INSTR();
9574 DECODE_PRINTF("LEAVE\n");
9575@@ -8788,7 +9290,8 @@ static void x86emuOp_leave(u8 X86EMU_UNUSED(op1))
9576 REMARKS:
9577 Handles opcode 0xca
9578 ****************************************************************************/
9579-static void x86emuOp_ret_far_IMM(u8 X86EMU_UNUSED(op1))
9580+static void
9581+x86emuOp_ret_far_IMM(u8 X86EMU_UNUSED(op1))
9582 {
9583 u16 imm;
9584
9585@@ -8796,8 +9299,8 @@ static void x86emuOp_ret_far_IMM(u8 X86EMU_UNUSED(op1))
9586 DECODE_PRINTF("RETF\t");
9587 imm = fetch_word_imm();
9588 DECODE_PRINTF2("%x\n", imm);
9589- RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip);
9590- TRACE_AND_STEP();
9591+ RETURN_TRACE("RETF", M.x86.saved_cs, M.x86.saved_ip);
9592+ TRACE_AND_STEP();
9593 M.x86.R_IP = pop_word();
9594 M.x86.R_CS = pop_word();
9595 M.x86.R_SP += imm;
9596@@ -8809,12 +9312,13 @@ static void x86emuOp_ret_far_IMM(u8 X86EMU_UNUSED(op1))
9597 REMARKS:
9598 Handles opcode 0xcb
9599 ****************************************************************************/
9600-static void x86emuOp_ret_far(u8 X86EMU_UNUSED(op1))
9601+static void
9602+x86emuOp_ret_far(u8 X86EMU_UNUSED(op1))
9603 {
9604 START_OF_INSTR();
9605 DECODE_PRINTF("RETF\n");
9606- RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip);
9607- TRACE_AND_STEP();
9608+ RETURN_TRACE("RETF", M.x86.saved_cs, M.x86.saved_ip);
9609+ TRACE_AND_STEP();
9610 M.x86.R_IP = pop_word();
9611 M.x86.R_CS = pop_word();
9612 DECODE_CLEAR_SEGOVR();
9613@@ -8825,15 +9329,17 @@ static void x86emuOp_ret_far(u8 X86EMU_UNUSED(op1))
9614 REMARKS:
9615 Handles opcode 0xcc
9616 ****************************************************************************/
9617-static void x86emuOp_int3(u8 X86EMU_UNUSED(op1))
9618+static void
9619+x86emuOp_int3(u8 X86EMU_UNUSED(op1))
9620 {
9621 START_OF_INSTR();
9622 DECODE_PRINTF("INT 3\n");
9623 TRACE_AND_STEP();
9624 if (_X86EMU_intrTab[3]) {
9625- (*_X86EMU_intrTab[3])(3);
9626- } else {
9627- push_word((u16)M.x86.R_FLG);
9628+ (*_X86EMU_intrTab[3]) (3);
9629+ }
9630+ else {
9631+ push_word((u16) M.x86.R_FLG);
9632 CLEAR_FLAG(F_IF);
9633 CLEAR_FLAG(F_TF);
9634 push_word(M.x86.R_CS);
9635@@ -8849,7 +9355,8 @@ static void x86emuOp_int3(u8 X86EMU_UNUSED(op1))
9636 REMARKS:
9637 Handles opcode 0xcd
9638 ****************************************************************************/
9639-static void x86emuOp_int_IMM(u8 X86EMU_UNUSED(op1))
9640+static void
9641+x86emuOp_int_IMM(u8 X86EMU_UNUSED(op1))
9642 {
9643 u8 intnum;
9644
9645@@ -8859,9 +9366,10 @@ static void x86emuOp_int_IMM(u8 X86EMU_UNUSED(op1))
9646 DECODE_PRINTF2("%x\n", intnum);
9647 TRACE_AND_STEP();
9648 if (_X86EMU_intrTab[intnum]) {
9649- (*_X86EMU_intrTab[intnum])(intnum);
9650- } else {
9651- push_word((u16)M.x86.R_FLG);
9652+ (*_X86EMU_intrTab[intnum]) (intnum);
9653+ }
9654+ else {
9655+ push_word((u16) M.x86.R_FLG);
9656 CLEAR_FLAG(F_IF);
9657 CLEAR_FLAG(F_TF);
9658 push_word(M.x86.R_CS);
9659@@ -8877,16 +9385,18 @@ static void x86emuOp_int_IMM(u8 X86EMU_UNUSED(op1))
9660 REMARKS:
9661 Handles opcode 0xce
9662 ****************************************************************************/
9663-static void x86emuOp_into(u8 X86EMU_UNUSED(op1))
9664+static void
9665+x86emuOp_into(u8 X86EMU_UNUSED(op1))
9666 {
9667 START_OF_INSTR();
9668 DECODE_PRINTF("INTO\n");
9669 TRACE_AND_STEP();
9670 if (ACCESS_FLAG(F_OF)) {
9671- if (_X86EMU_intrTab[4]) {
9672- (*_X86EMU_intrTab[4])(4);
9673- } else {
9674- push_word((u16)M.x86.R_FLG);
9675+ if (_X86EMU_intrTab[4]) {
9676+ (*_X86EMU_intrTab[4]) (4);
9677+ }
9678+ else {
9679+ push_word((u16) M.x86.R_FLG);
9680 CLEAR_FLAG(F_IF);
9681 CLEAR_FLAG(F_TF);
9682 push_word(M.x86.R_CS);
9683@@ -8903,7 +9413,8 @@ static void x86emuOp_into(u8 X86EMU_UNUSED(op1))
9684 REMARKS:
9685 Handles opcode 0xcf
9686 ****************************************************************************/
9687-static void x86emuOp_iret(u8 X86EMU_UNUSED(op1))
9688+static void
9689+x86emuOp_iret(u8 X86EMU_UNUSED(op1))
9690 {
9691 START_OF_INSTR();
9692 DECODE_PRINTF("IRET\n");
9693@@ -8921,7 +9432,8 @@ static void x86emuOp_iret(u8 X86EMU_UNUSED(op1))
9694 REMARKS:
9695 Handles opcode 0xd0
9696 ****************************************************************************/
9697-static void x86emuOp_opcD0_byte_RM_1(u8 X86EMU_UNUSED(op1))
9698+static void
9699+x86emuOp_opcD0_byte_RM_1(u8 X86EMU_UNUSED(op1))
9700 {
9701 int mod, rl, rh;
9702 u8 *destreg;
9703@@ -8999,7 +9511,7 @@ static void x86emuOp_opcD0_byte_RM_1(u8 X86EMU_UNUSED(op1))
9704 destval = (*opcD0_byte_operation[rh]) (destval, 1);
9705 store_data_byte(destoffset, destval);
9706 break;
9707- case 3: /* register to register */
9708+ case 3: /* register to register */
9709 destreg = DECODE_RM_BYTE_REGISTER(rl);
9710 DECODE_PRINTF(",1\n");
9711 TRACE_AND_STEP();
9712@@ -9015,7 +9527,8 @@ static void x86emuOp_opcD0_byte_RM_1(u8 X86EMU_UNUSED(op1))
9713 REMARKS:
9714 Handles opcode 0xd1
9715 ****************************************************************************/
9716-static void x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1))
9717+static void
9718+x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1))
9719 {
9720 int mod, rl, rh;
9721 uint destoffset;
9722@@ -9075,7 +9588,8 @@ static void x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1))
9723 TRACE_AND_STEP();
9724 destval = (*opcD1_long_operation[rh]) (destval, 1);
9725 store_data_long(destoffset, destval);
9726- } else {
9727+ }
9728+ else {
9729 u16 destval;
9730
9731 DECODE_PRINTF("WORD PTR ");
9732@@ -9098,7 +9612,8 @@ static void x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1))
9733 TRACE_AND_STEP();
9734 destval = (*opcD1_long_operation[rh]) (destval, 1);
9735 store_data_long(destoffset, destval);
9736- } else {
9737+ }
9738+ else {
9739 u16 destval;
9740
9741 DECODE_PRINTF("WORD PTR ");
9742@@ -9121,7 +9636,8 @@ static void x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1))
9743 TRACE_AND_STEP();
9744 destval = (*opcD1_long_operation[rh]) (destval, 1);
9745 store_data_long(destoffset, destval);
9746- } else {
9747+ }
9748+ else {
9749 u16 destval;
9750
9751 DECODE_PRINTF("BYTE PTR ");
9752@@ -9133,19 +9649,20 @@ static void x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1))
9753 store_data_word(destoffset, destval);
9754 }
9755 break;
9756- case 3: /* register to register */
9757+ case 3: /* register to register */
9758 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9759- u32 destval;
9760- u32 *destreg;
9761+ u32 destval;
9762+ u32 *destreg;
9763
9764 destreg = DECODE_RM_LONG_REGISTER(rl);
9765 DECODE_PRINTF(",1\n");
9766 TRACE_AND_STEP();
9767 destval = (*opcD1_long_operation[rh]) (*destreg, 1);
9768 *destreg = destval;
9769- } else {
9770- u16 destval;
9771- u16 *destreg;
9772+ }
9773+ else {
9774+ u16 destval;
9775+ u16 *destreg;
9776
9777 destreg = DECODE_RM_WORD_REGISTER(rl);
9778 DECODE_PRINTF(",1\n");
9779@@ -9163,7 +9680,8 @@ static void x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1))
9780 REMARKS:
9781 Handles opcode 0xd2
9782 ****************************************************************************/
9783-static void x86emuOp_opcD2_byte_RM_CL(u8 X86EMU_UNUSED(op1))
9784+static void
9785+x86emuOp_opcD2_byte_RM_CL(u8 X86EMU_UNUSED(op1))
9786 {
9787 int mod, rl, rh;
9788 u8 *destreg;
9789@@ -9243,7 +9761,7 @@ static void x86emuOp_opcD2_byte_RM_CL(u8 X86EMU_UNUSED(op1))
9790 destval = (*opcD0_byte_operation[rh]) (destval, amt);
9791 store_data_byte(destoffset, destval);
9792 break;
9793- case 3: /* register to register */
9794+ case 3: /* register to register */
9795 destreg = DECODE_RM_BYTE_REGISTER(rl);
9796 DECODE_PRINTF(",CL\n");
9797 TRACE_AND_STEP();
9798@@ -9259,7 +9777,8 @@ static void x86emuOp_opcD2_byte_RM_CL(u8 X86EMU_UNUSED(op1))
9799 REMARKS:
9800 Handles opcode 0xd3
9801 ****************************************************************************/
9802-static void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))
9803+static void
9804+x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))
9805 {
9806 int mod, rl, rh;
9807 uint destoffset;
9808@@ -9321,7 +9840,8 @@ static void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))
9809 TRACE_AND_STEP();
9810 destval = (*opcD1_long_operation[rh]) (destval, amt);
9811 store_data_long(destoffset, destval);
9812- } else {
9813+ }
9814+ else {
9815 u16 destval;
9816
9817 DECODE_PRINTF("WORD PTR ");
9818@@ -9344,7 +9864,8 @@ static void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))
9819 TRACE_AND_STEP();
9820 destval = (*opcD1_long_operation[rh]) (destval, amt);
9821 store_data_long(destoffset, destval);
9822- } else {
9823+ }
9824+ else {
9825 u16 destval;
9826
9827 DECODE_PRINTF("WORD PTR ");
9828@@ -9367,7 +9888,8 @@ static void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))
9829 TRACE_AND_STEP();
9830 destval = (*opcD1_long_operation[rh]) (destval, amt);
9831 store_data_long(destoffset, destval);
9832- } else {
9833+ }
9834+ else {
9835 u16 destval;
9836
9837 DECODE_PRINTF("WORD PTR ");
9838@@ -9379,7 +9901,7 @@ static void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))
9839 store_data_word(destoffset, destval);
9840 }
9841 break;
9842- case 3: /* register to register */
9843+ case 3: /* register to register */
9844 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
9845 u32 *destreg;
9846
9847@@ -9387,7 +9909,8 @@ static void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))
9848 DECODE_PRINTF(",CL\n");
9849 TRACE_AND_STEP();
9850 *destreg = (*opcD1_long_operation[rh]) (*destreg, amt);
9851- } else {
9852+ }
9853+ else {
9854 u16 *destreg;
9855
9856 destreg = DECODE_RM_WORD_REGISTER(rl);
9857@@ -9405,16 +9928,17 @@ static void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))
9858 REMARKS:
9859 Handles opcode 0xd4
9860 ****************************************************************************/
9861-static void x86emuOp_aam(u8 X86EMU_UNUSED(op1))
9862+static void
9863+x86emuOp_aam(u8 X86EMU_UNUSED(op1))
9864 {
9865 u8 a;
9866
9867 START_OF_INSTR();
9868 DECODE_PRINTF("AAM\n");
9869- a = fetch_byte_imm(); /* this is a stupid encoding. */
9870+ a = fetch_byte_imm(); /* this is a stupid encoding. */
9871 if (a != 10) {
9872- /* fix: add base decoding
9873- aam_word(u8 val, int base a) */
9874+ /* fix: add base decoding
9875+ aam_word(u8 val, int base a) */
9876 DECODE_PRINTF("ERROR DECODING AAM\n");
9877 TRACE_REGS();
9878 HALT_SYS();
9879@@ -9430,7 +9954,8 @@ static void x86emuOp_aam(u8 X86EMU_UNUSED(op1))
9880 REMARKS:
9881 Handles opcode 0xd5
9882 ****************************************************************************/
9883-static void x86emuOp_aad(u8 X86EMU_UNUSED(op1))
9884+static void
9885+x86emuOp_aad(u8 X86EMU_UNUSED(op1))
9886 {
9887 u8 a;
9888
9889@@ -9438,8 +9963,8 @@ static void x86emuOp_aad(u8 X86EMU_UNUSED(op1))
9890 DECODE_PRINTF("AAD\n");
9891 a = fetch_byte_imm();
9892 if (a != 10) {
9893- /* fix: add base decoding
9894- aad_word(u16 val, int base a) */
9895+ /* fix: add base decoding
9896+ aad_word(u16 val, int base a) */
9897 DECODE_PRINTF("ERROR DECODING AAM\n");
9898 TRACE_REGS();
9899 HALT_SYS();
9900@@ -9456,14 +9981,15 @@ static void x86emuOp_aad(u8 X86EMU_UNUSED(op1))
9901 REMARKS:
9902 Handles opcode 0xd7
9903 ****************************************************************************/
9904-static void x86emuOp_xlat(u8 X86EMU_UNUSED(op1))
9905+static void
9906+x86emuOp_xlat(u8 X86EMU_UNUSED(op1))
9907 {
9908 u16 addr;
9909
9910 START_OF_INSTR();
9911 DECODE_PRINTF("XLAT\n");
9912 TRACE_AND_STEP();
9913- addr = (u16)(M.x86.R_BX + (u8)M.x86.R_AL);
9914+ addr = (u16) (M.x86.R_BX + (u8) M.x86.R_AL);
9915 M.x86.R_AL = fetch_data_byte(addr);
9916 DECODE_CLEAR_SEGOVR();
9917 END_OF_INSTR();
9918@@ -9475,7 +10001,8 @@ static void x86emuOp_xlat(u8 X86EMU_UNUSED(op1))
9919 REMARKS:
9920 Handles opcode 0xe0
9921 ****************************************************************************/
9922-static void x86emuOp_loopne(u8 X86EMU_UNUSED(op1))
9923+static void
9924+x86emuOp_loopne(u8 X86EMU_UNUSED(op1))
9925 {
9926 s16 ip;
9927
9928@@ -9486,7 +10013,7 @@ static void x86emuOp_loopne(u8 X86EMU_UNUSED(op1))
9929 DECODE_PRINTF2("%04x\n", ip);
9930 TRACE_AND_STEP();
9931 M.x86.R_CX -= 1;
9932- if (M.x86.R_CX != 0 && !ACCESS_FLAG(F_ZF)) /* CX != 0 and !ZF */
9933+ if (M.x86.R_CX != 0 && !ACCESS_FLAG(F_ZF)) /* CX != 0 and !ZF */
9934 M.x86.R_IP = ip;
9935 DECODE_CLEAR_SEGOVR();
9936 END_OF_INSTR();
9937@@ -9496,7 +10023,8 @@ static void x86emuOp_loopne(u8 X86EMU_UNUSED(op1))
9938 REMARKS:
9939 Handles opcode 0xe1
9940 ****************************************************************************/
9941-static void x86emuOp_loope(u8 X86EMU_UNUSED(op1))
9942+static void
9943+x86emuOp_loope(u8 X86EMU_UNUSED(op1))
9944 {
9945 s16 ip;
9946
9947@@ -9507,7 +10035,7 @@ static void x86emuOp_loope(u8 X86EMU_UNUSED(op1))
9948 DECODE_PRINTF2("%04x\n", ip);
9949 TRACE_AND_STEP();
9950 M.x86.R_CX -= 1;
9951- if (M.x86.R_CX != 0 && ACCESS_FLAG(F_ZF)) /* CX != 0 and ZF */
9952+ if (M.x86.R_CX != 0 && ACCESS_FLAG(F_ZF)) /* CX != 0 and ZF */
9953 M.x86.R_IP = ip;
9954 DECODE_CLEAR_SEGOVR();
9955 END_OF_INSTR();
9956@@ -9517,7 +10045,8 @@ static void x86emuOp_loope(u8 X86EMU_UNUSED(op1))
9957 REMARKS:
9958 Handles opcode 0xe2
9959 ****************************************************************************/
9960-static void x86emuOp_loop(u8 X86EMU_UNUSED(op1))
9961+static void
9962+x86emuOp_loop(u8 X86EMU_UNUSED(op1))
9963 {
9964 s16 ip;
9965
9966@@ -9538,16 +10067,17 @@ static void x86emuOp_loop(u8 X86EMU_UNUSED(op1))
9967 REMARKS:
9968 Handles opcode 0xe3
9969 ****************************************************************************/
9970-static void x86emuOp_jcxz(u8 X86EMU_UNUSED(op1))
9971+static void
9972+x86emuOp_jcxz(u8 X86EMU_UNUSED(op1))
9973 {
9974 u16 target;
9975- s8 offset;
9976+ s8 offset;
9977
9978 /* jump to byte offset if overflow flag is set */
9979 START_OF_INSTR();
9980 DECODE_PRINTF("JCXZ\t");
9981- offset = (s8)fetch_byte_imm();
9982- target = (u16)(M.x86.R_IP + offset);
9983+ offset = (s8) fetch_byte_imm();
9984+ target = (u16) (M.x86.R_IP + offset);
9985 DECODE_PRINTF2("%x\n", target);
9986 TRACE_AND_STEP();
9987 if (M.x86.R_CX == 0)
9988@@ -9560,16 +10090,17 @@ static void x86emuOp_jcxz(u8 X86EMU_UNUSED(op1))
9989 REMARKS:
9990 Handles opcode 0xe4
9991 ****************************************************************************/
9992-static void x86emuOp_in_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
9993+static void
9994+x86emuOp_in_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
9995 {
9996 u8 port;
9997
9998 START_OF_INSTR();
9999 DECODE_PRINTF("IN\t");
10000- port = (u8) fetch_byte_imm();
10001+ port = (u8) fetch_byte_imm();
10002 DECODE_PRINTF2("%x,AL\n", port);
10003 TRACE_AND_STEP();
10004- M.x86.R_AL = (*sys_inb)(port);
10005+ M.x86.R_AL = (*sys_inb) (port);
10006 DECODE_CLEAR_SEGOVR();
10007 END_OF_INSTR();
10008 }
10009@@ -9578,23 +10109,26 @@ static void x86emuOp_in_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
10010 REMARKS:
10011 Handles opcode 0xe5
10012 ****************************************************************************/
10013-static void x86emuOp_in_word_AX_IMM(u8 X86EMU_UNUSED(op1))
10014+static void
10015+x86emuOp_in_word_AX_IMM(u8 X86EMU_UNUSED(op1))
10016 {
10017 u8 port;
10018
10019 START_OF_INSTR();
10020 DECODE_PRINTF("IN\t");
10021- port = (u8) fetch_byte_imm();
10022+ port = (u8) fetch_byte_imm();
10023 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10024 DECODE_PRINTF2("EAX,%x\n", port);
10025- } else {
10026+ }
10027+ else {
10028 DECODE_PRINTF2("AX,%x\n", port);
10029 }
10030 TRACE_AND_STEP();
10031 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10032- M.x86.R_EAX = (*sys_inl)(port);
10033- } else {
10034- M.x86.R_AX = (*sys_inw)(port);
10035+ M.x86.R_EAX = (*sys_inl) (port);
10036+ }
10037+ else {
10038+ M.x86.R_AX = (*sys_inw) (port);
10039 }
10040 DECODE_CLEAR_SEGOVR();
10041 END_OF_INSTR();
10042@@ -9604,16 +10138,17 @@ static void x86emuOp_in_word_AX_IMM(u8 X86EMU_UNUSED(op1))
10043 REMARKS:
10044 Handles opcode 0xe6
10045 ****************************************************************************/
10046-static void x86emuOp_out_byte_IMM_AL(u8 X86EMU_UNUSED(op1))
10047+static void
10048+x86emuOp_out_byte_IMM_AL(u8 X86EMU_UNUSED(op1))
10049 {
10050 u8 port;
10051
10052 START_OF_INSTR();
10053 DECODE_PRINTF("OUT\t");
10054- port = (u8) fetch_byte_imm();
10055+ port = (u8) fetch_byte_imm();
10056 DECODE_PRINTF2("%x,AL\n", port);
10057 TRACE_AND_STEP();
10058- (*sys_outb)(port, M.x86.R_AL);
10059+ (*sys_outb) (port, M.x86.R_AL);
10060 DECODE_CLEAR_SEGOVR();
10061 END_OF_INSTR();
10062 }
10063@@ -9622,23 +10157,26 @@ static void x86emuOp_out_byte_IMM_AL(u8 X86EMU_UNUSED(op1))
10064 REMARKS:
10065 Handles opcode 0xe7
10066 ****************************************************************************/
10067-static void x86emuOp_out_word_IMM_AX(u8 X86EMU_UNUSED(op1))
10068+static void
10069+x86emuOp_out_word_IMM_AX(u8 X86EMU_UNUSED(op1))
10070 {
10071 u8 port;
10072
10073 START_OF_INSTR();
10074 DECODE_PRINTF("OUT\t");
10075- port = (u8) fetch_byte_imm();
10076+ port = (u8) fetch_byte_imm();
10077 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10078 DECODE_PRINTF2("%x,EAX\n", port);
10079- } else {
10080+ }
10081+ else {
10082 DECODE_PRINTF2("%x,AX\n", port);
10083 }
10084 TRACE_AND_STEP();
10085 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10086- (*sys_outl)(port, M.x86.R_EAX);
10087- } else {
10088- (*sys_outw)(port, M.x86.R_AX);
10089+ (*sys_outl) (port, M.x86.R_EAX);
10090+ }
10091+ else {
10092+ (*sys_outw) (port, M.x86.R_AX);
10093 }
10094 DECODE_CLEAR_SEGOVR();
10095 END_OF_INSTR();
10096@@ -9648,19 +10186,35 @@ static void x86emuOp_out_word_IMM_AX(u8 X86EMU_UNUSED(op1))
10097 REMARKS:
10098 Handles opcode 0xe8
10099 ****************************************************************************/
10100-static void x86emuOp_call_near_IMM(u8 X86EMU_UNUSED(op1))
10101+static void
10102+x86emuOp_call_near_IMM(u8 X86EMU_UNUSED(op1))
10103 {
10104- s16 ip;
10105+ s16 ip16;
10106+ s32 ip32;
10107
10108 START_OF_INSTR();
10109- DECODE_PRINTF("CALL\t");
10110- ip = (s16) fetch_word_imm();
10111- ip += (s16) M.x86.R_IP; /* CHECK SIGN */
10112- DECODE_PRINTF2("%04x\n", (u16)ip);
10113- CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, ip, "");
10114+ DECODE_PRINTF("CALL\t");
10115+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10116+ ip32 = (s32) fetch_long_imm();
10117+ ip32 += (s16) M.x86.R_IP; /* CHECK SIGN */
10118+ DECODE_PRINTF2("%04x\n", (u16) ip32);
10119+ CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, ip32, "");
10120+ }
10121+ else {
10122+ ip16 = (s16) fetch_word_imm();
10123+ ip16 += (s16) M.x86.R_IP; /* CHECK SIGN */
10124+ DECODE_PRINTF2("%04x\n", (u16) ip16);
10125+ CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, ip16, "");
10126+ }
10127 TRACE_AND_STEP();
10128- push_word(M.x86.R_IP);
10129- M.x86.R_IP = ip;
10130+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10131+ push_long(M.x86.R_EIP);
10132+ M.x86.R_EIP = ip32 & 0xffff;
10133+ }
10134+ else {
10135+ push_word(M.x86.R_IP);
10136+ M.x86.R_EIP = ip16;
10137+ }
10138 DECODE_CLEAR_SEGOVR();
10139 END_OF_INSTR();
10140 }
10141@@ -9669,17 +10223,27 @@ static void x86emuOp_call_near_IMM(u8 X86EMU_UNUSED(op1))
10142 REMARKS:
10143 Handles opcode 0xe9
10144 ****************************************************************************/
10145-static void x86emuOp_jump_near_IMM(u8 X86EMU_UNUSED(op1))
10146+static void
10147+x86emuOp_jump_near_IMM(u8 X86EMU_UNUSED(op1))
10148 {
10149- int ip;
10150+ u32 ip;
10151
10152 START_OF_INSTR();
10153 DECODE_PRINTF("JMP\t");
10154- ip = (s16)fetch_word_imm();
10155- ip += (s16)M.x86.R_IP;
10156- DECODE_PRINTF2("%04x\n", (u16)ip);
10157- TRACE_AND_STEP();
10158- M.x86.R_IP = (u16)ip;
10159+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10160+ ip = (u32) fetch_long_imm();
10161+ ip += (u32) M.x86.R_EIP;
10162+ DECODE_PRINTF2("%08x\n", (u32) ip);
10163+ TRACE_AND_STEP();
10164+ M.x86.R_EIP = (u32) ip;
10165+ }
10166+ else {
10167+ ip = (s16) fetch_word_imm();
10168+ ip += (s16) M.x86.R_IP;
10169+ DECODE_PRINTF2("%04x\n", (u16) ip);
10170+ TRACE_AND_STEP();
10171+ M.x86.R_IP = (u16) ip;
10172+ }
10173 DECODE_CLEAR_SEGOVR();
10174 END_OF_INSTR();
10175 }
10176@@ -9688,18 +10252,25 @@ static void x86emuOp_jump_near_IMM(u8 X86EMU_UNUSED(op1))
10177 REMARKS:
10178 Handles opcode 0xea
10179 ****************************************************************************/
10180-static void x86emuOp_jump_far_IMM(u8 X86EMU_UNUSED(op1))
10181+static void
10182+x86emuOp_jump_far_IMM(u8 X86EMU_UNUSED(op1))
10183 {
10184- u16 cs, ip;
10185+ u16 cs;
10186+ u32 ip;
10187
10188 START_OF_INSTR();
10189 DECODE_PRINTF("JMP\tFAR ");
10190- ip = fetch_word_imm();
10191+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10192+ ip = fetch_long_imm();
10193+ }
10194+ else {
10195+ ip = fetch_word_imm();
10196+ }
10197 cs = fetch_word_imm();
10198 DECODE_PRINTF2("%04x:", cs);
10199 DECODE_PRINTF2("%04x\n", ip);
10200 TRACE_AND_STEP();
10201- M.x86.R_IP = ip;
10202+ M.x86.R_EIP = ip & 0xffff;
10203 M.x86.R_CS = cs;
10204 DECODE_CLEAR_SEGOVR();
10205 END_OF_INSTR();
10206@@ -9709,15 +10280,16 @@ static void x86emuOp_jump_far_IMM(u8 X86EMU_UNUSED(op1))
10207 REMARKS:
10208 Handles opcode 0xeb
10209 ****************************************************************************/
10210-static void x86emuOp_jump_byte_IMM(u8 X86EMU_UNUSED(op1))
10211+static void
10212+x86emuOp_jump_byte_IMM(u8 X86EMU_UNUSED(op1))
10213 {
10214 u16 target;
10215 s8 offset;
10216
10217 START_OF_INSTR();
10218 DECODE_PRINTF("JMP\t");
10219- offset = (s8)fetch_byte_imm();
10220- target = (u16)(M.x86.R_IP + offset);
10221+ offset = (s8) fetch_byte_imm();
10222+ target = (u16) (M.x86.R_IP + offset);
10223 DECODE_PRINTF2("%x\n", target);
10224 TRACE_AND_STEP();
10225 M.x86.R_IP = target;
10226@@ -9729,12 +10301,13 @@ static void x86emuOp_jump_byte_IMM(u8 X86EMU_UNUSED(op1))
10227 REMARKS:
10228 Handles opcode 0xec
10229 ****************************************************************************/
10230-static void x86emuOp_in_byte_AL_DX(u8 X86EMU_UNUSED(op1))
10231+static void
10232+x86emuOp_in_byte_AL_DX(u8 X86EMU_UNUSED(op1))
10233 {
10234 START_OF_INSTR();
10235 DECODE_PRINTF("IN\tAL,DX\n");
10236 TRACE_AND_STEP();
10237- M.x86.R_AL = (*sys_inb)(M.x86.R_DX);
10238+ M.x86.R_AL = (*sys_inb) (M.x86.R_DX);
10239 DECODE_CLEAR_SEGOVR();
10240 END_OF_INSTR();
10241 }
10242@@ -9743,19 +10316,22 @@ static void x86emuOp_in_byte_AL_DX(u8 X86EMU_UNUSED(op1))
10243 REMARKS:
10244 Handles opcode 0xed
10245 ****************************************************************************/
10246-static void x86emuOp_in_word_AX_DX(u8 X86EMU_UNUSED(op1))
10247+static void
10248+x86emuOp_in_word_AX_DX(u8 X86EMU_UNUSED(op1))
10249 {
10250 START_OF_INSTR();
10251 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10252 DECODE_PRINTF("IN\tEAX,DX\n");
10253- } else {
10254+ }
10255+ else {
10256 DECODE_PRINTF("IN\tAX,DX\n");
10257 }
10258 TRACE_AND_STEP();
10259 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10260- M.x86.R_EAX = (*sys_inl)(M.x86.R_DX);
10261- } else {
10262- M.x86.R_AX = (*sys_inw)(M.x86.R_DX);
10263+ M.x86.R_EAX = (*sys_inl) (M.x86.R_DX);
10264+ }
10265+ else {
10266+ M.x86.R_AX = (*sys_inw) (M.x86.R_DX);
10267 }
10268 DECODE_CLEAR_SEGOVR();
10269 END_OF_INSTR();
10270@@ -9765,12 +10341,13 @@ static void x86emuOp_in_word_AX_DX(u8 X86EMU_UNUSED(op1))
10271 REMARKS:
10272 Handles opcode 0xee
10273 ****************************************************************************/
10274-static void x86emuOp_out_byte_DX_AL(u8 X86EMU_UNUSED(op1))
10275+static void
10276+x86emuOp_out_byte_DX_AL(u8 X86EMU_UNUSED(op1))
10277 {
10278 START_OF_INSTR();
10279 DECODE_PRINTF("OUT\tDX,AL\n");
10280 TRACE_AND_STEP();
10281- (*sys_outb)(M.x86.R_DX, M.x86.R_AL);
10282+ (*sys_outb) (M.x86.R_DX, M.x86.R_AL);
10283 DECODE_CLEAR_SEGOVR();
10284 END_OF_INSTR();
10285 }
10286@@ -9779,19 +10356,22 @@ static void x86emuOp_out_byte_DX_AL(u8 X86EMU_UNUSED(op1))
10287 REMARKS:
10288 Handles opcode 0xef
10289 ****************************************************************************/
10290-static void x86emuOp_out_word_DX_AX(u8 X86EMU_UNUSED(op1))
10291+static void
10292+x86emuOp_out_word_DX_AX(u8 X86EMU_UNUSED(op1))
10293 {
10294 START_OF_INSTR();
10295 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10296 DECODE_PRINTF("OUT\tDX,EAX\n");
10297- } else {
10298+ }
10299+ else {
10300 DECODE_PRINTF("OUT\tDX,AX\n");
10301 }
10302 TRACE_AND_STEP();
10303 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10304- (*sys_outl)(M.x86.R_DX, M.x86.R_EAX);
10305- } else {
10306- (*sys_outw)(M.x86.R_DX, M.x86.R_AX);
10307+ (*sys_outl) (M.x86.R_DX, M.x86.R_EAX);
10308+ }
10309+ else {
10310+ (*sys_outw) (M.x86.R_DX, M.x86.R_AX);
10311 }
10312 DECODE_CLEAR_SEGOVR();
10313 END_OF_INSTR();
10314@@ -9801,7 +10381,8 @@ static void x86emuOp_out_word_DX_AX(u8 X86EMU_UNUSED(op1))
10315 REMARKS:
10316 Handles opcode 0xf0
10317 ****************************************************************************/
10318-static void x86emuOp_lock(u8 X86EMU_UNUSED(op1))
10319+static void
10320+x86emuOp_lock(u8 X86EMU_UNUSED(op1))
10321 {
10322 START_OF_INSTR();
10323 DECODE_PRINTF("LOCK:\n");
10324@@ -9816,7 +10397,8 @@ static void x86emuOp_lock(u8 X86EMU_UNUSED(op1))
10325 REMARKS:
10326 Handles opcode 0xf2
10327 ****************************************************************************/
10328-static void x86emuOp_repne(u8 X86EMU_UNUSED(op1))
10329+static void
10330+x86emuOp_repne(u8 X86EMU_UNUSED(op1))
10331 {
10332 START_OF_INSTR();
10333 DECODE_PRINTF("REPNE\n");
10334@@ -9830,7 +10412,8 @@ static void x86emuOp_repne(u8 X86EMU_UNUSED(op1))
10335 REMARKS:
10336 Handles opcode 0xf3
10337 ****************************************************************************/
10338-static void x86emuOp_repe(u8 X86EMU_UNUSED(op1))
10339+static void
10340+x86emuOp_repe(u8 X86EMU_UNUSED(op1))
10341 {
10342 START_OF_INSTR();
10343 DECODE_PRINTF("REPE\n");
10344@@ -9844,7 +10427,8 @@ static void x86emuOp_repe(u8 X86EMU_UNUSED(op1))
10345 REMARKS:
10346 Handles opcode 0xf4
10347 ****************************************************************************/
10348-static void x86emuOp_halt(u8 X86EMU_UNUSED(op1))
10349+static void
10350+x86emuOp_halt(u8 X86EMU_UNUSED(op1))
10351 {
10352 START_OF_INSTR();
10353 DECODE_PRINTF("HALT\n");
10354@@ -9858,7 +10442,8 @@ static void x86emuOp_halt(u8 X86EMU_UNUSED(op1))
10355 REMARKS:
10356 Handles opcode 0xf5
10357 ****************************************************************************/
10358-static void x86emuOp_cmc(u8 X86EMU_UNUSED(op1))
10359+static void
10360+x86emuOp_cmc(u8 X86EMU_UNUSED(op1))
10361 {
10362 /* complement the carry flag. */
10363 START_OF_INSTR();
10364@@ -9873,7 +10458,8 @@ static void x86emuOp_cmc(u8 X86EMU_UNUSED(op1))
10365 REMARKS:
10366 Handles opcode 0xf6
10367 ****************************************************************************/
10368-static void x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))
10369+static void
10370+x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))
10371 {
10372 int mod, rl, rh;
10373 u8 *destreg;
10374@@ -9885,9 +10471,9 @@ static void x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))
10375 START_OF_INSTR();
10376 FETCH_DECODE_MODRM(mod, rh, rl);
10377 switch (mod) {
10378- case 0: /* mod=00 */
10379+ case 0: /* mod=00 */
10380 switch (rh) {
10381- case 0: /* test byte imm */
10382+ case 0: /* test byte imm */
10383 DECODE_PRINTF("TEST\tBYTE PTR ");
10384 destoffset = decode_rm00_address(rl);
10385 DECODE_PRINTF(",");
10386@@ -9953,9 +10539,9 @@ static void x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))
10387 break;
10388 }
10389 break; /* end mod==00 */
10390- case 1: /* mod=01 */
10391+ case 1: /* mod=01 */
10392 switch (rh) {
10393- case 0: /* test byte imm */
10394+ case 0: /* test byte imm */
10395 DECODE_PRINTF("TEST\tBYTE PTR ");
10396 destoffset = decode_rm01_address(rl);
10397 DECODE_PRINTF(",");
10398@@ -10021,9 +10607,9 @@ static void x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))
10399 break;
10400 }
10401 break; /* end mod==01 */
10402- case 2: /* mod=10 */
10403+ case 2: /* mod=10 */
10404 switch (rh) {
10405- case 0: /* test byte imm */
10406+ case 0: /* test byte imm */
10407 DECODE_PRINTF("TEST\tBYTE PTR ");
10408 destoffset = decode_rm10_address(rl);
10409 DECODE_PRINTF(",");
10410@@ -10089,9 +10675,9 @@ static void x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))
10411 break;
10412 }
10413 break; /* end mod==10 */
10414- case 3: /* mod=11 */
10415+ case 3: /* mod=11 */
10416 switch (rh) {
10417- case 0: /* test byte imm */
10418+ case 0: /* test byte imm */
10419 DECODE_PRINTF("TEST\t");
10420 destreg = DECODE_RM_BYTE_REGISTER(rl);
10421 DECODE_PRINTF(",");
10422@@ -10123,7 +10709,7 @@ static void x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))
10423 destreg = DECODE_RM_BYTE_REGISTER(rl);
10424 DECODE_PRINTF("\n");
10425 TRACE_AND_STEP();
10426- mul_byte(*destreg); /*!!! */
10427+ mul_byte(*destreg); /*!!! */
10428 break;
10429 case 5:
10430 DECODE_PRINTF("IMUL\t");
10431@@ -10157,7 +10743,8 @@ static void x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))
10432 REMARKS:
10433 Handles opcode 0xf7
10434 ****************************************************************************/
10435-static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10436+static void
10437+x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10438 {
10439 int mod, rl, rh;
10440 uint destoffset;
10441@@ -10167,11 +10754,11 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10442 START_OF_INSTR();
10443 FETCH_DECODE_MODRM(mod, rh, rl);
10444 switch (mod) {
10445- case 0: /* mod=00 */
10446+ case 0: /* mod=00 */
10447 switch (rh) {
10448- case 0: /* test word imm */
10449+ case 0: /* test word imm */
10450 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10451- u32 destval,srcval;
10452+ u32 destval, srcval;
10453
10454 DECODE_PRINTF("TEST\tDWORD PTR ");
10455 destoffset = decode_rm00_address(rl);
10456@@ -10181,8 +10768,9 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10457 destval = fetch_data_long(destoffset);
10458 TRACE_AND_STEP();
10459 test_long(destval, srcval);
10460- } else {
10461- u16 destval,srcval;
10462+ }
10463+ else {
10464+ u16 destval, srcval;
10465
10466 DECODE_PRINTF("TEST\tWORD PTR ");
10467 destoffset = decode_rm00_address(rl);
10468@@ -10209,7 +10797,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10469 TRACE_AND_STEP();
10470 destval = not_long(destval);
10471 store_data_long(destoffset, destval);
10472- } else {
10473+ }
10474+ else {
10475 u16 destval;
10476
10477 DECODE_PRINTF("NOT\tWORD PTR ");
10478@@ -10232,7 +10821,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10479 TRACE_AND_STEP();
10480 destval = neg_long(destval);
10481 store_data_long(destoffset, destval);
10482- } else {
10483+ }
10484+ else {
10485 u16 destval;
10486
10487 DECODE_PRINTF("NEG\tWORD PTR ");
10488@@ -10254,7 +10844,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10489 destval = fetch_data_long(destoffset);
10490 TRACE_AND_STEP();
10491 mul_long(destval);
10492- } else {
10493+ }
10494+ else {
10495 u16 destval;
10496
10497 DECODE_PRINTF("MUL\tWORD PTR ");
10498@@ -10275,7 +10866,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10499 destval = fetch_data_long(destoffset);
10500 TRACE_AND_STEP();
10501 imul_long(destval);
10502- } else {
10503+ }
10504+ else {
10505 u16 destval;
10506
10507 DECODE_PRINTF("IMUL\tWORD PTR ");
10508@@ -10296,7 +10888,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10509 destval = fetch_data_long(destoffset);
10510 TRACE_AND_STEP();
10511 div_long(destval);
10512- } else {
10513+ }
10514+ else {
10515 u16 destval;
10516
10517 DECODE_PRINTF("DIV\tWORD PTR ");
10518@@ -10317,7 +10910,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10519 destval = fetch_data_long(destoffset);
10520 TRACE_AND_STEP();
10521 idiv_long(destval);
10522- } else {
10523+ }
10524+ else {
10525 u16 destval;
10526
10527 DECODE_PRINTF("IDIV\tWORD PTR ");
10528@@ -10330,11 +10924,11 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10529 break;
10530 }
10531 break; /* end mod==00 */
10532- case 1: /* mod=01 */
10533+ case 1: /* mod=01 */
10534 switch (rh) {
10535- case 0: /* test word imm */
10536+ case 0: /* test word imm */
10537 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10538- u32 destval,srcval;
10539+ u32 destval, srcval;
10540
10541 DECODE_PRINTF("TEST\tDWORD PTR ");
10542 destoffset = decode_rm01_address(rl);
10543@@ -10344,8 +10938,9 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10544 destval = fetch_data_long(destoffset);
10545 TRACE_AND_STEP();
10546 test_long(destval, srcval);
10547- } else {
10548- u16 destval,srcval;
10549+ }
10550+ else {
10551+ u16 destval, srcval;
10552
10553 DECODE_PRINTF("TEST\tWORD PTR ");
10554 destoffset = decode_rm01_address(rl);
10555@@ -10372,7 +10967,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10556 TRACE_AND_STEP();
10557 destval = not_long(destval);
10558 store_data_long(destoffset, destval);
10559- } else {
10560+ }
10561+ else {
10562 u16 destval;
10563
10564 DECODE_PRINTF("NOT\tWORD PTR ");
10565@@ -10395,7 +10991,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10566 TRACE_AND_STEP();
10567 destval = neg_long(destval);
10568 store_data_long(destoffset, destval);
10569- } else {
10570+ }
10571+ else {
10572 u16 destval;
10573
10574 DECODE_PRINTF("NEG\tWORD PTR ");
10575@@ -10417,7 +11014,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10576 destval = fetch_data_long(destoffset);
10577 TRACE_AND_STEP();
10578 mul_long(destval);
10579- } else {
10580+ }
10581+ else {
10582 u16 destval;
10583
10584 DECODE_PRINTF("MUL\tWORD PTR ");
10585@@ -10438,7 +11036,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10586 destval = fetch_data_long(destoffset);
10587 TRACE_AND_STEP();
10588 imul_long(destval);
10589- } else {
10590+ }
10591+ else {
10592 u16 destval;
10593
10594 DECODE_PRINTF("IMUL\tWORD PTR ");
10595@@ -10459,7 +11058,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10596 destval = fetch_data_long(destoffset);
10597 TRACE_AND_STEP();
10598 div_long(destval);
10599- } else {
10600+ }
10601+ else {
10602 u16 destval;
10603
10604 DECODE_PRINTF("DIV\tWORD PTR ");
10605@@ -10480,7 +11080,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10606 destval = fetch_data_long(destoffset);
10607 TRACE_AND_STEP();
10608 idiv_long(destval);
10609- } else {
10610+ }
10611+ else {
10612 u16 destval;
10613
10614 DECODE_PRINTF("IDIV\tWORD PTR ");
10615@@ -10493,11 +11094,11 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10616 break;
10617 }
10618 break; /* end mod==01 */
10619- case 2: /* mod=10 */
10620+ case 2: /* mod=10 */
10621 switch (rh) {
10622- case 0: /* test word imm */
10623+ case 0: /* test word imm */
10624 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10625- u32 destval,srcval;
10626+ u32 destval, srcval;
10627
10628 DECODE_PRINTF("TEST\tDWORD PTR ");
10629 destoffset = decode_rm10_address(rl);
10630@@ -10507,8 +11108,9 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10631 destval = fetch_data_long(destoffset);
10632 TRACE_AND_STEP();
10633 test_long(destval, srcval);
10634- } else {
10635- u16 destval,srcval;
10636+ }
10637+ else {
10638+ u16 destval, srcval;
10639
10640 DECODE_PRINTF("TEST\tWORD PTR ");
10641 destoffset = decode_rm10_address(rl);
10642@@ -10535,7 +11137,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10643 TRACE_AND_STEP();
10644 destval = not_long(destval);
10645 store_data_long(destoffset, destval);
10646- } else {
10647+ }
10648+ else {
10649 u16 destval;
10650
10651 DECODE_PRINTF("NOT\tWORD PTR ");
10652@@ -10558,7 +11161,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10653 TRACE_AND_STEP();
10654 destval = neg_long(destval);
10655 store_data_long(destoffset, destval);
10656- } else {
10657+ }
10658+ else {
10659 u16 destval;
10660
10661 DECODE_PRINTF("NEG\tWORD PTR ");
10662@@ -10580,7 +11184,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10663 destval = fetch_data_long(destoffset);
10664 TRACE_AND_STEP();
10665 mul_long(destval);
10666- } else {
10667+ }
10668+ else {
10669 u16 destval;
10670
10671 DECODE_PRINTF("MUL\tWORD PTR ");
10672@@ -10601,7 +11206,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10673 destval = fetch_data_long(destoffset);
10674 TRACE_AND_STEP();
10675 imul_long(destval);
10676- } else {
10677+ }
10678+ else {
10679 u16 destval;
10680
10681 DECODE_PRINTF("IMUL\tWORD PTR ");
10682@@ -10622,7 +11228,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10683 destval = fetch_data_long(destoffset);
10684 TRACE_AND_STEP();
10685 div_long(destval);
10686- } else {
10687+ }
10688+ else {
10689 u16 destval;
10690
10691 DECODE_PRINTF("DIV\tWORD PTR ");
10692@@ -10643,7 +11250,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10693 destval = fetch_data_long(destoffset);
10694 TRACE_AND_STEP();
10695 idiv_long(destval);
10696- } else {
10697+ }
10698+ else {
10699 u16 destval;
10700
10701 DECODE_PRINTF("IDIV\tWORD PTR ");
10702@@ -10656,9 +11264,9 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10703 break;
10704 }
10705 break; /* end mod==10 */
10706- case 3: /* mod=11 */
10707+ case 3: /* mod=11 */
10708 switch (rh) {
10709- case 0: /* test word imm */
10710+ case 0: /* test word imm */
10711 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10712 u32 *destreg;
10713 u32 srcval;
10714@@ -10670,7 +11278,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10715 DECODE_PRINTF2("%x\n", srcval);
10716 TRACE_AND_STEP();
10717 test_long(*destreg, srcval);
10718- } else {
10719+ }
10720+ else {
10721 u16 *destreg;
10722 u16 srcval;
10723
10724@@ -10696,7 +11305,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10725 DECODE_PRINTF("\n");
10726 TRACE_AND_STEP();
10727 *destreg = not_long(*destreg);
10728- } else {
10729+ }
10730+ else {
10731 u16 *destreg;
10732
10733 DECODE_PRINTF("NOT\t");
10734@@ -10715,7 +11325,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10735 DECODE_PRINTF("\n");
10736 TRACE_AND_STEP();
10737 *destreg = neg_long(*destreg);
10738- } else {
10739+ }
10740+ else {
10741 u16 *destreg;
10742
10743 DECODE_PRINTF("NEG\t");
10744@@ -10733,15 +11344,16 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10745 destreg = DECODE_RM_LONG_REGISTER(rl);
10746 DECODE_PRINTF("\n");
10747 TRACE_AND_STEP();
10748- mul_long(*destreg); /*!!! */
10749- } else {
10750+ mul_long(*destreg); /*!!! */
10751+ }
10752+ else {
10753 u16 *destreg;
10754
10755 DECODE_PRINTF("MUL\t");
10756 destreg = DECODE_RM_WORD_REGISTER(rl);
10757 DECODE_PRINTF("\n");
10758 TRACE_AND_STEP();
10759- mul_word(*destreg); /*!!! */
10760+ mul_word(*destreg); /*!!! */
10761 }
10762 break;
10763 case 5:
10764@@ -10753,7 +11365,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10765 DECODE_PRINTF("\n");
10766 TRACE_AND_STEP();
10767 imul_long(*destreg);
10768- } else {
10769+ }
10770+ else {
10771 u16 *destreg;
10772
10773 DECODE_PRINTF("IMUL\t");
10774@@ -10772,7 +11385,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10775 DECODE_PRINTF("\n");
10776 TRACE_AND_STEP();
10777 div_long(*destreg);
10778- } else {
10779+ }
10780+ else {
10781 u16 *destreg;
10782
10783 DECODE_PRINTF("DIV\t");
10784@@ -10791,7 +11405,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10785 DECODE_PRINTF("\n");
10786 TRACE_AND_STEP();
10787 idiv_long(*destreg);
10788- } else {
10789+ }
10790+ else {
10791 u16 *destreg;
10792
10793 DECODE_PRINTF("IDIV\t");
10794@@ -10812,7 +11427,8 @@ static void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
10795 REMARKS:
10796 Handles opcode 0xf8
10797 ****************************************************************************/
10798-static void x86emuOp_clc(u8 X86EMU_UNUSED(op1))
10799+static void
10800+x86emuOp_clc(u8 X86EMU_UNUSED(op1))
10801 {
10802 /* clear the carry flag. */
10803 START_OF_INSTR();
10804@@ -10827,7 +11443,8 @@ static void x86emuOp_clc(u8 X86EMU_UNUSED(op1))
10805 REMARKS:
10806 Handles opcode 0xf9
10807 ****************************************************************************/
10808-static void x86emuOp_stc(u8 X86EMU_UNUSED(op1))
10809+static void
10810+x86emuOp_stc(u8 X86EMU_UNUSED(op1))
10811 {
10812 /* set the carry flag. */
10813 START_OF_INSTR();
10814@@ -10842,7 +11459,8 @@ static void x86emuOp_stc(u8 X86EMU_UNUSED(op1))
10815 REMARKS:
10816 Handles opcode 0xfa
10817 ****************************************************************************/
10818-static void x86emuOp_cli(u8 X86EMU_UNUSED(op1))
10819+static void
10820+x86emuOp_cli(u8 X86EMU_UNUSED(op1))
10821 {
10822 /* clear interrupts. */
10823 START_OF_INSTR();
10824@@ -10857,7 +11475,8 @@ static void x86emuOp_cli(u8 X86EMU_UNUSED(op1))
10825 REMARKS:
10826 Handles opcode 0xfb
10827 ****************************************************************************/
10828-static void x86emuOp_sti(u8 X86EMU_UNUSED(op1))
10829+static void
10830+x86emuOp_sti(u8 X86EMU_UNUSED(op1))
10831 {
10832 /* enable interrupts. */
10833 START_OF_INSTR();
10834@@ -10872,7 +11491,8 @@ static void x86emuOp_sti(u8 X86EMU_UNUSED(op1))
10835 REMARKS:
10836 Handles opcode 0xfc
10837 ****************************************************************************/
10838-static void x86emuOp_cld(u8 X86EMU_UNUSED(op1))
10839+static void
10840+x86emuOp_cld(u8 X86EMU_UNUSED(op1))
10841 {
10842 /* clear interrupts. */
10843 START_OF_INSTR();
10844@@ -10887,7 +11507,8 @@ static void x86emuOp_cld(u8 X86EMU_UNUSED(op1))
10845 REMARKS:
10846 Handles opcode 0xfd
10847 ****************************************************************************/
10848-static void x86emuOp_std(u8 X86EMU_UNUSED(op1))
10849+static void
10850+x86emuOp_std(u8 X86EMU_UNUSED(op1))
10851 {
10852 /* clear interrupts. */
10853 START_OF_INSTR();
10854@@ -10902,7 +11523,8 @@ static void x86emuOp_std(u8 X86EMU_UNUSED(op1))
10855 REMARKS:
10856 Handles opcode 0xfe
10857 ****************************************************************************/
10858-static void x86emuOp_opcFE_byte_RM(u8 X86EMU_UNUSED(op1))
10859+static void
10860+x86emuOp_opcFE_byte_RM(u8 X86EMU_UNUSED(op1))
10861 {
10862 int mod, rh, rl;
10863 u8 destval;
10864@@ -10944,13 +11566,13 @@ static void x86emuOp_opcFE_byte_RM(u8 X86EMU_UNUSED(op1))
10865 destoffset = decode_rm00_address(rl);
10866 DECODE_PRINTF("\n");
10867 switch (rh) {
10868- case 0: /* inc word ptr ... */
10869+ case 0: /* inc word ptr ... */
10870 destval = fetch_data_byte(destoffset);
10871 TRACE_AND_STEP();
10872 destval = inc_byte(destval);
10873 store_data_byte(destoffset, destval);
10874 break;
10875- case 1: /* dec word ptr ... */
10876+ case 1: /* dec word ptr ... */
10877 destval = fetch_data_byte(destoffset);
10878 TRACE_AND_STEP();
10879 destval = dec_byte(destval);
10880@@ -11019,12 +11641,13 @@ static void x86emuOp_opcFE_byte_RM(u8 X86EMU_UNUSED(op1))
10881 REMARKS:
10882 Handles opcode 0xff
10883 ****************************************************************************/
10884-static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
10885+static void
10886+x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
10887 {
10888 int mod, rh, rl;
10889 uint destoffset = 0;
10890- u16 *destreg;
10891- u16 destval,destval2;
10892+ u16 *destreg;
10893+ u16 destval, destval2;
10894
10895 /* Yet another special case instruction. */
10896 START_OF_INSTR();
10897@@ -11040,14 +11663,16 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
10898 case 0:
10899 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10900 DECODE_PRINTF("INC\tDWORD PTR ");
10901- } else {
10902+ }
10903+ else {
10904 DECODE_PRINTF("INC\tWORD PTR ");
10905 }
10906 break;
10907 case 1:
10908 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10909 DECODE_PRINTF("DEC\tDWORD PTR ");
10910- } else {
10911+ }
10912+ else {
10913 DECODE_PRINTF("DEC\tWORD PTR ");
10914 }
10915 break;
10916@@ -11078,7 +11703,7 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
10917 destoffset = decode_rm00_address(rl);
10918 DECODE_PRINTF("\n");
10919 switch (rh) {
10920- case 0: /* inc word ptr ... */
10921+ case 0: /* inc word ptr ... */
10922 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10923 u32 destval;
10924
10925@@ -11086,7 +11711,8 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
10926 TRACE_AND_STEP();
10927 destval = inc_long(destval);
10928 store_data_long(destoffset, destval);
10929- } else {
10930+ }
10931+ else {
10932 u16 destval;
10933
10934 destval = fetch_data_word(destoffset);
10935@@ -11095,7 +11721,7 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
10936 store_data_word(destoffset, destval);
10937 }
10938 break;
10939- case 1: /* dec word ptr ... */
10940+ case 1: /* dec word ptr ... */
10941 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10942 u32 destval;
10943
10944@@ -11103,7 +11729,8 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
10945 TRACE_AND_STEP();
10946 destval = dec_long(destval);
10947 store_data_long(destoffset, destval);
10948- } else {
10949+ }
10950+ else {
10951 u16 destval;
10952
10953 destval = fetch_data_word(destoffset);
10954@@ -11112,13 +11739,13 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
10955 store_data_word(destoffset, destval);
10956 }
10957 break;
10958- case 2: /* call word ptr ... */
10959+ case 2: /* call word ptr ... */
10960 destval = fetch_data_word(destoffset);
10961 TRACE_AND_STEP();
10962 push_word(M.x86.R_IP);
10963 M.x86.R_IP = destval;
10964 break;
10965- case 3: /* call far ptr ... */
10966+ case 3: /* call far ptr ... */
10967 destval = fetch_data_word(destoffset);
10968 destval2 = fetch_data_word(destoffset + 2);
10969 TRACE_AND_STEP();
10970@@ -11127,26 +11754,27 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
10971 push_word(M.x86.R_IP);
10972 M.x86.R_IP = destval;
10973 break;
10974- case 4: /* jmp word ptr ... */
10975+ case 4: /* jmp word ptr ... */
10976 destval = fetch_data_word(destoffset);
10977 TRACE_AND_STEP();
10978 M.x86.R_IP = destval;
10979 break;
10980- case 5: /* jmp far ptr ... */
10981+ case 5: /* jmp far ptr ... */
10982 destval = fetch_data_word(destoffset);
10983 destval2 = fetch_data_word(destoffset + 2);
10984 TRACE_AND_STEP();
10985 M.x86.R_IP = destval;
10986 M.x86.R_CS = destval2;
10987 break;
10988- case 6: /* push word ptr ... */
10989+ case 6: /* push word ptr ... */
10990 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
10991 u32 destval;
10992
10993 destval = fetch_data_long(destoffset);
10994 TRACE_AND_STEP();
10995 push_long(destval);
10996- } else {
10997+ }
10998+ else {
10999 u16 destval;
11000
11001 destval = fetch_data_word(destoffset);
11002@@ -11168,7 +11796,8 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
11003 TRACE_AND_STEP();
11004 destval = inc_long(destval);
11005 store_data_long(destoffset, destval);
11006- } else {
11007+ }
11008+ else {
11009 u16 destval;
11010
11011 destval = fetch_data_word(destoffset);
11012@@ -11185,7 +11814,8 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
11013 TRACE_AND_STEP();
11014 destval = dec_long(destval);
11015 store_data_long(destoffset, destval);
11016- } else {
11017+ }
11018+ else {
11019 u16 destval;
11020
11021 destval = fetch_data_word(destoffset);
11022@@ -11194,13 +11824,13 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
11023 store_data_word(destoffset, destval);
11024 }
11025 break;
11026- case 2: /* call word ptr ... */
11027+ case 2: /* call word ptr ... */
11028 destval = fetch_data_word(destoffset);
11029 TRACE_AND_STEP();
11030 push_word(M.x86.R_IP);
11031 M.x86.R_IP = destval;
11032 break;
11033- case 3: /* call far ptr ... */
11034+ case 3: /* call far ptr ... */
11035 destval = fetch_data_word(destoffset);
11036 destval2 = fetch_data_word(destoffset + 2);
11037 TRACE_AND_STEP();
11038@@ -11209,26 +11839,27 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
11039 push_word(M.x86.R_IP);
11040 M.x86.R_IP = destval;
11041 break;
11042- case 4: /* jmp word ptr ... */
11043+ case 4: /* jmp word ptr ... */
11044 destval = fetch_data_word(destoffset);
11045 TRACE_AND_STEP();
11046 M.x86.R_IP = destval;
11047 break;
11048- case 5: /* jmp far ptr ... */
11049+ case 5: /* jmp far ptr ... */
11050 destval = fetch_data_word(destoffset);
11051 destval2 = fetch_data_word(destoffset + 2);
11052 TRACE_AND_STEP();
11053 M.x86.R_IP = destval;
11054 M.x86.R_CS = destval2;
11055 break;
11056- case 6: /* push word ptr ... */
11057+ case 6: /* push word ptr ... */
11058 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
11059 u32 destval;
11060
11061 destval = fetch_data_long(destoffset);
11062 TRACE_AND_STEP();
11063 push_long(destval);
11064- } else {
11065+ }
11066+ else {
11067 u16 destval;
11068
11069 destval = fetch_data_word(destoffset);
11070@@ -11250,7 +11881,8 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
11071 TRACE_AND_STEP();
11072 destval = inc_long(destval);
11073 store_data_long(destoffset, destval);
11074- } else {
11075+ }
11076+ else {
11077 u16 destval;
11078
11079 destval = fetch_data_word(destoffset);
11080@@ -11267,7 +11899,8 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
11081 TRACE_AND_STEP();
11082 destval = dec_long(destval);
11083 store_data_long(destoffset, destval);
11084- } else {
11085+ }
11086+ else {
11087 u16 destval;
11088
11089 destval = fetch_data_word(destoffset);
11090@@ -11276,13 +11909,13 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
11091 store_data_word(destoffset, destval);
11092 }
11093 break;
11094- case 2: /* call word ptr ... */
11095+ case 2: /* call word ptr ... */
11096 destval = fetch_data_word(destoffset);
11097 TRACE_AND_STEP();
11098 push_word(M.x86.R_IP);
11099 M.x86.R_IP = destval;
11100 break;
11101- case 3: /* call far ptr ... */
11102+ case 3: /* call far ptr ... */
11103 destval = fetch_data_word(destoffset);
11104 destval2 = fetch_data_word(destoffset + 2);
11105 TRACE_AND_STEP();
11106@@ -11291,26 +11924,27 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
11107 push_word(M.x86.R_IP);
11108 M.x86.R_IP = destval;
11109 break;
11110- case 4: /* jmp word ptr ... */
11111+ case 4: /* jmp word ptr ... */
11112 destval = fetch_data_word(destoffset);
11113 TRACE_AND_STEP();
11114 M.x86.R_IP = destval;
11115 break;
11116- case 5: /* jmp far ptr ... */
11117+ case 5: /* jmp far ptr ... */
11118 destval = fetch_data_word(destoffset);
11119 destval2 = fetch_data_word(destoffset + 2);
11120 TRACE_AND_STEP();
11121 M.x86.R_IP = destval;
11122 M.x86.R_CS = destval2;
11123 break;
11124- case 6: /* push word ptr ... */
11125+ case 6: /* push word ptr ... */
11126 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
11127 u32 destval;
11128
11129 destval = fetch_data_long(destoffset);
11130 TRACE_AND_STEP();
11131 push_long(destval);
11132- } else {
11133+ }
11134+ else {
11135 u16 destval;
11136
11137 destval = fetch_data_word(destoffset);
11138@@ -11330,7 +11964,8 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
11139 DECODE_PRINTF("\n");
11140 TRACE_AND_STEP();
11141 *destreg = inc_long(*destreg);
11142- } else {
11143+ }
11144+ else {
11145 u16 *destreg;
11146
11147 destreg = DECODE_RM_WORD_REGISTER(rl);
11148@@ -11347,7 +11982,8 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
11149 DECODE_PRINTF("\n");
11150 TRACE_AND_STEP();
11151 *destreg = dec_long(*destreg);
11152- } else {
11153+ }
11154+ else {
11155 u16 *destreg;
11156
11157 destreg = DECODE_RM_WORD_REGISTER(rl);
11158@@ -11356,26 +11992,26 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
11159 *destreg = dec_word(*destreg);
11160 }
11161 break;
11162- case 2: /* call word ptr ... */
11163+ case 2: /* call word ptr ... */
11164 destreg = DECODE_RM_WORD_REGISTER(rl);
11165 DECODE_PRINTF("\n");
11166 TRACE_AND_STEP();
11167 push_word(M.x86.R_IP);
11168 M.x86.R_IP = *destreg;
11169 break;
11170- case 3: /* jmp far ptr ... */
11171+ case 3: /* jmp far ptr ... */
11172 DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n");
11173 TRACE_AND_STEP();
11174 HALT_SYS();
11175 break;
11176
11177- case 4: /* jmp ... */
11178+ case 4: /* jmp ... */
11179 destreg = DECODE_RM_WORD_REGISTER(rl);
11180 DECODE_PRINTF("\n");
11181 TRACE_AND_STEP();
11182 M.x86.R_IP = (u16) (*destreg);
11183 break;
11184- case 5: /* jmp far ptr ... */
11185+ case 5: /* jmp far ptr ... */
11186 DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n");
11187 TRACE_AND_STEP();
11188 HALT_SYS();
11189@@ -11388,7 +12024,8 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
11190 DECODE_PRINTF("\n");
11191 TRACE_AND_STEP();
11192 push_long(*destreg);
11193- } else {
11194+ }
11195+ else {
11196 u16 *destreg;
11197
11198 destreg = DECODE_RM_WORD_REGISTER(rl);
11199@@ -11407,8 +12044,7 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
11200 /***************************************************************************
11201 * Single byte operation code table:
11202 **************************************************************************/
11203-void (*x86emu_optab[256])(u8) =
11204-{
11205+void (*x86emu_optab[256]) (u8) = {
11206 /* 0x00 */ x86emuOp_add_byte_RM_R,
11207 /* 0x01 */ x86emuOp_add_word_RM_R,
11208 /* 0x02 */ x86emuOp_add_byte_R_RM,
11209@@ -11417,7 +12053,6 @@ void (*x86emu_optab[256])(u8) =
11210 /* 0x05 */ x86emuOp_add_word_AX_IMM,
11211 /* 0x06 */ x86emuOp_push_ES,
11212 /* 0x07 */ x86emuOp_pop_ES,
11213-
11214 /* 0x08 */ x86emuOp_or_byte_RM_R,
11215 /* 0x09 */ x86emuOp_or_word_RM_R,
11216 /* 0x0a */ x86emuOp_or_byte_R_RM,
11217@@ -11426,7 +12061,6 @@ void (*x86emu_optab[256])(u8) =
11218 /* 0x0d */ x86emuOp_or_word_AX_IMM,
11219 /* 0x0e */ x86emuOp_push_CS,
11220 /* 0x0f */ x86emuOp_two_byte,
11221-
11222 /* 0x10 */ x86emuOp_adc_byte_RM_R,
11223 /* 0x11 */ x86emuOp_adc_word_RM_R,
11224 /* 0x12 */ x86emuOp_adc_byte_R_RM,
11225@@ -11435,7 +12069,6 @@ void (*x86emu_optab[256])(u8) =
11226 /* 0x15 */ x86emuOp_adc_word_AX_IMM,
11227 /* 0x16 */ x86emuOp_push_SS,
11228 /* 0x17 */ x86emuOp_pop_SS,
11229-
11230 /* 0x18 */ x86emuOp_sbb_byte_RM_R,
11231 /* 0x19 */ x86emuOp_sbb_word_RM_R,
11232 /* 0x1a */ x86emuOp_sbb_byte_R_RM,
11233@@ -11444,7 +12077,6 @@ void (*x86emu_optab[256])(u8) =
11234 /* 0x1d */ x86emuOp_sbb_word_AX_IMM,
11235 /* 0x1e */ x86emuOp_push_DS,
11236 /* 0x1f */ x86emuOp_pop_DS,
11237-
11238 /* 0x20 */ x86emuOp_and_byte_RM_R,
11239 /* 0x21 */ x86emuOp_and_word_RM_R,
11240 /* 0x22 */ x86emuOp_and_byte_R_RM,
11241@@ -11453,7 +12085,6 @@ void (*x86emu_optab[256])(u8) =
11242 /* 0x25 */ x86emuOp_and_word_AX_IMM,
11243 /* 0x26 */ x86emuOp_segovr_ES,
11244 /* 0x27 */ x86emuOp_daa,
11245-
11246 /* 0x28 */ x86emuOp_sub_byte_RM_R,
11247 /* 0x29 */ x86emuOp_sub_word_RM_R,
11248 /* 0x2a */ x86emuOp_sub_byte_R_RM,
11249@@ -11462,7 +12093,6 @@ void (*x86emu_optab[256])(u8) =
11250 /* 0x2d */ x86emuOp_sub_word_AX_IMM,
11251 /* 0x2e */ x86emuOp_segovr_CS,
11252 /* 0x2f */ x86emuOp_das,
11253-
11254 /* 0x30 */ x86emuOp_xor_byte_RM_R,
11255 /* 0x31 */ x86emuOp_xor_word_RM_R,
11256 /* 0x32 */ x86emuOp_xor_byte_R_RM,
11257@@ -11471,7 +12101,6 @@ void (*x86emu_optab[256])(u8) =
11258 /* 0x35 */ x86emuOp_xor_word_AX_IMM,
11259 /* 0x36 */ x86emuOp_segovr_SS,
11260 /* 0x37 */ x86emuOp_aaa,
11261-
11262 /* 0x38 */ x86emuOp_cmp_byte_RM_R,
11263 /* 0x39 */ x86emuOp_cmp_word_RM_R,
11264 /* 0x3a */ x86emuOp_cmp_byte_R_RM,
11265@@ -11480,7 +12109,6 @@ void (*x86emu_optab[256])(u8) =
11266 /* 0x3d */ x86emuOp_cmp_word_AX_IMM,
11267 /* 0x3e */ x86emuOp_segovr_DS,
11268 /* 0x3f */ x86emuOp_aas,
11269-
11270 /* 0x40 */ x86emuOp_inc_AX,
11271 /* 0x41 */ x86emuOp_inc_CX,
11272 /* 0x42 */ x86emuOp_inc_DX,
11273@@ -11489,7 +12117,6 @@ void (*x86emu_optab[256])(u8) =
11274 /* 0x45 */ x86emuOp_inc_BP,
11275 /* 0x46 */ x86emuOp_inc_SI,
11276 /* 0x47 */ x86emuOp_inc_DI,
11277-
11278 /* 0x48 */ x86emuOp_dec_AX,
11279 /* 0x49 */ x86emuOp_dec_CX,
11280 /* 0x4a */ x86emuOp_dec_DX,
11281@@ -11498,7 +12125,6 @@ void (*x86emu_optab[256])(u8) =
11282 /* 0x4d */ x86emuOp_dec_BP,
11283 /* 0x4e */ x86emuOp_dec_SI,
11284 /* 0x4f */ x86emuOp_dec_DI,
11285-
11286 /* 0x50 */ x86emuOp_push_AX,
11287 /* 0x51 */ x86emuOp_push_CX,
11288 /* 0x52 */ x86emuOp_push_DX,
11289@@ -11507,7 +12133,6 @@ void (*x86emu_optab[256])(u8) =
11290 /* 0x55 */ x86emuOp_push_BP,
11291 /* 0x56 */ x86emuOp_push_SI,
11292 /* 0x57 */ x86emuOp_push_DI,
11293-
11294 /* 0x58 */ x86emuOp_pop_AX,
11295 /* 0x59 */ x86emuOp_pop_CX,
11296 /* 0x5a */ x86emuOp_pop_DX,
11297@@ -11516,16 +12141,16 @@ void (*x86emu_optab[256])(u8) =
11298 /* 0x5d */ x86emuOp_pop_BP,
11299 /* 0x5e */ x86emuOp_pop_SI,
11300 /* 0x5f */ x86emuOp_pop_DI,
11301-
11302 /* 0x60 */ x86emuOp_push_all,
11303 /* 0x61 */ x86emuOp_pop_all,
11304-/* 0x62 */ x86emuOp_illegal_op, /* bound */
11305-/* 0x63 */ x86emuOp_illegal_op, /* arpl */
11306+ /* 0x62 */ x86emuOp_illegal_op,
11307+ /* bound */
11308+ /* 0x63 */ x86emuOp_illegal_op,
11309+ /* arpl */
11310 /* 0x64 */ x86emuOp_segovr_FS,
11311 /* 0x65 */ x86emuOp_segovr_GS,
11312 /* 0x66 */ x86emuOp_prefix_data,
11313 /* 0x67 */ x86emuOp_prefix_addr,
11314-
11315 /* 0x68 */ x86emuOp_push_word_IMM,
11316 /* 0x69 */ x86emuOp_imul_word_IMM,
11317 /* 0x6a */ x86emuOp_push_byte_IMM,
11318@@ -11534,7 +12159,6 @@ void (*x86emu_optab[256])(u8) =
11319 /* 0x6d */ x86emuOp_ins_word,
11320 /* 0x6e */ x86emuOp_outs_byte,
11321 /* 0x6f */ x86emuOp_outs_word,
11322-
11323 /* 0x70 */ x86emuOp_jump_near_O,
11324 /* 0x71 */ x86emuOp_jump_near_NO,
11325 /* 0x72 */ x86emuOp_jump_near_B,
11326@@ -11543,7 +12167,6 @@ void (*x86emu_optab[256])(u8) =
11327 /* 0x75 */ x86emuOp_jump_near_NZ,
11328 /* 0x76 */ x86emuOp_jump_near_BE,
11329 /* 0x77 */ x86emuOp_jump_near_NBE,
11330-
11331 /* 0x78 */ x86emuOp_jump_near_S,
11332 /* 0x79 */ x86emuOp_jump_near_NS,
11333 /* 0x7a */ x86emuOp_jump_near_P,
11334@@ -11552,7 +12175,6 @@ void (*x86emu_optab[256])(u8) =
11335 /* 0x7d */ x86emuOp_jump_near_NL,
11336 /* 0x7e */ x86emuOp_jump_near_LE,
11337 /* 0x7f */ x86emuOp_jump_near_NLE,
11338-
11339 /* 0x80 */ x86emuOp_opc80_byte_RM_IMM,
11340 /* 0x81 */ x86emuOp_opc81_word_RM_IMM,
11341 /* 0x82 */ x86emuOp_opc82_byte_RM_IMM,
11342@@ -11561,7 +12183,6 @@ void (*x86emu_optab[256])(u8) =
11343 /* 0x85 */ x86emuOp_test_word_RM_R,
11344 /* 0x86 */ x86emuOp_xchg_byte_RM_R,
11345 /* 0x87 */ x86emuOp_xchg_word_RM_R,
11346-
11347 /* 0x88 */ x86emuOp_mov_byte_RM_R,
11348 /* 0x89 */ x86emuOp_mov_word_RM_R,
11349 /* 0x8a */ x86emuOp_mov_byte_R_RM,
11350@@ -11570,7 +12191,6 @@ void (*x86emu_optab[256])(u8) =
11351 /* 0x8d */ x86emuOp_lea_word_R_M,
11352 /* 0x8e */ x86emuOp_mov_word_SR_RM,
11353 /* 0x8f */ x86emuOp_pop_RM,
11354-
11355 /* 0x90 */ x86emuOp_nop,
11356 /* 0x91 */ x86emuOp_xchg_word_AX_CX,
11357 /* 0x92 */ x86emuOp_xchg_word_AX_DX,
11358@@ -11579,7 +12199,6 @@ void (*x86emu_optab[256])(u8) =
11359 /* 0x95 */ x86emuOp_xchg_word_AX_BP,
11360 /* 0x96 */ x86emuOp_xchg_word_AX_SI,
11361 /* 0x97 */ x86emuOp_xchg_word_AX_DI,
11362-
11363 /* 0x98 */ x86emuOp_cbw,
11364 /* 0x99 */ x86emuOp_cwd,
11365 /* 0x9a */ x86emuOp_call_far_IMM,
11366@@ -11588,7 +12207,6 @@ void (*x86emu_optab[256])(u8) =
11367 /* 0x9d */ x86emuOp_popf_word,
11368 /* 0x9e */ x86emuOp_sahf,
11369 /* 0x9f */ x86emuOp_lahf,
11370-
11371 /* 0xa0 */ x86emuOp_mov_AL_M_IMM,
11372 /* 0xa1 */ x86emuOp_mov_AX_M_IMM,
11373 /* 0xa2 */ x86emuOp_mov_M_AL_IMM,
11374@@ -11605,8 +12223,6 @@ void (*x86emu_optab[256])(u8) =
11375 /* 0xad */ x86emuOp_lods_word,
11376 /* 0xac */ x86emuOp_scas_byte,
11377 /* 0xad */ x86emuOp_scas_word,
11378-
11379-
11380 /* 0xb0 */ x86emuOp_mov_byte_AL_IMM,
11381 /* 0xb1 */ x86emuOp_mov_byte_CL_IMM,
11382 /* 0xb2 */ x86emuOp_mov_byte_DL_IMM,
11383@@ -11615,7 +12231,6 @@ void (*x86emu_optab[256])(u8) =
11384 /* 0xb5 */ x86emuOp_mov_byte_CH_IMM,
11385 /* 0xb6 */ x86emuOp_mov_byte_DH_IMM,
11386 /* 0xb7 */ x86emuOp_mov_byte_BH_IMM,
11387-
11388 /* 0xb8 */ x86emuOp_mov_word_AX_IMM,
11389 /* 0xb9 */ x86emuOp_mov_word_CX_IMM,
11390 /* 0xba */ x86emuOp_mov_word_DX_IMM,
11391@@ -11624,7 +12239,6 @@ void (*x86emu_optab[256])(u8) =
11392 /* 0xbd */ x86emuOp_mov_word_BP_IMM,
11393 /* 0xbe */ x86emuOp_mov_word_SI_IMM,
11394 /* 0xbf */ x86emuOp_mov_word_DI_IMM,
11395-
11396 /* 0xc0 */ x86emuOp_opcC0_byte_RM_MEM,
11397 /* 0xc1 */ x86emuOp_opcC1_word_RM_MEM,
11398 /* 0xc2 */ x86emuOp_ret_near_IMM,
11399@@ -11641,14 +12255,14 @@ void (*x86emu_optab[256])(u8) =
11400 /* 0xcd */ x86emuOp_int_IMM,
11401 /* 0xce */ x86emuOp_into,
11402 /* 0xcf */ x86emuOp_iret,
11403-
11404 /* 0xd0 */ x86emuOp_opcD0_byte_RM_1,
11405 /* 0xd1 */ x86emuOp_opcD1_word_RM_1,
11406 /* 0xd2 */ x86emuOp_opcD2_byte_RM_CL,
11407 /* 0xd3 */ x86emuOp_opcD3_word_RM_CL,
11408 /* 0xd4 */ x86emuOp_aam,
11409 /* 0xd5 */ x86emuOp_aad,
11410-/* 0xd6 */ x86emuOp_illegal_op, /* Undocumented SETALC instruction */
11411+ /* 0xd6 */ x86emuOp_illegal_op,
11412+ /* Undocumented SETALC instruction */
11413 /* 0xd7 */ x86emuOp_xlat,
11414 /* 0xd8 */ x86emuOp_esc_coprocess_d8,
11415 /* 0xd9 */ x86emuOp_esc_coprocess_d9,
11416@@ -11658,7 +12272,6 @@ void (*x86emu_optab[256])(u8) =
11417 /* 0xdd */ x86emuOp_esc_coprocess_dd,
11418 /* 0xde */ x86emuOp_esc_coprocess_de,
11419 /* 0xdf */ x86emuOp_esc_coprocess_df,
11420-
11421 /* 0xe0 */ x86emuOp_loopne,
11422 /* 0xe1 */ x86emuOp_loope,
11423 /* 0xe2 */ x86emuOp_loop,
11424@@ -11667,7 +12280,6 @@ void (*x86emu_optab[256])(u8) =
11425 /* 0xe5 */ x86emuOp_in_word_AX_IMM,
11426 /* 0xe6 */ x86emuOp_out_byte_IMM_AL,
11427 /* 0xe7 */ x86emuOp_out_word_IMM_AX,
11428-
11429 /* 0xe8 */ x86emuOp_call_near_IMM,
11430 /* 0xe9 */ x86emuOp_jump_near_IMM,
11431 /* 0xea */ x86emuOp_jump_far_IMM,
11432@@ -11676,7 +12288,6 @@ void (*x86emu_optab[256])(u8) =
11433 /* 0xed */ x86emuOp_in_word_AX_DX,
11434 /* 0xee */ x86emuOp_out_byte_DX_AL,
11435 /* 0xef */ x86emuOp_out_word_DX_AX,
11436-
11437 /* 0xf0 */ x86emuOp_lock,
11438 /* 0xf1 */ x86emuOp_illegal_op,
11439 /* 0xf2 */ x86emuOp_repne,
11440@@ -11685,7 +12296,6 @@ void (*x86emu_optab[256])(u8) =
11441 /* 0xf5 */ x86emuOp_cmc,
11442 /* 0xf6 */ x86emuOp_opcF6_byte_RM,
11443 /* 0xf7 */ x86emuOp_opcF7_word_RM,
11444-
11445 /* 0xf8 */ x86emuOp_clc,
11446 /* 0xf9 */ x86emuOp_stc,
11447 /* 0xfa */ x86emuOp_cli,
11448diff --git a/libs/x86emu/ops2.c b/libs/x86emu/ops2.c
11449index 06b7f56..5ed2bf6 100644
11450--- a/libs/x86emu/ops2.c
11451+++ b/libs/x86emu/ops2.c
11452@@ -55,16 +55,14 @@ op1 - Instruction op code
11453 REMARKS:
11454 Handles illegal opcodes.
11455 ****************************************************************************/
11456-static void x86emuOp2_illegal_op(
11457- u8 op2)
11458+static void
11459+x86emuOp2_illegal_op(u8 op2)
11460 {
11461- int mod, rl, rh;
11462- START_OF_INSTR();
11463- FETCH_DECODE_MODRM(mod, rh, rl);
11464- DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
11465- TRACE_REGS();
11466- printk("%04x:%04x: %02X /%d ILLEGAL EXTENDED X86 OPCODE! (mod=%d rl=%d)\n",
11467- M.x86.R_CS, M.x86.R_IP-2,op2, rh, mod, rl);
11468+ START_OF_INSTR();
11469+ DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
11470+ TRACE_REGS();
11471+ printk("%04x:%04x: %02X ILLEGAL EXTENDED X86 OPCODE!\n",
11472+ M.x86.R_CS, M.x86.R_IP - 2, op2);
11473 HALT_SYS();
11474 END_OF_INSTR();
11475 }
11476@@ -73,55 +71,10 @@ static void x86emuOp2_illegal_op(
11477
11478 /****************************************************************************
11479 REMARKS:
11480-Handles opcode 0x0f,0x01
11481-****************************************************************************/
11482-static void x86emuOp2_group_g(u8 X86EMU_UNUSED(op2))
11483-{
11484- int mod, rl, rh;
11485- u16 *destreg;
11486- uint destoffset;
11487-
11488- START_OF_INSTR();
11489- FETCH_DECODE_MODRM(mod, rh, rl);
11490- switch (rh) {
11491- case 4: // SMSW (Store Machine Status Word)
11492- // Decode the mod byte to find the addressing
11493- // Always returns 0x10 (initial value as per intel manual volume 3, figure 8-1
11494- switch (mod) {
11495- case 0:
11496- destoffset = decode_rm00_address(rl);
11497- store_data_word(destoffset, 0x10);
11498- break;
11499- case 1:
11500- destoffset = decode_rm01_address(rl);
11501- store_data_word(destoffset, 0x10);
11502- break;
11503- case 2:
11504- destoffset = decode_rm10_address(rl);
11505- store_data_word(destoffset, 0x10);
11506- break;
11507- case 3:
11508- destreg = DECODE_RM_WORD_REGISTER(rl);
11509- *destreg = 0x10;
11510- break;
11511- }
11512- break;
11513- default:
11514- DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE IN 0F 01\n");
11515- TRACE_REGS();
11516- printk("%04x:%04x: 0F %02X /%d ILLEGAL EXTENDED X86 OPCODE! (mod=%d rl=%d)\n",
11517- M.x86.R_CS, M.x86.R_IP-2,op2, rh, mod, rl);
11518- HALT_SYS();
11519- break;
11520- }
11521- END_OF_INSTR();
11522-}
11523-
11524-/****************************************************************************
11525-REMARKS:
11526 Handles opcode 0x0f,0x31
11527 ****************************************************************************/
11528-static void x86emuOp2_rdtsc(u8 X86EMU_UNUSED(op2))
11529+static void
11530+x86emuOp2_rdtsc(u8 X86EMU_UNUSED(op2))
11531 {
11532 #ifdef __HAS_LONG_LONG__
11533 static u64 counter = 0;
11534@@ -155,90 +108,91 @@ static void x86emuOp2_rdtsc(u8 X86EMU_UNUSED(op2))
11535 REMARKS:
11536 Handles opcode 0x0f,0x80-0x8F
11537 ****************************************************************************/
11538-static void x86emuOp2_long_jump(u8 op2)
11539+static void
11540+x86emuOp2_long_jump(u8 op2)
11541 {
11542 s32 target;
11543- char *name = 0;
11544+ const char *name = NULL;
11545 int cond = 0;
11546
11547 /* conditional jump to word offset. */
11548 START_OF_INSTR();
11549 switch (op2) {
11550- case 0x80:
11551+ case 0x80:
11552 name = "JO\t";
11553- cond = ACCESS_FLAG(F_OF);
11554+ cond = ACCESS_FLAG(F_OF);
11555 break;
11556- case 0x81:
11557+ case 0x81:
11558 name = "JNO\t";
11559 cond = !ACCESS_FLAG(F_OF);
11560 break;
11561- case 0x82:
11562+ case 0x82:
11563 name = "JB\t";
11564 cond = ACCESS_FLAG(F_CF);
11565 break;
11566- case 0x83:
11567+ case 0x83:
11568 name = "JNB\t";
11569 cond = !ACCESS_FLAG(F_CF);
11570 break;
11571- case 0x84:
11572+ case 0x84:
11573 name = "JZ\t";
11574 cond = ACCESS_FLAG(F_ZF);
11575 break;
11576- case 0x85:
11577+ case 0x85:
11578 name = "JNZ\t";
11579 cond = !ACCESS_FLAG(F_ZF);
11580 break;
11581- case 0x86:
11582+ case 0x86:
11583 name = "JBE\t";
11584 cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
11585 break;
11586- case 0x87:
11587+ case 0x87:
11588 name = "JNBE\t";
11589 cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
11590 break;
11591- case 0x88:
11592+ case 0x88:
11593 name = "JS\t";
11594 cond = ACCESS_FLAG(F_SF);
11595 break;
11596- case 0x89:
11597+ case 0x89:
11598 name = "JNS\t";
11599 cond = !ACCESS_FLAG(F_SF);
11600 break;
11601- case 0x8a:
11602+ case 0x8a:
11603 name = "JP\t";
11604 cond = ACCESS_FLAG(F_PF);
11605 break;
11606- case 0x8b:
11607+ case 0x8b:
11608 name = "JNP\t";
11609 cond = !ACCESS_FLAG(F_PF);
11610 break;
11611- case 0x8c:
11612+ case 0x8c:
11613 name = "JL\t";
11614 cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
11615 break;
11616- case 0x8d:
11617+ case 0x8d:
11618 name = "JNL\t";
11619 cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)));
11620 break;
11621- case 0x8e:
11622+ case 0x8e:
11623 name = "JLE\t";
11624 cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
11625 ACCESS_FLAG(F_ZF));
11626 break;
11627- case 0x8f:
11628+ case 0x8f:
11629 name = "JNLE\t";
11630 cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
11631 ACCESS_FLAG(F_ZF));
11632 break;
11633 }
11634 DECODE_PRINTF(name);
11635- (void)name;
11636+ (void) name;
11637 target = (s16) fetch_word_imm();
11638 target += (s16) M.x86.R_IP;
11639 DECODE_PRINTF2("%04x\n", target);
11640 TRACE_AND_STEP();
11641 if (cond)
11642- M.x86.R_IP = (u16)target;
11643+ M.x86.R_IP = (u16) target;
11644 DECODE_CLEAR_SEGOVR();
11645 END_OF_INSTR();
11646 }
11647@@ -247,85 +201,86 @@ static void x86emuOp2_long_jump(u8 op2)
11648 REMARKS:
11649 Handles opcode 0x0f,0x90-0x9F
11650 ****************************************************************************/
11651-static void x86emuOp2_set_byte(u8 op2)
11652+static void
11653+x86emuOp2_set_byte(u8 op2)
11654 {
11655 int mod, rl, rh;
11656 uint destoffset;
11657- u8 *destreg;
11658- char *name = 0;
11659+ u8 *destreg;
11660+ const char *name = NULL;
11661 int cond = 0;
11662
11663 START_OF_INSTR();
11664 switch (op2) {
11665- case 0x90:
11666+ case 0x90:
11667 name = "SETO\t";
11668- cond = ACCESS_FLAG(F_OF);
11669+ cond = ACCESS_FLAG(F_OF);
11670 break;
11671- case 0x91:
11672+ case 0x91:
11673 name = "SETNO\t";
11674 cond = !ACCESS_FLAG(F_OF);
11675 break;
11676- case 0x92:
11677+ case 0x92:
11678 name = "SETB\t";
11679 cond = ACCESS_FLAG(F_CF);
11680 break;
11681- case 0x93:
11682+ case 0x93:
11683 name = "SETNB\t";
11684 cond = !ACCESS_FLAG(F_CF);
11685 break;
11686- case 0x94:
11687+ case 0x94:
11688 name = "SETZ\t";
11689 cond = ACCESS_FLAG(F_ZF);
11690 break;
11691- case 0x95:
11692+ case 0x95:
11693 name = "SETNZ\t";
11694 cond = !ACCESS_FLAG(F_ZF);
11695 break;
11696- case 0x96:
11697+ case 0x96:
11698 name = "SETBE\t";
11699 cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
11700 break;
11701- case 0x97:
11702+ case 0x97:
11703 name = "SETNBE\t";
11704 cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
11705 break;
11706- case 0x98:
11707+ case 0x98:
11708 name = "SETS\t";
11709 cond = ACCESS_FLAG(F_SF);
11710 break;
11711- case 0x99:
11712+ case 0x99:
11713 name = "SETNS\t";
11714 cond = !ACCESS_FLAG(F_SF);
11715 break;
11716- case 0x9a:
11717+ case 0x9a:
11718 name = "SETP\t";
11719 cond = ACCESS_FLAG(F_PF);
11720 break;
11721- case 0x9b:
11722+ case 0x9b:
11723 name = "SETNP\t";
11724 cond = !ACCESS_FLAG(F_PF);
11725 break;
11726- case 0x9c:
11727+ case 0x9c:
11728 name = "SETL\t";
11729 cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
11730 break;
11731- case 0x9d:
11732+ case 0x9d:
11733 name = "SETNL\t";
11734 cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
11735 break;
11736- case 0x9e:
11737+ case 0x9e:
11738 name = "SETLE\t";
11739 cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
11740 ACCESS_FLAG(F_ZF));
11741 break;
11742- case 0x9f:
11743+ case 0x9f:
11744 name = "SETNLE\t";
11745 cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
11746 ACCESS_FLAG(F_ZF));
11747 break;
11748 }
11749 DECODE_PRINTF(name);
11750- (void)name;
11751+ (void) name;
11752 FETCH_DECODE_MODRM(mod, rh, rl);
11753 switch (mod) {
11754 case 0:
11755@@ -343,7 +298,7 @@ static void x86emuOp2_set_byte(u8 op2)
11756 TRACE_AND_STEP();
11757 store_data_byte(destoffset, cond ? 0x01 : 0x00);
11758 break;
11759- case 3: /* register to register */
11760+ case 3: /* register to register */
11761 destreg = DECODE_RM_BYTE_REGISTER(rl);
11762 TRACE_AND_STEP();
11763 *destreg = cond ? 0x01 : 0x00;
11764@@ -357,7 +312,8 @@ static void x86emuOp2_set_byte(u8 op2)
11765 REMARKS:
11766 Handles opcode 0x0f,0xa0
11767 ****************************************************************************/
11768-static void x86emuOp2_push_FS(u8 X86EMU_UNUSED(op2))
11769+static void
11770+x86emuOp2_push_FS(u8 X86EMU_UNUSED(op2))
11771 {
11772 START_OF_INSTR();
11773 DECODE_PRINTF("PUSH\tFS\n");
11774@@ -371,7 +327,8 @@ static void x86emuOp2_push_FS(u8 X86EMU_UNUSED(op2))
11775 REMARKS:
11776 Handles opcode 0x0f,0xa1
11777 ****************************************************************************/
11778-static void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
11779+static void
11780+x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
11781 {
11782 START_OF_INSTR();
11783 DECODE_PRINTF("POP\tFS\n");
11784@@ -385,7 +342,8 @@ static void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
11785 REMARKS: CPUID takes EAX/ECX as inputs, writes EAX/EBX/ECX/EDX as output
11786 Handles opcode 0x0f,0xa2
11787 ****************************************************************************/
11788-static void x86emuOp2_cpuid(u8 X86EMU_UNUSED(op2))
11789+static void
11790+x86emuOp2_cpuid(u8 X86EMU_UNUSED(op2))
11791 {
11792 START_OF_INSTR();
11793 DECODE_PRINTF("CPUID\n");
11794@@ -399,11 +357,12 @@ static void x86emuOp2_cpuid(u8 X86EMU_UNUSED(op2))
11795 REMARKS:
11796 Handles opcode 0x0f,0xa3
11797 ****************************************************************************/
11798-static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
11799+static void
11800+x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
11801 {
11802 int mod, rl, rh;
11803 uint srcoffset;
11804- int bit,disp;
11805+ int bit, disp;
11806
11807 START_OF_INSTR();
11808 DECODE_PRINTF("BT\t");
11809@@ -419,10 +378,11 @@ static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
11810 shiftreg = DECODE_RM_LONG_REGISTER(rh);
11811 TRACE_AND_STEP();
11812 bit = *shiftreg & 0x1F;
11813- disp = (s16)*shiftreg >> 5;
11814- srcval = fetch_data_long(srcoffset+disp);
11815- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
11816- } else {
11817+ disp = (s16) * shiftreg >> 5;
11818+ srcval = fetch_data_long(srcoffset + disp);
11819+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit), F_CF);
11820+ }
11821+ else {
11822 u16 srcval;
11823 u16 *shiftreg;
11824
11825@@ -431,9 +391,9 @@ static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
11826 shiftreg = DECODE_RM_WORD_REGISTER(rh);
11827 TRACE_AND_STEP();
11828 bit = *shiftreg & 0xF;
11829- disp = (s16)*shiftreg >> 4;
11830- srcval = fetch_data_word(srcoffset+disp);
11831- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
11832+ disp = (s16) * shiftreg >> 4;
11833+ srcval = fetch_data_word(srcoffset + disp);
11834+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit), F_CF);
11835 }
11836 break;
11837 case 1:
11838@@ -446,10 +406,11 @@ static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
11839 shiftreg = DECODE_RM_LONG_REGISTER(rh);
11840 TRACE_AND_STEP();
11841 bit = *shiftreg & 0x1F;
11842- disp = (s16)*shiftreg >> 5;
11843- srcval = fetch_data_long(srcoffset+disp);
11844- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
11845- } else {
11846+ disp = (s16) * shiftreg >> 5;
11847+ srcval = fetch_data_long(srcoffset + disp);
11848+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit), F_CF);
11849+ }
11850+ else {
11851 u16 srcval;
11852 u16 *shiftreg;
11853
11854@@ -458,9 +419,9 @@ static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
11855 shiftreg = DECODE_RM_WORD_REGISTER(rh);
11856 TRACE_AND_STEP();
11857 bit = *shiftreg & 0xF;
11858- disp = (s16)*shiftreg >> 4;
11859- srcval = fetch_data_word(srcoffset+disp);
11860- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
11861+ disp = (s16) * shiftreg >> 4;
11862+ srcval = fetch_data_word(srcoffset + disp);
11863+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit), F_CF);
11864 }
11865 break;
11866 case 2:
11867@@ -473,10 +434,11 @@ static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
11868 shiftreg = DECODE_RM_LONG_REGISTER(rh);
11869 TRACE_AND_STEP();
11870 bit = *shiftreg & 0x1F;
11871- disp = (s16)*shiftreg >> 5;
11872- srcval = fetch_data_long(srcoffset+disp);
11873- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
11874- } else {
11875+ disp = (s16) * shiftreg >> 5;
11876+ srcval = fetch_data_long(srcoffset + disp);
11877+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit), F_CF);
11878+ }
11879+ else {
11880 u16 srcval;
11881 u16 *shiftreg;
11882
11883@@ -485,30 +447,31 @@ static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
11884 shiftreg = DECODE_RM_WORD_REGISTER(rh);
11885 TRACE_AND_STEP();
11886 bit = *shiftreg & 0xF;
11887- disp = (s16)*shiftreg >> 4;
11888- srcval = fetch_data_word(srcoffset+disp);
11889- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
11890+ disp = (s16) * shiftreg >> 4;
11891+ srcval = fetch_data_word(srcoffset + disp);
11892+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit), F_CF);
11893 }
11894 break;
11895- case 3: /* register to register */
11896+ case 3: /* register to register */
11897 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
11898- u32 *srcreg,*shiftreg;
11899+ u32 *srcreg, *shiftreg;
11900
11901 srcreg = DECODE_RM_LONG_REGISTER(rl);
11902 DECODE_PRINTF(",");
11903 shiftreg = DECODE_RM_LONG_REGISTER(rh);
11904 TRACE_AND_STEP();
11905 bit = *shiftreg & 0x1F;
11906- CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
11907- } else {
11908- u16 *srcreg,*shiftreg;
11909+ CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit), F_CF);
11910+ }
11911+ else {
11912+ u16 *srcreg, *shiftreg;
11913
11914 srcreg = DECODE_RM_WORD_REGISTER(rl);
11915 DECODE_PRINTF(",");
11916 shiftreg = DECODE_RM_WORD_REGISTER(rh);
11917 TRACE_AND_STEP();
11918 bit = *shiftreg & 0xF;
11919- CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
11920+ CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit), F_CF);
11921 }
11922 break;
11923 }
11924@@ -520,11 +483,12 @@ static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
11925 REMARKS:
11926 Handles opcode 0x0f,0xa4
11927 ****************************************************************************/
11928-static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
11929+static void
11930+x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
11931 {
11932 int mod, rl, rh;
11933 uint destoffset;
11934- u8 shift;
11935+ u8 shift;
11936
11937 START_OF_INSTR();
11938 DECODE_PRINTF("SHLD\t");
11939@@ -543,9 +507,10 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
11940 DECODE_PRINTF2("%d\n", shift);
11941 TRACE_AND_STEP();
11942 destval = fetch_data_long(destoffset);
11943- destval = shld_long(destval,*shiftreg,shift);
11944+ destval = shld_long(destval, *shiftreg, shift);
11945 store_data_long(destoffset, destval);
11946- } else {
11947+ }
11948+ else {
11949 u16 destval;
11950 u16 *shiftreg;
11951
11952@@ -557,7 +522,7 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
11953 DECODE_PRINTF2("%d\n", shift);
11954 TRACE_AND_STEP();
11955 destval = fetch_data_word(destoffset);
11956- destval = shld_word(destval,*shiftreg,shift);
11957+ destval = shld_word(destval, *shiftreg, shift);
11958 store_data_word(destoffset, destval);
11959 }
11960 break;
11961@@ -574,9 +539,10 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
11962 DECODE_PRINTF2("%d\n", shift);
11963 TRACE_AND_STEP();
11964 destval = fetch_data_long(destoffset);
11965- destval = shld_long(destval,*shiftreg,shift);
11966+ destval = shld_long(destval, *shiftreg, shift);
11967 store_data_long(destoffset, destval);
11968- } else {
11969+ }
11970+ else {
11971 u16 destval;
11972 u16 *shiftreg;
11973
11974@@ -588,7 +554,7 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
11975 DECODE_PRINTF2("%d\n", shift);
11976 TRACE_AND_STEP();
11977 destval = fetch_data_word(destoffset);
11978- destval = shld_word(destval,*shiftreg,shift);
11979+ destval = shld_word(destval, *shiftreg, shift);
11980 store_data_word(destoffset, destval);
11981 }
11982 break;
11983@@ -605,9 +571,10 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
11984 DECODE_PRINTF2("%d\n", shift);
11985 TRACE_AND_STEP();
11986 destval = fetch_data_long(destoffset);
11987- destval = shld_long(destval,*shiftreg,shift);
11988+ destval = shld_long(destval, *shiftreg, shift);
11989 store_data_long(destoffset, destval);
11990- } else {
11991+ }
11992+ else {
11993 u16 destval;
11994 u16 *shiftreg;
11995
11996@@ -619,13 +586,13 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
11997 DECODE_PRINTF2("%d\n", shift);
11998 TRACE_AND_STEP();
11999 destval = fetch_data_word(destoffset);
12000- destval = shld_word(destval,*shiftreg,shift);
12001+ destval = shld_word(destval, *shiftreg, shift);
12002 store_data_word(destoffset, destval);
12003 }
12004 break;
12005- case 3: /* register to register */
12006+ case 3: /* register to register */
12007 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12008- u32 *destreg,*shiftreg;
12009+ u32 *destreg, *shiftreg;
12010
12011 destreg = DECODE_RM_LONG_REGISTER(rl);
12012 DECODE_PRINTF(",");
12013@@ -634,9 +601,10 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
12014 shift = fetch_byte_imm();
12015 DECODE_PRINTF2("%d\n", shift);
12016 TRACE_AND_STEP();
12017- *destreg = shld_long(*destreg,*shiftreg,shift);
12018- } else {
12019- u16 *destreg,*shiftreg;
12020+ *destreg = shld_long(*destreg, *shiftreg, shift);
12021+ }
12022+ else {
12023+ u16 *destreg, *shiftreg;
12024
12025 destreg = DECODE_RM_WORD_REGISTER(rl);
12026 DECODE_PRINTF(",");
12027@@ -645,7 +613,7 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
12028 shift = fetch_byte_imm();
12029 DECODE_PRINTF2("%d\n", shift);
12030 TRACE_AND_STEP();
12031- *destreg = shld_word(*destreg,*shiftreg,shift);
12032+ *destreg = shld_word(*destreg, *shiftreg, shift);
12033 }
12034 break;
12035 }
12036@@ -657,7 +625,8 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
12037 REMARKS:
12038 Handles opcode 0x0f,0xa5
12039 ****************************************************************************/
12040-static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
12041+static void
12042+x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
12043 {
12044 int mod, rl, rh;
12045 uint destoffset;
12046@@ -677,9 +646,10 @@ static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
12047 DECODE_PRINTF(",CL\n");
12048 TRACE_AND_STEP();
12049 destval = fetch_data_long(destoffset);
12050- destval = shld_long(destval,*shiftreg,M.x86.R_CL);
12051+ destval = shld_long(destval, *shiftreg, M.x86.R_CL);
12052 store_data_long(destoffset, destval);
12053- } else {
12054+ }
12055+ else {
12056 u16 destval;
12057 u16 *shiftreg;
12058
12059@@ -689,7 +659,7 @@ static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
12060 DECODE_PRINTF(",CL\n");
12061 TRACE_AND_STEP();
12062 destval = fetch_data_word(destoffset);
12063- destval = shld_word(destval,*shiftreg,M.x86.R_CL);
12064+ destval = shld_word(destval, *shiftreg, M.x86.R_CL);
12065 store_data_word(destoffset, destval);
12066 }
12067 break;
12068@@ -704,9 +674,10 @@ static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
12069 DECODE_PRINTF(",CL\n");
12070 TRACE_AND_STEP();
12071 destval = fetch_data_long(destoffset);
12072- destval = shld_long(destval,*shiftreg,M.x86.R_CL);
12073+ destval = shld_long(destval, *shiftreg, M.x86.R_CL);
12074 store_data_long(destoffset, destval);
12075- } else {
12076+ }
12077+ else {
12078 u16 destval;
12079 u16 *shiftreg;
12080
12081@@ -716,7 +687,7 @@ static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
12082 DECODE_PRINTF(",CL\n");
12083 TRACE_AND_STEP();
12084 destval = fetch_data_word(destoffset);
12085- destval = shld_word(destval,*shiftreg,M.x86.R_CL);
12086+ destval = shld_word(destval, *shiftreg, M.x86.R_CL);
12087 store_data_word(destoffset, destval);
12088 }
12089 break;
12090@@ -731,9 +702,10 @@ static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
12091 DECODE_PRINTF(",CL\n");
12092 TRACE_AND_STEP();
12093 destval = fetch_data_long(destoffset);
12094- destval = shld_long(destval,*shiftreg,M.x86.R_CL);
12095+ destval = shld_long(destval, *shiftreg, M.x86.R_CL);
12096 store_data_long(destoffset, destval);
12097- } else {
12098+ }
12099+ else {
12100 u16 destval;
12101 u16 *shiftreg;
12102
12103@@ -743,29 +715,30 @@ static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
12104 DECODE_PRINTF(",CL\n");
12105 TRACE_AND_STEP();
12106 destval = fetch_data_word(destoffset);
12107- destval = shld_word(destval,*shiftreg,M.x86.R_CL);
12108+ destval = shld_word(destval, *shiftreg, M.x86.R_CL);
12109 store_data_word(destoffset, destval);
12110 }
12111 break;
12112- case 3: /* register to register */
12113+ case 3: /* register to register */
12114 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12115- u32 *destreg,*shiftreg;
12116+ u32 *destreg, *shiftreg;
12117
12118 destreg = DECODE_RM_LONG_REGISTER(rl);
12119 DECODE_PRINTF(",");
12120 shiftreg = DECODE_RM_LONG_REGISTER(rh);
12121 DECODE_PRINTF(",CL\n");
12122 TRACE_AND_STEP();
12123- *destreg = shld_long(*destreg,*shiftreg,M.x86.R_CL);
12124- } else {
12125- u16 *destreg,*shiftreg;
12126+ *destreg = shld_long(*destreg, *shiftreg, M.x86.R_CL);
12127+ }
12128+ else {
12129+ u16 *destreg, *shiftreg;
12130
12131 destreg = DECODE_RM_WORD_REGISTER(rl);
12132 DECODE_PRINTF(",");
12133 shiftreg = DECODE_RM_WORD_REGISTER(rh);
12134 DECODE_PRINTF(",CL\n");
12135 TRACE_AND_STEP();
12136- *destreg = shld_word(*destreg,*shiftreg,M.x86.R_CL);
12137+ *destreg = shld_word(*destreg, *shiftreg, M.x86.R_CL);
12138 }
12139 break;
12140 }
12141@@ -777,7 +750,8 @@ static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
12142 REMARKS:
12143 Handles opcode 0x0f,0xa8
12144 ****************************************************************************/
12145-static void x86emuOp2_push_GS(u8 X86EMU_UNUSED(op2))
12146+static void
12147+x86emuOp2_push_GS(u8 X86EMU_UNUSED(op2))
12148 {
12149 START_OF_INSTR();
12150 DECODE_PRINTF("PUSH\tGS\n");
12151@@ -791,7 +765,8 @@ static void x86emuOp2_push_GS(u8 X86EMU_UNUSED(op2))
12152 REMARKS:
12153 Handles opcode 0x0f,0xa9
12154 ****************************************************************************/
12155-static void x86emuOp2_pop_GS(u8 X86EMU_UNUSED(op2))
12156+static void
12157+x86emuOp2_pop_GS(u8 X86EMU_UNUSED(op2))
12158 {
12159 START_OF_INSTR();
12160 DECODE_PRINTF("POP\tGS\n");
12161@@ -805,11 +780,12 @@ static void x86emuOp2_pop_GS(u8 X86EMU_UNUSED(op2))
12162 REMARKS:
12163 Handles opcode 0x0f,0xab
12164 ****************************************************************************/
12165-static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
12166+static void
12167+x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
12168 {
12169 int mod, rl, rh;
12170 uint srcoffset;
12171- int bit,disp;
12172+ int bit, disp;
12173
12174 START_OF_INSTR();
12175 DECODE_PRINTF("BTS\t");
12176@@ -817,7 +793,7 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
12177 switch (mod) {
12178 case 0:
12179 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12180- u32 srcval,mask;
12181+ u32 srcval, mask;
12182 u32 *shiftreg;
12183
12184 srcoffset = decode_rm00_address(rl);
12185@@ -825,13 +801,14 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
12186 shiftreg = DECODE_RM_LONG_REGISTER(rh);
12187 TRACE_AND_STEP();
12188 bit = *shiftreg & 0x1F;
12189- disp = (s16)*shiftreg >> 5;
12190- srcval = fetch_data_long(srcoffset+disp);
12191+ disp = (s16) * shiftreg >> 5;
12192+ srcval = fetch_data_long(srcoffset + disp);
12193 mask = (0x1 << bit);
12194- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
12195- store_data_long(srcoffset+disp, srcval | mask);
12196- } else {
12197- u16 srcval,mask;
12198+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
12199+ store_data_long(srcoffset + disp, srcval | mask);
12200+ }
12201+ else {
12202+ u16 srcval, mask;
12203 u16 *shiftreg;
12204
12205 srcoffset = decode_rm00_address(rl);
12206@@ -839,16 +816,16 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
12207 shiftreg = DECODE_RM_WORD_REGISTER(rh);
12208 TRACE_AND_STEP();
12209 bit = *shiftreg & 0xF;
12210- disp = (s16)*shiftreg >> 4;
12211- srcval = fetch_data_word(srcoffset+disp);
12212- mask = (u16)(0x1 << bit);
12213- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
12214- store_data_word(srcoffset+disp, srcval | mask);
12215+ disp = (s16) * shiftreg >> 4;
12216+ srcval = fetch_data_word(srcoffset + disp);
12217+ mask = (u16) (0x1 << bit);
12218+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
12219+ store_data_word(srcoffset + disp, srcval | mask);
12220 }
12221 break;
12222 case 1:
12223 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12224- u32 srcval,mask;
12225+ u32 srcval, mask;
12226 u32 *shiftreg;
12227
12228 srcoffset = decode_rm01_address(rl);
12229@@ -856,13 +833,14 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
12230 shiftreg = DECODE_RM_LONG_REGISTER(rh);
12231 TRACE_AND_STEP();
12232 bit = *shiftreg & 0x1F;
12233- disp = (s16)*shiftreg >> 5;
12234- srcval = fetch_data_long(srcoffset+disp);
12235+ disp = (s16) * shiftreg >> 5;
12236+ srcval = fetch_data_long(srcoffset + disp);
12237 mask = (0x1 << bit);
12238- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
12239- store_data_long(srcoffset+disp, srcval | mask);
12240- } else {
12241- u16 srcval,mask;
12242+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
12243+ store_data_long(srcoffset + disp, srcval | mask);
12244+ }
12245+ else {
12246+ u16 srcval, mask;
12247 u16 *shiftreg;
12248
12249 srcoffset = decode_rm01_address(rl);
12250@@ -870,16 +848,16 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
12251 shiftreg = DECODE_RM_WORD_REGISTER(rh);
12252 TRACE_AND_STEP();
12253 bit = *shiftreg & 0xF;
12254- disp = (s16)*shiftreg >> 4;
12255- srcval = fetch_data_word(srcoffset+disp);
12256- mask = (u16)(0x1 << bit);
12257- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
12258- store_data_word(srcoffset+disp, srcval | mask);
12259+ disp = (s16) * shiftreg >> 4;
12260+ srcval = fetch_data_word(srcoffset + disp);
12261+ mask = (u16) (0x1 << bit);
12262+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
12263+ store_data_word(srcoffset + disp, srcval | mask);
12264 }
12265 break;
12266 case 2:
12267 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12268- u32 srcval,mask;
12269+ u32 srcval, mask;
12270 u32 *shiftreg;
12271
12272 srcoffset = decode_rm10_address(rl);
12273@@ -887,51 +865,53 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
12274 shiftreg = DECODE_RM_LONG_REGISTER(rh);
12275 TRACE_AND_STEP();
12276 bit = *shiftreg & 0x1F;
12277- disp = (s16)*shiftreg >> 5;
12278- srcval = fetch_data_long(srcoffset+disp);
12279+ disp = (s16) * shiftreg >> 5;
12280+ srcval = fetch_data_long(srcoffset + disp);
12281 mask = (0x1 << bit);
12282- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
12283- store_data_long(srcoffset+disp, srcval | mask);
12284- } else {
12285- u16 srcval,mask;
12286+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
12287+ store_data_long(srcoffset + disp, srcval | mask);
12288+ }
12289+ else {
12290+ u16 srcval, mask;
12291 u16 *shiftreg;
12292
12293- srcoffset = decode_rm10_address(rl);
12294- DECODE_PRINTF(",");
12295- shiftreg = DECODE_RM_WORD_REGISTER(rh);
12296- TRACE_AND_STEP();
12297- bit = *shiftreg & 0xF;
12298- disp = (s16)*shiftreg >> 4;
12299- srcval = fetch_data_word(srcoffset+disp);
12300- mask = (u16)(0x1 << bit);
12301- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
12302- store_data_word(srcoffset+disp, srcval | mask);
12303- }
12304- break;
12305- case 3: /* register to register */
12306- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12307- u32 *srcreg,*shiftreg;
12308- u32 mask;
12309-
12310- srcreg = DECODE_RM_LONG_REGISTER(rl);
12311- DECODE_PRINTF(",");
12312- shiftreg = DECODE_RM_LONG_REGISTER(rh);
12313- TRACE_AND_STEP();
12314- bit = *shiftreg & 0x1F;
12315- mask = (0x1 << bit);
12316- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
12317- *srcreg |= mask;
12318- } else {
12319- u16 *srcreg,*shiftreg;
12320- u16 mask;
12321-
12322- srcreg = DECODE_RM_WORD_REGISTER(rl);
12323- DECODE_PRINTF(",");
12324- shiftreg = DECODE_RM_WORD_REGISTER(rh);
12325- TRACE_AND_STEP();
12326- bit = *shiftreg & 0xF;
12327- mask = (u16)(0x1 << bit);
12328- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
12329+ srcoffset = decode_rm10_address(rl);
12330+ DECODE_PRINTF(",");
12331+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
12332+ TRACE_AND_STEP();
12333+ bit = *shiftreg & 0xF;
12334+ disp = (s16) * shiftreg >> 4;
12335+ srcval = fetch_data_word(srcoffset + disp);
12336+ mask = (u16) (0x1 << bit);
12337+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
12338+ store_data_word(srcoffset + disp, srcval | mask);
12339+ }
12340+ break;
12341+ case 3: /* register to register */
12342+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12343+ u32 *srcreg, *shiftreg;
12344+ u32 mask;
12345+
12346+ srcreg = DECODE_RM_LONG_REGISTER(rl);
12347+ DECODE_PRINTF(",");
12348+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
12349+ TRACE_AND_STEP();
12350+ bit = *shiftreg & 0x1F;
12351+ mask = (0x1 << bit);
12352+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
12353+ *srcreg |= mask;
12354+ }
12355+ else {
12356+ u16 *srcreg, *shiftreg;
12357+ u16 mask;
12358+
12359+ srcreg = DECODE_RM_WORD_REGISTER(rl);
12360+ DECODE_PRINTF(",");
12361+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
12362+ TRACE_AND_STEP();
12363+ bit = *shiftreg & 0xF;
12364+ mask = (u16) (0x1 << bit);
12365+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
12366 *srcreg |= mask;
12367 }
12368 break;
12369@@ -944,11 +924,12 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
12370 REMARKS:
12371 Handles opcode 0x0f,0xac
12372 ****************************************************************************/
12373-static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
12374+static void
12375+x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
12376 {
12377 int mod, rl, rh;
12378 uint destoffset;
12379- u8 shift;
12380+ u8 shift;
12381
12382 START_OF_INSTR();
12383 DECODE_PRINTF("SHLD\t");
12384@@ -967,9 +948,10 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
12385 DECODE_PRINTF2("%d\n", shift);
12386 TRACE_AND_STEP();
12387 destval = fetch_data_long(destoffset);
12388- destval = shrd_long(destval,*shiftreg,shift);
12389+ destval = shrd_long(destval, *shiftreg, shift);
12390 store_data_long(destoffset, destval);
12391- } else {
12392+ }
12393+ else {
12394 u16 destval;
12395 u16 *shiftreg;
12396
12397@@ -981,7 +963,7 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
12398 DECODE_PRINTF2("%d\n", shift);
12399 TRACE_AND_STEP();
12400 destval = fetch_data_word(destoffset);
12401- destval = shrd_word(destval,*shiftreg,shift);
12402+ destval = shrd_word(destval, *shiftreg, shift);
12403 store_data_word(destoffset, destval);
12404 }
12405 break;
12406@@ -998,9 +980,10 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
12407 DECODE_PRINTF2("%d\n", shift);
12408 TRACE_AND_STEP();
12409 destval = fetch_data_long(destoffset);
12410- destval = shrd_long(destval,*shiftreg,shift);
12411+ destval = shrd_long(destval, *shiftreg, shift);
12412 store_data_long(destoffset, destval);
12413- } else {
12414+ }
12415+ else {
12416 u16 destval;
12417 u16 *shiftreg;
12418
12419@@ -1012,7 +995,7 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
12420 DECODE_PRINTF2("%d\n", shift);
12421 TRACE_AND_STEP();
12422 destval = fetch_data_word(destoffset);
12423- destval = shrd_word(destval,*shiftreg,shift);
12424+ destval = shrd_word(destval, *shiftreg, shift);
12425 store_data_word(destoffset, destval);
12426 }
12427 break;
12428@@ -1029,9 +1012,10 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
12429 DECODE_PRINTF2("%d\n", shift);
12430 TRACE_AND_STEP();
12431 destval = fetch_data_long(destoffset);
12432- destval = shrd_long(destval,*shiftreg,shift);
12433+ destval = shrd_long(destval, *shiftreg, shift);
12434 store_data_long(destoffset, destval);
12435- } else {
12436+ }
12437+ else {
12438 u16 destval;
12439 u16 *shiftreg;
12440
12441@@ -1043,13 +1027,13 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
12442 DECODE_PRINTF2("%d\n", shift);
12443 TRACE_AND_STEP();
12444 destval = fetch_data_word(destoffset);
12445- destval = shrd_word(destval,*shiftreg,shift);
12446+ destval = shrd_word(destval, *shiftreg, shift);
12447 store_data_word(destoffset, destval);
12448 }
12449 break;
12450- case 3: /* register to register */
12451+ case 3: /* register to register */
12452 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12453- u32 *destreg,*shiftreg;
12454+ u32 *destreg, *shiftreg;
12455
12456 destreg = DECODE_RM_LONG_REGISTER(rl);
12457 DECODE_PRINTF(",");
12458@@ -1058,9 +1042,10 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
12459 shift = fetch_byte_imm();
12460 DECODE_PRINTF2("%d\n", shift);
12461 TRACE_AND_STEP();
12462- *destreg = shrd_long(*destreg,*shiftreg,shift);
12463- } else {
12464- u16 *destreg,*shiftreg;
12465+ *destreg = shrd_long(*destreg, *shiftreg, shift);
12466+ }
12467+ else {
12468+ u16 *destreg, *shiftreg;
12469
12470 destreg = DECODE_RM_WORD_REGISTER(rl);
12471 DECODE_PRINTF(",");
12472@@ -1069,7 +1054,7 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
12473 shift = fetch_byte_imm();
12474 DECODE_PRINTF2("%d\n", shift);
12475 TRACE_AND_STEP();
12476- *destreg = shrd_word(*destreg,*shiftreg,shift);
12477+ *destreg = shrd_word(*destreg, *shiftreg, shift);
12478 }
12479 break;
12480 }
12481@@ -1081,7 +1066,8 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
12482 REMARKS:
12483 Handles opcode 0x0f,0xad
12484 ****************************************************************************/
12485-static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
12486+static void
12487+x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
12488 {
12489 int mod, rl, rh;
12490 uint destoffset;
12491@@ -1101,9 +1087,10 @@ static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
12492 DECODE_PRINTF(",CL\n");
12493 TRACE_AND_STEP();
12494 destval = fetch_data_long(destoffset);
12495- destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
12496+ destval = shrd_long(destval, *shiftreg, M.x86.R_CL);
12497 store_data_long(destoffset, destval);
12498- } else {
12499+ }
12500+ else {
12501 u16 destval;
12502 u16 *shiftreg;
12503
12504@@ -1113,7 +1100,7 @@ static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
12505 DECODE_PRINTF(",CL\n");
12506 TRACE_AND_STEP();
12507 destval = fetch_data_word(destoffset);
12508- destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
12509+ destval = shrd_word(destval, *shiftreg, M.x86.R_CL);
12510 store_data_word(destoffset, destval);
12511 }
12512 break;
12513@@ -1128,9 +1115,10 @@ static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
12514 DECODE_PRINTF(",CL\n");
12515 TRACE_AND_STEP();
12516 destval = fetch_data_long(destoffset);
12517- destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
12518+ destval = shrd_long(destval, *shiftreg, M.x86.R_CL);
12519 store_data_long(destoffset, destval);
12520- } else {
12521+ }
12522+ else {
12523 u16 destval;
12524 u16 *shiftreg;
12525
12526@@ -1140,7 +1128,7 @@ static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
12527 DECODE_PRINTF(",CL\n");
12528 TRACE_AND_STEP();
12529 destval = fetch_data_word(destoffset);
12530- destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
12531+ destval = shrd_word(destval, *shiftreg, M.x86.R_CL);
12532 store_data_word(destoffset, destval);
12533 }
12534 break;
12535@@ -1155,9 +1143,10 @@ static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
12536 DECODE_PRINTF(",CL\n");
12537 TRACE_AND_STEP();
12538 destval = fetch_data_long(destoffset);
12539- destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
12540+ destval = shrd_long(destval, *shiftreg, M.x86.R_CL);
12541 store_data_long(destoffset, destval);
12542- } else {
12543+ }
12544+ else {
12545 u16 destval;
12546 u16 *shiftreg;
12547
12548@@ -1167,29 +1156,30 @@ static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
12549 DECODE_PRINTF(",CL\n");
12550 TRACE_AND_STEP();
12551 destval = fetch_data_word(destoffset);
12552- destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
12553+ destval = shrd_word(destval, *shiftreg, M.x86.R_CL);
12554 store_data_word(destoffset, destval);
12555 }
12556 break;
12557- case 3: /* register to register */
12558+ case 3: /* register to register */
12559 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12560- u32 *destreg,*shiftreg;
12561+ u32 *destreg, *shiftreg;
12562
12563 destreg = DECODE_RM_LONG_REGISTER(rl);
12564 DECODE_PRINTF(",");
12565 shiftreg = DECODE_RM_LONG_REGISTER(rh);
12566 DECODE_PRINTF(",CL\n");
12567 TRACE_AND_STEP();
12568- *destreg = shrd_long(*destreg,*shiftreg,M.x86.R_CL);
12569- } else {
12570- u16 *destreg,*shiftreg;
12571+ *destreg = shrd_long(*destreg, *shiftreg, M.x86.R_CL);
12572+ }
12573+ else {
12574+ u16 *destreg, *shiftreg;
12575
12576 destreg = DECODE_RM_WORD_REGISTER(rl);
12577 DECODE_PRINTF(",");
12578 shiftreg = DECODE_RM_WORD_REGISTER(rh);
12579 DECODE_PRINTF(",CL\n");
12580 TRACE_AND_STEP();
12581- *destreg = shrd_word(*destreg,*shiftreg,M.x86.R_CL);
12582+ *destreg = shrd_word(*destreg, *shiftreg, M.x86.R_CL);
12583 }
12584 break;
12585 }
12586@@ -1201,7 +1191,8 @@ static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
12587 REMARKS:
12588 Handles opcode 0x0f,0xaf
12589 ****************************************************************************/
12590-static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
12591+static void
12592+x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
12593 {
12594 int mod, rl, rh;
12595 uint srcoffset;
12596@@ -1214,23 +1205,25 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
12597 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12598 u32 *destreg;
12599 u32 srcval;
12600- u32 res_lo,res_hi;
12601+ u32 res_lo, res_hi;
12602
12603 destreg = DECODE_RM_LONG_REGISTER(rh);
12604 DECODE_PRINTF(",");
12605 srcoffset = decode_rm00_address(rl);
12606 srcval = fetch_data_long(srcoffset);
12607 TRACE_AND_STEP();
12608- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
12609+ imul_long_direct(&res_lo, &res_hi, (s32) * destreg, (s32) srcval);
12610 if (res_hi != 0) {
12611 SET_FLAG(F_CF);
12612 SET_FLAG(F_OF);
12613- } else {
12614+ }
12615+ else {
12616 CLEAR_FLAG(F_CF);
12617 CLEAR_FLAG(F_OF);
12618 }
12619- *destreg = (u32)res_lo;
12620- } else {
12621+ *destreg = (u32) res_lo;
12622+ }
12623+ else {
12624 u16 *destreg;
12625 u16 srcval;
12626 u32 res;
12627@@ -1240,38 +1233,41 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
12628 srcoffset = decode_rm00_address(rl);
12629 srcval = fetch_data_word(srcoffset);
12630 TRACE_AND_STEP();
12631- res = (s16)*destreg * (s16)srcval;
12632+ res = (s16) * destreg * (s16) srcval;
12633 if (res > 0xFFFF) {
12634 SET_FLAG(F_CF);
12635 SET_FLAG(F_OF);
12636- } else {
12637+ }
12638+ else {
12639 CLEAR_FLAG(F_CF);
12640 CLEAR_FLAG(F_OF);
12641 }
12642- *destreg = (u16)res;
12643+ *destreg = (u16) res;
12644 }
12645 break;
12646 case 1:
12647 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12648 u32 *destreg;
12649 u32 srcval;
12650- u32 res_lo,res_hi;
12651+ u32 res_lo, res_hi;
12652
12653 destreg = DECODE_RM_LONG_REGISTER(rh);
12654 DECODE_PRINTF(",");
12655 srcoffset = decode_rm01_address(rl);
12656 srcval = fetch_data_long(srcoffset);
12657 TRACE_AND_STEP();
12658- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
12659+ imul_long_direct(&res_lo, &res_hi, (s32) * destreg, (s32) srcval);
12660 if (res_hi != 0) {
12661 SET_FLAG(F_CF);
12662 SET_FLAG(F_OF);
12663- } else {
12664+ }
12665+ else {
12666 CLEAR_FLAG(F_CF);
12667 CLEAR_FLAG(F_OF);
12668 }
12669- *destreg = (u32)res_lo;
12670- } else {
12671+ *destreg = (u32) res_lo;
12672+ }
12673+ else {
12674 u16 *destreg;
12675 u16 srcval;
12676 u32 res;
12677@@ -1281,38 +1277,41 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
12678 srcoffset = decode_rm01_address(rl);
12679 srcval = fetch_data_word(srcoffset);
12680 TRACE_AND_STEP();
12681- res = (s16)*destreg * (s16)srcval;
12682+ res = (s16) * destreg * (s16) srcval;
12683 if (res > 0xFFFF) {
12684 SET_FLAG(F_CF);
12685 SET_FLAG(F_OF);
12686- } else {
12687+ }
12688+ else {
12689 CLEAR_FLAG(F_CF);
12690 CLEAR_FLAG(F_OF);
12691 }
12692- *destreg = (u16)res;
12693+ *destreg = (u16) res;
12694 }
12695 break;
12696 case 2:
12697 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12698 u32 *destreg;
12699 u32 srcval;
12700- u32 res_lo,res_hi;
12701+ u32 res_lo, res_hi;
12702
12703 destreg = DECODE_RM_LONG_REGISTER(rh);
12704 DECODE_PRINTF(",");
12705 srcoffset = decode_rm10_address(rl);
12706 srcval = fetch_data_long(srcoffset);
12707 TRACE_AND_STEP();
12708- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
12709+ imul_long_direct(&res_lo, &res_hi, (s32) * destreg, (s32) srcval);
12710 if (res_hi != 0) {
12711 SET_FLAG(F_CF);
12712 SET_FLAG(F_OF);
12713- } else {
12714+ }
12715+ else {
12716 CLEAR_FLAG(F_CF);
12717 CLEAR_FLAG(F_OF);
12718 }
12719- *destreg = (u32)res_lo;
12720- } else {
12721+ *destreg = (u32) res_lo;
12722+ }
12723+ else {
12724 u16 *destreg;
12725 u16 srcval;
12726 u32 res;
12727@@ -1322,51 +1321,55 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
12728 srcoffset = decode_rm10_address(rl);
12729 srcval = fetch_data_word(srcoffset);
12730 TRACE_AND_STEP();
12731- res = (s16)*destreg * (s16)srcval;
12732+ res = (s16) * destreg * (s16) srcval;
12733 if (res > 0xFFFF) {
12734 SET_FLAG(F_CF);
12735 SET_FLAG(F_OF);
12736- } else {
12737+ }
12738+ else {
12739 CLEAR_FLAG(F_CF);
12740 CLEAR_FLAG(F_OF);
12741 }
12742- *destreg = (u16)res;
12743+ *destreg = (u16) res;
12744 }
12745 break;
12746- case 3: /* register to register */
12747+ case 3: /* register to register */
12748 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12749- u32 *destreg,*srcreg;
12750- u32 res_lo,res_hi;
12751+ u32 *destreg, *srcreg;
12752+ u32 res_lo, res_hi;
12753
12754 destreg = DECODE_RM_LONG_REGISTER(rh);
12755 DECODE_PRINTF(",");
12756 srcreg = DECODE_RM_LONG_REGISTER(rl);
12757 TRACE_AND_STEP();
12758- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)*srcreg);
12759+ imul_long_direct(&res_lo, &res_hi, (s32) * destreg, (s32) * srcreg);
12760 if (res_hi != 0) {
12761 SET_FLAG(F_CF);
12762 SET_FLAG(F_OF);
12763- } else {
12764+ }
12765+ else {
12766 CLEAR_FLAG(F_CF);
12767 CLEAR_FLAG(F_OF);
12768 }
12769- *destreg = (u32)res_lo;
12770- } else {
12771- u16 *destreg,*srcreg;
12772+ *destreg = (u32) res_lo;
12773+ }
12774+ else {
12775+ u16 *destreg, *srcreg;
12776 u32 res;
12777
12778 destreg = DECODE_RM_WORD_REGISTER(rh);
12779 DECODE_PRINTF(",");
12780 srcreg = DECODE_RM_WORD_REGISTER(rl);
12781- res = (s16)*destreg * (s16)*srcreg;
12782+ res = (s16) * destreg * (s16) * srcreg;
12783 if (res > 0xFFFF) {
12784 SET_FLAG(F_CF);
12785 SET_FLAG(F_OF);
12786- } else {
12787+ }
12788+ else {
12789 CLEAR_FLAG(F_CF);
12790 CLEAR_FLAG(F_OF);
12791 }
12792- *destreg = (u16)res;
12793+ *destreg = (u16) res;
12794 }
12795 break;
12796 }
12797@@ -1378,9 +1381,10 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
12798 REMARKS:
12799 Handles opcode 0x0f,0xb2
12800 ****************************************************************************/
12801-static void x86emuOp2_lss_R_IMM(u8 X86EMU_UNUSED(op2))
12802+static void
12803+x86emuOp2_lss_R_IMM(u8 X86EMU_UNUSED(op2))
12804 {
12805- int mod, rh, rl;
12806+ int mod, rh, rl;
12807 u16 *dstreg;
12808 uint srcoffset;
12809
12810@@ -1415,7 +1419,7 @@ static void x86emuOp2_lss_R_IMM(u8 X86EMU_UNUSED(op2))
12811 *dstreg = fetch_data_word(srcoffset);
12812 M.x86.R_SS = fetch_data_word(srcoffset + 2);
12813 break;
12814- case 3: /* register to register */
12815+ case 3: /* register to register */
12816 /* UNDEFINED! */
12817 TRACE_AND_STEP();
12818 }
12819@@ -1427,148 +1431,154 @@ static void x86emuOp2_lss_R_IMM(u8 X86EMU_UNUSED(op2))
12820 REMARKS:
12821 Handles opcode 0x0f,0xb3
12822 ****************************************************************************/
12823-static void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
12824+static void
12825+x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
12826 {
12827- int mod, rl, rh;
12828- uint srcoffset;
12829- int bit,disp;
12830-
12831- START_OF_INSTR();
12832- DECODE_PRINTF("BTR\t");
12833- FETCH_DECODE_MODRM(mod, rh, rl);
12834- switch (mod) {
12835- case 0:
12836- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12837- u32 srcval,mask;
12838- u32 *shiftreg;
12839-
12840- srcoffset = decode_rm00_address(rl);
12841- DECODE_PRINTF(",");
12842- shiftreg = DECODE_RM_LONG_REGISTER(rh);
12843- TRACE_AND_STEP();
12844- bit = *shiftreg & 0x1F;
12845- disp = (s16)*shiftreg >> 5;
12846- srcval = fetch_data_long(srcoffset+disp);
12847- mask = (0x1 << bit);
12848- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
12849- store_data_long(srcoffset+disp, srcval & ~mask);
12850- } else {
12851- u16 srcval,mask;
12852- u16 *shiftreg;
12853-
12854- srcoffset = decode_rm00_address(rl);
12855- DECODE_PRINTF(",");
12856- shiftreg = DECODE_RM_WORD_REGISTER(rh);
12857- TRACE_AND_STEP();
12858- bit = *shiftreg & 0xF;
12859- disp = (s16)*shiftreg >> 4;
12860- srcval = fetch_data_word(srcoffset+disp);
12861- mask = (u16)(0x1 << bit);
12862- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
12863- store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
12864- }
12865- break;
12866- case 1:
12867- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12868- u32 srcval,mask;
12869- u32 *shiftreg;
12870-
12871- srcoffset = decode_rm01_address(rl);
12872- DECODE_PRINTF(",");
12873- shiftreg = DECODE_RM_LONG_REGISTER(rh);
12874- TRACE_AND_STEP();
12875- bit = *shiftreg & 0x1F;
12876- disp = (s16)*shiftreg >> 5;
12877- srcval = fetch_data_long(srcoffset+disp);
12878- mask = (0x1 << bit);
12879- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
12880- store_data_long(srcoffset+disp, srcval & ~mask);
12881- } else {
12882- u16 srcval,mask;
12883- u16 *shiftreg;
12884-
12885- srcoffset = decode_rm01_address(rl);
12886- DECODE_PRINTF(",");
12887- shiftreg = DECODE_RM_WORD_REGISTER(rh);
12888- TRACE_AND_STEP();
12889- bit = *shiftreg & 0xF;
12890- disp = (s16)*shiftreg >> 4;
12891- srcval = fetch_data_word(srcoffset+disp);
12892- mask = (u16)(0x1 << bit);
12893- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
12894- store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
12895- }
12896- break;
12897- case 2:
12898- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12899- u32 srcval,mask;
12900- u32 *shiftreg;
12901-
12902- srcoffset = decode_rm10_address(rl);
12903- DECODE_PRINTF(",");
12904- shiftreg = DECODE_RM_LONG_REGISTER(rh);
12905- TRACE_AND_STEP();
12906- bit = *shiftreg & 0x1F;
12907- disp = (s16)*shiftreg >> 5;
12908- srcval = fetch_data_long(srcoffset+disp);
12909- mask = (0x1 << bit);
12910- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
12911- store_data_long(srcoffset+disp, srcval & ~mask);
12912- } else {
12913- u16 srcval,mask;
12914- u16 *shiftreg;
12915-
12916- srcoffset = decode_rm10_address(rl);
12917- DECODE_PRINTF(",");
12918- shiftreg = DECODE_RM_WORD_REGISTER(rh);
12919- TRACE_AND_STEP();
12920- bit = *shiftreg & 0xF;
12921- disp = (s16)*shiftreg >> 4;
12922- srcval = fetch_data_word(srcoffset+disp);
12923- mask = (u16)(0x1 << bit);
12924- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
12925- store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
12926- }
12927- break;
12928- case 3: /* register to register */
12929- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12930- u32 *srcreg,*shiftreg;
12931- u32 mask;
12932-
12933- srcreg = DECODE_RM_LONG_REGISTER(rl);
12934- DECODE_PRINTF(",");
12935- shiftreg = DECODE_RM_LONG_REGISTER(rh);
12936- TRACE_AND_STEP();
12937- bit = *shiftreg & 0x1F;
12938- mask = (0x1 << bit);
12939- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
12940- *srcreg &= ~mask;
12941- } else {
12942- u16 *srcreg,*shiftreg;
12943- u16 mask;
12944-
12945- srcreg = DECODE_RM_WORD_REGISTER(rl);
12946- DECODE_PRINTF(",");
12947- shiftreg = DECODE_RM_WORD_REGISTER(rh);
12948- TRACE_AND_STEP();
12949- bit = *shiftreg & 0xF;
12950- mask = (u16)(0x1 << bit);
12951- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
12952- *srcreg &= ~mask;
12953- }
12954- break;
12955- }
12956- DECODE_CLEAR_SEGOVR();
12957- END_OF_INSTR();
12958+ int mod, rl, rh;
12959+ uint srcoffset;
12960+ int bit, disp;
12961+
12962+ START_OF_INSTR();
12963+ DECODE_PRINTF("BTR\t");
12964+ FETCH_DECODE_MODRM(mod, rh, rl);
12965+ switch (mod) {
12966+ case 0:
12967+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
12968+ u32 srcval, mask;
12969+ u32 *shiftreg;
12970+
12971+ srcoffset = decode_rm00_address(rl);
12972+ DECODE_PRINTF(",");
12973+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
12974+ TRACE_AND_STEP();
12975+ bit = *shiftreg & 0x1F;
12976+ disp = (s16) * shiftreg >> 5;
12977+ srcval = fetch_data_long(srcoffset + disp);
12978+ mask = (0x1 << bit);
12979+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
12980+ store_data_long(srcoffset + disp, srcval & ~mask);
12981+ }
12982+ else {
12983+ u16 srcval, mask;
12984+ u16 *shiftreg;
12985+
12986+ srcoffset = decode_rm00_address(rl);
12987+ DECODE_PRINTF(",");
12988+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
12989+ TRACE_AND_STEP();
12990+ bit = *shiftreg & 0xF;
12991+ disp = (s16) * shiftreg >> 4;
12992+ srcval = fetch_data_word(srcoffset + disp);
12993+ mask = (u16) (0x1 << bit);
12994+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
12995+ store_data_word(srcoffset + disp, (u16) (srcval & ~mask));
12996+ }
12997+ break;
12998+ case 1:
12999+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13000+ u32 srcval, mask;
13001+ u32 *shiftreg;
13002+
13003+ srcoffset = decode_rm01_address(rl);
13004+ DECODE_PRINTF(",");
13005+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
13006+ TRACE_AND_STEP();
13007+ bit = *shiftreg & 0x1F;
13008+ disp = (s16) * shiftreg >> 5;
13009+ srcval = fetch_data_long(srcoffset + disp);
13010+ mask = (0x1 << bit);
13011+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13012+ store_data_long(srcoffset + disp, srcval & ~mask);
13013+ }
13014+ else {
13015+ u16 srcval, mask;
13016+ u16 *shiftreg;
13017+
13018+ srcoffset = decode_rm01_address(rl);
13019+ DECODE_PRINTF(",");
13020+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
13021+ TRACE_AND_STEP();
13022+ bit = *shiftreg & 0xF;
13023+ disp = (s16) * shiftreg >> 4;
13024+ srcval = fetch_data_word(srcoffset + disp);
13025+ mask = (u16) (0x1 << bit);
13026+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13027+ store_data_word(srcoffset + disp, (u16) (srcval & ~mask));
13028+ }
13029+ break;
13030+ case 2:
13031+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13032+ u32 srcval, mask;
13033+ u32 *shiftreg;
13034+
13035+ srcoffset = decode_rm10_address(rl);
13036+ DECODE_PRINTF(",");
13037+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
13038+ TRACE_AND_STEP();
13039+ bit = *shiftreg & 0x1F;
13040+ disp = (s16) * shiftreg >> 5;
13041+ srcval = fetch_data_long(srcoffset + disp);
13042+ mask = (0x1 << bit);
13043+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13044+ store_data_long(srcoffset + disp, srcval & ~mask);
13045+ }
13046+ else {
13047+ u16 srcval, mask;
13048+ u16 *shiftreg;
13049+
13050+ srcoffset = decode_rm10_address(rl);
13051+ DECODE_PRINTF(",");
13052+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
13053+ TRACE_AND_STEP();
13054+ bit = *shiftreg & 0xF;
13055+ disp = (s16) * shiftreg >> 4;
13056+ srcval = fetch_data_word(srcoffset + disp);
13057+ mask = (u16) (0x1 << bit);
13058+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13059+ store_data_word(srcoffset + disp, (u16) (srcval & ~mask));
13060+ }
13061+ break;
13062+ case 3: /* register to register */
13063+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13064+ u32 *srcreg, *shiftreg;
13065+ u32 mask;
13066+
13067+ srcreg = DECODE_RM_LONG_REGISTER(rl);
13068+ DECODE_PRINTF(",");
13069+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
13070+ TRACE_AND_STEP();
13071+ bit = *shiftreg & 0x1F;
13072+ mask = (0x1 << bit);
13073+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
13074+ *srcreg &= ~mask;
13075+ }
13076+ else {
13077+ u16 *srcreg, *shiftreg;
13078+ u16 mask;
13079+
13080+ srcreg = DECODE_RM_WORD_REGISTER(rl);
13081+ DECODE_PRINTF(",");
13082+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
13083+ TRACE_AND_STEP();
13084+ bit = *shiftreg & 0xF;
13085+ mask = (u16) (0x1 << bit);
13086+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
13087+ *srcreg &= ~mask;
13088+ }
13089+ break;
13090+ }
13091+ DECODE_CLEAR_SEGOVR();
13092+ END_OF_INSTR();
13093 }
13094
13095 /****************************************************************************
13096 REMARKS:
13097 Handles opcode 0x0f,0xb4
13098 ****************************************************************************/
13099-static void x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2))
13100+static void
13101+x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2))
13102 {
13103- int mod, rh, rl;
13104+ int mod, rh, rl;
13105 u16 *dstreg;
13106 uint srcoffset;
13107
13108@@ -1603,7 +1613,7 @@ static void x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2))
13109 *dstreg = fetch_data_word(srcoffset);
13110 M.x86.R_FS = fetch_data_word(srcoffset + 2);
13111 break;
13112- case 3: /* register to register */
13113+ case 3: /* register to register */
13114 /* UNDEFINED! */
13115 TRACE_AND_STEP();
13116 }
13117@@ -1615,9 +1625,10 @@ static void x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2))
13118 REMARKS:
13119 Handles opcode 0x0f,0xb5
13120 ****************************************************************************/
13121-static void x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2))
13122+static void
13123+x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2))
13124 {
13125- int mod, rh, rl;
13126+ int mod, rh, rl;
13127 u16 *dstreg;
13128 uint srcoffset;
13129
13130@@ -1652,7 +1663,7 @@ static void x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2))
13131 *dstreg = fetch_data_word(srcoffset);
13132 M.x86.R_GS = fetch_data_word(srcoffset + 2);
13133 break;
13134- case 3: /* register to register */
13135+ case 3: /* register to register */
13136 /* UNDEFINED! */
13137 TRACE_AND_STEP();
13138 }
13139@@ -1664,7 +1675,8 @@ static void x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2))
13140 REMARKS:
13141 Handles opcode 0x0f,0xb6
13142 ****************************************************************************/
13143-static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
13144+static void
13145+x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
13146 {
13147 int mod, rl, rh;
13148 uint srcoffset;
13149@@ -1685,7 +1697,8 @@ static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
13150 DECODE_PRINTF("\n");
13151 TRACE_AND_STEP();
13152 *destreg = srcval;
13153- } else {
13154+ }
13155+ else {
13156 u16 *destreg;
13157 u16 srcval;
13158
13159@@ -1710,7 +1723,8 @@ static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
13160 DECODE_PRINTF("\n");
13161 TRACE_AND_STEP();
13162 *destreg = srcval;
13163- } else {
13164+ }
13165+ else {
13166 u16 *destreg;
13167 u16 srcval;
13168
13169@@ -1735,7 +1749,8 @@ static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
13170 DECODE_PRINTF("\n");
13171 TRACE_AND_STEP();
13172 *destreg = srcval;
13173- } else {
13174+ }
13175+ else {
13176 u16 *destreg;
13177 u16 srcval;
13178
13179@@ -1748,10 +1763,10 @@ static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
13180 *destreg = srcval;
13181 }
13182 break;
13183- case 3: /* register to register */
13184+ case 3: /* register to register */
13185 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13186 u32 *destreg;
13187- u8 *srcreg;
13188+ u8 *srcreg;
13189
13190 destreg = DECODE_RM_LONG_REGISTER(rh);
13191 DECODE_PRINTF(",");
13192@@ -1759,9 +1774,10 @@ static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
13193 DECODE_PRINTF("\n");
13194 TRACE_AND_STEP();
13195 *destreg = *srcreg;
13196- } else {
13197+ }
13198+ else {
13199 u16 *destreg;
13200- u8 *srcreg;
13201+ u8 *srcreg;
13202
13203 destreg = DECODE_RM_WORD_REGISTER(rh);
13204 DECODE_PRINTF(",");
13205@@ -1780,7 +1796,8 @@ static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
13206 REMARKS:
13207 Handles opcode 0x0f,0xb7
13208 ****************************************************************************/
13209-static void x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2))
13210+static void
13211+x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2))
13212 {
13213 int mod, rl, rh;
13214 uint srcoffset;
13215@@ -1819,7 +1836,7 @@ static void x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2))
13216 TRACE_AND_STEP();
13217 *destreg = srcval;
13218 break;
13219- case 3: /* register to register */
13220+ case 3: /* register to register */
13221 destreg = DECODE_RM_LONG_REGISTER(rh);
13222 DECODE_PRINTF(",");
13223 srcreg = DECODE_RM_WORD_REGISTER(rl);
13224@@ -1836,7 +1853,8 @@ static void x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2))
13225 REMARKS:
13226 Handles opcode 0x0f,0xba
13227 ****************************************************************************/
13228-static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
13229+static void
13230+x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
13231 {
13232 int mod, rl, rh;
13233 uint srcoffset;
13234@@ -1846,23 +1864,23 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
13235 FETCH_DECODE_MODRM(mod, rh, rl);
13236 switch (rh) {
13237 case 4:
13238- DECODE_PRINTF("BT\t");
13239- break;
13240+ DECODE_PRINTF("BT\t");
13241+ break;
13242 case 5:
13243- DECODE_PRINTF("BTS\t");
13244- break;
13245+ DECODE_PRINTF("BTS\t");
13246+ break;
13247 case 6:
13248- DECODE_PRINTF("BTR\t");
13249- break;
13250+ DECODE_PRINTF("BTR\t");
13251+ break;
13252 case 7:
13253- DECODE_PRINTF("BTC\t");
13254- break;
13255+ DECODE_PRINTF("BTC\t");
13256+ break;
13257 default:
13258- DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
13259- TRACE_REGS();
13260- printk("%04x:%04x: %02X%02X ILLEGAL EXTENDED X86 OPCODE EXTENSION!\n",
13261- M.x86.R_CS, M.x86.R_IP-3,op2, (mod<<6)|(rh<<3)|rl);
13262- HALT_SYS();
13263+ DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
13264+ TRACE_REGS();
13265+ printk("%04x:%04x: %02X%02X ILLEGAL EXTENDED X86 OPCODE EXTENSION!\n",
13266+ M.x86.R_CS, M.x86.R_IP - 3, op2, (mod << 6) | (rh << 3) | rl);
13267+ HALT_SYS();
13268 }
13269 switch (mod) {
13270 case 0:
13271@@ -1876,22 +1894,23 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
13272 TRACE_AND_STEP();
13273 bit = shift & 0x1F;
13274 srcval = fetch_data_long(srcoffset);
13275- mask = (0x1 << bit);
13276- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
13277- switch (rh) {
13278- case 5:
13279- store_data_long(srcoffset, srcval | mask);
13280- break;
13281- case 6:
13282- store_data_long(srcoffset, srcval & ~mask);
13283- break;
13284- case 7:
13285- store_data_long(srcoffset, srcval ^ mask);
13286- break;
13287- default:
13288- break;
13289- }
13290- } else {
13291+ mask = (0x1 << bit);
13292+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13293+ switch (rh) {
13294+ case 5:
13295+ store_data_long(srcoffset, srcval | mask);
13296+ break;
13297+ case 6:
13298+ store_data_long(srcoffset, srcval & ~mask);
13299+ break;
13300+ case 7:
13301+ store_data_long(srcoffset, srcval ^ mask);
13302+ break;
13303+ default:
13304+ break;
13305+ }
13306+ }
13307+ else {
13308 u16 srcval, mask;
13309 u8 shift;
13310
13311@@ -1901,21 +1920,21 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
13312 TRACE_AND_STEP();
13313 bit = shift & 0xF;
13314 srcval = fetch_data_word(srcoffset);
13315- mask = (0x1 << bit);
13316- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
13317- switch (rh) {
13318- case 5:
13319- store_data_word(srcoffset, srcval | mask);
13320- break;
13321- case 6:
13322- store_data_word(srcoffset, srcval & ~mask);
13323- break;
13324- case 7:
13325- store_data_word(srcoffset, srcval ^ mask);
13326- break;
13327- default:
13328- break;
13329- }
13330+ mask = (0x1 << bit);
13331+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13332+ switch (rh) {
13333+ case 5:
13334+ store_data_word(srcoffset, srcval | mask);
13335+ break;
13336+ case 6:
13337+ store_data_word(srcoffset, srcval & ~mask);
13338+ break;
13339+ case 7:
13340+ store_data_word(srcoffset, srcval ^ mask);
13341+ break;
13342+ default:
13343+ break;
13344+ }
13345 }
13346 break;
13347 case 1:
13348@@ -1929,22 +1948,23 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
13349 TRACE_AND_STEP();
13350 bit = shift & 0x1F;
13351 srcval = fetch_data_long(srcoffset);
13352- mask = (0x1 << bit);
13353- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
13354- switch (rh) {
13355- case 5:
13356- store_data_long(srcoffset, srcval | mask);
13357- break;
13358- case 6:
13359- store_data_long(srcoffset, srcval & ~mask);
13360- break;
13361- case 7:
13362- store_data_long(srcoffset, srcval ^ mask);
13363- break;
13364- default:
13365- break;
13366- }
13367- } else {
13368+ mask = (0x1 << bit);
13369+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13370+ switch (rh) {
13371+ case 5:
13372+ store_data_long(srcoffset, srcval | mask);
13373+ break;
13374+ case 6:
13375+ store_data_long(srcoffset, srcval & ~mask);
13376+ break;
13377+ case 7:
13378+ store_data_long(srcoffset, srcval ^ mask);
13379+ break;
13380+ default:
13381+ break;
13382+ }
13383+ }
13384+ else {
13385 u16 srcval, mask;
13386 u8 shift;
13387
13388@@ -1954,21 +1974,21 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
13389 TRACE_AND_STEP();
13390 bit = shift & 0xF;
13391 srcval = fetch_data_word(srcoffset);
13392- mask = (0x1 << bit);
13393- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
13394- switch (rh) {
13395- case 5:
13396- store_data_word(srcoffset, srcval | mask);
13397- break;
13398- case 6:
13399- store_data_word(srcoffset, srcval & ~mask);
13400- break;
13401- case 7:
13402- store_data_word(srcoffset, srcval ^ mask);
13403- break;
13404- default:
13405- break;
13406- }
13407+ mask = (0x1 << bit);
13408+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13409+ switch (rh) {
13410+ case 5:
13411+ store_data_word(srcoffset, srcval | mask);
13412+ break;
13413+ case 6:
13414+ store_data_word(srcoffset, srcval & ~mask);
13415+ break;
13416+ case 7:
13417+ store_data_word(srcoffset, srcval ^ mask);
13418+ break;
13419+ default:
13420+ break;
13421+ }
13422 }
13423 break;
13424 case 2:
13425@@ -1982,22 +2002,23 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
13426 TRACE_AND_STEP();
13427 bit = shift & 0x1F;
13428 srcval = fetch_data_long(srcoffset);
13429- mask = (0x1 << bit);
13430- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
13431- switch (rh) {
13432- case 5:
13433- store_data_long(srcoffset, srcval | mask);
13434- break;
13435- case 6:
13436- store_data_long(srcoffset, srcval & ~mask);
13437- break;
13438- case 7:
13439- store_data_long(srcoffset, srcval ^ mask);
13440- break;
13441- default:
13442- break;
13443- }
13444- } else {
13445+ mask = (0x1 << bit);
13446+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13447+ switch (rh) {
13448+ case 5:
13449+ store_data_long(srcoffset, srcval | mask);
13450+ break;
13451+ case 6:
13452+ store_data_long(srcoffset, srcval & ~mask);
13453+ break;
13454+ case 7:
13455+ store_data_long(srcoffset, srcval ^ mask);
13456+ break;
13457+ default:
13458+ break;
13459+ }
13460+ }
13461+ else {
13462 u16 srcval, mask;
13463 u8 shift;
13464
13465@@ -2007,74 +2028,75 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
13466 TRACE_AND_STEP();
13467 bit = shift & 0xF;
13468 srcval = fetch_data_word(srcoffset);
13469- mask = (0x1 << bit);
13470- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
13471- switch (rh) {
13472- case 5:
13473- store_data_word(srcoffset, srcval | mask);
13474- break;
13475- case 6:
13476- store_data_word(srcoffset, srcval & ~mask);
13477- break;
13478- case 7:
13479- store_data_word(srcoffset, srcval ^ mask);
13480- break;
13481- default:
13482- break;
13483- }
13484- }
13485- break;
13486- case 3: /* register to register */
13487+ mask = (0x1 << bit);
13488+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13489+ switch (rh) {
13490+ case 5:
13491+ store_data_word(srcoffset, srcval | mask);
13492+ break;
13493+ case 6:
13494+ store_data_word(srcoffset, srcval & ~mask);
13495+ break;
13496+ case 7:
13497+ store_data_word(srcoffset, srcval ^ mask);
13498+ break;
13499+ default:
13500+ break;
13501+ }
13502+ }
13503+ break;
13504+ case 3: /* register to register */
13505 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13506 u32 *srcreg;
13507- u32 mask;
13508- u8 shift;
13509+ u32 mask;
13510+ u8 shift;
13511
13512 srcreg = DECODE_RM_LONG_REGISTER(rl);
13513 DECODE_PRINTF(",");
13514 shift = fetch_byte_imm();
13515 TRACE_AND_STEP();
13516 bit = shift & 0x1F;
13517- mask = (0x1 << bit);
13518- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
13519- switch (rh) {
13520- case 5:
13521- *srcreg |= mask;
13522- break;
13523- case 6:
13524- *srcreg &= ~mask;
13525- break;
13526- case 7:
13527- *srcreg ^= mask;
13528- break;
13529- default:
13530- break;
13531- }
13532- } else {
13533+ mask = (0x1 << bit);
13534+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
13535+ switch (rh) {
13536+ case 5:
13537+ *srcreg |= mask;
13538+ break;
13539+ case 6:
13540+ *srcreg &= ~mask;
13541+ break;
13542+ case 7:
13543+ *srcreg ^= mask;
13544+ break;
13545+ default:
13546+ break;
13547+ }
13548+ }
13549+ else {
13550 u16 *srcreg;
13551- u16 mask;
13552- u8 shift;
13553+ u16 mask;
13554+ u8 shift;
13555
13556 srcreg = DECODE_RM_WORD_REGISTER(rl);
13557 DECODE_PRINTF(",");
13558 shift = fetch_byte_imm();
13559 TRACE_AND_STEP();
13560 bit = shift & 0xF;
13561- mask = (0x1 << bit);
13562- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
13563- switch (rh) {
13564- case 5:
13565- *srcreg |= mask;
13566- break;
13567- case 6:
13568- *srcreg &= ~mask;
13569- break;
13570- case 7:
13571- *srcreg ^= mask;
13572- break;
13573- default:
13574- break;
13575- }
13576+ mask = (0x1 << bit);
13577+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
13578+ switch (rh) {
13579+ case 5:
13580+ *srcreg |= mask;
13581+ break;
13582+ case 6:
13583+ *srcreg &= ~mask;
13584+ break;
13585+ case 7:
13586+ *srcreg ^= mask;
13587+ break;
13588+ default:
13589+ break;
13590+ }
13591 }
13592 break;
13593 }
13594@@ -2086,11 +2108,12 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
13595 REMARKS:
13596 Handles opcode 0x0f,0xbb
13597 ****************************************************************************/
13598-static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
13599+static void
13600+x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
13601 {
13602 int mod, rl, rh;
13603 uint srcoffset;
13604- int bit,disp;
13605+ int bit, disp;
13606
13607 START_OF_INSTR();
13608 DECODE_PRINTF("BTC\t");
13609@@ -2098,7 +2121,7 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
13610 switch (mod) {
13611 case 0:
13612 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13613- u32 srcval,mask;
13614+ u32 srcval, mask;
13615 u32 *shiftreg;
13616
13617 srcoffset = decode_rm00_address(rl);
13618@@ -2106,13 +2129,14 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
13619 shiftreg = DECODE_RM_LONG_REGISTER(rh);
13620 TRACE_AND_STEP();
13621 bit = *shiftreg & 0x1F;
13622- disp = (s16)*shiftreg >> 5;
13623- srcval = fetch_data_long(srcoffset+disp);
13624+ disp = (s16) * shiftreg >> 5;
13625+ srcval = fetch_data_long(srcoffset + disp);
13626 mask = (0x1 << bit);
13627- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
13628- store_data_long(srcoffset+disp, srcval ^ mask);
13629- } else {
13630- u16 srcval,mask;
13631+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13632+ store_data_long(srcoffset + disp, srcval ^ mask);
13633+ }
13634+ else {
13635+ u16 srcval, mask;
13636 u16 *shiftreg;
13637
13638 srcoffset = decode_rm00_address(rl);
13639@@ -2120,16 +2144,16 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
13640 shiftreg = DECODE_RM_WORD_REGISTER(rh);
13641 TRACE_AND_STEP();
13642 bit = *shiftreg & 0xF;
13643- disp = (s16)*shiftreg >> 4;
13644- srcval = fetch_data_word(srcoffset+disp);
13645- mask = (u16)(0x1 << bit);
13646- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
13647- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
13648+ disp = (s16) * shiftreg >> 4;
13649+ srcval = fetch_data_word(srcoffset + disp);
13650+ mask = (u16) (0x1 << bit);
13651+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13652+ store_data_word(srcoffset + disp, (u16) (srcval ^ mask));
13653 }
13654 break;
13655 case 1:
13656 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13657- u32 srcval,mask;
13658+ u32 srcval, mask;
13659 u32 *shiftreg;
13660
13661 srcoffset = decode_rm01_address(rl);
13662@@ -2137,13 +2161,14 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
13663 shiftreg = DECODE_RM_LONG_REGISTER(rh);
13664 TRACE_AND_STEP();
13665 bit = *shiftreg & 0x1F;
13666- disp = (s16)*shiftreg >> 5;
13667- srcval = fetch_data_long(srcoffset+disp);
13668+ disp = (s16) * shiftreg >> 5;
13669+ srcval = fetch_data_long(srcoffset + disp);
13670 mask = (0x1 << bit);
13671- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
13672- store_data_long(srcoffset+disp, srcval ^ mask);
13673- } else {
13674- u16 srcval,mask;
13675+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13676+ store_data_long(srcoffset + disp, srcval ^ mask);
13677+ }
13678+ else {
13679+ u16 srcval, mask;
13680 u16 *shiftreg;
13681
13682 srcoffset = decode_rm01_address(rl);
13683@@ -2151,16 +2176,16 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
13684 shiftreg = DECODE_RM_WORD_REGISTER(rh);
13685 TRACE_AND_STEP();
13686 bit = *shiftreg & 0xF;
13687- disp = (s16)*shiftreg >> 4;
13688- srcval = fetch_data_word(srcoffset+disp);
13689- mask = (u16)(0x1 << bit);
13690- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
13691- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
13692+ disp = (s16) * shiftreg >> 4;
13693+ srcval = fetch_data_word(srcoffset + disp);
13694+ mask = (u16) (0x1 << bit);
13695+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13696+ store_data_word(srcoffset + disp, (u16) (srcval ^ mask));
13697 }
13698 break;
13699 case 2:
13700 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13701- u32 srcval,mask;
13702+ u32 srcval, mask;
13703 u32 *shiftreg;
13704
13705 srcoffset = decode_rm10_address(rl);
13706@@ -2168,13 +2193,14 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
13707 shiftreg = DECODE_RM_LONG_REGISTER(rh);
13708 TRACE_AND_STEP();
13709 bit = *shiftreg & 0x1F;
13710- disp = (s16)*shiftreg >> 5;
13711- srcval = fetch_data_long(srcoffset+disp);
13712+ disp = (s16) * shiftreg >> 5;
13713+ srcval = fetch_data_long(srcoffset + disp);
13714 mask = (0x1 << bit);
13715- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
13716- store_data_long(srcoffset+disp, srcval ^ mask);
13717- } else {
13718- u16 srcval,mask;
13719+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13720+ store_data_long(srcoffset + disp, srcval ^ mask);
13721+ }
13722+ else {
13723+ u16 srcval, mask;
13724 u16 *shiftreg;
13725
13726 srcoffset = decode_rm10_address(rl);
13727@@ -2182,16 +2208,16 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
13728 shiftreg = DECODE_RM_WORD_REGISTER(rh);
13729 TRACE_AND_STEP();
13730 bit = *shiftreg & 0xF;
13731- disp = (s16)*shiftreg >> 4;
13732- srcval = fetch_data_word(srcoffset+disp);
13733- mask = (u16)(0x1 << bit);
13734- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
13735- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
13736+ disp = (s16) * shiftreg >> 4;
13737+ srcval = fetch_data_word(srcoffset + disp);
13738+ mask = (u16) (0x1 << bit);
13739+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
13740+ store_data_word(srcoffset + disp, (u16) (srcval ^ mask));
13741 }
13742 break;
13743- case 3: /* register to register */
13744+ case 3: /* register to register */
13745 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13746- u32 *srcreg,*shiftreg;
13747+ u32 *srcreg, *shiftreg;
13748 u32 mask;
13749
13750 srcreg = DECODE_RM_LONG_REGISTER(rl);
13751@@ -2200,19 +2226,20 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
13752 TRACE_AND_STEP();
13753 bit = *shiftreg & 0x1F;
13754 mask = (0x1 << bit);
13755- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
13756- *srcreg ^= mask;
13757- } else {
13758- u16 *srcreg,*shiftreg;
13759- u16 mask;
13760-
13761- srcreg = DECODE_RM_WORD_REGISTER(rl);
13762- DECODE_PRINTF(",");
13763- shiftreg = DECODE_RM_WORD_REGISTER(rh);
13764- TRACE_AND_STEP();
13765- bit = *shiftreg & 0xF;
13766- mask = (u16)(0x1 << bit);
13767- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
13768+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
13769+ *srcreg ^= mask;
13770+ }
13771+ else {
13772+ u16 *srcreg, *shiftreg;
13773+ u16 mask;
13774+
13775+ srcreg = DECODE_RM_WORD_REGISTER(rl);
13776+ DECODE_PRINTF(",");
13777+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
13778+ TRACE_AND_STEP();
13779+ bit = *shiftreg & 0xF;
13780+ mask = (u16) (0x1 << bit);
13781+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
13782 *srcreg ^= mask;
13783 }
13784 break;
13785@@ -2225,7 +2252,8 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
13786 REMARKS:
13787 Handles opcode 0x0f,0xbc
13788 ****************************************************************************/
13789-static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
13790+static void
13791+x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
13792 {
13793 int mod, rl, rh;
13794 uint srcoffset;
13795@@ -2233,105 +2261,117 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
13796 START_OF_INSTR();
13797 DECODE_PRINTF("BSF\t");
13798 FETCH_DECODE_MODRM(mod, rh, rl);
13799- switch(mod) {
13800+ switch (mod) {
13801 case 0:
13802- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13803- u32 srcval, *dstreg;
13804-
13805- srcoffset = decode_rm00_address(rl);
13806- DECODE_PRINTF(",");
13807- dstreg = DECODE_RM_LONG_REGISTER(rh);
13808- TRACE_AND_STEP();
13809- srcval = fetch_data_long(srcoffset);
13810- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
13811- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
13812- if ((srcval >> *dstreg) & 1) break;
13813- } else {
13814- u16 srcval, *dstreg;
13815-
13816- srcoffset = decode_rm00_address(rl);
13817- DECODE_PRINTF(",");
13818- dstreg = DECODE_RM_WORD_REGISTER(rh);
13819- TRACE_AND_STEP();
13820- srcval = fetch_data_word(srcoffset);
13821- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
13822- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
13823- if ((srcval >> *dstreg) & 1) break;
13824- }
13825- break;
13826+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13827+ u32 srcval, *dstreg;
13828+
13829+ srcoffset = decode_rm00_address(rl);
13830+ DECODE_PRINTF(",");
13831+ dstreg = DECODE_RM_LONG_REGISTER(rh);
13832+ TRACE_AND_STEP();
13833+ srcval = fetch_data_long(srcoffset);
13834+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
13835+ for (*dstreg = 0; *dstreg < 32; (*dstreg)++)
13836+ if ((srcval >> *dstreg) & 1)
13837+ break;
13838+ }
13839+ else {
13840+ u16 srcval, *dstreg;
13841+
13842+ srcoffset = decode_rm00_address(rl);
13843+ DECODE_PRINTF(",");
13844+ dstreg = DECODE_RM_WORD_REGISTER(rh);
13845+ TRACE_AND_STEP();
13846+ srcval = fetch_data_word(srcoffset);
13847+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
13848+ for (*dstreg = 0; *dstreg < 16; (*dstreg)++)
13849+ if ((srcval >> *dstreg) & 1)
13850+ break;
13851+ }
13852+ break;
13853 case 1:
13854- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13855- u32 srcval, *dstreg;
13856-
13857- srcoffset = decode_rm01_address(rl);
13858- DECODE_PRINTF(",");
13859- dstreg = DECODE_RM_LONG_REGISTER(rh);
13860- TRACE_AND_STEP();
13861- srcval = fetch_data_long(srcoffset);
13862- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
13863- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
13864- if ((srcval >> *dstreg) & 1) break;
13865- } else {
13866- u16 srcval, *dstreg;
13867-
13868- srcoffset = decode_rm01_address(rl);
13869- DECODE_PRINTF(",");
13870- dstreg = DECODE_RM_WORD_REGISTER(rh);
13871- TRACE_AND_STEP();
13872- srcval = fetch_data_word(srcoffset);
13873- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
13874- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
13875- if ((srcval >> *dstreg) & 1) break;
13876- }
13877- break;
13878+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13879+ u32 srcval, *dstreg;
13880+
13881+ srcoffset = decode_rm01_address(rl);
13882+ DECODE_PRINTF(",");
13883+ dstreg = DECODE_RM_LONG_REGISTER(rh);
13884+ TRACE_AND_STEP();
13885+ srcval = fetch_data_long(srcoffset);
13886+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
13887+ for (*dstreg = 0; *dstreg < 32; (*dstreg)++)
13888+ if ((srcval >> *dstreg) & 1)
13889+ break;
13890+ }
13891+ else {
13892+ u16 srcval, *dstreg;
13893+
13894+ srcoffset = decode_rm01_address(rl);
13895+ DECODE_PRINTF(",");
13896+ dstreg = DECODE_RM_WORD_REGISTER(rh);
13897+ TRACE_AND_STEP();
13898+ srcval = fetch_data_word(srcoffset);
13899+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
13900+ for (*dstreg = 0; *dstreg < 16; (*dstreg)++)
13901+ if ((srcval >> *dstreg) & 1)
13902+ break;
13903+ }
13904+ break;
13905 case 2:
13906- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13907- u32 srcval, *dstreg;
13908-
13909- srcoffset = decode_rm10_address(rl);
13910- DECODE_PRINTF(",");
13911- dstreg = DECODE_RM_LONG_REGISTER(rh);
13912- TRACE_AND_STEP();
13913- srcval = fetch_data_long(srcoffset);
13914- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
13915- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
13916- if ((srcval >> *dstreg) & 1) break;
13917- } else {
13918- u16 srcval, *dstreg;
13919-
13920- srcoffset = decode_rm10_address(rl);
13921- DECODE_PRINTF(",");
13922- dstreg = DECODE_RM_WORD_REGISTER(rh);
13923- TRACE_AND_STEP();
13924- srcval = fetch_data_word(srcoffset);
13925- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
13926- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
13927- if ((srcval >> *dstreg) & 1) break;
13928- }
13929- break;
13930- case 3: /* register to register */
13931- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13932- u32 srcval, *dstreg;
13933-
13934- srcval = *DECODE_RM_LONG_REGISTER(rl);
13935- DECODE_PRINTF(",");
13936- dstreg = DECODE_RM_LONG_REGISTER(rh);
13937- TRACE_AND_STEP();
13938- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
13939- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
13940- if ((srcval >> *dstreg) & 1) break;
13941- } else {
13942- u16 srcval, *dstreg;
13943-
13944- srcval = *DECODE_RM_WORD_REGISTER(rl);
13945- DECODE_PRINTF(",");
13946- dstreg = DECODE_RM_WORD_REGISTER(rh);
13947- TRACE_AND_STEP();
13948- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
13949- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
13950- if ((srcval >> *dstreg) & 1) break;
13951- }
13952- break;
13953+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13954+ u32 srcval, *dstreg;
13955+
13956+ srcoffset = decode_rm10_address(rl);
13957+ DECODE_PRINTF(",");
13958+ dstreg = DECODE_RM_LONG_REGISTER(rh);
13959+ TRACE_AND_STEP();
13960+ srcval = fetch_data_long(srcoffset);
13961+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
13962+ for (*dstreg = 0; *dstreg < 32; (*dstreg)++)
13963+ if ((srcval >> *dstreg) & 1)
13964+ break;
13965+ }
13966+ else {
13967+ u16 srcval, *dstreg;
13968+
13969+ srcoffset = decode_rm10_address(rl);
13970+ DECODE_PRINTF(",");
13971+ dstreg = DECODE_RM_WORD_REGISTER(rh);
13972+ TRACE_AND_STEP();
13973+ srcval = fetch_data_word(srcoffset);
13974+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
13975+ for (*dstreg = 0; *dstreg < 16; (*dstreg)++)
13976+ if ((srcval >> *dstreg) & 1)
13977+ break;
13978+ }
13979+ break;
13980+ case 3: /* register to register */
13981+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
13982+ u32 srcval, *dstreg;
13983+
13984+ srcval = *DECODE_RM_LONG_REGISTER(rl);
13985+ DECODE_PRINTF(",");
13986+ dstreg = DECODE_RM_LONG_REGISTER(rh);
13987+ TRACE_AND_STEP();
13988+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
13989+ for (*dstreg = 0; *dstreg < 32; (*dstreg)++)
13990+ if ((srcval >> *dstreg) & 1)
13991+ break;
13992+ }
13993+ else {
13994+ u16 srcval, *dstreg;
13995+
13996+ srcval = *DECODE_RM_WORD_REGISTER(rl);
13997+ DECODE_PRINTF(",");
13998+ dstreg = DECODE_RM_WORD_REGISTER(rh);
13999+ TRACE_AND_STEP();
14000+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14001+ for (*dstreg = 0; *dstreg < 16; (*dstreg)++)
14002+ if ((srcval >> *dstreg) & 1)
14003+ break;
14004+ }
14005+ break;
14006 }
14007 DECODE_CLEAR_SEGOVR();
14008 END_OF_INSTR();
14009@@ -2341,7 +2381,8 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
14010 REMARKS:
14011 Handles opcode 0x0f,0xbd
14012 ****************************************************************************/
14013-static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
14014+static void
14015+x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
14016 {
14017 int mod, rl, rh;
14018 uint srcoffset;
14019@@ -2349,105 +2390,117 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
14020 START_OF_INSTR();
14021 DECODE_PRINTF("BSR\t");
14022 FETCH_DECODE_MODRM(mod, rh, rl);
14023- switch(mod) {
14024+ switch (mod) {
14025 case 0:
14026- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
14027- u32 srcval, *dstreg;
14028-
14029- srcoffset = decode_rm00_address(rl);
14030- DECODE_PRINTF(",");
14031- dstreg = DECODE_RM_LONG_REGISTER(rh);
14032- TRACE_AND_STEP();
14033- srcval = fetch_data_long(srcoffset);
14034- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14035- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
14036- if ((srcval >> *dstreg) & 1) break;
14037- } else {
14038- u16 srcval, *dstreg;
14039-
14040- srcoffset = decode_rm00_address(rl);
14041- DECODE_PRINTF(",");
14042- dstreg = DECODE_RM_WORD_REGISTER(rh);
14043- TRACE_AND_STEP();
14044- srcval = fetch_data_word(srcoffset);
14045- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14046- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
14047- if ((srcval >> *dstreg) & 1) break;
14048- }
14049- break;
14050+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
14051+ u32 srcval, *dstreg;
14052+
14053+ srcoffset = decode_rm00_address(rl);
14054+ DECODE_PRINTF(",");
14055+ dstreg = DECODE_RM_LONG_REGISTER(rh);
14056+ TRACE_AND_STEP();
14057+ srcval = fetch_data_long(srcoffset);
14058+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14059+ for (*dstreg = 31; *dstreg > 0; (*dstreg)--)
14060+ if ((srcval >> *dstreg) & 1)
14061+ break;
14062+ }
14063+ else {
14064+ u16 srcval, *dstreg;
14065+
14066+ srcoffset = decode_rm00_address(rl);
14067+ DECODE_PRINTF(",");
14068+ dstreg = DECODE_RM_WORD_REGISTER(rh);
14069+ TRACE_AND_STEP();
14070+ srcval = fetch_data_word(srcoffset);
14071+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14072+ for (*dstreg = 15; *dstreg > 0; (*dstreg)--)
14073+ if ((srcval >> *dstreg) & 1)
14074+ break;
14075+ }
14076+ break;
14077 case 1:
14078- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
14079- u32 srcval, *dstreg;
14080-
14081- srcoffset = decode_rm01_address(rl);
14082- DECODE_PRINTF(",");
14083- dstreg = DECODE_RM_LONG_REGISTER(rh);
14084- TRACE_AND_STEP();
14085- srcval = fetch_data_long(srcoffset);
14086- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14087- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
14088- if ((srcval >> *dstreg) & 1) break;
14089- } else {
14090- u16 srcval, *dstreg;
14091-
14092- srcoffset = decode_rm01_address(rl);
14093- DECODE_PRINTF(",");
14094- dstreg = DECODE_RM_WORD_REGISTER(rh);
14095- TRACE_AND_STEP();
14096- srcval = fetch_data_word(srcoffset);
14097- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14098- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
14099- if ((srcval >> *dstreg) & 1) break;
14100- }
14101- break;
14102+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
14103+ u32 srcval, *dstreg;
14104+
14105+ srcoffset = decode_rm01_address(rl);
14106+ DECODE_PRINTF(",");
14107+ dstreg = DECODE_RM_LONG_REGISTER(rh);
14108+ TRACE_AND_STEP();
14109+ srcval = fetch_data_long(srcoffset);
14110+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14111+ for (*dstreg = 31; *dstreg > 0; (*dstreg)--)
14112+ if ((srcval >> *dstreg) & 1)
14113+ break;
14114+ }
14115+ else {
14116+ u16 srcval, *dstreg;
14117+
14118+ srcoffset = decode_rm01_address(rl);
14119+ DECODE_PRINTF(",");
14120+ dstreg = DECODE_RM_WORD_REGISTER(rh);
14121+ TRACE_AND_STEP();
14122+ srcval = fetch_data_word(srcoffset);
14123+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14124+ for (*dstreg = 15; *dstreg > 0; (*dstreg)--)
14125+ if ((srcval >> *dstreg) & 1)
14126+ break;
14127+ }
14128+ break;
14129 case 2:
14130- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
14131- u32 srcval, *dstreg;
14132-
14133- srcoffset = decode_rm10_address(rl);
14134- DECODE_PRINTF(",");
14135- dstreg = DECODE_RM_LONG_REGISTER(rh);
14136- TRACE_AND_STEP();
14137- srcval = fetch_data_long(srcoffset);
14138- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14139- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
14140- if ((srcval >> *dstreg) & 1) break;
14141- } else {
14142- u16 srcval, *dstreg;
14143-
14144- srcoffset = decode_rm10_address(rl);
14145- DECODE_PRINTF(",");
14146- dstreg = DECODE_RM_WORD_REGISTER(rh);
14147- TRACE_AND_STEP();
14148- srcval = fetch_data_word(srcoffset);
14149- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14150- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
14151- if ((srcval >> *dstreg) & 1) break;
14152- }
14153- break;
14154- case 3: /* register to register */
14155- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
14156- u32 srcval, *dstreg;
14157-
14158- srcval = *DECODE_RM_LONG_REGISTER(rl);
14159- DECODE_PRINTF(",");
14160- dstreg = DECODE_RM_LONG_REGISTER(rh);
14161- TRACE_AND_STEP();
14162- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14163- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
14164- if ((srcval >> *dstreg) & 1) break;
14165- } else {
14166- u16 srcval, *dstreg;
14167-
14168- srcval = *DECODE_RM_WORD_REGISTER(rl);
14169- DECODE_PRINTF(",");
14170- dstreg = DECODE_RM_WORD_REGISTER(rh);
14171- TRACE_AND_STEP();
14172- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14173- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
14174- if ((srcval >> *dstreg) & 1) break;
14175- }
14176- break;
14177+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
14178+ u32 srcval, *dstreg;
14179+
14180+ srcoffset = decode_rm10_address(rl);
14181+ DECODE_PRINTF(",");
14182+ dstreg = DECODE_RM_LONG_REGISTER(rh);
14183+ TRACE_AND_STEP();
14184+ srcval = fetch_data_long(srcoffset);
14185+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14186+ for (*dstreg = 31; *dstreg > 0; (*dstreg)--)
14187+ if ((srcval >> *dstreg) & 1)
14188+ break;
14189+ }
14190+ else {
14191+ u16 srcval, *dstreg;
14192+
14193+ srcoffset = decode_rm10_address(rl);
14194+ DECODE_PRINTF(",");
14195+ dstreg = DECODE_RM_WORD_REGISTER(rh);
14196+ TRACE_AND_STEP();
14197+ srcval = fetch_data_word(srcoffset);
14198+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14199+ for (*dstreg = 15; *dstreg > 0; (*dstreg)--)
14200+ if ((srcval >> *dstreg) & 1)
14201+ break;
14202+ }
14203+ break;
14204+ case 3: /* register to register */
14205+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
14206+ u32 srcval, *dstreg;
14207+
14208+ srcval = *DECODE_RM_LONG_REGISTER(rl);
14209+ DECODE_PRINTF(",");
14210+ dstreg = DECODE_RM_LONG_REGISTER(rh);
14211+ TRACE_AND_STEP();
14212+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14213+ for (*dstreg = 31; *dstreg > 0; (*dstreg)--)
14214+ if ((srcval >> *dstreg) & 1)
14215+ break;
14216+ }
14217+ else {
14218+ u16 srcval, *dstreg;
14219+
14220+ srcval = *DECODE_RM_WORD_REGISTER(rl);
14221+ DECODE_PRINTF(",");
14222+ dstreg = DECODE_RM_WORD_REGISTER(rh);
14223+ TRACE_AND_STEP();
14224+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
14225+ for (*dstreg = 15; *dstreg > 0; (*dstreg)--)
14226+ if ((srcval >> *dstreg) & 1)
14227+ break;
14228+ }
14229+ break;
14230 }
14231 DECODE_CLEAR_SEGOVR();
14232 END_OF_INSTR();
14233@@ -2457,7 +2510,8 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
14234 REMARKS:
14235 Handles opcode 0x0f,0xbe
14236 ****************************************************************************/
14237-static void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
14238+static void
14239+x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
14240 {
14241 int mod, rl, rh;
14242 uint srcoffset;
14243@@ -2474,18 +2528,19 @@ static void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
14244 destreg = DECODE_RM_LONG_REGISTER(rh);
14245 DECODE_PRINTF(",");
14246 srcoffset = decode_rm00_address(rl);
14247- srcval = (s32)((s8)fetch_data_byte(srcoffset));
14248+ srcval = (s32) ((s8) fetch_data_byte(srcoffset));
14249 DECODE_PRINTF("\n");
14250 TRACE_AND_STEP();
14251 *destreg = srcval;
14252- } else {
14253+ }
14254+ else {
14255 u16 *destreg;
14256 u16 srcval;
14257
14258 destreg = DECODE_RM_WORD_REGISTER(rh);
14259 DECODE_PRINTF(",");
14260 srcoffset = decode_rm00_address(rl);
14261- srcval = (s16)((s8)fetch_data_byte(srcoffset));
14262+ srcval = (s16) ((s8) fetch_data_byte(srcoffset));
14263 DECODE_PRINTF("\n");
14264 TRACE_AND_STEP();
14265 *destreg = srcval;
14266@@ -2499,18 +2554,19 @@ static void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
14267 destreg = DECODE_RM_LONG_REGISTER(rh);
14268 DECODE_PRINTF(",");
14269 srcoffset = decode_rm01_address(rl);
14270- srcval = (s32)((s8)fetch_data_byte(srcoffset));
14271+ srcval = (s32) ((s8) fetch_data_byte(srcoffset));
14272 DECODE_PRINTF("\n");
14273 TRACE_AND_STEP();
14274 *destreg = srcval;
14275- } else {
14276+ }
14277+ else {
14278 u16 *destreg;
14279 u16 srcval;
14280
14281 destreg = DECODE_RM_WORD_REGISTER(rh);
14282 DECODE_PRINTF(",");
14283 srcoffset = decode_rm01_address(rl);
14284- srcval = (s16)((s8)fetch_data_byte(srcoffset));
14285+ srcval = (s16) ((s8) fetch_data_byte(srcoffset));
14286 DECODE_PRINTF("\n");
14287 TRACE_AND_STEP();
14288 *destreg = srcval;
14289@@ -2524,44 +2580,46 @@ static void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
14290 destreg = DECODE_RM_LONG_REGISTER(rh);
14291 DECODE_PRINTF(",");
14292 srcoffset = decode_rm10_address(rl);
14293- srcval = (s32)((s8)fetch_data_byte(srcoffset));
14294+ srcval = (s32) ((s8) fetch_data_byte(srcoffset));
14295 DECODE_PRINTF("\n");
14296 TRACE_AND_STEP();
14297 *destreg = srcval;
14298- } else {
14299+ }
14300+ else {
14301 u16 *destreg;
14302 u16 srcval;
14303
14304 destreg = DECODE_RM_WORD_REGISTER(rh);
14305 DECODE_PRINTF(",");
14306 srcoffset = decode_rm10_address(rl);
14307- srcval = (s16)((s8)fetch_data_byte(srcoffset));
14308+ srcval = (s16) ((s8) fetch_data_byte(srcoffset));
14309 DECODE_PRINTF("\n");
14310 TRACE_AND_STEP();
14311 *destreg = srcval;
14312 }
14313 break;
14314- case 3: /* register to register */
14315+ case 3: /* register to register */
14316 if (M.x86.mode & SYSMODE_PREFIX_DATA) {
14317 u32 *destreg;
14318- u8 *srcreg;
14319+ u8 *srcreg;
14320
14321 destreg = DECODE_RM_LONG_REGISTER(rh);
14322 DECODE_PRINTF(",");
14323 srcreg = DECODE_RM_BYTE_REGISTER(rl);
14324 DECODE_PRINTF("\n");
14325 TRACE_AND_STEP();
14326- *destreg = (s32)((s8)*srcreg);
14327- } else {
14328+ *destreg = (s32) ((s8) * srcreg);
14329+ }
14330+ else {
14331 u16 *destreg;
14332- u8 *srcreg;
14333+ u8 *srcreg;
14334
14335 destreg = DECODE_RM_WORD_REGISTER(rh);
14336 DECODE_PRINTF(",");
14337 srcreg = DECODE_RM_BYTE_REGISTER(rl);
14338 DECODE_PRINTF("\n");
14339 TRACE_AND_STEP();
14340- *destreg = (s16)((s8)*srcreg);
14341+ *destreg = (s16) ((s8) * srcreg);
14342 }
14343 break;
14344 }
14345@@ -2573,7 +2631,8 @@ static void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
14346 REMARKS:
14347 Handles opcode 0x0f,0xbf
14348 ****************************************************************************/
14349-static void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
14350+static void
14351+x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
14352 {
14353 int mod, rl, rh;
14354 uint srcoffset;
14355@@ -2589,7 +2648,7 @@ static void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
14356 destreg = DECODE_RM_LONG_REGISTER(rh);
14357 DECODE_PRINTF(",");
14358 srcoffset = decode_rm00_address(rl);
14359- srcval = (s32)((s16)fetch_data_word(srcoffset));
14360+ srcval = (s32) ((s16) fetch_data_word(srcoffset));
14361 DECODE_PRINTF("\n");
14362 TRACE_AND_STEP();
14363 *destreg = srcval;
14364@@ -2598,7 +2657,7 @@ static void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
14365 destreg = DECODE_RM_LONG_REGISTER(rh);
14366 DECODE_PRINTF(",");
14367 srcoffset = decode_rm01_address(rl);
14368- srcval = (s32)((s16)fetch_data_word(srcoffset));
14369+ srcval = (s32) ((s16) fetch_data_word(srcoffset));
14370 DECODE_PRINTF("\n");
14371 TRACE_AND_STEP();
14372 *destreg = srcval;
14373@@ -2607,18 +2666,18 @@ static void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
14374 destreg = DECODE_RM_LONG_REGISTER(rh);
14375 DECODE_PRINTF(",");
14376 srcoffset = decode_rm10_address(rl);
14377- srcval = (s32)((s16)fetch_data_word(srcoffset));
14378+ srcval = (s32) ((s16) fetch_data_word(srcoffset));
14379 DECODE_PRINTF("\n");
14380 TRACE_AND_STEP();
14381 *destreg = srcval;
14382 break;
14383- case 3: /* register to register */
14384+ case 3: /* register to register */
14385 destreg = DECODE_RM_LONG_REGISTER(rh);
14386 DECODE_PRINTF(",");
14387 srcreg = DECODE_RM_WORD_REGISTER(rl);
14388 DECODE_PRINTF("\n");
14389 TRACE_AND_STEP();
14390- *destreg = (s32)((s16)*srcreg);
14391+ *destreg = (s32) ((s16) * srcreg);
14392 break;
14393 }
14394 DECODE_CLEAR_SEGOVR();
14395@@ -2626,40 +2685,41 @@ static void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
14396 }
14397
14398 /* Handles opcodes 0xc8-0xcf */
14399-static void x86emuOp2_bswap(u8 X86EMU_UNUSED(op2))
14400+static void
14401+x86emuOp2_bswap(u8 X86EMU_UNUSED(op2))
14402 {
14403 START_OF_INSTR();
14404 DECODE_PRINTF("BSWAP\n");
14405 TRACE_AND_STEP();
14406
14407 switch (op2) {
14408- case 0xc8:
14409- M.x86.R_EAX = bswap_32(M.x86.R_EAX);
14410- break;
14411- case 0xc9:
14412- M.x86.R_ECX = bswap_32(M.x86.R_ECX);
14413- break;
14414- case 0xca:
14415- M.x86.R_EDX = bswap_32(M.x86.R_EDX);
14416- break;
14417- case 0xcb:
14418- M.x86.R_EBX = bswap_32(M.x86.R_EBX);
14419- break;
14420- case 0xcc:
14421- M.x86.R_ESP = bswap_32(M.x86.R_ESP);
14422- break;
14423- case 0xcd:
14424- M.x86.R_EBP = bswap_32(M.x86.R_EBP);
14425- break;
14426- case 0xce:
14427- M.x86.R_ESI = bswap_32(M.x86.R_ESI);
14428- break;
14429- case 0xcf:
14430- M.x86.R_EDI = bswap_32(M.x86.R_EDI);
14431- break;
14432- default:
14433- /* can't happen */
14434- break;
14435+ case 0xc8:
14436+ M.x86.R_EAX = bswap_32(M.x86.R_EAX);
14437+ break;
14438+ case 0xc9:
14439+ M.x86.R_ECX = bswap_32(M.x86.R_ECX);
14440+ break;
14441+ case 0xca:
14442+ M.x86.R_EDX = bswap_32(M.x86.R_EDX);
14443+ break;
14444+ case 0xcb:
14445+ M.x86.R_EBX = bswap_32(M.x86.R_EBX);
14446+ break;
14447+ case 0xcc:
14448+ M.x86.R_ESP = bswap_32(M.x86.R_ESP);
14449+ break;
14450+ case 0xcd:
14451+ M.x86.R_EBP = bswap_32(M.x86.R_EBP);
14452+ break;
14453+ case 0xce:
14454+ M.x86.R_ESI = bswap_32(M.x86.R_ESI);
14455+ break;
14456+ case 0xcf:
14457+ M.x86.R_EDI = bswap_32(M.x86.R_EDI);
14458+ break;
14459+ default:
14460+ /* can't happen */
14461+ break;
14462 }
14463
14464 DECODE_CLEAR_SEGOVR();
14465@@ -2669,25 +2729,32 @@ static void x86emuOp2_bswap(u8 X86EMU_UNUSED(op2))
14466 /***************************************************************************
14467 * Double byte operation code table:
14468 **************************************************************************/
14469-void (*x86emu_optab2[256])(u8) =
14470-{
14471-/* 0x00 */ x86emuOp2_illegal_op, /* Group F (ring 0 PM) */
14472-/* 0x01 */ x86emuOp2_group_g, /* Group G (ring 0 PM) */
14473-/* 0x02 */ x86emuOp2_illegal_op, /* lar (ring 0 PM) */
14474-/* 0x03 */ x86emuOp2_illegal_op, /* lsl (ring 0 PM) */
14475+void (*x86emu_optab2[256]) (u8) = {
14476+ /* 0x00 */ x86emuOp2_illegal_op,
14477+ /* Group F (ring 0 PM) */
14478+ /* 0x01 */ x86emuOp2_illegal_op,
14479+ /* Group G (ring 0 PM) */
14480+ /* 0x02 */ x86emuOp2_illegal_op,
14481+ /* lar (ring 0 PM) */
14482+ /* 0x03 */ x86emuOp2_illegal_op,
14483+ /* lsl (ring 0 PM) */
14484 /* 0x04 */ x86emuOp2_illegal_op,
14485-/* 0x05 */ x86emuOp2_illegal_op, /* loadall (undocumented) */
14486-/* 0x06 */ x86emuOp2_illegal_op, /* clts (ring 0 PM) */
14487-/* 0x07 */ x86emuOp2_illegal_op, /* loadall (undocumented) */
14488-/* 0x08 */ x86emuOp2_illegal_op, /* invd (ring 0 PM) */
14489-/* 0x09 */ x86emuOp2_illegal_op, /* wbinvd (ring 0 PM) */
14490+ /* 0x05 */ x86emuOp2_illegal_op,
14491+ /* loadall (undocumented) */
14492+ /* 0x06 */ x86emuOp2_illegal_op,
14493+ /* clts (ring 0 PM) */
14494+ /* 0x07 */ x86emuOp2_illegal_op,
14495+ /* loadall (undocumented) */
14496+ /* 0x08 */ x86emuOp2_illegal_op,
14497+ /* invd (ring 0 PM) */
14498+ /* 0x09 */ x86emuOp2_illegal_op,
14499+ /* wbinvd (ring 0 PM) */
14500 /* 0x0a */ x86emuOp2_illegal_op,
14501 /* 0x0b */ x86emuOp2_illegal_op,
14502 /* 0x0c */ x86emuOp2_illegal_op,
14503 /* 0x0d */ x86emuOp2_illegal_op,
14504 /* 0x0e */ x86emuOp2_illegal_op,
14505 /* 0x0f */ x86emuOp2_illegal_op,
14506-
14507 /* 0x10 */ x86emuOp2_illegal_op,
14508 /* 0x11 */ x86emuOp2_illegal_op,
14509 /* 0x12 */ x86emuOp2_illegal_op,
14510@@ -2704,14 +2771,19 @@ void (*x86emu_optab2[256])(u8) =
14511 /* 0x1d */ x86emuOp2_illegal_op,
14512 /* 0x1e */ x86emuOp2_illegal_op,
14513 /* 0x1f */ x86emuOp2_illegal_op,
14514-
14515-/* 0x20 */ x86emuOp2_illegal_op, /* mov reg32,creg (ring 0 PM) */
14516-/* 0x21 */ x86emuOp2_illegal_op, /* mov reg32,dreg (ring 0 PM) */
14517-/* 0x22 */ x86emuOp2_illegal_op, /* mov creg,reg32 (ring 0 PM) */
14518-/* 0x23 */ x86emuOp2_illegal_op, /* mov dreg,reg32 (ring 0 PM) */
14519-/* 0x24 */ x86emuOp2_illegal_op, /* mov reg32,treg (ring 0 PM) */
14520+ /* 0x20 */ x86emuOp2_illegal_op,
14521+ /* mov reg32,creg (ring 0 PM) */
14522+ /* 0x21 */ x86emuOp2_illegal_op,
14523+ /* mov reg32,dreg (ring 0 PM) */
14524+ /* 0x22 */ x86emuOp2_illegal_op,
14525+ /* mov creg,reg32 (ring 0 PM) */
14526+ /* 0x23 */ x86emuOp2_illegal_op,
14527+ /* mov dreg,reg32 (ring 0 PM) */
14528+ /* 0x24 */ x86emuOp2_illegal_op,
14529+ /* mov reg32,treg (ring 0 PM) */
14530 /* 0x25 */ x86emuOp2_illegal_op,
14531-/* 0x26 */ x86emuOp2_illegal_op, /* mov treg,reg32 (ring 0 PM) */
14532+ /* 0x26 */ x86emuOp2_illegal_op,
14533+ /* mov treg,reg32 (ring 0 PM) */
14534 /* 0x27 */ x86emuOp2_illegal_op,
14535 /* 0x28 */ x86emuOp2_illegal_op,
14536 /* 0x29 */ x86emuOp2_illegal_op,
14537@@ -2721,7 +2793,6 @@ void (*x86emu_optab2[256])(u8) =
14538 /* 0x2d */ x86emuOp2_illegal_op,
14539 /* 0x2e */ x86emuOp2_illegal_op,
14540 /* 0x2f */ x86emuOp2_illegal_op,
14541-
14542 /* 0x30 */ x86emuOp2_illegal_op,
14543 /* 0x31 */ x86emuOp2_rdtsc,
14544 /* 0x32 */ x86emuOp2_illegal_op,
14545@@ -2738,7 +2809,6 @@ void (*x86emu_optab2[256])(u8) =
14546 /* 0x3d */ x86emuOp2_illegal_op,
14547 /* 0x3e */ x86emuOp2_illegal_op,
14548 /* 0x3f */ x86emuOp2_illegal_op,
14549-
14550 /* 0x40 */ x86emuOp2_illegal_op,
14551 /* 0x41 */ x86emuOp2_illegal_op,
14552 /* 0x42 */ x86emuOp2_illegal_op,
14553@@ -2755,7 +2825,6 @@ void (*x86emu_optab2[256])(u8) =
14554 /* 0x4d */ x86emuOp2_illegal_op,
14555 /* 0x4e */ x86emuOp2_illegal_op,
14556 /* 0x4f */ x86emuOp2_illegal_op,
14557-
14558 /* 0x50 */ x86emuOp2_illegal_op,
14559 /* 0x51 */ x86emuOp2_illegal_op,
14560 /* 0x52 */ x86emuOp2_illegal_op,
14561@@ -2772,7 +2841,6 @@ void (*x86emu_optab2[256])(u8) =
14562 /* 0x5d */ x86emuOp2_illegal_op,
14563 /* 0x5e */ x86emuOp2_illegal_op,
14564 /* 0x5f */ x86emuOp2_illegal_op,
14565-
14566 /* 0x60 */ x86emuOp2_illegal_op,
14567 /* 0x61 */ x86emuOp2_illegal_op,
14568 /* 0x62 */ x86emuOp2_illegal_op,
14569@@ -2789,7 +2857,6 @@ void (*x86emu_optab2[256])(u8) =
14570 /* 0x6d */ x86emuOp2_illegal_op,
14571 /* 0x6e */ x86emuOp2_illegal_op,
14572 /* 0x6f */ x86emuOp2_illegal_op,
14573-
14574 /* 0x70 */ x86emuOp2_illegal_op,
14575 /* 0x71 */ x86emuOp2_illegal_op,
14576 /* 0x72 */ x86emuOp2_illegal_op,
14577@@ -2806,7 +2873,6 @@ void (*x86emu_optab2[256])(u8) =
14578 /* 0x7d */ x86emuOp2_illegal_op,
14579 /* 0x7e */ x86emuOp2_illegal_op,
14580 /* 0x7f */ x86emuOp2_illegal_op,
14581-
14582 /* 0x80 */ x86emuOp2_long_jump,
14583 /* 0x81 */ x86emuOp2_long_jump,
14584 /* 0x82 */ x86emuOp2_long_jump,
14585@@ -2823,7 +2889,6 @@ void (*x86emu_optab2[256])(u8) =
14586 /* 0x8d */ x86emuOp2_long_jump,
14587 /* 0x8e */ x86emuOp2_long_jump,
14588 /* 0x8f */ x86emuOp2_long_jump,
14589-
14590 /* 0x90 */ x86emuOp2_set_byte,
14591 /* 0x91 */ x86emuOp2_set_byte,
14592 /* 0x92 */ x86emuOp2_set_byte,
14593@@ -2840,7 +2905,6 @@ void (*x86emu_optab2[256])(u8) =
14594 /* 0x9d */ x86emuOp2_set_byte,
14595 /* 0x9e */ x86emuOp2_set_byte,
14596 /* 0x9f */ x86emuOp2_set_byte,
14597-
14598 /* 0xa0 */ x86emuOp2_push_FS,
14599 /* 0xa1 */ x86emuOp2_pop_FS,
14600 /* 0xa2 */ x86emuOp2_cpuid,
14601@@ -2857,9 +2921,10 @@ void (*x86emu_optab2[256])(u8) =
14602 /* 0xad */ x86emuOp2_shrd_CL,
14603 /* 0xae */ x86emuOp2_illegal_op,
14604 /* 0xaf */ x86emuOp2_imul_R_RM,
14605-
14606-/* 0xb0 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */
14607-/* 0xb1 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */
14608+ /* 0xb0 */ x86emuOp2_illegal_op,
14609+ /* TODO: cmpxchg */
14610+ /* 0xb1 */ x86emuOp2_illegal_op,
14611+ /* TODO: cmpxchg */
14612 /* 0xb2 */ x86emuOp2_lss_R_IMM,
14613 /* 0xb3 */ x86emuOp2_btr_R,
14614 /* 0xb4 */ x86emuOp2_lfs_R_IMM,
14615@@ -2874,9 +2939,10 @@ void (*x86emu_optab2[256])(u8) =
14616 /* 0xbd */ x86emuOp2_bsr,
14617 /* 0xbe */ x86emuOp2_movsx_byte_R_RM,
14618 /* 0xbf */ x86emuOp2_movsx_word_R_RM,
14619-
14620-/* 0xc0 */ x86emuOp2_illegal_op, /* TODO: xadd */
14621-/* 0xc1 */ x86emuOp2_illegal_op, /* TODO: xadd */
14622+ /* 0xc0 */ x86emuOp2_illegal_op,
14623+ /* TODO: xadd */
14624+ /* 0xc1 */ x86emuOp2_illegal_op,
14625+ /* TODO: xadd */
14626 /* 0xc2 */ x86emuOp2_illegal_op,
14627 /* 0xc3 */ x86emuOp2_illegal_op,
14628 /* 0xc4 */ x86emuOp2_illegal_op,
14629@@ -2891,7 +2957,6 @@ void (*x86emu_optab2[256])(u8) =
14630 /* 0xcd */ x86emuOp2_bswap,
14631 /* 0xce */ x86emuOp2_bswap,
14632 /* 0xcf */ x86emuOp2_bswap,
14633-
14634 /* 0xd0 */ x86emuOp2_illegal_op,
14635 /* 0xd1 */ x86emuOp2_illegal_op,
14636 /* 0xd2 */ x86emuOp2_illegal_op,
14637@@ -2908,7 +2973,6 @@ void (*x86emu_optab2[256])(u8) =
14638 /* 0xdd */ x86emuOp2_illegal_op,
14639 /* 0xde */ x86emuOp2_illegal_op,
14640 /* 0xdf */ x86emuOp2_illegal_op,
14641-
14642 /* 0xe0 */ x86emuOp2_illegal_op,
14643 /* 0xe1 */ x86emuOp2_illegal_op,
14644 /* 0xe2 */ x86emuOp2_illegal_op,
14645@@ -2925,7 +2989,6 @@ void (*x86emu_optab2[256])(u8) =
14646 /* 0xed */ x86emuOp2_illegal_op,
14647 /* 0xee */ x86emuOp2_illegal_op,
14648 /* 0xef */ x86emuOp2_illegal_op,
14649-
14650 /* 0xf0 */ x86emuOp2_illegal_op,
14651 /* 0xf1 */ x86emuOp2_illegal_op,
14652 /* 0xf2 */ x86emuOp2_illegal_op,
14653diff --git a/libs/x86emu/prim_ops.c b/libs/x86emu/prim_ops.c
14654index ff17c3f..24f76b4 100644
14655--- a/libs/x86emu/prim_ops.c
14656+++ b/libs/x86emu/prim_ops.c
14657@@ -102,18 +102,23 @@
14658 #define PRIM_OPS_NO_REDEFINE_ASM
14659 #include "x86emu/x86emui.h"
14660
14661+#if defined(__GNUC__)
14662+#if defined (__i386__) || defined(__i386) || defined(__AMD64__) || defined(__amd64__)
14663+#include "x86emu/prim_x86_gcc.h"
14664+#endif
14665+#endif
14666+
14667 /*------------------------- Global Variables ------------------------------*/
14668
14669-static u32 x86emu_parity_tab[8] =
14670-{
14671- 0x96696996,
14672- 0x69969669,
14673- 0x69969669,
14674- 0x96696996,
14675- 0x69969669,
14676- 0x96696996,
14677- 0x96696996,
14678- 0x69969669,
14679+static u32 x86emu_parity_tab[8] = {
14680+ 0x96696996,
14681+ 0x69969669,
14682+ 0x69969669,
14683+ 0x96696996,
14684+ 0x69969669,
14685+ 0x96696996,
14686+ 0x96696996,
14687+ 0x69969669,
14688 };
14689
14690 #define PARITY(x) (((x86emu_parity_tab[(x) / 32] >> ((x) % 32)) & 1) == 0)
14691@@ -125,88 +130,96 @@ static u32 x86emu_parity_tab[8] =
14692 REMARKS:
14693 Implements the AAA instruction and side effects.
14694 ****************************************************************************/
14695-u16 aaa_word(u16 d)
14696+u16
14697+aaa_word(u16 d)
14698 {
14699- u16 res;
14700- if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) {
14701- d += 0x6;
14702- d += 0x100;
14703- SET_FLAG(F_AF);
14704- SET_FLAG(F_CF);
14705- } else {
14706- CLEAR_FLAG(F_CF);
14707- CLEAR_FLAG(F_AF);
14708- }
14709- res = (u16)(d & 0xFF0F);
14710- CLEAR_FLAG(F_SF);
14711- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
14712- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
14713- return res;
14714+ u16 res;
14715+
14716+ if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) {
14717+ d += 0x6;
14718+ d += 0x100;
14719+ SET_FLAG(F_AF);
14720+ SET_FLAG(F_CF);
14721+ }
14722+ else {
14723+ CLEAR_FLAG(F_CF);
14724+ CLEAR_FLAG(F_AF);
14725+ }
14726+ res = (u16) (d & 0xFF0F);
14727+ CLEAR_FLAG(F_SF);
14728+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
14729+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
14730+ return res;
14731 }
14732
14733 /****************************************************************************
14734 REMARKS:
14735 Implements the AAA instruction and side effects.
14736 ****************************************************************************/
14737-u16 aas_word(u16 d)
14738+u16
14739+aas_word(u16 d)
14740 {
14741- u16 res;
14742- if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) {
14743- d -= 0x6;
14744- d -= 0x100;
14745- SET_FLAG(F_AF);
14746- SET_FLAG(F_CF);
14747- } else {
14748- CLEAR_FLAG(F_CF);
14749- CLEAR_FLAG(F_AF);
14750- }
14751- res = (u16)(d & 0xFF0F);
14752- CLEAR_FLAG(F_SF);
14753- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
14754- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
14755- return res;
14756+ u16 res;
14757+
14758+ if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) {
14759+ d -= 0x6;
14760+ d -= 0x100;
14761+ SET_FLAG(F_AF);
14762+ SET_FLAG(F_CF);
14763+ }
14764+ else {
14765+ CLEAR_FLAG(F_CF);
14766+ CLEAR_FLAG(F_AF);
14767+ }
14768+ res = (u16) (d & 0xFF0F);
14769+ CLEAR_FLAG(F_SF);
14770+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
14771+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
14772+ return res;
14773 }
14774
14775 /****************************************************************************
14776 REMARKS:
14777 Implements the AAD instruction and side effects.
14778 ****************************************************************************/
14779-u16 aad_word(u16 d)
14780+u16
14781+aad_word(u16 d)
14782 {
14783- u16 l;
14784- u8 hb, lb;
14785+ u16 l;
14786+ u8 hb, lb;
14787
14788- hb = (u8)((d >> 8) & 0xff);
14789- lb = (u8)((d & 0xff));
14790- l = (u16)((lb + 10 * hb) & 0xFF);
14791+ hb = (u8) ((d >> 8) & 0xff);
14792+ lb = (u8) ((d & 0xff));
14793+ l = (u16) ((lb + 10 * hb) & 0xFF);
14794
14795- CLEAR_FLAG(F_CF);
14796- CLEAR_FLAG(F_AF);
14797- CLEAR_FLAG(F_OF);
14798- CONDITIONAL_SET_FLAG(l & 0x80, F_SF);
14799- CONDITIONAL_SET_FLAG(l == 0, F_ZF);
14800- CONDITIONAL_SET_FLAG(PARITY(l & 0xff), F_PF);
14801- return l;
14802+ CLEAR_FLAG(F_CF);
14803+ CLEAR_FLAG(F_AF);
14804+ CLEAR_FLAG(F_OF);
14805+ CONDITIONAL_SET_FLAG(l & 0x80, F_SF);
14806+ CONDITIONAL_SET_FLAG(l == 0, F_ZF);
14807+ CONDITIONAL_SET_FLAG(PARITY(l & 0xff), F_PF);
14808+ return l;
14809 }
14810
14811 /****************************************************************************
14812 REMARKS:
14813 Implements the AAM instruction and side effects.
14814 ****************************************************************************/
14815-u16 aam_word(u8 d)
14816+u16
14817+aam_word(u8 d)
14818 {
14819 u16 h, l;
14820
14821- h = (u16)(d / 10);
14822- l = (u16)(d % 10);
14823- l |= (u16)(h << 8);
14824+ h = (u16) (d / 10);
14825+ l = (u16) (d % 10);
14826+ l |= (u16) (h << 8);
14827
14828- CLEAR_FLAG(F_CF);
14829- CLEAR_FLAG(F_AF);
14830- CLEAR_FLAG(F_OF);
14831- CONDITIONAL_SET_FLAG(l & 0x80, F_SF);
14832- CONDITIONAL_SET_FLAG(l == 0, F_ZF);
14833- CONDITIONAL_SET_FLAG(PARITY(l & 0xff), F_PF);
14834+ CLEAR_FLAG(F_CF);
14835+ CLEAR_FLAG(F_AF);
14836+ CLEAR_FLAG(F_OF);
14837+ CONDITIONAL_SET_FLAG(l & 0x80, F_SF);
14838+ CONDITIONAL_SET_FLAG(l == 0, F_ZF);
14839+ CONDITIONAL_SET_FLAG(PARITY(l & 0xff), F_PF);
14840 return l;
14841 }
14842
14843@@ -214,155 +227,161 @@ u16 aam_word(u8 d)
14844 REMARKS:
14845 Implements the ADC instruction and side effects.
14846 ****************************************************************************/
14847-u8 adc_byte(u8 d, u8 s)
14848+u8
14849+adc_byte(u8 d, u8 s)
14850 {
14851- register u32 res; /* all operands in native machine order */
14852- register u32 cc;
14853+ register u32 res; /* all operands in native machine order */
14854+ register u32 cc;
14855
14856- if (ACCESS_FLAG(F_CF))
14857- res = 1 + d + s;
14858- else
14859- res = d + s;
14860+ if (ACCESS_FLAG(F_CF))
14861+ res = 1 + d + s;
14862+ else
14863+ res = d + s;
14864
14865- CONDITIONAL_SET_FLAG(res & 0x100, F_CF);
14866- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
14867- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
14868- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
14869+ CONDITIONAL_SET_FLAG(res & 0x100, F_CF);
14870+ CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
14871+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
14872+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
14873
14874- /* calculate the carry chain SEE NOTE AT TOP. */
14875- cc = (s & d) | ((~res) & (s | d));
14876- CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF);
14877- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
14878- return (u8)res;
14879+ /* calculate the carry chain SEE NOTE AT TOP. */
14880+ cc = (s & d) | ((~res) & (s | d));
14881+ CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF);
14882+ CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
14883+ return (u8) res;
14884 }
14885
14886 /****************************************************************************
14887 REMARKS:
14888 Implements the ADC instruction and side effects.
14889 ****************************************************************************/
14890-u16 adc_word(u16 d, u16 s)
14891+u16
14892+adc_word(u16 d, u16 s)
14893 {
14894- register u32 res; /* all operands in native machine order */
14895- register u32 cc;
14896+ register u32 res; /* all operands in native machine order */
14897+ register u32 cc;
14898
14899- if (ACCESS_FLAG(F_CF))
14900- res = 1 + d + s;
14901- else
14902- res = d + s;
14903+ if (ACCESS_FLAG(F_CF))
14904+ res = 1 + d + s;
14905+ else
14906+ res = d + s;
14907
14908- CONDITIONAL_SET_FLAG(res & 0x10000, F_CF);
14909- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
14910- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
14911- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
14912+ CONDITIONAL_SET_FLAG(res & 0x10000, F_CF);
14913+ CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
14914+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
14915+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
14916
14917- /* calculate the carry chain SEE NOTE AT TOP. */
14918- cc = (s & d) | ((~res) & (s | d));
14919- CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF);
14920- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
14921- return (u16)res;
14922+ /* calculate the carry chain SEE NOTE AT TOP. */
14923+ cc = (s & d) | ((~res) & (s | d));
14924+ CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF);
14925+ CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
14926+ return (u16) res;
14927 }
14928
14929 /****************************************************************************
14930 REMARKS:
14931 Implements the ADC instruction and side effects.
14932 ****************************************************************************/
14933-u32 adc_long(u32 d, u32 s)
14934+u32
14935+adc_long(u32 d, u32 s)
14936 {
14937- register u32 lo; /* all operands in native machine order */
14938- register u32 hi;
14939- register u32 res;
14940- register u32 cc;
14941+ register u32 lo; /* all operands in native machine order */
14942+ register u32 hi;
14943+ register u32 res;
14944+ register u32 cc;
14945
14946- if (ACCESS_FLAG(F_CF)) {
14947- lo = 1 + (d & 0xFFFF) + (s & 0xFFFF);
14948- res = 1 + d + s;
14949- }
14950- else {
14951- lo = (d & 0xFFFF) + (s & 0xFFFF);
14952- res = d + s;
14953- }
14954- hi = (lo >> 16) + (d >> 16) + (s >> 16);
14955+ if (ACCESS_FLAG(F_CF)) {
14956+ lo = 1 + (d & 0xFFFF) + (s & 0xFFFF);
14957+ res = 1 + d + s;
14958+ }
14959+ else {
14960+ lo = (d & 0xFFFF) + (s & 0xFFFF);
14961+ res = d + s;
14962+ }
14963+ hi = (lo >> 16) + (d >> 16) + (s >> 16);
14964
14965- CONDITIONAL_SET_FLAG(hi & 0x10000, F_CF);
14966- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
14967- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
14968- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
14969+ CONDITIONAL_SET_FLAG(hi & 0x10000, F_CF);
14970+ CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
14971+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
14972+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
14973
14974- /* calculate the carry chain SEE NOTE AT TOP. */
14975- cc = (s & d) | ((~res) & (s | d));
14976- CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF);
14977- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
14978- return res;
14979+ /* calculate the carry chain SEE NOTE AT TOP. */
14980+ cc = (s & d) | ((~res) & (s | d));
14981+ CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF);
14982+ CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
14983+ return res;
14984 }
14985
14986 /****************************************************************************
14987 REMARKS:
14988 Implements the ADD instruction and side effects.
14989 ****************************************************************************/
14990-u8 add_byte(u8 d, u8 s)
14991+u8
14992+add_byte(u8 d, u8 s)
14993 {
14994- register u32 res; /* all operands in native machine order */
14995- register u32 cc;
14996+ register u32 res; /* all operands in native machine order */
14997+ register u32 cc;
14998
14999- res = d + s;
15000- CONDITIONAL_SET_FLAG(res & 0x100, F_CF);
15001- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
15002- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15003- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15004+ res = d + s;
15005+ CONDITIONAL_SET_FLAG(res & 0x100, F_CF);
15006+ CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
15007+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15008+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15009
15010- /* calculate the carry chain SEE NOTE AT TOP. */
15011- cc = (s & d) | ((~res) & (s | d));
15012- CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF);
15013- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
15014- return (u8)res;
15015+ /* calculate the carry chain SEE NOTE AT TOP. */
15016+ cc = (s & d) | ((~res) & (s | d));
15017+ CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF);
15018+ CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
15019+ return (u8) res;
15020 }
15021
15022 /****************************************************************************
15023 REMARKS:
15024 Implements the ADD instruction and side effects.
15025 ****************************************************************************/
15026-u16 add_word(u16 d, u16 s)
15027+u16
15028+add_word(u16 d, u16 s)
15029 {
15030- register u32 res; /* all operands in native machine order */
15031- register u32 cc;
15032+ register u32 res; /* all operands in native machine order */
15033+ register u32 cc;
15034
15035- res = d + s;
15036- CONDITIONAL_SET_FLAG(res & 0x10000, F_CF);
15037- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
15038- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
15039- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15040+ res = d + s;
15041+ CONDITIONAL_SET_FLAG(res & 0x10000, F_CF);
15042+ CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
15043+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
15044+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15045
15046- /* calculate the carry chain SEE NOTE AT TOP. */
15047- cc = (s & d) | ((~res) & (s | d));
15048- CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF);
15049- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
15050- return (u16)res;
15051+ /* calculate the carry chain SEE NOTE AT TOP. */
15052+ cc = (s & d) | ((~res) & (s | d));
15053+ CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF);
15054+ CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
15055+ return (u16) res;
15056 }
15057
15058 /****************************************************************************
15059 REMARKS:
15060 Implements the ADD instruction and side effects.
15061 ****************************************************************************/
15062-u32 add_long(u32 d, u32 s)
15063+u32
15064+add_long(u32 d, u32 s)
15065 {
15066- register u32 lo; /* all operands in native machine order */
15067- register u32 hi;
15068- register u32 res;
15069- register u32 cc;
15070+ register u32 lo; /* all operands in native machine order */
15071+ register u32 hi;
15072+ register u32 res;
15073+ register u32 cc;
15074
15075- lo = (d & 0xFFFF) + (s & 0xFFFF);
15076- res = d + s;
15077- hi = (lo >> 16) + (d >> 16) + (s >> 16);
15078+ lo = (d & 0xFFFF) + (s & 0xFFFF);
15079+ res = d + s;
15080+ hi = (lo >> 16) + (d >> 16) + (s >> 16);
15081
15082- CONDITIONAL_SET_FLAG(hi & 0x10000, F_CF);
15083- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
15084- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
15085- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15086+ CONDITIONAL_SET_FLAG(hi & 0x10000, F_CF);
15087+ CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
15088+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
15089+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15090
15091 /* calculate the carry chain SEE NOTE AT TOP. */
15092 cc = (s & d) | ((~res) & (s | d));
15093- CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF);
15094- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
15095+ CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF);
15096+ CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
15097
15098 return res;
15099 }
15100@@ -371,39 +390,41 @@ u32 add_long(u32 d, u32 s)
15101 REMARKS:
15102 Implements the AND instruction and side effects.
15103 ****************************************************************************/
15104-u8 and_byte(u8 d, u8 s)
15105+u8
15106+and_byte(u8 d, u8 s)
15107 {
15108- register u8 res; /* all operands in native machine order */
15109+ register u8 res; /* all operands in native machine order */
15110
15111- res = d & s;
15112+ res = d & s;
15113
15114- /* set the flags */
15115- CLEAR_FLAG(F_OF);
15116- CLEAR_FLAG(F_CF);
15117- CLEAR_FLAG(F_AF);
15118- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15119- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
15120- CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
15121- return res;
15122+ /* set the flags */
15123+ CLEAR_FLAG(F_OF);
15124+ CLEAR_FLAG(F_CF);
15125+ CLEAR_FLAG(F_AF);
15126+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15127+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
15128+ CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
15129+ return res;
15130 }
15131
15132 /****************************************************************************
15133 REMARKS:
15134 Implements the AND instruction and side effects.
15135 ****************************************************************************/
15136-u16 and_word(u16 d, u16 s)
15137+u16
15138+and_word(u16 d, u16 s)
15139 {
15140- register u16 res; /* all operands in native machine order */
15141+ register u16 res; /* all operands in native machine order */
15142
15143 res = d & s;
15144
15145 /* set the flags */
15146- CLEAR_FLAG(F_OF);
15147- CLEAR_FLAG(F_CF);
15148- CLEAR_FLAG(F_AF);
15149- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
15150- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
15151- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15152+ CLEAR_FLAG(F_OF);
15153+ CLEAR_FLAG(F_CF);
15154+ CLEAR_FLAG(F_AF);
15155+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
15156+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
15157+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15158 return res;
15159 }
15160
15161@@ -411,433 +432,456 @@ u16 and_word(u16 d, u16 s)
15162 REMARKS:
15163 Implements the AND instruction and side effects.
15164 ****************************************************************************/
15165-u32 and_long(u32 d, u32 s)
15166+u32
15167+and_long(u32 d, u32 s)
15168 {
15169- register u32 res; /* all operands in native machine order */
15170+ register u32 res; /* all operands in native machine order */
15171
15172- res = d & s;
15173+ res = d & s;
15174
15175- /* set the flags */
15176- CLEAR_FLAG(F_OF);
15177- CLEAR_FLAG(F_CF);
15178- CLEAR_FLAG(F_AF);
15179- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
15180- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
15181- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15182- return res;
15183+ /* set the flags */
15184+ CLEAR_FLAG(F_OF);
15185+ CLEAR_FLAG(F_CF);
15186+ CLEAR_FLAG(F_AF);
15187+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
15188+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
15189+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15190+ return res;
15191 }
15192
15193 /****************************************************************************
15194 REMARKS:
15195 Implements the CMP instruction and side effects.
15196 ****************************************************************************/
15197-u8 cmp_byte(u8 d, u8 s)
15198+u8
15199+cmp_byte(u8 d, u8 s)
15200 {
15201- register u32 res; /* all operands in native machine order */
15202- register u32 bc;
15203+ register u32 res; /* all operands in native machine order */
15204+ register u32 bc;
15205
15206- res = d - s;
15207- CLEAR_FLAG(F_CF);
15208- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15209- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
15210- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15211+ res = d - s;
15212+ CLEAR_FLAG(F_CF);
15213+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15214+ CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
15215+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15216
15217- /* calculate the borrow chain. See note at top */
15218- bc = (res & (~d | s)) | (~d & s);
15219- CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
15220- CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
15221- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15222- return d;
15223+ /* calculate the borrow chain. See note at top */
15224+ bc = (res & (~d | s)) | (~d & s);
15225+ CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
15226+ CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
15227+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15228+ return d;
15229 }
15230
15231 /****************************************************************************
15232 REMARKS:
15233 Implements the CMP instruction and side effects.
15234 ****************************************************************************/
15235-u16 cmp_word(u16 d, u16 s)
15236+u16
15237+cmp_word(u16 d, u16 s)
15238 {
15239- register u32 res; /* all operands in native machine order */
15240- register u32 bc;
15241+ register u32 res; /* all operands in native machine order */
15242+ register u32 bc;
15243
15244- res = d - s;
15245- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
15246- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
15247- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15248+ res = d - s;
15249+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
15250+ CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
15251+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15252
15253- /* calculate the borrow chain. See note at top */
15254+ /* calculate the borrow chain. See note at top */
15255 bc = (res & (~d | s)) | (~d & s);
15256- CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
15257- CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
15258- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15259- return d;
15260+ CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
15261+ CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
15262+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15263+ return d;
15264 }
15265
15266 /****************************************************************************
15267 REMARKS:
15268 Implements the CMP instruction and side effects.
15269 ****************************************************************************/
15270-u32 cmp_long(u32 d, u32 s)
15271+u32
15272+cmp_long(u32 d, u32 s)
15273 {
15274- register u32 res; /* all operands in native machine order */
15275- register u32 bc;
15276+ register u32 res; /* all operands in native machine order */
15277+ register u32 bc;
15278
15279- res = d - s;
15280- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
15281- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
15282- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15283+ res = d - s;
15284+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
15285+ CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
15286+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15287
15288- /* calculate the borrow chain. See note at top */
15289- bc = (res & (~d | s)) | (~d & s);
15290- CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
15291- CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
15292- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15293- return d;
15294+ /* calculate the borrow chain. See note at top */
15295+ bc = (res & (~d | s)) | (~d & s);
15296+ CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
15297+ CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
15298+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15299+ return d;
15300 }
15301
15302 /****************************************************************************
15303 REMARKS:
15304 Implements the DAA instruction and side effects.
15305 ****************************************************************************/
15306-u8 daa_byte(u8 d)
15307+u8
15308+daa_byte(u8 d)
15309 {
15310- u32 res = d;
15311- if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {
15312- res += 6;
15313- SET_FLAG(F_AF);
15314- }
15315- if (res > 0x9F || ACCESS_FLAG(F_CF)) {
15316- res += 0x60;
15317- SET_FLAG(F_CF);
15318- }
15319- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15320- CONDITIONAL_SET_FLAG((res & 0xFF) == 0, F_ZF);
15321- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15322- return (u8)res;
15323+ u32 res = d;
15324+
15325+ if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {
15326+ res += 6;
15327+ SET_FLAG(F_AF);
15328+ }
15329+ if (res > 0x9F || ACCESS_FLAG(F_CF)) {
15330+ res += 0x60;
15331+ SET_FLAG(F_CF);
15332+ }
15333+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15334+ CONDITIONAL_SET_FLAG((res & 0xFF) == 0, F_ZF);
15335+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15336+ return (u8) res;
15337 }
15338
15339 /****************************************************************************
15340 REMARKS:
15341 Implements the DAS instruction and side effects.
15342 ****************************************************************************/
15343-u8 das_byte(u8 d)
15344+u8
15345+das_byte(u8 d)
15346 {
15347- if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {
15348- d -= 6;
15349- SET_FLAG(F_AF);
15350- }
15351- if (d > 0x9F || ACCESS_FLAG(F_CF)) {
15352- d -= 0x60;
15353- SET_FLAG(F_CF);
15354- }
15355- CONDITIONAL_SET_FLAG(d & 0x80, F_SF);
15356- CONDITIONAL_SET_FLAG(d == 0, F_ZF);
15357- CONDITIONAL_SET_FLAG(PARITY(d & 0xff), F_PF);
15358- return d;
15359+ if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {
15360+ d -= 6;
15361+ SET_FLAG(F_AF);
15362+ }
15363+ if (d > 0x9F || ACCESS_FLAG(F_CF)) {
15364+ d -= 0x60;
15365+ SET_FLAG(F_CF);
15366+ }
15367+ CONDITIONAL_SET_FLAG(d & 0x80, F_SF);
15368+ CONDITIONAL_SET_FLAG(d == 0, F_ZF);
15369+ CONDITIONAL_SET_FLAG(PARITY(d & 0xff), F_PF);
15370+ return d;
15371 }
15372
15373 /****************************************************************************
15374 REMARKS:
15375 Implements the DEC instruction and side effects.
15376 ****************************************************************************/
15377-u8 dec_byte(u8 d)
15378+u8
15379+dec_byte(u8 d)
15380 {
15381- register u32 res; /* all operands in native machine order */
15382+ register u32 res; /* all operands in native machine order */
15383 register u32 bc;
15384
15385 res = d - 1;
15386- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15387- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
15388- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15389+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15390+ CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
15391+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15392
15393- /* calculate the borrow chain. See note at top */
15394- /* based on sub_byte, uses s==1. */
15395- bc = (res & (~d | 1)) | (~d & 1);
15396- /* carry flag unchanged */
15397- CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
15398- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15399- return (u8)res;
15400+ /* calculate the borrow chain. See note at top */
15401+ /* based on sub_byte, uses s==1. */
15402+ bc = (res & (~d | 1)) | (~d & 1);
15403+ /* carry flag unchanged */
15404+ CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
15405+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15406+ return (u8) res;
15407 }
15408
15409 /****************************************************************************
15410 REMARKS:
15411 Implements the DEC instruction and side effects.
15412 ****************************************************************************/
15413-u16 dec_word(u16 d)
15414+u16
15415+dec_word(u16 d)
15416 {
15417- register u32 res; /* all operands in native machine order */
15418+ register u32 res; /* all operands in native machine order */
15419 register u32 bc;
15420
15421 res = d - 1;
15422- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
15423- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
15424- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15425+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
15426+ CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
15427+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15428
15429 /* calculate the borrow chain. See note at top */
15430 /* based on the sub_byte routine, with s==1 */
15431 bc = (res & (~d | 1)) | (~d & 1);
15432 /* carry flag unchanged */
15433- CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
15434- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15435- return (u16)res;
15436+ CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
15437+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15438+ return (u16) res;
15439 }
15440
15441 /****************************************************************************
15442 REMARKS:
15443 Implements the DEC instruction and side effects.
15444 ****************************************************************************/
15445-u32 dec_long(u32 d)
15446+u32
15447+dec_long(u32 d)
15448 {
15449- register u32 res; /* all operands in native machine order */
15450+ register u32 res; /* all operands in native machine order */
15451 register u32 bc;
15452
15453 res = d - 1;
15454
15455- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
15456- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
15457- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15458+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
15459+ CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
15460+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15461
15462 /* calculate the borrow chain. See note at top */
15463- bc = (res & (~d | 1)) | (~d & 1);
15464- /* carry flag unchanged */
15465- CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
15466- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15467- return res;
15468+ bc = (res & (~d | 1)) | (~d & 1);
15469+ /* carry flag unchanged */
15470+ CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
15471+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15472+ return res;
15473 }
15474
15475 /****************************************************************************
15476 REMARKS:
15477 Implements the INC instruction and side effects.
15478 ****************************************************************************/
15479-u8 inc_byte(u8 d)
15480+u8
15481+inc_byte(u8 d)
15482 {
15483- register u32 res; /* all operands in native machine order */
15484- register u32 cc;
15485+ register u32 res; /* all operands in native machine order */
15486+ register u32 cc;
15487
15488- res = d + 1;
15489- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
15490- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15491- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15492+ res = d + 1;
15493+ CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
15494+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15495+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15496
15497- /* calculate the carry chain SEE NOTE AT TOP. */
15498- cc = ((1 & d) | (~res)) & (1 | d);
15499- CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF);
15500- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
15501- return (u8)res;
15502+ /* calculate the carry chain SEE NOTE AT TOP. */
15503+ cc = ((1 & d) | (~res)) & (1 | d);
15504+ CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF);
15505+ CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
15506+ return (u8) res;
15507 }
15508
15509 /****************************************************************************
15510 REMARKS:
15511 Implements the INC instruction and side effects.
15512 ****************************************************************************/
15513-u16 inc_word(u16 d)
15514+u16
15515+inc_word(u16 d)
15516 {
15517- register u32 res; /* all operands in native machine order */
15518- register u32 cc;
15519+ register u32 res; /* all operands in native machine order */
15520+ register u32 cc;
15521
15522- res = d + 1;
15523- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
15524- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
15525- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15526+ res = d + 1;
15527+ CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
15528+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
15529+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15530
15531- /* calculate the carry chain SEE NOTE AT TOP. */
15532- cc = (1 & d) | ((~res) & (1 | d));
15533- CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF);
15534- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
15535- return (u16)res;
15536+ /* calculate the carry chain SEE NOTE AT TOP. */
15537+ cc = (1 & d) | ((~res) & (1 | d));
15538+ CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF);
15539+ CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
15540+ return (u16) res;
15541 }
15542
15543 /****************************************************************************
15544 REMARKS:
15545 Implements the INC instruction and side effects.
15546 ****************************************************************************/
15547-u32 inc_long(u32 d)
15548+u32
15549+inc_long(u32 d)
15550 {
15551- register u32 res; /* all operands in native machine order */
15552- register u32 cc;
15553+ register u32 res; /* all operands in native machine order */
15554+ register u32 cc;
15555
15556- res = d + 1;
15557- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
15558- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
15559- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15560+ res = d + 1;
15561+ CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
15562+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
15563+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15564
15565- /* calculate the carry chain SEE NOTE AT TOP. */
15566- cc = (1 & d) | ((~res) & (1 | d));
15567- CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF);
15568- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
15569- return res;
15570+ /* calculate the carry chain SEE NOTE AT TOP. */
15571+ cc = (1 & d) | ((~res) & (1 | d));
15572+ CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF);
15573+ CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
15574+ return res;
15575 }
15576
15577 /****************************************************************************
15578 REMARKS:
15579 Implements the OR instruction and side effects.
15580 ****************************************************************************/
15581-u8 or_byte(u8 d, u8 s)
15582+u8
15583+or_byte(u8 d, u8 s)
15584 {
15585- register u8 res; /* all operands in native machine order */
15586+ register u8 res; /* all operands in native machine order */
15587
15588- res = d | s;
15589- CLEAR_FLAG(F_OF);
15590- CLEAR_FLAG(F_CF);
15591- CLEAR_FLAG(F_AF);
15592- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15593- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
15594- CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
15595- return res;
15596+ res = d | s;
15597+ CLEAR_FLAG(F_OF);
15598+ CLEAR_FLAG(F_CF);
15599+ CLEAR_FLAG(F_AF);
15600+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15601+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
15602+ CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
15603+ return res;
15604 }
15605
15606 /****************************************************************************
15607 REMARKS:
15608 Implements the OR instruction and side effects.
15609 ****************************************************************************/
15610-u16 or_word(u16 d, u16 s)
15611+u16
15612+or_word(u16 d, u16 s)
15613 {
15614- register u16 res; /* all operands in native machine order */
15615+ register u16 res; /* all operands in native machine order */
15616
15617- res = d | s;
15618- /* set the carry flag to be bit 8 */
15619- CLEAR_FLAG(F_OF);
15620- CLEAR_FLAG(F_CF);
15621- CLEAR_FLAG(F_AF);
15622- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
15623- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
15624- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15625- return res;
15626+ res = d | s;
15627+ /* set the carry flag to be bit 8 */
15628+ CLEAR_FLAG(F_OF);
15629+ CLEAR_FLAG(F_CF);
15630+ CLEAR_FLAG(F_AF);
15631+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
15632+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
15633+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15634+ return res;
15635 }
15636
15637 /****************************************************************************
15638 REMARKS:
15639 Implements the OR instruction and side effects.
15640 ****************************************************************************/
15641-u32 or_long(u32 d, u32 s)
15642+u32
15643+or_long(u32 d, u32 s)
15644 {
15645- register u32 res; /* all operands in native machine order */
15646+ register u32 res; /* all operands in native machine order */
15647
15648- res = d | s;
15649+ res = d | s;
15650
15651- /* set the carry flag to be bit 8 */
15652- CLEAR_FLAG(F_OF);
15653- CLEAR_FLAG(F_CF);
15654- CLEAR_FLAG(F_AF);
15655- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
15656- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
15657- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15658- return res;
15659+ /* set the carry flag to be bit 8 */
15660+ CLEAR_FLAG(F_OF);
15661+ CLEAR_FLAG(F_CF);
15662+ CLEAR_FLAG(F_AF);
15663+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
15664+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
15665+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15666+ return res;
15667 }
15668
15669 /****************************************************************************
15670 REMARKS:
15671 Implements the OR instruction and side effects.
15672 ****************************************************************************/
15673-u8 neg_byte(u8 s)
15674+u8
15675+neg_byte(u8 s)
15676 {
15677 register u8 res;
15678 register u8 bc;
15679
15680- CONDITIONAL_SET_FLAG(s != 0, F_CF);
15681- res = (u8)-s;
15682- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
15683- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15684- CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
15685- /* calculate the borrow chain --- modified such that d=0.
15686- substitutiing d=0 into bc= res&(~d|s)|(~d&s);
15687- (the one used for sub) and simplifying, since ~d=0xff...,
15688- ~d|s == 0xffff..., and res&0xfff... == res. Similarly
15689- ~d&s == s. So the simplified result is: */
15690- bc = res | s;
15691- CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
15692- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15693- return res;
15694+ CONDITIONAL_SET_FLAG(s != 0, F_CF);
15695+ res = (u8) - s;
15696+ CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
15697+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
15698+ CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
15699+ /* calculate the borrow chain --- modified such that d=0.
15700+ substitutiing d=0 into bc= res&(~d|s)|(~d&s);
15701+ (the one used for sub) and simplifying, since ~d=0xff...,
15702+ ~d|s == 0xffff..., and res&0xfff... == res. Similarly
15703+ ~d&s == s. So the simplified result is: */
15704+ bc = res | s;
15705+ CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
15706+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15707+ return res;
15708 }
15709
15710 /****************************************************************************
15711 REMARKS:
15712 Implements the OR instruction and side effects.
15713 ****************************************************************************/
15714-u16 neg_word(u16 s)
15715-{
15716- register u16 res;
15717- register u16 bc;
15718-
15719- CONDITIONAL_SET_FLAG(s != 0, F_CF);
15720- res = (u16)-s;
15721- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
15722- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
15723- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15724-
15725- /* calculate the borrow chain --- modified such that d=0.
15726- substitutiing d=0 into bc= res&(~d|s)|(~d&s);
15727- (the one used for sub) and simplifying, since ~d=0xff...,
15728- ~d|s == 0xffff..., and res&0xfff... == res. Similarly
15729- ~d&s == s. So the simplified result is: */
15730- bc = res | s;
15731- CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
15732- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15733- return res;
15734+u16
15735+neg_word(u16 s)
15736+{
15737+ register u16 res;
15738+ register u16 bc;
15739+
15740+ CONDITIONAL_SET_FLAG(s != 0, F_CF);
15741+ res = (u16) - s;
15742+ CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
15743+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
15744+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15745+
15746+ /* calculate the borrow chain --- modified such that d=0.
15747+ substitutiing d=0 into bc= res&(~d|s)|(~d&s);
15748+ (the one used for sub) and simplifying, since ~d=0xff...,
15749+ ~d|s == 0xffff..., and res&0xfff... == res. Similarly
15750+ ~d&s == s. So the simplified result is: */
15751+ bc = res | s;
15752+ CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
15753+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15754+ return res;
15755 }
15756
15757 /****************************************************************************
15758 REMARKS:
15759 Implements the OR instruction and side effects.
15760 ****************************************************************************/
15761-u32 neg_long(u32 s)
15762+u32
15763+neg_long(u32 s)
15764 {
15765- register u32 res;
15766- register u32 bc;
15767-
15768- CONDITIONAL_SET_FLAG(s != 0, F_CF);
15769- res = (u32)-s;
15770- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
15771- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
15772- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15773+ register u32 res;
15774+ register u32 bc;
15775
15776- /* calculate the borrow chain --- modified such that d=0.
15777- substitutiing d=0 into bc= res&(~d|s)|(~d&s);
15778- (the one used for sub) and simplifying, since ~d=0xff...,
15779- ~d|s == 0xffff..., and res&0xfff... == res. Similarly
15780- ~d&s == s. So the simplified result is: */
15781- bc = res | s;
15782- CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
15783- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15784- return res;
15785+ CONDITIONAL_SET_FLAG(s != 0, F_CF);
15786+ res = (u32) - s;
15787+ CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
15788+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
15789+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
15790+
15791+ /* calculate the borrow chain --- modified such that d=0.
15792+ substitutiing d=0 into bc= res&(~d|s)|(~d&s);
15793+ (the one used for sub) and simplifying, since ~d=0xff...,
15794+ ~d|s == 0xffff..., and res&0xfff... == res. Similarly
15795+ ~d&s == s. So the simplified result is: */
15796+ bc = res | s;
15797+ CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
15798+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
15799+ return res;
15800 }
15801
15802 /****************************************************************************
15803 REMARKS:
15804 Implements the NOT instruction and side effects.
15805 ****************************************************************************/
15806-u8 not_byte(u8 s)
15807+u8
15808+not_byte(u8 s)
15809 {
15810- return ~s;
15811+ return ~s;
15812 }
15813
15814 /****************************************************************************
15815 REMARKS:
15816 Implements the NOT instruction and side effects.
15817 ****************************************************************************/
15818-u16 not_word(u16 s)
15819+u16
15820+not_word(u16 s)
15821 {
15822- return ~s;
15823+ return ~s;
15824 }
15825
15826 /****************************************************************************
15827 REMARKS:
15828 Implements the NOT instruction and side effects.
15829 ****************************************************************************/
15830-u32 not_long(u32 s)
15831+u32
15832+not_long(u32 s)
15833 {
15834- return ~s;
15835+ return ~s;
15836 }
15837
15838 /****************************************************************************
15839 REMARKS:
15840 Implements the RCL instruction and side effects.
15841 ****************************************************************************/
15842-u8 rcl_byte(u8 d, u8 s)
15843+u8
15844+rcl_byte(u8 d, u8 s)
15845 {
15846 register unsigned int res, cnt, mask, cf;
15847
15848 /* s is the rotate distance. It varies from 0 - 8. */
15849- /* have
15850+ /* have
15851
15852 CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0
15853
15854@@ -861,9 +905,9 @@ u8 rcl_byte(u8 d, u8 s)
15855 2) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0
15856 3) B_(n-1) <- cf
15857 4) B_(n-2) .. B_0 <- b_7 .. b_(8-(n-1))
15858- */
15859- res = d;
15860- if ((cnt = s % 9) != 0) {
15861+ */
15862+ res = d;
15863+ if ((cnt = s % 9) != 0) {
15864 /* extract the new CARRY FLAG. */
15865 /* CF <- b_(8-n) */
15866 cf = (d >> (8 - cnt)) & 0x1;
15867@@ -872,7 +916,7 @@ u8 rcl_byte(u8 d, u8 s)
15868 into the range B_7 .. B_cnt */
15869 /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0 */
15870 /* note that the right hand side done by the mask */
15871- res = (d << cnt) & 0xff;
15872+ res = (d << cnt) & 0xff;
15873
15874 /* now the high stuff which rotated around
15875 into the positions B_cnt-2 .. B_0 */
15876@@ -884,81 +928,81 @@ u8 rcl_byte(u8 d, u8 s)
15877 res |= (d >> (9 - cnt)) & mask;
15878
15879 /* if the carry flag was set, or it in. */
15880- if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
15881+ if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
15882 /* B_(n-1) <- cf */
15883 res |= 1 << (cnt - 1);
15884 }
15885 /* set the new carry flag, based on the variable "cf" */
15886- CONDITIONAL_SET_FLAG(cf, F_CF);
15887+ CONDITIONAL_SET_FLAG(cf, F_CF);
15888 /* OVERFLOW is set *IFF* cnt==1, then it is the
15889 xor of CF and the most significant bit. Blecck. */
15890 /* parenthesized this expression since it appears to
15891 be causing OF to be misset */
15892- CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 6) & 0x2)),
15893- F_OF);
15894+ CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 6) & 0x2)), F_OF);
15895
15896 }
15897- return (u8)res;
15898+ return (u8) res;
15899 }
15900
15901 /****************************************************************************
15902 REMARKS:
15903 Implements the RCL instruction and side effects.
15904 ****************************************************************************/
15905-u16 rcl_word(u16 d, u8 s)
15906+u16
15907+rcl_word(u16 d, u8 s)
15908 {
15909- register unsigned int res, cnt, mask, cf;
15910+ register unsigned int res, cnt, mask, cf;
15911
15912- res = d;
15913- if ((cnt = s % 17) != 0) {
15914- cf = (d >> (16 - cnt)) & 0x1;
15915- res = (d << cnt) & 0xffff;
15916- mask = (1 << (cnt - 1)) - 1;
15917- res |= (d >> (17 - cnt)) & mask;
15918- if (ACCESS_FLAG(F_CF)) {
15919- res |= 1 << (cnt - 1);
15920- }
15921- CONDITIONAL_SET_FLAG(cf, F_CF);
15922- CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 14) & 0x2)),
15923- F_OF);
15924- }
15925- return (u16)res;
15926+ res = d;
15927+ if ((cnt = s % 17) != 0) {
15928+ cf = (d >> (16 - cnt)) & 0x1;
15929+ res = (d << cnt) & 0xffff;
15930+ mask = (1 << (cnt - 1)) - 1;
15931+ res |= (d >> (17 - cnt)) & mask;
15932+ if (ACCESS_FLAG(F_CF)) {
15933+ res |= 1 << (cnt - 1);
15934+ }
15935+ CONDITIONAL_SET_FLAG(cf, F_CF);
15936+ CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 14) & 0x2)), F_OF);
15937+ }
15938+ return (u16) res;
15939 }
15940
15941 /****************************************************************************
15942 REMARKS:
15943 Implements the RCL instruction and side effects.
15944 ****************************************************************************/
15945-u32 rcl_long(u32 d, u8 s)
15946+u32
15947+rcl_long(u32 d, u8 s)
15948 {
15949- register u32 res, cnt, mask, cf;
15950+ register u32 res, cnt, mask, cf;
15951
15952- res = d;
15953- if ((cnt = s % 33) != 0) {
15954- cf = (d >> (32 - cnt)) & 0x1;
15955- res = (d << cnt) & 0xffffffff;
15956- mask = (1 << (cnt - 1)) - 1;
15957- res |= (d >> (33 - cnt)) & mask;
15958- if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
15959- res |= 1 << (cnt - 1);
15960- }
15961- CONDITIONAL_SET_FLAG(cf, F_CF);
15962- CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 30) & 0x2)),
15963- F_OF);
15964- }
15965- return res;
15966+ res = d;
15967+ if ((cnt = s % 33) != 0) {
15968+ cf = (d >> (32 - cnt)) & 0x1;
15969+ res = (d << cnt) & 0xffffffff;
15970+ mask = (1 << (cnt - 1)) - 1;
15971+ res |= (d >> (33 - cnt)) & mask;
15972+ if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
15973+ res |= 1 << (cnt - 1);
15974+ }
15975+ CONDITIONAL_SET_FLAG(cf, F_CF);
15976+ CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 30) & 0x2)), F_OF);
15977+ }
15978+ return res;
15979 }
15980
15981 /****************************************************************************
15982 REMARKS:
15983 Implements the RCR instruction and side effects.
15984 ****************************************************************************/
15985-u8 rcr_byte(u8 d, u8 s)
15986+u8
15987+rcr_byte(u8 d, u8 s)
15988 {
15989- u32 res, cnt;
15990- u32 mask, cf, ocf = 0;
15991+ u32 res, cnt;
15992+ u32 mask, cf, ocf = 0;
15993
15994- /* rotate right through carry */
15995+ /* rotate right through carry */
15996 /*
15997 s is the rotate distance. It varies from 0 - 8.
15998 d is the byte object rotated.
15999@@ -979,9 +1023,9 @@ u8 rcr_byte(u8 d, u8 s)
16000 2) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n)
16001 3) B_(8-n) <- cf
16002 4) B_(7) .. B_(8-(n-1)) <- b_(n-2) .. b_(0)
16003- */
16004- res = d;
16005- if ((cnt = s % 9) != 0) {
16006+ */
16007+ res = d;
16008+ if ((cnt = s % 9) != 0) {
16009 /* extract the new CARRY FLAG. */
16010 /* CF <- b_(n-1) */
16011 if (cnt == 1) {
16012@@ -990,11 +1034,12 @@ u8 rcr_byte(u8 d, u8 s)
16013 0 if flag not set
16014 non-zero if flag is set.
16015 doing access_flag(..) != 0 casts that into either
16016- 0..1 in any representation of the flags register
16017+ 0..1 in any representation of the flags register
16018 (i.e. packed bit array or unpacked.)
16019 */
16020- ocf = ACCESS_FLAG(F_CF) != 0;
16021- } else
16022+ ocf = ACCESS_FLAG(F_CF) != 0;
16023+ }
16024+ else
16025 cf = (d >> (cnt - 1)) & 0x1;
16026
16027 /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_n */
16028@@ -1016,93 +1061,95 @@ u8 rcr_byte(u8 d, u8 s)
16029 res |= (d << (9 - cnt));
16030
16031 /* if the carry flag was set, or it in. */
16032- if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
16033+ if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
16034 /* B_(8-n) <- cf */
16035 res |= 1 << (8 - cnt);
16036 }
16037 /* set the new carry flag, based on the variable "cf" */
16038- CONDITIONAL_SET_FLAG(cf, F_CF);
16039+ CONDITIONAL_SET_FLAG(cf, F_CF);
16040 /* OVERFLOW is set *IFF* cnt==1, then it is the
16041 xor of CF and the most significant bit. Blecck. */
16042 /* parenthesized... */
16043- if (cnt == 1) {
16044- CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 6) & 0x2)),
16045- F_OF);
16046- }
16047- }
16048- return (u8)res;
16049+ if (cnt == 1) {
16050+ CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 6) & 0x2)), F_OF);
16051+ }
16052+ }
16053+ return (u8) res;
16054 }
16055
16056 /****************************************************************************
16057 REMARKS:
16058 Implements the RCR instruction and side effects.
16059 ****************************************************************************/
16060-u16 rcr_word(u16 d, u8 s)
16061+u16
16062+rcr_word(u16 d, u8 s)
16063 {
16064- u32 res, cnt;
16065- u32 mask, cf, ocf = 0;
16066+ u32 res, cnt;
16067+ u32 mask, cf, ocf = 0;
16068
16069- /* rotate right through carry */
16070- res = d;
16071- if ((cnt = s % 17) != 0) {
16072- if (cnt == 1) {
16073- cf = d & 0x1;
16074- ocf = ACCESS_FLAG(F_CF) != 0;
16075- } else
16076- cf = (d >> (cnt - 1)) & 0x1;
16077- mask = (1 << (16 - cnt)) - 1;
16078- res = (d >> cnt) & mask;
16079- res |= (d << (17 - cnt));
16080- if (ACCESS_FLAG(F_CF)) {
16081- res |= 1 << (16 - cnt);
16082- }
16083- CONDITIONAL_SET_FLAG(cf, F_CF);
16084- if (cnt == 1) {
16085- CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 14) & 0x2)),
16086- F_OF);
16087- }
16088- }
16089- return (u16)res;
16090+ /* rotate right through carry */
16091+ res = d;
16092+ if ((cnt = s % 17) != 0) {
16093+ if (cnt == 1) {
16094+ cf = d & 0x1;
16095+ ocf = ACCESS_FLAG(F_CF) != 0;
16096+ }
16097+ else
16098+ cf = (d >> (cnt - 1)) & 0x1;
16099+ mask = (1 << (16 - cnt)) - 1;
16100+ res = (d >> cnt) & mask;
16101+ res |= (d << (17 - cnt));
16102+ if (ACCESS_FLAG(F_CF)) {
16103+ res |= 1 << (16 - cnt);
16104+ }
16105+ CONDITIONAL_SET_FLAG(cf, F_CF);
16106+ if (cnt == 1) {
16107+ CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 14) & 0x2)), F_OF);
16108+ }
16109+ }
16110+ return (u16) res;
16111 }
16112
16113 /****************************************************************************
16114 REMARKS:
16115 Implements the RCR instruction and side effects.
16116 ****************************************************************************/
16117-u32 rcr_long(u32 d, u8 s)
16118-{
16119- u32 res, cnt;
16120- u32 mask, cf, ocf = 0;
16121-
16122- /* rotate right through carry */
16123- res = d;
16124- if ((cnt = s % 33) != 0) {
16125- if (cnt == 1) {
16126- cf = d & 0x1;
16127- ocf = ACCESS_FLAG(F_CF) != 0;
16128- } else
16129- cf = (d >> (cnt - 1)) & 0x1;
16130- mask = (1 << (32 - cnt)) - 1;
16131- res = (d >> cnt) & mask;
16132- if (cnt != 1)
16133- res |= (d << (33 - cnt));
16134- if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
16135- res |= 1 << (32 - cnt);
16136- }
16137- CONDITIONAL_SET_FLAG(cf, F_CF);
16138- if (cnt == 1) {
16139- CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 30) & 0x2)),
16140- F_OF);
16141- }
16142- }
16143- return res;
16144+u32
16145+rcr_long(u32 d, u8 s)
16146+{
16147+ u32 res, cnt;
16148+ u32 mask, cf, ocf = 0;
16149+
16150+ /* rotate right through carry */
16151+ res = d;
16152+ if ((cnt = s % 33) != 0) {
16153+ if (cnt == 1) {
16154+ cf = d & 0x1;
16155+ ocf = ACCESS_FLAG(F_CF) != 0;
16156+ }
16157+ else
16158+ cf = (d >> (cnt - 1)) & 0x1;
16159+ mask = (1 << (32 - cnt)) - 1;
16160+ res = (d >> cnt) & mask;
16161+ if (cnt != 1)
16162+ res |= (d << (33 - cnt));
16163+ if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
16164+ res |= 1 << (32 - cnt);
16165+ }
16166+ CONDITIONAL_SET_FLAG(cf, F_CF);
16167+ if (cnt == 1) {
16168+ CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 30) & 0x2)), F_OF);
16169+ }
16170+ }
16171+ return res;
16172 }
16173
16174 /****************************************************************************
16175 REMARKS:
16176 Implements the ROL instruction and side effects.
16177 ****************************************************************************/
16178-u8 rol_byte(u8 d, u8 s)
16179+u8
16180+rol_byte(u8 d, u8 s)
16181 {
16182 register unsigned int res, cnt, mask;
16183
16184@@ -1121,87 +1168,90 @@ u8 rol_byte(u8 d, u8 s)
16185 IF n > 0
16186 1) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0)
16187 2) B_(n-1) .. B_(0) <- b_(7) .. b_(8-n)
16188- */
16189+ */
16190 res = d;
16191- if ((cnt = s % 8) != 0) {
16192- /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0) */
16193- res = (d << cnt);
16194+ if ((cnt = s % 8) != 0) {
16195+ /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0) */
16196+ res = (d << cnt);
16197
16198- /* B_(n-1) .. B_(0) <- b_(7) .. b_(8-n) */
16199- mask = (1 << cnt) - 1;
16200- res |= (d >> (8 - cnt)) & mask;
16201+ /* B_(n-1) .. B_(0) <- b_(7) .. b_(8-n) */
16202+ mask = (1 << cnt) - 1;
16203+ res |= (d >> (8 - cnt)) & mask;
16204
16205- /* set the new carry flag, Note that it is the low order
16206- bit of the result!!! */
16207- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
16208- /* OVERFLOW is set *IFF* s==1, then it is the
16209- xor of CF and the most significant bit. Blecck. */
16210- CONDITIONAL_SET_FLAG(s == 1 &&
16211- XOR2((res & 0x1) + ((res >> 6) & 0x2)),
16212- F_OF);
16213- } if (s != 0) {
16214- /* set the new carry flag, Note that it is the low order
16215- bit of the result!!! */
16216- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
16217- }
16218- return (u8)res;
16219+ /* set the new carry flag, Note that it is the low order
16220+ bit of the result!!! */
16221+ CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
16222+ /* OVERFLOW is set *IFF* s==1, then it is the
16223+ xor of CF and the most significant bit. Blecck. */
16224+ CONDITIONAL_SET_FLAG(s == 1 &&
16225+ XOR2((res & 0x1) + ((res >> 6) & 0x2)), F_OF);
16226+ }
16227+ if (s != 0) {
16228+ /* set the new carry flag, Note that it is the low order
16229+ bit of the result!!! */
16230+ CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
16231+ }
16232+ return (u8) res;
16233 }
16234
16235 /****************************************************************************
16236 REMARKS:
16237 Implements the ROL instruction and side effects.
16238 ****************************************************************************/
16239-u16 rol_word(u16 d, u8 s)
16240+u16
16241+rol_word(u16 d, u8 s)
16242 {
16243 register unsigned int res, cnt, mask;
16244
16245- res = d;
16246- if ((cnt = s % 16) != 0) {
16247- res = (d << cnt);
16248- mask = (1 << cnt) - 1;
16249- res |= (d >> (16 - cnt)) & mask;
16250- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
16251- CONDITIONAL_SET_FLAG(s == 1 &&
16252- XOR2((res & 0x1) + ((res >> 14) & 0x2)),
16253- F_OF);
16254- } if (s != 0) {
16255- /* set the new carry flag, Note that it is the low order
16256- bit of the result!!! */
16257- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
16258- }
16259- return (u16)res;
16260+ res = d;
16261+ if ((cnt = s % 16) != 0) {
16262+ res = (d << cnt);
16263+ mask = (1 << cnt) - 1;
16264+ res |= (d >> (16 - cnt)) & mask;
16265+ CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
16266+ CONDITIONAL_SET_FLAG(s == 1 &&
16267+ XOR2((res & 0x1) + ((res >> 14) & 0x2)), F_OF);
16268+ }
16269+ if (s != 0) {
16270+ /* set the new carry flag, Note that it is the low order
16271+ bit of the result!!! */
16272+ CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
16273+ }
16274+ return (u16) res;
16275 }
16276
16277 /****************************************************************************
16278 REMARKS:
16279 Implements the ROL instruction and side effects.
16280 ****************************************************************************/
16281-u32 rol_long(u32 d, u8 s)
16282+u32
16283+rol_long(u32 d, u8 s)
16284 {
16285 register u32 res, cnt, mask;
16286
16287- res = d;
16288- if ((cnt = s % 32) != 0) {
16289- res = (d << cnt);
16290- mask = (1 << cnt) - 1;
16291- res |= (d >> (32 - cnt)) & mask;
16292- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
16293- CONDITIONAL_SET_FLAG(s == 1 &&
16294- XOR2((res & 0x1) + ((res >> 30) & 0x2)),
16295- F_OF);
16296- } if (s != 0) {
16297- /* set the new carry flag, Note that it is the low order
16298- bit of the result!!! */
16299- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
16300- }
16301- return res;
16302+ res = d;
16303+ if ((cnt = s % 32) != 0) {
16304+ res = (d << cnt);
16305+ mask = (1 << cnt) - 1;
16306+ res |= (d >> (32 - cnt)) & mask;
16307+ CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
16308+ CONDITIONAL_SET_FLAG(s == 1 &&
16309+ XOR2((res & 0x1) + ((res >> 30) & 0x2)), F_OF);
16310+ }
16311+ if (s != 0) {
16312+ /* set the new carry flag, Note that it is the low order
16313+ bit of the result!!! */
16314+ CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
16315+ }
16316+ return res;
16317 }
16318
16319 /****************************************************************************
16320 REMARKS:
16321 Implements the ROR instruction and side effects.
16322 ****************************************************************************/
16323-u8 ror_byte(u8 d, u8 s)
16324+u8
16325+ror_byte(u8 d, u8 s)
16326 {
16327 register unsigned int res, cnt, mask;
16328
16329@@ -1219,9 +1269,9 @@ u8 ror_byte(u8 d, u8 s)
16330 IF n > 0
16331 1) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n)
16332 2) B_(7) .. B_(8-n) <- b_(n-1) .. b_(0)
16333- */
16334- res = d;
16335- if ((cnt = s % 8) != 0) { /* not a typo, do nada if cnt==0 */
16336+ */
16337+ res = d;
16338+ if ((cnt = s % 8) != 0) { /* not a typo, do nada if cnt==0 */
16339 /* B_(7) .. B_(8-n) <- b_(n-1) .. b_(0) */
16340 res = (d << (8 - cnt));
16341
16342@@ -1231,291 +1281,317 @@ u8 ror_byte(u8 d, u8 s)
16343
16344 /* set the new carry flag, Note that it is the low order
16345 bit of the result!!! */
16346- CONDITIONAL_SET_FLAG(res & 0x80, F_CF);
16347- /* OVERFLOW is set *IFF* s==1, then it is the
16348+ CONDITIONAL_SET_FLAG(res & 0x80, F_CF);
16349+ /* OVERFLOW is set *IFF* s==1, then it is the
16350 xor of the two most significant bits. Blecck. */
16351- CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 6), F_OF);
16352- } else if (s != 0) {
16353- /* set the new carry flag, Note that it is the low order
16354- bit of the result!!! */
16355- CONDITIONAL_SET_FLAG(res & 0x80, F_CF);
16356- }
16357- return (u8)res;
16358+ CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 6), F_OF);
16359+ }
16360+ else if (s != 0) {
16361+ /* set the new carry flag, Note that it is the low order
16362+ bit of the result!!! */
16363+ CONDITIONAL_SET_FLAG(res & 0x80, F_CF);
16364+ }
16365+ return (u8) res;
16366 }
16367
16368 /****************************************************************************
16369 REMARKS:
16370 Implements the ROR instruction and side effects.
16371 ****************************************************************************/
16372-u16 ror_word(u16 d, u8 s)
16373+u16
16374+ror_word(u16 d, u8 s)
16375 {
16376 register unsigned int res, cnt, mask;
16377
16378- res = d;
16379- if ((cnt = s % 16) != 0) {
16380- res = (d << (16 - cnt));
16381- mask = (1 << (16 - cnt)) - 1;
16382- res |= (d >> (cnt)) & mask;
16383- CONDITIONAL_SET_FLAG(res & 0x8000, F_CF);
16384- CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 14), F_OF);
16385- } else if (s != 0) {
16386- /* set the new carry flag, Note that it is the low order
16387- bit of the result!!! */
16388- CONDITIONAL_SET_FLAG(res & 0x8000, F_CF);
16389- }
16390- return (u16)res;
16391+ res = d;
16392+ if ((cnt = s % 16) != 0) {
16393+ res = (d << (16 - cnt));
16394+ mask = (1 << (16 - cnt)) - 1;
16395+ res |= (d >> (cnt)) & mask;
16396+ CONDITIONAL_SET_FLAG(res & 0x8000, F_CF);
16397+ CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 14), F_OF);
16398+ }
16399+ else if (s != 0) {
16400+ /* set the new carry flag, Note that it is the low order
16401+ bit of the result!!! */
16402+ CONDITIONAL_SET_FLAG(res & 0x8000, F_CF);
16403+ }
16404+ return (u16) res;
16405 }
16406
16407 /****************************************************************************
16408 REMARKS:
16409 Implements the ROR instruction and side effects.
16410 ****************************************************************************/
16411-u32 ror_long(u32 d, u8 s)
16412+u32
16413+ror_long(u32 d, u8 s)
16414 {
16415- register u32 res, cnt, mask;
16416+ register u32 res, cnt, mask;
16417
16418- res = d;
16419- if ((cnt = s % 32) != 0) {
16420- res = (d << (32 - cnt));
16421- mask = (1 << (32 - cnt)) - 1;
16422- res |= (d >> (cnt)) & mask;
16423- CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF);
16424- CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 30), F_OF);
16425- } else if (s != 0) {
16426- /* set the new carry flag, Note that it is the low order
16427- bit of the result!!! */
16428- CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF);
16429- }
16430- return res;
16431+ res = d;
16432+ if ((cnt = s % 32) != 0) {
16433+ res = (d << (32 - cnt));
16434+ mask = (1 << (32 - cnt)) - 1;
16435+ res |= (d >> (cnt)) & mask;
16436+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF);
16437+ CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 30), F_OF);
16438+ }
16439+ else if (s != 0) {
16440+ /* set the new carry flag, Note that it is the low order
16441+ bit of the result!!! */
16442+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF);
16443+ }
16444+ return res;
16445 }
16446
16447 /****************************************************************************
16448 REMARKS:
16449 Implements the SHL instruction and side effects.
16450 ****************************************************************************/
16451-u8 shl_byte(u8 d, u8 s)
16452+u8
16453+shl_byte(u8 d, u8 s)
16454 {
16455- unsigned int cnt, res, cf;
16456-
16457- if (s < 8) {
16458- cnt = s % 8;
16459+ unsigned int cnt, res, cf;
16460
16461- /* last bit shifted out goes into carry flag */
16462- if (cnt > 0) {
16463- res = d << cnt;
16464- cf = d & (1 << (8 - cnt));
16465- CONDITIONAL_SET_FLAG(cf, F_CF);
16466- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
16467- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
16468- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16469- } else {
16470- res = (u8) d;
16471- }
16472+ if (s < 8) {
16473+ cnt = s % 8;
16474+
16475+ /* last bit shifted out goes into carry flag */
16476+ if (cnt > 0) {
16477+ res = d << cnt;
16478+ cf = d & (1 << (8 - cnt));
16479+ CONDITIONAL_SET_FLAG(cf, F_CF);
16480+ CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
16481+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
16482+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16483+ }
16484+ else {
16485+ res = (u8) d;
16486+ }
16487
16488- if (cnt == 1) {
16489- /* Needs simplification. */
16490- CONDITIONAL_SET_FLAG(
16491- (((res & 0x80) == 0x80) ^
16492- (ACCESS_FLAG(F_CF) != 0)),
16493- /* was (M.x86.R_FLG&F_CF)==F_CF)), */
16494- F_OF);
16495- } else {
16496- CLEAR_FLAG(F_OF);
16497- }
16498- } else {
16499- res = 0;
16500- CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80, F_CF);
16501- CLEAR_FLAG(F_OF);
16502- CLEAR_FLAG(F_SF);
16503- SET_FLAG(F_PF);
16504- SET_FLAG(F_ZF);
16505+ if (cnt == 1) {
16506+ /* Needs simplification. */
16507+ CONDITIONAL_SET_FLAG((((res & 0x80) == 0x80) ^
16508+ (ACCESS_FLAG(F_CF) != 0)),
16509+ /* was (M.x86.R_FLG&F_CF)==F_CF)), */
16510+ F_OF);
16511+ }
16512+ else {
16513+ CLEAR_FLAG(F_OF);
16514+ }
16515 }
16516- return (u8)res;
16517+ else {
16518+ res = 0;
16519+ CONDITIONAL_SET_FLAG((d << (s - 1)) & 0x80, F_CF);
16520+ CLEAR_FLAG(F_OF);
16521+ CLEAR_FLAG(F_SF);
16522+ SET_FLAG(F_PF);
16523+ SET_FLAG(F_ZF);
16524+ }
16525+ return (u8) res;
16526 }
16527
16528 /****************************************************************************
16529 REMARKS:
16530 Implements the SHL instruction and side effects.
16531 ****************************************************************************/
16532-u16 shl_word(u16 d, u8 s)
16533+u16
16534+shl_word(u16 d, u8 s)
16535 {
16536 unsigned int cnt, res, cf;
16537
16538- if (s < 16) {
16539- cnt = s % 16;
16540- if (cnt > 0) {
16541- res = d << cnt;
16542- cf = d & (1 << (16 - cnt));
16543- CONDITIONAL_SET_FLAG(cf, F_CF);
16544- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
16545- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
16546- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16547- } else {
16548- res = (u16) d;
16549- }
16550-
16551- if (cnt == 1) {
16552- CONDITIONAL_SET_FLAG(
16553- (((res & 0x8000) == 0x8000) ^
16554- (ACCESS_FLAG(F_CF) != 0)),
16555- F_OF);
16556- } else {
16557- CLEAR_FLAG(F_OF);
16558- }
16559- } else {
16560- res = 0;
16561- CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF);
16562- CLEAR_FLAG(F_OF);
16563- CLEAR_FLAG(F_SF);
16564- SET_FLAG(F_PF);
16565- SET_FLAG(F_ZF);
16566- }
16567- return (u16)res;
16568+ if (s < 16) {
16569+ cnt = s % 16;
16570+ if (cnt > 0) {
16571+ res = d << cnt;
16572+ cf = d & (1 << (16 - cnt));
16573+ CONDITIONAL_SET_FLAG(cf, F_CF);
16574+ CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
16575+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
16576+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16577+ }
16578+ else {
16579+ res = (u16) d;
16580+ }
16581+
16582+ if (cnt == 1) {
16583+ CONDITIONAL_SET_FLAG((((res & 0x8000) == 0x8000) ^
16584+ (ACCESS_FLAG(F_CF) != 0)), F_OF);
16585+ }
16586+ else {
16587+ CLEAR_FLAG(F_OF);
16588+ }
16589+ }
16590+ else {
16591+ res = 0;
16592+ CONDITIONAL_SET_FLAG((d << (s - 1)) & 0x8000, F_CF);
16593+ CLEAR_FLAG(F_OF);
16594+ CLEAR_FLAG(F_SF);
16595+ SET_FLAG(F_PF);
16596+ SET_FLAG(F_ZF);
16597+ }
16598+ return (u16) res;
16599 }
16600
16601 /****************************************************************************
16602 REMARKS:
16603 Implements the SHL instruction and side effects.
16604 ****************************************************************************/
16605-u32 shl_long(u32 d, u8 s)
16606-{
16607- unsigned int cnt, res, cf;
16608-
16609- if (s < 32) {
16610- cnt = s % 32;
16611- if (cnt > 0) {
16612- res = d << cnt;
16613- cf = d & (1 << (32 - cnt));
16614- CONDITIONAL_SET_FLAG(cf, F_CF);
16615- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
16616- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
16617- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16618- } else {
16619- res = d;
16620- }
16621- if (cnt == 1) {
16622- CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^
16623- (ACCESS_FLAG(F_CF) != 0)), F_OF);
16624- } else {
16625- CLEAR_FLAG(F_OF);
16626- }
16627- } else {
16628- res = 0;
16629- CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF);
16630- CLEAR_FLAG(F_OF);
16631- CLEAR_FLAG(F_SF);
16632- SET_FLAG(F_PF);
16633- SET_FLAG(F_ZF);
16634- }
16635- return res;
16636+u32
16637+shl_long(u32 d, u8 s)
16638+{
16639+ unsigned int cnt, res, cf;
16640+
16641+ if (s < 32) {
16642+ cnt = s % 32;
16643+ if (cnt > 0) {
16644+ res = d << cnt;
16645+ cf = d & (1 << (32 - cnt));
16646+ CONDITIONAL_SET_FLAG(cf, F_CF);
16647+ CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
16648+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
16649+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16650+ }
16651+ else {
16652+ res = d;
16653+ }
16654+ if (cnt == 1) {
16655+ CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^
16656+ (ACCESS_FLAG(F_CF) != 0)), F_OF);
16657+ }
16658+ else {
16659+ CLEAR_FLAG(F_OF);
16660+ }
16661+ }
16662+ else {
16663+ res = 0;
16664+ CONDITIONAL_SET_FLAG((d << (s - 1)) & 0x80000000, F_CF);
16665+ CLEAR_FLAG(F_OF);
16666+ CLEAR_FLAG(F_SF);
16667+ SET_FLAG(F_PF);
16668+ SET_FLAG(F_ZF);
16669+ }
16670+ return res;
16671 }
16672
16673 /****************************************************************************
16674 REMARKS:
16675 Implements the SHR instruction and side effects.
16676 ****************************************************************************/
16677-u8 shr_byte(u8 d, u8 s)
16678-{
16679- unsigned int cnt, res, cf;
16680-
16681- if (s < 8) {
16682- cnt = s % 8;
16683- if (cnt > 0) {
16684- cf = d & (1 << (cnt - 1));
16685- res = d >> cnt;
16686- CONDITIONAL_SET_FLAG(cf, F_CF);
16687- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
16688- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
16689- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16690- } else {
16691- res = (u8) d;
16692- }
16693-
16694- if (cnt == 1) {
16695- CONDITIONAL_SET_FLAG(XOR2(res >> 6), F_OF);
16696- } else {
16697- CLEAR_FLAG(F_OF);
16698- }
16699- } else {
16700- res = 0;
16701- CONDITIONAL_SET_FLAG((d >> (s-1)) & 0x1, F_CF);
16702- CLEAR_FLAG(F_OF);
16703- CLEAR_FLAG(F_SF);
16704- SET_FLAG(F_PF);
16705- SET_FLAG(F_ZF);
16706- }
16707- return (u8)res;
16708+u8
16709+shr_byte(u8 d, u8 s)
16710+{
16711+ unsigned int cnt, res, cf;
16712+
16713+ if (s < 8) {
16714+ cnt = s % 8;
16715+ if (cnt > 0) {
16716+ cf = d & (1 << (cnt - 1));
16717+ res = d >> cnt;
16718+ CONDITIONAL_SET_FLAG(cf, F_CF);
16719+ CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
16720+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
16721+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16722+ }
16723+ else {
16724+ res = (u8) d;
16725+ }
16726+
16727+ if (cnt == 1) {
16728+ CONDITIONAL_SET_FLAG(XOR2(res >> 6), F_OF);
16729+ }
16730+ else {
16731+ CLEAR_FLAG(F_OF);
16732+ }
16733+ }
16734+ else {
16735+ res = 0;
16736+ CONDITIONAL_SET_FLAG((d >> (s - 1)) & 0x1, F_CF);
16737+ CLEAR_FLAG(F_OF);
16738+ CLEAR_FLAG(F_SF);
16739+ SET_FLAG(F_PF);
16740+ SET_FLAG(F_ZF);
16741+ }
16742+ return (u8) res;
16743 }
16744
16745 /****************************************************************************
16746 REMARKS:
16747 Implements the SHR instruction and side effects.
16748 ****************************************************************************/
16749-u16 shr_word(u16 d, u8 s)
16750+u16
16751+shr_word(u16 d, u8 s)
16752 {
16753- unsigned int cnt, res, cf;
16754+ unsigned int cnt, res, cf;
16755
16756- if (s < 16) {
16757- cnt = s % 16;
16758- if (cnt > 0) {
16759- cf = d & (1 << (cnt - 1));
16760- res = d >> cnt;
16761- CONDITIONAL_SET_FLAG(cf, F_CF);
16762- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
16763- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
16764- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16765- } else {
16766- res = d;
16767- }
16768+ if (s < 16) {
16769+ cnt = s % 16;
16770+ if (cnt > 0) {
16771+ cf = d & (1 << (cnt - 1));
16772+ res = d >> cnt;
16773+ CONDITIONAL_SET_FLAG(cf, F_CF);
16774+ CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
16775+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
16776+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16777+ }
16778+ else {
16779+ res = d;
16780+ }
16781
16782- if (cnt == 1) {
16783- CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF);
16784- } else {
16785- CLEAR_FLAG(F_OF);
16786+ if (cnt == 1) {
16787+ CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF);
16788 }
16789- } else {
16790- res = 0;
16791- CLEAR_FLAG(F_CF);
16792- CLEAR_FLAG(F_OF);
16793- SET_FLAG(F_ZF);
16794- CLEAR_FLAG(F_SF);
16795- CLEAR_FLAG(F_PF);
16796+ else {
16797+ CLEAR_FLAG(F_OF);
16798+ }
16799+ }
16800+ else {
16801+ res = 0;
16802+ CLEAR_FLAG(F_CF);
16803+ CLEAR_FLAG(F_OF);
16804+ SET_FLAG(F_ZF);
16805+ CLEAR_FLAG(F_SF);
16806+ CLEAR_FLAG(F_PF);
16807 }
16808- return (u16)res;
16809+ return (u16) res;
16810 }
16811
16812 /****************************************************************************
16813 REMARKS:
16814 Implements the SHR instruction and side effects.
16815 ****************************************************************************/
16816-u32 shr_long(u32 d, u8 s)
16817+u32
16818+shr_long(u32 d, u8 s)
16819 {
16820- unsigned int cnt, res, cf;
16821+ unsigned int cnt, res, cf;
16822
16823- if (s < 32) {
16824- cnt = s % 32;
16825- if (cnt > 0) {
16826- cf = d & (1 << (cnt - 1));
16827- res = d >> cnt;
16828- CONDITIONAL_SET_FLAG(cf, F_CF);
16829- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
16830- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
16831- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16832- } else {
16833+ if (s < 32) {
16834+ cnt = s % 32;
16835+ if (cnt > 0) {
16836+ cf = d & (1 << (cnt - 1));
16837+ res = d >> cnt;
16838+ CONDITIONAL_SET_FLAG(cf, F_CF);
16839+ CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
16840+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
16841+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16842+ }
16843+ else {
16844 res = d;
16845 }
16846 if (cnt == 1) {
16847- CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF);
16848- } else {
16849- CLEAR_FLAG(F_OF);
16850+ CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF);
16851+ }
16852+ else {
16853+ CLEAR_FLAG(F_OF);
16854 }
16855- } else {
16856+ }
16857+ else {
16858 res = 0;
16859- CLEAR_FLAG(F_CF);
16860- CLEAR_FLAG(F_OF);
16861- SET_FLAG(F_ZF);
16862- CLEAR_FLAG(F_SF);
16863- CLEAR_FLAG(F_PF);
16864+ CLEAR_FLAG(F_CF);
16865+ CLEAR_FLAG(F_OF);
16866+ SET_FLAG(F_ZF);
16867+ CLEAR_FLAG(F_SF);
16868+ CLEAR_FLAG(F_PF);
16869 }
16870 return res;
16871 }
16872@@ -1524,592 +1600,634 @@ u32 shr_long(u32 d, u8 s)
16873 REMARKS:
16874 Implements the SAR instruction and side effects.
16875 ****************************************************************************/
16876-u8 sar_byte(u8 d, u8 s)
16877+u8
16878+sar_byte(u8 d, u8 s)
16879 {
16880- unsigned int cnt, res, cf, mask, sf;
16881+ unsigned int cnt, res, cf, mask, sf;
16882
16883- res = d;
16884- sf = d & 0x80;
16885+ res = d;
16886+ sf = d & 0x80;
16887 cnt = s % 8;
16888- if (cnt > 0 && cnt < 8) {
16889- mask = (1 << (8 - cnt)) - 1;
16890- cf = d & (1 << (cnt - 1));
16891- res = (d >> cnt) & mask;
16892- CONDITIONAL_SET_FLAG(cf, F_CF);
16893- if (sf) {
16894- res |= ~mask;
16895- }
16896- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
16897- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16898- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
16899- } else if (cnt >= 8) {
16900+ if (cnt > 0 && cnt < 8) {
16901+ mask = (1 << (8 - cnt)) - 1;
16902+ cf = d & (1 << (cnt - 1));
16903+ res = (d >> cnt) & mask;
16904+ CONDITIONAL_SET_FLAG(cf, F_CF);
16905+ if (sf) {
16906+ res |= ~mask;
16907+ }
16908+ CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
16909+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16910+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
16911+ }
16912+ else if (cnt >= 8) {
16913 if (sf) {
16914 res = 0xff;
16915- SET_FLAG(F_CF);
16916- CLEAR_FLAG(F_ZF);
16917- SET_FLAG(F_SF);
16918- SET_FLAG(F_PF);
16919- } else {
16920- res = 0;
16921- CLEAR_FLAG(F_CF);
16922- SET_FLAG(F_ZF);
16923- CLEAR_FLAG(F_SF);
16924- CLEAR_FLAG(F_PF);
16925- }
16926- }
16927- return (u8)res;
16928+ SET_FLAG(F_CF);
16929+ CLEAR_FLAG(F_ZF);
16930+ SET_FLAG(F_SF);
16931+ SET_FLAG(F_PF);
16932+ }
16933+ else {
16934+ res = 0;
16935+ CLEAR_FLAG(F_CF);
16936+ SET_FLAG(F_ZF);
16937+ CLEAR_FLAG(F_SF);
16938+ CLEAR_FLAG(F_PF);
16939+ }
16940+ }
16941+ return (u8) res;
16942 }
16943
16944 /****************************************************************************
16945 REMARKS:
16946 Implements the SAR instruction and side effects.
16947 ****************************************************************************/
16948-u16 sar_word(u16 d, u8 s)
16949+u16
16950+sar_word(u16 d, u8 s)
16951 {
16952 unsigned int cnt, res, cf, mask, sf;
16953
16954 sf = d & 0x8000;
16955 cnt = s % 16;
16956- res = d;
16957- if (cnt > 0 && cnt < 16) {
16958+ res = d;
16959+ if (cnt > 0 && cnt < 16) {
16960 mask = (1 << (16 - cnt)) - 1;
16961 cf = d & (1 << (cnt - 1));
16962 res = (d >> cnt) & mask;
16963- CONDITIONAL_SET_FLAG(cf, F_CF);
16964+ CONDITIONAL_SET_FLAG(cf, F_CF);
16965 if (sf) {
16966 res |= ~mask;
16967 }
16968- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
16969- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
16970- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16971- } else if (cnt >= 16) {
16972+ CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
16973+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
16974+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
16975+ }
16976+ else if (cnt >= 16) {
16977 if (sf) {
16978 res = 0xffff;
16979- SET_FLAG(F_CF);
16980- CLEAR_FLAG(F_ZF);
16981- SET_FLAG(F_SF);
16982- SET_FLAG(F_PF);
16983- } else {
16984+ SET_FLAG(F_CF);
16985+ CLEAR_FLAG(F_ZF);
16986+ SET_FLAG(F_SF);
16987+ SET_FLAG(F_PF);
16988+ }
16989+ else {
16990 res = 0;
16991- CLEAR_FLAG(F_CF);
16992- SET_FLAG(F_ZF);
16993- CLEAR_FLAG(F_SF);
16994- CLEAR_FLAG(F_PF);
16995+ CLEAR_FLAG(F_CF);
16996+ SET_FLAG(F_ZF);
16997+ CLEAR_FLAG(F_SF);
16998+ CLEAR_FLAG(F_PF);
16999 }
17000 }
17001- return (u16)res;
17002+ return (u16) res;
17003 }
17004
17005 /****************************************************************************
17006 REMARKS:
17007 Implements the SAR instruction and side effects.
17008 ****************************************************************************/
17009-u32 sar_long(u32 d, u8 s)
17010+u32
17011+sar_long(u32 d, u8 s)
17012 {
17013 u32 cnt, res, cf, mask, sf;
17014
17015 sf = d & 0x80000000;
17016 cnt = s % 32;
17017- res = d;
17018- if (cnt > 0 && cnt < 32) {
17019+ res = d;
17020+ if (cnt > 0 && cnt < 32) {
17021 mask = (1 << (32 - cnt)) - 1;
17022- cf = d & (1 << (cnt - 1));
17023+ cf = d & (1 << (cnt - 1));
17024 res = (d >> cnt) & mask;
17025- CONDITIONAL_SET_FLAG(cf, F_CF);
17026+ CONDITIONAL_SET_FLAG(cf, F_CF);
17027 if (sf) {
17028 res |= ~mask;
17029 }
17030- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
17031- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
17032- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17033- } else if (cnt >= 32) {
17034+ CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
17035+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
17036+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17037+ }
17038+ else if (cnt >= 32) {
17039 if (sf) {
17040 res = 0xffffffff;
17041- SET_FLAG(F_CF);
17042- CLEAR_FLAG(F_ZF);
17043- SET_FLAG(F_SF);
17044- SET_FLAG(F_PF);
17045- } else {
17046- res = 0;
17047- CLEAR_FLAG(F_CF);
17048- SET_FLAG(F_ZF);
17049- CLEAR_FLAG(F_SF);
17050- CLEAR_FLAG(F_PF);
17051- }
17052- }
17053- return res;
17054+ SET_FLAG(F_CF);
17055+ CLEAR_FLAG(F_ZF);
17056+ SET_FLAG(F_SF);
17057+ SET_FLAG(F_PF);
17058+ }
17059+ else {
17060+ res = 0;
17061+ CLEAR_FLAG(F_CF);
17062+ SET_FLAG(F_ZF);
17063+ CLEAR_FLAG(F_SF);
17064+ CLEAR_FLAG(F_PF);
17065+ }
17066+ }
17067+ return res;
17068 }
17069
17070 /****************************************************************************
17071 REMARKS:
17072 Implements the SHLD instruction and side effects.
17073 ****************************************************************************/
17074-u16 shld_word (u16 d, u16 fill, u8 s)
17075-{
17076- unsigned int cnt, res, cf;
17077-
17078- if (s < 16) {
17079- cnt = s % 16;
17080- if (cnt > 0) {
17081- res = (d << cnt) | (fill >> (16-cnt));
17082- cf = d & (1 << (16 - cnt));
17083- CONDITIONAL_SET_FLAG(cf, F_CF);
17084- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
17085- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
17086- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17087- } else {
17088- res = d;
17089- }
17090- if (cnt == 1) {
17091- CONDITIONAL_SET_FLAG((((res & 0x8000) == 0x8000) ^
17092- (ACCESS_FLAG(F_CF) != 0)), F_OF);
17093- } else {
17094- CLEAR_FLAG(F_OF);
17095- }
17096- } else {
17097- res = 0;
17098- CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF);
17099- CLEAR_FLAG(F_OF);
17100- CLEAR_FLAG(F_SF);
17101- SET_FLAG(F_PF);
17102- SET_FLAG(F_ZF);
17103- }
17104- return (u16)res;
17105+u16
17106+shld_word(u16 d, u16 fill, u8 s)
17107+{
17108+ unsigned int cnt, res, cf;
17109+
17110+ if (s < 16) {
17111+ cnt = s % 16;
17112+ if (cnt > 0) {
17113+ res = (d << cnt) | (fill >> (16 - cnt));
17114+ cf = d & (1 << (16 - cnt));
17115+ CONDITIONAL_SET_FLAG(cf, F_CF);
17116+ CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
17117+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
17118+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17119+ }
17120+ else {
17121+ res = d;
17122+ }
17123+ if (cnt == 1) {
17124+ CONDITIONAL_SET_FLAG((((res & 0x8000) == 0x8000) ^
17125+ (ACCESS_FLAG(F_CF) != 0)), F_OF);
17126+ }
17127+ else {
17128+ CLEAR_FLAG(F_OF);
17129+ }
17130+ }
17131+ else {
17132+ res = 0;
17133+ CONDITIONAL_SET_FLAG((d << (s - 1)) & 0x8000, F_CF);
17134+ CLEAR_FLAG(F_OF);
17135+ CLEAR_FLAG(F_SF);
17136+ SET_FLAG(F_PF);
17137+ SET_FLAG(F_ZF);
17138+ }
17139+ return (u16) res;
17140 }
17141
17142 /****************************************************************************
17143 REMARKS:
17144 Implements the SHLD instruction and side effects.
17145 ****************************************************************************/
17146-u32 shld_long (u32 d, u32 fill, u8 s)
17147-{
17148- unsigned int cnt, res, cf;
17149-
17150- if (s < 32) {
17151- cnt = s % 32;
17152- if (cnt > 0) {
17153- res = (d << cnt) | (fill >> (32-cnt));
17154- cf = d & (1 << (32 - cnt));
17155- CONDITIONAL_SET_FLAG(cf, F_CF);
17156- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
17157- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
17158- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17159- } else {
17160- res = d;
17161- }
17162- if (cnt == 1) {
17163- CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^
17164- (ACCESS_FLAG(F_CF) != 0)), F_OF);
17165- } else {
17166- CLEAR_FLAG(F_OF);
17167- }
17168- } else {
17169- res = 0;
17170- CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF);
17171- CLEAR_FLAG(F_OF);
17172- CLEAR_FLAG(F_SF);
17173- SET_FLAG(F_PF);
17174- SET_FLAG(F_ZF);
17175- }
17176- return res;
17177+u32
17178+shld_long(u32 d, u32 fill, u8 s)
17179+{
17180+ unsigned int cnt, res, cf;
17181+
17182+ if (s < 32) {
17183+ cnt = s % 32;
17184+ if (cnt > 0) {
17185+ res = (d << cnt) | (fill >> (32 - cnt));
17186+ cf = d & (1 << (32 - cnt));
17187+ CONDITIONAL_SET_FLAG(cf, F_CF);
17188+ CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
17189+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
17190+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17191+ }
17192+ else {
17193+ res = d;
17194+ }
17195+ if (cnt == 1) {
17196+ CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^
17197+ (ACCESS_FLAG(F_CF) != 0)), F_OF);
17198+ }
17199+ else {
17200+ CLEAR_FLAG(F_OF);
17201+ }
17202+ }
17203+ else {
17204+ res = 0;
17205+ CONDITIONAL_SET_FLAG((d << (s - 1)) & 0x80000000, F_CF);
17206+ CLEAR_FLAG(F_OF);
17207+ CLEAR_FLAG(F_SF);
17208+ SET_FLAG(F_PF);
17209+ SET_FLAG(F_ZF);
17210+ }
17211+ return res;
17212 }
17213
17214 /****************************************************************************
17215 REMARKS:
17216 Implements the SHRD instruction and side effects.
17217 ****************************************************************************/
17218-u16 shrd_word (u16 d, u16 fill, u8 s)
17219+u16
17220+shrd_word(u16 d, u16 fill, u8 s)
17221 {
17222- unsigned int cnt, res, cf;
17223+ unsigned int cnt, res, cf;
17224
17225- if (s < 16) {
17226- cnt = s % 16;
17227- if (cnt > 0) {
17228- cf = d & (1 << (cnt - 1));
17229- res = (d >> cnt) | (fill << (16 - cnt));
17230- CONDITIONAL_SET_FLAG(cf, F_CF);
17231- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
17232- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
17233- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17234- } else {
17235- res = d;
17236- }
17237+ if (s < 16) {
17238+ cnt = s % 16;
17239+ if (cnt > 0) {
17240+ cf = d & (1 << (cnt - 1));
17241+ res = (d >> cnt) | (fill << (16 - cnt));
17242+ CONDITIONAL_SET_FLAG(cf, F_CF);
17243+ CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
17244+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
17245+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17246+ }
17247+ else {
17248+ res = d;
17249+ }
17250
17251- if (cnt == 1) {
17252- CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF);
17253- } else {
17254- CLEAR_FLAG(F_OF);
17255+ if (cnt == 1) {
17256+ CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF);
17257+ }
17258+ else {
17259+ CLEAR_FLAG(F_OF);
17260 }
17261- } else {
17262- res = 0;
17263- CLEAR_FLAG(F_CF);
17264- CLEAR_FLAG(F_OF);
17265- SET_FLAG(F_ZF);
17266- CLEAR_FLAG(F_SF);
17267- CLEAR_FLAG(F_PF);
17268 }
17269- return (u16)res;
17270+ else {
17271+ res = 0;
17272+ CLEAR_FLAG(F_CF);
17273+ CLEAR_FLAG(F_OF);
17274+ SET_FLAG(F_ZF);
17275+ CLEAR_FLAG(F_SF);
17276+ CLEAR_FLAG(F_PF);
17277+ }
17278+ return (u16) res;
17279 }
17280
17281 /****************************************************************************
17282 REMARKS:
17283 Implements the SHRD instruction and side effects.
17284 ****************************************************************************/
17285-u32 shrd_long (u32 d, u32 fill, u8 s)
17286+u32
17287+shrd_long(u32 d, u32 fill, u8 s)
17288 {
17289- unsigned int cnt, res, cf;
17290+ unsigned int cnt, res, cf;
17291
17292- if (s < 32) {
17293- cnt = s % 32;
17294- if (cnt > 0) {
17295- cf = d & (1 << (cnt - 1));
17296- res = (d >> cnt) | (fill << (32 - cnt));
17297- CONDITIONAL_SET_FLAG(cf, F_CF);
17298- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
17299- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
17300- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17301- } else {
17302- res = d;
17303- }
17304- if (cnt == 1) {
17305- CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF);
17306- } else {
17307- CLEAR_FLAG(F_OF);
17308+ if (s < 32) {
17309+ cnt = s % 32;
17310+ if (cnt > 0) {
17311+ cf = d & (1 << (cnt - 1));
17312+ res = (d >> cnt) | (fill << (32 - cnt));
17313+ CONDITIONAL_SET_FLAG(cf, F_CF);
17314+ CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
17315+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
17316+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17317+ }
17318+ else {
17319+ res = d;
17320+ }
17321+ if (cnt == 1) {
17322+ CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF);
17323+ }
17324+ else {
17325+ CLEAR_FLAG(F_OF);
17326 }
17327- } else {
17328- res = 0;
17329- CLEAR_FLAG(F_CF);
17330- CLEAR_FLAG(F_OF);
17331- SET_FLAG(F_ZF);
17332- CLEAR_FLAG(F_SF);
17333- CLEAR_FLAG(F_PF);
17334 }
17335- return res;
17336+ else {
17337+ res = 0;
17338+ CLEAR_FLAG(F_CF);
17339+ CLEAR_FLAG(F_OF);
17340+ SET_FLAG(F_ZF);
17341+ CLEAR_FLAG(F_SF);
17342+ CLEAR_FLAG(F_PF);
17343+ }
17344+ return res;
17345 }
17346
17347 /****************************************************************************
17348 REMARKS:
17349 Implements the SBB instruction and side effects.
17350 ****************************************************************************/
17351-u8 sbb_byte(u8 d, u8 s)
17352+u8
17353+sbb_byte(u8 d, u8 s)
17354 {
17355- register u32 res; /* all operands in native machine order */
17356+ register u32 res; /* all operands in native machine order */
17357 register u32 bc;
17358
17359- if (ACCESS_FLAG(F_CF))
17360- res = d - s - 1;
17361- else
17362- res = d - s;
17363- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
17364- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
17365- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17366+ if (ACCESS_FLAG(F_CF))
17367+ res = d - s - 1;
17368+ else
17369+ res = d - s;
17370+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
17371+ CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
17372+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17373
17374- /* calculate the borrow chain. See note at top */
17375- bc = (res & (~d | s)) | (~d & s);
17376- CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
17377- CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
17378- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
17379- return (u8)res;
17380+ /* calculate the borrow chain. See note at top */
17381+ bc = (res & (~d | s)) | (~d & s);
17382+ CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
17383+ CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
17384+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
17385+ return (u8) res;
17386 }
17387
17388 /****************************************************************************
17389 REMARKS:
17390 Implements the SBB instruction and side effects.
17391 ****************************************************************************/
17392-u16 sbb_word(u16 d, u16 s)
17393+u16
17394+sbb_word(u16 d, u16 s)
17395 {
17396- register u32 res; /* all operands in native machine order */
17397+ register u32 res; /* all operands in native machine order */
17398 register u32 bc;
17399
17400- if (ACCESS_FLAG(F_CF))
17401+ if (ACCESS_FLAG(F_CF))
17402 res = d - s - 1;
17403 else
17404 res = d - s;
17405- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
17406- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
17407- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17408+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
17409+ CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
17410+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17411
17412- /* calculate the borrow chain. See note at top */
17413- bc = (res & (~d | s)) | (~d & s);
17414- CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
17415- CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
17416- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
17417- return (u16)res;
17418+ /* calculate the borrow chain. See note at top */
17419+ bc = (res & (~d | s)) | (~d & s);
17420+ CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
17421+ CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
17422+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
17423+ return (u16) res;
17424 }
17425
17426 /****************************************************************************
17427 REMARKS:
17428 Implements the SBB instruction and side effects.
17429 ****************************************************************************/
17430-u32 sbb_long(u32 d, u32 s)
17431+u32
17432+sbb_long(u32 d, u32 s)
17433 {
17434- register u32 res; /* all operands in native machine order */
17435- register u32 bc;
17436+ register u32 res; /* all operands in native machine order */
17437+ register u32 bc;
17438
17439- if (ACCESS_FLAG(F_CF))
17440+ if (ACCESS_FLAG(F_CF))
17441 res = d - s - 1;
17442 else
17443 res = d - s;
17444- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
17445- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
17446- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17447+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
17448+ CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
17449+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17450
17451- /* calculate the borrow chain. See note at top */
17452- bc = (res & (~d | s)) | (~d & s);
17453- CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
17454- CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
17455- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
17456- return res;
17457+ /* calculate the borrow chain. See note at top */
17458+ bc = (res & (~d | s)) | (~d & s);
17459+ CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
17460+ CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
17461+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
17462+ return res;
17463 }
17464
17465 /****************************************************************************
17466 REMARKS:
17467 Implements the SUB instruction and side effects.
17468 ****************************************************************************/
17469-u8 sub_byte(u8 d, u8 s)
17470+u8
17471+sub_byte(u8 d, u8 s)
17472 {
17473- register u32 res; /* all operands in native machine order */
17474- register u32 bc;
17475+ register u32 res; /* all operands in native machine order */
17476+ register u32 bc;
17477
17478- res = d - s;
17479- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
17480- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
17481- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17482+ res = d - s;
17483+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
17484+ CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
17485+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17486
17487- /* calculate the borrow chain. See note at top */
17488- bc = (res & (~d | s)) | (~d & s);
17489- CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
17490- CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
17491- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
17492- return (u8)res;
17493+ /* calculate the borrow chain. See note at top */
17494+ bc = (res & (~d | s)) | (~d & s);
17495+ CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
17496+ CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
17497+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
17498+ return (u8) res;
17499 }
17500
17501 /****************************************************************************
17502 REMARKS:
17503 Implements the SUB instruction and side effects.
17504 ****************************************************************************/
17505-u16 sub_word(u16 d, u16 s)
17506+u16
17507+sub_word(u16 d, u16 s)
17508 {
17509- register u32 res; /* all operands in native machine order */
17510+ register u32 res; /* all operands in native machine order */
17511 register u32 bc;
17512
17513 res = d - s;
17514- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
17515- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
17516- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17517+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
17518+ CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
17519+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17520
17521- /* calculate the borrow chain. See note at top */
17522- bc = (res & (~d | s)) | (~d & s);
17523- CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
17524- CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
17525- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
17526- return (u16)res;
17527+ /* calculate the borrow chain. See note at top */
17528+ bc = (res & (~d | s)) | (~d & s);
17529+ CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
17530+ CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
17531+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
17532+ return (u16) res;
17533 }
17534
17535 /****************************************************************************
17536 REMARKS:
17537 Implements the SUB instruction and side effects.
17538 ****************************************************************************/
17539-u32 sub_long(u32 d, u32 s)
17540+u32
17541+sub_long(u32 d, u32 s)
17542 {
17543- register u32 res; /* all operands in native machine order */
17544- register u32 bc;
17545+ register u32 res; /* all operands in native machine order */
17546+ register u32 bc;
17547
17548- res = d - s;
17549- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
17550- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
17551- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17552+ res = d - s;
17553+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
17554+ CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
17555+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17556
17557- /* calculate the borrow chain. See note at top */
17558- bc = (res & (~d | s)) | (~d & s);
17559- CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
17560- CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
17561- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
17562- return res;
17563+ /* calculate the borrow chain. See note at top */
17564+ bc = (res & (~d | s)) | (~d & s);
17565+ CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
17566+ CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
17567+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
17568+ return res;
17569 }
17570
17571 /****************************************************************************
17572 REMARKS:
17573 Implements the TEST instruction and side effects.
17574 ****************************************************************************/
17575-void test_byte(u8 d, u8 s)
17576+void
17577+test_byte(u8 d, u8 s)
17578 {
17579- register u32 res; /* all operands in native machine order */
17580+ register u32 res; /* all operands in native machine order */
17581
17582 res = d & s;
17583
17584- CLEAR_FLAG(F_OF);
17585- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
17586- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
17587- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17588+ CLEAR_FLAG(F_OF);
17589+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
17590+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
17591+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17592 /* AF == dont care */
17593- CLEAR_FLAG(F_CF);
17594+ CLEAR_FLAG(F_CF);
17595 }
17596
17597 /****************************************************************************
17598 REMARKS:
17599 Implements the TEST instruction and side effects.
17600 ****************************************************************************/
17601-void test_word(u16 d, u16 s)
17602+void
17603+test_word(u16 d, u16 s)
17604 {
17605- register u32 res; /* all operands in native machine order */
17606+ register u32 res; /* all operands in native machine order */
17607
17608- res = d & s;
17609+ res = d & s;
17610
17611- CLEAR_FLAG(F_OF);
17612- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
17613- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
17614- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17615- /* AF == dont care */
17616- CLEAR_FLAG(F_CF);
17617+ CLEAR_FLAG(F_OF);
17618+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
17619+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
17620+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17621+ /* AF == dont care */
17622+ CLEAR_FLAG(F_CF);
17623 }
17624
17625 /****************************************************************************
17626 REMARKS:
17627 Implements the TEST instruction and side effects.
17628 ****************************************************************************/
17629-void test_long(u32 d, u32 s)
17630+void
17631+test_long(u32 d, u32 s)
17632 {
17633- register u32 res; /* all operands in native machine order */
17634+ register u32 res; /* all operands in native machine order */
17635
17636- res = d & s;
17637+ res = d & s;
17638
17639- CLEAR_FLAG(F_OF);
17640- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
17641- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
17642- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17643- /* AF == dont care */
17644- CLEAR_FLAG(F_CF);
17645+ CLEAR_FLAG(F_OF);
17646+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
17647+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
17648+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17649+ /* AF == dont care */
17650+ CLEAR_FLAG(F_CF);
17651 }
17652
17653 /****************************************************************************
17654 REMARKS:
17655 Implements the XOR instruction and side effects.
17656 ****************************************************************************/
17657-u8 xor_byte(u8 d, u8 s)
17658+u8
17659+xor_byte(u8 d, u8 s)
17660 {
17661- register u8 res; /* all operands in native machine order */
17662+ register u8 res; /* all operands in native machine order */
17663
17664- res = d ^ s;
17665- CLEAR_FLAG(F_OF);
17666- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
17667- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
17668- CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
17669- CLEAR_FLAG(F_CF);
17670- CLEAR_FLAG(F_AF);
17671- return res;
17672+ res = d ^ s;
17673+ CLEAR_FLAG(F_OF);
17674+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
17675+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
17676+ CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
17677+ CLEAR_FLAG(F_CF);
17678+ CLEAR_FLAG(F_AF);
17679+ return res;
17680 }
17681
17682 /****************************************************************************
17683 REMARKS:
17684 Implements the XOR instruction and side effects.
17685 ****************************************************************************/
17686-u16 xor_word(u16 d, u16 s)
17687+u16
17688+xor_word(u16 d, u16 s)
17689 {
17690- register u16 res; /* all operands in native machine order */
17691+ register u16 res; /* all operands in native machine order */
17692
17693- res = d ^ s;
17694- CLEAR_FLAG(F_OF);
17695- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
17696- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
17697- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17698- CLEAR_FLAG(F_CF);
17699- CLEAR_FLAG(F_AF);
17700- return res;
17701+ res = d ^ s;
17702+ CLEAR_FLAG(F_OF);
17703+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
17704+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
17705+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17706+ CLEAR_FLAG(F_CF);
17707+ CLEAR_FLAG(F_AF);
17708+ return res;
17709 }
17710
17711 /****************************************************************************
17712 REMARKS:
17713 Implements the XOR instruction and side effects.
17714 ****************************************************************************/
17715-u32 xor_long(u32 d, u32 s)
17716+u32
17717+xor_long(u32 d, u32 s)
17718 {
17719- register u32 res; /* all operands in native machine order */
17720+ register u32 res; /* all operands in native machine order */
17721
17722- res = d ^ s;
17723- CLEAR_FLAG(F_OF);
17724- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
17725- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
17726- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17727- CLEAR_FLAG(F_CF);
17728- CLEAR_FLAG(F_AF);
17729- return res;
17730+ res = d ^ s;
17731+ CLEAR_FLAG(F_OF);
17732+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
17733+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
17734+ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
17735+ CLEAR_FLAG(F_CF);
17736+ CLEAR_FLAG(F_AF);
17737+ return res;
17738 }
17739
17740 /****************************************************************************
17741 REMARKS:
17742 Implements the IMUL instruction and side effects.
17743 ****************************************************************************/
17744-void imul_byte(u8 s)
17745+void
17746+imul_byte(u8 s)
17747 {
17748- s16 res = (s16)((s8)M.x86.R_AL * (s8)s);
17749+ s16 res = (s16) ((s8) M.x86.R_AL * (s8) s);
17750
17751- M.x86.R_AX = res;
17752- if (((M.x86.R_AL & 0x80) == 0 && M.x86.R_AH == 0x00) ||
17753- ((M.x86.R_AL & 0x80) != 0 && M.x86.R_AH == 0xFF)) {
17754- CLEAR_FLAG(F_CF);
17755- CLEAR_FLAG(F_OF);
17756- } else {
17757- SET_FLAG(F_CF);
17758- SET_FLAG(F_OF);
17759- }
17760+ M.x86.R_AX = res;
17761+ if (((M.x86.R_AL & 0x80) == 0 && M.x86.R_AH == 0x00) ||
17762+ ((M.x86.R_AL & 0x80) != 0 && M.x86.R_AH == 0xFF)) {
17763+ CLEAR_FLAG(F_CF);
17764+ CLEAR_FLAG(F_OF);
17765+ }
17766+ else {
17767+ SET_FLAG(F_CF);
17768+ SET_FLAG(F_OF);
17769+ }
17770 }
17771
17772 /****************************************************************************
17773 REMARKS:
17774 Implements the IMUL instruction and side effects.
17775 ****************************************************************************/
17776-void imul_word(u16 s)
17777+void
17778+imul_word(u16 s)
17779 {
17780- s32 res = (s16)M.x86.R_AX * (s16)s;
17781+ s32 res = (s16) M.x86.R_AX * (s16) s;
17782
17783- M.x86.R_AX = (u16)res;
17784- M.x86.R_DX = (u16)(res >> 16);
17785- if (((M.x86.R_AX & 0x8000) == 0 && M.x86.R_DX == 0x00) ||
17786- ((M.x86.R_AX & 0x8000) != 0 && M.x86.R_DX == 0xFF)) {
17787- CLEAR_FLAG(F_CF);
17788- CLEAR_FLAG(F_OF);
17789- } else {
17790- SET_FLAG(F_CF);
17791- SET_FLAG(F_OF);
17792- }
17793+ M.x86.R_AX = (u16) res;
17794+ M.x86.R_DX = (u16) (res >> 16);
17795+ if (((M.x86.R_AX & 0x8000) == 0 && M.x86.R_DX == 0x00) ||
17796+ ((M.x86.R_AX & 0x8000) != 0 && M.x86.R_DX == 0xFF)) {
17797+ CLEAR_FLAG(F_CF);
17798+ CLEAR_FLAG(F_OF);
17799+ }
17800+ else {
17801+ SET_FLAG(F_CF);
17802+ SET_FLAG(F_OF);
17803+ }
17804 }
17805
17806 /****************************************************************************
17807 REMARKS:
17808 Implements the IMUL instruction and side effects.
17809 ****************************************************************************/
17810-void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s)
17811+void
17812+imul_long_direct(u32 * res_lo, u32 * res_hi, u32 d, u32 s)
17813 {
17814 #ifdef __HAS_LONG_LONG__
17815- s64 res = (s32)d * (s32)s;
17816+ s64 res = (s64) (s32) d * (s32) s;
17817
17818- *res_lo = (u32)res;
17819- *res_hi = (u32)(res >> 32);
17820+ *res_lo = (u32) res;
17821+ *res_hi = (u32) (res >> 32);
17822 #else
17823- u32 d_lo,d_hi,d_sign;
17824- u32 s_lo,s_hi,s_sign;
17825- u32 rlo_lo,rlo_hi,rhi_lo;
17826-
17827- if ((d_sign = d & 0x80000000) != 0)
17828- d = -d;
17829- d_lo = d & 0xFFFF;
17830- d_hi = d >> 16;
17831- if ((s_sign = s & 0x80000000) != 0)
17832- s = -s;
17833- s_lo = s & 0xFFFF;
17834- s_hi = s >> 16;
17835- rlo_lo = d_lo * s_lo;
17836- rlo_hi = (d_hi * s_lo + d_lo * s_hi) + (rlo_lo >> 16);
17837- rhi_lo = d_hi * s_hi + (rlo_hi >> 16);
17838- *res_lo = (rlo_hi << 16) | (rlo_lo & 0xFFFF);
17839- *res_hi = rhi_lo;
17840- if (d_sign != s_sign) {
17841- d = ~*res_lo;
17842- s = (((d & 0xFFFF) + 1) >> 16) + (d >> 16);
17843- *res_lo = ~*res_lo+1;
17844- *res_hi = ~*res_hi+(s >> 16);
17845- }
17846+ u32 d_lo, d_hi, d_sign;
17847+ u32 s_lo, s_hi, s_sign;
17848+ u32 rlo_lo, rlo_hi, rhi_lo;
17849+
17850+ if ((d_sign = d & 0x80000000) != 0)
17851+ d = -d;
17852+ d_lo = d & 0xFFFF;
17853+ d_hi = d >> 16;
17854+ if ((s_sign = s & 0x80000000) != 0)
17855+ s = -s;
17856+ s_lo = s & 0xFFFF;
17857+ s_hi = s >> 16;
17858+ rlo_lo = d_lo * s_lo;
17859+ rlo_hi = (d_hi * s_lo + d_lo * s_hi) + (rlo_lo >> 16);
17860+ rhi_lo = d_hi * s_hi + (rlo_hi >> 16);
17861+ *res_lo = (rlo_hi << 16) | (rlo_lo & 0xFFFF);
17862+ *res_hi = rhi_lo;
17863+ if (d_sign != s_sign) {
17864+ d = ~*res_lo;
17865+ s = (((d & 0xFFFF) + 1) >> 16) + (d >> 16);
17866+ *res_lo = ~*res_lo + 1;
17867+ *res_hi = ~*res_hi + (s >> 16);
17868+ }
17869 #endif
17870 }
17871
17872@@ -2117,53 +2235,59 @@ void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s)
17873 REMARKS:
17874 Implements the IMUL instruction and side effects.
17875 ****************************************************************************/
17876-void imul_long(u32 s)
17877+void
17878+imul_long(u32 s)
17879 {
17880- imul_long_direct(&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s);
17881- if (((M.x86.R_EAX & 0x80000000) == 0 && M.x86.R_EDX == 0x00) ||
17882- ((M.x86.R_EAX & 0x80000000) != 0 && M.x86.R_EDX == 0xFF)) {
17883- CLEAR_FLAG(F_CF);
17884- CLEAR_FLAG(F_OF);
17885- } else {
17886- SET_FLAG(F_CF);
17887- SET_FLAG(F_OF);
17888- }
17889+ imul_long_direct(&M.x86.R_EAX, &M.x86.R_EDX, M.x86.R_EAX, s);
17890+ if (((M.x86.R_EAX & 0x80000000) == 0 && M.x86.R_EDX == 0x00) ||
17891+ ((M.x86.R_EAX & 0x80000000) != 0 && M.x86.R_EDX == 0xFF)) {
17892+ CLEAR_FLAG(F_CF);
17893+ CLEAR_FLAG(F_OF);
17894+ }
17895+ else {
17896+ SET_FLAG(F_CF);
17897+ SET_FLAG(F_OF);
17898+ }
17899 }
17900
17901 /****************************************************************************
17902 REMARKS:
17903 Implements the MUL instruction and side effects.
17904 ****************************************************************************/
17905-void mul_byte(u8 s)
17906+void
17907+mul_byte(u8 s)
17908 {
17909- u16 res = (u16)(M.x86.R_AL * s);
17910+ u16 res = (u16) (M.x86.R_AL * s);
17911
17912- M.x86.R_AX = res;
17913- if (M.x86.R_AH == 0) {
17914- CLEAR_FLAG(F_CF);
17915- CLEAR_FLAG(F_OF);
17916- } else {
17917- SET_FLAG(F_CF);
17918- SET_FLAG(F_OF);
17919- }
17920+ M.x86.R_AX = res;
17921+ if (M.x86.R_AH == 0) {
17922+ CLEAR_FLAG(F_CF);
17923+ CLEAR_FLAG(F_OF);
17924+ }
17925+ else {
17926+ SET_FLAG(F_CF);
17927+ SET_FLAG(F_OF);
17928+ }
17929 }
17930
17931 /****************************************************************************
17932 REMARKS:
17933 Implements the MUL instruction and side effects.
17934 ****************************************************************************/
17935-void mul_word(u16 s)
17936+void
17937+mul_word(u16 s)
17938 {
17939- u32 res = M.x86.R_AX * s;
17940+ u32 res = M.x86.R_AX * s;
17941
17942- M.x86.R_AX = (u16)res;
17943- M.x86.R_DX = (u16)(res >> 16);
17944- if (M.x86.R_DX == 0) {
17945- CLEAR_FLAG(F_CF);
17946- CLEAR_FLAG(F_OF);
17947- } else {
17948- SET_FLAG(F_CF);
17949- SET_FLAG(F_OF);
17950+ M.x86.R_AX = (u16) res;
17951+ M.x86.R_DX = (u16) (res >> 16);
17952+ if (M.x86.R_DX == 0) {
17953+ CLEAR_FLAG(F_CF);
17954+ CLEAR_FLAG(F_OF);
17955+ }
17956+ else {
17957+ SET_FLAG(F_CF);
17958+ SET_FLAG(F_OF);
17959 }
17960 }
17961
17962@@ -2171,36 +2295,38 @@ void mul_word(u16 s)
17963 REMARKS:
17964 Implements the MUL instruction and side effects.
17965 ****************************************************************************/
17966-void mul_long(u32 s)
17967+void
17968+mul_long(u32 s)
17969 {
17970 #ifdef __HAS_LONG_LONG__
17971- u64 res = (u32)M.x86.R_EAX * (u32)s;
17972+ u64 res = (u64) M.x86.R_EAX * s;
17973
17974- M.x86.R_EAX = (u32)res;
17975- M.x86.R_EDX = (u32)(res >> 32);
17976+ M.x86.R_EAX = (u32) res;
17977+ M.x86.R_EDX = (u32) (res >> 32);
17978 #else
17979- u32 a,a_lo,a_hi;
17980- u32 s_lo,s_hi;
17981- u32 rlo_lo,rlo_hi,rhi_lo;
17982-
17983- a = M.x86.R_EAX;
17984- a_lo = a & 0xFFFF;
17985- a_hi = a >> 16;
17986- s_lo = s & 0xFFFF;
17987- s_hi = s >> 16;
17988- rlo_lo = a_lo * s_lo;
17989- rlo_hi = (a_hi * s_lo + a_lo * s_hi) + (rlo_lo >> 16);
17990- rhi_lo = a_hi * s_hi + (rlo_hi >> 16);
17991- M.x86.R_EAX = (rlo_hi << 16) | (rlo_lo & 0xFFFF);
17992- M.x86.R_EDX = rhi_lo;
17993+ u32 a, a_lo, a_hi;
17994+ u32 s_lo, s_hi;
17995+ u32 rlo_lo, rlo_hi, rhi_lo;
17996+
17997+ a = M.x86.R_EAX;
17998+ a_lo = a & 0xFFFF;
17999+ a_hi = a >> 16;
18000+ s_lo = s & 0xFFFF;
18001+ s_hi = s >> 16;
18002+ rlo_lo = a_lo * s_lo;
18003+ rlo_hi = (a_hi * s_lo + a_lo * s_hi) + (rlo_lo >> 16);
18004+ rhi_lo = a_hi * s_hi + (rlo_hi >> 16);
18005+ M.x86.R_EAX = (rlo_hi << 16) | (rlo_lo & 0xFFFF);
18006+ M.x86.R_EDX = rhi_lo;
18007 #endif
18008
18009- if (M.x86.R_EDX == 0) {
18010- CLEAR_FLAG(F_CF);
18011- CLEAR_FLAG(F_OF);
18012- } else {
18013- SET_FLAG(F_CF);
18014- SET_FLAG(F_OF);
18015+ if (M.x86.R_EDX == 0) {
18016+ CLEAR_FLAG(F_CF);
18017+ CLEAR_FLAG(F_OF);
18018+ }
18019+ else {
18020+ SET_FLAG(F_CF);
18021+ SET_FLAG(F_OF);
18022 }
18023 }
18024
18025@@ -2208,309 +2334,319 @@ void mul_long(u32 s)
18026 REMARKS:
18027 Implements the IDIV instruction and side effects.
18028 ****************************************************************************/
18029-void idiv_byte(u8 s)
18030+void
18031+idiv_byte(u8 s)
18032 {
18033 s32 dvd, div, mod;
18034
18035- dvd = (s16)M.x86.R_AX;
18036- if (s == 0) {
18037- x86emu_intr_raise(0);
18038+ dvd = (s16) M.x86.R_AX;
18039+ if (s == 0) {
18040+ x86emu_intr_raise(0);
18041+ return;
18042+ }
18043+ div = dvd / (s8) s;
18044+ mod = dvd % (s8) s;
18045+ if (abs(div) > 0x7f) {
18046+ x86emu_intr_raise(0);
18047 return;
18048- }
18049- div = dvd / (s8)s;
18050- mod = dvd % (s8)s;
18051- if (abs(div) > 0x7f) {
18052- x86emu_intr_raise(0);
18053- return;
18054- }
18055- M.x86.R_AL = (s8) div;
18056- M.x86.R_AH = (s8) mod;
18057+ }
18058+ M.x86.R_AL = (s8) div;
18059+ M.x86.R_AH = (s8) mod;
18060 }
18061
18062 /****************************************************************************
18063 REMARKS:
18064 Implements the IDIV instruction and side effects.
18065 ****************************************************************************/
18066-void idiv_word(u16 s)
18067+void
18068+idiv_word(u16 s)
18069 {
18070- s32 dvd, div, mod;
18071+ s32 dvd, div, mod;
18072
18073- dvd = (((s32)M.x86.R_DX) << 16) | M.x86.R_AX;
18074- if (s == 0) {
18075- x86emu_intr_raise(0);
18076- return;
18077- }
18078- div = dvd / (s16)s;
18079- mod = dvd % (s16)s;
18080- if (abs(div) > 0x7fff) {
18081- x86emu_intr_raise(0);
18082- return;
18083- }
18084- CLEAR_FLAG(F_CF);
18085- CLEAR_FLAG(F_SF);
18086- CONDITIONAL_SET_FLAG(div == 0, F_ZF);
18087- CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
18088+ dvd = (((s32) M.x86.R_DX) << 16) | M.x86.R_AX;
18089+ if (s == 0) {
18090+ x86emu_intr_raise(0);
18091+ return;
18092+ }
18093+ div = dvd / (s16) s;
18094+ mod = dvd % (s16) s;
18095+ if (abs(div) > 0x7fff) {
18096+ x86emu_intr_raise(0);
18097+ return;
18098+ }
18099+ CLEAR_FLAG(F_CF);
18100+ CLEAR_FLAG(F_SF);
18101+ CONDITIONAL_SET_FLAG(div == 0, F_ZF);
18102+ CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
18103
18104- M.x86.R_AX = (u16)div;
18105- M.x86.R_DX = (u16)mod;
18106+ M.x86.R_AX = (u16) div;
18107+ M.x86.R_DX = (u16) mod;
18108 }
18109
18110 /****************************************************************************
18111 REMARKS:
18112 Implements the IDIV instruction and side effects.
18113 ****************************************************************************/
18114-void idiv_long(u32 s)
18115+void
18116+idiv_long(u32 s)
18117 {
18118 #ifdef __HAS_LONG_LONG__
18119- s64 dvd, div, mod;
18120-
18121- dvd = (((s64)M.x86.R_EDX) << 32) | M.x86.R_EAX;
18122- if (s == 0) {
18123- x86emu_intr_raise(0);
18124- return;
18125- }
18126- div = dvd / (s32)s;
18127- mod = dvd % (s32)s;
18128- if (abs(div) > 0x7fffffff) {
18129- x86emu_intr_raise(0);
18130- return;
18131- }
18132+ s64 dvd, div, mod;
18133+
18134+ dvd = (((s64) M.x86.R_EDX) << 32) | M.x86.R_EAX;
18135+ if (s == 0) {
18136+ x86emu_intr_raise(0);
18137+ return;
18138+ }
18139+ div = dvd / (s32) s;
18140+ mod = dvd % (s32) s;
18141+ if (abs(div) > 0x7fffffff) {
18142+ x86emu_intr_raise(0);
18143+ return;
18144+ }
18145 #else
18146- s32 div = 0, mod;
18147- s32 h_dvd = M.x86.R_EDX;
18148- u32 l_dvd = M.x86.R_EAX;
18149- u32 abs_s = s & 0x7FFFFFFF;
18150- u32 abs_h_dvd = h_dvd & 0x7FFFFFFF;
18151- u32 h_s = abs_s >> 1;
18152- u32 l_s = abs_s << 31;
18153- int counter = 31;
18154- int carry;
18155-
18156- if (s == 0) {
18157- x86emu_intr_raise(0);
18158- return;
18159- }
18160- do {
18161- div <<= 1;
18162- carry = (l_dvd >= l_s) ? 0 : 1;
18163-
18164- if (abs_h_dvd < (h_s + carry)) {
18165- h_s >>= 1;
18166- l_s = abs_s << (--counter);
18167- continue;
18168- } else {
18169- abs_h_dvd -= (h_s + carry);
18170- l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1)
18171- : (l_dvd - l_s);
18172- h_s >>= 1;
18173- l_s = abs_s << (--counter);
18174- div |= 1;
18175- continue;
18176- }
18177-
18178- } while (counter > -1);
18179- /* overflow */
18180- if (abs_h_dvd || (l_dvd > abs_s)) {
18181- x86emu_intr_raise(0);
18182- return;
18183- }
18184- /* sign */
18185- div |= ((h_dvd & 0x10000000) ^ (s & 0x10000000));
18186- mod = l_dvd;
18187+ s32 div = 0, mod;
18188+ s32 h_dvd = M.x86.R_EDX;
18189+ u32 l_dvd = M.x86.R_EAX;
18190+ u32 abs_s = s & 0x7FFFFFFF;
18191+ u32 abs_h_dvd = h_dvd & 0x7FFFFFFF;
18192+ u32 h_s = abs_s >> 1;
18193+ u32 l_s = abs_s << 31;
18194+ int counter = 31;
18195+ int carry;
18196+
18197+ if (s == 0) {
18198+ x86emu_intr_raise(0);
18199+ return;
18200+ }
18201+ do {
18202+ div <<= 1;
18203+ carry = (l_dvd >= l_s) ? 0 : 1;
18204+
18205+ if (abs_h_dvd < (h_s + carry)) {
18206+ h_s >>= 1;
18207+ l_s = abs_s << (--counter);
18208+ continue;
18209+ }
18210+ else {
18211+ abs_h_dvd -= (h_s + carry);
18212+ l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1)
18213+ : (l_dvd - l_s);
18214+ h_s >>= 1;
18215+ l_s = abs_s << (--counter);
18216+ div |= 1;
18217+ continue;
18218+ }
18219+
18220+ } while (counter > -1);
18221+ /* overflow */
18222+ if (abs_h_dvd || (l_dvd > abs_s)) {
18223+ x86emu_intr_raise(0);
18224+ return;
18225+ }
18226+ /* sign */
18227+ div |= ((h_dvd & 0x10000000) ^ (s & 0x10000000));
18228+ mod = l_dvd;
18229
18230 #endif
18231- CLEAR_FLAG(F_CF);
18232- CLEAR_FLAG(F_AF);
18233- CLEAR_FLAG(F_SF);
18234- SET_FLAG(F_ZF);
18235- CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
18236+ CLEAR_FLAG(F_CF);
18237+ CLEAR_FLAG(F_AF);
18238+ CLEAR_FLAG(F_SF);
18239+ SET_FLAG(F_ZF);
18240+ CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
18241
18242- M.x86.R_EAX = (u32)div;
18243- M.x86.R_EDX = (u32)mod;
18244+ M.x86.R_EAX = (u32) div;
18245+ M.x86.R_EDX = (u32) mod;
18246 }
18247
18248 /****************************************************************************
18249 REMARKS:
18250 Implements the DIV instruction and side effects.
18251 ****************************************************************************/
18252-void div_byte(u8 s)
18253+void
18254+div_byte(u8 s)
18255 {
18256- u32 dvd, div, mod;
18257+ u32 dvd, div, mod;
18258
18259- dvd = M.x86.R_AX;
18260+ dvd = M.x86.R_AX;
18261 if (s == 0) {
18262- x86emu_intr_raise(0);
18263+ x86emu_intr_raise(0);
18264 return;
18265 }
18266- div = dvd / (u8)s;
18267- mod = dvd % (u8)s;
18268- if (abs(div) > 0xff) {
18269- x86emu_intr_raise(0);
18270+ div = dvd / (u8) s;
18271+ mod = dvd % (u8) s;
18272+ if (abs(div) > 0xff) {
18273+ x86emu_intr_raise(0);
18274 return;
18275- }
18276- M.x86.R_AL = (u8)div;
18277- M.x86.R_AH = (u8)mod;
18278+ }
18279+ M.x86.R_AL = (u8) div;
18280+ M.x86.R_AH = (u8) mod;
18281 }
18282
18283 /****************************************************************************
18284 REMARKS:
18285 Implements the DIV instruction and side effects.
18286 ****************************************************************************/
18287-void div_word(u16 s)
18288+void
18289+div_word(u16 s)
18290 {
18291- u32 dvd, div, mod;
18292+ u32 dvd, div, mod;
18293
18294- dvd = (((u32)M.x86.R_DX) << 16) | M.x86.R_AX;
18295- if (s == 0) {
18296- x86emu_intr_raise(0);
18297+ dvd = (((u32) M.x86.R_DX) << 16) | M.x86.R_AX;
18298+ if (s == 0) {
18299+ x86emu_intr_raise(0);
18300+ return;
18301+ }
18302+ div = dvd / (u16) s;
18303+ mod = dvd % (u16) s;
18304+ if (abs(div) > 0xffff) {
18305+ x86emu_intr_raise(0);
18306 return;
18307 }
18308- div = dvd / (u16)s;
18309- mod = dvd % (u16)s;
18310- if (abs(div) > 0xffff) {
18311- x86emu_intr_raise(0);
18312- return;
18313- }
18314- CLEAR_FLAG(F_CF);
18315- CLEAR_FLAG(F_SF);
18316- CONDITIONAL_SET_FLAG(div == 0, F_ZF);
18317- CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
18318+ CLEAR_FLAG(F_CF);
18319+ CLEAR_FLAG(F_SF);
18320+ CONDITIONAL_SET_FLAG(div == 0, F_ZF);
18321+ CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
18322
18323- M.x86.R_AX = (u16)div;
18324- M.x86.R_DX = (u16)mod;
18325+ M.x86.R_AX = (u16) div;
18326+ M.x86.R_DX = (u16) mod;
18327 }
18328
18329 /****************************************************************************
18330 REMARKS:
18331 Implements the DIV instruction and side effects.
18332 ****************************************************************************/
18333-void div_long(u32 s)
18334+void
18335+div_long(u32 s)
18336 {
18337 #ifdef __HAS_LONG_LONG__
18338- u64 dvd, div, mod;
18339-
18340- dvd = (((u64)M.x86.R_EDX) << 32) | M.x86.R_EAX;
18341- if (s == 0) {
18342- x86emu_intr_raise(0);
18343- return;
18344- }
18345- div = dvd / (u32)s;
18346- mod = dvd % (u32)s;
18347- if (abs(div) > 0xffffffff) {
18348- x86emu_intr_raise(0);
18349- return;
18350- }
18351+ u64 dvd, div, mod;
18352+
18353+ dvd = (((u64) M.x86.R_EDX) << 32) | M.x86.R_EAX;
18354+ if (s == 0) {
18355+ x86emu_intr_raise(0);
18356+ return;
18357+ }
18358+ div = dvd / (u32) s;
18359+ mod = dvd % (u32) s;
18360+ if (abs(div) > 0xffffffff) {
18361+ x86emu_intr_raise(0);
18362+ return;
18363+ }
18364 #else
18365- s32 div = 0, mod;
18366- s32 h_dvd = M.x86.R_EDX;
18367- u32 l_dvd = M.x86.R_EAX;
18368-
18369- u32 h_s = s;
18370- u32 l_s = 0;
18371- int counter = 32;
18372- int carry;
18373-
18374- if (s == 0) {
18375- x86emu_intr_raise(0);
18376- return;
18377- }
18378- do {
18379- div <<= 1;
18380- carry = (l_dvd >= l_s) ? 0 : 1;
18381-
18382- if (h_dvd < (h_s + carry)) {
18383- h_s >>= 1;
18384- l_s = s << (--counter);
18385- continue;
18386- } else {
18387- h_dvd -= (h_s + carry);
18388- l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1)
18389- : (l_dvd - l_s);
18390- h_s >>= 1;
18391- l_s = s << (--counter);
18392- div |= 1;
18393- continue;
18394- }
18395-
18396- } while (counter > -1);
18397- /* overflow */
18398- if (h_dvd || (l_dvd > s)) {
18399- x86emu_intr_raise(0);
18400- return;
18401- }
18402- mod = l_dvd;
18403+ s32 div = 0, mod;
18404+ s32 h_dvd = M.x86.R_EDX;
18405+ u32 l_dvd = M.x86.R_EAX;
18406+
18407+ u32 h_s = s;
18408+ u32 l_s = 0;
18409+ int counter = 32;
18410+ int carry;
18411+
18412+ if (s == 0) {
18413+ x86emu_intr_raise(0);
18414+ return;
18415+ }
18416+ do {
18417+ div <<= 1;
18418+ carry = (l_dvd >= l_s) ? 0 : 1;
18419+
18420+ if (h_dvd < (h_s + carry)) {
18421+ h_s >>= 1;
18422+ l_s = s << (--counter);
18423+ continue;
18424+ }
18425+ else {
18426+ h_dvd -= (h_s + carry);
18427+ l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1)
18428+ : (l_dvd - l_s);
18429+ h_s >>= 1;
18430+ l_s = s << (--counter);
18431+ div |= 1;
18432+ continue;
18433+ }
18434+
18435+ } while (counter > -1);
18436+ /* overflow */
18437+ if (h_dvd || (l_dvd > s)) {
18438+ x86emu_intr_raise(0);
18439+ return;
18440+ }
18441+ mod = l_dvd;
18442 #endif
18443- CLEAR_FLAG(F_CF);
18444- CLEAR_FLAG(F_AF);
18445- CLEAR_FLAG(F_SF);
18446- SET_FLAG(F_ZF);
18447- CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
18448+ CLEAR_FLAG(F_CF);
18449+ CLEAR_FLAG(F_AF);
18450+ CLEAR_FLAG(F_SF);
18451+ SET_FLAG(F_ZF);
18452+ CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
18453
18454- M.x86.R_EAX = (u32)div;
18455- M.x86.R_EDX = (u32)mod;
18456+ M.x86.R_EAX = (u32) div;
18457+ M.x86.R_EDX = (u32) mod;
18458 }
18459
18460 /****************************************************************************
18461 REMARKS:
18462 Implements the IN string instruction and side effects.
18463 ****************************************************************************/
18464-void ins(int size)
18465+void
18466+ins(int size)
18467 {
18468- int inc = size;
18469+ int inc = size;
18470
18471- if (ACCESS_FLAG(F_DF)) {
18472- inc = -size;
18473- }
18474- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
18475+ if (ACCESS_FLAG(F_DF)) {
18476+ inc = -size;
18477+ }
18478+ if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
18479 /* dont care whether REPE or REPNE */
18480 /* in until CX is ZERO. */
18481- u32 count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ?
18482- M.x86.R_ECX : M.x86.R_CX);
18483+ u32 count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ?
18484+ M.x86.R_ECX : M.x86.R_CX);
18485 switch (size) {
18486- case 1:
18487+ case 1:
18488 while (count--) {
18489- store_data_byte_abs(M.x86.R_ES, M.x86.R_DI,
18490- (*sys_inb)(M.x86.R_DX));
18491- M.x86.R_DI += inc;
18492+ store_data_byte_abs(M.x86.R_ES, M.x86.R_DI,
18493+ (*sys_inb) (M.x86.R_DX));
18494+ M.x86.R_DI += inc;
18495 }
18496 break;
18497
18498- case 2:
18499+ case 2:
18500 while (count--) {
18501- store_data_word_abs(M.x86.R_ES, M.x86.R_DI,
18502- (*sys_inw)(M.x86.R_DX));
18503- M.x86.R_DI += inc;
18504+ store_data_word_abs(M.x86.R_ES, M.x86.R_DI,
18505+ (*sys_inw) (M.x86.R_DX));
18506+ M.x86.R_DI += inc;
18507 }
18508 break;
18509- case 4:
18510+ case 4:
18511 while (count--) {
18512- store_data_long_abs(M.x86.R_ES, M.x86.R_DI,
18513- (*sys_inl)(M.x86.R_DX));
18514- M.x86.R_DI += inc;
18515+ store_data_long_abs(M.x86.R_ES, M.x86.R_DI,
18516+ (*sys_inl) (M.x86.R_DX));
18517+ M.x86.R_DI += inc;
18518+ break;
18519 }
18520- break;
18521 }
18522- M.x86.R_CX = 0;
18523- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
18524- M.x86.R_ECX = 0;
18525+ M.x86.R_CX = 0;
18526+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
18527+ M.x86.R_ECX = 0;
18528 }
18529- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
18530- } else {
18531+ M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
18532+ }
18533+ else {
18534 switch (size) {
18535- case 1:
18536- store_data_byte_abs(M.x86.R_ES, M.x86.R_DI,
18537- (*sys_inb)(M.x86.R_DX));
18538+ case 1:
18539+ store_data_byte_abs(M.x86.R_ES, M.x86.R_DI,
18540+ (*sys_inb) (M.x86.R_DX));
18541 break;
18542- case 2:
18543- store_data_word_abs(M.x86.R_ES, M.x86.R_DI,
18544- (*sys_inw)(M.x86.R_DX));
18545+ case 2:
18546+ store_data_word_abs(M.x86.R_ES, M.x86.R_DI,
18547+ (*sys_inw) (M.x86.R_DX));
18548 break;
18549- case 4:
18550- store_data_long_abs(M.x86.R_ES, M.x86.R_DI,
18551- (*sys_inl)(M.x86.R_DX));
18552+ case 4:
18553+ store_data_long_abs(M.x86.R_ES, M.x86.R_DI,
18554+ (*sys_inl) (M.x86.R_DX));
18555 break;
18556 }
18557- M.x86.R_DI += inc;
18558+ M.x86.R_DI += inc;
18559 }
18560 }
18561
18562@@ -2518,63 +2654,65 @@ void ins(int size)
18563 REMARKS:
18564 Implements the OUT string instruction and side effects.
18565 ****************************************************************************/
18566-void outs(int size)
18567+void
18568+outs(int size)
18569 {
18570 int inc = size;
18571
18572- if (ACCESS_FLAG(F_DF)) {
18573+ if (ACCESS_FLAG(F_DF)) {
18574 inc = -size;
18575 }
18576- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
18577+ if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
18578 /* dont care whether REPE or REPNE */
18579 /* out until CX is ZERO. */
18580- u32 count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ?
18581- M.x86.R_ECX : M.x86.R_CX);
18582+ u32 count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ?
18583+ M.x86.R_ECX : M.x86.R_CX);
18584 switch (size) {
18585- case 1:
18586+ case 1:
18587 while (count--) {
18588- (*sys_outb)(M.x86.R_DX,
18589- fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI));
18590- M.x86.R_SI += inc;
18591+ (*sys_outb) (M.x86.R_DX,
18592+ fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI));
18593+ M.x86.R_SI += inc;
18594 }
18595 break;
18596
18597- case 2:
18598+ case 2:
18599 while (count--) {
18600- (*sys_outw)(M.x86.R_DX,
18601- fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI));
18602- M.x86.R_SI += inc;
18603+ (*sys_outw) (M.x86.R_DX,
18604+ fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI));
18605+ M.x86.R_SI += inc;
18606 }
18607 break;
18608- case 4:
18609+ case 4:
18610 while (count--) {
18611- (*sys_outl)(M.x86.R_DX,
18612- fetch_data_long_abs(M.x86.R_ES, M.x86.R_SI));
18613- M.x86.R_SI += inc;
18614+ (*sys_outl) (M.x86.R_DX,
18615+ fetch_data_long_abs(M.x86.R_ES, M.x86.R_SI));
18616+ M.x86.R_SI += inc;
18617+ break;
18618 }
18619- break;
18620 }
18621- M.x86.R_CX = 0;
18622- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
18623- M.x86.R_ECX = 0;
18624+ M.x86.R_CX = 0;
18625+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
18626+ M.x86.R_ECX = 0;
18627 }
18628- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
18629- } else {
18630+ M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
18631+ }
18632+ else {
18633 switch (size) {
18634- case 1:
18635- (*sys_outb)(M.x86.R_DX,
18636- fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI));
18637+ case 1:
18638+ (*sys_outb) (M.x86.R_DX,
18639+ fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI));
18640 break;
18641- case 2:
18642- (*sys_outw)(M.x86.R_DX,
18643- fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI));
18644+ case 2:
18645+ (*sys_outw) (M.x86.R_DX,
18646+ fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI));
18647 break;
18648- case 4:
18649- (*sys_outl)(M.x86.R_DX,
18650- fetch_data_long_abs(M.x86.R_ES, M.x86.R_SI));
18651+ case 4:
18652+ (*sys_outl) (M.x86.R_DX,
18653+ fetch_data_long_abs(M.x86.R_ES, M.x86.R_SI));
18654 break;
18655 }
18656- M.x86.R_SI += inc;
18657+ M.x86.R_SI += inc;
18658 }
18659 }
18660
18661@@ -2585,11 +2723,12 @@ addr - Address to fetch word from
18662 REMARKS:
18663 Fetches a word from emulator memory using an absolute address.
18664 ****************************************************************************/
18665-u16 mem_access_word(int addr)
18666+u16
18667+mem_access_word(int addr)
18668 {
18669-DB( if (CHECK_MEM_ACCESS())
18670- x86emu_check_mem_access(addr);)
18671- return (*sys_rdw)(addr);
18672+ DB(if (CHECK_MEM_ACCESS())
18673+ x86emu_check_mem_access(addr);)
18674+ return (*sys_rdw) (addr);
18675 }
18676
18677 /****************************************************************************
18678@@ -2598,12 +2737,13 @@ Pushes a word onto the stack.
18679
18680 NOTE: Do not inline this, as (*sys_wrX) is already inline!
18681 ****************************************************************************/
18682-void push_word(u16 w)
18683+void
18684+push_word(u16 w)
18685 {
18686-DB( if (CHECK_SP_ACCESS())
18687- x86emu_check_sp_access();)
18688- M.x86.R_SP -= 2;
18689- (*sys_wrw)(((u32)M.x86.R_SS << 4) + M.x86.R_SP, w);
18690+ DB(if (CHECK_SP_ACCESS())
18691+ x86emu_check_sp_access();)
18692+ M.x86.R_SP -= 2;
18693+ (*sys_wrw) (((u32) M.x86.R_SS << 4) + M.x86.R_SP, w);
18694 }
18695
18696 /****************************************************************************
18697@@ -2612,12 +2752,13 @@ Pushes a long onto the stack.
18698
18699 NOTE: Do not inline this, as (*sys_wrX) is already inline!
18700 ****************************************************************************/
18701-void push_long(u32 w)
18702+void
18703+push_long(u32 w)
18704 {
18705-DB( if (CHECK_SP_ACCESS())
18706- x86emu_check_sp_access();)
18707- M.x86.R_SP -= 4;
18708- (*sys_wrl)(((u32)M.x86.R_SS << 4) + M.x86.R_SP, w);
18709+ DB(if (CHECK_SP_ACCESS())
18710+ x86emu_check_sp_access();)
18711+ M.x86.R_SP -= 4;
18712+ (*sys_wrl) (((u32) M.x86.R_SS << 4) + M.x86.R_SP, w);
18713 }
18714
18715 /****************************************************************************
18716@@ -2626,15 +2767,16 @@ Pops a word from the stack.
18717
18718 NOTE: Do not inline this, as (*sys_rdX) is already inline!
18719 ****************************************************************************/
18720-u16 pop_word(void)
18721+u16
18722+pop_word(void)
18723 {
18724- register u16 res;
18725+ register u16 res;
18726
18727-DB( if (CHECK_SP_ACCESS())
18728- x86emu_check_sp_access();)
18729- res = (*sys_rdw)(((u32)M.x86.R_SS << 4) + M.x86.R_SP);
18730- M.x86.R_SP += 2;
18731- return res;
18732+ DB(if (CHECK_SP_ACCESS())
18733+ x86emu_check_sp_access();)
18734+ res = (*sys_rdw) (((u32) M.x86.R_SS << 4) + M.x86.R_SP);
18735+ M.x86.R_SP += 2;
18736+ return res;
18737 }
18738
18739 /****************************************************************************
18740@@ -2643,14 +2785,15 @@ Pops a long from the stack.
18741
18742 NOTE: Do not inline this, as (*sys_rdX) is already inline!
18743 ****************************************************************************/
18744-u32 pop_long(void)
18745+u32
18746+pop_long(void)
18747 {
18748 register u32 res;
18749
18750-DB( if (CHECK_SP_ACCESS())
18751- x86emu_check_sp_access();)
18752- res = (*sys_rdl)(((u32)M.x86.R_SS << 4) + M.x86.R_SP);
18753- M.x86.R_SP += 4;
18754+ DB(if (CHECK_SP_ACCESS())
18755+ x86emu_check_sp_access();)
18756+ res = (*sys_rdl) (((u32) M.x86.R_SS << 4) + M.x86.R_SP);
18757+ M.x86.R_SP += 4;
18758 return res;
18759 }
18760
18761@@ -2658,45 +2801,59 @@ DB( if (CHECK_SP_ACCESS())
18762 REMARKS:
18763 CPUID takes EAX/ECX as inputs, writes EAX/EBX/ECX/EDX as output
18764 ****************************************************************************/
18765-void cpuid (void)
18766-{
18767- u32 feature = M.x86.R_EAX;
18768-
18769- switch (feature) {
18770- case 0:
18771- /* Regardless if we have real data from the hardware, the emulator
18772- * will only support upto feature 1, which we set in register EAX.
18773- * Registers EBX:EDX:ECX contain a string identifying the CPU.
18774- */
18775- M.x86.R_EAX = 1;
18776- /* EBX:EDX:ECX = "GenuineIntel" */
18777- M.x86.R_EBX = 0x756e6547;
18778- M.x86.R_EDX = 0x49656e69;
18779- M.x86.R_ECX = 0x6c65746e;
18780- break;
18781- case 1:
18782- /* If we don't have x86 compatible hardware, we return values from an
18783- * Intel 486dx4; which was one of the first processors to have CPUID.
18784- */
18785- M.x86.R_EAX = 0x00000480;
18786- M.x86.R_EBX = 0x00000000;
18787- M.x86.R_ECX = 0x00000000;
18788- M.x86.R_EDX = 0x00000002; /* VME */
18789- /* In the case that we have hardware CPUID instruction, we make sure
18790- * that the features reported are limited to TSC and VME.
18791- */
18792- M.x86.R_EDX &= 0x00000012;
18793- break;
18794- default:
18795- /* Finally, we don't support any additional features. Most CPUs
18796- * return all zeros when queried for invalid or unsupported feature
18797- * numbers.
18798- */
18799- M.x86.R_EAX = 0;
18800- M.x86.R_EBX = 0;
18801- M.x86.R_ECX = 0;
18802- M.x86.R_EDX = 0;
18803- break;
18804- }
18805-}
18806+void
18807+cpuid(void)
18808+{
18809+ u32 feature = M.x86.R_EAX;
18810
18811+#ifdef X86EMU_HAS_HW_CPUID
18812+ /* If the platform allows it, we will base our values on the real
18813+ * results from the CPUID instruction. We limit support to the
18814+ * first two features, and the results of those are sanitized.
18815+ */
18816+ if (feature <= 1)
18817+ hw_cpuid(&M.x86.R_EAX, &M.x86.R_EBX, &M.x86.R_ECX, &M.x86.R_EDX);
18818+#endif
18819+
18820+ switch (feature) {
18821+ case 0:
18822+ /* Regardless if we have real data from the hardware, the emulator
18823+ * will only support upto feature 1, which we set in register EAX.
18824+ * Registers EBX:EDX:ECX contain a string identifying the CPU.
18825+ */
18826+ M.x86.R_EAX = 1;
18827+#ifndef X86EMU_HAS_HW_CPUID
18828+ /* EBX:EDX:ECX = "GenuineIntel" */
18829+ M.x86.R_EBX = 0x756e6547;
18830+ M.x86.R_EDX = 0x49656e69;
18831+ M.x86.R_ECX = 0x6c65746e;
18832+#endif
18833+ break;
18834+ case 1:
18835+#ifndef X86EMU_HAS_HW_CPUID
18836+ /* If we don't have x86 compatible hardware, we return values from an
18837+ * Intel 486dx4; which was one of the first processors to have CPUID.
18838+ */
18839+ M.x86.R_EAX = 0x00000480;
18840+ M.x86.R_EBX = 0x00000000;
18841+ M.x86.R_ECX = 0x00000000;
18842+ M.x86.R_EDX = 0x00000002; /* VME */
18843+#else
18844+ /* In the case that we have hardware CPUID instruction, we make sure
18845+ * that the features reported are limited to TSC and VME.
18846+ */
18847+ M.x86.R_EDX &= 0x00000012;
18848+#endif
18849+ break;
18850+ default:
18851+ /* Finally, we don't support any additional features. Most CPUs
18852+ * return all zeros when queried for invalid or unsupported feature
18853+ * numbers.
18854+ */
18855+ M.x86.R_EAX = 0;
18856+ M.x86.R_EBX = 0;
18857+ M.x86.R_ECX = 0;
18858+ M.x86.R_EDX = 0;
18859+ break;
18860+ }
18861+}
18862diff --git a/libs/x86emu/sys.c b/libs/x86emu/sys.c
18863index 4d90ea3..c514dde 100644
18864--- a/libs/x86emu/sys.c
18865+++ b/libs/x86emu/sys.c
18866@@ -47,223 +47,133 @@
18867 #include "x86emu/prim_ops.h"
18868 #ifndef NO_SYS_HEADERS
18869 #include <string.h>
18870-#endif
18871-/*------------------------- Global Variables ------------------------------*/
18872+#endif
18873
18874-X86EMU_sysEnv _X86EMU_env; /* Global emulator machine state */
18875-X86EMU_intrFuncs _X86EMU_intrTab[256];
18876+#ifdef __GNUC__
18877
18878-/*----------------------------- Implementation ----------------------------*/
18879-#if defined(__alpha__) || defined(__alpha)
18880-/* to cope with broken egcs-1.1.2 :-(((( */
18881-
18882-#define ALPHA_UALOADS
18883-/*
18884- * inline functions to do unaligned accesses
18885- * from linux/include/asm-alpha/unaligned.h
18886- */
18887-
18888-/*
18889- * EGCS 1.1 knows about arbitrary unaligned loads. Define some
18890- * packed structures to talk about such things with.
18891- */
18892-
18893-#if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
18894-struct __una_u64 { unsigned long x __attribute__((packed)); };
18895-struct __una_u32 { unsigned int x __attribute__((packed)); };
18896-struct __una_u16 { unsigned short x __attribute__((packed)); };
18897-#endif
18898+/* Define some packed structures to use with unaligned accesses */
18899+
18900+struct __una_u64 {
18901+ u64 x __attribute__ ((packed));
18902+};
18903+struct __una_u32 {
18904+ u32 x __attribute__ ((packed));
18905+};
18906+struct __una_u16 {
18907+ u16 x __attribute__ ((packed));
18908+};
18909+
18910+/* Elemental unaligned loads */
18911
18912-static __inline__ unsigned long ldq_u(unsigned long * r11)
18913+static __inline__ u64
18914+ldq_u(u64 * p)
18915 {
18916-#if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
18917- const struct __una_u64 *ptr = (const struct __una_u64 *) r11;
18918- return ptr->x;
18919-#else
18920- unsigned long r1,r2;
18921- __asm__("ldq_u %0,%3\n\t"
18922- "ldq_u %1,%4\n\t"
18923- "extql %0,%2,%0\n\t"
18924- "extqh %1,%2,%1"
18925- :"=&r" (r1), "=&r" (r2)
18926- :"r" (r11),
18927- "m" (*r11),
18928- "m" (*(const unsigned long *)(7+(char *) r11)));
18929- return r1 | r2;
18930-#endif
18931+ const struct __una_u64 *ptr = (const struct __una_u64 *) p;
18932+
18933+ return ptr->x;
18934 }
18935
18936-static __inline__ unsigned long ldl_u(unsigned int * r11)
18937+static __inline__ u32
18938+ldl_u(u32 * p)
18939 {
18940-#if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
18941- const struct __una_u32 *ptr = (const struct __una_u32 *) r11;
18942- return ptr->x;
18943-#else
18944- unsigned long r1,r2;
18945- __asm__("ldq_u %0,%3\n\t"
18946- "ldq_u %1,%4\n\t"
18947- "extll %0,%2,%0\n\t"
18948- "extlh %1,%2,%1"
18949- :"=&r" (r1), "=&r" (r2)
18950- :"r" (r11),
18951- "m" (*r11),
18952- "m" (*(const unsigned long *)(3+(char *) r11)));
18953- return r1 | r2;
18954-#endif
18955+ const struct __una_u32 *ptr = (const struct __una_u32 *) p;
18956+
18957+ return ptr->x;
18958 }
18959
18960-static __inline__ unsigned long ldw_u(unsigned short * r11)
18961+static __inline__ u16
18962+ldw_u(u16 * p)
18963 {
18964-#if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
18965- const struct __una_u16 *ptr = (const struct __una_u16 *) r11;
18966- return ptr->x;
18967-#else
18968- unsigned long r1,r2;
18969- __asm__("ldq_u %0,%3\n\t"
18970- "ldq_u %1,%4\n\t"
18971- "extwl %0,%2,%0\n\t"
18972- "extwh %1,%2,%1"
18973- :"=&r" (r1), "=&r" (r2)
18974- :"r" (r11),
18975- "m" (*r11),
18976- "m" (*(const unsigned long *)(1+(char *) r11)));
18977- return r1 | r2;
18978-#endif
18979+ const struct __una_u16 *ptr = (const struct __una_u16 *) p;
18980+
18981+ return ptr->x;
18982 }
18983
18984-/*
18985- * Elemental unaligned stores
18986- */
18987+/* Elemental unaligned stores */
18988
18989-static __inline__ void stq_u(unsigned long r5, unsigned long * r11)
18990+static __inline__ void
18991+stq_u(u64 val, u64 * p)
18992 {
18993-#if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
18994- struct __una_u64 *ptr = (struct __una_u64 *) r11;
18995- ptr->x = r5;
18996-#else
18997- unsigned long r1,r2,r3,r4;
18998-
18999- __asm__("ldq_u %3,%1\n\t"
19000- "ldq_u %2,%0\n\t"
19001- "insqh %6,%7,%5\n\t"
19002- "insql %6,%7,%4\n\t"
19003- "mskqh %3,%7,%3\n\t"
19004- "mskql %2,%7,%2\n\t"
19005- "bis %3,%5,%3\n\t"
19006- "bis %2,%4,%2\n\t"
19007- "stq_u %3,%1\n\t"
19008- "stq_u %2,%0"
19009- :"=m" (*r11),
19010- "=m" (*(unsigned long *)(7+(char *) r11)),
19011- "=&r" (r1), "=&r" (r2), "=&r" (r3), "=&r" (r4)
19012- :"r" (r5), "r" (r11));
19013-#endif
19014+ struct __una_u64 *ptr = (struct __una_u64 *) p;
19015+
19016+ ptr->x = val;
19017 }
19018
19019-static __inline__ void stl_u(unsigned long r5, unsigned int * r11)
19020+static __inline__ void
19021+stl_u(u32 val, u32 * p)
19022 {
19023-#if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
19024- struct __una_u32 *ptr = (struct __una_u32 *) r11;
19025- ptr->x = r5;
19026-#else
19027- unsigned long r1,r2,r3,r4;
19028-
19029- __asm__("ldq_u %3,%1\n\t"
19030- "ldq_u %2,%0\n\t"
19031- "inslh %6,%7,%5\n\t"
19032- "insll %6,%7,%4\n\t"
19033- "msklh %3,%7,%3\n\t"
19034- "mskll %2,%7,%2\n\t"
19035- "bis %3,%5,%3\n\t"
19036- "bis %2,%4,%2\n\t"
19037- "stq_u %3,%1\n\t"
19038- "stq_u %2,%0"
19039- :"=m" (*r11),
19040- "=m" (*(unsigned long *)(3+(char *) r11)),
19041- "=&r" (r1), "=&r" (r2), "=&r" (r3), "=&r" (r4)
19042- :"r" (r5), "r" (r11));
19043-#endif
19044+ struct __una_u32 *ptr = (struct __una_u32 *) p;
19045+
19046+ ptr->x = val;
19047 }
19048
19049-static __inline__ void stw_u(unsigned long r5, unsigned short * r11)
19050+static __inline__ void
19051+stw_u(u16 val, u16 * p)
19052 {
19053-#if defined(__GNUC__) && ((__GNUC__ > 2) || (__GNUC_MINOR__ >= 91))
19054- struct __una_u16 *ptr = (struct __una_u16 *) r11;
19055- ptr->x = r5;
19056-#else
19057- unsigned long r1,r2,r3,r4;
19058-
19059- __asm__("ldq_u %3,%1\n\t"
19060- "ldq_u %2,%0\n\t"
19061- "inswh %6,%7,%5\n\t"
19062- "inswl %6,%7,%4\n\t"
19063- "mskwh %3,%7,%3\n\t"
19064- "mskwl %2,%7,%2\n\t"
19065- "bis %3,%5,%3\n\t"
19066- "bis %2,%4,%2\n\t"
19067- "stq_u %3,%1\n\t"
19068- "stq_u %2,%0"
19069- :"=m" (*r11),
19070- "=m" (*(unsigned long *)(1+(char *) r11)),
19071- "=&r" (r1), "=&r" (r2), "=&r" (r3), "=&r" (r4)
19072- :"r" (r5), "r" (r11));
19073-#endif
19074+ struct __una_u16 *ptr = (struct __una_u16 *) p;
19075+
19076+ ptr->x = val;
19077 }
19078+#else /* !__GNUC__ */
19079
19080-#elif defined(__GNUC__) && ((__GNUC__ < 3)) && \
19081- (defined (__ia64__) || defined (ia64__))
19082-#define IA64_UALOADS
19083-/*
19084- * EGCS 1.1 knows about arbitrary unaligned loads. Define some
19085- * packed structures to talk about such things with.
19086- */
19087-struct __una_u64 { unsigned long x __attribute__((packed)); };
19088-struct __una_u32 { unsigned int x __attribute__((packed)); };
19089-struct __una_u16 { unsigned short x __attribute__((packed)); };
19090-
19091-static __inline__ unsigned long
19092-__uldq (const unsigned long * r11)
19093+static __inline__ u64
19094+ldq_u(u64 * p)
19095 {
19096- const struct __una_u64 *ptr = (const struct __una_u64 *) r11;
19097- return ptr->x;
19098+ u64 ret;
19099+
19100+ memmove(&ret, p, sizeof(*p));
19101+ return ret;
19102 }
19103
19104-static __inline__ unsigned long
19105-uldl (const unsigned int * r11)
19106+static __inline__ u32
19107+ldl_u(u32 * p)
19108 {
19109- const struct __una_u32 *ptr = (const struct __una_u32 *) r11;
19110- return ptr->x;
19111+ u32 ret;
19112+
19113+ memmove(&ret, p, sizeof(*p));
19114+ return ret;
19115 }
19116
19117-static __inline__ unsigned long
19118-uldw (const unsigned short * r11)
19119+static __inline__ u16
19120+ldw_u(u16 * p)
19121 {
19122- const struct __una_u16 *ptr = (const struct __una_u16 *) r11;
19123- return ptr->x;
19124+ u16 ret;
19125+
19126+ memmove(&ret, p, sizeof(*p));
19127+ return ret;
19128 }
19129
19130 static __inline__ void
19131-ustq (unsigned long r5, unsigned long * r11)
19132+stq_u(u64 val, u64 * p)
19133 {
19134- struct __una_u64 *ptr = (struct __una_u64 *) r11;
19135- ptr->x = r5;
19136+ u64 tmp = val;
19137+
19138+ memmove(p, &tmp, sizeof(*p));
19139 }
19140
19141 static __inline__ void
19142-ustl (unsigned long r5, unsigned int * r11)
19143+stl_u(u32 val, u32 * p)
19144 {
19145- struct __una_u32 *ptr = (struct __una_u32 *) r11;
19146- ptr->x = r5;
19147+ u32 tmp = val;
19148+
19149+ memmove(p, &tmp, sizeof(*p));
19150 }
19151
19152 static __inline__ void
19153-ustw (unsigned long r5, unsigned short * r11)
19154+stw_u(u16 val, u16 * p)
19155 {
19156- struct __una_u16 *ptr = (struct __una_u16 *) r11;
19157- ptr->x = r5;
19158+ u16 tmp = val;
19159+
19160+ memmove(p, &tmp, sizeof(*p));
19161 }
19162
19163-#endif
19164+#endif /* __GNUC__ */
19165+/*------------------------- Global Variables ------------------------------*/
19166+
19167+X86EMU_sysEnv _X86EMU_env; /* Global emulator machine state */
19168+X86EMU_intrFuncs _X86EMU_intrTab[256];
19169+
19170+/*----------------------------- Implementation ----------------------------*/
19171
19172 /****************************************************************************
19173 PARAMETERS:
19174@@ -275,19 +185,20 @@ Byte value read from emulator memory.
19175 REMARKS:
19176 Reads a byte value from the emulator memory.
19177 ****************************************************************************/
19178-u8 X86API rdb(
19179- u32 addr)
19180+u8 X86API
19181+rdb(u32 addr)
19182 {
19183- u8 val;
19184-
19185- if (addr > M.mem_size - 1) {
19186- DB(printk("mem_read: address %#lx out of range!\n", addr);)
19187- HALT_SYS();
19188- }
19189- val = *(u8*)(M.mem_base + addr);
19190-DB( if (DEBUG_MEM_TRACE())
19191- printk("%#08x 1 -> %#x\n", addr, val);)
19192- return val;
19193+ u8 val;
19194+
19195+ if (addr > M.mem_size - 1) {
19196+ DB(printk("mem_read: address %#lx out of range!\n", addr);
19197+ )
19198+ HALT_SYS();
19199+ }
19200+ val = *(u8 *) (M.mem_base + addr);
19201+ DB(if (DEBUG_MEM_TRACE())
19202+ printk("%#08x 1 -> %#x\n", addr, val);)
19203+ return val;
19204 }
19205
19206 /****************************************************************************
19207@@ -300,32 +211,27 @@ Word value read from emulator memory.
19208 REMARKS:
19209 Reads a word value from the emulator memory.
19210 ****************************************************************************/
19211-u16 X86API rdw(
19212- u32 addr)
19213+u16 X86API
19214+rdw(u32 addr)
19215 {
19216- u16 val = 0;
19217+ u16 val = 0;
19218
19219- if (addr > M.mem_size - 2) {
19220- DB(printk("mem_read: address %#lx out of range!\n", addr);)
19221- HALT_SYS();
19222- }
19223+ if (addr > M.mem_size - 2) {
19224+ DB(printk("mem_read: address %#lx out of range!\n", addr);
19225+ )
19226+ HALT_SYS();
19227+ }
19228 #ifdef __BIG_ENDIAN__
19229- if (addr & 0x1) {
19230- val = (*(u8*)(M.mem_base + addr) |
19231- (*(u8*)(M.mem_base + addr + 1) << 8));
19232- }
19233- else
19234-#endif
19235-#if defined(ALPHA_UALOADS)
19236- val = ldw_u((u16*)(M.mem_base + addr));
19237-#elif defined(IA64_UALOADS)
19238- val = uldw((u16*)(M.mem_base + addr));
19239-#else
19240- val = *(u16*)(M.mem_base + addr);
19241+ if (addr & 0x1) {
19242+ val = (*(u8 *) (M.mem_base + addr) |
19243+ (*(u8 *) (M.mem_base + addr + 1) << 8));
19244+ }
19245+ else
19246 #endif
19247- DB( if (DEBUG_MEM_TRACE())
19248- printk("%#08x 2 -> %#x\n", addr, val);)
19249- return val;
19250+ val = ldw_u((u16 *) (M.mem_base + addr));
19251+ DB(if (DEBUG_MEM_TRACE())
19252+ printk("%#08x 2 -> %#x\n", addr, val);)
19253+ return val;
19254 }
19255
19256 /****************************************************************************
19257@@ -337,34 +243,29 @@ Long value read from emulator memory.
19258 REMARKS:
19259 Reads a long value from the emulator memory.
19260 ****************************************************************************/
19261-u32 X86API rdl(
19262- u32 addr)
19263+u32 X86API
19264+rdl(u32 addr)
19265 {
19266- u32 val = 0;
19267+ u32 val = 0;
19268
19269- if (addr > M.mem_size - 4) {
19270- DB(printk("mem_read: address %#lx out of range!\n", addr);)
19271- HALT_SYS();
19272- }
19273+ if (addr > M.mem_size - 4) {
19274+ DB(printk("mem_read: address %#lx out of range!\n", addr);
19275+ )
19276+ HALT_SYS();
19277+ }
19278 #ifdef __BIG_ENDIAN__
19279- if (addr & 0x3) {
19280- val = (*(u8*)(M.mem_base + addr + 0) |
19281- (*(u8*)(M.mem_base + addr + 1) << 8) |
19282- (*(u8*)(M.mem_base + addr + 2) << 16) |
19283- (*(u8*)(M.mem_base + addr + 3) << 24));
19284- }
19285- else
19286-#endif
19287-#if defined(ALPHA_UALOADS)
19288- val = ldl_u((u32*)(M.mem_base + addr));
19289-#elif defined(IA64_UALOADS)
19290- val = uldl((u32*)(M.mem_base + addr));
19291-#else
19292- val = *(u32*)(M.mem_base + addr);
19293+ if (addr & 0x3) {
19294+ val = (*(u8 *) (M.mem_base + addr + 0) |
19295+ (*(u8 *) (M.mem_base + addr + 1) << 8) |
19296+ (*(u8 *) (M.mem_base + addr + 2) << 16) |
19297+ (*(u8 *) (M.mem_base + addr + 3) << 24));
19298+ }
19299+ else
19300 #endif
19301-DB( if (DEBUG_MEM_TRACE())
19302- printk("%#08x 4 -> %#x\n", addr, val);)
19303- return val;
19304+ val = ldl_u((u32 *) (M.mem_base + addr));
19305+ DB(if (DEBUG_MEM_TRACE())
19306+ printk("%#08x 4 -> %#x\n", addr, val);)
19307+ return val;
19308 }
19309
19310 /****************************************************************************
19311@@ -375,17 +276,17 @@ val - Value to store
19312 REMARKS:
19313 Writes a byte value to emulator memory.
19314 ****************************************************************************/
19315-void X86API wrb(
19316- u32 addr,
19317- u8 val)
19318+void X86API
19319+wrb(u32 addr, u8 val)
19320 {
19321-DB( if (DEBUG_MEM_TRACE())
19322- printk("%#08x 1 <- %#x\n", addr, val);)
19323- if (addr > M.mem_size - 1) {
19324- DB(printk("mem_write: address %#lx out of range!\n", addr);)
19325- HALT_SYS();
19326- }
19327- *(u8*)(M.mem_base + addr) = val;
19328+ DB(if (DEBUG_MEM_TRACE())
19329+ printk("%#08x 1 <- %#x\n", addr, val);)
19330+ if (addr > M.mem_size - 1) {
19331+ DB(printk("mem_write: address %#lx out of range!\n", addr);
19332+ )
19333+ HALT_SYS();
19334+ }
19335+ *(u8 *) (M.mem_base + addr) = val;
19336 }
19337
19338 /****************************************************************************
19339@@ -396,30 +297,24 @@ val - Value to store
19340 REMARKS:
19341 Writes a word value to emulator memory.
19342 ****************************************************************************/
19343-void X86API wrw(
19344- u32 addr,
19345- u16 val)
19346+void X86API
19347+wrw(u32 addr, u16 val)
19348 {
19349-DB( if (DEBUG_MEM_TRACE())
19350- printk("%#08x 2 <- %#x\n", addr, val);)
19351- if (addr > M.mem_size - 2) {
19352- DB(printk("mem_write: address %#lx out of range!\n", addr);)
19353- HALT_SYS();
19354- }
19355+ DB(if (DEBUG_MEM_TRACE())
19356+ printk("%#08x 2 <- %#x\n", addr, val);)
19357+ if (addr > M.mem_size - 2) {
19358+ DB(printk("mem_write: address %#lx out of range!\n", addr);
19359+ )
19360+ HALT_SYS();
19361+ }
19362 #ifdef __BIG_ENDIAN__
19363- if (addr & 0x1) {
19364- *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
19365- *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
19366- }
19367- else
19368-#endif
19369-#if defined(ALPHA_UALOADS)
19370- stw_u(val,(u16*)(M.mem_base + addr));
19371-#elif defined(IA64_UALOADS)
19372- ustw(val,(u16*)(M.mem_base + addr));
19373-#else
19374- *(u16*)(M.mem_base + addr) = val;
19375+ if (addr & 0x1) {
19376+ *(u8 *) (M.mem_base + addr + 0) = (val >> 0) & 0xff;
19377+ *(u8 *) (M.mem_base + addr + 1) = (val >> 8) & 0xff;
19378+ }
19379+ else
19380 #endif
19381+ stw_u(val, (u16 *) (M.mem_base + addr));
19382 }
19383
19384 /****************************************************************************
19385@@ -430,32 +325,26 @@ val - Value to store
19386 REMARKS:
19387 Writes a long value to emulator memory.
19388 ****************************************************************************/
19389-void X86API wrl(
19390- u32 addr,
19391- u32 val)
19392+void X86API
19393+wrl(u32 addr, u32 val)
19394 {
19395-DB( if (DEBUG_MEM_TRACE())
19396- printk("%#08x 4 <- %#x\n", addr, val);)
19397- if (addr > M.mem_size - 4) {
19398- DB(printk("mem_write: address %#lx out of range!\n", addr);)
19399- HALT_SYS();
19400- }
19401+ DB(if (DEBUG_MEM_TRACE())
19402+ printk("%#08x 4 <- %#x\n", addr, val);)
19403+ if (addr > M.mem_size - 4) {
19404+ DB(printk("mem_write: address %#lx out of range!\n", addr);
19405+ )
19406+ HALT_SYS();
19407+ }
19408 #ifdef __BIG_ENDIAN__
19409- if (addr & 0x1) {
19410- *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
19411- *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
19412- *(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
19413- *(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
19414- }
19415- else
19416-#endif
19417-#if defined(ALPHA_UALOADS)
19418- stl_u(val,(u32*)(M.mem_base + addr));
19419-#elif defined(IA64_UALOADS)
19420- ustl(val,(u32*)(M.mem_base + addr));
19421-#else
19422- *(u32*)(M.mem_base + addr) = val;
19423+ if (addr & 0x1) {
19424+ *(u8 *) (M.mem_base + addr + 0) = (val >> 0) & 0xff;
19425+ *(u8 *) (M.mem_base + addr + 1) = (val >> 8) & 0xff;
19426+ *(u8 *) (M.mem_base + addr + 2) = (val >> 16) & 0xff;
19427+ *(u8 *) (M.mem_base + addr + 3) = (val >> 24) & 0xff;
19428+ }
19429+ else
19430 #endif
19431+ stl_u(val, (u32 *) (M.mem_base + addr));
19432 }
19433
19434 /****************************************************************************
19435@@ -466,12 +355,12 @@ RETURN:
19436 REMARKS:
19437 Default PIO byte read function. Doesn't perform real inb.
19438 ****************************************************************************/
19439-static u8 X86API p_inb(
19440- X86EMU_pioAddr addr)
19441+static u8 X86API
19442+p_inb(X86EMU_pioAddr addr)
19443 {
19444-DB( if (DEBUG_IO_TRACE())
19445- printk("inb %#04x \n", addr);)
19446- return 0;
19447+ DB(if (DEBUG_IO_TRACE())
19448+ printk("inb %#04x \n", addr);)
19449+ return 0;
19450 }
19451
19452 /****************************************************************************
19453@@ -482,12 +371,12 @@ RETURN:
19454 REMARKS:
19455 Default PIO word read function. Doesn't perform real inw.
19456 ****************************************************************************/
19457-static u16 X86API p_inw(
19458- X86EMU_pioAddr addr)
19459+static u16 X86API
19460+p_inw(X86EMU_pioAddr addr)
19461 {
19462-DB( if (DEBUG_IO_TRACE())
19463- printk("inw %#04x \n", addr);)
19464- return 0;
19465+ DB(if (DEBUG_IO_TRACE())
19466+ printk("inw %#04x \n", addr);)
19467+ return 0;
19468 }
19469
19470 /****************************************************************************
19471@@ -498,12 +387,12 @@ RETURN:
19472 REMARKS:
19473 Default PIO long read function. Doesn't perform real inl.
19474 ****************************************************************************/
19475-static u32 X86API p_inl(
19476- X86EMU_pioAddr addr)
19477+static u32 X86API
19478+p_inl(X86EMU_pioAddr addr)
19479 {
19480-DB( if (DEBUG_IO_TRACE())
19481- printk("inl %#04x \n", addr);)
19482- return 0;
19483+ DB(if (DEBUG_IO_TRACE())
19484+ printk("inl %#04x \n", addr);)
19485+ return 0;
19486 }
19487
19488 /****************************************************************************
19489@@ -513,13 +402,12 @@ val - Value to store
19490 REMARKS:
19491 Default PIO byte write function. Doesn't perform real outb.
19492 ****************************************************************************/
19493-static void X86API p_outb(
19494- X86EMU_pioAddr addr,
19495- u8 val)
19496+static void X86API
19497+p_outb(X86EMU_pioAddr addr, u8 val)
19498 {
19499-DB( if (DEBUG_IO_TRACE())
19500- printk("outb %#02x -> %#04x \n", val, addr);)
19501- return;
19502+ DB(if (DEBUG_IO_TRACE())
19503+ printk("outb %#02x -> %#04x \n", val, addr);)
19504+ return;
19505 }
19506
19507 /****************************************************************************
19508@@ -529,13 +417,12 @@ val - Value to store
19509 REMARKS:
19510 Default PIO word write function. Doesn't perform real outw.
19511 ****************************************************************************/
19512-static void X86API p_outw(
19513- X86EMU_pioAddr addr,
19514- u16 val)
19515+static void X86API
19516+p_outw(X86EMU_pioAddr addr, u16 val)
19517 {
19518-DB( if (DEBUG_IO_TRACE())
19519- printk("outw %#04x -> %#04x \n", val, addr);)
19520- return;
19521+ DB(if (DEBUG_IO_TRACE())
19522+ printk("outw %#04x -> %#04x \n", val, addr);)
19523+ return;
19524 }
19525
19526 /****************************************************************************
19527@@ -545,29 +432,29 @@ val - Value to store
19528 REMARKS:
19529 Default PIO ;ong write function. Doesn't perform real outl.
19530 ****************************************************************************/
19531-static void X86API p_outl(
19532- X86EMU_pioAddr addr,
19533- u32 val)
19534+static void X86API
19535+p_outl(X86EMU_pioAddr addr, u32 val)
19536 {
19537-DB( if (DEBUG_IO_TRACE())
19538- printk("outl %#08x -> %#04x \n", val, addr);)
19539- return;
19540+ DB(if (DEBUG_IO_TRACE())
19541+ printk("outl %#08x -> %#04x \n", val, addr);)
19542+ return;
19543 }
19544
19545 /*------------------------- Global Variables ------------------------------*/
19546
19547-u8 (X86APIP sys_rdb)(u32 addr) = rdb;
19548-u16 (X86APIP sys_rdw)(u32 addr) = rdw;
19549-u32 (X86APIP sys_rdl)(u32 addr) = rdl;
19550-void (X86APIP sys_wrb)(u32 addr,u8 val) = wrb;
19551-void (X86APIP sys_wrw)(u32 addr,u16 val) = wrw;
19552-void (X86APIP sys_wrl)(u32 addr,u32 val) = wrl;
19553-u8 (X86APIP sys_inb)(X86EMU_pioAddr addr) = p_inb;
19554-u16 (X86APIP sys_inw)(X86EMU_pioAddr addr) = p_inw;
19555-u32 (X86APIP sys_inl)(X86EMU_pioAddr addr) = p_inl;
19556-void (X86APIP sys_outb)(X86EMU_pioAddr addr, u8 val) = p_outb;
19557-void (X86APIP sys_outw)(X86EMU_pioAddr addr, u16 val) = p_outw;
19558-void (X86APIP sys_outl)(X86EMU_pioAddr addr, u32 val) = p_outl;
19559+u8(X86APIP sys_rdb) (u32 addr) = rdb;
19560+u16(X86APIP sys_rdw) (u32 addr) = rdw;
19561+u32(X86APIP sys_rdl) (u32 addr) = rdl;
19562+void (X86APIP sys_wrb) (u32 addr, u8 val) = wrb;
19563+void (X86APIP sys_wrw) (u32 addr, u16 val) = wrw;
19564+void (X86APIP sys_wrl) (u32 addr, u32 val) = wrl;
19565+
19566+u8(X86APIP sys_inb) (X86EMU_pioAddr addr) = p_inb;
19567+u16(X86APIP sys_inw) (X86EMU_pioAddr addr) = p_inw;
19568+u32(X86APIP sys_inl) (X86EMU_pioAddr addr) = p_inl;
19569+void (X86APIP sys_outb) (X86EMU_pioAddr addr, u8 val) = p_outb;
19570+void (X86APIP sys_outw) (X86EMU_pioAddr addr, u16 val) = p_outw;
19571+void (X86APIP sys_outl) (X86EMU_pioAddr addr, u32 val) = p_outl;
19572
19573 /*----------------------------- Setup -------------------------------------*/
19574
19575@@ -580,8 +467,8 @@ This function is used to set the pointers to functions which access
19576 memory space, allowing the user application to override these functions
19577 and hook them out as necessary for their application.
19578 ****************************************************************************/
19579-void X86EMU_setupMemFuncs(
19580- X86EMU_memFuncs *funcs)
19581+void
19582+X86EMU_setupMemFuncs(X86EMU_memFuncs * funcs)
19583 {
19584 sys_rdb = funcs->rdb;
19585 sys_rdw = funcs->rdw;
19586@@ -600,8 +487,8 @@ This function is used to set the pointers to functions which access
19587 I/O space, allowing the user application to override these functions
19588 and hook them out as necessary for their application.
19589 ****************************************************************************/
19590-void X86EMU_setupPioFuncs(
19591- X86EMU_pioFuncs *funcs)
19592+void
19593+X86EMU_setupPioFuncs(X86EMU_pioFuncs * funcs)
19594 {
19595 sys_inb = funcs->inb;
19596 sys_inw = funcs->inw;
19597@@ -624,17 +511,17 @@ in the emulator via the interrupt vector table. This allows the application
19598 to get control when the code being emulated executes specific software
19599 interrupts.
19600 ****************************************************************************/
19601-void X86EMU_setupIntrFuncs(
19602- X86EMU_intrFuncs funcs[])
19603+void
19604+X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[])
19605 {
19606 int i;
19607-
19608- for (i=0; i < 256; i++)
19609- _X86EMU_intrTab[i] = NULL;
19610- if (funcs) {
19611- for (i = 0; i < 256; i++)
19612- _X86EMU_intrTab[i] = funcs[i];
19613- }
19614+
19615+ for (i = 0; i < 256; i++)
19616+ _X86EMU_intrTab[i] = NULL;
19617+ if (funcs) {
19618+ for (i = 0; i < 256; i++)
19619+ _X86EMU_intrTab[i] = funcs[i];
19620+ }
19621 }
19622
19623 /****************************************************************************
19624@@ -649,15 +536,15 @@ so that the code in the emulator will continue processing the software
19625 interrupt as per normal. This essentially allows system code to actively
19626 hook and handle certain software interrupts as necessary.
19627 ****************************************************************************/
19628-void X86EMU_prepareForInt(
19629- int num)
19630+void
19631+X86EMU_prepareForInt(int num)
19632 {
19633- push_word((u16)M.x86.R_FLG);
19634+ push_word((u16) M.x86.R_FLG);
19635 CLEAR_FLAG(F_IF);
19636 CLEAR_FLAG(F_TF);
19637 push_word(M.x86.R_CS);
19638 M.x86.R_CS = mem_access_word(num * 4 + 2);
19639 push_word(M.x86.R_IP);
19640 M.x86.R_IP = mem_access_word(num * 4);
19641- M.x86.intr = 0;
19642+ M.x86.intr = 0;
19643 }
19644diff --git a/libs/x86emu/validate.c b/libs/x86emu/validate.c
19645index 239f6c1..4c36e1d 100644
19646--- a/libs/x86emu/validate.c
19647+++ b/libs/x86emu/validate.c
19648@@ -591,58 +591,62 @@
19649 printk("passed\n"); \
19650 }
19651
19652-void printk(const char *fmt, ...)
19653+void
19654+printk(const char *fmt, ...)
19655 {
19656 va_list argptr;
19657+
19658 va_start(argptr, fmt);
19659 vfprintf(stdout, fmt, argptr);
19660 fflush(stdout);
19661 va_end(argptr);
19662 }
19663
19664-char * print_flags(char *buf,ulong flags)
19665+char *
19666+print_flags(char *buf, ulong flags)
19667 {
19668 char *separator = "";
19669
19670 buf[0] = 0;
19671 if (flags & F_CF) {
19672- strcat(buf,separator);
19673- strcat(buf,"CF");
19674+ strcat(buf, separator);
19675+ strcat(buf, "CF");
19676 separator = ",";
19677- }
19678+ }
19679 if (flags & F_PF) {
19680- strcat(buf,separator);
19681- strcat(buf,"PF");
19682+ strcat(buf, separator);
19683+ strcat(buf, "PF");
19684 separator = ",";
19685- }
19686+ }
19687 if (flags & F_AF) {
19688- strcat(buf,separator);
19689- strcat(buf,"AF");
19690+ strcat(buf, separator);
19691+ strcat(buf, "AF");
19692 separator = ",";
19693- }
19694+ }
19695 if (flags & F_ZF) {
19696- strcat(buf,separator);
19697- strcat(buf,"ZF");
19698+ strcat(buf, separator);
19699+ strcat(buf, "ZF");
19700 separator = ",";
19701- }
19702+ }
19703 if (flags & F_SF) {
19704- strcat(buf,separator);
19705- strcat(buf,"SF");
19706+ strcat(buf, separator);
19707+ strcat(buf, "SF");
19708 separator = ",";
19709- }
19710+ }
19711 if (flags & F_OF) {
19712- strcat(buf,separator);
19713- strcat(buf,"OF");
19714+ strcat(buf, separator);
19715+ strcat(buf, "OF");
19716 separator = ",";
19717- }
19718+ }
19719 if (separator[0] == 0)
19720- strcpy(buf,"None");
19721+ strcpy(buf, "None");
19722 return buf;
19723 }
19724
19725-int main(int argc)
19726+int
19727+main(int argc)
19728 {
19729- ulong def_flags;
19730+ ulong def_flags;
19731 int trace = false;
19732
19733 if (argc > 1)
19734@@ -673,7 +677,7 @@ int main(int argc)
19735 VAL_LONG_LONG_BINARY(cmp_long);
19736
19737 VAL_BYTE_UNARY(daa_byte);
19738- VAL_BYTE_UNARY(das_byte); // Fails for 0x9A (out of range anyway)
19739+ VAL_BYTE_UNARY(das_byte); /* Fails for 0x9A (out of range anyway) */
19740
19741 VAL_BYTE_UNARY(dec_byte);
19742 VAL_WORD_UNARY(dec_word);
19743diff --git a/libs/x86emu/x86emu.h b/libs/x86emu/x86emu.h
19744index 795e2d6..501dd91 100644
19745--- a/libs/x86emu/x86emu.h
19746+++ b/libs/x86emu/x86emu.h
19747@@ -56,7 +56,7 @@ typedef int X86EMU_pioAddr;
19748 /*---------------------- Macros and type definitions ----------------------*/
19749
19750 #ifdef PACK
19751-# pragma PACK /* Don't pack structs with function pointers! */
19752+#pragma PACK /* Don't pack structs with function pointers! */
19753 #endif
19754
19755 /****************************************************************************
19756@@ -81,13 +81,13 @@ outw - Function to write a word to an I/O port
19757 outl - Function to write a dword to an I/O port
19758 ****************************************************************************/
19759 typedef struct {
19760- u8 (X86APIP inb)(X86EMU_pioAddr addr);
19761- u16 (X86APIP inw)(X86EMU_pioAddr addr);
19762- u32 (X86APIP inl)(X86EMU_pioAddr addr);
19763- void (X86APIP outb)(X86EMU_pioAddr addr, u8 val);
19764- void (X86APIP outw)(X86EMU_pioAddr addr, u16 val);
19765- void (X86APIP outl)(X86EMU_pioAddr addr, u32 val);
19766- } X86EMU_pioFuncs;
19767+ u8(X86APIP inb) (X86EMU_pioAddr addr);
19768+ u16(X86APIP inw) (X86EMU_pioAddr addr);
19769+ u32(X86APIP inl) (X86EMU_pioAddr addr);
19770+ void (X86APIP outb) (X86EMU_pioAddr addr, u8 val);
19771+ void (X86APIP outw) (X86EMU_pioAddr addr, u16 val);
19772+ void (X86APIP outl) (X86EMU_pioAddr addr, u32 val);
19773+} X86EMU_pioFuncs;
19774
19775 /****************************************************************************
19776 REMARKS:
19777@@ -112,13 +112,13 @@ wrw - Function to write a word to an address
19778 wrl - Function to write a dword to an address
19779 ****************************************************************************/
19780 typedef struct {
19781- u8 (X86APIP rdb)(u32 addr);
19782- u16 (X86APIP rdw)(u32 addr);
19783- u32 (X86APIP rdl)(u32 addr);
19784- void (X86APIP wrb)(u32 addr, u8 val);
19785- void (X86APIP wrw)(u32 addr, u16 val);
19786- void (X86APIP wrl)(u32 addr, u32 val);
19787- } X86EMU_memFuncs;
19788+ u8(X86APIP rdb) (u32 addr);
19789+ u16(X86APIP rdw) (u32 addr);
19790+ u32(X86APIP rdl) (u32 addr);
19791+ void (X86APIP wrb) (u32 addr, u8 val);
19792+ void (X86APIP wrw) (u32 addr, u16 val);
19793+ void (X86APIP wrl) (u32 addr, u32 val);
19794+} X86EMU_memFuncs;
19795
19796 /****************************************************************************
19797 Here are the default memory read and write
19798@@ -132,29 +132,29 @@ extern void X86API wrw(u32 addr, u16 val);
19799 extern void X86API wrl(u32 addr, u32 val);
19800
19801 #ifdef END_PACK
19802-# pragma END_PACK
19803+#pragma END_PACK
19804 #endif
19805
19806 /*--------------------- type definitions -----------------------------------*/
19807
19808-typedef void (X86APIP X86EMU_intrFuncs)(int num);
19809+typedef void (X86APIP X86EMU_intrFuncs) (int num);
19810 extern X86EMU_intrFuncs _X86EMU_intrTab[256];
19811
19812 /*-------------------------- Function Prototypes --------------------------*/
19813
19814 #ifdef __cplusplus
19815-extern "C" { /* Use "C" linkage when in C++ mode */
19816+extern "C" { /* Use "C" linkage when in C++ mode */
19817 #endif
19818
19819-void X86EMU_setupMemFuncs(X86EMU_memFuncs *funcs);
19820-void X86EMU_setupPioFuncs(X86EMU_pioFuncs *funcs);
19821-void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[]);
19822-void X86EMU_prepareForInt(int num);
19823+ void X86EMU_setupMemFuncs(X86EMU_memFuncs * funcs);
19824+ void X86EMU_setupPioFuncs(X86EMU_pioFuncs * funcs);
19825+ void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[]);
19826+ void X86EMU_prepareForInt(int num);
19827
19828 /* decode.c */
19829
19830-void X86EMU_exec(void);
19831-void X86EMU_halt_sys(void);
19832+ void X86EMU_exec(void);
19833+ void X86EMU_halt_sys(void);
19834
19835 #ifdef DEBUG
19836 #define HALT_SYS() \
19837@@ -166,8 +166,8 @@ void X86EMU_halt_sys(void);
19838
19839 /* Debug options */
19840
19841-#define DEBUG_DECODE_F 0x000001 /* print decoded instruction */
19842-#define DEBUG_TRACE_F 0x000002 /* dump regs before/after execution */
19843+#define DEBUG_DECODE_F 0x000001 /* print decoded instruction */
19844+#define DEBUG_TRACE_F 0x000002 /* dump regs before/after execution */
19845 #define DEBUG_STEP_F 0x000004
19846 #define DEBUG_DISASSEMBLE_F 0x000008
19847 #define DEBUG_BREAK_F 0x000010
19848@@ -175,24 +175,23 @@ void X86EMU_halt_sys(void);
19849 #define DEBUG_SAVE_IP_CS_F 0x000040
19850 #define DEBUG_FS_F 0x000080
19851 #define DEBUG_PROC_F 0x000100
19852-#define DEBUG_SYSINT_F 0x000200 /* bios system interrupts. */
19853+#define DEBUG_SYSINT_F 0x000200 /* bios system interrupts. */
19854 #define DEBUG_TRACECALL_F 0x000400
19855 #define DEBUG_INSTRUMENT_F 0x000800
19856-#define DEBUG_MEM_TRACE_F 0x001000
19857-#define DEBUG_IO_TRACE_F 0x002000
19858+#define DEBUG_MEM_TRACE_F 0x001000
19859+#define DEBUG_IO_TRACE_F 0x002000
19860 #define DEBUG_TRACECALL_REGS_F 0x004000
19861-#define DEBUG_DECODE_NOPRINT_F 0x008000
19862+#define DEBUG_DECODE_NOPRINT_F 0x008000
19863 #define DEBUG_EXIT 0x010000
19864 #define DEBUG_SYS_F (DEBUG_SVC_F|DEBUG_FS_F|DEBUG_PROC_F)
19865
19866-void X86EMU_trace_regs(void);
19867-void X86EMU_trace_xregs(void);
19868-void X86EMU_dump_memory(u16 seg, u16 off, u32 amt);
19869-int X86EMU_trace_on(void);
19870-int X86EMU_trace_off(void);
19871+ void X86EMU_trace_regs(void);
19872+ void X86EMU_trace_xregs(void);
19873+ void X86EMU_dump_memory(u16 seg, u16 off, u32 amt);
19874+ int X86EMU_trace_on(void);
19875+ int X86EMU_trace_off(void);
19876
19877 #ifdef __cplusplus
19878-} /* End of "C" linkage for C++ */
19879+} /* End of "C" linkage for C++ */
19880 #endif
19881-
19882-#endif /* __X86EMU_X86EMU_H */
19883+#endif /* __X86EMU_X86EMU_H */
19884diff --git a/libs/x86emu/x86emu/debug.h b/libs/x86emu/x86emu/debug.h
19885index 47aacb6..385b804 100644
19886--- a/libs/x86emu/x86emu/debug.h
19887+++ b/libs/x86emu/x86emu/debug.h
19888@@ -45,65 +45,65 @@
19889
19890 #define CHECK_IP_FETCH_F 0x1
19891 #define CHECK_SP_ACCESS_F 0x2
19892-#define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */
19893-#define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset*/
19894+#define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */
19895+#define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset */
19896
19897 #ifdef DEBUG
19898-# define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F)
19899-# define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F)
19900-# define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F)
19901-# define CHECK_DATA_ACCESS() (M.x86.check & CHECK_DATA_ACCESS_F)
19902+#define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F)
19903+#define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F)
19904+#define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F)
19905+#define CHECK_DATA_ACCESS() (M.x86.check & CHECK_DATA_ACCESS_F)
19906 #else
19907-# define CHECK_IP_FETCH()
19908-# define CHECK_SP_ACCESS()
19909-# define CHECK_MEM_ACCESS()
19910-# define CHECK_DATA_ACCESS()
19911+#define CHECK_IP_FETCH()
19912+#define CHECK_SP_ACCESS()
19913+#define CHECK_MEM_ACCESS()
19914+#define CHECK_DATA_ACCESS()
19915 #endif
19916
19917 #ifdef DEBUG
19918-# define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F)
19919-# define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F)
19920-# define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F)
19921-# define DEBUG_STEP() (M.x86.debug & DEBUG_STEP_F)
19922-# define DEBUG_DISASSEMBLE() (M.x86.debug & DEBUG_DISASSEMBLE_F)
19923-# define DEBUG_BREAK() (M.x86.debug & DEBUG_BREAK_F)
19924-# define DEBUG_SVC() (M.x86.debug & DEBUG_SVC_F)
19925-# define DEBUG_SAVE_IP_CS() (M.x86.debug & DEBUG_SAVE_IP_CS_F)
19926-
19927-# define DEBUG_FS() (M.x86.debug & DEBUG_FS_F)
19928-# define DEBUG_PROC() (M.x86.debug & DEBUG_PROC_F)
19929-# define DEBUG_SYSINT() (M.x86.debug & DEBUG_SYSINT_F)
19930-# define DEBUG_TRACECALL() (M.x86.debug & DEBUG_TRACECALL_F)
19931-# define DEBUG_TRACECALLREGS() (M.x86.debug & DEBUG_TRACECALL_REGS_F)
19932-# define DEBUG_SYS() (M.x86.debug & DEBUG_SYS_F)
19933-# define DEBUG_MEM_TRACE() (M.x86.debug & DEBUG_MEM_TRACE_F)
19934-# define DEBUG_IO_TRACE() (M.x86.debug & DEBUG_IO_TRACE_F)
19935-# define DEBUG_DECODE_NOPRINT() (M.x86.debug & DEBUG_DECODE_NOPRINT_F)
19936+#define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F)
19937+#define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F)
19938+#define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F)
19939+#define DEBUG_STEP() (M.x86.debug & DEBUG_STEP_F)
19940+#define DEBUG_DISASSEMBLE() (M.x86.debug & DEBUG_DISASSEMBLE_F)
19941+#define DEBUG_BREAK() (M.x86.debug & DEBUG_BREAK_F)
19942+#define DEBUG_SVC() (M.x86.debug & DEBUG_SVC_F)
19943+#define DEBUG_SAVE_IP_CS() (M.x86.debug & DEBUG_SAVE_IP_CS_F)
19944+
19945+#define DEBUG_FS() (M.x86.debug & DEBUG_FS_F)
19946+#define DEBUG_PROC() (M.x86.debug & DEBUG_PROC_F)
19947+#define DEBUG_SYSINT() (M.x86.debug & DEBUG_SYSINT_F)
19948+#define DEBUG_TRACECALL() (M.x86.debug & DEBUG_TRACECALL_F)
19949+#define DEBUG_TRACECALLREGS() (M.x86.debug & DEBUG_TRACECALL_REGS_F)
19950+#define DEBUG_SYS() (M.x86.debug & DEBUG_SYS_F)
19951+#define DEBUG_MEM_TRACE() (M.x86.debug & DEBUG_MEM_TRACE_F)
19952+#define DEBUG_IO_TRACE() (M.x86.debug & DEBUG_IO_TRACE_F)
19953+#define DEBUG_DECODE_NOPRINT() (M.x86.debug & DEBUG_DECODE_NOPRINT_F)
19954 #else
19955-# define DEBUG_INSTRUMENT() 0
19956-# define DEBUG_DECODE() 0
19957-# define DEBUG_TRACE() 0
19958-# define DEBUG_STEP() 0
19959-# define DEBUG_DISASSEMBLE() 0
19960-# define DEBUG_BREAK() 0
19961-# define DEBUG_SVC() 0
19962-# define DEBUG_SAVE_IP_CS() 0
19963-# define DEBUG_FS() 0
19964-# define DEBUG_PROC() 0
19965-# define DEBUG_SYSINT() 0
19966-# define DEBUG_TRACECALL() 0
19967-# define DEBUG_TRACECALLREGS() 0
19968-# define DEBUG_SYS() 0
19969-# define DEBUG_MEM_TRACE() 0
19970-# define DEBUG_IO_TRACE() 0
19971-# define DEBUG_DECODE_NOPRINT() 0
19972+#define DEBUG_INSTRUMENT() 0
19973+#define DEBUG_DECODE() 0
19974+#define DEBUG_TRACE() 0
19975+#define DEBUG_STEP() 0
19976+#define DEBUG_DISASSEMBLE() 0
19977+#define DEBUG_BREAK() 0
19978+#define DEBUG_SVC() 0
19979+#define DEBUG_SAVE_IP_CS() 0
19980+#define DEBUG_FS() 0
19981+#define DEBUG_PROC() 0
19982+#define DEBUG_SYSINT() 0
19983+#define DEBUG_TRACECALL() 0
19984+#define DEBUG_TRACECALLREGS() 0
19985+#define DEBUG_SYS() 0
19986+#define DEBUG_MEM_TRACE() 0
19987+#define DEBUG_IO_TRACE() 0
19988+#define DEBUG_DECODE_NOPRINT() 0
19989 #endif
19990
19991 #ifdef DEBUG
19992
19993-# define DECODE_PRINTF(x) if (DEBUG_DECODE()) \
19994+#define DECODE_PRINTF(x) if (DEBUG_DECODE()) \
19995 x86emu_decode_printf(x)
19996-# define DECODE_PRINTF2(x,y) if (DEBUG_DECODE()) \
19997+#define DECODE_PRINTF2(x,y) if (DEBUG_DECODE()) \
19998 x86emu_decode_printf2(x,y)
19999
20000 /*
20001@@ -123,10 +123,10 @@
20002 M.x86.saved_ip = y; \
20003 }
20004 #else
20005-# define INC_DECODED_INST_LEN(x)
20006-# define DECODE_PRINTF(x)
20007-# define DECODE_PRINTF2(x,y)
20008-# define SAVE_IP_CS(x,y)
20009+#define INC_DECODED_INST_LEN(x)
20010+#define DECODE_PRINTF(x)
20011+#define DECODE_PRINTF2(x,y)
20012+#define SAVE_IP_CS(x,y)
20013 #endif
20014
20015 #ifdef DEBUG
20016@@ -137,13 +137,13 @@
20017 } \
20018 if (DEBUG_TRACE() || DEBUG_DECODE()) X86EMU_trace_regs()
20019 #else
20020-# define TRACE_REGS()
20021+#define TRACE_REGS()
20022 #endif
20023
20024 #ifdef DEBUG
20025-# define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step()
20026+#define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step()
20027 #else
20028-# define SINGLE_STEP()
20029+#define SINGLE_STEP()
20030 #endif
20031
20032 #define TRACE_AND_STEP() \
20033@@ -151,29 +151,29 @@
20034 SINGLE_STEP()
20035
20036 #ifdef DEBUG
20037-# define START_OF_INSTR()
20038-# define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr();
20039-# define END_OF_INSTR_NO_TRACE() x86emu_end_instr();
20040+#define START_OF_INSTR()
20041+#define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr();
20042+#define END_OF_INSTR_NO_TRACE() x86emu_end_instr();
20043 #else
20044-# define START_OF_INSTR()
20045-# define END_OF_INSTR()
20046-# define END_OF_INSTR_NO_TRACE()
20047+#define START_OF_INSTR()
20048+#define END_OF_INSTR()
20049+#define END_OF_INSTR_NO_TRACE()
20050 #endif
20051
20052 #ifdef DEBUG
20053-# define CALL_TRACE(u,v,w,x,s) \
20054+#define CALL_TRACE(u,v,w,x,s) \
20055 if (DEBUG_TRACECALLREGS()) \
20056 x86emu_dump_regs(); \
20057 if (DEBUG_TRACECALL()) \
20058 printk("%04x:%04x: CALL %s%04x:%04x\n", u , v, s, w, x);
20059-# define RETURN_TRACE(n,u,v) \
20060+#define RETURN_TRACE(n,u,v) \
20061 if (DEBUG_TRACECALLREGS()) \
20062 x86emu_dump_regs(); \
20063 if (DEBUG_TRACECALL()) \
20064 printk("%04x:%04x: %s\n",u,v,n);
20065 #else
20066-# define CALL_TRACE(u,v,w,x,s)
20067-# define RETURN_TRACE(n,u,v)
20068+#define CALL_TRACE(u,v,w,x,s)
20069+#define RETURN_TRACE(n,u,v)
20070 #endif
20071
20072 #ifdef DEBUG
20073@@ -185,26 +185,25 @@
20074 /*-------------------------- Function Prototypes --------------------------*/
20075
20076 #ifdef __cplusplus
20077-extern "C" { /* Use "C" linkage when in C++ mode */
20078+extern "C" { /* Use "C" linkage when in C++ mode */
20079 #endif
20080
20081-extern void x86emu_inc_decoded_inst_len (int x);
20082-extern void x86emu_decode_printf (char *x);
20083-extern void x86emu_decode_printf2 (char *x, int y);
20084-extern void x86emu_just_disassemble (void);
20085-extern void x86emu_single_step (void);
20086-extern void x86emu_end_instr (void);
20087-extern void x86emu_dump_regs (void);
20088-extern void x86emu_dump_xregs (void);
20089-extern void x86emu_print_int_vect (u16 iv);
20090-extern void x86emu_instrument_instruction (void);
20091-extern void x86emu_check_ip_access (void);
20092-extern void x86emu_check_sp_access (void);
20093-extern void x86emu_check_mem_access (u32 p);
20094-extern void x86emu_check_data_access (uint s, uint o);
20095+ extern void x86emu_inc_decoded_inst_len(int x);
20096+ extern void x86emu_decode_printf(const char *x);
20097+ extern void x86emu_decode_printf2(const char *x, int y);
20098+ extern void x86emu_just_disassemble(void);
20099+ extern void x86emu_single_step(void);
20100+ extern void x86emu_end_instr(void);
20101+ extern void x86emu_dump_regs(void);
20102+ extern void x86emu_dump_xregs(void);
20103+ extern void x86emu_print_int_vect(u16 iv);
20104+ extern void x86emu_instrument_instruction(void);
20105+ extern void x86emu_check_ip_access(void);
20106+ extern void x86emu_check_sp_access(void);
20107+ extern void x86emu_check_mem_access(u32 p);
20108+ extern void x86emu_check_data_access(uint s, uint o);
20109
20110 #ifdef __cplusplus
20111-} /* End of "C" linkage for C++ */
20112+} /* End of "C" linkage for C++ */
20113 #endif
20114-
20115-#endif /* __X86EMU_DEBUG_H */
20116+#endif /* __X86EMU_DEBUG_H */
20117diff --git a/libs/x86emu/x86emu/decode.h b/libs/x86emu/x86emu/decode.h
20118index 61cd4dc..49a1f7b 100644
20119--- a/libs/x86emu/x86emu/decode.h
20120+++ b/libs/x86emu/x86emu/decode.h
20121@@ -52,37 +52,36 @@
20122 /*-------------------------- Function Prototypes --------------------------*/
20123
20124 #ifdef __cplusplus
20125-extern "C" { /* Use "C" linkage when in C++ mode */
20126+extern "C" { /* Use "C" linkage when in C++ mode */
20127 #endif
20128
20129-void x86emu_intr_raise (u8 type);
20130-void fetch_decode_modrm (int *mod,int *regh,int *regl);
20131-u8 fetch_byte_imm (void);
20132-u16 fetch_word_imm (void);
20133-u32 fetch_long_imm (void);
20134-u8 fetch_data_byte (uint offset);
20135-u8 fetch_data_byte_abs (uint segment, uint offset);
20136-u16 fetch_data_word (uint offset);
20137-u16 fetch_data_word_abs (uint segment, uint offset);
20138-u32 fetch_data_long (uint offset);
20139-u32 fetch_data_long_abs (uint segment, uint offset);
20140-void store_data_byte (uint offset, u8 val);
20141-void store_data_byte_abs (uint segment, uint offset, u8 val);
20142-void store_data_word (uint offset, u16 val);
20143-void store_data_word_abs (uint segment, uint offset, u16 val);
20144-void store_data_long (uint offset, u32 val);
20145-void store_data_long_abs (uint segment, uint offset, u32 val);
20146-u8* decode_rm_byte_register(int reg);
20147-u16* decode_rm_word_register(int reg);
20148-u32* decode_rm_long_register(int reg);
20149-u16* decode_rm_seg_register(int reg);
20150-u32 decode_rm00_address(int rm);
20151-u32 decode_rm01_address(int rm);
20152-u32 decode_rm10_address(int rm);
20153-u32 decode_sib_address(int sib, int mod);
20154+ void x86emu_intr_raise(u8 type);
20155+ void fetch_decode_modrm(int *mod, int *regh, int *regl);
20156+ u8 fetch_byte_imm(void);
20157+ u16 fetch_word_imm(void);
20158+ u32 fetch_long_imm(void);
20159+ u8 fetch_data_byte(uint offset);
20160+ u8 fetch_data_byte_abs(uint segment, uint offset);
20161+ u16 fetch_data_word(uint offset);
20162+ u16 fetch_data_word_abs(uint segment, uint offset);
20163+ u32 fetch_data_long(uint offset);
20164+ u32 fetch_data_long_abs(uint segment, uint offset);
20165+ void store_data_byte(uint offset, u8 val);
20166+ void store_data_byte_abs(uint segment, uint offset, u8 val);
20167+ void store_data_word(uint offset, u16 val);
20168+ void store_data_word_abs(uint segment, uint offset, u16 val);
20169+ void store_data_long(uint offset, u32 val);
20170+ void store_data_long_abs(uint segment, uint offset, u32 val);
20171+ u8 *decode_rm_byte_register(int reg);
20172+ u16 *decode_rm_word_register(int reg);
20173+ u32 *decode_rm_long_register(int reg);
20174+ u16 *decode_rm_seg_register(int reg);
20175+ u32 decode_rm00_address(int rm);
20176+ u32 decode_rm01_address(int rm);
20177+ u32 decode_rm10_address(int rm);
20178+ u32 decode_sib_address(int sib, int mod);
20179
20180 #ifdef __cplusplus
20181-} /* End of "C" linkage for C++ */
20182+} /* End of "C" linkage for C++ */
20183 #endif
20184-
20185-#endif /* __X86EMU_DECODE_H */
20186+#endif /* __X86EMU_DECODE_H */
20187diff --git a/libs/x86emu/x86emu/fpu.h b/libs/x86emu/x86emu/fpu.h
20188index 5fb2714..1c11498 100644
20189--- a/libs/x86emu/x86emu/fpu.h
20190+++ b/libs/x86emu/x86emu/fpu.h
20191@@ -40,22 +40,21 @@
20192 #define __X86EMU_FPU_H
20193
20194 #ifdef __cplusplus
20195-extern "C" { /* Use "C" linkage when in C++ mode */
20196+extern "C" { /* Use "C" linkage when in C++ mode */
20197 #endif
20198
20199 /* these have to be defined, whether 8087 support compiled in or not. */
20200
20201-extern void x86emuOp_esc_coprocess_d8 (u8 op1);
20202-extern void x86emuOp_esc_coprocess_d9 (u8 op1);
20203-extern void x86emuOp_esc_coprocess_da (u8 op1);
20204-extern void x86emuOp_esc_coprocess_db (u8 op1);
20205-extern void x86emuOp_esc_coprocess_dc (u8 op1);
20206-extern void x86emuOp_esc_coprocess_dd (u8 op1);
20207-extern void x86emuOp_esc_coprocess_de (u8 op1);
20208-extern void x86emuOp_esc_coprocess_df (u8 op1);
20209+ extern void x86emuOp_esc_coprocess_d8(u8 op1);
20210+ extern void x86emuOp_esc_coprocess_d9(u8 op1);
20211+ extern void x86emuOp_esc_coprocess_da(u8 op1);
20212+ extern void x86emuOp_esc_coprocess_db(u8 op1);
20213+ extern void x86emuOp_esc_coprocess_dc(u8 op1);
20214+ extern void x86emuOp_esc_coprocess_dd(u8 op1);
20215+ extern void x86emuOp_esc_coprocess_de(u8 op1);
20216+ extern void x86emuOp_esc_coprocess_df(u8 op1);
20217
20218 #ifdef __cplusplus
20219-} /* End of "C" linkage for C++ */
20220+} /* End of "C" linkage for C++ */
20221 #endif
20222-
20223-#endif /* __X86EMU_FPU_H */
20224+#endif /* __X86EMU_FPU_H */
20225diff --git a/libs/x86emu/x86emu/fpu_regs.h b/libs/x86emu/x86emu/fpu_regs.h
20226index e59b807..5a780e6 100644
20227--- a/libs/x86emu/x86emu/fpu_regs.h
20228+++ b/libs/x86emu/x86emu/fpu_regs.h
20229@@ -42,23 +42,23 @@
20230 #ifdef X86_FPU_SUPPORT
20231
20232 #ifdef PACK
20233-# pragma PACK
20234+#pragma PACK
20235 #endif
20236
20237 /* Basic 8087 register can hold any of the following values: */
20238
20239 union x86_fpu_reg_u {
20240- s8 tenbytes[10];
20241- double dval;
20242- float fval;
20243- s16 sval;
20244- s32 lval;
20245- };
20246+ s8 tenbytes[10];
20247+ double dval;
20248+ float fval;
20249+ s16 sval;
20250+ s32 lval;
20251+};
20252
20253 struct x86_fpu_reg {
20254- union x86_fpu_reg_u reg;
20255- char tag;
20256- };
20257+ union x86_fpu_reg_u reg;
20258+ char tag;
20259+};
20260
20261 /*
20262 * Since we are not going to worry about the problems of aliasing
20263@@ -83,14 +83,14 @@ struct x86_fpu_reg {
20264 #define X86_FPU_STKTOP 0
20265
20266 struct x86_fpu_registers {
20267- struct x86_fpu_reg x86_fpu_stack[8];
20268- int x86_fpu_flags;
20269- int x86_fpu_config; /* rounding modes, etc. */
20270- short x86_fpu_tos, x86_fpu_bos;
20271- };
20272+ struct x86_fpu_reg x86_fpu_stack[8];
20273+ int x86_fpu_flags;
20274+ int x86_fpu_config; /* rounding modes, etc. */
20275+ short x86_fpu_tos, x86_fpu_bos;
20276+};
20277
20278 #ifdef END_PACK
20279-# pragma END_PACK
20280+#pragma END_PACK
20281 #endif
20282
20283 /*
20284@@ -104,16 +104,16 @@ struct x86_fpu_registers {
20285 * instructions.
20286 */
20287
20288-#endif /* X86_FPU_SUPPORT */
20289+#endif /* X86_FPU_SUPPORT */
20290
20291 #ifdef DEBUG
20292-# define DECODE_PRINTINSTR32(t,mod,rh,rl) \
20293+#define DECODE_PRINTINSTR32(t,mod,rh,rl) \
20294 DECODE_PRINTF(t[(mod<<3)+(rh)]);
20295-# define DECODE_PRINTINSTR256(t,mod,rh,rl) \
20296+#define DECODE_PRINTINSTR256(t,mod,rh,rl) \
20297 DECODE_PRINTF(t[(mod<<6)+(rh<<3)+(rl)]);
20298 #else
20299-# define DECODE_PRINTINSTR32(t,mod,rh,rl)
20300-# define DECODE_PRINTINSTR256(t,mod,rh,rl)
20301+#define DECODE_PRINTINSTR32(t,mod,rh,rl)
20302+#define DECODE_PRINTINSTR256(t,mod,rh,rl)
20303 #endif
20304
20305-#endif /* __X86EMU_FPU_REGS_H */
20306+#endif /* __X86EMU_FPU_REGS_H */
20307diff --git a/libs/x86emu/x86emu/ops.h b/libs/x86emu/x86emu/ops.h
20308index 65ea676..1bc07a4 100644
20309--- a/libs/x86emu/x86emu/ops.h
20310+++ b/libs/x86emu/x86emu/ops.h
20311@@ -39,7 +39,7 @@
20312 #ifndef __X86EMU_OPS_H
20313 #define __X86EMU_OPS_H
20314
20315-extern void (*x86emu_optab[0x100])(u8 op1);
20316-extern void (*x86emu_optab2[0x100])(u8 op2);
20317+extern void (*x86emu_optab[0x100]) (u8 op1);
20318+extern void (*x86emu_optab2[0x100]) (u8 op2);
20319
20320-#endif /* __X86EMU_OPS_H */
20321+#endif /* __X86EMU_OPS_H */
20322diff --git a/libs/x86emu/x86emu/prim_asm.h b/libs/x86emu/x86emu/prim_asm.h
20323index e023cf8..aca132b 100644
20324--- a/libs/x86emu/x86emu/prim_asm.h
20325+++ b/libs/x86emu/x86emu/prim_asm.h
20326@@ -49,14 +49,16 @@
20327 #define __HAVE_INLINE_ASSEMBLER__
20328 #endif
20329
20330-u32 get_flags_asm(void);
20331+u32 get_flags_asm(void);
20332+
20333 #pragma aux get_flags_asm = \
20334 "pushf" \
20335 "pop eax" \
20336 value [eax] \
20337 modify exact [eax];
20338
20339-u16 aaa_word_asm(u32 *flags,u16 d);
20340+u16 aaa_word_asm(u32 * flags, u16 d);
20341+
20342 #pragma aux aaa_word_asm = \
20343 "push [edi]" \
20344 "popf" \
20345@@ -67,7 +69,8 @@ u16 aaa_word_asm(u32 *flags,u16 d);
20346 value [ax] \
20347 modify exact [ax];
20348
20349-u16 aas_word_asm(u32 *flags,u16 d);
20350+u16 aas_word_asm(u32 * flags, u16 d);
20351+
20352 #pragma aux aas_word_asm = \
20353 "push [edi]" \
20354 "popf" \
20355@@ -78,7 +81,8 @@ u16 aas_word_asm(u32 *flags,u16 d);
20356 value [ax] \
20357 modify exact [ax];
20358
20359-u16 aad_word_asm(u32 *flags,u16 d);
20360+u16 aad_word_asm(u32 * flags, u16 d);
20361+
20362 #pragma aux aad_word_asm = \
20363 "push [edi]" \
20364 "popf" \
20365@@ -89,7 +93,8 @@ u16 aad_word_asm(u32 *flags,u16 d);
20366 value [ax] \
20367 modify exact [ax];
20368
20369-u16 aam_word_asm(u32 *flags,u8 d);
20370+u16 aam_word_asm(u32 * flags, u8 d);
20371+
20372 #pragma aux aam_word_asm = \
20373 "push [edi]" \
20374 "popf" \
20375@@ -100,7 +105,8 @@ u16 aam_word_asm(u32 *flags,u8 d);
20376 value [ax] \
20377 modify exact [ax];
20378
20379-u8 adc_byte_asm(u32 *flags,u8 d, u8 s);
20380+u8 adc_byte_asm(u32 * flags, u8 d, u8 s);
20381+
20382 #pragma aux adc_byte_asm = \
20383 "push [edi]" \
20384 "popf" \
20385@@ -111,7 +117,8 @@ u8 adc_byte_asm(u32 *flags,u8 d, u8 s);
20386 value [al] \
20387 modify exact [al bl];
20388
20389-u16 adc_word_asm(u32 *flags,u16 d, u16 s);
20390+u16 adc_word_asm(u32 * flags, u16 d, u16 s);
20391+
20392 #pragma aux adc_word_asm = \
20393 "push [edi]" \
20394 "popf" \
20395@@ -122,7 +129,8 @@ u16 adc_word_asm(u32 *flags,u16 d, u16 s);
20396 value [ax] \
20397 modify exact [ax bx];
20398
20399-u32 adc_long_asm(u32 *flags,u32 d, u32 s);
20400+u32 adc_long_asm(u32 * flags, u32 d, u32 s);
20401+
20402 #pragma aux adc_long_asm = \
20403 "push [edi]" \
20404 "popf" \
20405@@ -133,7 +141,8 @@ u32 adc_long_asm(u32 *flags,u32 d, u32 s);
20406 value [eax] \
20407 modify exact [eax ebx];
20408
20409-u8 add_byte_asm(u32 *flags,u8 d, u8 s);
20410+u8 add_byte_asm(u32 * flags, u8 d, u8 s);
20411+
20412 #pragma aux add_byte_asm = \
20413 "push [edi]" \
20414 "popf" \
20415@@ -144,7 +153,8 @@ u8 add_byte_asm(u32 *flags,u8 d, u8 s);
20416 value [al] \
20417 modify exact [al bl];
20418
20419-u16 add_word_asm(u32 *flags,u16 d, u16 s);
20420+u16 add_word_asm(u32 * flags, u16 d, u16 s);
20421+
20422 #pragma aux add_word_asm = \
20423 "push [edi]" \
20424 "popf" \
20425@@ -155,7 +165,8 @@ u16 add_word_asm(u32 *flags,u16 d, u16 s);
20426 value [ax] \
20427 modify exact [ax bx];
20428
20429-u32 add_long_asm(u32 *flags,u32 d, u32 s);
20430+u32 add_long_asm(u32 * flags, u32 d, u32 s);
20431+
20432 #pragma aux add_long_asm = \
20433 "push [edi]" \
20434 "popf" \
20435@@ -166,7 +177,8 @@ u32 add_long_asm(u32 *flags,u32 d, u32 s);
20436 value [eax] \
20437 modify exact [eax ebx];
20438
20439-u8 and_byte_asm(u32 *flags,u8 d, u8 s);
20440+u8 and_byte_asm(u32 * flags, u8 d, u8 s);
20441+
20442 #pragma aux and_byte_asm = \
20443 "push [edi]" \
20444 "popf" \
20445@@ -177,7 +189,8 @@ u8 and_byte_asm(u32 *flags,u8 d, u8 s);
20446 value [al] \
20447 modify exact [al bl];
20448
20449-u16 and_word_asm(u32 *flags,u16 d, u16 s);
20450+u16 and_word_asm(u32 * flags, u16 d, u16 s);
20451+
20452 #pragma aux and_word_asm = \
20453 "push [edi]" \
20454 "popf" \
20455@@ -188,7 +201,8 @@ u16 and_word_asm(u32 *flags,u16 d, u16 s);
20456 value [ax] \
20457 modify exact [ax bx];
20458
20459-u32 and_long_asm(u32 *flags,u32 d, u32 s);
20460+u32 and_long_asm(u32 * flags, u32 d, u32 s);
20461+
20462 #pragma aux and_long_asm = \
20463 "push [edi]" \
20464 "popf" \
20465@@ -199,7 +213,8 @@ u32 and_long_asm(u32 *flags,u32 d, u32 s);
20466 value [eax] \
20467 modify exact [eax ebx];
20468
20469-u8 cmp_byte_asm(u32 *flags,u8 d, u8 s);
20470+u8 cmp_byte_asm(u32 * flags, u8 d, u8 s);
20471+
20472 #pragma aux cmp_byte_asm = \
20473 "push [edi]" \
20474 "popf" \
20475@@ -210,7 +225,8 @@ u8 cmp_byte_asm(u32 *flags,u8 d, u8 s);
20476 value [al] \
20477 modify exact [al bl];
20478
20479-u16 cmp_word_asm(u32 *flags,u16 d, u16 s);
20480+u16 cmp_word_asm(u32 * flags, u16 d, u16 s);
20481+
20482 #pragma aux cmp_word_asm = \
20483 "push [edi]" \
20484 "popf" \
20485@@ -221,7 +237,8 @@ u16 cmp_word_asm(u32 *flags,u16 d, u16 s);
20486 value [ax] \
20487 modify exact [ax bx];
20488
20489-u32 cmp_long_asm(u32 *flags,u32 d, u32 s);
20490+u32 cmp_long_asm(u32 * flags, u32 d, u32 s);
20491+
20492 #pragma aux cmp_long_asm = \
20493 "push [edi]" \
20494 "popf" \
20495@@ -232,7 +249,8 @@ u32 cmp_long_asm(u32 *flags,u32 d, u32 s);
20496 value [eax] \
20497 modify exact [eax ebx];
20498
20499-u8 daa_byte_asm(u32 *flags,u8 d);
20500+u8 daa_byte_asm(u32 * flags, u8 d);
20501+
20502 #pragma aux daa_byte_asm = \
20503 "push [edi]" \
20504 "popf" \
20505@@ -243,7 +261,8 @@ u8 daa_byte_asm(u32 *flags,u8 d);
20506 value [al] \
20507 modify exact [al];
20508
20509-u8 das_byte_asm(u32 *flags,u8 d);
20510+u8 das_byte_asm(u32 * flags, u8 d);
20511+
20512 #pragma aux das_byte_asm = \
20513 "push [edi]" \
20514 "popf" \
20515@@ -254,7 +273,8 @@ u8 das_byte_asm(u32 *flags,u8 d);
20516 value [al] \
20517 modify exact [al];
20518
20519-u8 dec_byte_asm(u32 *flags,u8 d);
20520+u8 dec_byte_asm(u32 * flags, u8 d);
20521+
20522 #pragma aux dec_byte_asm = \
20523 "push [edi]" \
20524 "popf" \
20525@@ -265,7 +285,8 @@ u8 dec_byte_asm(u32 *flags,u8 d);
20526 value [al] \
20527 modify exact [al];
20528
20529-u16 dec_word_asm(u32 *flags,u16 d);
20530+u16 dec_word_asm(u32 * flags, u16 d);
20531+
20532 #pragma aux dec_word_asm = \
20533 "push [edi]" \
20534 "popf" \
20535@@ -276,7 +297,8 @@ u16 dec_word_asm(u32 *flags,u16 d);
20536 value [ax] \
20537 modify exact [ax];
20538
20539-u32 dec_long_asm(u32 *flags,u32 d);
20540+u32 dec_long_asm(u32 * flags, u32 d);
20541+
20542 #pragma aux dec_long_asm = \
20543 "push [edi]" \
20544 "popf" \
20545@@ -287,7 +309,8 @@ u32 dec_long_asm(u32 *flags,u32 d);
20546 value [eax] \
20547 modify exact [eax];
20548
20549-u8 inc_byte_asm(u32 *flags,u8 d);
20550+u8 inc_byte_asm(u32 * flags, u8 d);
20551+
20552 #pragma aux inc_byte_asm = \
20553 "push [edi]" \
20554 "popf" \
20555@@ -298,7 +321,8 @@ u8 inc_byte_asm(u32 *flags,u8 d);
20556 value [al] \
20557 modify exact [al];
20558
20559-u16 inc_word_asm(u32 *flags,u16 d);
20560+u16 inc_word_asm(u32 * flags, u16 d);
20561+
20562 #pragma aux inc_word_asm = \
20563 "push [edi]" \
20564 "popf" \
20565@@ -309,7 +333,8 @@ u16 inc_word_asm(u32 *flags,u16 d);
20566 value [ax] \
20567 modify exact [ax];
20568
20569-u32 inc_long_asm(u32 *flags,u32 d);
20570+u32 inc_long_asm(u32 * flags, u32 d);
20571+
20572 #pragma aux inc_long_asm = \
20573 "push [edi]" \
20574 "popf" \
20575@@ -320,7 +345,8 @@ u32 inc_long_asm(u32 *flags,u32 d);
20576 value [eax] \
20577 modify exact [eax];
20578
20579-u8 or_byte_asm(u32 *flags,u8 d, u8 s);
20580+u8 or_byte_asm(u32 * flags, u8 d, u8 s);
20581+
20582 #pragma aux or_byte_asm = \
20583 "push [edi]" \
20584 "popf" \
20585@@ -331,7 +357,8 @@ u8 or_byte_asm(u32 *flags,u8 d, u8 s);
20586 value [al] \
20587 modify exact [al bl];
20588
20589-u16 or_word_asm(u32 *flags,u16 d, u16 s);
20590+u16 or_word_asm(u32 * flags, u16 d, u16 s);
20591+
20592 #pragma aux or_word_asm = \
20593 "push [edi]" \
20594 "popf" \
20595@@ -342,7 +369,8 @@ u16 or_word_asm(u32 *flags,u16 d, u16 s);
20596 value [ax] \
20597 modify exact [ax bx];
20598
20599-u32 or_long_asm(u32 *flags,u32 d, u32 s);
20600+u32 or_long_asm(u32 * flags, u32 d, u32 s);
20601+
20602 #pragma aux or_long_asm = \
20603 "push [edi]" \
20604 "popf" \
20605@@ -353,7 +381,8 @@ u32 or_long_asm(u32 *flags,u32 d, u32 s);
20606 value [eax] \
20607 modify exact [eax ebx];
20608
20609-u8 neg_byte_asm(u32 *flags,u8 d);
20610+u8 neg_byte_asm(u32 * flags, u8 d);
20611+
20612 #pragma aux neg_byte_asm = \
20613 "push [edi]" \
20614 "popf" \
20615@@ -364,7 +393,8 @@ u8 neg_byte_asm(u32 *flags,u8 d);
20616 value [al] \
20617 modify exact [al];
20618
20619-u16 neg_word_asm(u32 *flags,u16 d);
20620+u16 neg_word_asm(u32 * flags, u16 d);
20621+
20622 #pragma aux neg_word_asm = \
20623 "push [edi]" \
20624 "popf" \
20625@@ -375,7 +405,8 @@ u16 neg_word_asm(u32 *flags,u16 d);
20626 value [ax] \
20627 modify exact [ax];
20628
20629-u32 neg_long_asm(u32 *flags,u32 d);
20630+u32 neg_long_asm(u32 * flags, u32 d);
20631+
20632 #pragma aux neg_long_asm = \
20633 "push [edi]" \
20634 "popf" \
20635@@ -386,7 +417,8 @@ u32 neg_long_asm(u32 *flags,u32 d);
20636 value [eax] \
20637 modify exact [eax];
20638
20639-u8 not_byte_asm(u32 *flags,u8 d);
20640+u8 not_byte_asm(u32 * flags, u8 d);
20641+
20642 #pragma aux not_byte_asm = \
20643 "push [edi]" \
20644 "popf" \
20645@@ -397,7 +429,8 @@ u8 not_byte_asm(u32 *flags,u8 d);
20646 value [al] \
20647 modify exact [al];
20648
20649-u16 not_word_asm(u32 *flags,u16 d);
20650+u16 not_word_asm(u32 * flags, u16 d);
20651+
20652 #pragma aux not_word_asm = \
20653 "push [edi]" \
20654 "popf" \
20655@@ -408,7 +441,8 @@ u16 not_word_asm(u32 *flags,u16 d);
20656 value [ax] \
20657 modify exact [ax];
20658
20659-u32 not_long_asm(u32 *flags,u32 d);
20660+u32 not_long_asm(u32 * flags, u32 d);
20661+
20662 #pragma aux not_long_asm = \
20663 "push [edi]" \
20664 "popf" \
20665@@ -419,7 +453,8 @@ u32 not_long_asm(u32 *flags,u32 d);
20666 value [eax] \
20667 modify exact [eax];
20668
20669-u8 rcl_byte_asm(u32 *flags,u8 d, u8 s);
20670+u8 rcl_byte_asm(u32 * flags, u8 d, u8 s);
20671+
20672 #pragma aux rcl_byte_asm = \
20673 "push [edi]" \
20674 "popf" \
20675@@ -430,7 +465,8 @@ u8 rcl_byte_asm(u32 *flags,u8 d, u8 s);
20676 value [al] \
20677 modify exact [al cl];
20678
20679-u16 rcl_word_asm(u32 *flags,u16 d, u8 s);
20680+u16 rcl_word_asm(u32 * flags, u16 d, u8 s);
20681+
20682 #pragma aux rcl_word_asm = \
20683 "push [edi]" \
20684 "popf" \
20685@@ -441,7 +477,8 @@ u16 rcl_word_asm(u32 *flags,u16 d, u8 s);
20686 value [ax] \
20687 modify exact [ax cl];
20688
20689-u32 rcl_long_asm(u32 *flags,u32 d, u8 s);
20690+u32 rcl_long_asm(u32 * flags, u32 d, u8 s);
20691+
20692 #pragma aux rcl_long_asm = \
20693 "push [edi]" \
20694 "popf" \
20695@@ -452,7 +489,8 @@ u32 rcl_long_asm(u32 *flags,u32 d, u8 s);
20696 value [eax] \
20697 modify exact [eax cl];
20698
20699-u8 rcr_byte_asm(u32 *flags,u8 d, u8 s);
20700+u8 rcr_byte_asm(u32 * flags, u8 d, u8 s);
20701+
20702 #pragma aux rcr_byte_asm = \
20703 "push [edi]" \
20704 "popf" \
20705@@ -463,7 +501,8 @@ u8 rcr_byte_asm(u32 *flags,u8 d, u8 s);
20706 value [al] \
20707 modify exact [al cl];
20708
20709-u16 rcr_word_asm(u32 *flags,u16 d, u8 s);
20710+u16 rcr_word_asm(u32 * flags, u16 d, u8 s);
20711+
20712 #pragma aux rcr_word_asm = \
20713 "push [edi]" \
20714 "popf" \
20715@@ -474,7 +513,8 @@ u16 rcr_word_asm(u32 *flags,u16 d, u8 s);
20716 value [ax] \
20717 modify exact [ax cl];
20718
20719-u32 rcr_long_asm(u32 *flags,u32 d, u8 s);
20720+u32 rcr_long_asm(u32 * flags, u32 d, u8 s);
20721+
20722 #pragma aux rcr_long_asm = \
20723 "push [edi]" \
20724 "popf" \
20725@@ -485,7 +525,8 @@ u32 rcr_long_asm(u32 *flags,u32 d, u8 s);
20726 value [eax] \
20727 modify exact [eax cl];
20728
20729-u8 rol_byte_asm(u32 *flags,u8 d, u8 s);
20730+u8 rol_byte_asm(u32 * flags, u8 d, u8 s);
20731+
20732 #pragma aux rol_byte_asm = \
20733 "push [edi]" \
20734 "popf" \
20735@@ -496,7 +537,8 @@ u8 rol_byte_asm(u32 *flags,u8 d, u8 s);
20736 value [al] \
20737 modify exact [al cl];
20738
20739-u16 rol_word_asm(u32 *flags,u16 d, u8 s);
20740+u16 rol_word_asm(u32 * flags, u16 d, u8 s);
20741+
20742 #pragma aux rol_word_asm = \
20743 "push [edi]" \
20744 "popf" \
20745@@ -507,7 +549,8 @@ u16 rol_word_asm(u32 *flags,u16 d, u8 s);
20746 value [ax] \
20747 modify exact [ax cl];
20748
20749-u32 rol_long_asm(u32 *flags,u32 d, u8 s);
20750+u32 rol_long_asm(u32 * flags, u32 d, u8 s);
20751+
20752 #pragma aux rol_long_asm = \
20753 "push [edi]" \
20754 "popf" \
20755@@ -518,7 +561,8 @@ u32 rol_long_asm(u32 *flags,u32 d, u8 s);
20756 value [eax] \
20757 modify exact [eax cl];
20758
20759-u8 ror_byte_asm(u32 *flags,u8 d, u8 s);
20760+u8 ror_byte_asm(u32 * flags, u8 d, u8 s);
20761+
20762 #pragma aux ror_byte_asm = \
20763 "push [edi]" \
20764 "popf" \
20765@@ -529,7 +573,8 @@ u8 ror_byte_asm(u32 *flags,u8 d, u8 s);
20766 value [al] \
20767 modify exact [al cl];
20768
20769-u16 ror_word_asm(u32 *flags,u16 d, u8 s);
20770+u16 ror_word_asm(u32 * flags, u16 d, u8 s);
20771+
20772 #pragma aux ror_word_asm = \
20773 "push [edi]" \
20774 "popf" \
20775@@ -540,7 +585,8 @@ u16 ror_word_asm(u32 *flags,u16 d, u8 s);
20776 value [ax] \
20777 modify exact [ax cl];
20778
20779-u32 ror_long_asm(u32 *flags,u32 d, u8 s);
20780+u32 ror_long_asm(u32 * flags, u32 d, u8 s);
20781+
20782 #pragma aux ror_long_asm = \
20783 "push [edi]" \
20784 "popf" \
20785@@ -551,7 +597,8 @@ u32 ror_long_asm(u32 *flags,u32 d, u8 s);
20786 value [eax] \
20787 modify exact [eax cl];
20788
20789-u8 shl_byte_asm(u32 *flags,u8 d, u8 s);
20790+u8 shl_byte_asm(u32 * flags, u8 d, u8 s);
20791+
20792 #pragma aux shl_byte_asm = \
20793 "push [edi]" \
20794 "popf" \
20795@@ -562,7 +609,8 @@ u8 shl_byte_asm(u32 *flags,u8 d, u8 s);
20796 value [al] \
20797 modify exact [al cl];
20798
20799-u16 shl_word_asm(u32 *flags,u16 d, u8 s);
20800+u16 shl_word_asm(u32 * flags, u16 d, u8 s);
20801+
20802 #pragma aux shl_word_asm = \
20803 "push [edi]" \
20804 "popf" \
20805@@ -573,7 +621,8 @@ u16 shl_word_asm(u32 *flags,u16 d, u8 s);
20806 value [ax] \
20807 modify exact [ax cl];
20808
20809-u32 shl_long_asm(u32 *flags,u32 d, u8 s);
20810+u32 shl_long_asm(u32 * flags, u32 d, u8 s);
20811+
20812 #pragma aux shl_long_asm = \
20813 "push [edi]" \
20814 "popf" \
20815@@ -584,7 +633,8 @@ u32 shl_long_asm(u32 *flags,u32 d, u8 s);
20816 value [eax] \
20817 modify exact [eax cl];
20818
20819-u8 shr_byte_asm(u32 *flags,u8 d, u8 s);
20820+u8 shr_byte_asm(u32 * flags, u8 d, u8 s);
20821+
20822 #pragma aux shr_byte_asm = \
20823 "push [edi]" \
20824 "popf" \
20825@@ -595,7 +645,8 @@ u8 shr_byte_asm(u32 *flags,u8 d, u8 s);
20826 value [al] \
20827 modify exact [al cl];
20828
20829-u16 shr_word_asm(u32 *flags,u16 d, u8 s);
20830+u16 shr_word_asm(u32 * flags, u16 d, u8 s);
20831+
20832 #pragma aux shr_word_asm = \
20833 "push [edi]" \
20834 "popf" \
20835@@ -606,7 +657,8 @@ u16 shr_word_asm(u32 *flags,u16 d, u8 s);
20836 value [ax] \
20837 modify exact [ax cl];
20838
20839-u32 shr_long_asm(u32 *flags,u32 d, u8 s);
20840+u32 shr_long_asm(u32 * flags, u32 d, u8 s);
20841+
20842 #pragma aux shr_long_asm = \
20843 "push [edi]" \
20844 "popf" \
20845@@ -617,7 +669,8 @@ u32 shr_long_asm(u32 *flags,u32 d, u8 s);
20846 value [eax] \
20847 modify exact [eax cl];
20848
20849-u8 sar_byte_asm(u32 *flags,u8 d, u8 s);
20850+u8 sar_byte_asm(u32 * flags, u8 d, u8 s);
20851+
20852 #pragma aux sar_byte_asm = \
20853 "push [edi]" \
20854 "popf" \
20855@@ -628,7 +681,8 @@ u8 sar_byte_asm(u32 *flags,u8 d, u8 s);
20856 value [al] \
20857 modify exact [al cl];
20858
20859-u16 sar_word_asm(u32 *flags,u16 d, u8 s);
20860+u16 sar_word_asm(u32 * flags, u16 d, u8 s);
20861+
20862 #pragma aux sar_word_asm = \
20863 "push [edi]" \
20864 "popf" \
20865@@ -639,7 +693,8 @@ u16 sar_word_asm(u32 *flags,u16 d, u8 s);
20866 value [ax] \
20867 modify exact [ax cl];
20868
20869-u32 sar_long_asm(u32 *flags,u32 d, u8 s);
20870+u32 sar_long_asm(u32 * flags, u32 d, u8 s);
20871+
20872 #pragma aux sar_long_asm = \
20873 "push [edi]" \
20874 "popf" \
20875@@ -650,7 +705,8 @@ u32 sar_long_asm(u32 *flags,u32 d, u8 s);
20876 value [eax] \
20877 modify exact [eax cl];
20878
20879-u16 shld_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
20880+u16 shld_word_asm(u32 * flags, u16 d, u16 fill, u8 s);
20881+
20882 #pragma aux shld_word_asm = \
20883 "push [edi]" \
20884 "popf" \
20885@@ -661,7 +717,8 @@ u16 shld_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
20886 value [ax] \
20887 modify exact [ax dx cl];
20888
20889-u32 shld_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
20890+u32 shld_long_asm(u32 * flags, u32 d, u32 fill, u8 s);
20891+
20892 #pragma aux shld_long_asm = \
20893 "push [edi]" \
20894 "popf" \
20895@@ -672,7 +729,8 @@ u32 shld_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
20896 value [eax] \
20897 modify exact [eax edx cl];
20898
20899-u16 shrd_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
20900+u16 shrd_word_asm(u32 * flags, u16 d, u16 fill, u8 s);
20901+
20902 #pragma aux shrd_word_asm = \
20903 "push [edi]" \
20904 "popf" \
20905@@ -683,7 +741,8 @@ u16 shrd_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
20906 value [ax] \
20907 modify exact [ax dx cl];
20908
20909-u32 shrd_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
20910+u32 shrd_long_asm(u32 * flags, u32 d, u32 fill, u8 s);
20911+
20912 #pragma aux shrd_long_asm = \
20913 "push [edi]" \
20914 "popf" \
20915@@ -694,7 +753,8 @@ u32 shrd_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
20916 value [eax] \
20917 modify exact [eax edx cl];
20918
20919-u8 sbb_byte_asm(u32 *flags,u8 d, u8 s);
20920+u8 sbb_byte_asm(u32 * flags, u8 d, u8 s);
20921+
20922 #pragma aux sbb_byte_asm = \
20923 "push [edi]" \
20924 "popf" \
20925@@ -705,7 +765,8 @@ u8 sbb_byte_asm(u32 *flags,u8 d, u8 s);
20926 value [al] \
20927 modify exact [al bl];
20928
20929-u16 sbb_word_asm(u32 *flags,u16 d, u16 s);
20930+u16 sbb_word_asm(u32 * flags, u16 d, u16 s);
20931+
20932 #pragma aux sbb_word_asm = \
20933 "push [edi]" \
20934 "popf" \
20935@@ -716,7 +777,8 @@ u16 sbb_word_asm(u32 *flags,u16 d, u16 s);
20936 value [ax] \
20937 modify exact [ax bx];
20938
20939-u32 sbb_long_asm(u32 *flags,u32 d, u32 s);
20940+u32 sbb_long_asm(u32 * flags, u32 d, u32 s);
20941+
20942 #pragma aux sbb_long_asm = \
20943 "push [edi]" \
20944 "popf" \
20945@@ -727,7 +789,8 @@ u32 sbb_long_asm(u32 *flags,u32 d, u32 s);
20946 value [eax] \
20947 modify exact [eax ebx];
20948
20949-u8 sub_byte_asm(u32 *flags,u8 d, u8 s);
20950+u8 sub_byte_asm(u32 * flags, u8 d, u8 s);
20951+
20952 #pragma aux sub_byte_asm = \
20953 "push [edi]" \
20954 "popf" \
20955@@ -738,7 +801,8 @@ u8 sub_byte_asm(u32 *flags,u8 d, u8 s);
20956 value [al] \
20957 modify exact [al bl];
20958
20959-u16 sub_word_asm(u32 *flags,u16 d, u16 s);
20960+u16 sub_word_asm(u32 * flags, u16 d, u16 s);
20961+
20962 #pragma aux sub_word_asm = \
20963 "push [edi]" \
20964 "popf" \
20965@@ -749,7 +813,8 @@ u16 sub_word_asm(u32 *flags,u16 d, u16 s);
20966 value [ax] \
20967 modify exact [ax bx];
20968
20969-u32 sub_long_asm(u32 *flags,u32 d, u32 s);
20970+u32 sub_long_asm(u32 * flags, u32 d, u32 s);
20971+
20972 #pragma aux sub_long_asm = \
20973 "push [edi]" \
20974 "popf" \
20975@@ -760,7 +825,8 @@ u32 sub_long_asm(u32 *flags,u32 d, u32 s);
20976 value [eax] \
20977 modify exact [eax ebx];
20978
20979-void test_byte_asm(u32 *flags,u8 d, u8 s);
20980+void test_byte_asm(u32 * flags, u8 d, u8 s);
20981+
20982 #pragma aux test_byte_asm = \
20983 "push [edi]" \
20984 "popf" \
20985@@ -770,7 +836,8 @@ void test_byte_asm(u32 *flags,u8 d, u8 s);
20986 parm [edi] [al] [bl] \
20987 modify exact [al bl];
20988
20989-void test_word_asm(u32 *flags,u16 d, u16 s);
20990+void test_word_asm(u32 * flags, u16 d, u16 s);
20991+
20992 #pragma aux test_word_asm = \
20993 "push [edi]" \
20994 "popf" \
20995@@ -780,7 +847,8 @@ void test_word_asm(u32 *flags,u16 d, u16 s);
20996 parm [edi] [ax] [bx] \
20997 modify exact [ax bx];
20998
20999-void test_long_asm(u32 *flags,u32 d, u32 s);
21000+void test_long_asm(u32 * flags, u32 d, u32 s);
21001+
21002 #pragma aux test_long_asm = \
21003 "push [edi]" \
21004 "popf" \
21005@@ -790,7 +858,8 @@ void test_long_asm(u32 *flags,u32 d, u32 s);
21006 parm [edi] [eax] [ebx] \
21007 modify exact [eax ebx];
21008
21009-u8 xor_byte_asm(u32 *flags,u8 d, u8 s);
21010+u8 xor_byte_asm(u32 * flags, u8 d, u8 s);
21011+
21012 #pragma aux xor_byte_asm = \
21013 "push [edi]" \
21014 "popf" \
21015@@ -801,7 +870,8 @@ u8 xor_byte_asm(u32 *flags,u8 d, u8 s);
21016 value [al] \
21017 modify exact [al bl];
21018
21019-u16 xor_word_asm(u32 *flags,u16 d, u16 s);
21020+u16 xor_word_asm(u32 * flags, u16 d, u16 s);
21021+
21022 #pragma aux xor_word_asm = \
21023 "push [edi]" \
21024 "popf" \
21025@@ -812,7 +882,8 @@ u16 xor_word_asm(u32 *flags,u16 d, u16 s);
21026 value [ax] \
21027 modify exact [ax bx];
21028
21029-u32 xor_long_asm(u32 *flags,u32 d, u32 s);
21030+u32 xor_long_asm(u32 * flags, u32 d, u32 s);
21031+
21032 #pragma aux xor_long_asm = \
21033 "push [edi]" \
21034 "popf" \
21035@@ -823,7 +894,8 @@ u32 xor_long_asm(u32 *flags,u32 d, u32 s);
21036 value [eax] \
21037 modify exact [eax ebx];
21038
21039-void imul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
21040+void imul_byte_asm(u32 * flags, u16 * ax, u8 d, u8 s);
21041+
21042 #pragma aux imul_byte_asm = \
21043 "push [edi]" \
21044 "popf" \
21045@@ -834,7 +906,8 @@ void imul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
21046 parm [edi] [esi] [al] [bl] \
21047 modify exact [esi ax bl];
21048
21049-void imul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
21050+void imul_word_asm(u32 * flags, u16 * ax, u16 * dx, u16 d, u16 s);
21051+
21052 #pragma aux imul_word_asm = \
21053 "push [edi]" \
21054 "popf" \
21055@@ -846,7 +919,8 @@ void imul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
21056 parm [edi] [esi] [ecx] [ax] [bx]\
21057 modify exact [esi edi ax bx dx];
21058
21059-void imul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
21060+void imul_long_asm(u32 * flags, u32 * eax, u32 * edx, u32 d, u32 s);
21061+
21062 #pragma aux imul_long_asm = \
21063 "push [edi]" \
21064 "popf" \
21065@@ -858,7 +932,8 @@ void imul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
21066 parm [edi] [esi] [ecx] [eax] [ebx] \
21067 modify exact [esi edi eax ebx edx];
21068
21069-void mul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
21070+void mul_byte_asm(u32 * flags, u16 * ax, u8 d, u8 s);
21071+
21072 #pragma aux mul_byte_asm = \
21073 "push [edi]" \
21074 "popf" \
21075@@ -869,7 +944,8 @@ void mul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
21076 parm [edi] [esi] [al] [bl] \
21077 modify exact [esi ax bl];
21078
21079-void mul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
21080+void mul_word_asm(u32 * flags, u16 * ax, u16 * dx, u16 d, u16 s);
21081+
21082 #pragma aux mul_word_asm = \
21083 "push [edi]" \
21084 "popf" \
21085@@ -881,7 +957,8 @@ void mul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
21086 parm [edi] [esi] [ecx] [ax] [bx]\
21087 modify exact [esi edi ax bx dx];
21088
21089-void mul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
21090+void mul_long_asm(u32 * flags, u32 * eax, u32 * edx, u32 d, u32 s);
21091+
21092 #pragma aux mul_long_asm = \
21093 "push [edi]" \
21094 "popf" \
21095@@ -893,7 +970,8 @@ void mul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
21096 parm [edi] [esi] [ecx] [eax] [ebx] \
21097 modify exact [esi edi eax ebx edx];
21098
21099-void idiv_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
21100+void idiv_byte_asm(u32 * flags, u8 * al, u8 * ah, u16 d, u8 s);
21101+
21102 #pragma aux idiv_byte_asm = \
21103 "push [edi]" \
21104 "popf" \
21105@@ -905,7 +983,8 @@ void idiv_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
21106 parm [edi] [esi] [ecx] [ax] [bl]\
21107 modify exact [esi edi ax bl];
21108
21109-void idiv_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
21110+void idiv_word_asm(u32 * flags, u16 * ax, u16 * dx, u16 dlo, u16 dhi, u16 s);
21111+
21112 #pragma aux idiv_word_asm = \
21113 "push [edi]" \
21114 "popf" \
21115@@ -917,7 +996,8 @@ void idiv_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
21116 parm [edi] [esi] [ecx] [ax] [dx] [bx]\
21117 modify exact [esi edi ax dx bx];
21118
21119-void idiv_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
21120+void idiv_long_asm(u32 * flags, u32 * eax, u32 * edx, u32 dlo, u32 dhi, u32 s);
21121+
21122 #pragma aux idiv_long_asm = \
21123 "push [edi]" \
21124 "popf" \
21125@@ -929,7 +1009,8 @@ void idiv_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
21126 parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
21127 modify exact [esi edi eax edx ebx];
21128
21129-void div_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
21130+void div_byte_asm(u32 * flags, u8 * al, u8 * ah, u16 d, u8 s);
21131+
21132 #pragma aux div_byte_asm = \
21133 "push [edi]" \
21134 "popf" \
21135@@ -941,7 +1022,8 @@ void div_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
21136 parm [edi] [esi] [ecx] [ax] [bl]\
21137 modify exact [esi edi ax bl];
21138
21139-void div_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
21140+void div_word_asm(u32 * flags, u16 * ax, u16 * dx, u16 dlo, u16 dhi, u16 s);
21141+
21142 #pragma aux div_word_asm = \
21143 "push [edi]" \
21144 "popf" \
21145@@ -953,7 +1035,8 @@ void div_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
21146 parm [edi] [esi] [ecx] [ax] [dx] [bx]\
21147 modify exact [esi edi ax dx bx];
21148
21149-void div_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
21150+void div_long_asm(u32 * flags, u32 * eax, u32 * edx, u32 dlo, u32 dhi, u32 s);
21151+
21152 #pragma aux div_long_asm = \
21153 "push [edi]" \
21154 "popf" \
21155@@ -967,4 +1050,4 @@ void div_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
21156
21157 #endif
21158
21159-#endif /* __X86EMU_PRIM_ASM_H */
21160+#endif /* __X86EMU_PRIM_ASM_H */
21161diff --git a/libs/x86emu/x86emu/prim_ops.h b/libs/x86emu/x86emu/prim_ops.h
21162index bea8357..0f0e78d 100644
21163--- a/libs/x86emu/x86emu/prim_ops.h
21164+++ b/libs/x86emu/x86emu/prim_ops.h
21165@@ -40,102 +40,102 @@
21166 #define __X86EMU_PRIM_OPS_H
21167
21168 #ifdef __cplusplus
21169-extern "C" { /* Use "C" linkage when in C++ mode */
21170+extern "C" { /* Use "C" linkage when in C++ mode */
21171 #endif
21172
21173-u16 aaa_word (u16 d);
21174-u16 aas_word (u16 d);
21175-u16 aad_word (u16 d);
21176-u16 aam_word (u8 d);
21177-u8 adc_byte (u8 d, u8 s);
21178-u16 adc_word (u16 d, u16 s);
21179-u32 adc_long (u32 d, u32 s);
21180-u8 add_byte (u8 d, u8 s);
21181-u16 add_word (u16 d, u16 s);
21182-u32 add_long (u32 d, u32 s);
21183-u8 and_byte (u8 d, u8 s);
21184-u16 and_word (u16 d, u16 s);
21185-u32 and_long (u32 d, u32 s);
21186-u8 cmp_byte (u8 d, u8 s);
21187-u16 cmp_word (u16 d, u16 s);
21188-u32 cmp_long (u32 d, u32 s);
21189-u8 daa_byte (u8 d);
21190-u8 das_byte (u8 d);
21191-u8 dec_byte (u8 d);
21192-u16 dec_word (u16 d);
21193-u32 dec_long (u32 d);
21194-u8 inc_byte (u8 d);
21195-u16 inc_word (u16 d);
21196-u32 inc_long (u32 d);
21197-u8 or_byte (u8 d, u8 s);
21198-u16 or_word (u16 d, u16 s);
21199-u32 or_long (u32 d, u32 s);
21200-u8 neg_byte (u8 s);
21201-u16 neg_word (u16 s);
21202-u32 neg_long (u32 s);
21203-u8 not_byte (u8 s);
21204-u16 not_word (u16 s);
21205-u32 not_long (u32 s);
21206-u8 rcl_byte (u8 d, u8 s);
21207-u16 rcl_word (u16 d, u8 s);
21208-u32 rcl_long (u32 d, u8 s);
21209-u8 rcr_byte (u8 d, u8 s);
21210-u16 rcr_word (u16 d, u8 s);
21211-u32 rcr_long (u32 d, u8 s);
21212-u8 rol_byte (u8 d, u8 s);
21213-u16 rol_word (u16 d, u8 s);
21214-u32 rol_long (u32 d, u8 s);
21215-u8 ror_byte (u8 d, u8 s);
21216-u16 ror_word (u16 d, u8 s);
21217-u32 ror_long (u32 d, u8 s);
21218-u8 shl_byte (u8 d, u8 s);
21219-u16 shl_word (u16 d, u8 s);
21220-u32 shl_long (u32 d, u8 s);
21221-u8 shr_byte (u8 d, u8 s);
21222-u16 shr_word (u16 d, u8 s);
21223-u32 shr_long (u32 d, u8 s);
21224-u8 sar_byte (u8 d, u8 s);
21225-u16 sar_word (u16 d, u8 s);
21226-u32 sar_long (u32 d, u8 s);
21227-u16 shld_word (u16 d, u16 fill, u8 s);
21228-u32 shld_long (u32 d, u32 fill, u8 s);
21229-u16 shrd_word (u16 d, u16 fill, u8 s);
21230-u32 shrd_long (u32 d, u32 fill, u8 s);
21231-u8 sbb_byte (u8 d, u8 s);
21232-u16 sbb_word (u16 d, u16 s);
21233-u32 sbb_long (u32 d, u32 s);
21234-u8 sub_byte (u8 d, u8 s);
21235-u16 sub_word (u16 d, u16 s);
21236-u32 sub_long (u32 d, u32 s);
21237-void test_byte (u8 d, u8 s);
21238-void test_word (u16 d, u16 s);
21239-void test_long (u32 d, u32 s);
21240-u8 xor_byte (u8 d, u8 s);
21241-u16 xor_word (u16 d, u16 s);
21242-u32 xor_long (u32 d, u32 s);
21243-void imul_byte (u8 s);
21244-void imul_word (u16 s);
21245-void imul_long (u32 s);
21246-void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s);
21247-void mul_byte (u8 s);
21248-void mul_word (u16 s);
21249-void mul_long (u32 s);
21250-void idiv_byte (u8 s);
21251-void idiv_word (u16 s);
21252-void idiv_long (u32 s);
21253-void div_byte (u8 s);
21254-void div_word (u16 s);
21255-void div_long (u32 s);
21256-void ins (int size);
21257-void outs (int size);
21258-u16 mem_access_word (int addr);
21259-void push_word (u16 w);
21260-void push_long (u32 w);
21261-u16 pop_word (void);
21262-u32 pop_long (void);
21263+ u16 aaa_word(u16 d);
21264+ u16 aas_word(u16 d);
21265+ u16 aad_word(u16 d);
21266+ u16 aam_word(u8 d);
21267+ u8 adc_byte(u8 d, u8 s);
21268+ u16 adc_word(u16 d, u16 s);
21269+ u32 adc_long(u32 d, u32 s);
21270+ u8 add_byte(u8 d, u8 s);
21271+ u16 add_word(u16 d, u16 s);
21272+ u32 add_long(u32 d, u32 s);
21273+ u8 and_byte(u8 d, u8 s);
21274+ u16 and_word(u16 d, u16 s);
21275+ u32 and_long(u32 d, u32 s);
21276+ u8 cmp_byte(u8 d, u8 s);
21277+ u16 cmp_word(u16 d, u16 s);
21278+ u32 cmp_long(u32 d, u32 s);
21279+ u8 daa_byte(u8 d);
21280+ u8 das_byte(u8 d);
21281+ u8 dec_byte(u8 d);
21282+ u16 dec_word(u16 d);
21283+ u32 dec_long(u32 d);
21284+ u8 inc_byte(u8 d);
21285+ u16 inc_word(u16 d);
21286+ u32 inc_long(u32 d);
21287+ u8 or_byte(u8 d, u8 s);
21288+ u16 or_word(u16 d, u16 s);
21289+ u32 or_long(u32 d, u32 s);
21290+ u8 neg_byte(u8 s);
21291+ u16 neg_word(u16 s);
21292+ u32 neg_long(u32 s);
21293+ u8 not_byte(u8 s);
21294+ u16 not_word(u16 s);
21295+ u32 not_long(u32 s);
21296+ u8 rcl_byte(u8 d, u8 s);
21297+ u16 rcl_word(u16 d, u8 s);
21298+ u32 rcl_long(u32 d, u8 s);
21299+ u8 rcr_byte(u8 d, u8 s);
21300+ u16 rcr_word(u16 d, u8 s);
21301+ u32 rcr_long(u32 d, u8 s);
21302+ u8 rol_byte(u8 d, u8 s);
21303+ u16 rol_word(u16 d, u8 s);
21304+ u32 rol_long(u32 d, u8 s);
21305+ u8 ror_byte(u8 d, u8 s);
21306+ u16 ror_word(u16 d, u8 s);
21307+ u32 ror_long(u32 d, u8 s);
21308+ u8 shl_byte(u8 d, u8 s);
21309+ u16 shl_word(u16 d, u8 s);
21310+ u32 shl_long(u32 d, u8 s);
21311+ u8 shr_byte(u8 d, u8 s);
21312+ u16 shr_word(u16 d, u8 s);
21313+ u32 shr_long(u32 d, u8 s);
21314+ u8 sar_byte(u8 d, u8 s);
21315+ u16 sar_word(u16 d, u8 s);
21316+ u32 sar_long(u32 d, u8 s);
21317+ u16 shld_word(u16 d, u16 fill, u8 s);
21318+ u32 shld_long(u32 d, u32 fill, u8 s);
21319+ u16 shrd_word(u16 d, u16 fill, u8 s);
21320+ u32 shrd_long(u32 d, u32 fill, u8 s);
21321+ u8 sbb_byte(u8 d, u8 s);
21322+ u16 sbb_word(u16 d, u16 s);
21323+ u32 sbb_long(u32 d, u32 s);
21324+ u8 sub_byte(u8 d, u8 s);
21325+ u16 sub_word(u16 d, u16 s);
21326+ u32 sub_long(u32 d, u32 s);
21327+ void test_byte(u8 d, u8 s);
21328+ void test_word(u16 d, u16 s);
21329+ void test_long(u32 d, u32 s);
21330+ u8 xor_byte(u8 d, u8 s);
21331+ u16 xor_word(u16 d, u16 s);
21332+ u32 xor_long(u32 d, u32 s);
21333+ void imul_byte(u8 s);
21334+ void imul_word(u16 s);
21335+ void imul_long(u32 s);
21336+ void imul_long_direct(u32 * res_lo, u32 * res_hi, u32 d, u32 s);
21337+ void mul_byte(u8 s);
21338+ void mul_word(u16 s);
21339+ void mul_long(u32 s);
21340+ void idiv_byte(u8 s);
21341+ void idiv_word(u16 s);
21342+ void idiv_long(u32 s);
21343+ void div_byte(u8 s);
21344+ void div_word(u16 s);
21345+ void div_long(u32 s);
21346+ void ins(int size);
21347+ void outs(int size);
21348+ u16 mem_access_word(int addr);
21349+ void push_word(u16 w);
21350+ void push_long(u32 w);
21351+ u16 pop_word(void);
21352+ u32 pop_long(void);
21353+ void cpuid(void);
21354
21355 #ifdef __cplusplus
21356-} /* End of "C" linkage for C++ */
21357+} /* End of "C" linkage for C++ */
21358 #endif
21359-
21360-#endif /* __X86EMU_PRIM_OPS_H */
21361+#endif /* __X86EMU_PRIM_OPS_H */
21362diff --git a/libs/x86emu/x86emu/prim_x86_gcc.h b/libs/x86emu/x86emu/prim_x86_gcc.h
21363new file mode 100644
21364index 0000000..646ec9d
21365--- /dev/null
21366+++ b/libs/x86emu/x86emu/prim_x86_gcc.h
21367@@ -0,0 +1,77 @@
21368+/****************************************************************************
21369+*
21370+* Inline helpers for x86emu
21371+*
21372+* Copyright (C) 2008 Bart Trojanowski, Symbio Technologies, LLC
21373+*
21374+* ========================================================================
21375+*
21376+* Permission to use, copy, modify, distribute, and sell this software and
21377+* its documentation for any purpose is hereby granted without fee,
21378+* provided that the above copyright notice appear in all copies and that
21379+* both that copyright notice and this permission notice appear in
21380+* supporting documentation, and that the name of the authors not be used
21381+* in advertising or publicity pertaining to distribution of the software
21382+* without specific, written prior permission. The authors makes no
21383+* representations about the suitability of this software for any purpose.
21384+* It is provided "as is" without express or implied warranty.
21385+*
21386+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
21387+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
21388+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
21389+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
21390+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
21391+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
21392+* PERFORMANCE OF THIS SOFTWARE.
21393+*
21394+* ========================================================================
21395+*
21396+* Language: GNU C
21397+* Environment: GCC on i386 or x86-64
21398+* Developer: Bart Trojanowski
21399+*
21400+* Description: This file defines a few x86 macros that can be used by the
21401+* emulator to execute native instructions.
21402+*
21403+* For PIC vs non-PIC code refer to:
21404+* http://sam.zoy.org/blog/2007-04-13-shlib-with-non-pic-code-have-inline-assembly-and-pic-mix-well
21405+*
21406+****************************************************************************/
21407+#ifndef __X86EMU_PRIM_X86_GCC_H
21408+#define __X86EMU_PRIM_X86_GCC_H
21409+
21410+#include "x86emu/types.h"
21411+
21412+#if !defined(__GNUC__) || !(defined (__i386__) || defined(__i386) || defined(__AMD64__) || defined(__amd64__))
21413+#error This file is intended to be used by gcc on i386 or x86-64 system
21414+#endif
21415+
21416+#if defined(__PIC__) && defined(__i386__)
21417+
21418+#define X86EMU_HAS_HW_CPUID 1
21419+static inline void
21420+hw_cpuid(u32 * a, u32 * b, u32 * c, u32 * d)
21421+{
21422+ __asm__ __volatile__("pushl %%ebx \n\t"
21423+ "cpuid \n\t"
21424+ "movl %%ebx, %1 \n\t"
21425+ "popl %%ebx \n\t":"=a"(*a), "=r"(*b),
21426+ "=c"(*c), "=d"(*d)
21427+ :"a"(*a), "c"(*c)
21428+ :"cc");
21429+}
21430+
21431+#else /* ! (__PIC__ && __i386__) */
21432+
21433+#define x86EMU_HAS_HW_CPUID 1
21434+static inline void
21435+hw_cpuid(u32 * a, u32 * b, u32 * c, u32 * d)
21436+{
21437+ __asm__ __volatile__("cpuid":"=a"(*a), "=b"(*b), "=c"(*c), "=d"(*d)
21438+ :"a"(*a), "c"(*c)
21439+ :"cc");
21440+}
21441+
21442+#endif /* __PIC__ && __i386__ */
21443+
21444+#endif /* __X86EMU_PRIM_X86_GCC_H */
21445diff --git a/libs/x86emu/x86emu/regs.h b/libs/x86emu/x86emu/regs.h
21446index 52cf8e4..6bd0611 100644
21447--- a/libs/x86emu/x86emu/regs.h
21448+++ b/libs/x86emu/x86emu/regs.h
21449@@ -42,7 +42,7 @@
21450 /*---------------------- Macros and type definitions ----------------------*/
21451
21452 #ifdef PACK
21453-# pragma PACK
21454+#pragma PACK
21455 #endif
21456
21457 /*
21458@@ -64,48 +64,48 @@
21459
21460 typedef struct {
21461 u32 e_reg;
21462- } I32_reg_t;
21463+} I32_reg_t;
21464
21465 typedef struct {
21466- u16 filler0, x_reg;
21467- } I16_reg_t;
21468+ u16 filler0, x_reg;
21469+} I16_reg_t;
21470
21471 typedef struct {
21472- u8 filler0, filler1, h_reg, l_reg;
21473- } I8_reg_t;
21474+ u8 filler0, filler1, h_reg, l_reg;
21475+} I8_reg_t;
21476
21477-#else /* !__BIG_ENDIAN__ */
21478+#else /* !__BIG_ENDIAN__ */
21479
21480 typedef struct {
21481 u32 e_reg;
21482- } I32_reg_t;
21483+} I32_reg_t;
21484
21485 typedef struct {
21486- u16 x_reg;
21487- } I16_reg_t;
21488+ u16 x_reg;
21489+} I16_reg_t;
21490
21491 typedef struct {
21492- u8 l_reg, h_reg;
21493- } I8_reg_t;
21494+ u8 l_reg, h_reg;
21495+} I8_reg_t;
21496
21497-#endif /* BIG_ENDIAN */
21498+#endif /* BIG_ENDIAN */
21499
21500 typedef union {
21501- I32_reg_t I32_reg;
21502- I16_reg_t I16_reg;
21503- I8_reg_t I8_reg;
21504- } i386_general_register;
21505+ I32_reg_t I32_reg;
21506+ I16_reg_t I16_reg;
21507+ I8_reg_t I8_reg;
21508+} i386_general_register;
21509
21510 struct i386_general_regs {
21511- i386_general_register A, B, C, D;
21512- };
21513+ i386_general_register A, B, C, D;
21514+};
21515
21516 typedef struct i386_general_regs Gen_reg_t;
21517
21518 struct i386_special_regs {
21519- i386_general_register SP, BP, SI, DI, IP;
21520- u32 FLAGS;
21521- };
21522+ i386_general_register SP, BP, SI, DI, IP;
21523+ u32 FLAGS;
21524+};
21525
21526 /*
21527 * Segment registers here represent the 16 bit quantities
21528@@ -114,7 +114,7 @@ struct i386_special_regs {
21529
21530 struct i386_segment_regs {
21531 u16 CS, DS, SS, ES, FS, GS;
21532- };
21533+};
21534
21535 /* 8 bit registers */
21536 #define R_AH gen.A.I8_reg.h_reg
21537@@ -258,9 +258,9 @@ struct i386_segment_regs {
21538 #define INTR_HALTED 0x4
21539
21540 typedef struct {
21541- struct i386_general_regs gen;
21542- struct i386_special_regs spc;
21543- struct i386_segment_regs seg;
21544+ struct i386_general_regs gen;
21545+ struct i386_special_regs spc;
21546+ struct i386_segment_regs seg;
21547 /*
21548 * MODE contains information on:
21549 * REPE prefix 2 bits repe,repne
21550@@ -273,21 +273,21 @@ typedef struct {
21551 * Extern interrupt 1 bits
21552 * Halted 1 bits
21553 */
21554- u32 mode;
21555- volatile int intr; /* mask of pending interrupts */
21556- int debug;
21557+ u32 mode;
21558+ volatile int intr; /* mask of pending interrupts */
21559+ int debug;
21560 #ifdef DEBUG
21561- int check;
21562- u16 saved_ip;
21563- u16 saved_cs;
21564- int enc_pos;
21565- int enc_str_pos;
21566- char decode_buf[32]; /* encoded byte stream */
21567- char decoded_buf[256]; /* disassembled strings */
21568+ int check;
21569+ u16 saved_ip;
21570+ u16 saved_cs;
21571+ int enc_pos;
21572+ int enc_str_pos;
21573+ char decode_buf[32]; /* encoded byte stream */
21574+ char decoded_buf[256]; /* disassembled strings */
21575 #endif
21576- u8 intno;
21577- u8 __pad[3];
21578- } X86EMU_regs;
21579+ u8 intno;
21580+ u8 __pad[3];
21581+} X86EMU_regs;
21582
21583 /****************************************************************************
21584 REMARKS:
21585@@ -300,20 +300,20 @@ private - private data pointer
21586 x86 - X86 registers
21587 ****************************************************************************/
21588 typedef struct {
21589- unsigned long mem_base;
21590- unsigned long mem_size;
21591- void* private;
21592- X86EMU_regs x86;
21593- } X86EMU_sysEnv;
21594+ unsigned long mem_base;
21595+ unsigned long mem_size;
21596+ void *private;
21597+ X86EMU_regs x86;
21598+} X86EMU_sysEnv;
21599
21600 #ifdef END_PACK
21601-# pragma END_PACK
21602+#pragma END_PACK
21603 #endif
21604
21605 /*----------------------------- Global Variables --------------------------*/
21606
21607 #ifdef __cplusplus
21608-extern "C" { /* Use "C" linkage when in C++ mode */
21609+extern "C" { /* Use "C" linkage when in C++ mode */
21610 #endif
21611
21612 /* Global emulator machine state.
21613@@ -321,17 +321,16 @@ extern "C" { /* Use "C" linkage when in C++ mode */
21614 * We keep it global to avoid pointer dereferences in the code for speed.
21615 */
21616
21617-extern X86EMU_sysEnv _X86EMU_env;
21618+ extern X86EMU_sysEnv _X86EMU_env;
21619 #define M _X86EMU_env
21620
21621 /*-------------------------- Function Prototypes --------------------------*/
21622
21623 /* Function to log information at runtime */
21624
21625-void printk(const char *fmt, ...);
21626+ void printk(const char *fmt, ...);
21627
21628 #ifdef __cplusplus
21629-} /* End of "C" linkage for C++ */
21630+} /* End of "C" linkage for C++ */
21631 #endif
21632-
21633-#endif /* __X86EMU_REGS_H */
21634+#endif /* __X86EMU_REGS_H */
21635diff --git a/libs/x86emu/x86emu/types.h b/libs/x86emu/x86emu/types.h
21636index c0c09c1..5a6ef01 100644
21637--- a/libs/x86emu/x86emu/types.h
21638+++ b/libs/x86emu/x86emu/types.h
21639@@ -36,7 +36,6 @@
21640 *
21641 ****************************************************************************/
21642
21643-
21644 #ifndef __X86EMU_TYPES_H
21645 #define __X86EMU_TYPES_H
21646
21647@@ -61,46 +60,21 @@
21648
21649 /*---------------------- Macros and type definitions ----------------------*/
21650
21651-/* Currently only for Linux/32bit */
21652-#undef __HAS_LONG_LONG__
21653-#if defined(__GNUC__) && !defined(NO_LONG_LONG)
21654-#define __HAS_LONG_LONG__
21655-#endif
21656+#include <stdint.h>
21657
21658-/* Taken from Xmd.h */
21659-#undef NUM32
21660-#if defined (_LP64) || \
21661- defined(__alpha) || defined(__alpha__) || \
21662- defined(__ia64__) || defined(ia64) || \
21663- defined(__sparc64__) || \
21664- defined(__s390x__) || \
21665- (defined(__hppa__) && defined(__LP64)) || \
21666- defined(__amd64__) || defined(amd64) || \
21667- (defined(__sgi) && (_MIPS_SZLONG == 64))
21668-#define NUM32 int
21669-#else
21670-#define NUM32 long
21671-#endif
21672+typedef uint8_t u8;
21673+typedef uint16_t u16;
21674+typedef uint32_t u32;
21675+typedef uint64_t u64;
21676
21677-typedef unsigned char u8;
21678-typedef unsigned short u16;
21679-typedef unsigned NUM32 u32;
21680-#ifdef __HAS_LONG_LONG__
21681-typedef unsigned long long u64;
21682-#endif
21683+typedef int8_t s8;
21684+typedef int16_t s16;
21685+typedef int32_t s32;
21686+typedef int64_t s64;
21687
21688-typedef char s8;
21689-typedef short s16;
21690-typedef NUM32 s32;
21691-#ifdef __HAS_LONG_LONG__
21692-typedef long long s64;
21693-#endif
21694-
21695-typedef unsigned int uint;
21696-typedef int sint;
21697+typedef unsigned int uint;
21698+typedef int sint;
21699
21700 typedef u16 X86EMU_pioAddr;
21701
21702-#undef NUM32
21703-
21704-#endif /* __X86EMU_TYPES_H */
21705+#endif /* __X86EMU_TYPES_H */
21706diff --git a/libs/x86emu/x86emu/x86emui.h b/libs/x86emu/x86emu/x86emui.h
21707index 112ee36..f11dc10 100644
21708--- a/libs/x86emu/x86emu/x86emui.h
21709+++ b/libs/x86emu/x86emu/x86emui.h
21710@@ -38,7 +38,6 @@
21711 *
21712 ****************************************************************************/
21713
21714-
21715 #ifndef __X86EMU_X86EMUI_H
21716 #define __X86EMU_X86EMUI_H
21717
21718@@ -74,29 +73,28 @@
21719 #include <stdio.h>
21720 #include <stdlib.h>
21721 #include <string.h>
21722-#endif
21723+#endif
21724 /*--------------------------- Inline Functions ----------------------------*/
21725
21726 #ifdef __cplusplus
21727-extern "C" { /* Use "C" linkage when in C++ mode */
21728+extern "C" { /* Use "C" linkage when in C++ mode */
21729 #endif
21730
21731-extern u8 (X86APIP sys_rdb)(u32 addr);
21732-extern u16 (X86APIP sys_rdw)(u32 addr);
21733-extern u32 (X86APIP sys_rdl)(u32 addr);
21734-extern void (X86APIP sys_wrb)(u32 addr,u8 val);
21735-extern void (X86APIP sys_wrw)(u32 addr,u16 val);
21736-extern void (X86APIP sys_wrl)(u32 addr,u32 val);
21737+ extern u8(X86APIP sys_rdb) (u32 addr);
21738+ extern u16(X86APIP sys_rdw) (u32 addr);
21739+ extern u32(X86APIP sys_rdl) (u32 addr);
21740+ extern void (X86APIP sys_wrb) (u32 addr, u8 val);
21741+ extern void (X86APIP sys_wrw) (u32 addr, u16 val);
21742+ extern void (X86APIP sys_wrl) (u32 addr, u32 val);
21743
21744-extern u8 (X86APIP sys_inb)(X86EMU_pioAddr addr);
21745-extern u16 (X86APIP sys_inw)(X86EMU_pioAddr addr);
21746-extern u32 (X86APIP sys_inl)(X86EMU_pioAddr addr);
21747-extern void (X86APIP sys_outb)(X86EMU_pioAddr addr,u8 val);
21748-extern void (X86APIP sys_outw)(X86EMU_pioAddr addr,u16 val);
21749-extern void (X86APIP sys_outl)(X86EMU_pioAddr addr,u32 val);
21750+ extern u8(X86APIP sys_inb) (X86EMU_pioAddr addr);
21751+ extern u16(X86APIP sys_inw) (X86EMU_pioAddr addr);
21752+ extern u32(X86APIP sys_inl) (X86EMU_pioAddr addr);
21753+ extern void (X86APIP sys_outb) (X86EMU_pioAddr addr, u8 val);
21754+ extern void (X86APIP sys_outw) (X86EMU_pioAddr addr, u16 val);
21755+ extern void (X86APIP sys_outl) (X86EMU_pioAddr addr, u32 val);
21756
21757 #ifdef __cplusplus
21758-} /* End of "C" linkage for C++ */
21759+} /* End of "C" linkage for C++ */
21760 #endif
21761-
21762-#endif /* __X86EMU_X86EMUI_H */
21763+#endif /* __X86EMU_X86EMUI_H */
21764--
217651.9.1
21766
diff --git a/meta/recipes-bsp/v86d/v86d_0.1.10.bb b/meta/recipes-bsp/v86d/v86d_0.1.10.bb
index a8f1d08247..b980331ac3 100644
--- a/meta/recipes-bsp/v86d/v86d_0.1.10.bb
+++ b/meta/recipes-bsp/v86d/v86d_0.1.10.bb
@@ -7,9 +7,10 @@ LIC_FILES_CHKSUM = "file://README;md5=94ac1971e4f2309dc322d598e7b1f7dd"
7 7
8DEPENDS = "virtual/kernel" 8DEPENDS = "virtual/kernel"
9RRECOMMENDS_${PN} = "kernel-module-uvesafb" 9RRECOMMENDS_${PN} = "kernel-module-uvesafb"
10PR = "r1" 10PR = "r2"
11 11
12SRC_URI = "http://distfiles.gentoo.org/distfiles/${BP}.tar.bz2 \ 12SRC_URI = "http://distfiles.gentoo.org/distfiles/${BP}.tar.bz2 \
13 file://Update-x86emu-from-X.org.patch \
13 file://fbsetup \ 14 file://fbsetup \
14 file://ar-from-env.patch" 15 file://ar-from-env.patch"
15 16
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-11-15 19:13:48 +0000