opensbi: Update to v1.1

This release has:
* SBI PMU improvements
* RISC-V AIA v0.3.0 draft support
* Simple external interrupt handling framework
* Xilinx UART-Lite driver
* RISC-V privilege specification v1.12 support
* RISC-V Svpbmt extension support
* RISC-V Smstateen extension support
* RISC-V Sstc extension support
* RISC-V privilege specification version detection
* Platform callback to populate HART extensions
* Compile time C arrays support
* Probing FDT based drivers using compile time C arrays
* SBI HSM improvements
* Allwinner D1 platform support
* Trap redirection improvements related to [m|h]tinst CSR
* SBI v1.0 specification support

Overall, this release mainly adds support for various RISC-V ISA
extensions ratified in December 2021 along with other improvements.

(From OE-Core rev: 337da2a521b060c72375279dac20bc8e3878926e)

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>

1 files changed, 47 insertions, 0 deletions

diff --git a/meta/recipes-bsp/opensbi/opensbi_1.1.bb b/meta/recipes-bsp/opensbi/opensbi_1.1.bb
new file mode 100644
index 0000000000..d3a6296533
--- /dev/null
+++ b/meta/recipes-bsp/opensbi/opensbi_1.1.bb
@@ -0,0 +1,47 @@
+SUMMARY = "RISC-V Open Source Supervisor Binary Interface (OpenSBI)"
+DESCRIPTION = "OpenSBI aims to provide an open-source and extensible implementation of the RISC-V SBI specification for a platform specific firmware (M-mode) and a general purpose OS, hypervisor or bootloader (S-mode or HS-mode). OpenSBI implementation can be easily extended by RISC-V platform or System-on-Chip vendors to fit a particular hadware configuration."
+HOMEPAGE = "https://github.com/riscv/opensbi"
+LICENSE = "BSD-2-Clause"
+LIC_FILES_CHKSUM = "file://COPYING.BSD;md5=42dd9555eb177f35150cf9aa240b61e5"
+
+require opensbi-payloads.inc
+
+inherit autotools-brokensep deploy
+
+SRCREV = "4489876e933d8ba0d8bc6c64bae71e295d45faac"
+SRC_URI = "git://github.com/riscv/opensbi.git;branch=master;protocol=https"
+
+S = "${WORKDIR}/git"
+
+EXTRA_OEMAKE += "PLATFORM=${RISCV_SBI_PLAT} I=${D} FW_PIC=n CLANG_TARGET= "
+# If RISCV_SBI_PAYLOAD is set then include it as a payload
+EXTRA_OEMAKE:append = " ${@riscv_get_extra_oemake_image(d)}"
+EXTRA_OEMAKE:append = " ${@riscv_get_extra_oemake_fdt(d)}"
+
+# Required if specifying a custom payload
+do_compile[depends] += "${@riscv_get_do_compile_depends(d)}"
+
+do_install:append() {
+        # In the future these might be required as a dependency for other packages.
+        # At the moment just delete them to avoid warnings
+        rm -r ${D}/include
+        rm -r ${D}/lib*
+        rm -r ${D}/share/opensbi/*/${RISCV_SBI_PLAT}/firmware/payloads
+}
+
+do_deploy () {
+        install -m 755 ${D}/share/opensbi/*/${RISCV_SBI_PLAT}/firmware/fw_payload.* ${DEPLOYDIR}/
+        install -m 755 ${D}/share/opensbi/*/${RISCV_SBI_PLAT}/firmware/fw_jump.* ${DEPLOYDIR}/
+        install -m 755 ${D}/share/opensbi/*/${RISCV_SBI_PLAT}/firmware/fw_dynamic.* ${DEPLOYDIR}/
+}
+
+addtask deploy before do_build after do_install
+
+FILES:${PN} += "/share/opensbi/*/${RISCV_SBI_PLAT}/firmware/fw_jump.*"
+FILES:${PN} += "/share/opensbi/*/${RISCV_SBI_PLAT}/firmware/fw_payload.*"
+FILES:${PN} += "/share/opensbi/*/${RISCV_SBI_PLAT}/firmware/fw_dynamic.*"
+
+COMPATIBLE_HOST = "(riscv64|riscv32).*"
+INHIBIT_PACKAGE_STRIP = "1"
+
+SECURITY_CFLAGS = ""