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authorMarcin Juszkiewicz <hrw@openedhand.com>2008-04-17 10:04:19 +0000
committerMarcin Juszkiewicz <hrw@openedhand.com>2008-04-17 10:04:19 +0000
commit66df6d12445faf14fcab925e883375758f7132a2 (patch)
tree49092dbe08b3a6b9322b9ccf9e0e51a7a6e2c498 /meta/packages/gcc/gcc-4.2.3/arm-crunch-compare.patch-z-eq
parentabca3ca42f2097d1cef8c2eb87fce46604618af2 (diff)
downloadpoky-66df6d12445faf14fcab925e883375758f7132a2.tar.gz
gcc: upgrade 4.2.2 -> 4.2.3
git-svn-id: https://svn.o-hand.com/repos/poky/trunk@4286 311d38ba-8fff-0310-9ca6-ca027cbcb966
Diffstat (limited to 'meta/packages/gcc/gcc-4.2.3/arm-crunch-compare.patch-z-eq')
-rw-r--r--meta/packages/gcc/gcc-4.2.3/arm-crunch-compare.patch-z-eq400
1 files changed, 400 insertions, 0 deletions
diff --git a/meta/packages/gcc/gcc-4.2.3/arm-crunch-compare.patch-z-eq b/meta/packages/gcc/gcc-4.2.3/arm-crunch-compare.patch-z-eq
new file mode 100644
index 0000000000..bc40411be4
--- /dev/null
+++ b/meta/packages/gcc/gcc-4.2.3/arm-crunch-compare.patch-z-eq
@@ -0,0 +1,400 @@
1diff -urN gcc-4.1.2/gcc/config/arm/arm.c ../../../../old-tmp/work/arm-oabi-angstrom-linux/gcc-cross-4.1.2-backup/gcc-4.1.2/gcc/config/arm/arm.c
2--- gcc-4.1.2/gcc/config/arm/arm.c 2007-05-31 12:39:48.000000000 +1000
3+++ gcc-4.1.2/gcc/config/arm/arm.c 2007-05-29 17:19:38.000000000 +1000
4@@ -11427,26 +11427,53 @@
5 /* These encodings assume that AC=1 in the FPA system control
6 byte. This allows us to handle all cases except UNEQ and
7 LTGT. */
8- switch (comp_code)
9- {
10- case GE: return ARM_GE;
11- case GT: return ARM_GT;
12- case LE: return ARM_LS;
13- case LT: return ARM_MI;
14- case NE: return ARM_NE;
15- case EQ: return ARM_EQ;
16- case ORDERED: return ARM_VC;
17- case UNORDERED: return ARM_VS;
18- case UNLT: return ARM_LT;
19- case UNLE: return ARM_LE;
20- case UNGT: return ARM_HI;
21- case UNGE: return ARM_PL;
22- /* UNEQ and LTGT do not have a representation. */
23- case UNEQ: /* Fall through. */
24- case LTGT: /* Fall through. */
25- default: gcc_unreachable ();
26- }
27-
28+ if (!TARGET_MAVERICK)
29+ {
30+ switch (comp_code)
31+ {
32+ case GE: return ARM_GE;
33+ case GT: return ARM_GT;
34+ case LE: return ARM_LS;
35+ case LT: return ARM_MI;
36+ case NE: return ARM_NE;
37+ case EQ: return ARM_EQ;
38+ case ORDERED: return ARM_VC;
39+ case UNORDERED: return ARM_VS;
40+ case UNLT: return ARM_LT;
41+ case UNLE: return ARM_LE;
42+ case UNGT: return ARM_HI;
43+ case UNGE: return ARM_PL;
44+ /* UNEQ and LTGT do not have a representation. */
45+ case UNEQ: /* Fall through. */
46+ case LTGT: /* Fall through. */
47+ default: gcc_unreachable ();
48+ }
49+ }
50+ else
51+ {
52+ /* CIRRUS */
53+ switch (comp_code)
54+ {
55+#if 1
56+ case GT: return ARM_VS;
57+ case LE: return ARM_LE;
58+ case LT: return ARM_LT;
59+ case NE: return ARM_NE;
60+ case EQ: return ARM_EQ;
61+ case UNLE: return ARM_VC;
62+ case UNGT: return ARM_GT;
63+ case UNGE: return ARM_GE;
64+ case UNEQ: return ARM_PL;
65+ case LTGT: return ARM_MI;
66+ /* These do not have a representation. */
67+ case GE: /* Fall through. -UNGE wrong atm */
68+ case UNLT: /* Fall through. -LT wrong atm */
69+ case ORDERED: /* Fall through. -AL wrong atm */
70+ case UNORDERED: /* Fall through. -AL wrong atm */
71+#endif
72+ default: gcc_unreachable ();
73+ }
74+ }
75 case CC_SWPmode:
76 switch (comp_code)
77 {
78diff -urN gcc-4.1.2/gcc/config/arm/arm.md ../../../../old-tmp/work/arm-oabi-angstrom-linux/gcc-cross-4.1.2-backup/gcc-4.1.2/gcc/config/arm/arm.md
79--- gcc-4.1.2/gcc/config/arm/arm.md 2007-05-31 12:39:48.000000000 +1000
80+++ gcc-4.1.2/gcc/config/arm/arm.md 2007-05-29 15:17:18.000000000 +1000
81@@ -6952,10 +6952,11 @@
82 "operands[1] = arm_gen_compare_reg (LE, arm_compare_op0, arm_compare_op1);"
83 )
84
85+;broken on cirrus
86 (define_expand "bge"
87 [(set (pc)
88 (if_then_else (ge (match_dup 1) (const_int 0))
89 (label_ref (match_operand 0 "" ""))
90 (pc)))]
91- "TARGET_ARM"
92+ "TARGET_ARM"
93 "operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);"
94@@ -6988,6 +6989,7 @@
95 "operands[1] = arm_gen_compare_reg (LEU, arm_compare_op0, arm_compare_op1);"
96 )
97
98+; broken on cirrus?
99 (define_expand "bgeu"
100 [(set (pc)
101 (if_then_else (geu (match_dup 1) (const_int 0))
102@@ -7031,14 +7033,15 @@
103 (if_then_else (ungt (match_dup 1) (const_int 0))
104 (label_ref (match_operand 0 "" ""))
105 (pc)))]
106- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
107+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
108 "operands[1] = arm_gen_compare_reg (UNGT, arm_compare_op0, arm_compare_op1);"
109 )
110
111-(define_expand "bunlt"
112+; broken for cirrus
113+(define_expand "bunlt"
114 [(set (pc)
115 (if_then_else (unlt (match_dup 1) (const_int 0))
116 (label_ref (match_operand 0 "" ""))
117 (pc)))]
118- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
119+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
120 "operands[1] = arm_gen_compare_reg (UNLT, arm_compare_op0, arm_compare_op1);"
121@@ -7049,7 +7052,7 @@
122 (if_then_else (unge (match_dup 1) (const_int 0))
123 (label_ref (match_operand 0 "" ""))
124 (pc)))]
125- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
126+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
127 "operands[1] = arm_gen_compare_reg (UNGE, arm_compare_op0, arm_compare_op1);"
128 )
129
130@@ -7058,7 +7061,7 @@
131 (if_then_else (unle (match_dup 1) (const_int 0))
132 (label_ref (match_operand 0 "" ""))
133 (pc)))]
134- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
135+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
136 "operands[1] = arm_gen_compare_reg (UNLE, arm_compare_op0, arm_compare_op1);"
137 )
138
139@@ -7069,7 +7072,7 @@
140 (if_then_else (uneq (match_dup 1) (const_int 0))
141 (label_ref (match_operand 0 "" ""))
142 (pc)))]
143- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
144+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" ;; || TARGET_MAVERICK
145 "operands[1] = arm_gen_compare_reg (UNEQ, arm_compare_op0, arm_compare_op1);"
146 )
147
148@@ -7078,7 +7081,7 @@
149 (if_then_else (ltgt (match_dup 1) (const_int 0))
150 (label_ref (match_operand 0 "" ""))
151 (pc)))]
152- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
153+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" ;; || TARGET_MAVERICK
154 "operands[1] = arm_gen_compare_reg (LTGT, arm_compare_op0, arm_compare_op1);"
155 )
156
157@@ -7086,7 +7089,7 @@
158 ;; Patterns to match conditional branch insns.
159 ;;
160
161-; Special pattern to match UNEQ.
162+; Special pattern to match UNEQ for FPA and VFP.
163 (define_insn "*arm_buneq"
164 [(set (pc)
165 (if_then_else (uneq (match_operand 1 "cc_register" "") (const_int 0))
166@@ -7102,7 +7105,7 @@
167 (set_attr "length" "8")]
168 )
169
170-; Special pattern to match LTGT.
171+; Special pattern to match LTGT for FPA and VFP.
172 (define_insn "*arm_bltgt"
173 [(set (pc)
174 (if_then_else (ltgt (match_operand 1 "cc_register" "") (const_int 0))
175@@ -7118,6 +7121,38 @@
176 (set_attr "length" "8")]
177 )
178
179+; Special pattern to match GE for MAVERICK.
180+(define_insn "*arm_bge"
181+ [(set (pc)
182+ (if_then_else (ge (match_operand 1 "cc_register" "") (const_int 0))
183+ (label_ref (match_operand 0 "" ""))
184+ (pc)))]
185+ "TARGET_ARM && (TARGET_MAVERICK)"
186+ "*
187+ gcc_assert (!arm_ccfsm_state);
188+
189+ return \"beq\\t%l0\;bvs\\t%l0\";
190+ "
191+ [(set_attr "conds" "jump_clob")
192+ (set_attr "length" "8")]
193+)
194+
195+; Special pattern to match UNLT for MAVERICK.
196+(define_insn "*arm_bunlt"
197+ [(set (pc)
198+ (if_then_else (unlt (match_operand 1 "cc_register" "") (const_int 0))
199+ (label_ref (match_operand 0 "" ""))
200+ (pc)))]
201+ "TARGET_ARM && (TARGET_MAVERICK)"
202+ "*
203+ gcc_assert (!arm_ccfsm_state);
204+
205+ return \"bne\\t%l0\;bvc\\t%l0\";
206+ "
207+ [(set_attr "conds" "jump_clob")
208+ (set_attr "length" "8")]
209+)
210+
211 (define_insn "*arm_cond_branch"
212 [(set (pc)
213 (if_then_else (match_operator 1 "arm_comparison_operator"
214@@ -7137,7 +7172,7 @@
215 (set_attr "type" "branch")]
216 )
217
218-; Special pattern to match reversed UNEQ.
219+; Special pattern to match reversed UNEQ for FPA and VFP.
220 (define_insn "*arm_buneq_reversed"
221 [(set (pc)
222 (if_then_else (uneq (match_operand 1 "cc_register" "") (const_int 0))
223@@ -7153,7 +7188,7 @@
224 (set_attr "length" "8")]
225 )
226
227-; Special pattern to match reversed LTGT.
228+; Special pattern to match reversed LTGT for FPA and VFP.
229 (define_insn "*arm_bltgt_reversed"
230 [(set (pc)
231 (if_then_else (ltgt (match_operand 1 "cc_register" "") (const_int 0))
232@@ -7169,6 +7204,39 @@
233 (set_attr "length" "8")]
234 )
235
236+; Special pattern to match reversed GE for MAVERICK.
237+(define_insn "*arm_bge_reversed"
238+ [(set (pc)
239+ (if_then_else (ge (match_operand 1 "cc_register" "") (const_int 0))
240+ (pc)
241+ (label_ref (match_operand 0 "" ""))))]
242+ "TARGET_ARM && (TARGET_MAVERICK)"
243+ "*
244+ gcc_assert (!arm_ccfsm_state);
245+
246+ return \"bne\\t%l0\;bvc\\t%l0\";
247+ "
248+ [(set_attr "conds" "jump_clob")
249+ (set_attr "length" "8")]
250+)
251+
252+; Special pattern to match reversed UNLT for MAVERICK.
253+(define_insn "*arm_bunlt_reversed"
254+ [(set (pc)
255+ (if_then_else (unlt (match_operand 1 "cc_register" "") (const_int 0))
256+ (pc)
257+ (label_ref (match_operand 0 "" ""))))]
258+ "TARGET_ARM && (TARGET_MAVERICK)"
259+ "*
260+ gcc_assert (!arm_ccfsm_state);
261+
262+ return \"beq\\t%l0\;bvs\\t%l0\";
263+ "
264+ [(set_attr "conds" "jump_clob")
265+ (set_attr "length" "8")]
266+)
267+
268+
269 (define_insn "*arm_cond_branch_reversed"
270 [(set (pc)
271 (if_then_else (match_operator 1 "arm_comparison_operator"
272@@ -7220,8 +7288,9 @@
273 "operands[1] = arm_gen_compare_reg (LE, arm_compare_op0, arm_compare_op1);"
274 )
275
276+;; broken for cirrus - definitely
277 (define_expand "sge"
278 [(set (match_operand:SI 0 "s_register_operand" "")
279 (ge:SI (match_dup 1) (const_int 0)))]
280- "TARGET_ARM"
281+ "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
282 "operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);"
283@@ -7227,6 +7296,14 @@
284 "operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);"
285 )
286
287+;;; DO NOT add patterns for SGE these can not be represented with MAVERICK
288+; (define_expand "sge"
289+; [(set (match_operand:SI 0 "s_register_operand" "")
290+; (ge:SI (match_dup 1) (const_int 0)))]
291+; "TARGET_ARM && (TARGET_MAVERICK)"
292+; "gcc_unreachable ();"
293+; )
294+
295 (define_expand "slt"
296 [(set (match_operand:SI 0 "s_register_operand" "")
297 (lt:SI (match_dup 1) (const_int 0)))]
298@@ -7248,6 +7325,7 @@
299 "operands[1] = arm_gen_compare_reg (LEU, arm_compare_op0, arm_compare_op1);"
300 )
301
302+;; broken for cirrus - maybe
303 (define_expand "sgeu"
304 [(set (match_operand:SI 0 "s_register_operand" "")
305 (geu:SI (match_dup 1) (const_int 0)))]
306@@ -7255,6 +7333,14 @@
307 "operands[1] = arm_gen_compare_reg (GEU, arm_compare_op0, arm_compare_op1);"
308 )
309
310+;;; DO NOT add patterns for SGEU these may not be represented with MAVERICK?
311+; (define_expand "sgeu"
312+; [(set (match_operand:SI 0 "s_register_operand" "")
313+; (ge:SI (match_dup 1) (const_int 0)))]
314+; "TARGET_ARM && (TARGET_MAVERICK)"
315+; "gcc_unreachable ();"
316+; )
317+
318 (define_expand "sltu"
319 [(set (match_operand:SI 0 "s_register_operand" "")
320 (ltu:SI (match_dup 1) (const_int 0)))]
321@@ -7281,7 +7367,7 @@
322 (define_expand "sungt"
323 [(set (match_operand:SI 0 "s_register_operand" "")
324 (ungt:SI (match_dup 1) (const_int 0)))]
325- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
326+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
327 "operands[1] = arm_gen_compare_reg (UNGT, arm_compare_op0,
328 arm_compare_op1);"
329 )
330@@ -7289,23 +7375,32 @@
331 (define_expand "sunge"
332 [(set (match_operand:SI 0 "s_register_operand" "")
333 (unge:SI (match_dup 1) (const_int 0)))]
334- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
335+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
336 "operands[1] = arm_gen_compare_reg (UNGE, arm_compare_op0,
337 arm_compare_op1);"
338 )
339
340+; broken for cirrus
341 (define_expand "sunlt"
342 [(set (match_operand:SI 0 "s_register_operand" "")
343 (unlt:SI (match_dup 1) (const_int 0)))]
344- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
345+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
346 "operands[1] = arm_gen_compare_reg (UNLT, arm_compare_op0,
347 arm_compare_op1);"
348 )
349
350+;;; DO NOT add patterns for SUNLT these can't be represented with MAVERICK
351+; (define_expand "sunlt"
352+; [(set (match_operand:SI 0 "s_register_operand" "")
353+; (unlt:SI (match_dup 1) (const_int 0)))]
354+; "TARGET_ARM && (TARGET_MAVERICK)"
355+; "gcc_unreachable ();"
356+; )
357+
358 (define_expand "sunle"
359 [(set (match_operand:SI 0 "s_register_operand" "")
360 (unle:SI (match_dup 1) (const_int 0)))]
361- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
362+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
363 "operands[1] = arm_gen_compare_reg (UNLE, arm_compare_op0,
364 arm_compare_op1);"
365 )
366@@ -7371,7 +7466,7 @@
367 enum rtx_code code = GET_CODE (operands[1]);
368 rtx ccreg;
369
370- if (code == UNEQ || code == LTGT)
371+ if (code == UNEQ || code == LTGT || code == GE || code == UNLT || code == ORDERED || code == UNORDERED)
372 FAIL;
373
374 ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1);
375@@ -7390,7 +7485,8 @@
376 enum rtx_code code = GET_CODE (operands[1]);
377 rtx ccreg;
378
379- if (code == UNEQ || code == LTGT)
380+ if (code == UNEQ || code == LTGT || code == GE || code == UNLT || code == ORDERED || code == UNORDERED)
381+
382 FAIL;
383
384 /* When compiling for SOFT_FLOAT, ensure both arms are in registers.
385@@ -7409,13 +7505,13 @@
386 (if_then_else:DF (match_operand 1 "arm_comparison_operator" "")
387 (match_operand:DF 2 "s_register_operand" "")
388 (match_operand:DF 3 "arm_float_add_operand" "")))]
389- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
390+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
391 "
392 {
393 enum rtx_code code = GET_CODE (operands[1]);
394 rtx ccreg;
395
396- if (code == UNEQ || code == LTGT)
397+ if (code == UNEQ || code == LTGT || code == GE || code == UNLT || code == ORDERED || code == UNORDERED)
398 FAIL;
399
400 ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1);
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-11-16 03:40:37 +0000