diff options
author | Alistair Francis <alistair.francis@wdc.com> | 2019-06-18 17:55:41 -0700 |
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committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2019-06-19 22:13:39 +0100 |
commit | aad42285930da69b316b305acfa164cffd1504c4 (patch) | |
tree | 16ea683efbd046caff79dd90feab36c766b8ce06 /meta/conf/machine/include/riscv/tune-riscv.inc | |
parent | ef82d0230e2286a22500aeb544277bef4c9dca15 (diff) | |
download | poky-aad42285930da69b316b305acfa164cffd1504c4.tar.gz |
qemuriscv64: Add the QEMU RISC-V 64-bit machine
The include is split ready to add the 32-bit RISC-V machine as soon as
glibc supports 32-bit RISC-V.
This is based on the work in the meta-riscv layer, thanks to Khem for
starting this.
(From OE-Core rev: 11b6020dff4550fc3a42e04bc1e86baf37942c62)
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/conf/machine/include/riscv/tune-riscv.inc')
-rw-r--r-- | meta/conf/machine/include/riscv/tune-riscv.inc | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/meta/conf/machine/include/riscv/tune-riscv.inc b/meta/conf/machine/include/riscv/tune-riscv.inc new file mode 100644 index 0000000000..1e3a1081e0 --- /dev/null +++ b/meta/conf/machine/include/riscv/tune-riscv.inc | |||
@@ -0,0 +1,19 @@ | |||
1 | require conf/machine/include/riscv/arch-riscv.inc | ||
2 | |||
3 | TUNEVALID[riscv64] = "Enable 64-bit RISC-V optimizations" | ||
4 | TUNEVALID[riscv32] = "Enable 32-bit RISC-V optimizations" | ||
5 | |||
6 | TUNEVALID[littleendian] = "Little endian mode" | ||
7 | |||
8 | AVAILTUNES += "riscv64 riscv32" | ||
9 | |||
10 | TUNE_FEATURES_tune-riscv64 = "riscv64 littleendian" | ||
11 | TUNE_ARCH_tune-riscv64 = "riscv64" | ||
12 | TUNE_PKGARCH_tune-riscv64 = "riscv64" | ||
13 | PACKAGE_EXTRA_ARCHS_tune-riscv64 = "riscv64" | ||
14 | |||
15 | TUNE_FEATURES_tune-riscv32 = "riscv32 littleendian" | ||
16 | TUNE_ARCH_tune-riscv32 = "riscv32" | ||
17 | TUNE_PKGARCH_tune-riscv32 = "riscv32" | ||
18 | PACKAGE_EXTRA_ARCHS_tune-riscv32 = "riscv32" | ||
19 | |||