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authorAlistair Francis <alistair.francis@wdc.com>2019-06-18 17:55:41 -0700
committerRichard Purdie <richard.purdie@linuxfoundation.org>2019-06-19 22:13:39 +0100
commitaad42285930da69b316b305acfa164cffd1504c4 (patch)
tree16ea683efbd046caff79dd90feab36c766b8ce06 /meta/conf/machine/include/riscv/arch-riscv.inc
parentef82d0230e2286a22500aeb544277bef4c9dca15 (diff)
downloadpoky-aad42285930da69b316b305acfa164cffd1504c4.tar.gz
qemuriscv64: Add the QEMU RISC-V 64-bit machine
The include is split ready to add the 32-bit RISC-V machine as soon as glibc supports 32-bit RISC-V. This is based on the work in the meta-riscv layer, thanks to Khem for starting this. (From OE-Core rev: 11b6020dff4550fc3a42e04bc1e86baf37942c62) Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/conf/machine/include/riscv/arch-riscv.inc')
-rw-r--r--meta/conf/machine/include/riscv/arch-riscv.inc10
1 files changed, 10 insertions, 0 deletions
diff --git a/meta/conf/machine/include/riscv/arch-riscv.inc b/meta/conf/machine/include/riscv/arch-riscv.inc
new file mode 100644
index 0000000000..19f8f3e211
--- /dev/null
+++ b/meta/conf/machine/include/riscv/arch-riscv.inc
@@ -0,0 +1,10 @@
1# RISCV Architecture definition
2
3DEFAULTTUNE ?= "riscv64"
4
5TUNE_ARCH = "${TUNE_ARCH_tune-${DEFAULTTUNE}}"
6TUNE_PKGARCH = "${TUNE_PKGARCH_tune-${DEFAULTTUNE}}"
7TUNE_CCARGS .= ""
8
9# QEMU usermode fails with invalid instruction error (For riscv32)
10MACHINE_FEATURES_BACKFILL_CONSIDERED_append = "${@bb.utils.contains('TUNE_FEATURES', 'riscv32', ' qemu-usermode', '', d)}"