summaryrefslogtreecommitdiffstats
path: root/LICENSE.MIT
diff options
context:
space:
mode:
authorAlexander Kanavin <alex.kanavin@gmail.com>2022-12-30 19:38:40 +0100
committerRichard Purdie <richard.purdie@linuxfoundation.org>2022-12-31 17:08:29 +0000
commitf2bb46285046f53fbfd20ae8cac00786092ce19d (patch)
treed6285c125c929a2f1970b2cf76216704e24e5306 /LICENSE.MIT
parentae4311f25fe8ff739af015c8ac2342a62ca7dcdd (diff)
downloadpoky-f2bb46285046f53fbfd20ae8cac00786092ce19d.tar.gz
conf/machine/include: add x86-64-v3 tunes (AVX, AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, XSAVE)
Qemu 7.2 finally allows us to move beyond building for original Core 2/Core i7 era hardware, and this patch adds support for the newer generations. But first, a bit of background: Recently toolchains gained support for specifying x86-64 'levels' of instruction set support; v3 corresponds to 2013-era Haswell CPUs (and later), with AVX, AVX2 and a few other instructions that were introduced in that generation. I believe this is preferrable to picking a specific CPU model as the baseline. Here's Phoronix's feature article that explains the feature and the available levels: "Both LLVM Clang 12 and GCC 11 are ready to go in offering the new x86-64-v2, x86-64-v3, and x86-64-v4 targets. These x86_64 micro-architecture feature levels have been about coming up with a few "classes" of Intel/AMD CPU processor support rather than continuing to rely on just the x86_64 baseline or targeting a specific CPU family for optimizations. These new levels make it easier to raise the base requirements around Linux x86-64 whether it be for a Linux distribution or a particular software application where the developer/ISV may be wanting to compile with greater instruction set extensions enabled in catering to more recent Intel/AMD CPUs." https://www.phoronix.com/news/GCC-11-x86-64-Feature-Levels Here's gcc docs for it: https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html And here's the formal specification (click on the pdf link): https://gitlab.com/x86-psABIs/x86-64-ABI The actual tune file was created by copying corei7 tunes and doing search/replace on them. Qemu options were dropped as unnecessary. 32 bit tune was dropped as well, as there is no 32 bit only CPU that also supports these new instructions; all of the v3 capable chips are 64 bit. (From OE-Core rev: ac041f90e71dba83b7144c91f929de88aaeae519) Signed-off-by: Alexander Kanavin <alex@linutronix.de> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'LICENSE.MIT')
0 files changed, 0 insertions, 0 deletions