diff options
author | André Draszik <git@andred.net> | 2016-07-26 16:48:59 +0100 |
---|---|---|
committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2016-08-01 11:47:11 +0100 |
commit | b004e3aef97ca65349dd72e6a12a927f21297a18 (patch) | |
tree | a6623b91d8da3905e76095e9f2c066ef4043fc81 | |
parent | 0152d75a6ee60b6037529332117a9382595caf2d (diff) | |
download | poky-b004e3aef97ca65349dd72e6a12a927f21297a18.tar.gz |
qemu: add patch to add mips 24KEc CPU definition
This patch has been accepted upstream:
http://lists.nongnu.org/archive/html/qemu-devel/2016-07/msg05778.html
(From OE-Core rev: b89bd412a69bfda262ed795e970b362ddbec6c68)
Signed-off-by: André Draszik <git@andred.net>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
-rw-r--r-- | meta/recipes-devtools/qemu/qemu.inc | 1 | ||||
-rw-r--r-- | meta/recipes-devtools/qemu/qemu/0001-target-mips-add-24KEc-CPU-definition.patch | 54 |
2 files changed, 55 insertions, 0 deletions
diff --git a/meta/recipes-devtools/qemu/qemu.inc b/meta/recipes-devtools/qemu/qemu.inc index b865223db5..d724aa4bd9 100644 --- a/meta/recipes-devtools/qemu/qemu.inc +++ b/meta/recipes-devtools/qemu/qemu.inc | |||
@@ -21,6 +21,7 @@ SRC_URI = "\ | |||
21 | file://wacom.patch \ | 21 | file://wacom.patch \ |
22 | file://add-ptest-in-makefile.patch \ | 22 | file://add-ptest-in-makefile.patch \ |
23 | file://run-ptest \ | 23 | file://run-ptest \ |
24 | file://0001-target-mips-add-24KEc-CPU-definition.patch \ | ||
24 | " | 25 | " |
25 | 26 | ||
26 | SRC_URI_append_class-native = "\ | 27 | SRC_URI_append_class-native = "\ |
diff --git a/meta/recipes-devtools/qemu/qemu/0001-target-mips-add-24KEc-CPU-definition.patch b/meta/recipes-devtools/qemu/qemu/0001-target-mips-add-24KEc-CPU-definition.patch new file mode 100644 index 0000000000..c4dbee7d71 --- /dev/null +++ b/meta/recipes-devtools/qemu/qemu/0001-target-mips-add-24KEc-CPU-definition.patch | |||
@@ -0,0 +1,54 @@ | |||
1 | From 926bc194f918d46bd93557b15da8153b6a94a1d5 Mon Sep 17 00:00:00 2001 | ||
2 | From: =?UTF-8?q?Andr=C3=A9=20Draszik?= <git@andred.net> | ||
3 | Date: Mon, 25 Jul 2016 23:58:22 +0100 | ||
4 | Subject: [PATCH] target-mips: add 24KEc CPU definition | ||
5 | MIME-Version: 1.0 | ||
6 | Content-Type: text/plain; charset=UTF-8 | ||
7 | Content-Transfer-Encoding: 8bit | ||
8 | |||
9 | Define a new CPU definition supporting 24KEc cores, similar to | ||
10 | the existing 24Kc, but with added support for DSP instructions | ||
11 | and MIPS16e (and without FPU). | ||
12 | |||
13 | Signed-off-by: André Draszik <git@andred.net> | ||
14 | --- | ||
15 | Upstream-Status: Submitted [http://lists.nongnu.org/archive/html/qemu-devel/2016-07/msg05778.html] | ||
16 | target-mips/translate_init.c | 22 ++++++++++++++++++++++ | ||
17 | 1 file changed, 22 insertions(+) | ||
18 | |||
19 | diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c | ||
20 | index 39ed5c4..6ae23e4 100644 | ||
21 | --- a/target-mips/translate_init.c | ||
22 | +++ b/target-mips/translate_init.c | ||
23 | @@ -256,6 +256,28 @@ static const mips_def_t mips_defs[] = | ||
24 | .mmu_type = MMU_TYPE_R4000, | ||
25 | }, | ||
26 | { | ||
27 | + .name = "24KEc", | ||
28 | + .CP0_PRid = 0x00019600, | ||
29 | + .CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) | | ||
30 | + (MMU_TYPE_R4000 << CP0C0_MT), | ||
31 | + .CP0_Config1 = MIPS_CONFIG1 | (15 << CP0C1_MMU) | | ||
32 | + (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) | | ||
33 | + (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA) | | ||
34 | + (1 << CP0C1_CA), | ||
35 | + .CP0_Config2 = MIPS_CONFIG2, | ||
36 | + .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSPP) | (0 << CP0C3_VInt), | ||
37 | + .CP0_LLAddr_rw_bitmask = 0, | ||
38 | + .CP0_LLAddr_shift = 4, | ||
39 | + .SYNCI_Step = 32, | ||
40 | + .CCRes = 2, | ||
41 | + /* we have a DSP, but no FPU */ | ||
42 | + .CP0_Status_rw_bitmask = 0x1378FF1F, | ||
43 | + .SEGBITS = 32, | ||
44 | + .PABITS = 32, | ||
45 | + .insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP, | ||
46 | + .mmu_type = MMU_TYPE_R4000, | ||
47 | + }, | ||
48 | + { | ||
49 | .name = "24Kf", | ||
50 | .CP0_PRid = 0x00019300, | ||
51 | .CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) | | ||
52 | -- | ||
53 | 2.8.1 | ||
54 | |||