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authorKhem Raj <raj.khem@gmail.com>2015-08-16 11:30:03 -0700
committerRichard Purdie <richard.purdie@linuxfoundation.org>2015-08-19 18:05:35 +0100
commit71e18354198276fa7a9c4d343693bec90ec9b50d (patch)
treeed5728e4ab090c71f0d3aa4ae4499dc94eafdf81
parentde17216dd99b79999e8b145b63a540e79dd522e3 (diff)
downloadpoky-71e18354198276fa7a9c4d343693bec90ec9b50d.tar.gz
lzop: Fix build with gcc5 on ppc
It seems all other architectures provide their own definitions for these functions like __ACC_UA_GET_LE16 and this code is exposed only on ppc this is the typical extern inline ( gnu definition ) version c99 semantics, lets use static inline which works both ways (From OE-Core rev: 73bcb12743537e8b0e047b0783dc8f5bb2f62db6) Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
-rw-r--r--meta/recipes-support/lzop/lzop/0001-use-static-inlines-as-the-external-inline-definition.patch100
-rw-r--r--meta/recipes-support/lzop/lzop_1.03.bb4
2 files changed, 103 insertions, 1 deletions
diff --git a/meta/recipes-support/lzop/lzop/0001-use-static-inlines-as-the-external-inline-definition.patch b/meta/recipes-support/lzop/lzop/0001-use-static-inlines-as-the-external-inline-definition.patch
new file mode 100644
index 0000000000..867b88b308
--- /dev/null
+++ b/meta/recipes-support/lzop/lzop/0001-use-static-inlines-as-the-external-inline-definition.patch
@@ -0,0 +1,100 @@
1From ecccbcf66da53779d88e38e2af7f82eff8dde7f8 Mon Sep 17 00:00:00 2001
2From: Khem Raj <raj.khem@gmail.com>
3Date: Sun, 16 Aug 2015 10:35:47 -0700
4Subject: [PATCH] use static inlines as the external inline definition has
5 changed with gcc5
6
7Signed-off-by: Khem Raj <raj.khem@gmail.com>
8---
9Upstream-Status: Pending
10
11 src/miniacc.h | 24 ++++++++----------------
12 1 file changed, 8 insertions(+), 16 deletions(-)
13
14diff --git a/src/miniacc.h b/src/miniacc.h
15index 09e6f0c..cae98d1 100644
16--- a/src/miniacc.h
17+++ b/src/miniacc.h
18@@ -2880,8 +2880,7 @@ typedef void (__acc_cdecl_sighandler *acc_sighandler_t)(acc_signo_t);
19 #if !(ACC_CFG_NO_INLINE_ASM) && (__acc_HAVE_forceinline)
20 #if (ACC_ARCH_POWERPC && ACC_ABI_BIG_ENDIAN) && (ACC_CC_GNUC)
21 #if !defined(ACC_UA_GET_LE16)
22-extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp);
23-extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp) {
24+static __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp) {
25 __acc_ua_volatile const acc_uint16e_t* p = (__acc_ua_volatile const acc_uint16e_t*) pp;
26 unsigned long v;
27 __asm__ __volatile__("lhbrx %0,0,%1" : "=r" (v) : "r" (p), "m" (*p));
28@@ -2890,8 +2889,7 @@ extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const
29 #define ACC_UA_GET_LE16(p) __ACC_UA_GET_LE16(p)
30 #endif
31 #if !defined(ACC_UA_SET_LE16)
32-extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v);
33-extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v) {
34+static __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v) {
35 __acc_ua_volatile acc_uint16e_t* p = (__acc_ua_volatile acc_uint16e_t*) pp;
36 __asm__ __volatile__("sthbrx %2,0,%1" : "=m" (*p) : "r" (p), "r" (v));
37 }
38@@ -2916,8 +2914,7 @@ extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsi
39 #if !(ACC_CFG_NO_INLINE_ASM) && (__acc_HAVE_forceinline)
40 #if (ACC_ARCH_POWERPC && ACC_ABI_BIG_ENDIAN) && (ACC_CC_GNUC)
41 #if !defined(ACC_UA_GET_LE32)
42-extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp);
43-extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp) {
44+static __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp) {
45 __acc_ua_volatile const acc_uint32e_t* p = (__acc_ua_volatile const acc_uint32e_t*) pp;
46 unsigned long v;
47 __asm__ __volatile__("lwbrx %0,0,%1" : "=r" (v) : "r" (p), "m" (*p));
48@@ -2926,8 +2923,7 @@ extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const
49 #define ACC_UA_GET_LE32(p) __ACC_UA_GET_LE32(p)
50 #endif
51 #if !defined(ACC_UA_SET_LE32)
52-extern __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v);
53-extern __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v) {
54+static __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v) {
55 __acc_ua_volatile acc_uint32e_t* p = (__acc_ua_volatile acc_uint32e_t*) pp;
56 __asm__ __volatile__("stwbrx %2,0,%1" : "=m" (*p) : "r" (p), "r" (v));
57 }
58@@ -3307,8 +3303,7 @@ typedef void (__acc_cdecl_sighandler *acc_sighandler_t)(acc_signo_t);
59 #if !(ACC_CFG_NO_INLINE_ASM) && (__acc_HAVE_forceinline)
60 #if (ACC_ARCH_POWERPC && ACC_ABI_BIG_ENDIAN) && (ACC_CC_GNUC)
61 #if !defined(ACC_UA_GET_LE16)
62-extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp);
63-extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp) {
64+static __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp) {
65 __acc_ua_volatile const acc_uint16e_t* p = (__acc_ua_volatile const acc_uint16e_t*) pp;
66 unsigned long v;
67 __asm__ __volatile__("lhbrx %0,0,%1" : "=r" (v) : "r" (p), "m" (*p));
68@@ -3317,8 +3312,7 @@ extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const
69 #define ACC_UA_GET_LE16(p) __ACC_UA_GET_LE16(p)
70 #endif
71 #if !defined(ACC_UA_SET_LE16)
72-extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v);
73-extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v) {
74+static __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v) {
75 __acc_ua_volatile acc_uint16e_t* p = (__acc_ua_volatile acc_uint16e_t*) pp;
76 __asm__ __volatile__("sthbrx %2,0,%1" : "=m" (*p) : "r" (p), "r" (v));
77 }
78@@ -3343,8 +3337,7 @@ extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsi
79 #if !(ACC_CFG_NO_INLINE_ASM) && (__acc_HAVE_forceinline)
80 #if (ACC_ARCH_POWERPC && ACC_ABI_BIG_ENDIAN) && (ACC_CC_GNUC)
81 #if !defined(ACC_UA_GET_LE32)
82-extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp);
83-extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp) {
84+static __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp) {
85 __acc_ua_volatile const acc_uint32e_t* p = (__acc_ua_volatile const acc_uint32e_t*) pp;
86 unsigned long v;
87 __asm__ __volatile__("lwbrx %0,0,%1" : "=r" (v) : "r" (p), "m" (*p));
88@@ -3353,8 +3346,7 @@ extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const
89 #define ACC_UA_GET_LE32(p) __ACC_UA_GET_LE32(p)
90 #endif
91 #if !defined(ACC_UA_SET_LE32)
92-extern __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v);
93-extern __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v) {
94+static __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v) {
95 __acc_ua_volatile acc_uint32e_t* p = (__acc_ua_volatile acc_uint32e_t*) pp;
96 __asm__ __volatile__("stwbrx %2,0,%1" : "=m" (*p) : "r" (p), "r" (v));
97 }
98--
992.5.0
100
diff --git a/meta/recipes-support/lzop/lzop_1.03.bb b/meta/recipes-support/lzop/lzop_1.03.bb
index 1fcd81df6c..07d628908a 100644
--- a/meta/recipes-support/lzop/lzop_1.03.bb
+++ b/meta/recipes-support/lzop/lzop_1.03.bb
@@ -13,7 +13,9 @@ LIC_FILES_CHKSUM = "file://COPYING;md5=dfeaf3dc4beef4f5a7bdbc35b197f39e \
13 13
14SRC_URI = "http://www.lzop.org/download/${BP}.tar.gz \ 14SRC_URI = "http://www.lzop.org/download/${BP}.tar.gz \
15 file://acinclude.m4 \ 15 file://acinclude.m4 \
16 file://x32_abi_miniacc_h.patch " 16 file://x32_abi_miniacc_h.patch \
17 file://0001-use-static-inlines-as-the-external-inline-definition.patch \
18 "
17SRC_URI[md5sum] = "006c5e27fb78cdd14a628fdfa5aa1905" 19SRC_URI[md5sum] = "006c5e27fb78cdd14a628fdfa5aa1905"
18SRC_URI[sha256sum] = "c1425b8c77d49f5a679d5a126c90ea6ad99585a55e335a613cae59e909dbb2c9" 20SRC_URI[sha256sum] = "c1425b8c77d49f5a679d5a126c90ea6ad99585a55e335a613cae59e909dbb2c9"
19 21