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authorMarcin Juszkiewicz <hrw@openedhand.com>2007-10-29 11:00:19 +0000
committerMarcin Juszkiewicz <hrw@openedhand.com>2007-10-29 11:00:19 +0000
commit70abc059ebae6bd18399c0361d348f415a3f631a (patch)
tree86ae8bf44d64d40603b5bca6774eac7f1aaa3ce5
parentce1e498f5d3a46642b6bb14c14ebae2a52f732a4 (diff)
downloadpoky-70abc059ebae6bd18399c0361d348f415a3f631a.tar.gz
u-boot: import OpenMoko uboot from OE
git-svn-id: https://svn.o-hand.com/repos/poky/trunk@3014 311d38ba-8fff-0310-9ca6-ca027cbcb966
Diffstat
-rw-r--r--meta/packages/uboot/u-boot-mkimage-gta01-native_svn.bb18
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/bbt-create-optional.patch52
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/bbt-scan-second.patch69
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/boot-from-ram-and-nand.patch98
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/boot-from-ram-reloc.patch62
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/boot-menu.patch769
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/cmd-unzip.patch58
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/console-ansi.patch127
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/default-env.patch101
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/dontask.patch22
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/dynenv-harden.patch139
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/early-powerdown.patch40
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/enable-splash-bmp.patch56
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/env_nand_oob.patch198
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/ext2load_hex.patch17
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/lowlevel_foo.patch229
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/makefile-no-dirafter.patch17
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/mmcinit-power-up.patch73
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-badisbad.patch30
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-createbbt.patch126
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-dynamic_partitions.patch354
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-otp.patch302
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-read_write_oob.patch23
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/neo1973-chargefast.patch316
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/preboot-override.patch137
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/raise-limits.patch31
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/series76
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/splashimage-command.patch24
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-20061030-neo1973.patch2248
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-20061030-qt2410.patch1233
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-arm920_s3c2410_irq_demux.patch56
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-arm920t-gd_in_irq.patch28
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-bbt-quiet.patch43
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-cmd_s3c2410.patch175
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-cramfs_but_no_jffs2.patch41
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-dfu.patch2081
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-gta02.patch1560
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-hxd8.patch1169
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-license.patch712
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-machtypes.patch4121
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-mokoversion.patch10
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-nand-markbad-reallybad.patch20
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-neo1973-defaultenv.patch31
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-neo1973-resume.patch113
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch45
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-mmc.patch818
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-nand.patch525
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-norelocate_irqvec_cpy.patch32
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-warnings-fix.patch98
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410_fb.patch215
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410_udc.patch1263
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2440.patch1301
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2443.patch256
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-smdk2440.patch1481
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-smdk2443.patch1411
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-strtoul.patch43
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-usbtty-acm.patch1607
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/unbusy-i2c.patch88
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/usbdcore-multiple_configs.patch63
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native/wakeup-reason-nand-only.patch68
-rw-r--r--meta/packages/uboot/u-boot-mkimage-openmoko-native_oe.bb83
-rw-r--r--meta/packages/uboot/uboot-gta01_svn.bb59
-rw-r--r--meta/packages/uboot/uboot-openmoko_svn.bb85
63 files changed, 26669 insertions, 77 deletions
diff --git a/meta/packages/uboot/u-boot-mkimage-gta01-native_svn.bb b/meta/packages/uboot/u-boot-mkimage-gta01-native_svn.bb
deleted file mode 100644
index 7c10d653bc..0000000000
--- a/meta/packages/uboot/u-boot-mkimage-gta01-native_svn.bb
+++ /dev/null
@@ -1,18 +0,0 @@
1require uboot-gta01_svn.bb
2
3PROVIDES = ""
4TARGET_LDFLAGS = ""
5
6do_compile () {
7 chmod +x board/neo1973/gta01/split_by_variant.sh
8 oe_runmake gta01bv3_config
9 oe_runmake clean
10 oe_runmake tools
11}
12
13do_deploy () {
14 install -m 0755 tools/mkimage ${STAGING_BINDIR_NATIVE}/uboot-mkimage
15}
16
17do_deploy[dirs] = "${S}"
18addtask deploy before do_package after do_install
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/bbt-create-optional.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/bbt-create-optional.patch
new file mode 100644
index 0000000000..d7a2a872e5
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/bbt-create-optional.patch
@@ -0,0 +1,52 @@
1This patch makes creation of the BBT optional for the s3c24x0 platform.
2It adds:
3
4- a new platform-independent NAND-wide flag NAND_DONT_CREATE_BBT
5- one user of this flag, namely s3c24x0
6
7Experimental.
8
9- Werner Almesberger <werner@openmoko.org>
10
11
12Index: u-boot/cpu/arm920t/s3c24x0/nand.c
13===================================================================
14--- u-boot.orig/cpu/arm920t/s3c24x0/nand.c 2007-02-16 23:53:29.000000000 +0100
15+++ u-boot/cpu/arm920t/s3c24x0/nand.c 2007-02-16 23:53:54.000000000 +0100
16@@ -169,7 +169,7 @@
17
18 nand->eccmode = NAND_ECC_SOFT;
19 #ifdef CONFIG_S3C2410_NAND_BBT
20- nand->options = NAND_USE_FLASH_BBT;
21+ nand->options = NAND_USE_FLASH_BBT | NAND_DONT_CREATE_BBT;
22 #else
23 nand->options = 0;
24 #endif
25Index: u-boot/drivers/nand/nand_bbt.c
26===================================================================
27--- u-boot.orig/drivers/nand/nand_bbt.c 2007-02-16 23:53:36.000000000 +0100
28+++ u-boot/drivers/nand/nand_bbt.c 2007-02-16 23:53:54.000000000 +0100
29@@ -678,7 +678,8 @@
30 }
31 create:
32 /* Create the bad block table by scanning the device ? */
33- if (!(td->options & NAND_BBT_CREATE))
34+ if (!(td->options & NAND_BBT_CREATE) ||
35+ (this->options & NAND_DONT_CREATE_BBT))
36 continue;
37
38 /* Create the table in memory by scanning the chip(s) */
39Index: u-boot/include/linux/mtd/nand.h
40===================================================================
41--- u-boot.orig/include/linux/mtd/nand.h 2007-02-16 23:53:08.000000000 +0100
42+++ u-boot/include/linux/mtd/nand.h 2007-02-16 23:53:54.000000000 +0100
43@@ -187,7 +187,8 @@
44 * This can only work if we have the ecc bytes directly behind the
45 * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */
46 #define NAND_HWECC_SYNDROME 0x00020000
47-
48+/* Do not create an BBT if none is found. Overrides NAND_BBT_CREATE. */
49+#define NAND_DONT_CREATE_BBT 0x00040000
50
51 /* Options set by nand scan */
52 /* Nand scan has allocated oob_buf */
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/bbt-scan-second.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/bbt-scan-second.patch
new file mode 100644
index 0000000000..37b2807908
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/bbt-scan-second.patch
@@ -0,0 +1,69 @@
1Scan also the second OOB page for bad block information.
2
3board/neo1973/gta01/nand.c (board_nand_init): added board-specific badblock
4 pattern which sets NAND_BBT_SCAN2NDPAGE
5drivers/nand/nand_base.c (nand_block_bad): also consider the second page in a
6 block if NAND_BBT_SCAN2NDPAGE is set
7
8- Werner Almesberger <werner@openmoko.org>
9
10Index: u-boot/board/neo1973/gta01/nand.c
11===================================================================
12--- u-boot.orig/board/neo1973/gta01/nand.c
13+++ u-boot/board/neo1973/gta01/nand.c
14@@ -113,9 +113,23 @@
15 }
16
17
18+/* Derived from drivers/nand/nand_bbt.c:smallpage_flashbased */
19+
20+static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
21+
22+static struct nand_bbt_descr badblock_pattern = {
23+ .options =
24+ NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES | NAND_BBT_SCAN2NDPAGE,
25+ .offs = 5,
26+ .len = 1,
27+ .pattern = scan_ff_pattern
28+};
29+
30+
31 int board_nand_init(struct nand_chip *nand)
32 {
33 nand->read_otp = samsung_nand_read_otp;
34 nand->write_otp = samsung_nand_write_otp;
35+ nand->badblock_pattern = &badblock_pattern;
36 return s3c24x0_nand_init(nand);
37 }
38Index: u-boot/drivers/nand/nand_base.c
39===================================================================
40--- u-boot.orig/drivers/nand/nand_base.c
41+++ u-boot/drivers/nand/nand_base.c
42@@ -421,7 +421,7 @@
43 *
44 * Check, if the block is bad.
45 */
46-static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
47+static int nand_block_bad_page(struct mtd_info *mtd, loff_t ofs, int getchip)
48 {
49 int page, chipnr, res = 0;
50 struct nand_chip *this = mtd->priv;
51@@ -460,6 +460,18 @@
52 return res;
53 }
54
55+static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
56+{
57+ struct nand_chip *this = mtd->priv;
58+
59+ if (nand_block_bad_page(mtd, ofs, getchip))
60+ return 1;
61+ if (this->badblock_pattern->options & NAND_BBT_SCAN2NDPAGE &&
62+ nand_block_bad_page(mtd, ofs+(1 << this->page_shift), getchip))
63+ return 1;
64+ return 0;
65+}
66+
67 /**
68 * nand_default_block_markbad - [DEFAULT] mark a block bad
69 * @mtd: MTD device structure
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/boot-from-ram-and-nand.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/boot-from-ram-and-nand.patch
new file mode 100644
index 0000000000..fa0de39ab7
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/boot-from-ram-and-nand.patch
@@ -0,0 +1,98 @@
1Auto-detect whether we're booting from RAM or NAND, and act accordingly. This
2allows us to use the same u-boot binary for all boot modes.
3
4include/configs/neo1973.h: introduced new config option
5 CONFIG_LL_INIT_NAND_ONLY to perform low-level initialization only when
6 booting from NAND
7include/configs/neo1973.h: got rid of BUILD_FOR_RAM
8cpu/arm920t/start.S: detect if we need to boot from NAND at run time (i.e., if
9 we're running at address 0)
10
11- Werner Almesberger <werner@openmoko.org>
12
13Index: u-boot/cpu/arm920t/start.S
14===================================================================
15--- u-boot.orig/cpu/arm920t/start.S
16+++ u-boot/cpu/arm920t/start.S
17@@ -157,18 +157,26 @@
18 str r1, [r0]
19 #endif /* CONFIG_S3C2400 || CONFIG_S3C2410 */
20
21- /*
22- * we do sys-critical inits only at reboot,
23- * not when booting from ram!
24- */
25 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
26+#ifndef CONFIG_LL_INIT_NAND_ONLY
27 bl cpu_init_crit
28 #endif
29+#endif
30
31 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
32-#ifndef CONFIG_S3C2410_NAND_BOOT
33-relocate: /* relocate U-Boot to RAM */
34 adr r0, _start /* r0 <- current position of code */
35+
36+#ifdef CONFIG_S3C2410_NAND_BOOT
37+ /* are we running from NAND ? */
38+#define BWSCON 0x48000000
39+ ldr r1, =BWSCON /* Z = CPU booted from NAND */
40+ ldr r1, [r1]
41+ tst r1, #6 /* BWSCON[2:1] = OM[1:0] */
42+ teqeq r0, #0 /* Z &= running at address 0 */
43+ beq nand_load
44+#endif /* CONFIG_S3C2410_NAND_BOOT */
45+
46+relocate: /* relocate U-Boot to RAM */
47 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
48 cmp r0, r1 /* don't reloc during debug */
49 beq done_relocate
50@@ -188,10 +196,13 @@
51 ldr pc, _done_relocate /* jump to relocated code */
52 _done_relocate:
53 .word done_relocate
54-done_relocate:
55-#else /* NAND_BOOT */
56-relocate:
57-copy_myself:
58+
59+#ifdef CONFIG_S3C2410_NAND_BOOT
60+nand_load:
61+#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && defined(CONFIG_LL_INIT_NAND_ONLY)
62+ bl cpu_init_crit
63+#endif
64+
65 /* mov r10, lr */
66
67 @ reset NAND
68@@ -275,7 +286,8 @@
69 #endif
70 1: b 1b
71 done_nand_read:
72-#endif /* NAND_BOOT */
73+#endif /* CONFIG_S3C2410_NAND_BOOT */
74+done_relocate:
75 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
76
77 /* Set up the stack */
78Index: u-boot/include/configs/neo1973_gta01.h
79===================================================================
80--- u-boot.orig/include/configs/neo1973_gta01.h
81+++ u-boot/include/configs/neo1973_gta01.h
82@@ -26,14 +26,10 @@
83 #ifndef __CONFIG_H
84 #define __CONFIG_H
85
86-#if defined(BUILD_FOR_RAM)
87-/* If we want to start u-boot from inside RAM */
88-#define CONFIG_SKIP_LOWLEVEL_INIT 1
89-#else
90-/* we want to start u-boot directly from within NAND flash */
91+/* we want to be able to start u-boot directly from within NAND flash */
92+#define CONFIG_LL_INIT_NAND_ONLY
93 #define CONFIG_S3C2410_NAND_BOOT 1
94 #define CONFIG_S3C2410_NAND_SKIP_BAD 1
95-#endif
96
97 #define CFG_UBOOT_SIZE 0x40000 /* size of u-boot, for NAND loading */
98
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/boot-from-ram-reloc.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/boot-from-ram-reloc.patch
new file mode 100644
index 0000000000..53a3e05c67
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/boot-from-ram-reloc.patch
@@ -0,0 +1,62 @@
1This patch allows us to boot from anywhere in RAM. It mainly sets the stage
2for later patches. The only real changes here is the better handling of already
3cached code (e.g., if we were started by a previous instance of u-boot), and
4that we drop CONFIG_SKIP_RELOCATE_UBOOT from neo1973.h
5
6cpu/arm920t/start.S: if not relocating, instead of going straight to
7 stack_setup, jump to done_relocate, which may perform other setup tasks
8cpu/arm920t/start.S: after relocating, flush the cache and jump to the new code
9include/configs/neo1973.h: remove CONFIG_SKIP_RELOCATE_UBOOT
10
11- Werner Almesberger <werner@openmoko.org>
12
13Index: u-boot/cpu/arm920t/start.S
14===================================================================
15--- u-boot.orig/cpu/arm920t/start.S
16+++ u-boot/cpu/arm920t/start.S
17@@ -171,7 +171,7 @@ relocate: /* relocate U-Boot to RAM
18 adr r0, _start /* r0 <- current position of code */
19 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
20 cmp r0, r1 /* don't reloc during debug */
21- beq stack_setup
22+ beq done_relocate
23
24 ldr r2, _armboot_start
25 ldr r3, _bss_start
26@@ -181,8 +181,14 @@ relocate: /* relocate U-Boot to RAM
27 copy_loop:
28 ldmia r0!, {r3-r10} /* copy from source address [r0] */
29 stmia r1!, {r3-r10} /* copy to target address [r1] */
30- cmp r0, r2 /* until source end addreee [r2] */
31+ cmp r0, r2 /* until source end address [r2] */
32 ble copy_loop
33+ mov r0, #0 /* flush v3/v4 cache */
34+ mcr p15, 0, r0, c7, c7, 0
35+ ldr pc, _done_relocate /* jump to relocated code */
36+_done_relocate:
37+ .word done_relocate
38+done_relocate:
39 #else /* NAND_BOOT */
40 relocate:
41 copy_myself:
42@@ -270,7 +276,7 @@ notmatch:
43 1: b 1b
44 done_nand_read:
45 #endif /* NAND_BOOT */
46-#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
47+#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
48
49 /* Set up the stack */
50 stack_setup:
51Index: u-boot/include/configs/neo1973_gta01.h
52===================================================================
53--- u-boot.orig/include/configs/neo1973_gta01.h
54+++ u-boot/include/configs/neo1973_gta01.h
55@@ -28,7 +28,6 @@
56
57 #if defined(BUILD_FOR_RAM)
58 /* If we want to start u-boot from inside RAM */
59-#define CONFIG_SKIP_RELOCATE_UBOOT 1
60 #define CONFIG_SKIP_LOWLEVEL_INIT 1
61 #else
62 /* we want to start u-boot directly from within NAND flash */
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/boot-menu.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/boot-menu.patch
new file mode 100644
index 0000000000..352967ae06
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/boot-menu.patch
@@ -0,0 +1,769 @@
1board/neo1973/bootmenu.c: simple configurable boot menu
2board/neo1973/neo1973.c (neo1973_new_second): return 1 if a new second has
3 started since the last call
4board/neo1973/neo1973.c (neo1973_on_key_pressed): return 1 if the $POWER key is
5 pressed
6board/neo1973/neo1973.c (board_late_init): make use of neo1973_new_second and
7 neo1973_on_key_pressed
8board/neo1973/neo1973.h: added function prototypes
9u-boot/board/neo1973/neo1973.c (board_late_init): enter the boot menu when
10 "AUX" was pressed at least half the time
11u-boot/board/neo1973/neo1973.c (board_late_init): minor code cleanup
12u-boot/common/console.c, include/console.h: added "console_poll_hook" to be
13 called when waiting for console in put in "getc" and "tstc"
14board/neo1973/neo1973.c (board_late_init): poll for the boot menu also on RAM
15 boot, reset, or unknown cause
16board/neo1973/neo1973.c (board_late_init): don't look for the power key if
17 woken up by the charger
18board/neo1973/neo1973.h, board/neo1973/neo1973.c, board/neo1973/bootmenu.c:
19 renamed neo1973_911_key_pressed to neo1973_aux_key_pressed
20
21- Werner Almesberger <werner@openmoko.org>
22
23Index: u-boot/board/neo1973/common/bootmenu.c
24===================================================================
25--- /dev/null
26+++ u-boot/board/neo1973/common/bootmenu.c
27@@ -0,0 +1,120 @@
28+/*
29+ * bootmenu.c - Boot menu
30+ *
31+ * Copyright (C) 2006-2007 by OpenMoko, Inc.
32+ * Written by Werner Almesberger <werner@openmoko.org>
33+ * All Rights Reserved
34+ *
35+ * This program is free software; you can redistribute it and/or modify
36+ * it under the terms of the GNU General Public License as published by
37+ * the Free Software Foundation; either version 2 of the License, or
38+ * (at your option) any later version.
39+ *
40+ * This program is distributed in the hope that it will be useful,
41+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
42+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
43+ * GNU General Public License for more details.
44+ *
45+ * You should have received a copy of the GNU General Public License along
46+ * with this program; if not, write to the Free Software Foundation, Inc.,
47+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
48+ */
49+
50+
51+#include <common.h>
52+#include <environment.h>
53+#include <bootmenu.h>
54+#include <asm/atomic.h>
55+
56+#ifdef CONFIG_USBD_DFU
57+#include "usbdcore.h"
58+#include "usb_dfu.h"
59+#endif
60+
61+#include "neo1973.h"
62+
63+
64+#define DEBOUNCE_LOOPS 1000 /* wild guess */
65+
66+
67+static int debounce(int (*fn)(void), int *last)
68+{
69+ int on, i;
70+
71+again:
72+ on = fn();
73+ if (on != *last)
74+ for (i = DEBOUNCE_LOOPS; i; i--)
75+ if (on != fn())
76+ goto again;
77+ *last = on;
78+ return on;
79+}
80+
81+
82+static int aux_key(void *user)
83+{
84+ static int last_aux = -1;
85+
86+ return debounce(neo1973_aux_key_pressed, &last_aux);
87+}
88+
89+
90+static int on_key(void *user)
91+{
92+ static int last_on = -1;
93+
94+ return debounce(neo1973_on_key_pressed, &last_on);
95+}
96+
97+
98+static void factory_reset(void *user)
99+{
100+ default_env();
101+ run_command("dynpart", 0);
102+ run_command("bootd", 0);
103+}
104+
105+
106+static int seconds(void *user)
107+{
108+ return neo1973_new_second();
109+}
110+
111+
112+static int system_idle(void)
113+{
114+#ifdef CONFIG_USBD_DFU
115+ if (system_dfu_state)
116+ return *system_dfu_state == DFU_STATE_appIDLE;
117+#endif
118+ return 1;
119+}
120+
121+
122+static void poweroff_if_idle(void *user)
123+{
124+ unsigned long flags;
125+
126+ local_irq_save(flags);
127+ if (system_idle())
128+ neo1973_poweroff();
129+ local_irq_restore(flags);
130+}
131+
132+
133+static struct bootmenu_setup bootmenu_setup = {
134+ .next_key = aux_key,
135+ .enter_key = on_key,
136+ .seconds = seconds,
137+ .idle_action = poweroff_if_idle,
138+};
139+
140+
141+void neo1973_bootmenu(void)
142+{
143+ bootmenu_add("Boot", NULL, "bootd");
144+ bootmenu_init(&bootmenu_setup);
145+ bootmenu_add("Factory reset", factory_reset, NULL);
146+ bootmenu();
147+}
148Index: u-boot/board/neo1973/gta01/gta01.c
149===================================================================
150--- u-boot.orig/board/neo1973/gta01/gta01.c
151+++ u-boot/board/neo1973/gta01/gta01.c
152@@ -229,10 +229,15 @@ int board_late_init(void)
153 extern unsigned char booted_from_nand;
154 unsigned char tmp;
155 char buf[32];
156+ int menu_vote = 0; /* <= 0: no, > 0: yes */
157+ int seconds = 0;
158
159 /* Initialize the Power Management Unit with a safe register set */
160 pcf50606_init();
161
162+ /* if there's no other reason, must be regular reset */
163+ neo1973_wakeup_cause = NEO1973_WAKEUP_RESET;
164+
165 if (!booted_from_nand)
166 goto woken_by_reset;
167
168@@ -242,45 +247,41 @@ int board_late_init(void)
169 setenv("pcf50606_int1", buf);
170
171 if (tmp & PCF50606_INT1_ALARM) {
172- /* we've been woken up by RTC alarm or charger insert, boot */
173+ /* we've been woken up by RTC alarm, boot */
174 neo1973_wakeup_cause = NEO1973_WAKEUP_ALARM;
175 goto continue_boot;
176 }
177 if (tmp & PCF50606_INT1_EXTONR) {
178+ /* we've been woken up by charger insert */
179 neo1973_wakeup_cause = NEO1973_WAKEUP_CHARGER;
180 }
181
182 if (tmp & PCF50606_INT1_ONKEYF) {
183- int seconds = 0;
184- neo1973_wakeup_cause = NEO1973_WAKEUP_POWER_KEY;
185 /* we've been woken up by a falling edge of the onkey */
186+ neo1973_wakeup_cause = NEO1973_WAKEUP_POWER_KEY;
187+ }
188
189- /* we can't just setenv(bootdelay,-1) because that would
190- * accidentially become permanent if the user does saveenv */
191- if (neo1973_911_key_pressed())
192- nobootdelay = 1;
193-
194- while (1) {
195- u_int8_t int1, oocs;
196-
197- oocs = pcf50606_reg_read(PCF50606_REG_OOCS);
198- if (oocs & PFC50606_OOCS_ONKEY)
199- break;
200-
201- int1 = pcf50606_reg_read(PCF50606_REG_INT1);
202- if (int1 & PCF50606_INT1_SECOND)
203- seconds++;
204-
205- if (seconds >= POWER_KEY_SECONDS)
206- goto continue_boot;
207- }
208- /* Power off if minimum number of seconds not reached */
209- neo1973_poweroff();
210+ if (neo1973_wakeup_cause == NEO1973_WAKEUP_CHARGER) {
211+ /* if we still think it was only a charger insert, boot */
212+ goto continue_boot;
213 }
214
215 woken_by_reset:
216- /* if there's no other reason, must be regular reset */
217- neo1973_wakeup_cause = NEO1973_WAKEUP_RESET;
218+
219+ while (neo1973_wakeup_cause == NEO1973_WAKEUP_RESET ||
220+ neo1973_on_key_pressed()) {
221+ if (neo1973_aux_key_pressed())
222+ menu_vote++;
223+ else
224+ menu_vote--;
225+
226+ if (neo1973_new_second())
227+ seconds++;
228+ if (seconds >= POWER_KEY_SECONDS)
229+ goto continue_boot;
230+ }
231+ /* Power off if minimum number of seconds not reached */
232+ neo1973_poweroff();
233
234 continue_boot:
235 jbt6k74_init();
236@@ -304,6 +305,11 @@ continue_boot:
237 }
238 #endif
239
240+ if (menu_vote > 0) {
241+ neo1973_bootmenu();
242+ nobootdelay = 1;
243+ }
244+
245 return 0;
246 }
247
248@@ -369,7 +375,17 @@ void neo1973_vibrator(int on)
249 #endif
250 }
251
252-int neo1973_911_key_pressed(void)
253+int neo1973_new_second(void)
254+{
255+ return pcf50606_reg_read(PCF50606_REG_INT1) & PCF50606_INT1_SECOND;
256+}
257+
258+int neo1973_on_key_pressed(void)
259+{
260+ return !(pcf50606_reg_read(PCF50606_REG_OOCS) & PFC50606_OOCS_ONKEY);
261+}
262+
263+int neo1973_aux_key_pressed(void)
264 {
265 S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
266 if (gpio->GPFDAT & (1 << 6))
267Index: u-boot/board/neo1973/gta01/Makefile
268===================================================================
269--- u-boot.orig/board/neo1973/gta01/Makefile
270+++ u-boot/board/neo1973/gta01/Makefile
271@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
272
273 LIB = lib$(BOARD).a
274
275-OBJS := gta01.o pcf50606.o ../common/cmd_neo1973.o ../common/jbt6k74.o ../common/udc.o
276+OBJS := gta01.o pcf50606.o ../common/cmd_neo1973.o ../common/jbt6k74.o ../common/udc.o ../common/bootmenu.o
277 SOBJS := ../common/lowlevel_init.o
278
279 .PHONY: all
280Index: u-boot/board/neo1973/common/neo1973.h
281===================================================================
282--- u-boot.orig/board/neo1973/common/neo1973.h
283+++ u-boot/board/neo1973/common/neo1973.h
284@@ -29,4 +29,10 @@ int neo1973_911_key_pressed(void);
285 const char *neo1973_get_charge_status(void);
286 int neo1973_set_charge_mode(enum neo1973_charger_cmd cmd);
287
288+int neo1973_new_second(void);
289+int neo1973_on_key_pressed(void);
290+int neo1973_aux_key_pressed(void);
291+
292+void neo1973_bootmenu(void);
293+
294 #endif
295Index: u-boot/common/console.c
296===================================================================
297--- u-boot.orig/common/console.c
298+++ u-boot/common/console.c
299@@ -160,8 +160,12 @@ void fprintf (int file, const char *fmt,
300
301 /** U-Boot INITIAL CONSOLE-COMPATIBLE FUNCTION *****************************/
302
303+void (*console_poll_hook)(int activity);
304+
305 int getc (void)
306 {
307+ while (console_poll_hook && !tstc());
308+
309 if (gd->flags & GD_FLG_DEVINIT) {
310 /* Get from the standard input */
311 return fgetc (stdin);
312@@ -171,7 +175,7 @@ int getc (void)
313 return serial_getc ();
314 }
315
316-int tstc (void)
317+static int do_tstc (void)
318 {
319 if (gd->flags & GD_FLG_DEVINIT) {
320 /* Test the standard input */
321@@ -182,6 +186,16 @@ int tstc (void)
322 return serial_tstc ();
323 }
324
325+int tstc (void)
326+{
327+ int ret;
328+
329+ ret = do_tstc();
330+ if (console_poll_hook)
331+ console_poll_hook(ret);
332+ return ret;
333+}
334+
335 void putc (const char c)
336 {
337 #ifdef CONFIG_SILENT_CONSOLE
338Index: u-boot/include/console.h
339===================================================================
340--- u-boot.orig/include/console.h
341+++ u-boot/include/console.h
342@@ -33,6 +33,8 @@
343 extern device_t *stdio_devices[] ;
344 extern char *stdio_names[MAX_FILES] ;
345
346+extern void (*console_poll_hook)(int activity);
347+
348 int console_realloc(int top);
349
350 #endif
351Index: u-boot/common/Makefile
352===================================================================
353--- u-boot.orig/common/Makefile
354+++ u-boot/common/Makefile
355@@ -50,7 +50,8 @@ COBJS = main.o ACEX1K.o altera.o bedbug.
356 memsize.o miiphybb.o miiphyutil.o \
357 s_record.o serial.o soft_i2c.o soft_spi.o spartan2.o spartan3.o \
358 usb.o usb_kbd.o usb_storage.o \
359- virtex2.o xilinx.o crc16.o xyzModem.o cmd_mac.o cmd_mfsl.o
360+ virtex2.o xilinx.o crc16.o xyzModem.o cmd_mac.o cmd_mfsl.o \
361+ bootmenu.o
362
363 SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c)
364 OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS))
365Index: u-boot/common/bootmenu.c
366===================================================================
367--- /dev/null
368+++ u-boot/common/bootmenu.c
369@@ -0,0 +1,311 @@
370+/*
371+ * bootmenu.c - Boot menu
372+ *
373+ * Copyright (C) 2006-2007 by OpenMoko, Inc.
374+ * Written by Werner Almesberger <werner@openmoko.org>
375+ * All Rights Reserved
376+ *
377+ * This program is free software; you can redistribute it and/or modify
378+ * it under the terms of the GNU General Public License as published by
379+ * the Free Software Foundation; either version 2 of the License, or
380+ * (at your option) any later version.
381+ *
382+ * This program is distributed in the hope that it will be useful,
383+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
384+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
385+ * GNU General Public License for more details.
386+ *
387+ * You should have received a copy of the GNU General Public License along
388+ * with this program; if not, write to the Free Software Foundation, Inc.,
389+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
390+ */
391+
392+
393+#include <common.h>
394+
395+#ifdef CFG_BOOTMENU
396+
397+#include <malloc.h>
398+#include <devices.h>
399+#include <console.h>
400+#include <bootmenu.h>
401+
402+
403+extern const char version_string[];
404+
405+
406+#define ANSI_CLEAR "\e[2J"
407+#define ANSI_REVERSE "\e[7m"
408+#define ANSI_NORMAL "\e[m"
409+#define ANSI_GOTOYX "\e[%d;%dH"
410+
411+/*
412+ * MIN_BOOT_MENU_TIMEOUT ensures that users can't by accident set the timeout
413+ * unusably short.
414+ */
415+#define MIN_BOOT_MENU_TIMEOUT 10 /* 10 seconds */
416+#define BOOT_MENU_TIMEOUT 60 /* 60 seconds */
417+#define AFTER_COMMAND_WAIT 3 /* wait (2,3] after running commands */
418+#define MAX_MENU_ITEMS 10 /* cut off after that many */
419+
420+#define TOP_ROW 2
421+#define MENU_0_ROW (TOP_ROW+5)
422+
423+
424+struct option {
425+ const char *label;
426+ void (*fn)(void *user); /* run_command if NULL */
427+ void *user;
428+};
429+
430+
431+static const struct bootmenu_setup *setup;
432+static struct option options[MAX_MENU_ITEMS];
433+static int num_options = 0;
434+static int max_width = 0;
435+
436+static device_t *bm_con;
437+
438+
439+static void bm_printf(const char *fmt, ...)
440+{
441+ va_list args;
442+ char printbuffer[CFG_PBSIZE];
443+
444+ va_start(args, fmt);
445+ vsprintf(printbuffer, fmt, args);
446+ va_end(args);
447+
448+ bm_con->puts(printbuffer);
449+}
450+
451+
452+static char *get_option(int n)
453+{
454+ char name[] = "menu_XX";
455+
456+ sprintf(name+5, "%d", n);
457+ return getenv(name);
458+}
459+
460+
461+static void print_option(const struct option *option, int reverse)
462+{
463+ int n = option-options;
464+
465+ bm_printf(ANSI_GOTOYX, MENU_0_ROW+n, 1);
466+ if (reverse)
467+ bm_printf(ANSI_REVERSE);
468+ bm_printf(" %-*s ", max_width, option->label);
469+ if (reverse)
470+ bm_printf(ANSI_NORMAL);
471+}
472+
473+
474+static int get_var_positive_int(char *var, int default_value)
475+{
476+ const char *s;
477+ char *end;
478+ int n;
479+
480+ s = getenv(var);
481+ if (!s)
482+ return default_value;
483+ n = simple_strtoul(s, &end, 0);
484+ if (!*s || *end || n < 1)
485+ return default_value;
486+ return n;
487+}
488+
489+
490+static void show_bootmenu(void)
491+{
492+ const struct option *option;
493+
494+ bm_printf(ANSI_CLEAR ANSI_GOTOYX "%s", TOP_ROW, 1, version_string);
495+ bm_printf(ANSI_GOTOYX "*** BOOT MENU ***", TOP_ROW+3, 1);
496+ bm_printf(ANSI_GOTOYX, MENU_0_ROW, 1);
497+
498+ for (option = options; option != options+num_options; option++)
499+ print_option(option, option == options);
500+
501+ bm_printf("\n\nPress [AUX] to select, [POWER] to execute.\n");
502+}
503+
504+
505+static void redirect_console(int grab)
506+{
507+ static device_t *orig_stdout, *orig_stderr;
508+
509+ if (grab) {
510+ orig_stdout = stdio_devices[stdout];
511+ orig_stderr = stdio_devices[stderr];
512+ stdio_devices[stdout] = bm_con;
513+ stdio_devices[stderr] = bm_con;
514+ }
515+ else {
516+ /*
517+ * Make this conditional, because the command may also change
518+ * the console.
519+ */
520+ if (stdio_devices[stdout] == bm_con)
521+ stdio_devices[stdout] = orig_stdout;
522+ if (stdio_devices[stderr] == bm_con)
523+ stdio_devices[stderr] = orig_stderr;
524+ }
525+}
526+
527+
528+static void do_option(const struct option *option)
529+{
530+ int seconds, aux;
531+
532+ bm_printf(ANSI_CLEAR ANSI_GOTOYX, 1, 1);
533+ redirect_console(1);
534+
535+ if (option->fn)
536+ option->fn(option->user);
537+ else
538+ run_command(option->user, 0);
539+
540+ redirect_console(0);
541+ seconds = get_var_positive_int("after_command_wait",
542+ AFTER_COMMAND_WAIT);
543+ if (seconds)
544+ bm_printf("\nPress [AUX] to %s.",
545+ option ? "return to boot menu" : "power off");
546+ aux = 1; /* require up-down transition */
547+ while (seconds) {
548+ int tmp;
549+
550+ tmp = setup->next_key(setup->user);
551+ if (tmp && !aux)
552+ break;
553+ aux = tmp;
554+ if (setup->seconds(setup->user))
555+ seconds--;
556+ }
557+ if (!option)
558+ setup->idle_action(setup->idle_action);
559+ show_bootmenu();
560+}
561+
562+
563+static void bootmenu_hook(int activity)
564+{
565+ static int aux = 1, on = 1;
566+ static const struct option *option = options;
567+ static int seconds = 0;
568+ int tmp;
569+
570+ if (activity)
571+ seconds = 0;
572+ tmp = setup->next_key(setup->user);
573+ if (tmp && !aux) {
574+ print_option(option, 0);
575+ option++;
576+ if (option == options+num_options)
577+ option = options;
578+ print_option(option, 1);
579+ seconds = 0;
580+ }
581+ aux = tmp;
582+ tmp = setup->enter_key(setup->user);
583+ if (tmp && !on) {
584+ do_option(option);
585+ option = options;
586+ seconds = 0;
587+ }
588+ on = tmp;
589+ if (setup->seconds(setup->user)) {
590+ int timeout;
591+
592+ timeout = get_var_positive_int("boot_menu_timeout",
593+ BOOT_MENU_TIMEOUT);
594+ if (timeout < MIN_BOOT_MENU_TIMEOUT)
595+ timeout = MIN_BOOT_MENU_TIMEOUT;
596+ if (++seconds > timeout) {
597+ setup->idle_action(setup->idle_action);
598+ seconds = 0;
599+ }
600+ }
601+}
602+
603+
604+static device_t *find_console(const char *name)
605+{
606+ int i;
607+
608+ for (i = 1; i != ListNumItems(devlist); i++) {
609+ device_t *dev = ListGetPtrToItem(devlist, i);
610+
611+ if (!strcmp(name, dev->name))
612+ if (dev->flags & DEV_FLAGS_OUTPUT)
613+ return dev;
614+ }
615+ return NULL;
616+}
617+
618+
619+void bootmenu_add(const char *label, void (*fn)(void *user), void *user)
620+{
621+ int len;
622+
623+ options[num_options].label = label;
624+ options[num_options].fn = fn;
625+ options[num_options].user = user;
626+ num_options++;
627+
628+ len = strlen(label);
629+ if (len > max_width)
630+ max_width = len;
631+}
632+
633+
634+void bootmenu_init(struct bootmenu_setup *__setup)
635+{
636+ int n;
637+
638+ setup = __setup;
639+ for (n = 1; n != MAX_MENU_ITEMS+1; n++) {
640+ const char *spec, *colon;
641+
642+ spec = get_option(n);
643+ if (!spec)
644+ continue;
645+ colon = strchr(spec, ':');
646+ if (!colon)
647+ bootmenu_add(spec, NULL, (char *) spec);
648+ else {
649+ char *label;
650+ int len = colon-spec;
651+
652+ label = malloc(len+1);
653+ if (!label)
654+ return;
655+ memcpy(label, spec, len);
656+ label[len] = 0;
657+ bootmenu_add(label, NULL, (char *) colon+1);
658+ }
659+ }
660+}
661+
662+
663+void bootmenu(void)
664+{
665+ bm_con = find_console("vga");
666+ if (bm_con && bm_con->start && bm_con->start() < 0)
667+ bm_con = NULL;
668+ if (!bm_con)
669+ bm_con = stdio_devices[stdout];
670+ if (!bm_con)
671+ return;
672+#if 0
673+ console_assign(stdout, "vga");
674+ console_assign(stderr, "vga");
675+#endif
676+ show_bootmenu();
677+ console_poll_hook = bootmenu_hook;
678+}
679+
680+#endif /* CFG_BOOTMENU */
681Index: u-boot/include/bootmenu.h
682===================================================================
683--- /dev/null
684+++ u-boot/include/bootmenu.h
685@@ -0,0 +1,71 @@
686+/*
687+ * bootmenu.h - Boot menu
688+ *
689+ * Copyright (C) 2006-2007 by OpenMoko, Inc.
690+ * Written by Werner Almesberger <werner@openmoko.org>
691+ * All Rights Reserved
692+ *
693+ * This program is free software; you can redistribute it and/or modify
694+ * it under the terms of the GNU General Public License as published by
695+ * the Free Software Foundation; either version 2 of the License, or
696+ * (at your option) any later version.
697+ *
698+ * This program is distributed in the hope that it will be useful,
699+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
700+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
701+ * GNU General Public License for more details.
702+ *
703+ * You should have received a copy of the GNU General Public License along
704+ * with this program; if not, write to the Free Software Foundation, Inc.,
705+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
706+ */
707+
708+#ifndef BOOTMENU_H
709+#define BOOTMENU_H
710+
711+#define MIN_BOOT_MENU_TIMEOUT 10 /* 10 seconds */
712+#define BOOT_MENU_TIMEOUT 60 /* 60 seconds */
713+#define AFTER_COMMAND_WAIT 3 /* wait (2,3] after running commands */
714+#define MAX_MENU_ITEMS 10 /* cut off after that many */
715+
716+
717+struct bootmenu_setup {
718+ /* non-zero while the "next" key is being pressed */
719+ int (*next_key)(void *user);
720+
721+ /* non-zero while the "enter" key is being pressed */
722+ int (*enter_key)(void *user);
723+
724+ /* return the number of seconds that have passed since the last call
725+ to "seconds". It's okay to limit the range to [0, 1]. */
726+ int (*seconds)(void *user);
727+
728+ /* action to take if the boot menu times out */
729+ void (*idle_action)(void *user);
730+
731+ /* user-specific data, passes "as is" to the functions above */
732+ void *user;
733+};
734+
735+
736+/*
737+ * Initialize the menu from the environment.
738+ */
739+
740+void bootmenu_init(struct bootmenu_setup *setup);
741+
742+/*
743+ * To add entries on top of the boot menu, call bootmenu_add before
744+ * bootmenu_init. To add entries at the end, call it after bootmenu_init.
745+ * If "fn" is NULL, the command specified in "user" is executed.
746+ */
747+
748+void bootmenu_add(const char *label, void (*fn)(void *user), void *user);
749+
750+/*
751+ * Run the boot menu.
752+ */
753+
754+void bootmenu(void);
755+
756+#endif /* !BOOTMENU_H */
757Index: u-boot/include/configs/neo1973_gta01.h
758===================================================================
759--- u-boot.orig/include/configs/neo1973_gta01.h
760+++ u-boot/include/configs/neo1973_gta01.h
761@@ -160,6 +160,8 @@
762 /* valid baudrates */
763 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
764
765+#define CFG_BOOTMENU
766+
767 /*-----------------------------------------------------------------------
768 * Stack sizes
769 *
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/cmd-unzip.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/cmd-unzip.patch
new file mode 100644
index 0000000000..ee4c1984fc
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/cmd-unzip.patch
@@ -0,0 +1,58 @@
1common/cmd_mem.c: new command "unzip srcaddr dstaddr [dstsize]" to unzip from
2 memory to memory, and option CONFIG_UNZIP to enable it
3
4- Werner Almesberger <werner@openmoko.org>
5
6Index: u-boot/common/cmd_mem.c
7===================================================================
8--- u-boot.orig/common/cmd_mem.c
9+++ u-boot/common/cmd_mem.c
10@@ -1148,6 +1148,34 @@ int do_mem_crc (cmd_tbl_t *cmdtp, int fl
11 }
12 #endif /* CONFIG_CRC32_VERIFY */
13
14+
15+#ifdef CONFIG_UNZIP
16+int gunzip (void *, int, unsigned char *, unsigned long *);
17+
18+int do_unzip ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
19+{
20+ unsigned long src, dst;
21+ unsigned long src_len = ~0UL, dst_len = ~0UL;
22+ int err;
23+
24+ switch (argc) {
25+ case 4:
26+ dst_len = simple_strtoul(argv[3], NULL, 16);
27+ /* fall through */
28+ case 3:
29+ src = simple_strtoul(argv[1], NULL, 16);
30+ dst = simple_strtoul(argv[2], NULL, 16);
31+ break;
32+ default:
33+ printf ("Usage:\n%s\n", cmdtp->usage);
34+ return 1;
35+ }
36+
37+ return !!gunzip((void *) dst, dst_len, (void *) src, &src_len);
38+}
39+#endif /* CONFIG_UNZIP */
40+
41+
42 /**************************************************/
43 #if (CONFIG_COMMANDS & CFG_CMD_MEMORY)
44 U_BOOT_CMD(
45@@ -1251,5 +1279,13 @@ U_BOOT_CMD(
46 );
47 #endif /* CONFIG_MX_CYCLIC */
48
49+#ifdef CONFIG_UNZIP
50+U_BOOT_CMD(
51+ unzip, 4, 1, do_unzip,
52+ "unzip - unzip a memory region\n",
53+ "srcaddr dstaddr [dstsize]\n"
54+);
55+#endif /* CONFIG_UNZIP */
56+
57 #endif
58 #endif /* CFG_CMD_MEMORY */
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/console-ansi.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/console-ansi.patch
new file mode 100644
index 0000000000..2ac5b75dee
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/console-ansi.patch
@@ -0,0 +1,127 @@
1drivers/cfb_console.c: added processing of ANSI escape sequences \e[2J, \e[m,
2 \e[7m, and \e[row;colH
3drivers/cfb_console.c (video_putc): make \r return to the beginning of the line
4
5- Werner Almesberger <werner@openmoko.org>
6
7Index: u-boot/drivers/cfb_console.c
8===================================================================
9--- u-boot.orig/drivers/cfb_console.c
10+++ u-boot/drivers/cfb_console.c
11@@ -181,6 +181,7 @@ CONFIG_VIDEO_HW_CURSOR: - Uses the
12
13 #include <version.h>
14 #include <linux/types.h>
15+#include <linux/ctype.h>
16 #include <devices.h>
17 #include <video_font.h>
18 #ifdef CFG_CMD_DATE
19@@ -676,10 +677,96 @@ static void console_newline (void)
20
21 /*****************************************************************************/
22
23+static enum {
24+ CS_NORMAL = 0,
25+ CS_ESC,
26+ CS_NUM1,
27+ CS_NUM2,
28+} state = 0;
29+
30+static int num1, num2;
31+
32+
33+static void swap_drawing_colors(void)
34+{
35+ eorx = fgx;
36+ fgx = bgx;
37+ bgx = eorx;
38+ eorx = fgx ^ bgx;
39+}
40+
41+
42+static void process_sequence(char c)
43+{
44+ static int inverted = 0;
45+ int i, inv;
46+
47+ switch (c) {
48+ case 'J':
49+ /* assume num1 == 2 */
50+ for (i = 0; i != CONSOLE_ROWS; i++)
51+ console_scrollup();
52+ break;
53+ case 'H':
54+ if (num1 > CONSOLE_ROWS || num2 > CONSOLE_COLS)
55+ break;
56+ console_col = num2 ? num2-1 : 0;
57+ console_row = num1 ? num1-1 : 0;
58+ break;
59+ case 'm':
60+ inv = num1 == 7;
61+ if (num1 && !inv)
62+ break;
63+ if (inverted != inv)
64+ swap_drawing_colors();
65+ inverted = inv;
66+ break;
67+ }
68+}
69+
70+
71+static void escape_sequence(char c)
72+{
73+ switch (state) {
74+ case CS_ESC:
75+ state = c == '[' ? CS_NUM1 : CS_NORMAL;
76+ num1 = num2 = 0;
77+ break;
78+ case CS_NUM1:
79+ if (isdigit(c))
80+ num1 = num1*10+c-'0';
81+ else if (c == ';')
82+ state = CS_NUM2;
83+ else {
84+ process_sequence(c);
85+ state = CS_NORMAL;
86+ }
87+ break;
88+ case CS_NUM2:
89+ if (isdigit(c))
90+ num2 = num2*10+c-'0';
91+ else {
92+ process_sequence(c);
93+ state = CS_NORMAL;
94+ }
95+ default:
96+ /* can't happen */;
97+ }
98+}
99+
100+
101 void video_putc (const char c)
102 {
103+ if (state) {
104+ escape_sequence(c);
105+ CURSOR_SET;
106+ return;
107+ }
108+
109 switch (c) {
110- case 13: /* ignore */
111+ case 13: /* return to beginning of line */
112+ CURSOR_OFF;
113+ console_col = 0;
114 break;
115
116 case '\n': /* next line */
117@@ -698,6 +785,10 @@ void video_putc (const char c)
118 console_back ();
119 break;
120
121+ case '\e':
122+ state = CS_ESC;
123+ break;
124+
125 default: /* draw the char */
126 video_putchar (console_col * VIDEO_FONT_WIDTH,
127 console_row * VIDEO_FONT_HEIGHT,
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/default-env.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/default-env.patch
new file mode 100644
index 0000000000..b9ae4f29fe
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/default-env.patch
@@ -0,0 +1,101 @@
1common/env_common.c (default_env): new function that resets the environment to
2 the default value
3common/env_common.c (env_relocate): use default_env instead of own copy
4common/env_nand.c (env_relocate_spec): use default_env instead of own copy
5include/environment.h: added default_env prototype
6
7- Werner Almesberger <werner@openmoko.org>
8
9Index: u-boot/common/env_common.c
10===================================================================
11--- u-boot.orig/common/env_common.c
12+++ u-boot/common/env_common.c
13@@ -202,6 +202,25 @@ uchar *env_get_addr (int index)
14 }
15 }
16
17+void default_env(void)
18+{
19+ if (sizeof(default_environment) > ENV_SIZE)
20+ {
21+ puts ("*** Error - default environment is too large\n\n");
22+ return;
23+ }
24+
25+ memset (env_ptr, 0, sizeof(env_t));
26+ memcpy (env_ptr->data,
27+ default_environment,
28+ sizeof(default_environment));
29+#ifdef CFG_REDUNDAND_ENVIRONMENT
30+ env_ptr->flags = 0xFF;
31+#endif
32+ env_crc_update ();
33+ gd->env_valid = 1;
34+}
35+
36 void env_relocate (void)
37 {
38 DEBUGF ("%s[%d] offset = 0x%lx\n", __FUNCTION__,__LINE__,
39@@ -245,23 +264,8 @@ void env_relocate (void)
40 gd->env_valid = 0;
41 #endif
42
43- if (gd->env_valid == 0) {
44- if (sizeof(default_environment) > ENV_SIZE)
45- {
46- puts ("*** Error - default environment is too large\n\n");
47- return;
48- }
49-
50- memset (env_ptr, 0, sizeof(env_t));
51- memcpy (env_ptr->data,
52- default_environment,
53- sizeof(default_environment));
54-#ifdef CFG_REDUNDAND_ENVIRONMENT
55- env_ptr->flags = 0xFF;
56-#endif
57- env_crc_update ();
58- gd->env_valid = 1;
59- }
60+ if (gd->env_valid == 0)
61+ default_env();
62 else {
63 env_relocate_spec ();
64 }
65Index: u-boot/common/env_nand.c
66===================================================================
67--- u-boot.orig/common/env_nand.c
68+++ u-boot/common/env_nand.c
69@@ -313,19 +313,7 @@ void env_relocate_spec (void)
70 static void use_default()
71 {
72 puts ("*** Warning - bad CRC or NAND, using default environment\n\n");
73-
74- if (default_environment_size > CFG_ENV_SIZE){
75- puts ("*** Error - default environment is too large\n\n");
76- return;
77- }
78-
79- memset (env_ptr, 0, sizeof(env_t));
80- memcpy (env_ptr->data,
81- default_environment,
82- default_environment_size);
83- env_ptr->crc = crc32(0, env_ptr->data, ENV_SIZE);
84- gd->env_valid = 1;
85-
86+ default_env();
87 }
88 #endif
89
90Index: u-boot/include/environment.h
91===================================================================
92--- u-boot.orig/include/environment.h
93+++ u-boot/include/environment.h
94@@ -107,4 +107,7 @@ typedef struct environment_s {
95 unsigned char data[ENV_SIZE]; /* Environment data */
96 } env_t;
97
98+
99+void default_env(void);
100+
101 #endif /* _ENVIRONMENT_H_ */
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/dontask.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/dontask.patch
new file mode 100644
index 0000000000..23d4b13626
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/dontask.patch
@@ -0,0 +1,22 @@
1common/cmd_nand.c (yes): if the environment variable "dontask" is set to "y" or
2 "Y", non-interactively assume the answer was "yes". In all other cases, ask.
3
4- Werner Almesberger <werner@openmoko.org>
5
6Index: u-boot/common/cmd_nand.c
7===================================================================
8--- u-boot.orig/common/cmd_nand.c
9+++ u-boot/common/cmd_nand.c
10@@ -165,8 +165,12 @@ out:
11
12 static int yes(void)
13 {
14+ char *s;
15 char c;
16
17+ s = getenv("dontask");
18+ if (s && (s[0] =='y' || s[0] == 'Y') && !s[1])
19+ return 1;
20 c = getc();
21 if (c != 'y' && c != 'Y')
22 return 0;
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/dynenv-harden.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/dynenv-harden.patch
new file mode 100644
index 0000000000..cf12352553
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/dynenv-harden.patch
@@ -0,0 +1,139 @@
1common/cmd_nand.c: globalized arg_off_size
2include/util.h: new header to convenience functions, such as arg_off_size
3common/cmd_dynenv.c (do_dynenv): use arg_off_size to sanity-check offset and to
4 allow use of partition name
5common/cmd_dynenv.c (do_dynenv): indicate in no uncertain terms when an update
6 would not work due to Flash bits already cleared
7common/cmd_dynenv.c (do_dynenv): update CFG_ENV_OFFSET after successful "dynenv
8 set", so that we can write the new environment without having to reboot
9
10- Werner Almesberger <werner@openmoko.org>
11
12Index: u-boot/common/cmd_nand.c
13===================================================================
14--- u-boot.orig/common/cmd_nand.c
15+++ u-boot/common/cmd_nand.c
16@@ -100,7 +100,7 @@ static inline int str2long(char *p, ulon
17 return (*p != '\0' && *endptr == '\0') ? 1 : 0;
18 }
19
20-static int
21+int
22 arg_off_size(int argc, char *argv[], nand_info_t *nand, ulong *off, ulong *size)
23 {
24 int idx = nand_curr_device;
25Index: u-boot/include/util.h
26===================================================================
27--- /dev/null
28+++ u-boot/include/util.h
29@@ -0,0 +1,33 @@
30+/*
31+ * util.h - Convenience functions
32+ *
33+ * (C) Copyright 2006-2007 OpenMoko, Inc.
34+ * Author: Werner Almesberger <werner@openmoko.org>
35+ *
36+ * This program is free software; you can redistribute it and/or
37+ * modify it under the terms of the GNU General Public License as
38+ * published by the Free Software Foundation; either version 2 of
39+ * the License, or (at your option) any later version.
40+ *
41+ * This program is distributed in the hope that it will be useful,
42+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
43+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
44+ * GNU General Public License for more details.
45+ *
46+ * You should have received a copy of the GNU General Public License
47+ * along with this program; if not, write to the Free Software
48+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
49+ * MA 02111-1307 USA
50+ */
51+
52+#ifndef UTIL_H
53+#define UTIL_H
54+
55+#include "nand.h"
56+
57+
58+/* common/cmd_nand.c */
59+int arg_off_size(int argc, char *argv[], nand_info_t *nand, ulong *off,
60+ ulong *size);
61+
62+#endif /* UTIL_H */
63Index: u-boot/common/cmd_dynenv.c
64===================================================================
65--- u-boot.orig/common/cmd_dynenv.c
66+++ u-boot/common/cmd_dynenv.c
67@@ -23,6 +23,7 @@
68 #include <malloc.h>
69 #include <environment.h>
70 #include <nand.h>
71+#include <util.h>
72 #include <asm/errno.h>
73
74 #if defined(CFG_ENV_OFFSET_OOB)
75@@ -39,8 +40,8 @@ int do_dynenv(cmd_tbl_t *cmdtp, int flag
76 if (!buf)
77 return -ENOMEM;
78
79+ ret = mtd->read_oob(mtd, 8, size, (size_t *) &size, (u_char *) buf);
80 if (!strcmp(cmd, "get")) {
81- ret = mtd->read_oob(mtd, 8, size, (size_t *) &size, (u_char *) buf);
82
83 if (buf[0] == 'E' && buf[1] == 'N' &&
84 buf[2] == 'V' && buf[3] == '0')
85@@ -49,7 +50,8 @@ int do_dynenv(cmd_tbl_t *cmdtp, int flag
86 printf("No dynamic environment marker in OOB block 0\n");
87
88 } else if (!strcmp(cmd, "set")) {
89- unsigned long addr;
90+ unsigned long addr, dummy;
91+
92 if (argc < 3)
93 goto usage;
94
95@@ -57,7 +59,23 @@ int do_dynenv(cmd_tbl_t *cmdtp, int flag
96 buf[1] = 'N';
97 buf[2] = 'V';
98 buf[3] = '0';
99- addr = simple_strtoul(argv[2], NULL, 16);
100+
101+ if (arg_off_size(argc-2, argv+2, mtd, &addr, &dummy) < 0) {
102+ printf("Offset or partition name expected\n");
103+ goto fail;
104+ }
105+ if (!ret) {
106+ uint8_t tmp[4];
107+ int i;
108+
109+ memcpy(&tmp, &addr, 4);
110+ for (i = 0; i != 4; i++)
111+ if (tmp[i] & ~buf[i+4]) {
112+ printf("ERROR: erase OOB block to "
113+ "write this value\n");
114+ goto fail;
115+ }
116+ }
117 memcpy(buf+4, &addr, 4);
118
119 printf("%02x %02x %02x %02x - %02x %02x %02x %02x\n",
120@@ -65,6 +83,8 @@ int do_dynenv(cmd_tbl_t *cmdtp, int flag
121 buf[4], buf[5], buf[6], buf[7]);
122
123 ret = mtd->write_oob(mtd, 8, size, (size_t *) &size, (u_char *) buf);
124+ if (!ret)
125+ CFG_ENV_OFFSET = addr;
126 } else
127 goto usage;
128
129@@ -72,8 +92,9 @@ int do_dynenv(cmd_tbl_t *cmdtp, int flag
130 return ret;
131
132 usage:
133- free(buf);
134 printf("Usage:\n%s\n", cmdtp->usage);
135+fail:
136+ free(buf);
137 return 1;
138 }
139
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/early-powerdown.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/early-powerdown.patch
new file mode 100644
index 0000000000..7326c2daa6
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/early-powerdown.patch
@@ -0,0 +1,40 @@
1Index: u-boot/board/neo1973/neo1973.c
2===================================================================
3--- u-boot.orig/board/neo1973/gta01/gta01.c
4+++ u-boot/board/neo1973/gta01/gta01.c
5@@ -68,8 +68,12 @@ DECLARE_GLOBAL_DATA_PTR;
6 #define U_M_PDIV 0x2
7 #define U_M_SDIV 0x3
8
9+#define VALID_WAKEUP_REASONS (PCF50606_INT1_ONKEYF | PCF50606_INT1_ALARM)
10+
11 unsigned int neo1973_wakeup_cause;
12 extern int nobootdelay;
13+static unsigned char int1;
14+
15
16 static inline void delay (unsigned long loops)
17 {
18@@ -179,6 +183,13 @@ int board_init (void)
19 #error Please define GTA01 version
20 #endif
21
22+ i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE);
23+ int1 = pcf50606_reg_read(PCF50606_REG_INT1);
24+ if (!(int1 & VALID_WAKEUP_REASONS) && !neo1973_aux_key_pressed()) {
25+ pcf50606_reg_write(PCF50606_REG_OOCC1, PCF50606_OOCC1_GOSTDBY);
26+ while (1);
27+ }
28+
29 /* arch number of SMDK2410-Board */
30 gd->bd->bi_arch_number = MACH_TYPE_NEO1973_GTA01;
31
32@@ -200,7 +211,7 @@ int board_late_init(void)
33 pcf50606_init();
34
35 /* obtain wake-up reason, save INT1 in environment */
36- tmp = pcf50606_reg_read(PCF50606_REG_INT1);
37+ tmp = int1; //pcf50606_reg_read(PCF50606_REG_INT1);
38 sprintf(buf, "0x%02x", tmp);
39 setenv("pcf50606_int1", buf);
40
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/enable-splash-bmp.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/enable-splash-bmp.patch
new file mode 100644
index 0000000000..dcb721c8d3
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/enable-splash-bmp.patch
@@ -0,0 +1,56 @@
1drivers/cfb_console.c: include asm/byteorder.h for le32_to_cpu and friends
2 [ shouldn't someone else have found this long ago ? ]
3include/configs/neo1973.h (CONFIG_COMMANDS): add CFG_CMD_BMP
4include/configs/neo1973.h: enable splash screen and BMP support
5include/configs/neo1973.h: remove #if 1 ... #endif around video definitions
6
7- Werner Almesberger <werner@openmoko.org>
8
9Index: u-boot/drivers/cfb_console.c
10===================================================================
11--- u-boot.orig/drivers/cfb_console.c
12+++ u-boot/drivers/cfb_console.c
13@@ -191,6 +191,7 @@ CONFIG_VIDEO_HW_CURSOR: - Uses the
14 #if (CONFIG_COMMANDS & CFG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
15 #include <watchdog.h>
16 #include <bmp_layout.h>
17+#include <asm/byteorder.h>
18 #endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) || CONFIG_SPLASH_SCREEN */
19
20 /*****************************************************************************/
21Index: u-boot/include/configs/neo1973_gta01.h
22===================================================================
23--- u-boot.orig/include/configs/neo1973_gta01.h
24+++ u-boot/include/configs/neo1973_gta01.h
25@@ -86,6 +86,7 @@
26 /* CFG_CMD_IRQ | */ \
27 CFG_CMD_BOOTD | \
28 CFG_CMD_CONSOLE | \
29+ CFG_CMD_BMP | \
30 CFG_CMD_ASKENV | \
31 CFG_CMD_RUN | \
32 CFG_CMD_ECHO | \
33@@ -244,19 +245,21 @@
34 /* we have a board_late_init() function */
35 #define BOARD_LATE_INIT 1
36
37-#if 1
38 #define CONFIG_VIDEO
39 #define CONFIG_VIDEO_S3C2410
40 #define CONFIG_CFB_CONSOLE
41 #define CONFIG_VIDEO_LOGO
42+#define CONFIG_SPLASH_SCREEN
43+#define CFG_VIDEO_LOGO_MAX_SIZE (640*480+1024+100) /* 100 = slack */
44+#define CONFIG_VIDEO_BMP_GZIP
45 #define CONFIG_VGA_AS_SINGLE_DEVICE
46+#define CONFIG_UNZIP
47
48 #define VIDEO_KBD_INIT_FCT 0
49 #define VIDEO_TSTC_FCT serial_tstc
50 #define VIDEO_GETC_FCT serial_getc
51
52 #define LCD_VIDEO_ADDR 0x33d00000
53-#endif
54
55 #define CONFIG_S3C2410_NAND_BBT 1
56
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/env_nand_oob.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/env_nand_oob.patch
new file mode 100644
index 0000000000..5a2dd61461
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/env_nand_oob.patch
@@ -0,0 +1,198 @@
1This patch adds support for CFG_ENV_OFFSET_PATCHED and
2CFG_ENV_OFFSET_OOB.
3
4Both try to solve the problem of fixing the environment location in NAND flash
5at compile time, which doesn't work well if the NAND flash has a bad block at
6exactly that location.
7
8CFG_ENV_OFFSET_PATCHED puts the environment in a global variable. You can then
9use the linker script to put that variable to a fixed location in the u-boot
10image. Then you can use bianry patching during the production flash process.
11
12The idea of CFG_ENV_OFFSET_OOB is to store the environment offset in the NAND
13OOB data of block 0. We can do this in case the vendor makes a guarantee that
14block 0 never is a factory-default bad block.
15
16Signed-off-by: Harald Welte <laforge@openmoko.org>
17
18Index: u-boot/common/env_nand.c
19===================================================================
20--- u-boot.orig/common/env_nand.c
21+++ u-boot/common/env_nand.c
22@@ -271,6 +271,33 @@
23 ulong total;
24 int ret;
25
26+#if defined(CFG_ENV_OFFSET_OOB)
27+ struct mtd_info *mtd = &nand_info[0];
28+ struct nand_chip *this = mtd->priv;
29+ int buf_len;
30+ uint8_t *buf;
31+
32+ buf_len = (1 << this->bbt_erase_shift);
33+ buf_len += (buf_len >> this->page_shift) * mtd->oobsize;
34+ buf = malloc(buf_len);
35+ if (!buf)
36+ return;
37+
38+ nand_read_raw(mtd, buf, 0, mtd->oobblock, mtd->oobsize);
39+ if (buf[mtd->oobblock + 8 + 0] == 'E' &&
40+ buf[mtd->oobblock + 8 + 1] == 'N' &&
41+ buf[mtd->oobblock + 8 + 2] == 'V' &&
42+ buf[mtd->oobblock + 8 + 3] == '0') {
43+ CFG_ENV_OFFSET = *((unsigned long *) &buf[mtd->oobblock + 8 + 4]);
44+ /* fall through to the normal environment reading code below */
45+ free(buf);
46+ puts("Found Environment offset in OOB..\n");
47+ } else {
48+ free(buf);
49+ return use_default();
50+ }
51+#endif
52+
53 total = CFG_ENV_SIZE;
54 ret = nand_read(&nand_info[0], CFG_ENV_OFFSET, &total, (u_char*)env_ptr);
55 if (ret || total != CFG_ENV_SIZE)
56Index: u-boot/common/environment.c
57===================================================================
58--- u-boot.orig/common/environment.c
59+++ u-boot/common/environment.c
60@@ -29,6 +29,12 @@
61 #undef __ASSEMBLY__
62 #include <environment.h>
63
64+#if defined(CFG_ENV_OFFSET_PATCHED)
65+unsigned long env_offset = CFG_ENV_OFFSET_PATCHED;
66+#elif defined(CFG_ENV_OFFSET_OOB)
67+unsigned long env_offset = CFG_ENV_OFFSET_OOB;
68+#endif
69+
70 /*
71 * Handle HOSTS that have prepended
72 * crap on symbol names, not TARGETS.
73Index: u-boot/include/environment.h
74===================================================================
75--- u-boot.orig/include/environment.h
76+++ u-boot/include/environment.h
77@@ -70,6 +70,10 @@
78 #endif /* CFG_ENV_IS_IN_FLASH */
79
80 #if defined(CFG_ENV_IS_IN_NAND)
81+#if defined(CFG_ENV_OFFSET_PATCHED) || defined(CFG_ENV_OFFSET_OOB)
82+extern unsigned long env_offset;
83+#define CFG_ENV_OFFSET env_offset
84+#else
85 # ifndef CFG_ENV_OFFSET
86 # error "Need to define CFG_ENV_OFFSET when using CFG_ENV_IS_IN_NAND"
87 # endif
88@@ -82,6 +86,7 @@
89 # ifdef CFG_ENV_IS_EMBEDDED
90 # define ENV_IS_EMBEDDED 1
91 # endif
92+#endif /* CFG_ENV_NAND_PATCHED */
93 #endif /* CFG_ENV_IS_IN_NAND */
94
95
96Index: u-boot/common/Makefile
97===================================================================
98--- u-boot.orig/common/Makefile
99+++ u-boot/common/Makefile
100@@ -31,7 +31,7 @@
101 cmd_bdinfo.o cmd_bedbug.o cmd_bmp.o cmd_boot.o cmd_bootm.o \
102 cmd_cache.o cmd_console.o \
103 cmd_date.o cmd_dcr.o cmd_diag.o cmd_display.o cmd_doc.o cmd_dtt.o \
104- cmd_eeprom.o cmd_elf.o cmd_ext2.o \
105+ cmd_dynenv.o cmd_eeprom.o cmd_elf.o cmd_ext2.o \
106 cmd_fat.o cmd_fdc.o cmd_fdt.o cmd_fdos.o cmd_flash.o cmd_fpga.o \
107 cmd_i2c.o cmd_ide.o cmd_immap.o cmd_itest.o cmd_jffs2.o \
108 cmd_load.o cmd_log.o \
109Index: u-boot/common/cmd_dynenv.c
110===================================================================
111--- /dev/null
112+++ u-boot/common/cmd_dynenv.c
113@@ -0,0 +1,85 @@
114+/*
115+ * (C) Copyright 2006-2007 OpenMoko, Inc.
116+ * Author: Harald Welte <laforge@openmoko.org>
117+ *
118+ * This program is free software; you can redistribute it and/or
119+ * modify it under the terms of the GNU General Public License as
120+ * published by the Free Software Foundation; either version 2 of
121+ * the License, or (at your option) any later version.
122+ *
123+ * This program is distributed in the hope that it will be useful,
124+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
125+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
126+ * GNU General Public License for more details.
127+ *
128+ * You should have received a copy of the GNU General Public License
129+ * along with this program; if not, write to the Free Software
130+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
131+ * MA 02111-1307 USA
132+ */
133+
134+#include <common.h>
135+#include <command.h>
136+#include <malloc.h>
137+#include <environment.h>
138+#include <nand.h>
139+#include <asm/errno.h>
140+
141+#if defined(CFG_ENV_OFFSET_OOB)
142+
143+int do_dynenv(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
144+{
145+ struct mtd_info *mtd = &nand_info[0];
146+ int ret, size = 8;
147+ uint8_t *buf;
148+
149+ char *cmd = argv[1];
150+
151+ buf = malloc(mtd->oobsize);
152+ if (!buf)
153+ return -ENOMEM;
154+
155+ if (!strcmp(cmd, "get")) {
156+ ret = mtd->read_oob(mtd, 8, size, (size_t *) &size, (u_char *) buf);
157+
158+ if (buf[0] == 'E' && buf[1] == 'N' &&
159+ buf[2] == 'V' && buf[3] == '0')
160+ printf("0x%08x\n", *((u_int32_t *) &buf[4]));
161+ else
162+ printf("No dynamic environment marker in OOB block 0\n");
163+
164+ } else if (!strcmp(cmd, "set")) {
165+ unsigned long addr;
166+ if (argc < 3)
167+ goto usage;
168+
169+ buf[0] = 'E';
170+ buf[1] = 'N';
171+ buf[2] = 'V';
172+ buf[3] = '0';
173+ addr = simple_strtoul(argv[2], NULL, 16);
174+ memcpy(buf+4, &addr, 4);
175+
176+ printf("%02x %02x %02x %02x - %02x %02x %02x %02x\n",
177+ buf[0], buf[1], buf[2], buf[3],
178+ buf[4], buf[5], buf[6], buf[7]);
179+
180+ ret = mtd->write_oob(mtd, 8, size, (size_t *) &size, (u_char *) buf);
181+ } else
182+ goto usage;
183+
184+ free(buf);
185+ return ret;
186+
187+usage:
188+ free(buf);
189+ printf("Usage:\n%s\n", cmdtp->usage);
190+ return 1;
191+}
192+
193+U_BOOT_CMD(dynenv, 3, 1, do_dynenv,
194+ "dynenv - dynamically placed (NAND) environment\n",
195+ "dynenv set off - set enviromnent offset\n"
196+ "dynenv get - get environment offset\n");
197+
198+#endif /* CFG_ENV_OFFSET_OOB */
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/ext2load_hex.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/ext2load_hex.patch
new file mode 100644
index 0000000000..ff8e9cd6fc
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/ext2load_hex.patch
@@ -0,0 +1,17 @@
1This patch adds the hex-printing of the file size read by 'ext2load'
2
3Signed-off-by: Harald Welte <laforge@openmoko.org>
4
5Index: u-boot.git/common/cmd_ext2.c
6===================================================================
7--- u-boot.git.orig/common/cmd_ext2.c 2007-01-02 18:26:17.000000000 +0100
8+++ u-boot.git/common/cmd_ext2.c 2007-01-02 18:26:27.000000000 +0100
9@@ -279,7 +279,7 @@
10 /* Loading ok, update default load address */
11 load_addr = addr;
12
13- printf ("\n%ld bytes read\n", filelen);
14+ printf ("\n%ld (0x%lx) bytes read\n", filelen, filelen);
15 sprintf(buf, "%lX", filelen);
16 setenv("filesize", buf);
17
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/lowlevel_foo.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/lowlevel_foo.patch
new file mode 100644
index 0000000000..715c46ed81
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/lowlevel_foo.patch
@@ -0,0 +1,229 @@
1board/neo1973/lowlevel_foo.S: http://people.openmoko.org/laforge/tmp/bbt-20070206/lowlevel_foo.S
2board/neo1973/lowlevel_foo.lds: http://people.openmoko.org/laforge/tmp/bbt-20070206/lowlevel_foo.lds
3board/neo1973/Makefile: added building of lowlevel_foo.bin (based on
4 http://people.openmoko.org/laforge/tmp/bbt-20070206/lowlevel_foo.build.sh)
5
6Index: u-boot/board/neo1973/common/lowlevel_foo.S
7===================================================================
8--- /dev/null
9+++ u-boot/board/neo1973/common/lowlevel_foo.S
10@@ -0,0 +1,82 @@
11+
12+_start:
13+ b reset
14+undefvec:
15+ b undefvec
16+swivec:
17+ b swivec
18+pabtvec:
19+ b pabtvec
20+dabtvec:
21+ b dabtvec
22+rsvdvec:
23+ b rsvdvec
24+irqvec:
25+ b irqvec
26+fiqvec:
27+ b fiqvec
28+
29+reset:
30+ /*
31+ * set the cpu to SVC32 mode
32+ */
33+ mrs r0,cpsr
34+ bic r0,r0,#0x1f
35+ orr r0,r0,#0xd3
36+ msr cpsr,r0
37+
38+/* turn off the watchdog */
39+#define pWTCON 0x53000000
40+#define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
41+#define INTSUBMSK 0x4A00001C
42+#define CLKDIVN 0x4C000014 /* clock divisor register */
43+
44+ ldr r0, =pWTCON
45+ mov r1, #0x0
46+ str r1, [r0]
47+
48+ mov r1, #0xffffffff
49+ ldr r0, =INTMSK
50+ str r1, [r0]
51+ ldr r1, =0x3ff
52+ ldr r0, =INTSUBMSK
53+ str r1, [r0]
54+
55+ /* FCLK:HCLK:PCLK = 1:2:4 */
56+ /* default FCLK is 120 MHz ! */
57+ ldr r0, =CLKDIVN
58+ mov r1, #3
59+ str r1, [r0]
60+
61+ bl cpu_init_crit
62+ ldr r0,=TEXT_BASE
63+ mov pc, r0
64+
65+cpu_init_crit:
66+ /*
67+ * flush v4 I/D caches
68+ */
69+ mov r0, #0
70+ mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
71+ mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
72+
73+ /*
74+ * disable MMU stuff and caches
75+ */
76+ mrc p15, 0, r0, c1, c0, 0
77+ bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
78+ bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
79+ orr r0, r0, #0x00000002 @ set bit 2 (A) Align
80+ orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
81+ mcr p15, 0, r0, c1, c0, 0
82+
83+ /*
84+ * before relocating, we have to setup RAM timing
85+ * because memory timing is board-dependend, you will
86+ * find a lowlevel_init.S in your board directory.
87+ */
88+ mov ip, lr
89+ bl lowlevel_init
90+ mov lr, ip
91+ mov pc, lr
92+
93Index: u-boot/board/neo1973/common/lowlevel_foo.lds
94===================================================================
95--- /dev/null
96+++ u-boot/board/neo1973/common/lowlevel_foo.lds
97@@ -0,0 +1,56 @@
98+/*
99+ * (C) Copyright 2002
100+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
101+ *
102+ * See file CREDITS for list of people who contributed to this
103+ * project.
104+ *
105+ * This program is free software; you can redistribute it and/or
106+ * modify it under the terms of the GNU General Public License as
107+ * published by the Free Software Foundation; either version 2 of
108+ * the License, or (at your option) any later version.
109+ *
110+ * This program is distributed in the hope that it will be useful,
111+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
112+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
113+ * GNU General Public License for more details.
114+ *
115+ * You should have received a copy of the GNU General Public License
116+ * along with this program; if not, write to the Free Software
117+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
118+ * MA 02111-1307 USA
119+ */
120+
121+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
122+OUTPUT_ARCH(arm)
123+ENTRY(_start)
124+SECTIONS
125+{
126+ . = 0x00000000;
127+
128+ . = ALIGN(4);
129+ .text :
130+ {
131+ lowlevel_foo.o (.text)
132+ *(.text)
133+ }
134+
135+ . = ALIGN(4);
136+ .rodata : { *(.rodata) }
137+
138+ . = ALIGN(4);
139+ .data : { *(.data) }
140+
141+ . = ALIGN(4);
142+ .got : { *(.got) }
143+
144+ . = .;
145+ __u_boot_cmd_start = .;
146+ .u_boot_cmd : { *(.u_boot_cmd) }
147+ __u_boot_cmd_end = .;
148+
149+ . = ALIGN(4);
150+ __bss_start = .;
151+ .bss : { *(.bss) }
152+ _end = .;
153+}
154Index: u-boot/board/neo1973/gta01/Makefile
155===================================================================
156--- u-boot.orig/board/neo1973/gta01/Makefile
157+++ u-boot/board/neo1973/gta01/Makefile
158@@ -28,14 +28,31 @@
159 OBJS := gta01.o pcf50606.o ../common/cmd_neo1973.o ../common/jbt6k74.o ../common/udc.o
160 SOBJS := ../common/lowlevel_init.o
161
162+.PHONY: all
163+
164+all: $(LIB) lowevel_foo.bin
165+
166 $(LIB): $(OBJS) $(SOBJS)
167 $(AR) crv $@ $(OBJS) $(SOBJS)
168
169+lowlevel_foo.o: ../common/lowlevel_foo.S
170+ $(CC) -c -DTEXT_BASE=0x33F80000 -march=armv4 \
171+ -o lowlevel_foo.o ../common/lowlevel_foo.S
172+
173+lowlevel_foo: lowlevel_foo.o ../common/lowlevel_init.o ../common/lowlevel_foo.lds
174+ $(LD) -T ../common/lowlevel_foo.lds -Ttext 0x33f80000 -Bstatic \
175+ ../common/lowlevel_init.o lowlevel_foo.o -o lowlevel_foo
176+
177+lowevel_foo.bin: lowlevel_foo
178+ $(CROSS_COMPILE)objcopy --gap-fill=0xff -O binary \
179+ lowlevel_foo lowlevel_foo.bin
180+
181+
182 clean:
183- rm -f $(SOBJS) $(OBJS)
184+ rm -f $(SOBJS) $(OBJS) lowlevel_foo lowlevel_foo.o
185
186 distclean: clean
187- rm -f $(LIB) core *.bak .depend
188+ rm -f $(LIB) core *.bak .depend lowlevel_foo.bin
189
190 #########################################################################
191
192Index: u-boot/board/qt2410/Makefile
193===================================================================
194--- u-boot.orig/board/qt2410/Makefile
195+++ u-boot/board/qt2410/Makefile
196@@ -28,14 +28,31 @@
197 OBJS := qt2410.o flash.o
198 SOBJS := lowlevel_init.o
199
200+.PHONY: all
201+
202+all: $(LIB) lowevel_foo.bin
203+
204 $(LIB): $(OBJS) $(SOBJS)
205 $(AR) crv $@ $(OBJS) $(SOBJS)
206
207+lowlevel_foo.o: ../neo1973/common/lowlevel_foo.S
208+ $(CC) -c -DTEXT_BASE=0x33F80000 -march=armv4 \
209+ -o lowlevel_foo.o ../neo1973/common/lowlevel_foo.S
210+
211+lowlevel_foo: lowlevel_foo.o lowlevel_init.o \
212+ ../neo1973/common/lowlevel_foo.lds
213+ $(LD) -T ../neo1973/common/lowlevel_foo.lds -Ttext 0x33f80000 -Bstatic \
214+ lowlevel_init.o lowlevel_foo.o -o lowlevel_foo
215+
216+lowevel_foo.bin: lowlevel_foo
217+ $(CROSS_COMPILE)objcopy --gap-fill=0xff -O binary \
218+ lowlevel_foo lowlevel_foo.bin
219+
220 clean:
221- rm -f $(SOBJS) $(OBJS)
222+ rm -f $(SOBJS) $(OBJS) lowlevel_foo lowlevel_foo.o
223
224 distclean: clean
225- rm -f $(LIB) core *.bak .depend
226+ rm -f $(LIB) core *.bak .depend lowlevel_foo.bin
227
228 #########################################################################
229
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/makefile-no-dirafter.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/makefile-no-dirafter.patch
new file mode 100644
index 0000000000..2ed26c3127
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/makefile-no-dirafter.patch
@@ -0,0 +1,17 @@
1Index: git/tools/Makefile
2===================================================================
3--- git.orig/tools/Makefile 2007-10-03 16:51:38.000000000 +0100
4+++ git/tools/Makefile 2007-10-03 16:52:03.000000000 +0100
5@@ -114,9 +114,9 @@
6 #
7 # Use native tools and options
8 #
9-CPPFLAGS = -idirafter $(SRCTREE)/include \
10- -idirafter $(OBJTREE)/include2 \
11- -idirafter $(OBJTREE)/include \
12+CPPFLAGS = -I$(SRCTREE)/include \
13+ -I$(OBJTREE)/include2 \
14+ -I$(OBJTREE)/include \
15 -DTEXT_BASE=$(TEXT_BASE) -DUSE_HOSTCC
16 CFLAGS = $(HOST_CFLAGS) $(CPPFLAGS) -O
17 AFLAGS = -D__ASSEMBLY__ $(CPPFLAGS)
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/mmcinit-power-up.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/mmcinit-power-up.patch
new file mode 100644
index 0000000000..fcf54b9fd1
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/mmcinit-power-up.patch
@@ -0,0 +1,73 @@
1board/neo1973/neo1973.c (board_late_init): moved MMC power-up to separate
2 function
3cpu/arm920t/s3c24x0/mmc.c (mmc_init): call mmc_power_up and return -ENODEV
4 immediately if there is no card
5
6- Werner Almesberger <werner@openmoko.org>
7
8Index: u-boot/board/neo1973/neo1973.c
9===================================================================
10--- u-boot.orig/board/neo1973/neo1973.c
11+++ u-boot/board/neo1973/neo1973.c
12@@ -223,6 +223,19 @@ int board_init (void)
13 return 0;
14 }
15
16+int mmc_power_up(void)
17+{
18+#if defined(CONFIG_ARCH_GTA01B_v4)
19+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
20+
21+ /* check if sd card is inserted, and power-up if it is */
22+ if (gpio->GPFDAT & (1 << 5))
23+ return 0;
24+ gpio->GPBDAT &= ~(1 << 2);
25+#endif /* !CONFIG_ARCH_GTA01B_v4 */
26+ return 1;
27+}
28+
29 int board_late_init(void)
30 {
31 unsigned char tmp;
32@@ -289,14 +302,8 @@ continue_boot:
33 /* switch on the backlight */
34 neo1973_backlight(1);
35
36-#if defined(CONFIG_ARCH_GTA01B_v4)
37- {
38- /* check if sd card is inserted, and power-up if it is */
39- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
40- if (!(gpio->GPFDAT & (1 << 5)))
41- gpio->GPBDAT &= ~(1 << 2);
42- }
43-#endif
44+ /* check if sd card is inserted, and power-up if it is */
45+ mmc_power_up();
46
47 return 0;
48 }
49Index: u-boot/cpu/arm920t/s3c24x0/mmc.c
50===================================================================
51--- u-boot.orig/cpu/arm920t/s3c24x0/mmc.c
52+++ u-boot/cpu/arm920t/s3c24x0/mmc.c
53@@ -381,6 +381,11 @@ static void print_sd_cid(const struct sd
54 cid->crc >> 1, cid->crc & 1);
55 }
56
57+int __attribute__((weak)) mmc_power_up(void)
58+{
59+ return 1;
60+}
61+
62 int mmc_init(int verbose)
63 {
64 int retries, rc = -ENODEV;
65@@ -393,6 +398,8 @@ int mmc_init(int verbose)
66 debug("mmc_init(PCLK=%u)\n", get_PCLK());
67
68 clk_power->CLKCON |= (1 << 9);
69+ if (!mmc_power_up())
70+ return -ENODEV;
71
72 /* S3C2410 has some bug that prevents reliable operation at higher speed */
73 //sdi->SDIPRE = 0x3e; /* SDCLK = PCLK/2 / (SDIPRE+1) = 396kHz */
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-badisbad.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-badisbad.patch
new file mode 100644
index 0000000000..a5800e2499
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-badisbad.patch
@@ -0,0 +1,30 @@
1This patch makes nand_block_checkbad check both the BBT and the actual
2OOB data. This avoids accidently passing blocks as good when BBT and
3OOB markers are not synchronized, e.g., before "nand createbbt".
4
5Experimental.
6
7- Werner Almesberger <werner@openmoko.org>
8
9Index: u-boot/drivers/nand/nand_base.c
10===================================================================
11--- u-boot.orig/drivers/nand/nand_base.c
12+++ u-boot/drivers/nand/nand_base.c
13@@ -517,11 +517,14 @@ static int nand_block_checkbad (struct m
14 {
15 struct nand_chip *this = mtd->priv;
16
17- if (!this->bbt)
18- return this->block_bad(mtd, ofs, getchip);
19+ if (this->block_bad(mtd, ofs, getchip))
20+ return 1;
21
22 /* Return info from the table */
23- return nand_isbad_bbt (mtd, ofs, allowbbt);
24+ if (this->bbt && nand_isbad_bbt (mtd, ofs, allowbbt))
25+ return 1;
26+
27+ return 0;
28 }
29
30 /**
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-createbbt.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-createbbt.patch
new file mode 100644
index 0000000000..74b79da0a9
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-createbbt.patch
@@ -0,0 +1,126 @@
1This patch adds user-requested BBT creation. It includes the following changes:
2
3- common/cmd_nand.c: move yes/no decision to separate function
4- do_nand: ask for confirmation for "nand erase"
5- do_nand: add command "nand createbbt" to erase NAND and create a new BBT
6
7Experimental.
8
9- Werner Almesberger <werner@openmoko.org>
10
11
12Index: u-boot/common/cmd_nand.c
13===================================================================
14--- u-boot.orig/common/cmd_nand.c 2007-02-16 23:53:28.000000000 +0100
15+++ u-boot/common/cmd_nand.c 2007-02-16 23:53:57.000000000 +0100
16@@ -163,6 +163,17 @@
17 return 0;
18 }
19
20+static int yes(void)
21+{
22+ char c;
23+
24+ c = getc();
25+ if (c != 'y' && c != 'Y')
26+ return 0;
27+ c = getc();
28+ return c == '\r' || c == '\n';
29+}
30+
31 int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
32 {
33 int i, dev, ret;
34@@ -228,7 +239,8 @@
35 strncmp(cmd, "read", 4) != 0 && strncmp(cmd, "write", 5) != 0 &&
36 strcmp(cmd, "scrub") != 0 && strcmp(cmd, "markbad") != 0 &&
37 strcmp(cmd, "biterr") != 0 &&
38- strcmp(cmd, "lock") != 0 && strcmp(cmd, "unlock") != 0 )
39+ strcmp(cmd, "lock") != 0 && strcmp(cmd, "unlock") != 0 &&
40+ strcmp(cmd, "createbbt") != 0 )
41 goto usage;
42
43 /* the following commands operate on the current device */
44@@ -283,13 +295,23 @@
45 "are sure of what you are doing!\n"
46 "\nReally scrub this NAND flash? <y/N>\n");
47
48- if (getc() == 'y' && getc() == '\r') {
49+ if (yes()) {
50 opts.scrub = 1;
51 } else {
52 puts("scrub aborted\n");
53 return -1;
54 }
55 }
56+ else {
57+ if (opts.length == nand->size) {
58+ puts("Really erase everything ? <y/N>\n");
59+ if (!yes()) {
60+ puts("erase aborted\n");
61+ return -1;
62+ }
63+ }
64+ }
65+
66 ret = nand_erase_opts(nand, &opts);
67 printf("%s\n", ret ? "ERROR" : "OK");
68
69@@ -458,6 +480,33 @@
70 return 0;
71 }
72
73+ if (strcmp(cmd, "createbbt") == 0) {
74+ struct nand_chip *nand_chip = nand->priv;
75+ nand_erase_options_t opts;
76+
77+ puts("Create BBT and erase everything ? <y/N>\n");
78+ if (!yes()) {
79+ puts("createbbt aborted\n");
80+ return -1;
81+ }
82+ memset(&opts, 0, sizeof(opts));
83+ opts.length = nand->size;
84+ if (nand_erase_opts(nand, &opts)) {
85+ puts("Erase failed\n");
86+ return 1;
87+ }
88+ nand_chip->options &= ~NAND_DONT_CREATE_BBT;
89+ puts("Creating BBT. Please wait ...");
90+ if (nand_default_bbt(nand)) {
91+ puts("\nFailed\n");
92+ return 1;
93+ }
94+ else {
95+ puts("\n");
96+ return 0;
97+ }
98+ }
99+
100 usage:
101 printf("Usage:\n%s\n", cmdtp->usage);
102 return 1;
103@@ -478,7 +527,8 @@
104 "nand markbad off - mark bad block at offset (UNSAFE)\n"
105 "nand biterr off - make a bit error at offset (UNSAFE)\n"
106 "nand lock [tight] [status] - bring nand to lock state or display locked pages\n"
107- "nand unlock [offset] [size] - unlock section\n");
108+ "nand unlock [offset] [size] - unlock section\n"
109+ "nand createbbt - create bad block table\n");
110
111 static int nand_load_image(cmd_tbl_t *cmdtp, nand_info_t *nand,
112 ulong offset, ulong addr, char *cmd)
113Index: u-boot/drivers/nand/nand_bbt.c
114===================================================================
115--- u-boot.orig/drivers/nand/nand_bbt.c 2007-02-16 23:53:54.000000000 +0100
116+++ u-boot/drivers/nand/nand_bbt.c 2007-02-16 23:53:57.000000000 +0100
117@@ -795,7 +795,8 @@
118
119 len = mtd->size >> (this->bbt_erase_shift + 2);
120 /* Allocate memory (2bit per block) */
121- this->bbt = kmalloc (len, GFP_KERNEL);
122+ if (!this->bbt)
123+ this->bbt = kmalloc (len, GFP_KERNEL);
124 if (!this->bbt) {
125 printk (KERN_ERR "nand_scan_bbt: Out of memory\n");
126 return -ENOMEM;
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-dynamic_partitions.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-dynamic_partitions.patch
new file mode 100644
index 0000000000..ecce004ca6
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-dynamic_partitions.patch
@@ -0,0 +1,354 @@
1This patch adds support for 'dynamic partitions'. This basically
2works as follows:
3* The nand code generates a bad-block-table at the first scan of the chip
4* The dynamic partition code calculates the raw partition sizes based on
5 the bad block table. E.g. if you have a partition of size 0x30000, and there are
6 two bad blocks (0x4000 each) in it, the raw size will increase to 0x38000, and the
7 following partitions get shifted towards the end of flash.
8
9Please note that currently the desired partition sizes are stored at compile-time
10in an array in drivers/nand/nand_bbt.c, so this definitely needs to change before
11submitting/merging upstream.
12
13In order to calculate the partiton map (and set mtdparts accordingly), you can use
14the 'dynpart' command at the prompt. Use 'saveenv' to make the setting permanent.
15
16Signed-off-by: Harald Welte <laforge@openmoko.org>
17
18Index: u-boot/drivers/nand/nand_bbt.c
19===================================================================
20--- u-boot.orig/drivers/nand/nand_bbt.c
21+++ u-boot/drivers/nand/nand_bbt.c
22@@ -1044,9 +1044,86 @@
23 switch ((int)res) {
24 case 0x00: return 0;
25 case 0x01: return 1;
26+ case 0x03: return 1;
27 case 0x02: return allowbbt ? 0 : 1;
28 }
29 return 1;
30 }
31
32+#if defined(CONFIG_NAND_DYNPART)
33+
34+extern unsigned int dynpart_size[];
35+extern char *dynpart_names[];
36+
37+#define MTDPARTS_MAX_SIZE 512
38+
39+
40+static int skip_offs(const struct nand_chip *this, unsigned int offs)
41+{
42+ int block = (int) (offs >> (this->bbt_erase_shift - 1));
43+ u_int8_t bbt = (this->bbt[block >> 3] >> (block & 0x06)) & 0x03;
44+
45+ return bbt == 3;
46+}
47+
48+int nand_create_mtd_dynpart(struct mtd_info *mtd)
49+{
50+ struct nand_chip *this = mtd->priv;
51+ int part;
52+ char *mtdparts;
53+ unsigned int cur_offs = 0;
54+
55+ mtdparts = malloc(MTDPARTS_MAX_SIZE); /* FIXME: bounds checking */
56+ if (!mtdparts)
57+ return -ENOMEM;
58+
59+ sprintf(mtdparts, "mtdparts=" CFG_NAND_DYNPART_MTD_KERNEL_NAME ":");
60+
61+ for (part = 0; dynpart_size[part] != 0; part++) {
62+ unsigned int bb_delta = 0;
63+ unsigned int offs = 0;
64+ char mtdpart[32];
65+
66+ for (offs = cur_offs;
67+ offs < cur_offs + dynpart_size[part] + bb_delta;
68+ offs += mtd->erasesize) {
69+ if (skip_offs(this, offs))
70+ bb_delta += mtd->erasesize;
71+ }
72+
73+ /*
74+ * Absorb bad blocks immediately following this partition also
75+ * into the partition, in order to make next partition start
76+ * with a good block. This simplifies handling of the
77+ * environment partition.
78+ */
79+ while (offs < this->chipsize && skip_offs(this, offs)) {
80+ bb_delta += mtd->erasesize;
81+ offs += mtd->erasesize;
82+ }
83+
84+ if (cur_offs + dynpart_size[part] + bb_delta > this->chipsize)
85+ dynpart_size[part] = this->chipsize - cur_offs - bb_delta;
86+#if 0
87+ printf("partition %u: start = 0x%08x, end=%08x size=%08x, size_inc_bb=%08x\n",
88+ part, cur_offs, cur_offs + dynpart_size[part] + bb_delta,
89+ dynpart_size[part], dynpart_size[part] + bb_delta);
90+#endif
91+ cur_offs += dynpart_size[part] + bb_delta;
92+ sprintf(mtdpart, "0x%.8x(%.16s),", dynpart_size[part] + bb_delta,
93+ dynpart_names[part]);
94+ mtdpart[sizeof(mtdpart)-1] = '\0';
95+ strncat(mtdparts, mtdpart,
96+ MTDPARTS_MAX_SIZE-strlen(mtdparts)-1);
97+ }
98+
99+ mtdparts[strlen(mtdparts)-1] = '\0';
100+ printf("mtdparts %s\n", mtdparts);
101+ setenv("mtdparts", mtdparts);
102+
103+ free(mtdparts);
104+ return 0;
105+}
106+#endif /* CONFIG_NAND_DYNPART */
107+
108 #endif
109Index: u-boot/include/configs/neo1973_gta01.h
110===================================================================
111--- u-boot.orig/include/configs/neo1973_gta01.h
112+++ u-boot/include/configs/neo1973_gta01.h
113@@ -99,7 +99,7 @@
114 CFG_CMD_ELF | \
115 CFG_CMD_MISC | \
116 /* CFG_CMD_USB | */ \
117- /* CFG_CMD_JFFS2 | */ \
118+ CFG_CMD_JFFS2 | \
119 CFG_CMD_DIAG | \
120 /* CFG_CMD_HWFLOW | */ \
121 CFG_CMD_SAVES | \
122@@ -212,13 +212,13 @@
123 #define CONFIG_FAT 1
124 #define CONFIG_SUPPORT_VFAT
125
126-#if 0
127+#if 1
128 /* JFFS2 driver */
129 #define CONFIG_JFFS2_CMDLINE 1
130 #define CONFIG_JFFS2_NAND 1
131 #define CONFIG_JFFS2_NAND_DEV 0
132-#define CONFIG_JFFS2_NAND_OFF 0x634000
133-#define CONFIG_JFFS2_NAND_SIZE 0x39cc000
134+//#define CONFIG_JFFS2_NAND_OFF 0x634000
135+//#define CONFIG_JFFS2_NAND_SIZE 0x39cc000
136 #endif
137
138 /* ATAG configuration */
139@@ -257,4 +257,9 @@
140
141 #define CONFIG_DRIVER_PCF50606 1
142
143+#define MTDIDS_DEFAULT "nand0=neo1973-nand"
144+#define MTPARTS_DEFAULT "neo1973-nand:256k(u-boot),16k(u-boot_env),2M(kernel),640k(splash),-(jffs2)"
145+#define CFG_NAND_DYNPART_MTD_KERNEL_NAME "neo1973-nand"
146+#define CONFIG_NAND_DYNPART
147+
148 #endif /* __CONFIG_H */
149Index: u-boot/common/cmd_jffs2.c
150===================================================================
151--- u-boot.orig/common/cmd_jffs2.c
152+++ u-boot/common/cmd_jffs2.c
153@@ -1841,6 +1841,29 @@
154 return NULL;
155 }
156
157+/* Return the 'net size' of the partition (i.e. excluding any bad blocks) */
158+unsigned int nand_net_part_size(struct part_info *part)
159+{
160+ struct mtd_info *mtd;
161+ unsigned int offs;
162+ unsigned int bb_delta = 0;
163+
164+ if (!part || !part->dev || !part->dev->id ||
165+ part->dev->id->num >= CFG_MAX_NAND_DEVICE)
166+ return 0;
167+
168+ mtd = &nand_info[part->dev->id->num];
169+
170+ for (offs = part->offset; offs < part->offset + part->size;
171+ offs += mtd->erasesize) {
172+ if (nand_isbad_bbt(mtd, offs, 0))
173+ bb_delta += mtd->erasesize;
174+ }
175+
176+ return part->size - bb_delta;
177+}
178+
179+
180 /***************************************************/
181 /* U-boot commands */
182 /***************************************************/
183@@ -2132,6 +2155,24 @@
184 printf ("Usage:\n%s\n", cmdtp->usage);
185 return 1;
186 }
187+
188+#if defined(CONFIG_NAND_DYNPART)
189+extern int nand_create_mtd_dynpart(struct mtd_info *mtd);
190+
191+int do_dynpart(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
192+{
193+#if 0
194+ int i = simple_strtoul(argv[1], NULL, 0);
195+ if (i >= CFG_MAX_NAND_DEVICE)
196+ return -EINVAL;
197+#endif
198+ nand_create_mtd_dynpart(&nand_info[0]);
199+
200+ return 0;
201+}
202+#endif /* CONFIG_NAND_DYNPART */
203+
204+
205 #endif /* #ifdef CONFIG_JFFS2_CMDLINE */
206
207 /***************************************************/
208@@ -2197,6 +2238,15 @@
209 "<name> := '(' NAME ')'\n"
210 "<ro-flag> := when set to 'ro' makes partition read-only (not used, passed to kernel)\n"
211 );
212+
213+#if defined(CONFIG_NAND_DYNPART)
214+U_BOOT_CMD(
215+ dynpart, 1, 1, do_dynpart,
216+ "dynpart\t- dynamically calculate partition table based on BBT\n",
217+ "\n"
218+ " - sets 'mtdparts' according to BBT\n");
219+#endif /* CONFIG_NAND_DYNPART */
220+
221 #endif /* #ifdef CONFIG_JFFS2_CMDLINE */
222
223 /***************************************************/
224Index: u-boot/common/cmd_nand.c
225===================================================================
226--- u-boot.orig/common/cmd_nand.c
227+++ u-boot/common/cmd_nand.c
228@@ -101,7 +101,7 @@
229 }
230
231 int
232-arg_off_size(int argc, char *argv[], nand_info_t *nand, ulong *off, ulong *size)
233+arg_off_size(int argc, char *argv[], nand_info_t *nand, ulong *off, ulong *size, int net)
234 {
235 int idx = nand_curr_device;
236 #if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
237@@ -122,10 +122,17 @@
238 printf("'%s' is not a number\n", argv[1]);
239 return -1;
240 }
241- if (*size > part->size)
242- *size = part->size;
243+ if (*size > part->size) {
244+ if (net)
245+ *size = nand_net_part_size(part);
246+ else
247+ *size = part->size;
248+ }
249 } else {
250- *size = part->size;
251+ if (net)
252+ *size = nand_net_part_size(part);
253+ else
254+ *size = part->size;
255 }
256 idx = dev->id->num;
257 *nand = nand_info[idx];
258@@ -261,7 +268,7 @@
259
260 printf("\nNAND %s: ", scrub ? "scrub" : "erase");
261 /* skip first two or three arguments, look for offset and size */
262- if (arg_off_size(argc - o, argv + o, nand, &off, &size) != 0)
263+ if (arg_off_size(argc - o, argv + o, nand, &off, &size, 0) != 0)
264 return 1;
265
266 memset(&opts, 0, sizeof(opts));
267@@ -323,7 +330,7 @@
268
269 read = strncmp(cmd, "read", 4) == 0; /* 1 = read, 0 = write */
270 printf("\nNAND %s: ", read ? "read" : "write");
271- if (arg_off_size(argc - 3, argv + 3, nand, &off, &size) != 0)
272+ if (arg_off_size(argc - 3, argv + 3, nand, &off, &size, 1) != 0)
273 return 1;
274
275 s = strchr(cmd, '.');
276@@ -445,7 +452,7 @@
277 }
278
279 if (strcmp(cmd, "unlock") == 0) {
280- if (arg_off_size(argc - 2, argv + 2, nand, &off, &size) < 0)
281+ if (arg_off_size(argc - 2, argv + 2, nand, &off, &size, 0) < 0)
282 return 1;
283
284 if (!nand_unlock(nand, off, size)) {
285Index: u-boot/common/cmd_dynenv.c
286===================================================================
287--- u-boot.orig/common/cmd_dynenv.c
288+++ u-boot/common/cmd_dynenv.c
289@@ -60,7 +60,7 @@
290 buf[2] = 'V';
291 buf[3] = '0';
292
293- if (arg_off_size(argc-2, argv+2, mtd, &addr, &dummy) < 0) {
294+ if (arg_off_size(argc-2, argv+2, mtd, &addr, &dummy, 1) < 0) {
295 printf("Offset or partition name expected\n");
296 goto fail;
297 }
298Index: u-boot/include/util.h
299===================================================================
300--- u-boot.orig/include/util.h
301+++ u-boot/include/util.h
302@@ -28,6 +28,6 @@
303
304 /* common/cmd_nand.c */
305 int arg_off_size(int argc, char *argv[], nand_info_t *nand, ulong *off,
306- ulong *size);
307+ ulong *size, int net);
308
309 #endif /* UTIL_H */
310Index: u-boot/board/qt2410/qt2410.c
311===================================================================
312--- u-boot.orig/board/qt2410/qt2410.c
313+++ u-boot/board/qt2410/qt2410.c
314@@ -126,3 +126,9 @@
315
316 return 0;
317 }
318+
319+unsigned int dynpart_size[] = {
320+ CFG_UBOOT_SIZE, 0x4000, 0x200000, 0xa0000, 0x3d5c000-CFG_UBOOT_SIZE, 0 };
321+char *dynpart_names[] = {
322+ "u-boot", "u-boot_env", "kernel", "splash", "rootfs", NULL };
323+
324Index: u-boot/board/neo1973/gta01/gta01.c
325===================================================================
326--- u-boot.orig/board/neo1973/gta01/gta01.c
327+++ u-boot/board/neo1973/gta01/gta01.c
328@@ -429,3 +434,14 @@
329 return 0;
330 }
331
332+
333+/* The sum of all part_size[]s must equal to the NAND size, i.e., 0x4000000.
334+ "initrd" is sized such that it can hold two uncompressed 16 bit 640*480
335+ images: 640*480*2*2 = 1228800 < 1245184. */
336+
337+unsigned int dynpart_size[] = {
338+ CFG_UBOOT_SIZE, 0x4000, 0x200000, 0xa0000, 0x3d5c000-CFG_UBOOT_SIZE, 0 };
339+char *dynpart_names[] = {
340+ "u-boot", "u-boot_env", "kernel", "splash", "rootfs", NULL };
341+
342+
343Index: u-boot/include/configs/qt2410.h
344===================================================================
345--- u-boot.orig/include/configs/qt2410.h
346+++ u-boot/include/configs/qt2410.h
347@@ -283,5 +283,7 @@
348
349 #define MTDIDS_DEFAULT "nand0=qt2410-nand"
350 #define MTPARTS_DEFAULT "qt2410-nand:192k(u-boot),8k(u-boot_env),2M(kernel),2M(splash),-(jffs2)"
351+#define CFG_NAND_DYNPART_MTD_KERNEL_NAME "qt2410-nand"
352+#define CONFIG_NAND_DYNPART
353
354 #endif /* __CONFIG_H */
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-otp.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-otp.patch
new file mode 100644
index 0000000000..b0e9bf4c4b
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-otp.patch
@@ -0,0 +1,302 @@
1Index: u-boot/common/cmd_nand.c
2===================================================================
3--- u-boot.orig/common/cmd_nand.c
4+++ u-boot/common/cmd_nand.c
5@@ -392,6 +392,14 @@
6 else
7 ret = nand->write_oob(nand, off, size, &size,
8 (u_char *) addr);
9+ } else if (s != NULL && !strcmp(s, ".otp")) {
10+ /* read out-of-band data */
11+ if (read)
12+ ret = nand->read_otp(nand, off, size, &size,
13+ (u_char *) addr);
14+ else
15+ ret = nand->write_otp(nand, off, size, &size,
16+ (u_char *) addr);
17 } else {
18 if (read)
19 ret = nand_read(nand, off, &size, (u_char *)addr);
20@@ -527,8 +535,9 @@
21 "nand - NAND sub-system\n",
22 "info - show available NAND devices\n"
23 "nand device [dev] - show or set current device\n"
24- "nand read[.jffs2] - addr off|partition size\n"
25- "nand write[.jffs2] - addr off|partiton size - read/write `size' bytes starting\n"
26+ "nand read[.jffs2, .oob, .otp] addr off|partition size\n"
27+ "nand write[.jffs2, .oob, .otp] addr off|partiton size\n"
28+ " - read/write `size' bytes starting\n"
29 " at offset `off' to/from memory address `addr'\n"
30 "nand erase [clean] [off size] - erase `size' bytes from\n"
31 " offset `off' (entire device if not specified)\n"
32Index: u-boot/cpu/arm920t/s3c24x0/nand.c
33===================================================================
34--- u-boot.orig/cpu/arm920t/s3c24x0/nand.c
35+++ u-boot/cpu/arm920t/s3c24x0/nand.c
36@@ -205,7 +205,7 @@
37 }
38 #endif
39
40-int board_nand_init(struct nand_chip *nand)
41+int s3c24x0_nand_init(struct nand_chip *nand)
42 {
43 u_int32_t cfg;
44 u_int8_t tacls, twrph0, twrph1;
45Index: u-boot/drivers/nand/nand_base.c
46===================================================================
47--- u-boot.orig/drivers/nand/nand_base.c
48+++ u-boot/drivers/nand/nand_base.c
49@@ -2042,6 +2042,32 @@
50 }
51 #endif
52
53+/*
54+ * See nand_read_oob and nand_write_oob
55+ */
56+
57+static int nand_read_otp(struct mtd_info *mtd, loff_t from, size_t len,
58+ size_t *retlen, u_char *buf)
59+{
60+ struct nand_chip *this = mtd->priv;
61+
62+ if (!this->read_otp)
63+ return -ENOSYS;
64+ return this->read_otp(mtd, from, len, retlen, buf);
65+
66+}
67+
68+static int nand_write_otp(struct mtd_info *mtd, loff_t to, size_t len,
69+ size_t *retlen, const u_char *buf)
70+{
71+ struct nand_chip *this = mtd->priv;
72+
73+ if (!this->write_otp)
74+ return -ENOSYS;
75+ return this->write_otp(mtd, to, len, retlen, buf);
76+}
77+
78+
79 /**
80 * single_erease_cmd - [GENERIC] NAND standard block erase command function
81 * @mtd: MTD device structure
82@@ -2613,6 +2639,8 @@
83 mtd->write_ecc = nand_write_ecc;
84 mtd->read_oob = nand_read_oob;
85 mtd->write_oob = nand_write_oob;
86+ mtd->read_otp = nand_read_otp;
87+ mtd->write_otp = nand_write_otp;
88 /* XXX U-BOOT XXX */
89 #if 0
90 mtd->readv = NULL;
91Index: u-boot/include/linux/mtd/mtd.h
92===================================================================
93--- u-boot.orig/include/linux/mtd/mtd.h
94+++ u-boot/include/linux/mtd/mtd.h
95@@ -95,6 +95,9 @@
96 int (*read_oob) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
97 int (*write_oob) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
98
99+ int (*read_otp) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
100+ int (*write_otp) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
101+
102 /*
103 * Methods to access the protection register area, present in some
104 * flash devices. The user data is one time programmable but the
105Index: u-boot/include/linux/mtd/nand.h
106===================================================================
107--- u-boot.orig/include/linux/mtd/nand.h
108+++ u-boot/include/linux/mtd/nand.h
109@@ -307,6 +307,10 @@
110 void (*enable_hwecc)(struct mtd_info *mtd, int mode);
111 void (*erase_cmd)(struct mtd_info *mtd, int page);
112 int (*scan_bbt)(struct mtd_info *mtd);
113+ int (*read_otp)(struct mtd_info *mtd, loff_t from,
114+ size_t len, size_t *retlen, u_char *buf);
115+ int (*write_otp) (struct mtd_info *mtd, loff_t to,
116+ size_t len, size_t *retlen, const u_char *buf);
117 int eccmode;
118 int eccsize;
119 int eccbytes;
120Index: u-boot/board/neo1973/gta01/Makefile
121===================================================================
122--- u-boot.orig/board/neo1973/gta01/Makefile
123+++ u-boot/board/neo1973/gta01/Makefile
124@@ -25,7 +25,7 @@
125
126 LIB = lib$(BOARD).a
127
128-OBJS := gta01.o pcf50606.o ../common/cmd_neo1973.o ../common/jbt6k74.o ../common/udc.o ../common/bootmenu.o
129+OBJS := gta01.o pcf50606.o nand.o ../common/cmd_neo1973.o ../common/jbt6k74.o ../common/udc.o ../common/bootmenu.o
130 SOBJS := ../common/lowlevel_init.o
131
132 .PHONY: all
133Index: u-boot/board/neo1973/gta01/nand.c
134===================================================================
135--- /dev/null
136+++ u-boot/board/neo1973/gta01/nand.c
137@@ -0,0 +1,121 @@
138+/*
139+ * nand.c - Board-specific NAND setup
140+ *
141+ * Copyright (C) 2007 by OpenMoko, Inc.
142+ * Written by Werner Almesberger <werner@openmoko.org>
143+ * All Rights Reserved
144+ *
145+ * This program is free software; you can redistribute it and/or
146+ * modify it under the terms of the GNU General Public License as
147+ * published by the Free Software Foundation; either version 2 of
148+ * the License, or (at your option) any later version.
149+ *
150+ * This program is distributed in the hope that it will be useful,
151+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
152+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
153+ * GNU General Public License for more details.
154+ *
155+ * You should have received a copy of the GNU General Public License
156+ * along with this program; if not, write to the Free Software
157+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
158+ * MA 02111-1307 USA
159+ */
160+
161+
162+#include "config.h" /* nand.h needs NAND_MAX_CHIPS */
163+#include "linux/mtd/mtd.h"
164+#include "linux/mtd/nand.h"
165+#include "asm/errno.h"
166+
167+
168+int s3c24x0_nand_init(struct nand_chip *nand);
169+
170+
171+static void samsung_nand_begin_otp(struct mtd_info *mtd)
172+{
173+ struct nand_chip *this = mtd->priv;
174+
175+ /* @@@FIXME: this is ugly - we select the NAND chip to send the
176+ mode switch commands, knowing that it will be switched off later */
177+ this->select_chip(mtd, 0);
178+ /* "magic" mode change */
179+ this->cmdfunc(mtd, 0x30, -1, -1);
180+ this->cmdfunc(mtd, 0x65, -1, -1);
181+}
182+
183+
184+static void samsung_nand_end_otp(struct mtd_info *mtd)
185+{
186+ struct nand_chip *this = mtd->priv;
187+
188+ /* read/write deselected the chip so now we need to select again */
189+ this->select_chip(mtd, 0);
190+ this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
191+ this->select_chip(mtd, -1);
192+}
193+
194+
195+static loff_t otp_page[] = {
196+ 0x15, /* 00-XX-00-00, with XX = 15h-19h */
197+ 0x16,
198+ 0x17,
199+ 0x18,
200+ 0x19,
201+ 0x1b, /* 00-1B-00-00 */
202+};
203+
204+#define OTP_PAGES (sizeof(otp_page)/sizeof(*otp_page))
205+
206+
207+static int convert_otp_address(loff_t *addr, size_t *len)
208+{
209+ int page;
210+
211+ if (*len && *addr >> 9 != (*addr+*len-1) >> 9)
212+ return -EINVAL;
213+ if (*len > 512)
214+ return -EINVAL;
215+ page = *addr >> 9;
216+ if (page >= OTP_PAGES)
217+ return -EINVAL;
218+ *addr = otp_page[page] << 9;
219+ return 0;
220+}
221+
222+
223+static int samsung_nand_read_otp(struct mtd_info *mtd, loff_t from,
224+ size_t len, size_t *retlen, u_char *buf)
225+{
226+ int ret;
227+
228+ ret = convert_otp_address(&from, &len);
229+ if (ret)
230+ return ret;
231+ samsung_nand_begin_otp(mtd);
232+ ret = mtd->read(mtd, from, len, retlen, buf);
233+ samsung_nand_end_otp(mtd);
234+ return ret;
235+}
236+
237+
238+static int samsung_nand_write_otp(struct mtd_info *mtd, loff_t to,
239+ size_t len, size_t *retlen, const u_char *buf)
240+{
241+ int ret;
242+
243+ ret = convert_otp_address(&to, &len);
244+ if (ret)
245+ return ret;
246+ samsung_nand_begin_otp(mtd);
247+ ret = mtd->write(mtd, to, len, retlen, buf);
248+ samsung_nand_end_otp(mtd);
249+ return ret;
250+}
251+
252+
253+int board_nand_init(struct nand_chip *nand)
254+{
255+ nand->read_otp = samsung_nand_read_otp;
256+ nand->write_otp = samsung_nand_write_otp;
257+ return s3c24x0_nand_init(nand);
258+}
259Index: u-boot/board/neo1973/gta02/nand.c
260===================================================================
261--- /dev/null
262+++ u-boot/board/neo1973/gta02/nand.c
263@@ -0,0 +1,39 @@
264+/*
265+ * nand.c - Board-specific NAND setup
266+ *
267+ * Copyright (C) 2007 by OpenMoko, Inc.
268+ * Written by Werner Almesberger <werner@openmoko.org>
269+ * All Rights Reserved
270+ *
271+ * This program is free software; you can redistribute it and/or
272+ * modify it under the terms of the GNU General Public License as
273+ * published by the Free Software Foundation; either version 2 of
274+ * the License, or (at your option) any later version.
275+ *
276+ * This program is distributed in the hope that it will be useful,
277+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
278+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
279+ * GNU General Public License for more details.
280+ *
281+ * You should have received a copy of the GNU General Public License
282+ * along with this program; if not, write to the Free Software
283+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
284+ * MA 02111-1307 USA
285+ */
286+
287+
288+#include "config.h" /* nand.h needs NAND_MAX_CHIPS */
289+#include "linux/mtd/mtd.h"
290+#include "linux/mtd/nand.h"
291+
292+
293+int s3c24x0_nand_init(struct nand_chip *nand);
294+
295+
296+/* Add OTP et al later */
297+
298+
299+int board_nand_init(struct nand_chip *nand)
300+{
301+ return s3c24x0_nand_init(nand);
302+}
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-read_write_oob.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-read_write_oob.patch
new file mode 100644
index 0000000000..8360409e46
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/nand-read_write_oob.patch
@@ -0,0 +1,23 @@
1Re-introduce the 'nand read.oob' and 'nand write.oob' commands
2that used to exist with the legacy NAND code
3
4Signed-off-by: Harald Welte <laforge@openmoko.org>
5Index: u-boot.git/common/cmd_nand.c
6===================================================================
7--- u-boot.git.orig/common/cmd_nand.c 2007-01-26 15:41:13.000000000 +0100
8+++ u-boot.git/common/cmd_nand.c 2007-01-26 15:49:37.000000000 +0100
9@@ -351,6 +351,14 @@
10 opts.quiet = quiet;
11 ret = nand_write_opts(nand, &opts);
12 }
13+ } else if (s != NULL && !strcmp(s, ".oob")) {
14+ /* read out-of-band data */
15+ if (read)
16+ ret = nand->read_oob(nand, off, size, &size,
17+ (u_char *) addr);
18+ else
19+ ret = nand->write_oob(nand, off, size, &size,
20+ (u_char *) addr);
21 } else {
22 if (read)
23 ret = nand_read(nand, off, &size, (u_char *)addr);
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/neo1973-chargefast.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/neo1973-chargefast.patch
new file mode 100644
index 0000000000..6f6af2c758
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/neo1973-chargefast.patch
@@ -0,0 +1,316 @@
1Index: u-boot/drivers/usbtty.c
2===================================================================
3--- u-boot.orig/drivers/usbtty.c
4+++ u-boot/drivers/usbtty.c
5@@ -66,7 +66,7 @@
6 /*
7 * Defines
8 */
9-#define NUM_CONFIGS 1
10+#define NUM_CONFIGS 2
11 #define MAX_INTERFACES 2
12 #define NUM_ENDPOINTS 3
13 #define ACM_TX_ENDPOINT 3
14@@ -192,8 +192,7 @@
15 #endif
16 .bConfigurationValue = 1,
17 .iConfiguration = STR_CONFIG,
18- .bmAttributes =
19- BMATTRIBUTE_SELF_POWERED|BMATTRIBUTE_RESERVED,
20+ .bmAttributes = BMATTRIBUTE_RESERVED,
21 .bMaxPower = USBTTY_MAXPOWER
22 },
23 /* Interface 1 */
24@@ -294,6 +293,120 @@
25 .func_dfu = DFU_FUNC_DESC,
26 #endif
27 },
28+ {
29+ .configuration_desc ={
30+ .bLength =
31+ sizeof(struct usb_configuration_descriptor),
32+ .bDescriptorType = USB_DT_CONFIG,
33+ .wTotalLength =
34+ cpu_to_le16(sizeof(struct acm_config_desc)
35+#ifdef CONFIG_USBD_DFU
36+ - sizeof(struct usb_interface_descriptor)
37+ - sizeof(struct usb_dfu_func_descriptor)
38+#endif
39+ ),
40+ .bNumInterfaces = NUM_ACM_INTERFACES,
41+ .bConfigurationValue = 2,
42+ .iConfiguration = STR_CONFIG,
43+ .bmAttributes = BMATTRIBUTE_RESERVED,
44+ .bMaxPower = 50, /* 100mA */
45+ },
46+ /* Interface 1 */
47+ .interface_desc = {
48+ .bLength = sizeof(struct usb_interface_descriptor),
49+ .bDescriptorType = USB_DT_INTERFACE,
50+ .bInterfaceNumber = 0,
51+ .bAlternateSetting = 0,
52+ .bNumEndpoints = 0x01,
53+ .bInterfaceClass =
54+ COMMUNICATIONS_INTERFACE_CLASS_CONTROL,
55+ .bInterfaceSubClass = COMMUNICATIONS_ACM_SUBCLASS,
56+ .bInterfaceProtocol = COMMUNICATIONS_V25TER_PROTOCOL,
57+ .iInterface = STR_CTRL_INTERFACE,
58+ },
59+ .usb_class_header = {
60+ .bFunctionLength =
61+ sizeof(struct usb_class_header_function_descriptor),
62+ .bDescriptorType = CS_INTERFACE,
63+ .bDescriptorSubtype = USB_ST_HEADER,
64+ .bcdCDC = cpu_to_le16(110),
65+ },
66+ .usb_class_call_mgt = {
67+ .bFunctionLength =
68+ sizeof(struct usb_class_call_management_descriptor),
69+ .bDescriptorType = CS_INTERFACE,
70+ .bDescriptorSubtype = USB_ST_CMF,
71+ .bmCapabilities = 0x00,
72+ .bDataInterface = 0x01,
73+ },
74+ .usb_class_acm = {
75+ .bFunctionLength =
76+ sizeof(struct usb_class_abstract_control_descriptor),
77+ .bDescriptorType = CS_INTERFACE,
78+ .bDescriptorSubtype = USB_ST_ACMF,
79+ .bmCapabilities = 0x00,
80+ },
81+ .usb_class_union = {
82+ .bFunctionLength =
83+ sizeof(struct usb_class_union_function_descriptor),
84+ .bDescriptorType = CS_INTERFACE,
85+ .bDescriptorSubtype = USB_ST_UF,
86+ .bMasterInterface = 0x00,
87+ .bSlaveInterface0 = 0x01,
88+ },
89+ .notification_endpoint = {
90+ .bLength =
91+ sizeof(struct usb_endpoint_descriptor),
92+ .bDescriptorType = USB_DT_ENDPOINT,
93+ .bEndpointAddress = 0x01 | USB_DIR_IN,
94+ .bmAttributes = USB_ENDPOINT_XFER_INT,
95+ .wMaxPacketSize
96+ = cpu_to_le16(CONFIG_USBD_SERIAL_INT_PKTSIZE),
97+ .bInterval = 0xFF,
98+ },
99+
100+ /* Interface 2 */
101+ .data_class_interface = {
102+ .bLength =
103+ sizeof(struct usb_interface_descriptor),
104+ .bDescriptorType = USB_DT_INTERFACE,
105+ .bInterfaceNumber = 0x01,
106+ .bAlternateSetting = 0x00,
107+ .bNumEndpoints = 0x02,
108+ .bInterfaceClass =
109+ COMMUNICATIONS_INTERFACE_CLASS_DATA,
110+ .bInterfaceSubClass = DATA_INTERFACE_SUBCLASS_NONE,
111+ .bInterfaceProtocol = DATA_INTERFACE_PROTOCOL_NONE,
112+ .iInterface = STR_DATA_INTERFACE,
113+ },
114+ .data_endpoints = {
115+ {
116+ .bLength =
117+ sizeof(struct usb_endpoint_descriptor),
118+ .bDescriptorType = USB_DT_ENDPOINT,
119+ .bEndpointAddress = 0x02 | USB_DIR_OUT,
120+ .bmAttributes =
121+ USB_ENDPOINT_XFER_BULK,
122+ .wMaxPacketSize =
123+ cpu_to_le16(CONFIG_USBD_SERIAL_BULK_PKTSIZE),
124+ .bInterval = 0xFF,
125+ },
126+ {
127+ .bLength =
128+ sizeof(struct usb_endpoint_descriptor),
129+ .bDescriptorType = USB_DT_ENDPOINT,
130+ .bEndpointAddress = 0x03 | USB_DIR_IN,
131+ .bmAttributes =
132+ USB_ENDPOINT_XFER_BULK,
133+ .wMaxPacketSize =
134+ cpu_to_le16(CONFIG_USBD_SERIAL_BULK_PKTSIZE),
135+ .bInterval = 0xFF,
136+ },
137+ },
138+ /* We don't add the DFU functional descriptor here since we only
139+ * want to do DFU in the high-current charging mode for safety reasons */
140+ },
141+
142 };
143
144 static struct rs232_emu rs232_desc={
145@@ -330,8 +443,7 @@
146 .bNumInterfaces = NUM_GSERIAL_INTERFACES,
147 .bConfigurationValue = 1,
148 .iConfiguration = STR_CONFIG,
149- .bmAttributes =
150- BMATTRIBUTE_SELF_POWERED|BMATTRIBUTE_RESERVED,
151+ .bmAttributes = BMATTRIBUTE_RESERVED,
152 .bMaxPower = USBTTY_MAXPOWER
153 },
154 .interface_desc = {
155@@ -384,6 +496,68 @@
156 },
157 },
158 },
159+ {
160+ .configuration_desc ={
161+ .bLength = sizeof(struct usb_configuration_descriptor),
162+ .bDescriptorType = USB_DT_CONFIG,
163+ .wTotalLength =
164+ cpu_to_le16(sizeof(struct gserial_config_desc)),
165+ .bNumInterfaces = NUM_GSERIAL_INTERFACES,
166+ .bConfigurationValue = 1,
167+ .iConfiguration = STR_CONFIG,
168+ .bmAttributes = BMATTRIBUTE_RESERVED,
169+ .bMaxPower = 50
170+ },
171+ .interface_desc = {
172+ {
173+ .bLength =
174+ sizeof(struct usb_interface_descriptor),
175+ .bDescriptorType = USB_DT_INTERFACE,
176+ .bInterfaceNumber = 0,
177+ .bAlternateSetting = 0,
178+ .bNumEndpoints = NUM_ENDPOINTS,
179+ .bInterfaceClass =
180+ COMMUNICATIONS_INTERFACE_CLASS_VENDOR,
181+ .bInterfaceSubClass =
182+ COMMUNICATIONS_NO_SUBCLASS,
183+ .bInterfaceProtocol =
184+ COMMUNICATIONS_NO_PROTOCOL,
185+ .iInterface = STR_DATA_INTERFACE
186+ },
187+ },
188+ .data_endpoints = {
189+ {
190+ .bLength =
191+ sizeof(struct usb_endpoint_descriptor),
192+ .bDescriptorType = USB_DT_ENDPOINT,
193+ .bEndpointAddress = 0x01 | USB_DIR_OUT,
194+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
195+ .wMaxPacketSize =
196+ cpu_to_le16(CONFIG_USBD_SERIAL_OUT_PKTSIZE),
197+ .bInterval= 0xFF,
198+ },
199+ {
200+ .bLength =
201+ sizeof(struct usb_endpoint_descriptor),
202+ .bDescriptorType = USB_DT_ENDPOINT,
203+ .bEndpointAddress = 0x02 | USB_DIR_IN,
204+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
205+ .wMaxPacketSize =
206+ cpu_to_le16(CONFIG_USBD_SERIAL_IN_PKTSIZE),
207+ .bInterval = 0xFF,
208+ },
209+ {
210+ .bLength =
211+ sizeof(struct usb_endpoint_descriptor),
212+ .bDescriptorType = USB_DT_ENDPOINT,
213+ .bEndpointAddress = 0x03 | USB_DIR_IN,
214+ .bmAttributes = USB_ENDPOINT_XFER_INT,
215+ .wMaxPacketSize =
216+ cpu_to_le16(CONFIG_USBD_SERIAL_INT_PKTSIZE),
217+ .bInterval = 0xFF,
218+ },
219+ },
220+ },
221 };
222
223 /*
224@@ -679,12 +853,14 @@
225 bus_instance->maxpacketsize = 64;
226 bus_instance->serial_number_str = serial_number;
227
228- /* configuration instance */
229- memset (config_instance, 0,
230- sizeof (struct usb_configuration_instance));
231- config_instance->interfaces = interface_count;
232- config_instance->configuration_descriptor = configuration_descriptor;
233- config_instance->interface_instance_array = interface_instance;
234+ /* configuration instances */
235+ for (i = 0; i < NUM_CONFIGS; i++) {
236+ memset(&config_instance[i], 0, sizeof(config_instance));
237+ config_instance[i].interfaces = interface_count;
238+ /* FIXME: this breaks for the non-ACM case */
239+ config_instance[i].configuration_descriptor = &acm_configuration_descriptors[i];
240+ config_instance[i].interface_instance_array = interface_instance;
241+ }
242
243 /* interface instance */
244 memset (interface_instance, 0,
245@@ -1043,9 +1219,17 @@
246 usbtty_configured_flag = 0;
247 break;
248 case DEVICE_CONFIGURED:
249+ printf("DEVICE_CONFIGURED: %u\n", device->configuration);
250+ if (device->configuration == 1)
251+ udc_ctrl(UDC_CTRL_500mA_ENABLE, 1);
252+ else
253+ udc_ctrl(UDC_CTRL_500mA_ENABLE, 0);
254 usbtty_configured_flag = 1;
255 break;
256-
257+ case DEVICE_DE_CONFIGURED:
258+ printf("DEVICE_DE_CONFIGURED\n");
259+ udc_ctrl(UDC_CTRL_500mA_ENABLE, 0);
260+ break;
261 case DEVICE_ADDRESS_ASSIGNED:
262 usbtty_init_endpoints ();
263
264Index: u-boot/drivers/usbtty.h
265===================================================================
266--- u-boot.orig/drivers/usbtty.h
267+++ u-boot/drivers/usbtty.h
268@@ -60,7 +60,7 @@
269 #define USBTTY_DEVICE_CLASS COMMUNICATIONS_DEVICE_CLASS
270
271 #define USBTTY_BCD_DEVICE 0x00
272-#define USBTTY_MAXPOWER 0x00
273+#define USBTTY_MAXPOWER 250 /* 500mA */
274
275 #define STR_LANG 0x00
276 #define STR_MANUFACTURER 0x01
277Index: u-boot/board/neo1973/common/udc.c
278===================================================================
279--- u-boot.orig/board/neo1973/common/udc.c
280+++ u-boot/board/neo1973/common/udc.c
281@@ -2,6 +2,7 @@
282 #include <common.h>
283 #include <usbdcore.h>
284 #include <s3c2410.h>
285+#include <pcf50606.h>
286
287 void udc_ctrl(enum usbd_event event, int param)
288 {
289@@ -17,6 +18,13 @@
290 gpio->GPBDAT &= ~(1 << 9);
291 #endif
292 break;
293+ case UDC_CTRL_500mA_ENABLE:
294+#if defined(CONFIG_ARCH_GTA01_v3) || defined(CONFIG_ARCH_GTA01_v4) || \
295+ defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3) || \
296+ defined(CONFIG_ARCH_GTA01B_v4)
297+ pcf50606_charge_autofast(param);
298+#endif
299+ break;
300 default:
301 break;
302 }
303Index: u-boot/include/usbdcore.h
304===================================================================
305--- u-boot.orig/include/usbdcore.h
306+++ u-boot/include/usbdcore.h
307@@ -686,8 +686,8 @@
308
309 enum usbd_event {
310 UDC_CTRL_PULLUP_ENABLE,
311+ UDC_CTRL_500mA_ENABLE,
312 };
313
314 void udc_ctrl(enum usbd_event event, int param);
315 #endif
316-#endif
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/preboot-override.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/preboot-override.patch
new file mode 100644
index 0000000000..f32cbde27b
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/preboot-override.patch
@@ -0,0 +1,137 @@
1Provide a place where the loader can patch the binary, such that it executes a
2command string from RAM. We use this for automated installs, where we can thus
3use the same u-boot binary for all stages.
4
5include/configs/neo1973.h: new option CFG_PREBOOT_OVERRIDE to allow setting of
6 the preboot command in memory
7cpu/arm920t/start.S: added variable "preboot_override" at known location
8 (_start+0x40)
9common/main.c (main_loop): if preboot_override is set, execute the command
10 string found there
11common/env_common.c (env_relocate): if preboot_override is set, always use the
12 default environment
13
14- Werner Almesberger <werner@openmoko.org>
15
16Index: u-boot/cpu/arm920t/start.S
17===================================================================
18--- u-boot.orig/cpu/arm920t/start.S
19+++ u-boot/cpu/arm920t/start.S
20@@ -77,6 +77,14 @@ _fiq: .word fiq
21 *************************************************************************
22 */
23
24+
25+/* Must follow the .balign above, so we get a well-known address ! */
26+#ifdef CFG_PREBOOT_OVERRIDE
27+.globl preboot_override
28+preboot_override:
29+ .word 0
30+#endif
31+
32 #ifdef CONFIG_S3C2410_NAND_BOOT
33 .globl booted_from_nand
34 booted_from_nand:
35Index: u-boot/include/configs/neo1973_gta01.h
36===================================================================
37--- u-boot.orig/include/configs/neo1973_gta01.h
38+++ u-boot/include/configs/neo1973_gta01.h
39@@ -207,6 +207,7 @@
40 #define CFG_ENV_IS_IN_NAND 1
41 #define CFG_ENV_SIZE 0x4000 /* 16k Total Size of Environment Sector */
42 #define CFG_ENV_OFFSET_OOB 1 /* Location of ENV stored in block 0 OOB */
43+#define CFG_PREBOOT_OVERRIDE 1 /* allow preboot from memory */
44
45 #define NAND_MAX_CHIPS 1
46 #define CFG_NAND_BASE 0x4e000000
47Index: u-boot/common/main.c
48===================================================================
49--- u-boot.orig/common/main.c
50+++ u-boot/common/main.c
51@@ -85,6 +85,11 @@ int do_mdm_init = 0;
52 extern void mdm_init(void); /* defined in board.c */
53 #endif
54
55+#ifdef CFG_PREBOOT_OVERRIDE
56+extern char *preboot_override;
57+#endif
58+
59+
60 /***************************************************************************
61 * Watch for 'delay' seconds for autoboot stop or autoboot delay string.
62 * returns: 0 - no key string, allow autoboot
63@@ -306,8 +311,8 @@ void main_loop (void)
64 char *s;
65 int bootdelay;
66 #endif
67-#ifdef CONFIG_PREBOOT
68- char *p;
69+#if defined(CONFIG_PREBOOT) || defined(CFG_PREBOOT_OVERRIDE)
70+ char *p = NULL;
71 #endif
72 #ifdef CONFIG_BOOTCOUNT_LIMIT
73 unsigned long bootcount = 0;
74@@ -364,8 +369,23 @@ void main_loop (void)
75 install_auto_complete();
76 #endif
77
78+#if defined(CONFIG_PREBOOT) || defined(CFG_PREBOOT_OVERRIDE)
79 #ifdef CONFIG_PREBOOT
80- if ((p = getenv ("preboot")) != NULL) {
81+ p = getenv ("preboot");
82+#endif
83+#ifdef CFG_PREBOOT_OVERRIDE
84+ if (preboot_override) {
85+ /* for convenience, preboot_override may end in \n, not \0 */
86+ p = strchr(preboot_override, '\n');
87+ if (p)
88+ *p = 0;
89+ /* make sure we can overwrite the load area if we want to */
90+ p = strdup(preboot_override);
91+ /* clean the image in case we want to flash it */
92+ preboot_override = NULL;
93+ }
94+#endif /* CFG_PREBOOT_OVERRIDE */
95+ if (p) {
96 # ifdef CONFIG_AUTOBOOT_KEYED
97 int prev = disable_ctrlc(1); /* disable Control C checking */
98 # endif
99@@ -381,7 +401,7 @@ void main_loop (void)
100 disable_ctrlc(prev); /* restore Control C checking */
101 # endif
102 }
103-#endif /* CONFIG_PREBOOT */
104+#endif /* CONFIG_PREBOOT || CFG_PREBOOT_OVERRIDE */
105
106 #if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0)
107 s = getenv ("bootdelay");
108Index: u-boot/common/env_common.c
109===================================================================
110--- u-boot.orig/common/env_common.c
111+++ u-boot/common/env_common.c
112@@ -37,6 +37,10 @@
113 # define SHOW_BOOT_PROGRESS(arg)
114 #endif
115
116+#ifdef CFG_PREBOOT_OVERRIDE
117+extern char *preboot_override;
118+#endif
119+
120 DECLARE_GLOBAL_DATA_PTR;
121
122 #ifdef CONFIG_AMIGAONEG3SE
123@@ -234,7 +238,14 @@ void env_relocate (void)
124 puts ("*** Warning - bad CRC, using default environment\n\n");
125 SHOW_BOOT_PROGRESS (-1);
126 #endif
127+ }
128+
129+#ifdef CFG_PREBOOT_OVERRIDE
130+ if (preboot_override)
131+ gd->env_valid = 0;
132+#endif
133
134+ if (gd->env_valid == 0) {
135 if (sizeof(default_environment) > ENV_SIZE)
136 {
137 puts ("*** Error - default environment is too large\n\n");
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/raise-limits.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/raise-limits.patch
new file mode 100644
index 0000000000..a1c381a2cf
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/raise-limits.patch
@@ -0,0 +1,31 @@
1include/configs/neo1973.h: increase heap from 128 kB to 400 kB, for BMP image
2 decompression
3 [ note: increasing it to 512 kB trips over something. note sure what.
4 find out. ]
5include/configs/neo1973.h: raise number of command line arguments from 16 to 64
6
7- Werner Almesberger <werner@openmoko.org>
8
9Index: u-boot/include/configs/neo1973_gta01.h
10===================================================================
11--- u-boot.orig/include/configs/neo1973_gta01.h
12+++ u-boot/include/configs/neo1973_gta01.h
13@@ -54,7 +54,8 @@
14 /*
15 * Size of malloc() pool
16 */
17-#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
18+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 400*1024)
19+ /* >> CFG_VIDEO_LOGO_MAX_SIZE */
20 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
21
22 /*
23@@ -142,7 +143,7 @@
24 #endif
25 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
26 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
27-#define CFG_MAXARGS 16 /* max number of command args */
28+#define CFG_MAXARGS 64 /* max number of command args */
29 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
30
31 #define CFG_MEMTEST_START 0x30000000 /* memtest works on */
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/series b/meta/packages/uboot/u-boot-mkimage-openmoko-native/series
new file mode 100644
index 0000000000..4fc7d1342f
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/series
@@ -0,0 +1,76 @@
1# just some local hacks
2uboot-machtypes.patch
3ext2load_hex.patch
4uboot-mokoversion.patch
5
6# those we want to get mainline
7uboot-s3c2410-warnings-fix.patch
8uboot-strtoul.patch
9uboot-cramfs_but_no_jffs2.patch
10nand-read_write_oob.patch
11uboot-arm920t-gd_in_irq.patch
12uboot-arm920_s3c2410_irq_demux.patch
13uboot-s3c2410-nand.patch
14uboot-cmd_s3c2410.patch
15uboot-s3c2410-mmc.patch
16env_nand_oob.patch
17dynenv-harden.patch
18uboot-s3c2410_fb.patch
19uboot-20061030-qt2410.patch
20uboot-20061030-neo1973.patch
21
22# under construction, but intended for mainline
23uboot-s3c2410-misccr-definitions.patch
24
25boot-from-ram-reloc.patch
26boot-from-ram-and-nand.patch
27wakeup-reason-nand-only.patch
28uboot-neo1973-resume.patch
29
30# this will be somewhat more difficult
31nand-dynamic_partitions.patch
32uboot-s3c2410-norelocate_irqvec_cpy.patch
33uboot-usbtty-acm.patch
34uboot-s3c2410_udc.patch
35
36# those need to be cleaned up
37bbt-create-optional.patch
38nand-createbbt.patch
39dontask.patch
40nand-badisbad.patch
41uboot-bbt-quiet.patch
42
43# splash screen
44raise-limits.patch
45splashimage-command.patch
46cmd-unzip.patch
47enable-splash-bmp.patch
48
49# for automated installation
50preboot-override.patch
51lowlevel_foo.patch
52
53# move these later, once the dust has settled
54default-env.patch
55console-ansi.patch
56boot-menu.patch
57
58# those have to be implemented fully
59uboot-dfu.patch
60uboot-neo1973-defaultenv.patch
61uboot-nand-markbad-reallybad.patch
62usbdcore-multiple_configs.patch
63neo1973-chargefast.patch
64
65uboot-s3c2440.patch
66uboot-smdk2440.patch
67uboot-hxd8.patch
68
69uboot-license.patch
70
71uboot-gta02.patch
72uboot-s3c2443.patch
73uboot-smdk2443.patch
74
75# for review, merge soon
76unbusy-i2c.patch
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/splashimage-command.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/splashimage-command.patch
new file mode 100644
index 0000000000..8ea48cf484
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/splashimage-command.patch
@@ -0,0 +1,24 @@
1drivers/cfb_console.c (video_logo): if "splashimage" doesn't contain an
2 address, use its content as a command
3
4- Werner Almesberger <werner@openmoko.org>
5
6Index: u-boot/drivers/cfb_console.c
7===================================================================
8--- u-boot.orig/drivers/cfb_console.c
9+++ u-boot/drivers/cfb_console.c
10@@ -1121,7 +1121,13 @@ static void *video_logo (void)
11 ulong addr;
12
13 if ((s = getenv ("splashimage")) != NULL) {
14- addr = simple_strtoul (s, NULL, 16);
15+ char *end;
16+
17+ addr = simple_strtoul (s, &end, 16);
18+ if (*end) {
19+ run_command(s, 0);
20+ return video_fb_address;
21+ }
22
23 if (video_display_bitmap (addr, 0, 0) == 0) {
24 return ((void *) (video_fb_address));
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-20061030-neo1973.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-20061030-neo1973.patch
new file mode 100644
index 0000000000..7c70244b38
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-20061030-neo1973.patch
@@ -0,0 +1,2248 @@
1This patch adds neo1973 'board' (FIC Neo1973 phone) support to u-boot.
2Specifically, it adds support for the GTA01v3, GTA01v4, GTA01Bv2 and
3GTA01Bv3 hardware revisions.
4
5Signed-off-by: Harald Welte <laforge@openmoko.org>
6
7Index: u-boot/Makefile
8===================================================================
9--- u-boot.orig/Makefile
10+++ u-boot/Makefile
11@@ -2009,6 +2009,14 @@
12 sbc2410x_config: unconfig
13 @$(MKCONFIG) $(@:_config=) arm arm920t sbc2410x NULL s3c24x0
14
15+gta01_config \
16+gta01v3_config \
17+gta01bv2_config \
18+gta01bv3_config \
19+gta01bv4_config \
20+gta01v4_config : unconfig
21+ @sh board/neo1973/gta01/split_by_variant.sh $@
22+
23 qt2410_config : unconfig
24 @./mkconfig $(@:_config=) arm arm920t qt2410 NULL s3c24x0
25
26Index: u-boot/common/main.c
27===================================================================
28--- u-boot.orig/common/main.c
29+++ u-boot/common/main.c
30@@ -61,6 +61,7 @@
31 #undef DEBUG_PARSER
32
33 char console_buffer[CFG_CBSIZE]; /* console I/O buffer */
34+int nobootdelay;
35
36 #ifndef CONFIG_CMDLINE_EDITING
37 static char * delete_char (char *buffer, char *p, int *colp, int *np, int plen);
38@@ -376,7 +377,7 @@
39
40 debug ("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFINED>");
41
42- if (bootdelay >= 0 && s && !abortboot (bootdelay)) {
43+ if (!nobootdelay && bootdelay >= 0 && s && !abortboot (bootdelay)) {
44 # ifdef CONFIG_AUTOBOOT_KEYED
45 int prev = disable_ctrlc(1); /* disable Control C checking */
46 # endif
47Index: u-boot/drivers/Makefile
48===================================================================
49--- u-boot.orig/drivers/Makefile
50+++ u-boot/drivers/Makefile
51@@ -50,6 +50,7 @@
52 usbdcore.o usbdcore_ep0.o usbdcore_omap1510.o usbtty.o \
53 videomodes.o w83c553f.o \
54 ks8695eth.o \
55+ pcf50606.o \
56 pxa_pcmcia.o mpc8xx_pcmcia.o tqm8xx_pcmcia.o \
57 rpx_pcmcia.o \
58 fsl_i2c.o s3c2410_fb.o
59Index: u-boot/drivers/pcf50606.c
60===================================================================
61--- /dev/null
62+++ u-boot/drivers/pcf50606.c
63@@ -0,0 +1,112 @@
64+
65+#include <common.h>
66+
67+#ifdef CONFIG_DRIVER_PCF50606
68+
69+#include <i2c.h>
70+#include <pcf50606.h>
71+#include <asm/atomic.h>
72+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
73+
74+#define PCF50606_I2C_ADDR 0x08
75+
76+void __pcf50606_reg_write(u_int8_t reg, u_int8_t val)
77+{
78+ i2c_write(PCF50606_I2C_ADDR, reg, 1, &val, 1);
79+}
80+
81+u_int8_t __pcf50606_reg_read(u_int8_t reg)
82+{
83+ u_int8_t tmp;
84+ i2c_read(PCF50606_I2C_ADDR, reg, 1, &tmp, 1);
85+ return tmp;
86+}
87+
88+void pcf50606_reg_write(u_int8_t reg, u_int8_t val)
89+{
90+ unsigned long flags;
91+
92+ local_irq_save(flags);
93+ __pcf50606_reg_write(reg, val);
94+ local_irq_restore(flags);
95+}
96+
97+u_int8_t pcf50606_reg_read(u_int8_t reg)
98+{
99+ unsigned long flags;
100+ u_int8_t tmp;
101+
102+ local_irq_save(flags);
103+ tmp = __pcf50606_reg_read(reg);
104+ local_irq_restore(flags);
105+
106+ return tmp;
107+}
108+
109+void pcf50606_reg_set_bit_mask(u_int8_t reg, u_int8_t mask, u_int8_t val)
110+{
111+ unsigned long flags;
112+ u_int8_t tmp;
113+
114+ local_irq_save(flags);
115+ tmp = __pcf50606_reg_read(reg);
116+ __pcf50606_reg_write(reg, (val & mask) | (tmp & ~mask));
117+ local_irq_restore(flags);
118+}
119+
120+void pcf50606_reg_clear_bits(u_int8_t reg, u_int8_t bits)
121+{
122+ unsigned long flags;
123+ u_int8_t tmp;
124+
125+ local_irq_save(flags);
126+ tmp = pcf50606_reg_read(reg);
127+ pcf50606_reg_write(reg, (tmp & ~bits));
128+ local_irq_restore(flags);
129+}
130+
131+static const u_int8_t regs_valid[] = {
132+ PCF50606_REG_OOCS, PCF50606_REG_INT1M, PCF50606_REG_INT2M,
133+ PCF50606_REG_INT3M, PCF50606_REG_OOCC1, PCF50606_REG_OOCC2,
134+ PCF50606_REG_PSSC, PCF50606_REG_PWROKM, PCF50606_REG_DCDC1,
135+ PCF50606_REG_DCDC2, PCF50606_REG_DCDC3, PCF50606_REG_DCDC4,
136+ PCF50606_REG_DCDEC1, PCF50606_REG_DCDEC2, PCF50606_REG_DCUDC1,
137+ PCF50606_REG_DCUDC2, PCF50606_REG_IOREGC, PCF50606_REG_D1REGC1,
138+ PCF50606_REG_D2REGC1, PCF50606_REG_D3REGC1, PCF50606_REG_LPREGC1,
139+ PCF50606_REG_LPREGC2, PCF50606_REG_MBCC1, PCF50606_REG_MBCC2,
140+ PCF50606_REG_MBCC3, PCF50606_REG_BBCC, PCF50606_REG_ADCC1,
141+ PCF50606_REG_ADCC2, PCF50606_REG_ACDC1, PCF50606_REG_BVMC,
142+ PCF50606_REG_PWMC1, PCF50606_REG_LEDC1, PCF50606_REG_LEDC2,
143+ PCF50606_REG_GPOC1, PCF50606_REG_GPOC2, PCF50606_REG_GPOC3,
144+ PCF50606_REG_GPOC4, PCF50606_REG_GPOC5,
145+};
146+
147+
148+/* initialize PCF50606 register set */
149+void pcf50606_init(void)
150+{
151+ unsigned long flags;
152+ int i;
153+
154+ local_irq_save(flags);
155+ for (i = 0; i < ARRAY_SIZE(regs_valid); i++) {
156+ __pcf50606_reg_write(regs_valid[i],
157+ pcf50606_initial_regs[regs_valid[i]]);
158+ }
159+ local_irq_restore(flags);
160+}
161+
162+void pcf50606_charge_autofast(int on)
163+{
164+ if (on) {
165+ printf("Enabling automatic fast charge\n");
166+ pcf50606_reg_set_bit_mask(PCF50606_REG_MBCC1,
167+ PCF50606_MBCC1_AUTOFST,
168+ PCF50606_MBCC1_AUTOFST);
169+ } else {
170+ printf("Disabling fast charge\n");
171+ pcf50606_reg_write(PCF50606_REG_MBCC1, 0x00);
172+ }
173+}
174+
175+#endif /* CONFIG DRIVER_PCF50606 */
176Index: u-boot/include/pcf50606.h
177===================================================================
178--- /dev/null
179+++ u-boot/include/pcf50606.h
180@@ -0,0 +1,273 @@
181+#ifndef _PCF50606_H
182+#define _PCF50606_H
183+
184+/* Philips PCF50606 Power Managemnt Unit (PMU) driver
185+ * (C) 2006-2007 by OpenMoko, Inc.
186+ * Author: Harald Welte <laforge@openmoko.org>
187+ *
188+ */
189+
190+enum pfc50606_regs {
191+ PCF50606_REG_ID = 0x00,
192+ PCF50606_REG_OOCS = 0x01,
193+ PCF50606_REG_INT1 = 0x02, /* Interrupt Status */
194+ PCF50606_REG_INT2 = 0x03, /* Interrupt Status */
195+ PCF50606_REG_INT3 = 0x04, /* Interrupt Status */
196+ PCF50606_REG_INT1M = 0x05, /* Interrupt Mask */
197+ PCF50606_REG_INT2M = 0x06, /* Interrupt Mask */
198+ PCF50606_REG_INT3M = 0x07, /* Interrupt Mask */
199+ PCF50606_REG_OOCC1 = 0x08,
200+ PCF50606_REG_OOCC2 = 0x09,
201+ PCF50606_REG_RTCSC = 0x0a, /* Second */
202+ PCF50606_REG_RTCMN = 0x0b, /* Minute */
203+ PCF50606_REG_RTCHR = 0x0c, /* Hour */
204+ PCF50606_REG_RTCWD = 0x0d, /* Weekday */
205+ PCF50606_REG_RTCDT = 0x0e, /* Day */
206+ PCF50606_REG_RTCMT = 0x0f, /* Month */
207+ PCF50606_REG_RTCYR = 0x10, /* Year */
208+ PCF50606_REG_RTCSCA = 0x11, /* Alarm Second */
209+ PCF50606_REG_RTCMNA = 0x12, /* Alarm Minute */
210+ PCF50606_REG_RTCHRA = 0x13, /* Alarm Hour */
211+ PCF50606_REG_RTCWDA = 0x14, /* Alarm Weekday */
212+ PCF50606_REG_RTCDTA = 0x15, /* Alarm Day */
213+ PCF50606_REG_RTCMTA = 0x16, /* Alarm Month */
214+ PCF50606_REG_RTCYRA = 0x17, /* Alarm Year */
215+ PCF50606_REG_PSSC = 0x18, /* Power sequencing */
216+ PCF50606_REG_PWROKM = 0x19, /* PWROK mask */
217+ PCF50606_REG_PWROKS = 0x1a, /* PWROK status */
218+ PCF50606_REG_DCDC1 = 0x1b,
219+ PCF50606_REG_DCDC2 = 0x1c,
220+ PCF50606_REG_DCDC3 = 0x1d,
221+ PCF50606_REG_DCDC4 = 0x1e,
222+ PCF50606_REG_DCDEC1 = 0x1f,
223+ PCF50606_REG_DCDEC2 = 0x20,
224+ PCF50606_REG_DCUDC1 = 0x21,
225+ PCF50606_REG_DCUDC2 = 0x22,
226+ PCF50606_REG_IOREGC = 0x23,
227+ PCF50606_REG_D1REGC1 = 0x24,
228+ PCF50606_REG_D2REGC1 = 0x25,
229+ PCF50606_REG_D3REGC1 = 0x26,
230+ PCF50606_REG_LPREGC1 = 0x27,
231+ PCF50606_REG_LPREGC2 = 0x28,
232+ PCF50606_REG_MBCC1 = 0x29,
233+ PCF50606_REG_MBCC2 = 0x2a,
234+ PCF50606_REG_MBCC3 = 0x2b,
235+ PCF50606_REG_MBCS1 = 0x2c,
236+ PCF50606_REG_BBCC = 0x2d,
237+ PCF50606_REG_ADCC1 = 0x2e,
238+ PCF50606_REG_ADCC2 = 0x2f,
239+ PCF50606_REG_ADCS1 = 0x30,
240+ PCF50606_REG_ADCS2 = 0x31,
241+ PCF50606_REG_ADCS3 = 0x32,
242+ PCF50606_REG_ACDC1 = 0x33,
243+ PCF50606_REG_BVMC = 0x34,
244+ PCF50606_REG_PWMC1 = 0x35,
245+ PCF50606_REG_LEDC1 = 0x36,
246+ PCF50606_REG_LEDC2 = 0x37,
247+ PCF50606_REG_GPOC1 = 0x38,
248+ PCF50606_REG_GPOC2 = 0x39,
249+ PCF50606_REG_GPOC3 = 0x3a,
250+ PCF50606_REG_GPOC4 = 0x3b,
251+ PCF50606_REG_GPOC5 = 0x3c,
252+ __NUM_PCF50606_REGS
253+};
254+
255+enum pcf50606_reg_oocs {
256+ PFC50606_OOCS_ONKEY = 0x01,
257+ PCF50606_OOCS_EXTON = 0x02,
258+ PCF50606_OOCS_PWROKRST = 0x04,
259+ PCF50606_OOCS_BATOK = 0x08,
260+ PCF50606_OOCS_BACKOK = 0x10,
261+ PCF50606_OOCS_CHGOK = 0x20,
262+ PCF50606_OOCS_TEMPOK = 0x40,
263+ PCF50606_OOCS_WDTEXP = 0x80,
264+};
265+
266+enum pcf50606_reg_oocc1 {
267+ PCF50606_OOCC1_GOSTDBY = 0x01,
268+ PCF50606_OOCC1_TOTRST = 0x02,
269+ PCF50606_OOCC1_CLK32ON = 0x04,
270+ PCF50606_OOCC1_WDTRST = 0x08,
271+ PCF50606_OOCC1_RTCWAK = 0x10,
272+ PCF50606_OOCC1_CHGWAK = 0x20,
273+ PCF50606_OOCC1_EXTONWAK_HIGH = 0x40,
274+ PCF50606_OOCC1_EXTONWAK_LOW = 0x80,
275+ PCF50606_OOCC1_EXTONWAK_NO_WAKEUP = 0x3f,
276+};
277+
278+enum pcf50606_reg_oocc2 {
279+ PCF50606_OOCC2_ONKEYDB_NONE = 0x00,
280+ PCF50606_OOCC2_ONKEYDB_14ms = 0x01,
281+ PCF50606_OOCC2_ONKEYDB_62ms = 0x02,
282+ PCF50606_OOCC2_ONKEYDB_500ms = 0x03,
283+ PCF50606_OOCC2_EXTONDB_NONE = 0x00,
284+ PCF50606_OOCC2_EXTONDB_14ms = 0x04,
285+ PCF50606_OOCC2_EXTONDB_62ms = 0x08,
286+ PCF50606_OOCC2_EXTONDB_500ms = 0x0c,
287+};
288+
289+enum pcf50606_reg_int1 {
290+ PCF50606_INT1_ONKEYR = 0x01, /* ONKEY rising edge */
291+ PCF50606_INT1_ONKEYF = 0x02, /* ONKEY falling edge */
292+ PCF50606_INT1_ONKEY1S = 0x04, /* OMKEY at least 1sec low */
293+ PCF50606_INT1_EXTONR = 0x08, /* EXTON rising edge */
294+ PCF50606_INT1_EXTONF = 0x10, /* EXTON falling edge */
295+ PCF50606_INT1_SECOND = 0x40, /* RTC periodic second interrupt */
296+ PCF50606_INT1_ALARM = 0x80, /* RTC alarm time is reached */
297+};
298+
299+enum pcf50606_reg_int2 {
300+ PCF50606_INT2_CHGINS = 0x01, /* Charger inserted */
301+ PCF50606_INT2_CHGRM = 0x02, /* Charger removed */
302+ PCF50606_INT2_CHGFOK = 0x04, /* Fast charging OK */
303+ PCF50606_INT2_CHGERR = 0x08, /* Error in charging mode */
304+ PCF50606_INT2_CHGFRDY = 0x10, /* Fast charge completed */
305+ PCF50606_INT2_CHGPROT = 0x20, /* Charging protection interrupt */
306+ PCF50606_INT2_CHGWD10S = 0x40, /* Charger watchdig expires in 10s */
307+ PCF50606_INT2_CHGWDEXP = 0x80, /* Charger watchdog expires */
308+};
309+
310+enum pcf50606_reg_int3 {
311+ PCF50606_INT3_ADCRDY = 0x01, /* ADC conversion finished */
312+ PCF50606_INT3_ACDINS = 0x02, /* Accessory inserted */
313+ PCF50606_INT3_ACDREM = 0x04, /* Accessory removed */
314+ PCF50606_INT3_TSCPRES = 0x08, /* Touch screen pressed */
315+ PCF50606_INT3_LOWBAT = 0x40, /* Low battery voltage */
316+ PCF50606_INT3_HIGHTMP = 0x80, /* High temperature */
317+};
318+
319+/* used by PSSC, PWROKM, PWROKS, */
320+enum pcf50606_regu {
321+ PCF50606_REGU_DCD = 0x01, /* DCD in phase 2 */
322+ PCF50606_REGU_DCDE = 0x02, /* DCDE in phase 2 */
323+ PCF50606_REGU_DCUD = 0x04, /* DCDU in phase 2 */
324+ PCF50606_REGU_IO = 0x08, /* IO in phase 2 */
325+ PCF50606_REGU_D1 = 0x10, /* D1 in phase 2 */
326+ PCF50606_REGU_D2 = 0x20, /* D2 in phase 2 */
327+ PCF50606_REGU_D3 = 0x40, /* D3 in phase 2 */
328+ PCF50606_REGU_LP = 0x80, /* LP in phase 2 */
329+};
330+
331+enum pcf50606_reg_dcdc4 {
332+ PCF50606_DCDC4_MODE_AUTO = 0x00,
333+ PCF50606_DCDC4_MODE_PWM = 0x01,
334+ PCF50606_DCDC4_MODE_PCF = 0x02,
335+ PCF50606_DCDC4_OFF_FLOAT = 0x00,
336+ PCF50606_DCDC4_OFF_BYPASS = 0x04,
337+ PCF50606_DCDC4_OFF_PULLDOWN = 0x08,
338+ PCF50606_DCDC4_CURLIM_500mA = 0x00,
339+ PCF50606_DCDC4_CURLIM_750mA = 0x10,
340+ PCF50606_DCDC4_CURLIM_1000mA = 0x20,
341+ PCF50606_DCDC4_CURLIM_1250mA = 0x30,
342+ PCF50606_DCDC4_TOGGLE = 0x40,
343+ PCF50606_DCDC4_REGSEL_DCDC2 = 0x80,
344+};
345+
346+enum pcf50606_reg_dcdec2 {
347+ PCF50606_DCDEC2_MODE_AUTO = 0x00,
348+ PCF50606_DCDEC2_MODE_PWM = 0x01,
349+ PCF50606_DCDEC2_MODE_PCF = 0x02,
350+ PCF50606_DCDEC2_OFF_FLOAT = 0x00,
351+ PCF50606_DCDEC2_OFF_BYPASS = 0x04,
352+};
353+
354+enum pcf50606_reg_dcudc2 {
355+ PCF50606_DCUDC2_MODE_AUTO = 0x00,
356+ PCF50606_DCUDC2_MODE_PWM = 0x01,
357+ PCF50606_DCUDC2_MODE_PCF = 0x02,
358+ PCF50606_DCUDC2_OFF_FLOAT = 0x00,
359+ PCF50606_DCUDC2_OFF_BYPASS = 0x04,
360+};
361+
362+enum pcf50606_reg_adcc1 {
363+ PCF50606_ADCC1_TSCMODACT = 0x01,
364+ PCF50606_ADCC1_TSCMODSTB = 0x02,
365+ PCF50606_ADCC1_TRATSET = 0x04,
366+ PCF50606_ADCC1_NTCSWAPE = 0x08,
367+ PCF50606_ADCC1_NTCSWAOFF = 0x10,
368+ PCF50606_ADCC1_EXTSYNCBREAK = 0x20,
369+ /* reserved */
370+ PCF50606_ADCC1_TSCINT = 0x80,
371+};
372+
373+enum pcf50606_reg_adcc2 {
374+ PCF50606_ADCC2_ADCSTART = 0x01,
375+ /* see enum pcf50606_adcc2_adcmux */
376+ PCF50606_ADCC2_SYNC_NONE = 0x00,
377+ PCF50606_ADCC2_SYNC_TXON = 0x20,
378+ PCF50606_ADCC2_SYNC_PWREN1 = 0x40,
379+ PCF50606_ADCC2_SYNC_PWREN2 = 0x60,
380+ PCF50606_ADCC2_RES_10BIT = 0x00,
381+ PCF50606_ADCC2_RES_8BIT = 0x80,
382+};
383+
384+#define PCF50606_ADCC2_ADCMUX_MASK (0xf << 1)
385+
386+#define ADCMUX_SHIFT 1
387+enum pcf50606_adcc2_adcmux {
388+ PCF50606_ADCMUX_BATVOLT_RES = 0x0 << ADCMUX_SHIFT,
389+ PCF50606_ADCMUX_BATVOLT_SUBTR = 0x1 << ADCMUX_SHIFT,
390+ PCF50606_ADCMUX_ADCIN1_RES = 0x2 << ADCMUX_SHIFT,
391+ PCF50606_ADCMUX_ADCIN1_SUBTR = 0x3 << ADCMUX_SHIFT,
392+ PCF50606_ADCMUX_BATTEMP = 0x4 << ADCMUX_SHIFT,
393+ PCF50606_ADCMUX_ADCIN2 = 0x5 << ADCMUX_SHIFT,
394+ PCF50606_ADCMUX_ADCIN3 = 0x6 << ADCMUX_SHIFT,
395+ PCF50606_ADCMUX_ADCIN3_RATIO = 0x7 << ADCMUX_SHIFT,
396+ PCF50606_ADCMUX_XPOS = 0x8 << ADCMUX_SHIFT,
397+ PCF50606_ADCMUX_YPOS = 0x9 << ADCMUX_SHIFT,
398+ PCF50606_ADCMUX_P1 = 0xa << ADCMUX_SHIFT,
399+ PCF50606_ADCMUX_P2 = 0xb << ADCMUX_SHIFT,
400+ PCF50606_ADCMUX_BATVOLT_ADCIN1 = 0xc << ADCMUX_SHIFT,
401+ PCF50606_ADCMUX_XY_SEQUENCE = 0xe << ADCMUX_SHIFT,
402+ PCF50606_P1_P2_RESISTANCE = 0xf << ADCMUX_SHIFT,
403+};
404+
405+enum pcf50606_adcs2 {
406+ PCF50606_ADCS2_ADCRDY = 0x80,
407+};
408+
409+enum pcf50606_reg_mbcc1 {
410+ PCF50606_MBCC1_CHGAPE = 0x01,
411+ PCF50606_MBCC1_AUTOFST = 0x02,
412+#define PCF50606_MBCC1_CHGMOD_MASK 0x1c
413+#define PCF50606_MBCC1_CHGMOD_SHIFT 2
414+ PCF50606_MBCC1_CHGMOD_QUAL = 0x00,
415+ PCF50606_MBCC1_CHGMOD_PRE = 0x04,
416+ PCF50606_MBCC1_CHGMOD_TRICKLE = 0x08,
417+ PCF50606_MBCC1_CHGMOD_FAST_CCCV = 0x0c,
418+ PCF50606_MBCC1_CHGMOD_FAST_NOCC = 0x10,
419+ PCF50606_MBCC1_CHGMOD_FAST_NOCV = 0x14,
420+ PCF50606_MBCC1_CHGMOD_FAST_SW = 0x18,
421+ PCF50606_MBCC1_CHGMOD_IDLE = 0x1c,
422+ PCF50606_MBCC1_DETMOD_LOWCHG = 0x20,
423+ PCF50606_MBCC1_DETMOD_WDRST = 0x40,
424+};
425+
426+enum pcf50606_reg_bvmc {
427+ PCF50606_BVMC_LOWBAT = 0x01,
428+ PCF50606_BVMC_THRSHLD_NULL = 0x00,
429+ PCF50606_BVMC_THRSHLD_2V8 = 0x02,
430+ PCF50606_BVMC_THRSHLD_2V9 = 0x04,
431+ PCF50606_BVMC_THRSHLD_3V = 0x08,
432+ PCF50606_BVMC_THRSHLD_3V1 = 0x08,
433+ PCF50606_BVMC_THRSHLD_3V2 = 0x0a,
434+ PCF50606_BVMC_THRSHLD_3V3 = 0x0c,
435+ PCF50606_BVMC_THRSHLD_3V4 = 0x0e,
436+ PCF50606_BVMC_DISDB = 0x10,
437+};
438+
439+/* this is to be provided by the board implementation */
440+extern const u_int8_t pcf50606_initial_regs[__NUM_PCF50606_REGS];
441+
442+void pcf50606_reg_write(u_int8_t reg, u_int8_t val);
443+
444+u_int8_t pcf50606_reg_read(u_int8_t reg);
445+
446+void pcf50606_reg_set_bit_mask(u_int8_t reg, u_int8_t mask, u_int8_t val);
447+void pcf50606_reg_clear_bits(u_int8_t reg, u_int8_t bits);
448+
449+void pcf50606_init(void);
450+void pcf50606_charge_autofast(int on);
451+
452+#endif /* _PCF50606_H */
453+
454Index: u-boot/board/neo1973/common/cmd_neo1973.c
455===================================================================
456--- /dev/null
457+++ u-boot/board/neo1973/common/cmd_neo1973.c
458@@ -0,0 +1,99 @@
459+/*
460+ * (C) Copyright 2006 by OpenMoko, Inc.
461+ * Author: Harald Welte <laforge@openmoko.org>
462+ *
463+ * See file CREDITS for list of people who contributed to this
464+ * project.
465+ *
466+ * This program is free software; you can redistribute it and/or
467+ * modify it under the terms of the GNU General Public License as
468+ * published by the Free Software Foundation; either version 2 of
469+ * the License, or (at your option) any later version.
470+ *
471+ * This program is distributed in the hope that it will be useful,
472+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
473+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
474+ * GNU General Public License for more details.
475+ *
476+ * You should have received a copy of the GNU General Public License
477+ * along with this program; if not, write to the Free Software
478+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
479+ * MA 02111-1307 USA
480+ */
481+
482+/*
483+ * Boot support
484+ */
485+#include <common.h>
486+#include <command.h>
487+#include <net.h> /* for print_IPaddr */
488+#include <s3c2410.h>
489+
490+#include "neo1973.h"
491+
492+DECLARE_GLOBAL_DATA_PTR;
493+
494+#if (CONFIG_COMMANDS & CFG_CMD_BDI)
495+
496+int do_neo1973 ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
497+{
498+ int i;
499+
500+ if (!strcmp(argv[1], "info")) {
501+ printf("FIC Neo1973 Hardware Revision 0x%04x\n", get_board_rev());
502+ } else if (!strcmp(argv[1], "power-off")) {
503+ neo1973_poweroff();
504+ } else if (!strcmp(argv[1], "charger") || !strcmp(argv[1], "charge")) {
505+ if (argc < 3)
506+ goto out_help;
507+ if (!strcmp(argv[2], "status") || !strcmp(argv[2], "state")) {
508+ printf("%s\n", neo1973_get_charge_status());
509+ } else if (!strcmp(argv[2], "autofast")) {
510+ neo1973_set_charge_mode(NEO1973_CHGCMD_AUTOFAST);
511+ } else if (!strcmp(argv[2], "!autofast")) {
512+ neo1973_set_charge_mode(NEO1973_CHGCMD_NO_AUTOFAST);
513+ } else if (!strcmp(argv[2], "off")) {
514+ neo1973_set_charge_mode(NEO1973_CHGCMD_OFF);
515+ } else if (!strcmp(argv[2], "fast")) {
516+ neo1973_set_charge_mode(NEO1973_CHGCMD_FAST);
517+ } else
518+ goto out_help;
519+ } else if (!strcmp(argv[1], "backlight")) {
520+ if (argc < 3)
521+ goto out_help;
522+ if (!strcmp(argv[2], "on"))
523+ neo1973_backlight(1);
524+ else
525+ neo1973_backlight(0);
526+ } else if (!strcmp(argv[1], "vibrator")) {
527+ if (argc < 3)
528+ goto out_help;
529+ if (!strcmp(argv[2], "on"))
530+ neo1973_vibrator(1);
531+ else
532+ neo1973_vibrator(0);
533+ } else {
534+out_help:
535+ printf("Usage:\n%s\n", cmdtp->usage);
536+ return 1;
537+ }
538+
539+ return 0;
540+}
541+
542+/* -------------------------------------------------------------------- */
543+
544+U_BOOT_CMD(
545+ neo1973, 4, 1, do_neo1973,
546+ "neo1973 - phone specific commands\n",
547+ "neo1973 info - display phone informantion\n"
548+ "neo1973 power-off - switch off the phone\n"
549+ "neo1973 charger status - display charger status\n"
550+ "neo1973 charger autofast - enable automatic fast (500mA) charging\n"
551+ "neo1973 charger !autofast - disable automatic fast (500mA) charging\n"
552+ "neo1973 charger fast - enable fast (500mA) charging\n"
553+ "neo1973 charger off - disable charging\n"
554+ "neo1973 backlight (on|off) - switch backlight on or off\n"
555+ "neo1973 vibrator (on|off) - switch vibrator on or off\n"
556+);
557+#endif /* CFG_CMD_BDI */
558Index: u-boot/board/neo1973/common/jbt6k74.c
559===================================================================
560--- /dev/null
561+++ u-boot/board/neo1973/common/jbt6k74.c
562@@ -0,0 +1,420 @@
563+/* u-boot driver for the tpo JBT6K74-AS LCM ASIC
564+ *
565+ * Copyright (C) 2006-2007 by OpenMoko, Inc.
566+ * Author: Harald Welte <laforge@openmoko.org>
567+ * All rights reserved.
568+ *
569+ * This program is free software; you can redistribute it and/or
570+ * modify it under the terms of the GNU General Public License as
571+ * published by the Free Software Foundation; either version 2 of
572+ * the License, or (at your option) any later version.
573+ *
574+ * This program is distributed in the hope that it will be useful,
575+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
576+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
577+ * GNU General Public License for more details.
578+ *
579+ * You should have received a copy of the GNU General Public License
580+ * along with this program; if not, write to the Free Software
581+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
582+ * MA 02111-1307 USA
583+ *
584+ */
585+#include <common.h>
586+#include <spi.h>
587+#include <video_fb.h>
588+#include <asm/errno.h>
589+#include <s3c2410.h>
590+#include "jbt6k74.h"
591+
592+#if 0
593+#define DEBUGP(x, args...) printf("%s: " x, __FUNCTION__, ## args);
594+#define DEBUGPC(x, args...) printf(x, ## args);
595+#else
596+#define DEBUGP(x, args...) do { } while (0)
597+#define DEBUGPC(x, args...) do { } while (0)
598+#endif
599+
600+
601+enum jbt_register {
602+ JBT_REG_SLEEP_IN = 0x10,
603+ JBT_REG_SLEEP_OUT = 0x11,
604+
605+ JBT_REG_DISPLAY_OFF = 0x28,
606+ JBT_REG_DISPLAY_ON = 0x29,
607+
608+ JBT_REG_RGB_FORMAT = 0x3a,
609+ JBT_REG_QUAD_RATE = 0x3b,
610+
611+ JBT_REG_POWER_ON_OFF = 0xb0,
612+ JBT_REG_BOOSTER_OP = 0xb1,
613+ JBT_REG_BOOSTER_MODE = 0xb2,
614+ JBT_REG_BOOSTER_FREQ = 0xb3,
615+ JBT_REG_OPAMP_SYSCLK = 0xb4,
616+ JBT_REG_VSC_VOLTAGE = 0xb5,
617+ JBT_REG_VCOM_VOLTAGE = 0xb6,
618+ JBT_REG_EXT_DISPL = 0xb7,
619+ JBT_REG_OUTPUT_CONTROL = 0xb8,
620+ JBT_REG_DCCLK_DCEV = 0xb9,
621+ JBT_REG_DISPLAY_MODE1 = 0xba,
622+ JBT_REG_DISPLAY_MODE2 = 0xbb,
623+ JBT_REG_DISPLAY_MODE = 0xbc,
624+ JBT_REG_ASW_SLEW = 0xbd,
625+ JBT_REG_DUMMY_DISPLAY = 0xbe,
626+ JBT_REG_DRIVE_SYSTEM = 0xbf,
627+
628+ JBT_REG_SLEEP_OUT_FR_A = 0xc0,
629+ JBT_REG_SLEEP_OUT_FR_B = 0xc1,
630+ JBT_REG_SLEEP_OUT_FR_C = 0xc2,
631+ JBT_REG_SLEEP_IN_LCCNT_D = 0xc3,
632+ JBT_REG_SLEEP_IN_LCCNT_E = 0xc4,
633+ JBT_REG_SLEEP_IN_LCCNT_F = 0xc5,
634+ JBT_REG_SLEEP_IN_LCCNT_G = 0xc6,
635+
636+ JBT_REG_GAMMA1_FINE_1 = 0xc7,
637+ JBT_REG_GAMMA1_FINE_2 = 0xc8,
638+ JBT_REG_GAMMA1_INCLINATION = 0xc9,
639+ JBT_REG_GAMMA1_BLUE_OFFSET = 0xca,
640+
641+ JBT_REG_BLANK_CONTROL = 0xcf,
642+ JBT_REG_BLANK_TH_TV = 0xd0,
643+ JBT_REG_CKV_ON_OFF = 0xd1,
644+ JBT_REG_CKV_1_2 = 0xd2,
645+ JBT_REG_OEV_TIMING = 0xd3,
646+ JBT_REG_ASW_TIMING_1 = 0xd4,
647+ JBT_REG_ASW_TIMING_2 = 0xd5,
648+
649+ JBT_REG_HCLOCK_VGA = 0xec,
650+ JBT_REG_HCLOCK_QVGA = 0xed,
651+
652+};
653+
654+static const char *jbt_state_names[] = {
655+ [JBT_STATE_DEEP_STANDBY] = "deep-standby",
656+ [JBT_STATE_SLEEP] = "sleep",
657+ [JBT_STATE_NORMAL] = "normal",
658+};
659+
660+#define GTA01_SCLK (1 << 7) /* GPG7 */
661+#define GTA01_MOSI (1 << 6) /* GPG6 */
662+#define GTA01_MISO (1 << 5) /* GPG5 */
663+#define GTA01_CS (1 << 3) /* GPG3 */
664+
665+#define SPI_READ ((immr->GPGDAT & GTA01_MISO) != 0)
666+
667+#define SPI_CS(bit) if (bit) gpio->GPGDAT |= GTA01_CS; \
668+ else gpio->GPGDAT &= ~GTA01_CS
669+
670+#define SPI_SDA(bit) if (bit) gpio->GPGDAT |= GTA01_MOSI; \
671+ else gpio->GPGDAT &= ~GTA01_MOSI
672+
673+#define SPI_SCL(bit) if (bit) gpio->GPGDAT |= GTA01_SCLK; \
674+ else gpio->GPGDAT &= ~GTA01_SCLK
675+
676+/* 150uS minimum clock cycle, we have two of this plus our other
677+ * instructions */
678+#define SPI_DELAY udelay(100) /* 200uS */
679+
680+
681+#define JBT_TX_BUF_SIZE
682+struct jbt_info {
683+ enum jbt_state state;
684+ u_int16_t tx_buf[4];
685+ struct spi_device *spi_dev;
686+};
687+
688+static struct jbt_info _jbt, *jbt = &_jbt;
689+
690+static int jbt_spi_xfer(int wordnum, int bitlen, u_int16_t *dout)
691+{
692+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
693+ u_int16_t tmpdout = 0;
694+ int i, j;
695+
696+ DEBUGP("spi_xfer: dout %08X wordnum %u bitlen %d\n",
697+ *(uint *)dout, wordnum, bitlen);
698+
699+ SPI_CS(0);
700+
701+ for (i = 0; i < wordnum; i ++) {
702+ tmpdout = dout[i];
703+
704+ for (j = 0; j < bitlen; j++) {
705+ SPI_SCL(0);
706+ if (tmpdout & (1 << bitlen-1)) {
707+ SPI_SDA(1);
708+ DEBUGPC("1");
709+ } else {
710+ SPI_SDA(0);
711+ DEBUGPC("0");
712+ }
713+ SPI_DELAY;
714+ SPI_SCL(1);
715+ SPI_DELAY;
716+ tmpdout <<= 1;
717+ }
718+ DEBUGPC(" ");
719+ }
720+ DEBUGPC("\n");
721+
722+ SPI_CS(1);
723+
724+ return 0;
725+}
726+
727+#define JBT_COMMAND 0x000
728+#define JBT_DATA 0x100
729+
730+static int jbt_reg_write_nodata(struct jbt_info *jbt, u_int8_t reg)
731+{
732+ int rc;
733+
734+ jbt->tx_buf[0] = JBT_COMMAND | reg;
735+
736+ rc = jbt_spi_xfer(1, 9, jbt->tx_buf);
737+
738+ return rc;
739+}
740+
741+
742+static int jbt_reg_write(struct jbt_info *jbt, u_int8_t reg, u_int8_t data)
743+{
744+ int rc;
745+
746+ jbt->tx_buf[0] = JBT_COMMAND | reg;
747+ jbt->tx_buf[1] = JBT_DATA | data;
748+
749+ rc = jbt_spi_xfer(2, 9, jbt->tx_buf);
750+
751+ return rc;
752+}
753+
754+static int jbt_reg_write16(struct jbt_info *jbt, u_int8_t reg, u_int16_t data)
755+{
756+ int rc;
757+
758+ jbt->tx_buf[0] = JBT_COMMAND | reg;
759+ jbt->tx_buf[1] = JBT_DATA | (data >> 8);
760+ jbt->tx_buf[2] = JBT_DATA | (data & 0xff);
761+
762+ rc = jbt_spi_xfer(3, 9, jbt->tx_buf);
763+
764+ return rc;
765+}
766+
767+static int jbt_init_regs(struct jbt_info *jbt)
768+{
769+ int rc;
770+
771+ DEBUGP("entering\n");
772+
773+ rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE1, 0x01);
774+ rc |= jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE2, 0x00);
775+ rc |= jbt_reg_write(jbt, JBT_REG_RGB_FORMAT, 0x60);
776+ rc |= jbt_reg_write(jbt, JBT_REG_DRIVE_SYSTEM, 0x10);
777+ rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_OP, 0x56);
778+ rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_MODE, 0x33);
779+ rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_FREQ, 0x11);
780+ rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_FREQ, 0x11);
781+ rc |= jbt_reg_write(jbt, JBT_REG_OPAMP_SYSCLK, 0x02);
782+ rc |= jbt_reg_write(jbt, JBT_REG_VSC_VOLTAGE, 0x2b);
783+ rc |= jbt_reg_write(jbt, JBT_REG_VCOM_VOLTAGE, 0x40);
784+ rc |= jbt_reg_write(jbt, JBT_REG_EXT_DISPL, 0x03);
785+ rc |= jbt_reg_write(jbt, JBT_REG_DCCLK_DCEV, 0x04);
786+ rc |= jbt_reg_write(jbt, JBT_REG_ASW_SLEW, 0x02);
787+ rc |= jbt_reg_write(jbt, JBT_REG_DUMMY_DISPLAY, 0x00);
788+
789+ rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_A, 0x11);
790+ rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_B, 0x11);
791+ rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_C, 0x11);
792+ rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_D, 0x2040);
793+ rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_E, 0x60c0);
794+ rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_F, 0x1020);
795+ rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_G, 0x60c0);
796+
797+ rc |= jbt_reg_write16(jbt, JBT_REG_GAMMA1_FINE_1, 0x5533);
798+ rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_FINE_2, 0x00);
799+ rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_INCLINATION, 0x00);
800+ rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00);
801+ rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00);
802+
803+ rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_VGA, 0x1f0);
804+ rc |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL, 0x02);
805+ rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV, 0x0804);
806+ rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV, 0x0804);
807+
808+ rc |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF, 0x01);
809+ rc |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2, 0x0000);
810+
811+ rc |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING, 0x0d0e);
812+ rc |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1, 0x11a4);
813+ rc |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2, 0x0e);
814+
815+#if 0
816+ rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_QVGA, 0x00ff);
817+ rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_QVGA, 0x00ff);
818+#endif
819+
820+ return rc;
821+}
822+
823+static int standby_to_sleep(struct jbt_info *jbt)
824+{
825+ int rc;
826+
827+ DEBUGP("entering\n");
828+
829+ /* three times command zero */
830+ rc = jbt_reg_write_nodata(jbt, 0x00);
831+ udelay(1000);
832+ rc = jbt_reg_write_nodata(jbt, 0x00);
833+ udelay(1000);
834+ rc = jbt_reg_write_nodata(jbt, 0x00);
835+ udelay(1000);
836+
837+ /* deep standby out */
838+ rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x17);
839+
840+ return rc;
841+}
842+
843+static int sleep_to_normal(struct jbt_info *jbt)
844+{
845+ int rc;
846+ DEBUGP("entering\n");
847+
848+ /* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */
849+ rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x80);
850+
851+ /* Quad mode off */
852+ rc |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x00);
853+
854+ /* AVDD on, XVDD on */
855+ rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x16);
856+
857+ /* Output control */
858+ rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xfff9);
859+
860+ /* Sleep mode off */
861+ rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT);
862+
863+ /* initialize register set */
864+ rc |= jbt_init_regs(jbt);
865+ return rc;
866+}
867+
868+static int normal_to_sleep(struct jbt_info *jbt)
869+{
870+ int rc;
871+ DEBUGP("entering\n");
872+
873+ rc = jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_OFF);
874+ rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0x8002);
875+ rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_IN);
876+
877+ return rc;
878+}
879+
880+static int sleep_to_standby(struct jbt_info *jbt)
881+{
882+ DEBUGP("entering\n");
883+ return jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x00);
884+}
885+
886+/* frontend function */
887+int jbt6k74_enter_state(enum jbt_state new_state)
888+{
889+ int rc = -EINVAL;
890+
891+ DEBUGP("entering(old_state=%u, new_state=%u)\n", jbt->state, new_state);
892+
893+ switch (jbt->state) {
894+ case JBT_STATE_DEEP_STANDBY:
895+ switch (new_state) {
896+ case JBT_STATE_DEEP_STANDBY:
897+ rc = 0;
898+ break;
899+ case JBT_STATE_SLEEP:
900+ rc = standby_to_sleep(jbt);
901+ break;
902+ case JBT_STATE_NORMAL:
903+ /* first transition into sleep */
904+ rc = standby_to_sleep(jbt);
905+ /* then transition into normal */
906+ rc |= sleep_to_normal(jbt);
907+ break;
908+ }
909+ break;
910+ case JBT_STATE_SLEEP:
911+ switch (new_state) {
912+ case JBT_STATE_SLEEP:
913+ rc = 0;
914+ break;
915+ case JBT_STATE_DEEP_STANDBY:
916+ rc = sleep_to_standby(jbt);
917+ break;
918+ case JBT_STATE_NORMAL:
919+ rc = sleep_to_normal(jbt);
920+ break;
921+ }
922+ break;
923+ case JBT_STATE_NORMAL:
924+ switch (new_state) {
925+ case JBT_STATE_NORMAL:
926+ rc = 0;
927+ break;
928+ case JBT_STATE_DEEP_STANDBY:
929+ /* first transition into sleep */
930+ rc = normal_to_sleep(jbt);
931+ /* then transition into deep standby */
932+ rc |= sleep_to_standby(jbt);
933+ break;
934+ case JBT_STATE_SLEEP:
935+ rc = normal_to_sleep(jbt);
936+ break;
937+ }
938+ break;
939+ }
940+
941+ return rc;
942+}
943+
944+int jbt6k74_display_onoff(int on)
945+{
946+ DEBUGP("entering\n");
947+ if (on)
948+ return jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_ON);
949+ else
950+ return jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_OFF);
951+}
952+
953+int jbt6k74_init(void)
954+{
955+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
956+
957+ /* initialize SPI for GPIO bitbang */
958+ gpio->GPGCON &= 0xffff033f;
959+ gpio->GPGCON |= 0x00005440;
960+
961+ /* get LCM out of reset */
962+ gpio->GPCDAT |= (1 << 6);
963+
964+ /* according to data sheet: wait 50ms (Tpos of LCM). However, 50ms
965+ * seems unreliable with later LCM batches, increasing to 90ms */
966+ udelay(90000);
967+
968+ return 0;
969+}
970+
971+void board_video_init(GraphicDevice *pGD)
972+{
973+ S3C24X0_LCD * const lcd = S3C24X0_GetBase_LCD();
974+
975+ lcd->LCDCON1 = 0x00000178; /* CLKVAL=1, BPPMODE=16bpp, TFT, ENVID=0 */
976+
977+ lcd->LCDCON2 = 0x019fc3c1;
978+ lcd->LCDCON3 = 0x0039df67;
979+ lcd->LCDCON4 = 0x00000007;
980+ lcd->LCDCON5 = 0x0001cf09;
981+ lcd->LPCSEL = 0x00000000;
982+}
983Index: u-boot/board/neo1973/common/jbt6k74.h
984===================================================================
985--- /dev/null
986+++ u-boot/board/neo1973/common/jbt6k74.h
987@@ -0,0 +1,14 @@
988+#ifndef _JBT6K74_H
989+#define _JBT6K74_H
990+
991+enum jbt_state {
992+ JBT_STATE_DEEP_STANDBY,
993+ JBT_STATE_SLEEP,
994+ JBT_STATE_NORMAL,
995+};
996+
997+int jbt6k74_init(void);
998+int jbt6k74_display_onoff(int on);
999+int jbt6k74_enter_state(enum jbt_state new_state);
1000+
1001+#endif
1002Index: u-boot/board/neo1973/common/lowlevel_init.S
1003===================================================================
1004--- /dev/null
1005+++ u-boot/board/neo1973/common/lowlevel_init.S
1006@@ -0,0 +1,187 @@
1007+/*
1008+ * Memory Setup stuff - taken from blob memsetup.S
1009+ *
1010+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
1011+ * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
1012+ *
1013+ * Modified for the FIC Neo1973 GTA01 by Harald Welte <laforge@openmoko.org>
1014+ *
1015+ * See file CREDITS for list of people who contributed to this
1016+ * project.
1017+ *
1018+ * This program is free software; you can redistribute it and/or
1019+ * modify it under the terms of the GNU General Public License as
1020+ * published by the Free Software Foundation; either version 2 of
1021+ * the License, or (at your option) any later version.
1022+ *
1023+ * This program is distributed in the hope that it will be useful,
1024+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1025+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1026+ * GNU General Public License for more details.
1027+ *
1028+ * You should have received a copy of the GNU General Public License
1029+ * along with this program; if not, write to the Free Software
1030+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1031+ * MA 02111-1307 USA
1032+ */
1033+
1034+
1035+#include <config.h>
1036+#include <version.h>
1037+
1038+
1039+/* some parameters for the board */
1040+
1041+/*
1042+ *
1043+ * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
1044+ *
1045+ * Copyright (C) 2002 Samsung Electronics SW.LEE <hitchcar@sec.samsung.com>
1046+ *
1047+ */
1048+
1049+#define BWSCON 0x48000000
1050+
1051+/* BWSCON */
1052+#define DW8 (0x0)
1053+#define DW16 (0x1)
1054+#define DW32 (0x2)
1055+#define WAIT (0x1<<2)
1056+#define UBLB (0x1<<3)
1057+
1058+#define B1_BWSCON (DW32)
1059+#define B2_BWSCON (DW16)
1060+#define B3_BWSCON (DW16 + WAIT + UBLB)
1061+#define B4_BWSCON (DW16)
1062+#define B5_BWSCON (DW16)
1063+#define B6_BWSCON (DW32)
1064+#define B7_BWSCON (DW32)
1065+
1066+/* BANK0CON */
1067+#define B0_Tacs 0x0 /* 0clk */
1068+#define B0_Tcos 0x0 /* 0clk */
1069+#define B0_Tacc 0x7 /* 14clk */
1070+#define B0_Tcoh 0x0 /* 0clk */
1071+#define B0_Tah 0x0 /* 0clk */
1072+#define B0_Tacp 0x0
1073+#define B0_PMC 0x0 /* normal */
1074+
1075+/* BANK1CON */
1076+#define B1_Tacs 0x0 /* 0clk */
1077+#define B1_Tcos 0x0 /* 0clk */
1078+#define B1_Tacc 0x7 /* 14clk */
1079+#define B1_Tcoh 0x0 /* 0clk */
1080+#define B1_Tah 0x0 /* 0clk */
1081+#define B1_Tacp 0x0
1082+#define B1_PMC 0x0
1083+
1084+#define B2_Tacs 0x0
1085+#define B2_Tcos 0x0
1086+#define B2_Tacc 0x7
1087+#define B2_Tcoh 0x0
1088+#define B2_Tah 0x0
1089+#define B2_Tacp 0x0
1090+#define B2_PMC 0x0
1091+
1092+#define B3_Tacs 0x0 /* 0clk */
1093+#define B3_Tcos 0x3 /* 4clk */
1094+#define B3_Tacc 0x7 /* 14clk */
1095+#define B3_Tcoh 0x1 /* 1clk */
1096+#define B3_Tah 0x0 /* 0clk */
1097+#define B3_Tacp 0x3 /* 6clk */
1098+#define B3_PMC 0x0 /* normal */
1099+
1100+#define B4_Tacs 0x0 /* 0clk */
1101+#define B4_Tcos 0x0 /* 0clk */
1102+#define B4_Tacc 0x7 /* 14clk */
1103+#define B4_Tcoh 0x0 /* 0clk */
1104+#define B4_Tah 0x0 /* 0clk */
1105+#define B4_Tacp 0x0
1106+#define B4_PMC 0x0 /* normal */
1107+
1108+#define B5_Tacs 0x0 /* 0clk */
1109+#define B5_Tcos 0x0 /* 0clk */
1110+#define B5_Tacc 0x7 /* 14clk */
1111+#define B5_Tcoh 0x0 /* 0clk */
1112+#define B5_Tah 0x0 /* 0clk */
1113+#define B5_Tacp 0x0
1114+#define B5_PMC 0x0 /* normal */
1115+
1116+#define B6_MT 0x3 /* SDRAM */
1117+#define B6_Trcd 0x1 /* 3clk */
1118+#if defined (CONFIG_ARCH_GTA01_v3) || defined(CONFIG_ARCH_GTA01_v4)
1119+#define B6_SCAN 0x1 /* 9bit */
1120+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3) || \
1121+ defined(CONFIG_ARCH_GTA01B_v4)
1122+#define B6_SCAN 0x2 /* 10bit */
1123+#endif
1124+
1125+#define B7_MT 0x3 /* SDRAM */
1126+#define B7_Trcd 0x1 /* 3clk */
1127+#define B7_SCAN 0x2 /* 10bit */
1128+
1129+/* REFRESH parameter */
1130+#define REFEN 0x1 /* Refresh enable */
1131+#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */
1132+#define Trp 0x1 /* 3clk */
1133+#define Trc 0x3 /* 7clk */
1134+#define Tchr 0x2 /* 3clk */
1135+//#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */
1136+#define REFCNT 997 /* period=17.5us, HCLK=60Mhz, (2048+1-15.6*60) */
1137+/**************************************/
1138+
1139+_TEXT_BASE:
1140+ .word TEXT_BASE
1141+
1142+.globl lowlevel_init
1143+lowlevel_init:
1144+ /* memory control configuration */
1145+ /* make r0 relative the current location so that it */
1146+ /* reads SMRDATA out of FLASH rather than memory ! */
1147+ adr r0, SMRDATA
1148+ ldr r1, =BWSCON /* Bus Width Status Controller */
1149+ add r2, r0, #13*4
1150+0:
1151+ ldr r3, [r0], #4
1152+ str r3, [r1], #4
1153+ cmp r2, r0
1154+ bne 0b
1155+
1156+ /* setup asynchronous bus mode */
1157+ mrc p15, 0, r1 ,c1 ,c0, 0
1158+ orr r1, r1, #0xc0000000
1159+ mcr p15, 0, r1, c1, c0, 0
1160+
1161+#if defined(CONFIG_ARCH_GTA01_v4) || defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3)
1162+ /* switch on power for NAND */
1163+ ldr r0, =0x56000010 /* GPBCON */
1164+ ldr r1, [r0]
1165+ orr r1, r1, #0x10
1166+ str r1, [r0]
1167+
1168+ ldr r0, =0x56000014 /* GPBDAT */
1169+ ldr r1, [r0]
1170+ orr r1, r1, #(1 <<2)
1171+ str r1, [r0]
1172+#endif
1173+
1174+ /* everything is fine now */
1175+ mov pc, lr
1176+
1177+ .ltorg
1178+/* the literal pools origin */
1179+
1180+SMRDATA:
1181+ .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
1182+ .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))
1183+ .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))
1184+ .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))
1185+ .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))
1186+ .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))
1187+ .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))
1188+ .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
1189+ .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
1190+ .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
1191+ .word 0xb2
1192+ .word 0x30
1193+ .word 0x30
1194Index: u-boot/board/neo1973/gta01/Makefile
1195===================================================================
1196--- /dev/null
1197+++ u-boot/board/neo1973/gta01/Makefile
1198@@ -0,0 +1,47 @@
1199+#
1200+# (C) Copyright 2000, 2001, 2002
1201+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
1202+#
1203+# See file CREDITS for list of people who contributed to this
1204+# project.
1205+#
1206+# This program is free software; you can redistribute it and/or
1207+# modify it under the terms of the GNU General Public License as
1208+# published by the Free Software Foundation; either version 2 of
1209+# the License, or (at your option) any later version.
1210+#
1211+# This program is distributed in the hope that it will be useful,
1212+# but WITHOUT ANY WARRANTY; without even the implied warranty of
1213+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1214+# GNU General Public License for more details.
1215+#
1216+# You should have received a copy of the GNU General Public License
1217+# along with this program; if not, write to the Free Software
1218+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1219+# MA 02111-1307 USA
1220+#
1221+
1222+include $(TOPDIR)/config.mk
1223+
1224+LIB = lib$(BOARD).a
1225+
1226+OBJS := gta01.o pcf50606.o ../common/cmd_neo1973.o ../common/jbt6k74.o
1227+SOBJS := ../common/lowlevel_init.o
1228+
1229+$(LIB): $(OBJS) $(SOBJS)
1230+ $(AR) crv $@ $(OBJS) $(SOBJS)
1231+
1232+clean:
1233+ rm -f $(SOBJS) $(OBJS)
1234+
1235+distclean: clean
1236+ rm -f $(LIB) core *.bak .depend
1237+
1238+#########################################################################
1239+
1240+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
1241+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
1242+
1243+-include .depend
1244+
1245+#########################################################################
1246Index: u-boot/board/neo1973/gta01/config.mk
1247===================================================================
1248--- /dev/null
1249+++ u-boot/board/neo1973/gta01/config.mk
1250@@ -0,0 +1,34 @@
1251+#
1252+# (C) Copyright 2002
1253+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
1254+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
1255+#
1256+# FIC Neo1973 GTA01 board with S3C2410X (ARM920T) cpu
1257+#
1258+# see http://www.samsung.com/ for more information on SAMSUNG
1259+#
1260+
1261+# GTA01v3 has 1 bank of 64 MB SDRAM
1262+# GTA01v4 has 1 bank of 64 MB SDRAM
1263+#
1264+# 3000'0000 to 3400'0000
1265+# we load ourself to 33F8'0000
1266+#
1267+# GTA01Bv2 or later has 1 bank of 128 MB SDRAM
1268+#
1269+# 3000'0000 to 3800'0000
1270+# we load ourself to 37F8'0000
1271+#
1272+# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000
1273+# optionally with a ramdisk at 3080'0000
1274+#
1275+# download area is 3200'0000 or 3300'0000
1276+
1277+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
1278+
1279+ifeq ($(GTA01_BIG_RAM),y)
1280+# FIXME: TEXT_BASE = 0x37F80000
1281+TEXT_BASE = 0x33F80000
1282+else
1283+TEXT_BASE = 0x33F80000
1284+endif
1285Index: u-boot/board/neo1973/gta01/gta01.c
1286===================================================================
1287--- /dev/null
1288+++ u-boot/board/neo1973/gta01/gta01.c
1289@@ -0,0 +1,422 @@
1290+/*
1291+ * (C) 2006 by OpenMoko, Inc.
1292+ * Author: Harald Welte <laforge@openmoko.org>
1293+ *
1294+ * based on existing S3C2410 startup code in u-boot:
1295+ *
1296+ * (C) Copyright 2002
1297+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
1298+ * Marius Groeger <mgroeger@sysgo.de>
1299+ *
1300+ * (C) Copyright 2002
1301+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
1302+ *
1303+ * See file CREDITS for list of people who contributed to this
1304+ * project.
1305+ *
1306+ * This program is free software; you can redistribute it and/or
1307+ * modify it under the terms of the GNU General Public License as
1308+ * published by the Free Software Foundation; either version 2 of
1309+ * the License, or (at your option) any later version.
1310+ *
1311+ * This program is distributed in the hope that it will be useful,
1312+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1313+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1314+ * GNU General Public License for more details.
1315+ *
1316+ * You should have received a copy of the GNU General Public License
1317+ * along with this program; if not, write to the Free Software
1318+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1319+ * MA 02111-1307 USA
1320+ */
1321+
1322+#include <common.h>
1323+#include <s3c2410.h>
1324+#include <i2c.h>
1325+
1326+#include "pcf50606.h"
1327+
1328+#include "../common/neo1973.h"
1329+#include "../common/jbt6k74.h"
1330+
1331+DECLARE_GLOBAL_DATA_PTR;
1332+
1333+/* That many seconds the power key needs to be pressed to power up */
1334+#define POWER_KEY_SECONDS 2
1335+
1336+#if defined(CONFIG_ARCH_GTA01_v3) || defined(CONFIG_ARCH_GTA01_v4)
1337+//#define M_MDIV 0xA1 /* Fout = 202.8MHz */
1338+//#define M_PDIV 0x3
1339+//#define M_SDIV 0x1
1340+#define M_MDIV 0x90 /* Fout = 202.8MHz */
1341+#define M_PDIV 0x7
1342+#define M_SDIV 0x0
1343+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3)
1344+/* In case the debug board is attached, we cannot go beyond 200 MHz */
1345+#if 0
1346+#define M_MDIV 0x7d /* Fout = 266MHz */
1347+#define M_PDIV 0x1
1348+#define M_SDIV 0x1
1349+#else
1350+#define M_MDIV 0x90 /* Fout = 202.8MHz */
1351+#define M_PDIV 0x7
1352+#define M_SDIV 0x0
1353+#endif
1354+#elif defined(CONFIG_ARCH_GTA01B_v4)
1355+/* This board doesn't have bus lines at teh debug port, and we can go to 266 */
1356+#define M_MDIV 0x7d /* Fout = 266MHz */
1357+#define M_PDIV 0x1
1358+#define M_SDIV 0x1
1359+#else
1360+#error Please define GTA01 revision
1361+#endif
1362+
1363+#define U_M_MDIV 0x78
1364+#define U_M_PDIV 0x2
1365+#define U_M_SDIV 0x3
1366+
1367+unsigned int neo1973_wakeup_cause;
1368+extern int nobootdelay;
1369+
1370+static inline void delay (unsigned long loops)
1371+{
1372+ __asm__ volatile ("1:\n"
1373+ "subs %0, %1, #1\n"
1374+ "bne 1b":"=r" (loops):"0" (loops));
1375+}
1376+
1377+/*
1378+ * Miscellaneous platform dependent initialisations
1379+ */
1380+
1381+int board_init (void)
1382+{
1383+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
1384+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
1385+
1386+ /* to reduce PLL lock time, adjust the LOCKTIME register */
1387+ clk_power->LOCKTIME = 0xFFFFFF;
1388+
1389+ /* configure MPLL */
1390+ clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
1391+
1392+ /* some delay between MPLL and UPLL */
1393+ delay (4000);
1394+
1395+ /* configure UPLL */
1396+ clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
1397+
1398+ /* some delay between MPLL and UPLL */
1399+ delay (8000);
1400+
1401+ /* set up the I/O ports */
1402+#if defined(CONFIG_ARCH_GTA01_v3)
1403+ gpio->GPACON = 0x007FFFFF;
1404+
1405+ gpio->GPBCON = 0x00005055;
1406+ gpio->GPBUP = 0x000007FF;
1407+
1408+ gpio->GPCCON = 0xAAAA12A8;
1409+ gpio->GPCUP = 0x0000FFFF;
1410+
1411+ gpio->GPDCON = 0xAAAAAAAA;
1412+ gpio->GPDUP = 0x0000FFFF;
1413+
1414+ gpio->GPECON = 0xAAAAAAAA;
1415+ gpio->GPEUP = 0x0000FFFF;
1416+
1417+ gpio->GPFCON = 0x00002AA9;
1418+ gpio->GPFUP = 0x000000FF;
1419+
1420+ gpio->GPGCON = 0xA846F0C0;
1421+ gpio->GPGUP = 0x0000AFEF;
1422+
1423+ gpio->GPHCON = 0x0008FAAA;
1424+ gpio->GPHUP = 0x000007FF;
1425+#elif defined(CONFIG_ARCH_GTA01_v4)
1426+ gpio->GPACON = 0x005E47FF;
1427+
1428+ gpio->GPBCON = 0x00045015;
1429+ gpio->GPBUP = 0x000007FF;
1430+ gpio->GPBDAT |= 0x4; /* Set GPB2 to high (Flash power-up) */
1431+
1432+ gpio->GPCCON = 0xAAAA12A9;
1433+ gpio->GPCUP = 0x0000FFFF;
1434+
1435+ gpio->GPDCON = 0xAAAAAAAA;
1436+ gpio->GPDUP = 0x0000FFFF;
1437+
1438+ gpio->GPECON = 0xA02AAAAA;
1439+ gpio->GPEUP = 0x0000FFFF;
1440+
1441+ gpio->GPFCON = 0x0000aa09;
1442+ gpio->GPFUP = 0x000000FF;
1443+
1444+ gpio->GPGCON = 0xFF40F0C1;
1445+ gpio->GPGUP = 0x0000AFEF;
1446+
1447+ gpio->GPHCON = 0x0000FAAA;
1448+ gpio->GPHUP = 0x000007FF;
1449+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3)
1450+ gpio->GPACON = 0x005E4FFF;
1451+
1452+ gpio->GPBCON = 0x00145415;
1453+ gpio->GPBUP = 0x000007FF;
1454+ gpio->GPBDAT |= 0x4; /* Set GPB2 to high (Flash power-up) */
1455+
1456+ gpio->GPCCON = 0xAAAA12A9;
1457+ gpio->GPCUP = 0x0000FFFF;
1458+
1459+ gpio->GPDCON = 0xAAAAAAAA;
1460+ gpio->GPDUP = 0x0000FFFF;
1461+
1462+ gpio->GPECON = 0xA02AAAAA;
1463+ gpio->GPEUP = 0x0000FFFF;
1464+
1465+ gpio->GPFCON = 0x0000aa19;
1466+ gpio->GPFUP = 0x000000FF;
1467+ gpio->GPFDAT |= 0x4; /* Set GBF2 to high (nGSM_EN) */
1468+
1469+ gpio->GPGCON = 0xFF40F0C1;
1470+ gpio->GPGUP = 0x0000AFEF;
1471+
1472+ gpio->GPHCON = 0x0000FAAA;
1473+ gpio->GPHUP = 0x000007FF;
1474+#elif defined(CONFIG_ARCH_GTA01B_v4)
1475+ gpio->GPACON = 0x0005E0FFF;
1476+ gpio->GPADAT |= (1 << 16); /* Set GPA16 to high (nNAND_WP) */
1477+
1478+ gpio->GPBCON = 0x00045455;
1479+ gpio->GPBUP = 0x000007FF;
1480+ gpio->GPBDAT |= 0x4; /* Set GPB2 to high (SD power down) */
1481+
1482+ gpio->GPCCON = 0xAAAA12A9;
1483+ gpio->GPCUP = 0x0000FFFF;
1484+
1485+ gpio->GPDCON = 0xAAAAAAAA;
1486+ gpio->GPDUP = 0x0000FFFF;
1487+
1488+ gpio->GPECON = 0xAAAAAAAA;
1489+ gpio->GPEUP = 0x0000FFFF;
1490+
1491+ gpio->GPFCON = 0x0000aa99;
1492+ gpio->GPFUP = 0x000000FF;
1493+ gpio->GPFDAT |= 0x4; /* Set GBF2 to high (nGSM_EN) */
1494+
1495+ gpio->GPGCON = 0xFF14F0F8;
1496+ gpio->GPGUP = 0x0000AFEF;
1497+
1498+ gpio->GPHCON = 0x0000FAAA;
1499+ gpio->GPHUP = 0x000007FF;
1500+#else
1501+#error Please define GTA01 version
1502+#endif
1503+
1504+ /* arch number of SMDK2410-Board */
1505+ gd->bd->bi_arch_number = MACH_TYPE_NEO1973_GTA01;
1506+
1507+ /* adress of boot parameters */
1508+ gd->bd->bi_boot_params = 0x30000100;
1509+
1510+ icache_enable();
1511+ dcache_enable();
1512+
1513+ return 0;
1514+}
1515+
1516+int board_late_init(void)
1517+{
1518+ unsigned char tmp;
1519+ char buf[32];
1520+
1521+ /* Initialize the Power Management Unit with a safe register set */
1522+ pcf50606_init();
1523+
1524+ /* obtain wake-up reason, save INT1 in environment */
1525+ tmp = pcf50606_reg_read(PCF50606_REG_INT1);
1526+ sprintf(buf, "0x%02x", tmp);
1527+ setenv("pcf50606_int1", buf);
1528+
1529+ if (tmp & PCF50606_INT1_ALARM) {
1530+ /* we've been woken up by RTC alarm or charger insert, boot */
1531+ neo1973_wakeup_cause = NEO1973_WAKEUP_ALARM;
1532+ goto continue_boot;
1533+ }
1534+ if (tmp & PCF50606_INT1_EXTONR) {
1535+ neo1973_wakeup_cause = NEO1973_WAKEUP_CHARGER;
1536+ }
1537+
1538+ if (tmp & PCF50606_INT1_ONKEYF) {
1539+ int seconds = 0;
1540+ neo1973_wakeup_cause = NEO1973_WAKEUP_POWER_KEY;
1541+ /* we've been woken up by a falling edge of the onkey */
1542+
1543+ /* we can't just setenv(bootdelay,-1) because that would
1544+ * accidentially become permanent if the user does saveenv */
1545+ if (neo1973_911_key_pressed())
1546+ nobootdelay = 1;
1547+
1548+ while (1) {
1549+ u_int8_t int1, oocs;
1550+
1551+ oocs = pcf50606_reg_read(PCF50606_REG_OOCS);
1552+ if (oocs & PFC50606_OOCS_ONKEY)
1553+ break;
1554+
1555+ int1 = pcf50606_reg_read(PCF50606_REG_INT1);
1556+ if (int1 & PCF50606_INT1_SECOND)
1557+ seconds++;
1558+
1559+ if (seconds >= POWER_KEY_SECONDS)
1560+ goto continue_boot;
1561+ }
1562+ /* Power off if minimum number of seconds not reached */
1563+ neo1973_poweroff();
1564+ }
1565+
1566+ /* if there's no other reason, must be regular reset */
1567+ neo1973_wakeup_cause = NEO1973_WAKEUP_RESET;
1568+
1569+continue_boot:
1570+ jbt6k74_init();
1571+ jbt6k74_enter_state(JBT_STATE_NORMAL);
1572+ jbt6k74_display_onoff(1);
1573+
1574+ /* issue a short pulse with the vibrator */
1575+ neo1973_vibrator(1);
1576+ udelay(50000);
1577+ neo1973_vibrator(0);
1578+
1579+ /* switch on the backlight */
1580+ neo1973_backlight(1);
1581+
1582+#if defined(CONFIG_ARCH_GTA01B_v4)
1583+ {
1584+ /* check if sd card is inserted, and power-up if it is */
1585+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
1586+ if (!(gpio->GPFDAT & (1 << 5)))
1587+ gpio->GPBDAT &= ~(1 << 2);
1588+ }
1589+#endif
1590+
1591+ return 0;
1592+}
1593+
1594+int dram_init (void)
1595+{
1596+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
1597+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
1598+
1599+ return 0;
1600+}
1601+
1602+u_int32_t get_board_rev(void)
1603+{
1604+#if defined(CONFIG_ARCH_GTA01_v3)
1605+ return 0x00000130;
1606+#elif defined(CONFIG_ARCH_GTA01_v4)
1607+ return 0x00000140;
1608+#elif defined(CONFIG_ARCH_GTA01B_v2)
1609+ return 0x00000220;
1610+#elif defined(CONFIG_ARCH_GTA01B_v3)
1611+ return 0x00000230;
1612+#elif defined(CONFIG_ARCH_GTA01B_v4)
1613+ return 0x00000240;
1614+#endif
1615+}
1616+
1617+void neo1973_poweroff(void)
1618+{
1619+ serial_printf("poweroff\n");
1620+ udc_disconnect();
1621+ pcf50606_reg_write(PCF50606_REG_OOCC1, PCF50606_OOCC1_GOSTDBY);
1622+ /* don't return to caller */
1623+ while (1) ;
1624+}
1625+
1626+void neo1973_backlight(int on)
1627+{
1628+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
1629+ if (on)
1630+ gpio->GPBDAT |= 0x01;
1631+ else
1632+ gpio->GPBDAT &= ~0x01;
1633+}
1634+
1635+void neo1973_vibrator(int on)
1636+{
1637+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
1638+ if (on)
1639+#if defined(CONFIG_ARCH_GTA01_v3) || defined(CONFIG_ARCH_GTA01_v4)
1640+ gpio->GPGDAT |= (1 << 11); /* GPG11 */
1641+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3)
1642+ gpio->GPBDAT |= (1 << 10); /* GPB10 */
1643+#elif defined(CONFIG_ARCH_GTA01B_v4)
1644+ gpio->GPBDAT |= (1 << 3); /* GPB3 */
1645+#endif
1646+ else
1647+#if defined(CONFIG_ARCH_GTA01_v3) || defined(CONFIG_ARCH_GTA01_v4)
1648+ gpio->GPGDAT &= ~(1 << 11); /* GPG11 */
1649+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3)
1650+ gpio->GPBDAT &= ~(1 << 10); /* GPB10 */
1651+#elif defined(CONFIG_ARCH_GTA01B_v4)
1652+ gpio->GPBDAT &= ~(1 << 3); /* GPB3 */
1653+#endif
1654+}
1655+
1656+int neo1973_911_key_pressed(void)
1657+{
1658+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
1659+ if (gpio->GPFDAT & (1 << 6))
1660+ return 0;
1661+ return 1;
1662+}
1663+
1664+static const char *chgstate_names[] = {
1665+ [PCF50606_MBCC1_CHGMOD_QUAL] = "qualification",
1666+ [PCF50606_MBCC1_CHGMOD_PRE] = "pre",
1667+ [PCF50606_MBCC1_CHGMOD_TRICKLE] = "trickle",
1668+ [PCF50606_MBCC1_CHGMOD_FAST_CCCV] = "fast_cccv",
1669+ [PCF50606_MBCC1_CHGMOD_FAST_NOCC] = "fast_nocc",
1670+ [PCF50606_MBCC1_CHGMOD_FAST_NOCV] = "fast_nocv",
1671+ [PCF50606_MBCC1_CHGMOD_FAST_SW] = "fast_switch",
1672+ [PCF50606_MBCC1_CHGMOD_IDLE] = "idle",
1673+};
1674+
1675+const char *neo1973_get_charge_status(void)
1676+{
1677+ u_int8_t mbcc1 = pcf50606_reg_read(PCF50606_REG_MBCC1);
1678+ u_int8_t chgmod = (mbcc1 & PCF50606_MBCC1_CHGMOD_MASK);
1679+ return chgstate_names[chgmod];
1680+}
1681+
1682+int neo1973_set_charge_mode(enum neo1973_charger_cmd cmd)
1683+{
1684+ switch (cmd) {
1685+ case NEO1973_CHGCMD_NONE:
1686+ break;
1687+ case NEO1973_CHGCMD_AUTOFAST:
1688+ pcf50606_reg_set_bit_mask(PCF50606_REG_MBCC1,
1689+ PCF50606_MBCC1_AUTOFST,
1690+ PCF50606_MBCC1_AUTOFST);
1691+ break;
1692+ case NEO1973_CHGCMD_NO_AUTOFAST:
1693+ pcf50606_reg_set_bit_mask(PCF50606_REG_MBCC1,
1694+ PCF50606_MBCC1_AUTOFST, 0);
1695+ break;
1696+ case NEO1973_CHGCMD_OFF:
1697+ pcf50606_reg_set_bit_mask(PCF50606_REG_MBCC1,
1698+ PCF50606_MBCC1_CHGMOD_MASK,
1699+ PCF50606_MBCC1_CHGMOD_IDLE);
1700+ break;
1701+
1702+ case NEO1973_CHGCMD_FAST:
1703+ case NEO1973_CHGCMD_FASTER:
1704+ pcf50606_reg_set_bit_mask(PCF50606_REG_MBCC1,
1705+ PCF50606_MBCC1_CHGMOD_MASK,
1706+ PCF50606_MBCC1_CHGMOD_FAST_CCCV);
1707+ break;
1708+ }
1709+ return 0;
1710+}
1711+
1712Index: u-boot/board/neo1973/gta01/pcf50606.c
1713===================================================================
1714--- /dev/null
1715+++ u-boot/board/neo1973/gta01/pcf50606.c
1716@@ -0,0 +1,100 @@
1717+
1718+#include <common.h>
1719+#include <pcf50606.h>
1720+
1721+/* initial register set for PCF50606 in Neo1973 devices */
1722+const u_int8_t pcf50606_initial_regs[__NUM_PCF50606_REGS] = {
1723+ [PCF50606_REG_OOCS] = 0x00,
1724+ /* gap */
1725+ [PCF50606_REG_INT1M] = PCF50606_INT1_SECOND,
1726+ [PCF50606_REG_INT2M] = 0x00,
1727+ [PCF50606_REG_INT3M] = PCF50606_INT3_TSCPRES,
1728+ [PCF50606_REG_OOCC1] = PCF50606_OOCC1_RTCWAK |
1729+ PCF50606_OOCC1_CHGWAK |
1730+ PCF50606_OOCC1_EXTONWAK_HIGH,
1731+ [PCF50606_REG_OOCC2] = PCF50606_OOCC2_ONKEYDB_14ms |
1732+ PCF50606_OOCC2_EXTONDB_14ms,
1733+ /* gap */
1734+ [PCF50606_REG_PSSC] = 0x00,
1735+ [PCF50606_REG_PWROKM] = 0x00,
1736+ /* gap */
1737+#if defined(CONFIG_ARCH_GTA01B_v2)
1738+ [PCF50606_REG_DCDC1] = 0x1e, /* GL_3V3: off */
1739+#elif defined(CONFIG_ARCH_GTA01B_v3) || defined(CONFIG_ARCH_GTA01B_v4)
1740+ [PCF50606_REG_DCDC1] = 0x18, /* GL_1V5: off */
1741+#endif
1742+ [PCF50606_REG_DCDC2] = 0x00,
1743+ [PCF50606_REG_DCDC3] = 0x00,
1744+ [PCF50606_REG_DCDC4] = 0x30, /* 1.25A */
1745+
1746+ [PCF50606_REG_DCDEC1] = 0xe8, /* IO_3V3: on */
1747+ [PCF50606_REG_DCDEC2] = 0x00,
1748+
1749+#if defined(CONFIG_ARCH_GTA01_v3) || defined(CONFIG_ARCH_GTA01_v4)
1750+ [PCF50606_REG_DCUDC1] = 0xe3, /* CORE_1V8: 1.8V */
1751+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3)
1752+ [PCF50606_REG_DCUDC1] = 0xe4, /* CORE_1V8: 2.1V */
1753+#elif defined(CONFIG_ARCH_GTA01B_v4)
1754+ [PCF50606_REG_DCUDC1] = 0xc4, /* CORE_1V8: 2.1V if PWREN2 = HIGH */
1755+#endif
1756+ [PCF50606_REG_DCUDC2] = 0x30, /* 1.25A current limit */
1757+
1758+#if defined(CONFIG_ARCH_GTA01_v3)
1759+ [PCF50606_REG_IOREGC] = 0x13, /* VTCXO_2V8: off */
1760+#elif defined(CONFIG_ARCH_GTA01_v4) || defined(CONFIG_ARCH_GTA01B_v2) || \
1761+ defined(CONFIG_ARCH_GTA01B_v3) || defined(CONFIG_ARCH_GTA01B_v4)
1762+ //see internal bug 94 [PCF50606_REG_IOREGC] = 0x18, /* CODEC_3V3: off */
1763+ [PCF50606_REG_IOREGC] = 0xf8, /* CODEC_3V3: on */
1764+#endif
1765+
1766+#if defined(CONFIG_ARCH_GTA01_v3) || defined(CONFIG_ARCH_GTA01_v4)
1767+ [PCF50606_REG_D1REGC1] = 0x15, /* VRF_3V: off */
1768+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3) || \
1769+ defined(CONFIG_ARCH_GTA01B_v4)
1770+ [PCF50606_REG_D1REGC1] = 0x16, /* BT_3V15: off */
1771+#endif
1772+
1773+#if defined(CONFIG_ARCH_GTA01_v3)
1774+ [PCF50606_REG_D2REGC1] = 0xf8, /* SD_3V3: on */
1775+#elif defined(CONFIG_ARCH_GTA01_v4) || defined(CONFIG_ARCH_GTA01B_v2) || \
1776+ defined(CONFIG_ARCH_GTA01B_v3) || defined(CONFIG_ARCH_GTA01B_v4)
1777+ [PCF50606_REG_D2REGC1] = 0x10, /* GL_2V5: off */
1778+#endif
1779+
1780+#if defined(CONFIG_ARCH_GTA01_v3)
1781+ [PCF50606_REG_D3REGC1] = 0x18, /* CODEC_3V3: off */
1782+#elif defined(CONFIG_ARCH_GTA01_v4)
1783+ [PCF50606_REG_D3REGC1] = 0x13, /* VTXCO_2V8: off */
1784+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3)
1785+ [PCF50606_REG_D3REGC1] = 0x00, /* USER1: off */
1786+#elif defined(CONFIG_ARCH_GTA01B_v4)
1787+ [PCF50606_REG_D3REGC1] = 0xec, /* STBY_1V8: 2.1V */
1788+#endif
1789+
1790+ [PCF50606_REG_LPREGC1] = 0xf8, /* LCM_3V3: on */
1791+ [PCF50606_REG_LPREGC2] = 0x00,
1792+
1793+ [PCF50606_REG_MBCC1] = 0x01, /* CHGAPE */
1794+ [PCF50606_REG_MBCC2] = 0x00, /* unlimited charging */
1795+ [PCF50606_REG_MBCC3] = 0x1a, /* 0.2*Ifast, 4.20V */
1796+ [PCF50606_REG_BBCC] = 0x1f, /* 400uA */
1797+ [PCF50606_REG_ADCC1] = 0x00,
1798+ [PCF50606_REG_ADCC2] = 0x00,
1799+ /* gap */
1800+#if defined(CONFIG_ARCH_GTA01B_v4)
1801+ [PCF50606_REG_ACDC1] = 0x86, /* ACD thresh 1.6V, enabled */
1802+#else
1803+ [PCF50606_REG_ACDC1] = 0x00,
1804+#endif
1805+ [PCF50606_REG_BVMC] = PCF50606_BVMC_THRSHLD_3V3,
1806+ [PCF50606_REG_PWMC1] = 0x00,
1807+ [PCF50606_REG_LEDC1] = 0x00,
1808+ [PCF50606_REG_LEDC2] = 0x00,
1809+ [PCF50606_REG_GPOC1] = 0x00,
1810+ [PCF50606_REG_GPOC2] = 0x00,
1811+ [PCF50606_REG_GPOC3] = 0x00,
1812+ [PCF50606_REG_GPOC4] = 0x00,
1813+ [PCF50606_REG_GPOC5] = 0x00,
1814+};
1815+
1816+
1817Index: u-boot/board/neo1973/gta01/split_by_variant.sh
1818===================================================================
1819--- /dev/null
1820+++ u-boot/board/neo1973/gta01/split_by_variant.sh
1821@@ -0,0 +1,57 @@
1822+#!/bin/sh
1823+# ---------------------------------------------------------
1824+# Set the core module defines according to Core Module
1825+# ---------------------------------------------------------
1826+# ---------------------------------------------------------
1827+# Set up the GTA01 type define
1828+# ---------------------------------------------------------
1829+
1830+CFGINC=${obj}include/config.h
1831+CFGTMP=${obj}board/neo1973/gta01/config.tmp
1832+
1833+mkdir -p ${obj}include
1834+if [ "$1" == "" ]
1835+then
1836+ echo "$0:: No parameters - using GTA01Bv3 config"
1837+ echo "#define CONFIG_ARCH_GTA01B_v3" > $CFGINC
1838+ echo "GTA01_BIG_RAM=y" > $CFGTMP
1839+else
1840+ case "$1" in
1841+ gta01v4_config)
1842+ echo "#define CONFIG_ARCH_GTA01_v4" > $CFGINC
1843+ echo "GTA01_BIG_RAM=n" > $CFGTMP
1844+ ;;
1845+
1846+ gta01v3_config)
1847+ echo "#define CONFIG_ARCH_GTA01_v3" > $CFGINC
1848+ echo "GTA01_BIG_RAM=n" > $CFGTMP
1849+ ;;
1850+
1851+ gta01bv2_config)
1852+ echo "#define CONFIG_ARCH_GTA01B_v2" > $CFGINC
1853+ echo "GTA01_BIG_RAM=y" > $CFGTMP
1854+ ;;
1855+
1856+ gta01bv3_config)
1857+ echo "#define CONFIG_ARCH_GTA01B_v3" > $CFGINC
1858+ echo "GTA01_BIG_RAM=y" > $CFGTMP
1859+ ;;
1860+
1861+ gta01bv4_config)
1862+ echo "#define CONFIG_ARCH_GTA01B_v4" > $CFGINC
1863+ echo "GTA01_BIG_RAM=y" > $CFGTMP
1864+ ;;
1865+
1866+ *)
1867+ echo "$0:: Unrecognised config - using GTA01Bv4 config"
1868+ echo "#define CONFIG_ARCH_GTA01B_v4" > $CFGINC
1869+ echo "GTA01_BIG_RAM=y" > $CFGTMP
1870+ ;;
1871+
1872+ esac
1873+
1874+fi
1875+# ---------------------------------------------------------
1876+# Complete the configuration
1877+# ---------------------------------------------------------
1878+$MKCONFIG -a neo1973_gta01 arm arm920t gta01 neo1973 s3c24x0
1879Index: u-boot/board/neo1973/gta01/u-boot.lds
1880===================================================================
1881--- /dev/null
1882+++ u-boot/board/neo1973/gta01/u-boot.lds
1883@@ -0,0 +1,58 @@
1884+/*
1885+ * (C) Copyright 2002
1886+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
1887+ *
1888+ * See file CREDITS for list of people who contributed to this
1889+ * project.
1890+ *
1891+ * This program is free software; you can redistribute it and/or
1892+ * modify it under the terms of the GNU General Public License as
1893+ * published by the Free Software Foundation; either version 2 of
1894+ * the License, or (at your option) any later version.
1895+ *
1896+ * This program is distributed in the hope that it will be useful,
1897+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1898+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1899+ * GNU General Public License for more details.
1900+ *
1901+ * You should have received a copy of the GNU General Public License
1902+ * along with this program; if not, write to the Free Software
1903+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1904+ * MA 02111-1307 USA
1905+ */
1906+
1907+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
1908+/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
1909+OUTPUT_ARCH(arm)
1910+ENTRY(_start)
1911+SECTIONS
1912+{
1913+ . = 0x00000000;
1914+
1915+ . = ALIGN(4);
1916+ .text :
1917+ {
1918+ cpu/arm920t/start.o (.text)
1919+ cpu/arm920t/s3c24x0/nand_read.o (.text)
1920+ *(.text)
1921+ }
1922+
1923+ . = ALIGN(4);
1924+ .rodata : { *(.rodata) }
1925+
1926+ . = ALIGN(4);
1927+ .data : { *(.data) }
1928+
1929+ . = ALIGN(4);
1930+ .got : { *(.got) }
1931+
1932+ . = .;
1933+ __u_boot_cmd_start = .;
1934+ .u_boot_cmd : { *(.u_boot_cmd) }
1935+ __u_boot_cmd_end = .;
1936+
1937+ . = ALIGN(4);
1938+ __bss_start = .;
1939+ .bss : { *(.bss) }
1940+ _end = .;
1941+}
1942Index: u-boot/include/configs/neo1973_gta01.h
1943===================================================================
1944--- /dev/null
1945+++ u-boot/include/configs/neo1973_gta01.h
1946@@ -0,0 +1,265 @@
1947+/*
1948+ * (C) Copyright 2006 OpenMoko, Inc.
1949+ * Author: Harald Welte <laforge@openmoko.org>
1950+ *
1951+ * Configuation settings for the FIC Neo1973 GTA01 Linux GSM phone
1952+ *
1953+ * See file CREDITS for list of people who contributed to this
1954+ * project.
1955+ *
1956+ * This program is free software; you can redistribute it and/or
1957+ * modify it under the terms of the GNU General Public License as
1958+ * published by the Free Software Foundation; either version 2 of
1959+ * the License, or (at your option) any later version.
1960+ *
1961+ * This program is distributed in the hope that it will be useful,
1962+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1963+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1964+ * GNU General Public License for more details.
1965+ *
1966+ * You should have received a copy of the GNU General Public License
1967+ * along with this program; if not, write to the Free Software
1968+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1969+ * MA 02111-1307 USA
1970+ */
1971+
1972+#ifndef __CONFIG_H
1973+#define __CONFIG_H
1974+
1975+#if defined(BUILD_FOR_RAM)
1976+/* If we want to start u-boot from inside RAM */
1977+#define CONFIG_SKIP_RELOCATE_UBOOT 1
1978+#define CONFIG_SKIP_LOWLEVEL_INIT 1
1979+#else
1980+/* we want to start u-boot directly from within NAND flash */
1981+#define CONFIG_S3C2410_NAND_BOOT 1
1982+#define CONFIG_S3C2410_NAND_SKIP_BAD 1
1983+#endif
1984+
1985+#define CFG_UBOOT_SIZE 0x40000 /* size of u-boot, for NAND loading */
1986+
1987+/*
1988+ * High Level Configuration Options
1989+ * (easy to change)
1990+ */
1991+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
1992+#define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */
1993+#define CONFIG_SMDK2410 1 /* on a SAMSUNG SMDK2410 Board */
1994+
1995+/* input clock of PLL */
1996+#define CONFIG_SYS_CLK_FREQ 12000000/* the GTA01 has 12MHz input clock */
1997+
1998+
1999+#define USE_920T_MMU 1
2000+#define CONFIG_USE_IRQ 1
2001+
2002+/*
2003+ * Size of malloc() pool
2004+ */
2005+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
2006+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
2007+
2008+/*
2009+ * Hardware drivers
2010+ */
2011+
2012+/*
2013+ * select serial console configuration
2014+ */
2015+#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on GTA01 */
2016+
2017+/************************************************************
2018+ * RTC
2019+ ************************************************************/
2020+#define CONFIG_RTC_S3C24X0 1
2021+
2022+/* allow to overwrite serial and ethaddr */
2023+#define CONFIG_ENV_OVERWRITE
2024+
2025+#define CONFIG_BAUDRATE 115200
2026+
2027+/***********************************************************
2028+ * Command definition
2029+ ***********************************************************/
2030+#define CONFIG_COMMANDS (\
2031+ CFG_CMD_BDI | \
2032+ CFG_CMD_LOADS | \
2033+ CFG_CMD_LAODB | \
2034+ CFG_CMD_IMI | \
2035+ CFG_CMD_CACHE | \
2036+ CFG_CMD_MEMORY | \
2037+ CFG_CMD_ENV | \
2038+ /* CFG_CMD_IRQ | */ \
2039+ CFG_CMD_BOOTD | \
2040+ CFG_CMD_CONSOLE | \
2041+ CFG_CMD_ASKENV | \
2042+ CFG_CMD_RUN | \
2043+ CFG_CMD_ECHO | \
2044+ CFG_CMD_I2C | \
2045+ CFG_CMD_REGINFO | \
2046+ CFG_CMD_IMMAP | \
2047+ CFG_CMD_DATE | \
2048+ CFG_CMD_AUTOSCRIPT | \
2049+ CFG_CMD_BSP | \
2050+ CFG_CMD_ELF | \
2051+ CFG_CMD_MISC | \
2052+ /* CFG_CMD_USB | */ \
2053+ /* CFG_CMD_JFFS2 | */ \
2054+ CFG_CMD_DIAG | \
2055+ /* CFG_CMD_HWFLOW | */ \
2056+ CFG_CMD_SAVES | \
2057+ CFG_CMD_NAND | \
2058+ CFG_CMD_PORTIO | \
2059+ CFG_CMD_MMC | \
2060+ CFG_CMD_FAT | \
2061+ CFG_CMD_EXT2 | \
2062+ 0)
2063+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
2064+#include <cmd_confdefs.h>
2065+
2066+#define CONFIG_BOOTDELAY 3
2067+#define CONFIG_BOOTARGS "rootfstype=jffs2 root=/dev/mtdblock4 console=ttySAC0,115200 console=tty0 loglevel=8"
2068+#define CONFIG_BOOTCOMMAND "nand read.e 0x32000000 0x34000 0x200000; bootm 0x32000000"
2069+
2070+#define CONFIG_DOS_PARTITION 1
2071+
2072+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
2073+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
2074+/* what's this ? it's not used anywhere */
2075+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
2076+#endif
2077+
2078+/*
2079+ * Miscellaneous configurable options
2080+ */
2081+#define CFG_LONGHELP /* undef to save memory */
2082+#if defined(CONFIG_ARCH_GTA01_v3)
2083+#define CFG_PROMPT "GTA01v3 # " /* Monitor Command Prompt */
2084+#elif defined(CONFIG_ARCH_GTA01_v4)
2085+#define CFG_PROMPT "GTA01v4 # " /* Monitor Command Prompt */
2086+#elif defined(CONFIG_ARCH_GTA01B_v2)
2087+#define CFG_PROMPT "GTA01Bv2 # " /* Monitor Command Prompt */
2088+#elif defined(CONFIG_ARCH_GTA01B_v3)
2089+#define CFG_PROMPT "GTA01Bv3 # " /* Monitor Command Prompt */
2090+#elif defined(CONFIG_ARCH_GTA01B_v4)
2091+#define CFG_PROMPT "GTA01Bv4 # " /* Monitor Command Prompt */
2092+#endif
2093+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
2094+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
2095+#define CFG_MAXARGS 16 /* max number of command args */
2096+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
2097+
2098+#define CFG_MEMTEST_START 0x30000000 /* memtest works on */
2099+#define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
2100+
2101+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
2102+
2103+#define CFG_LOAD_ADDR 0x33000000 /* default load address */
2104+
2105+/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
2106+/* it to wrap 100 times (total 1562500) to get 1 sec. */
2107+#define CFG_HZ 1562500
2108+
2109+/* valid baudrates */
2110+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
2111+
2112+/*-----------------------------------------------------------------------
2113+ * Stack sizes
2114+ *
2115+ * The stack sizes are set up in start.S using the settings below
2116+ */
2117+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
2118+#ifdef CONFIG_USE_IRQ
2119+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
2120+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
2121+#endif
2122+
2123+#if 0
2124+#define CONFIG_USB_OHCI 1
2125+#endif
2126+
2127+/*-----------------------------------------------------------------------
2128+ * Physical Memory Map
2129+ */
2130+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
2131+#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
2132+#if defined(CONFIG_ARCH_GTA01_v3) || defined(CONFIG_ARCH_GTA01_v4)
2133+#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
2134+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3) || \
2135+ defined(CONFIG_ARCH_GTA01B_v4)
2136+#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
2137+#else
2138+#error Please define GTA01 variant
2139+#endif
2140+#define PHYS_SDRAM_RES_SIZE 0x00200000 /* 2 MB for frame buffer */
2141+
2142+/*-----------------------------------------------------------------------
2143+ * FLASH and environment organization
2144+ */
2145+
2146+/* No NOR flash in this device */
2147+#define CFG_NO_FLASH 1
2148+
2149+#define CFG_ENV_IS_IN_NAND 1
2150+#define CFG_ENV_SIZE 0x4000 /* 16k Total Size of Environment Sector */
2151+#define CFG_ENV_OFFSET_OOB 1 /* Location of ENV stored in block 0 OOB */
2152+
2153+#define NAND_MAX_CHIPS 1
2154+#define CFG_NAND_BASE 0x4e000000
2155+#define CFG_MAX_NAND_DEVICE 1
2156+
2157+#define CONFIG_MMC 1
2158+#define CFG_MMC_BASE 0xff000000
2159+
2160+/* EXT2 driver */
2161+#define CONFIG_EXT2 1
2162+
2163+#define CONFIG_FAT 1
2164+#define CONFIG_SUPPORT_VFAT
2165+
2166+#if 0
2167+/* JFFS2 driver */
2168+#define CONFIG_JFFS2_CMDLINE 1
2169+#define CONFIG_JFFS2_NAND 1
2170+#define CONFIG_JFFS2_NAND_DEV 0
2171+#define CONFIG_JFFS2_NAND_OFF 0x634000
2172+#define CONFIG_JFFS2_NAND_SIZE 0x39cc000
2173+#endif
2174+
2175+/* ATAG configuration */
2176+#define CONFIG_INITRD_TAG 1
2177+#define CONFIG_SETUP_MEMORY_TAGS 1
2178+#define CONFIG_CMDLINE_TAG 1
2179+#define CONFIG_REVISION_TAG 1
2180+#if 0
2181+#define CONFIG_SERIAL_TAG 1
2182+#endif
2183+
2184+#define CONFIG_DRIVER_S3C24X0_I2C 1
2185+#define CONFIG_HARD_I2C 1
2186+#define CFG_I2C_SPEED 400000 /* 400kHz according to PCF50606 data sheet */
2187+#define CFG_I2C_SLAVE 0x7f
2188+
2189+/* we have a board_late_init() function */
2190+#define BOARD_LATE_INIT 1
2191+
2192+#if 1
2193+#define CONFIG_VIDEO
2194+#define CONFIG_VIDEO_S3C2410
2195+#define CONFIG_CFB_CONSOLE
2196+#define CONFIG_VIDEO_LOGO
2197+#define CONFIG_VGA_AS_SINGLE_DEVICE
2198+
2199+#define VIDEO_KBD_INIT_FCT 0
2200+#define VIDEO_TSTC_FCT serial_tstc
2201+#define VIDEO_GETC_FCT serial_getc
2202+
2203+#define LCD_VIDEO_ADDR 0x33d00000
2204+#endif
2205+
2206+#define CONFIG_S3C2410_NAND_BBT 1
2207+#define CONFIG_S3C2410_NAND_HWECC 1
2208+
2209+#define CONFIG_DRIVER_PCF50606 1
2210+
2211+#endif /* __CONFIG_H */
2212Index: u-boot/board/neo1973/common/neo1973.h
2213===================================================================
2214--- /dev/null
2215+++ u-boot/board/neo1973/common/neo1973.h
2216@@ -0,0 +1,32 @@
2217+#ifndef _NEO1973_H
2218+#define _NEO1973_H
2219+
2220+enum wakeup_reason {
2221+ NEO1973_WAKEUP_NONE,
2222+ NEO1973_WAKEUP_RESET,
2223+ NEO1973_WAKEUP_POWER_KEY,
2224+ NEO1973_WAKEUP_CHARGER,
2225+ NEO1973_WAKEUP_ALARM,
2226+};
2227+
2228+enum neo1973_charger_cmd {
2229+ NEO1973_CHGCMD_NONE,
2230+ NEO1973_CHGCMD_AUTOFAST,
2231+ NEO1973_CHGCMD_NO_AUTOFAST,
2232+ NEO1973_CHGCMD_OFF,
2233+ NEO1973_CHGCMD_FAST,
2234+ NEO1973_CHGCMD_FASTER,
2235+};
2236+
2237+extern unsigned int neo1973_wakeup_cause;
2238+
2239+void neo1973_poweroff(void);
2240+void neo1973_backlight(int on);
2241+void neo1973_vibrator(int on);
2242+
2243+int neo1973_911_key_pressed(void);
2244+
2245+const char *neo1973_get_charge_status(void);
2246+int neo1973_set_charge_mode(enum neo1973_charger_cmd cmd);
2247+
2248+#endif
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-20061030-qt2410.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-20061030-qt2410.patch
new file mode 100644
index 0000000000..343598902f
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-20061030-qt2410.patch
@@ -0,0 +1,1233 @@
1This patch adds 'board' support for the Armzone QT2410
2development board to u-boot.
3
4Signed-off-by: Harald Welte <laforge@openmoko.org>
5
6Index: u-boot/Makefile
7===================================================================
8--- u-boot.orig/Makefile
9+++ u-boot/Makefile
10@@ -2009,6 +2009,9 @@
11 sbc2410x_config: unconfig
12 @$(MKCONFIG) $(@:_config=) arm arm920t sbc2410x NULL s3c24x0
13
14+qt2410_config : unconfig
15+ @./mkconfig $(@:_config=) arm arm920t qt2410 NULL s3c24x0
16+
17 scb9328_config : unconfig
18 @$(MKCONFIG) $(@:_config=) arm arm920t scb9328 NULL imx
19
20Index: u-boot/board/qt2410/Makefile
21===================================================================
22--- /dev/null
23+++ u-boot/board/qt2410/Makefile
24@@ -0,0 +1,47 @@
25+#
26+# (C) Copyright 2000, 2001, 2002
27+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
28+#
29+# See file CREDITS for list of people who contributed to this
30+# project.
31+#
32+# This program is free software; you can redistribute it and/or
33+# modify it under the terms of the GNU General Public License as
34+# published by the Free Software Foundation; either version 2 of
35+# the License, or (at your option) any later version.
36+#
37+# This program is distributed in the hope that it will be useful,
38+# but WITHOUT ANY WARRANTY; without even the implied warranty of
39+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
40+# GNU General Public License for more details.
41+#
42+# You should have received a copy of the GNU General Public License
43+# along with this program; if not, write to the Free Software
44+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
45+# MA 02111-1307 USA
46+#
47+
48+include $(TOPDIR)/config.mk
49+
50+LIB = lib$(BOARD).a
51+
52+OBJS := qt2410.o flash.o
53+SOBJS := lowlevel_init.o
54+
55+$(LIB): $(OBJS) $(SOBJS)
56+ $(AR) crv $@ $(OBJS) $(SOBJS)
57+
58+clean:
59+ rm -f $(SOBJS) $(OBJS)
60+
61+distclean: clean
62+ rm -f $(LIB) core *.bak .depend
63+
64+#########################################################################
65+
66+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
67+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
68+
69+-include .depend
70+
71+#########################################################################
72Index: u-boot/board/qt2410/config.mk
73===================================================================
74--- /dev/null
75+++ u-boot/board/qt2410/config.mk
76@@ -0,0 +1,29 @@
77+#
78+# (C) Copyright 2002
79+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
80+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
81+#
82+# SAMSUNG SMDK2410 board with S3C2410X (ARM920T) cpu
83+#
84+# see http://www.samsung.com/ for more information on SAMSUNG
85+#
86+
87+CONFIG_USB_DFU_VENDOR=0x1457
88+CONFIG_USB_DFU_PRODUCT=0x511d
89+CONFIG_USB_DFU_REVISION=0x0100
90+
91+#
92+# SMDK2410 has 1 bank of 64 MB DRAM
93+#
94+# 3000'0000 to 3400'0000
95+#
96+# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000
97+# optionally with a ramdisk at 3080'0000
98+#
99+# we load ourself to 33F8'0000
100+#
101+# download area is 3300'0000
102+#
103+
104+
105+TEXT_BASE = 0x33F80000
106Index: u-boot/board/qt2410/flash.c
107===================================================================
108--- /dev/null
109+++ u-boot/board/qt2410/flash.c
110@@ -0,0 +1,435 @@
111+/*
112+ * (C) Copyright 2002
113+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
114+ * Alex Zuepke <azu@sysgo.de>
115+ *
116+ * See file CREDITS for list of people who contributed to this
117+ * project.
118+ *
119+ * This program is free software; you can redistribute it and/or
120+ * modify it under the terms of the GNU General Public License as
121+ * published by the Free Software Foundation; either version 2 of
122+ * the License, or (at your option) any later version.
123+ *
124+ * This program is distributed in the hope that it will be useful,
125+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
126+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
127+ * GNU General Public License for more details.
128+ *
129+ * You should have received a copy of the GNU General Public License
130+ * along with this program; if not, write to the Free Software
131+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
132+ * MA 02111-1307 USA
133+ */
134+
135+#include <common.h>
136+
137+ulong myflush (void);
138+
139+
140+#define FLASH_BANK_SIZE PHYS_FLASH_SIZE
141+#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
142+
143+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
144+
145+
146+#define CMD_READ_ARRAY 0x000000F0
147+#define CMD_UNLOCK1 0x000000AA
148+#define CMD_UNLOCK2 0x00000055
149+#define CMD_ERASE_SETUP 0x00000080
150+#define CMD_ERASE_CONFIRM 0x00000030
151+#define CMD_PROGRAM 0x000000A0
152+#define CMD_UNLOCK_BYPASS 0x00000020
153+
154+#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555 << 1)))
155+#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA << 1)))
156+
157+#define BIT_ERASE_DONE 0x00000080
158+#define BIT_RDY_MASK 0x00000080
159+#define BIT_PROGRAM_ERROR 0x00000020
160+#define BIT_TIMEOUT 0x80000000 /* our flag */
161+
162+#define READY 1
163+#define ERR 2
164+#define TMO 4
165+
166+/*-----------------------------------------------------------------------
167+ */
168+
169+ulong flash_init (void)
170+{
171+ int i, j;
172+ ulong size = 0;
173+
174+ for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
175+ ulong flashbase = 0;
176+
177+ flash_info[i].flash_id =
178+#if defined(CONFIG_AMD_LV400)
179+ (AMD_MANUFACT & FLASH_VENDMASK) |
180+ (AMD_ID_LV400B & FLASH_TYPEMASK);
181+#elif defined(CONFIG_AMD_LV800)
182+ (AMD_MANUFACT & FLASH_VENDMASK) |
183+ (AMD_ID_LV800B & FLASH_TYPEMASK);
184+#else
185+#error "Unknown flash configured"
186+#endif
187+ flash_info[i].size = FLASH_BANK_SIZE;
188+ flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
189+ memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
190+ if (i == 0)
191+ flashbase = PHYS_FLASH_1;
192+ else
193+ panic ("configured too many flash banks!\n");
194+ for (j = 0; j < flash_info[i].sector_count; j++) {
195+ if (j <= 3) {
196+ /* 1st one is 16 KB */
197+ if (j == 0) {
198+ flash_info[i].start[j] =
199+ flashbase + 0;
200+ }
201+
202+ /* 2nd and 3rd are both 8 KB */
203+ if ((j == 1) || (j == 2)) {
204+ flash_info[i].start[j] =
205+ flashbase + 0x4000 + (j -
206+ 1) *
207+ 0x2000;
208+ }
209+
210+ /* 4th 32 KB */
211+ if (j == 3) {
212+ flash_info[i].start[j] =
213+ flashbase + 0x8000;
214+ }
215+ } else {
216+ flash_info[i].start[j] =
217+ flashbase + (j - 3) * MAIN_SECT_SIZE;
218+ }
219+ }
220+ size += flash_info[i].size;
221+ }
222+
223+ flash_protect (FLAG_PROTECT_SET,
224+ CFG_FLASH_BASE,
225+ CFG_FLASH_BASE + monitor_flash_len - 1,
226+ &flash_info[0]);
227+
228+#if 0
229+ flash_protect (FLAG_PROTECT_SET,
230+ CFG_ENV_ADDR,
231+ CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
232+#endif
233+
234+ return size;
235+}
236+
237+/*-----------------------------------------------------------------------
238+ */
239+void flash_print_info (flash_info_t * info)
240+{
241+ int i;
242+
243+ switch (info->flash_id & FLASH_VENDMASK) {
244+ case (AMD_MANUFACT & FLASH_VENDMASK):
245+ printf ("AMD: ");
246+ break;
247+ default:
248+ printf ("Unknown Vendor ");
249+ break;
250+ }
251+
252+ switch (info->flash_id & FLASH_TYPEMASK) {
253+ case (AMD_ID_LV400B & FLASH_TYPEMASK):
254+ printf ("1x Amd29LV400BB (4Mbit)\n");
255+ break;
256+ case (AMD_ID_LV800B & FLASH_TYPEMASK):
257+ printf ("1x Amd29LV800BB (8Mbit)\n");
258+ break;
259+ default:
260+ printf ("Unknown Chip Type\n");
261+ goto Done;
262+ break;
263+ }
264+
265+ printf (" Size: %ld MB in %d Sectors\n",
266+ info->size >> 20, info->sector_count);
267+
268+ printf (" Sector Start Addresses:");
269+ for (i = 0; i < info->sector_count; i++) {
270+ if ((i % 5) == 0) {
271+ printf ("\n ");
272+ }
273+ printf (" %08lX%s", info->start[i],
274+ info->protect[i] ? " (RO)" : " ");
275+ }
276+ printf ("\n");
277+
278+ Done:;
279+}
280+
281+/*-----------------------------------------------------------------------
282+ */
283+
284+int flash_erase (flash_info_t * info, int s_first, int s_last)
285+{
286+ ushort result;
287+ int iflag, cflag, prot, sect;
288+ int rc = ERR_OK;
289+ int chip;
290+
291+ /* first look for protection bits */
292+
293+ if (info->flash_id == FLASH_UNKNOWN)
294+ return ERR_UNKNOWN_FLASH_TYPE;
295+
296+ if ((s_first < 0) || (s_first > s_last)) {
297+ return ERR_INVAL;
298+ }
299+
300+ if ((info->flash_id & FLASH_VENDMASK) !=
301+ (AMD_MANUFACT & FLASH_VENDMASK)) {
302+ return ERR_UNKNOWN_FLASH_VENDOR;
303+ }
304+
305+ prot = 0;
306+ for (sect = s_first; sect <= s_last; ++sect) {
307+ if (info->protect[sect]) {
308+ prot++;
309+ }
310+ }
311+ if (prot)
312+ return ERR_PROTECTED;
313+
314+ /*
315+ * Disable interrupts which might cause a timeout
316+ * here. Remember that our exception vectors are
317+ * at address 0 in the flash, and we don't want a
318+ * (ticker) exception to happen while the flash
319+ * chip is in programming mode.
320+ */
321+ cflag = icache_status ();
322+ icache_disable ();
323+ iflag = disable_interrupts ();
324+
325+ /* Start erase on unprotected sectors */
326+ for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
327+ printf ("Erasing sector %2d ... ", sect);
328+
329+ /* arm simple, non interrupt dependent timer */
330+ reset_timer_masked ();
331+
332+ if (info->protect[sect] == 0) { /* not protected */
333+ vu_short *addr = (vu_short *) (info->start[sect]);
334+
335+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
336+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
337+ MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
338+
339+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
340+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
341+ *addr = CMD_ERASE_CONFIRM;
342+
343+ /* wait until flash is ready */
344+ chip = 0;
345+
346+ do {
347+ result = *addr;
348+
349+ /* check timeout */
350+ if (get_timer_masked () >
351+ CFG_FLASH_ERASE_TOUT) {
352+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
353+ chip = TMO;
354+ break;
355+ }
356+
357+ if (!chip
358+ && (result & 0xFFFF) & BIT_ERASE_DONE)
359+ chip = READY;
360+
361+ if (!chip
362+ && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
363+ chip = ERR;
364+
365+ } while (!chip);
366+
367+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
368+
369+ if (chip == ERR) {
370+ rc = ERR_PROG_ERROR;
371+ goto outahere;
372+ }
373+ if (chip == TMO) {
374+ rc = ERR_TIMOUT;
375+ goto outahere;
376+ }
377+
378+ printf ("ok.\n");
379+ } else { /* it was protected */
380+
381+ printf ("protected!\n");
382+ }
383+ }
384+
385+ if (ctrlc ())
386+ printf ("User Interrupt!\n");
387+
388+ outahere:
389+ /* allow flash to settle - wait 10 ms */
390+ udelay_masked (10000);
391+
392+ if (iflag)
393+ enable_interrupts ();
394+
395+ if (cflag)
396+ icache_enable ();
397+
398+ return rc;
399+}
400+
401+/*-----------------------------------------------------------------------
402+ * Copy memory to flash
403+ */
404+
405+volatile static int write_hword (flash_info_t * info, ulong dest, ushort data)
406+{
407+ vu_short *addr = (vu_short *) dest;
408+ ushort result;
409+ int rc = ERR_OK;
410+ int cflag, iflag;
411+ int chip;
412+
413+ /*
414+ * Check if Flash is (sufficiently) erased
415+ */
416+ result = *addr;
417+ if ((result & data) != data)
418+ return ERR_NOT_ERASED;
419+
420+
421+ /*
422+ * Disable interrupts which might cause a timeout
423+ * here. Remember that our exception vectors are
424+ * at address 0 in the flash, and we don't want a
425+ * (ticker) exception to happen while the flash
426+ * chip is in programming mode.
427+ */
428+ cflag = icache_status ();
429+ icache_disable ();
430+ iflag = disable_interrupts ();
431+
432+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
433+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
434+ MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS;
435+ *addr = CMD_PROGRAM;
436+ *addr = data;
437+
438+ /* arm simple, non interrupt dependent timer */
439+ reset_timer_masked ();
440+
441+ /* wait until flash is ready */
442+ chip = 0;
443+ do {
444+ result = *addr;
445+
446+ /* check timeout */
447+ if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
448+ chip = ERR | TMO;
449+ break;
450+ }
451+ if (!chip && ((result & 0x80) == (data & 0x80)))
452+ chip = READY;
453+
454+ if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) {
455+ result = *addr;
456+
457+ if ((result & 0x80) == (data & 0x80))
458+ chip = READY;
459+ else
460+ chip = ERR;
461+ }
462+
463+ } while (!chip);
464+
465+ *addr = CMD_READ_ARRAY;
466+
467+ if (chip == ERR || *addr != data)
468+ rc = ERR_PROG_ERROR;
469+
470+ if (iflag)
471+ enable_interrupts ();
472+
473+ if (cflag)
474+ icache_enable ();
475+
476+ return rc;
477+}
478+
479+/*-----------------------------------------------------------------------
480+ * Copy memory to flash.
481+ */
482+
483+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
484+{
485+ ulong cp, wp;
486+ int l;
487+ int i, rc;
488+ ushort data;
489+
490+ wp = (addr & ~1); /* get lower word aligned address */
491+
492+ /*
493+ * handle unaligned start bytes
494+ */
495+ if ((l = addr - wp) != 0) {
496+ data = 0;
497+ for (i = 0, cp = wp; i < l; ++i, ++cp) {
498+ data = (data >> 8) | (*(uchar *) cp << 8);
499+ }
500+ for (; i < 2 && cnt > 0; ++i) {
501+ data = (data >> 8) | (*src++ << 8);
502+ --cnt;
503+ ++cp;
504+ }
505+ for (; cnt == 0 && i < 2; ++i, ++cp) {
506+ data = (data >> 8) | (*(uchar *) cp << 8);
507+ }
508+
509+ if ((rc = write_hword (info, wp, data)) != 0) {
510+ return (rc);
511+ }
512+ wp += 2;
513+ }
514+
515+ /*
516+ * handle word aligned part
517+ */
518+ while (cnt >= 2) {
519+ data = *((vu_short *) src);
520+ if ((rc = write_hword (info, wp, data)) != 0) {
521+ return (rc);
522+ }
523+ src += 2;
524+ wp += 2;
525+ cnt -= 2;
526+ }
527+
528+ if (cnt == 0) {
529+ return ERR_OK;
530+ }
531+
532+ /*
533+ * handle unaligned tail bytes
534+ */
535+ data = 0;
536+ for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
537+ data = (data >> 8) | (*src++ << 8);
538+ --cnt;
539+ }
540+ for (; i < 2; ++i, ++cp) {
541+ data = (data >> 8) | (*(uchar *) cp << 8);
542+ }
543+
544+ return write_hword (info, wp, data);
545+}
546Index: u-boot/board/qt2410/lowlevel_init.S
547===================================================================
548--- /dev/null
549+++ u-boot/board/qt2410/lowlevel_init.S
550@@ -0,0 +1,171 @@
551+/*
552+ * Memory Setup stuff - taken from blob memsetup.S
553+ *
554+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
555+ * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
556+ *
557+ * Modified for the Samsung SMDK2410 by
558+ * (C) Copyright 2002
559+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
560+ *
561+ * See file CREDITS for list of people who contributed to this
562+ * project.
563+ *
564+ * This program is free software; you can redistribute it and/or
565+ * modify it under the terms of the GNU General Public License as
566+ * published by the Free Software Foundation; either version 2 of
567+ * the License, or (at your option) any later version.
568+ *
569+ * This program is distributed in the hope that it will be useful,
570+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
571+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
572+ * GNU General Public License for more details.
573+ *
574+ * You should have received a copy of the GNU General Public License
575+ * along with this program; if not, write to the Free Software
576+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
577+ * MA 02111-1307 USA
578+ */
579+
580+
581+#include <config.h>
582+#include <version.h>
583+
584+
585+/* some parameters for the board */
586+
587+/*
588+ *
589+ * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
590+ *
591+ * Copyright (C) 2002 Samsung Electronics SW.LEE <hitchcar@sec.samsung.com>
592+ *
593+ */
594+
595+#define BWSCON 0x48000000
596+
597+/* BWSCON */
598+#define DW8 (0x0)
599+#define DW16 (0x1)
600+#define DW32 (0x2)
601+#define WAIT (0x1<<2)
602+#define UBLB (0x1<<3)
603+
604+#define B1_BWSCON (DW32)
605+#define B2_BWSCON (DW16)
606+#define B3_BWSCON (DW16 + WAIT + UBLB)
607+#define B4_BWSCON (DW16)
608+#define B5_BWSCON (DW16)
609+#define B6_BWSCON (DW32)
610+#define B7_BWSCON (DW32)
611+
612+/* BANK0CON */
613+#define B0_Tacs 0x0 /* 0clk */
614+#define B0_Tcos 0x0 /* 0clk */
615+#define B0_Tacc 0x7 /* 14clk */
616+#define B0_Tcoh 0x0 /* 0clk */
617+#define B0_Tah 0x0 /* 0clk */
618+#define B0_Tacp 0x0
619+#define B0_PMC 0x0 /* normal */
620+
621+/* BANK1CON */
622+#define B1_Tacs 0x0 /* 0clk */
623+#define B1_Tcos 0x0 /* 0clk */
624+#define B1_Tacc 0x7 /* 14clk */
625+#define B1_Tcoh 0x0 /* 0clk */
626+#define B1_Tah 0x0 /* 0clk */
627+#define B1_Tacp 0x0
628+#define B1_PMC 0x0
629+
630+#define B2_Tacs 0x0
631+#define B2_Tcos 0x0
632+#define B2_Tacc 0x7
633+#define B2_Tcoh 0x0
634+#define B2_Tah 0x0
635+#define B2_Tacp 0x0
636+#define B2_PMC 0x0
637+
638+#define B3_Tacs 0x0 /* 0clk */
639+#define B3_Tcos 0x3 /* 4clk */
640+#define B3_Tacc 0x7 /* 14clk */
641+#define B3_Tcoh 0x1 /* 1clk */
642+#define B3_Tah 0x0 /* 0clk */
643+#define B3_Tacp 0x3 /* 6clk */
644+#define B3_PMC 0x0 /* normal */
645+
646+#define B4_Tacs 0x0 /* 0clk */
647+#define B4_Tcos 0x0 /* 0clk */
648+#define B4_Tacc 0x7 /* 14clk */
649+#define B4_Tcoh 0x0 /* 0clk */
650+#define B4_Tah 0x0 /* 0clk */
651+#define B4_Tacp 0x0
652+#define B4_PMC 0x0 /* normal */
653+
654+#define B5_Tacs 0x0 /* 0clk */
655+#define B5_Tcos 0x0 /* 0clk */
656+#define B5_Tacc 0x7 /* 14clk */
657+#define B5_Tcoh 0x0 /* 0clk */
658+#define B5_Tah 0x0 /* 0clk */
659+#define B5_Tacp 0x0
660+#define B5_PMC 0x0 /* normal */
661+
662+#define B6_MT 0x3 /* SDRAM */
663+#define B6_Trcd 0x1
664+#define B6_SCAN 0x1 /* 9bit */
665+
666+#define B7_MT 0x3 /* SDRAM */
667+#define B7_Trcd 0x1 /* 3clk */
668+#define B7_SCAN 0x1 /* 9bit */
669+
670+/* REFRESH parameter */
671+#define REFEN 0x1 /* Refresh enable */
672+#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */
673+#define Trp 0x1 /* 3clk */
674+#define Trc 0x3 /* 7clk */
675+#define Tchr 0x2 /* 3clk */
676+//#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */
677+#define REFCNT 997 /* period=17.5us, HCLK=60Mhz, (2048+1-15.6*60) */
678+/**************************************/
679+
680+_TEXT_BASE:
681+ .word TEXT_BASE
682+
683+.globl lowlevel_init
684+lowlevel_init:
685+ /* memory control configuration */
686+ /* make r0 relative the current location so that it */
687+ /* reads SMRDATA out of FLASH rather than memory ! */
688+ adr r0, SMRDATA
689+ ldr r1, =BWSCON /* Bus Width Status Controller */
690+ add r2, r0, #13*4
691+0:
692+ ldr r3, [r0], #4
693+ str r3, [r1], #4
694+ cmp r2, r0
695+ bne 0b
696+
697+ /* setup asynchronous bus mode */
698+ mrc p15, 0, r1 ,c1 ,c0, 0
699+ orr r1, r1, #0xc0000000
700+ mcr p15, 0, r1, c1, c0, 0
701+
702+ /* everything is fine now */
703+ mov pc, lr
704+
705+ .ltorg
706+/* the literal pools origin */
707+
708+SMRDATA:
709+ .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
710+ .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))
711+ .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))
712+ .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))
713+ .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))
714+ .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))
715+ .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))
716+ .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
717+ .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
718+ .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
719+ .word 0xb2
720+ .word 0x30
721+ .word 0x30
722Index: u-boot/board/qt2410/qt2410.c
723===================================================================
724--- /dev/null
725+++ u-boot/board/qt2410/qt2410.c
726@@ -0,0 +1,152 @@
727+/*
728+ * (C) 2006 by OpenMoko, Inc.
729+ * Author: Harald Welte <laforge@openmoko.org>
730+ *
731+ * based on existing S3C2410 startup code in u-boot:
732+ *
733+ * (C) Copyright 2002
734+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
735+ * Marius Groeger <mgroeger@sysgo.de>
736+ *
737+ * (C) Copyright 2002
738+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
739+ *
740+ * See file CREDITS for list of people who contributed to this
741+ * project.
742+ *
743+ * This program is free software; you can redistribute it and/or
744+ * modify it under the terms of the GNU General Public License as
745+ * published by the Free Software Foundation; either version 2 of
746+ * the License, or (at your option) any later version.
747+ *
748+ * This program is distributed in the hope that it will be useful,
749+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
750+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
751+ * GNU General Public License for more details.
752+ *
753+ * You should have received a copy of the GNU General Public License
754+ * along with this program; if not, write to the Free Software
755+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
756+ * MA 02111-1307 USA
757+ */
758+
759+#include <common.h>
760+#include <video_fb.h>
761+#include <usbdcore.h>
762+#include <s3c2410.h>
763+
764+DECLARE_GLOBAL_DATA_PTR;
765+
766+#if 1
767+//#define M_MDIV 0xA1 /* Fout = 202.8MHz */
768+//#define M_PDIV 0x3
769+//#define M_SDIV 0x1
770+#define M_MDIV 0x90 /* Fout = 202.8MHz */
771+#define M_PDIV 0x7
772+#define M_SDIV 0x0
773+#else
774+#define M_MDIV 0x5c /* Fout = 150.0MHz */
775+#define M_PDIV 0x4
776+#define M_SDIV 0x0
777+#endif
778+
779+#if 1
780+#define U_M_MDIV 0x78
781+#define U_M_PDIV 0x2
782+#define U_M_SDIV 0x3
783+#else
784+#define U_M_MDIV 0x48
785+#define U_M_PDIV 0x3
786+#define U_M_SDIV 0x2
787+#endif
788+
789+static inline void delay (unsigned long loops)
790+{
791+ __asm__ volatile ("1:\n"
792+ "subs %0, %1, #1\n"
793+ "bne 1b":"=r" (loops):"0" (loops));
794+}
795+
796+/*
797+ * Miscellaneous platform dependent initialisations
798+ */
799+
800+int board_init (void)
801+{
802+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
803+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
804+
805+ /* to reduce PLL lock time, adjust the LOCKTIME register */
806+ clk_power->LOCKTIME = 0xFFFFFF;
807+
808+ /* configure MPLL */
809+ clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
810+
811+ /* some delay between MPLL and UPLL */
812+ delay (4000);
813+
814+ /* configure UPLL */
815+ clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
816+
817+ /* some delay between MPLL and UPLL */
818+ delay (8000);
819+
820+ /* set up the I/O ports */
821+ gpio->GPACON = 0x007FFFFF;
822+ gpio->GPBCON = 0x00044555;
823+ gpio->GPBUP = 0x000007FF;
824+ gpio->GPCCON = 0xAAAAAAAA;
825+ gpio->GPCUP = 0x0000FFFF;
826+ gpio->GPDCON = 0xAAAAAAAA;
827+ gpio->GPDUP = 0x0000FFFF;
828+ gpio->GPECON = 0xAAAAAAAA;
829+ gpio->GPEUP = 0x0000FFFF;
830+ gpio->GPFCON = 0x000055AA;
831+ gpio->GPFUP = 0x000000FF;
832+ gpio->GPGCON = 0xFF95FFBA;
833+ //gpio->GPGUP = 0x0000FFFF;
834+ gpio->GPGUP = 0x0000AFEF;
835+ gpio->GPHCON = 0x0028FAAA;
836+ gpio->GPHUP = 0x000007FF;
837+
838+ /* arch number of SMDK2410-Board */
839+ gd->bd->bi_arch_number = MACH_TYPE_QT2410;
840+
841+ /* adress of boot parameters */
842+ gd->bd->bi_boot_params = 0x30000100;
843+
844+ icache_enable();
845+ dcache_enable();
846+
847+ return 0;
848+}
849+
850+#if defined(CONFIG_USB_DEVICE)
851+void udc_ctrl(enum usbd_event event, int param)
852+{
853+}
854+#endif
855+
856+void board_video_init(GraphicDevice *pGD)
857+{
858+ S3C24X0_LCD * const lcd = S3C24X0_GetBase_LCD();
859+
860+ /* FIXME: select LCM type by env variable */
861+
862+ /* Configuration for GTA01 LCM on QT2410 */
863+ lcd->LCDCON1 = 0x00000178; /* CLKVAL=1, BPPMODE=16bpp, TFT, ENVID=0 */
864+
865+ lcd->LCDCON2 = 0x019fc3c1;
866+ lcd->LCDCON3 = 0x0039df67;
867+ lcd->LCDCON4 = 0x00000007;
868+ lcd->LCDCON5 = 0x0001cf09;
869+ lcd->LPCSEL = 0x00000000;
870+}
871+
872+int dram_init (void)
873+{
874+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
875+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
876+
877+ return 0;
878+}
879Index: u-boot/board/qt2410/u-boot.lds
880===================================================================
881--- /dev/null
882+++ u-boot/board/qt2410/u-boot.lds
883@@ -0,0 +1,58 @@
884+/*
885+ * (C) Copyright 2002
886+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
887+ *
888+ * See file CREDITS for list of people who contributed to this
889+ * project.
890+ *
891+ * This program is free software; you can redistribute it and/or
892+ * modify it under the terms of the GNU General Public License as
893+ * published by the Free Software Foundation; either version 2 of
894+ * the License, or (at your option) any later version.
895+ *
896+ * This program is distributed in the hope that it will be useful,
897+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
898+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
899+ * GNU General Public License for more details.
900+ *
901+ * You should have received a copy of the GNU General Public License
902+ * along with this program; if not, write to the Free Software
903+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
904+ * MA 02111-1307 USA
905+ */
906+
907+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
908+/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
909+OUTPUT_ARCH(arm)
910+ENTRY(_start)
911+SECTIONS
912+{
913+ . = 0x00000000;
914+
915+ . = ALIGN(4);
916+ .text :
917+ {
918+ cpu/arm920t/start.o (.text)
919+ cpu/arm920t/s3c24x0/nand_read.o (.text)
920+ *(.text)
921+ }
922+
923+ . = ALIGN(4);
924+ .rodata : { *(.rodata) }
925+
926+ . = ALIGN(4);
927+ .data : { *(.data) }
928+
929+ . = ALIGN(4);
930+ .got : { *(.got) }
931+
932+ . = .;
933+ __u_boot_cmd_start = .;
934+ .u_boot_cmd : { *(.u_boot_cmd) }
935+ __u_boot_cmd_end = .;
936+
937+ . = ALIGN(4);
938+ __bss_start = .;
939+ .bss : { *(.bss) }
940+ _end = .;
941+}
942Index: u-boot/include/configs/qt2410.h
943===================================================================
944--- /dev/null
945+++ u-boot/include/configs/qt2410.h
946@@ -0,0 +1,287 @@
947+/*
948+ * (C) Copyright 2002
949+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
950+ * Marius Groeger <mgroeger@sysgo.de>
951+ * Gary Jennejohn <gj@denx.de>
952+ * David Mueller <d.mueller@elsoft.ch>
953+ *
954+ * Configuation settings for the Armzone QT2410 board.
955+ *
956+ * See file CREDITS for list of people who contributed to this
957+ * project.
958+ *
959+ * This program is free software; you can redistribute it and/or
960+ * modify it under the terms of the GNU General Public License as
961+ * published by the Free Software Foundation; either version 2 of
962+ * the License, or (at your option) any later version.
963+ *
964+ * This program is distributed in the hope that it will be useful,
965+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
966+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
967+ * GNU General Public License for more details.
968+ *
969+ * You should have received a copy of the GNU General Public License
970+ * along with this program; if not, write to the Free Software
971+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
972+ * MA 02111-1307 USA
973+ */
974+
975+#ifndef __CONFIG_H
976+#define __CONFIG_H
977+
978+#if 0
979+/* If we want to start u-boot from usb bootloader in NOR flash */
980+#define CONFIG_SKIP_RELOCATE_UBOOT 1
981+#define CONFIG_SKIP_LOWLEVEL_INIT 1
982+#else
983+/* If we want to start u-boot directly from within NAND flash */
984+#define CONFIG_S3C2410_NAND_BOOT 1
985+#define CONFIG_S3C2410_NAND_SKIP_BAD 1
986+#endif
987+
988+#define CFG_UBOOT_SIZE 0x40000
989+
990+/*
991+ * High Level Configuration Options
992+ * (easy to change)
993+ */
994+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
995+#define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */
996+#define CONFIG_SMDK2410 1 /* on a SAMSUNG SMDK2410 Board */
997+
998+/* input clock of PLL */
999+#define CONFIG_SYS_CLK_FREQ 12000000/* the SMDK2410 has 12MHz input clock */
1000+
1001+
1002+#define USE_920T_MMU 1
1003+#define CONFIG_USE_IRQ 1
1004+
1005+/*
1006+ * Size of malloc() pool
1007+ */
1008+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 400*1024)
1009+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
1010+
1011+/*
1012+ * Hardware drivers
1013+ */
1014+#if 0
1015+#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
1016+#define CS8900_BASE 0x19000300
1017+#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
1018+#endif
1019+
1020+/*
1021+ * select serial console configuration
1022+ */
1023+#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
1024+#define CONFIG_HWFLOW 1
1025+
1026+/************************************************************
1027+ * RTC
1028+ ************************************************************/
1029+#define CONFIG_RTC_S3C24X0 1
1030+
1031+/* allow to overwrite serial and ethaddr */
1032+#define CONFIG_ENV_OVERWRITE
1033+
1034+#define CONFIG_BAUDRATE 115200
1035+
1036+/***********************************************************
1037+ * Command definition
1038+ ***********************************************************/
1039+#define CONFIG_COMMANDS (\
1040+ CFG_CMD_BDI | \
1041+ CFG_CMD_LOADS | \
1042+ CFG_CMD_LOADB | \
1043+ CFG_CMD_IMI | \
1044+ CFG_CMD_CACHE | \
1045+ CFG_CMD_MEMORY | \
1046+ CFG_CMD_ENV | \
1047+ /* CFG_CMD_IRQ | */ \
1048+ CFG_CMD_BOOTD | \
1049+ CFG_CMD_CONSOLE | \
1050+ CFG_CMD_BMP | \
1051+ CFG_CMD_ASKENV | \
1052+ CFG_CMD_RUN | \
1053+ CFG_CMD_ECHO | \
1054+ CFG_CMD_I2C | \
1055+ CFG_CMD_REGINFO | \
1056+ CFG_CMD_IMMAP | \
1057+ CFG_CMD_DATE | \
1058+ CFG_CMD_AUTOSCRIPT | \
1059+ CFG_CMD_BSP | \
1060+ CFG_CMD_ELF | \
1061+ CFG_CMD_MISC | \
1062+ /* CFG_CMD_USB | */ \
1063+ CFG_CMD_JFFS2 | \
1064+ CFG_CMD_DIAG | \
1065+ CFG_CMD_HWFLOW | \
1066+ CFG_CMD_SAVES | \
1067+ CFG_CMD_NAND | \
1068+ CFG_CMD_PORTIO | \
1069+ CFG_CMD_MMC | \
1070+ CFG_CMD_FAT | \
1071+ CFG_CMD_EXT2 | \
1072+ 0)
1073+
1074+#if 0
1075+ CFG_CMD_DHCP | \
1076+ CFG_CMD_PING | \
1077+ CFG_CMD_NET | \
1078+
1079+#endif
1080+
1081+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
1082+#include <cmd_confdefs.h>
1083+
1084+#define CONFIG_BOOTDELAY 3
1085+#define CONFIG_BOOTARGS "rootfstype=jffs2 root=/dev/mtdblock4 console=ttySAC0,115200 console=tty0 loglevel=8"
1086+#define CONFIG_ETHADDR 01:ab:cd:ef:fe:dc
1087+#define CONFIG_NETMASK 255.255.255.0
1088+#define CONFIG_IPADDR 10.0.0.110
1089+#define CONFIG_SERVERIP 10.0.0.1
1090+/*#define CONFIG_BOOTFILE "elinos-lart" */
1091+#define CONFIG_BOOTCOMMAND "nand load 0x32000000 0x34000 0x200000; bootm 0x32000000"
1092+
1093+#define CONFIG_DOS_PARTITION 1
1094+
1095+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
1096+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
1097+/* what's this ? it's not used anywhere */
1098+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
1099+#endif
1100+
1101+/*
1102+ * Miscellaneous configurable options
1103+ */
1104+#define CFG_LONGHELP /* undef to save memory */
1105+#define CFG_PROMPT "QT2410 # " /* Monitor Command Prompt */
1106+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
1107+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
1108+#define CFG_MAXARGS 64 /* max number of command args */
1109+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
1110+
1111+#define CFG_MEMTEST_START 0x30000000 /* memtest works on */
1112+#define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
1113+
1114+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
1115+
1116+#define CFG_LOAD_ADDR 0x33000000 /* default load address */
1117+
1118+/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
1119+/* it to wrap 100 times (total 1562500) to get 1 sec. */
1120+#define CFG_HZ 1562500
1121+
1122+/* valid baudrates */
1123+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
1124+
1125+/*-----------------------------------------------------------------------
1126+ * Stack sizes
1127+ *
1128+ * The stack sizes are set up in start.S using the settings below
1129+ */
1130+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
1131+#ifdef CONFIG_USE_IRQ
1132+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
1133+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
1134+#endif
1135+
1136+#define CONFIG_USB_OHCI 1
1137+
1138+#define CONFIG_USB_DEVICE 1
1139+#define CONFIG_USB_TTY 1
1140+#define CFG_CONSOLE_IS_IN_ENV 1
1141+#define CONFIG_USBD_VENDORID 0x1457 /* Linux/NetChip */
1142+#define CONFIG_USBD_PRODUCTID_GSERIAL 0x5120 /* gserial */
1143+#define CONFIG_USBD_PRODUCTID_CDCACM 0x511d /* CDC ACM */
1144+#define CONFIG_USBD_MANUFACTURER "Armzone"
1145+#define CONFIG_USBD_PRODUCT_NAME "QT2410 Bootloader " U_BOOT_VERSION
1146+#define CONFIG_EXTRA_ENV_SETTINGS "usbtty=cdc_acm\0"
1147+#define CONFIG_USBD_DFU 1
1148+#define CONFIG_USBD_DFU_XFER_SIZE 0x4000
1149+
1150+/*-----------------------------------------------------------------------
1151+ * Physical Memory Map
1152+ */
1153+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
1154+#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
1155+#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
1156+#define PHYS_SDRAM_RES_SIZE 0x00200000 /* 2 MB for frame buffer */
1157+
1158+#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
1159+
1160+#define CFG_FLASH_BASE PHYS_FLASH_1
1161+
1162+/*-----------------------------------------------------------------------
1163+ * FLASH and environment organization
1164+ */
1165+
1166+#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
1167+
1168+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
1169+#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
1170+#define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
1171+
1172+/* timeout values are in ticks */
1173+#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */
1174+#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */
1175+
1176+#define CFG_ENV_IS_IN_NAND 1
1177+#define CFG_ENV_SIZE 0x4000 /* 16k Total Size of Environment Sector */
1178+#define CFG_ENV_OFFSET_OOB 1 /* Location of ENV stored in block 0 OOB */
1179+
1180+#define NAND_MAX_CHIPS 1
1181+#define CFG_NAND_BASE 0x4e000000
1182+#define CFG_MAX_NAND_DEVICE 1
1183+
1184+#define CONFIG_MMC 1
1185+#define CFG_MMC_BASE 0xff000000
1186+
1187+#define CONFIG_EXT2 1
1188+
1189+/* FAT driver in u-boot is broken currently */
1190+#define CONFIG_FAT 1
1191+#define CONFIG_SUPPORT_VFAT
1192+
1193+#if 1
1194+/* JFFS2 driver */
1195+#define CONFIG_JFFS2_CMDLINE 1
1196+#define CONFIG_JFFS2_NAND 1
1197+#define CONFIG_JFFS2_NAND_DEV 0
1198+//#define CONFIG_JFFS2_NAND_OFF 0x634000
1199+//#define CONFIG_JFFS2_NAND_SIZE 0x39cc000
1200+#endif
1201+
1202+/* ATAG configuration */
1203+#define CONFIG_INITRD_TAG 1
1204+#define CONFIG_SETUP_MEMORY_TAGS 1
1205+#define CONFIG_CMDLINE_TAG 1
1206+
1207+#define CONFIG_DRIVER_S3C24X0_I2C 1
1208+#define CONFIG_HARD_I2C 1
1209+#define CFG_I2C_SPEED 400000 /* 400kHz according to PCF50606 data sheet */
1210+#define CFG_I2C_SLAVE 0x7f
1211+
1212+#define CONFIG_VIDEO
1213+#define CONFIG_VIDEO_S3C2410
1214+#define CONFIG_CFB_CONSOLE
1215+#define CONFIG_VIDEO_LOGO
1216+#define CONFIG_SPLASH_SCREEN
1217+#define CFG_VIDEO_LOGO_MAX_SIZE (640*480+1024+100) /* 100 = slack */
1218+#define CONFIG_VIDEO_BMP_GZIP
1219+#define CONFIG_VGA_AS_SINGLE_DEVICE
1220+#define CONFIG_UNZIP
1221+
1222+#define VIDEO_KBD_INIT_FCT 0
1223+#define VIDEO_TSTC_FCT serial_tstc
1224+#define VIDEO_GETC_FCT serial_getc
1225+
1226+#define LCD_VIDEO_ADDR 0x33d00000
1227+
1228+#define CONFIG_S3C2410_NAND_BBT 1
1229+
1230+#define MTDIDS_DEFAULT "nand0=qt2410-nand"
1231+#define MTPARTS_DEFAULT "qt2410-nand:192k(u-boot),8k(u-boot_env),2M(kernel),2M(splash),-(jffs2)"
1232+
1233+#endif /* __CONFIG_H */
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-arm920_s3c2410_irq_demux.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-arm920_s3c2410_irq_demux.patch
new file mode 100644
index 0000000000..b39a268c84
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-arm920_s3c2410_irq_demux.patch
@@ -0,0 +1,56 @@
1This patch adds a IRQ demultiplexer callback to the arm920 cpu core code,
2plus a stub implementation of it for the S3C2410.
3
4Index: u-boot.git/cpu/arm920t/interrupts.c
5===================================================================
6--- u-boot.git.orig/cpu/arm920t/interrupts.c 2007-02-05 22:49:11.000000000 +0100
7+++ u-boot.git/cpu/arm920t/interrupts.c 2007-02-05 23:19:01.000000000 +0100
8@@ -161,11 +161,16 @@
9
10 void do_irq (struct pt_regs *pt_regs)
11 {
12-#if defined (CONFIG_USE_IRQ) && defined (CONFIG_ARCH_INTEGRATOR)
13+#if defined (CONFIG_USE_IRQ)
14+#if defined (ARM920_IRQ_CALLBACK)
15+ ARM920_IRQ_CALLBACK();
16+ return;
17+#elif defined (CONFIG_ARCH_INTEGRATOR)
18 /* ASSUMED to be a timer interrupt */
19 /* Just clear it - count handled in */
20 /* integratorap.c */
21 *(volatile ulong *)(CFG_TIMERBASE + 0x0C) = 0;
22+#endif /* ARCH_INTEGRATOR */
23 #else
24 printf ("interrupt request\n");
25 show_regs (pt_regs);
26Index: u-boot.git/cpu/arm920t/s3c24x0/interrupts.c
27===================================================================
28--- u-boot.git.orig/cpu/arm920t/s3c24x0/interrupts.c 2007-02-05 22:49:11.000000000 +0100
29+++ u-boot.git/cpu/arm920t/s3c24x0/interrupts.c 2007-02-05 23:21:35.000000000 +0100
30@@ -216,4 +216,13 @@
31 /*NOTREACHED*/
32 }
33
34+#ifdef CONFIG_USE_IRQ
35+void s3c2410_irq(void)
36+{
37+ S3C24X0_INTERRUPT * irq = S3C24X0_GetBase_INTERRUPT();
38+ u_int32_t intpnd = irq->INTPND;
39+
40+}
41+#endif /* USE_IRQ */
42+
43 #endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */
44Index: u-boot.git/include/common.h
45===================================================================
46--- u-boot.git.orig/include/common.h 2007-02-05 22:49:11.000000000 +0100
47+++ u-boot.git/include/common.h 2007-02-05 23:19:01.000000000 +0100
48@@ -452,6 +452,8 @@
49 ulong get_PCI_freq (void);
50 #endif
51 #if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_LH7A40X)
52+void s3c2410_irq(void);
53+#define ARM920_IRQ_CALLBACK s3c2410_irq
54 ulong get_FCLK (void);
55 ulong get_HCLK (void);
56 ulong get_PCLK (void);
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-arm920t-gd_in_irq.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-arm920t-gd_in_irq.patch
new file mode 100644
index 0000000000..b3d7bc1166
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-arm920t-gd_in_irq.patch
@@ -0,0 +1,28 @@
1This patch allows us to use the 'gd' pointer (and thus environment
2and everything else associated with it) from interrupt context on
3arm920t.
4
5Signed-off-by: Harald Welte <laforge@openmoko.org>
6
7Index: u-boot/cpu/arm920t/start.S
8===================================================================
9--- u-boot.orig/cpu/arm920t/start.S 2007-02-24 02:35:38.000000000 +0100
10+++ u-boot/cpu/arm920t/start.S 2007-02-24 02:36:01.000000000 +0100
11@@ -474,12 +474,12 @@
12 .macro irq_save_user_regs
13 sub sp, sp, #S_FRAME_SIZE
14 stmia sp, {r0 - r12} @ Calling r0-r12
15- add r8, sp, #S_PC
16- stmdb r8, {sp, lr}^ @ Calling SP, LR
17- str lr, [r8, #0] @ Save calling PC
18+ add r7, sp, #S_PC
19+ stmdb r7, {sp, lr}^ @ Calling SP, LR
20+ str lr, [r7, #0] @ Save calling PC
21 mrs r6, spsr
22- str r6, [r8, #4] @ Save CPSR
23- str r0, [r8, #8] @ Save OLD_R0
24+ str r6, [r7, #4] @ Save CPSR
25+ str r0, [r7, #8] @ Save OLD_R0
26 mov r0, sp
27 .endm
28
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-bbt-quiet.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-bbt-quiet.patch
new file mode 100644
index 0000000000..9b1febe956
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-bbt-quiet.patch
@@ -0,0 +1,43 @@
1This patch makes the u-boot NAND BBT code a bit more quiet
2
3Signed-off-by: Harald Welte <laforge@openmoko.org>
4
5Index: u-boot/drivers/nand/nand_bbt.c
6===================================================================
7--- u-boot.orig/drivers/nand/nand_bbt.c 2007-02-16 23:54:02.000000000 +0100
8+++ u-boot/drivers/nand/nand_bbt.c 2007-02-16 23:54:05.000000000 +0100
9@@ -157,10 +157,6 @@
10 this->bbt[offs + (act >> 3)] |= 0x2 << (act & 0x06);
11 continue;
12 }
13- /* Leave it for now, if its matured we can move this
14- * message to MTD_DEBUG_LEVEL0 */
15- printk (KERN_DEBUG "nand_read_bbt: Bad block at 0x%08x\n",
16- ((offs << 2) + (act >> 1)) << this->bbt_erase_shift);
17 /* Factory marked bad or worn out ? */
18 if (tmp == 0)
19 this->bbt[offs + (act >> 3)] |= 0x3 << (act & 0x06);
20@@ -229,14 +225,12 @@
21 if (td->options & NAND_BBT_VERSION) {
22 nand_read_raw (mtd, buf, td->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize);
23 td->version[0] = buf[mtd->oobblock + td->veroffs];
24- printk (KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", td->pages[0], td->version[0]);
25 }
26
27 /* Read the mirror version, if available */
28 if (md && (md->options & NAND_BBT_VERSION)) {
29 nand_read_raw (mtd, buf, md->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize);
30 md->version[0] = buf[mtd->oobblock + md->veroffs];
31- printk (KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", md->pages[0], md->version[0]);
32 }
33
34 return 1;
35@@ -374,8 +368,6 @@
36 for (i = 0; i < chips; i++) {
37 if (td->pages[i] == -1)
38 printk (KERN_WARNING "Bad block table not found for chip %d\n", i);
39- else
40- printk (KERN_DEBUG "Bad block table found at page %d, version 0x%02X\n", td->pages[i], td->version[i]);
41 }
42 return 0;
43 }
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-cmd_s3c2410.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-cmd_s3c2410.patch
new file mode 100644
index 0000000000..993ef4f6f2
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-cmd_s3c2410.patch
@@ -0,0 +1,175 @@
1This patch adds a new 's3c2410' command which currently supports 's3c2410 speed
2{set,get,list} and thus allows dynamic change of the CPU clock.
3
4Signed-off-by: Harald Welte <laforge@openmoko.org>
5
6Index: u-boot/cpu/arm920t/s3c24x0/Makefile
7===================================================================
8--- u-boot.orig/cpu/arm920t/s3c24x0/Makefile 2007-02-24 15:14:00.000000000 +0100
9+++ u-boot/cpu/arm920t/s3c24x0/Makefile 2007-02-24 15:21:02.000000000 +0100
10@@ -26,7 +26,7 @@
11 LIB = $(obj)lib$(SOC).a
12
13 COBJS = i2c.o interrupts.o serial.o speed.o \
14- usb_ohci.o nand_read.o nand.o
15+ usb_ohci.o nand_read.o nand.o cmd_s3c2410.o
16
17 SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
18 OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
19Index: u-boot/cpu/arm920t/s3c24x0/cmd_s3c2410.c
20===================================================================
21--- /dev/null 1970-01-01 00:00:00.000000000 +0000
22+++ u-boot/cpu/arm920t/s3c24x0/cmd_s3c2410.c 2007-02-24 15:22:17.000000000 +0100
23@@ -0,0 +1,152 @@
24+/*
25+ * (C) Copyright 2006 by OpenMoko, Inc.
26+ * Author: Harald Welte <laforge@openmoko.org>
27+ *
28+ * See file CREDITS for list of people who contributed to this
29+ * project.
30+ *
31+ * This program is free software; you can redistribute it and/or
32+ * modify it under the terms of the GNU General Public License as
33+ * published by the Free Software Foundation; either version 2 of
34+ * the License, or (at your option) any later version.
35+ *
36+ * This program is distributed in the hope that it will be useful,
37+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
38+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
39+ * GNU General Public License for more details.
40+ *
41+ * You should have received a copy of the GNU General Public License
42+ * along with this program; if not, write to the Free Software
43+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
44+ * MA 02111-1307 USA
45+ */
46+
47+/*
48+ * Boot support
49+ */
50+#include <common.h>
51+#include <command.h>
52+#include <net.h> /* for print_IPaddr */
53+#include <s3c2410.h>
54+
55+DECLARE_GLOBAL_DATA_PTR;
56+
57+#if (CONFIG_COMMANDS & CFG_CMD_BDI)
58+
59+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
60+#define MHZ 1000000
61+
62+static void print_cpu_speed(void)
63+{
64+ printf("FCLK = %u MHz, HCLK = %u MHz, PCLK = %u MHz\n",
65+ get_FCLK()/MHZ, get_HCLK()/MHZ, get_PCLK()/MHZ);
66+}
67+
68+struct s3c2410_pll_speed {
69+ u_int16_t mhz;
70+ u_int32_t mpllcon;
71+ u_int32_t clkdivn;
72+};
73+
74+#define CLKDIVN_1_1_1 0x00
75+#define CLKDIVN_1_2_2 0x02
76+#define CLKDIVN_1_2_4 0x03
77+#define CLKDIVN_1_4_4 0x04
78+
79+static const struct s3c2410_pll_speed pll_configs[] = {
80+ {
81+ .mhz = 50,
82+ .mpllcon = ((0x5c << 12) + (0x4 << 4) + 0x2),
83+ .clkdivn = CLKDIVN_1_1_1,
84+ },
85+ {
86+ .mhz = 101,
87+ .mpllcon = ((0x7f << 12) + (0x2 << 4) + 0x2),
88+ .clkdivn = CLKDIVN_1_2_2,
89+ },
90+ {
91+ .mhz = 202,
92+ .mpllcon = ((0x90 << 12) + (0x7 << 4) + 0x0),
93+ .clkdivn = CLKDIVN_1_2_4,
94+ },
95+ {
96+ .mhz = 266,
97+ .mpllcon = ((0x7d << 12) + (0x1 << 4) + 0x1),
98+ .clkdivn = CLKDIVN_1_2_4,
99+ },
100+};
101+
102+static void list_cpu_speeds(void)
103+{
104+ int i;
105+ for (i = 0; i < ARRAY_SIZE(pll_configs); i++)
106+ printf("%u MHz\n", pll_configs[i].mhz);
107+}
108+
109+static int reconfig_mpll(u_int16_t mhz)
110+{
111+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
112+ int i;
113+
114+ for (i = 0; i < ARRAY_SIZE(pll_configs); i++) {
115+ if (pll_configs[i].mhz == mhz) {
116+ /* to reduce PLL lock time, adjust the LOCKTIME register */
117+ clk_power->LOCKTIME = 0xFFFFFF;
118+
119+ /* configure MPLL */
120+ clk_power->MPLLCON = pll_configs[i].mpllcon;
121+ clk_power->UPLLCON = ((0x78 << 12) + (0x2 << 4) + 0x3),
122+ clk_power->CLKDIVN = pll_configs[i].clkdivn;
123+
124+ /* If we changed the speed, we need to re-configure
125+ * the serial baud rate generator */
126+ serial_setbrg();
127+ return 0;
128+ }
129+ }
130+ return -1;
131+}
132+
133+int do_s3c2410 ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
134+{
135+ if (!strcmp(argv[1], "speed")) {
136+ if (argc < 2)
137+ goto out_help;
138+ if (!strcmp(argv[2], "get"))
139+ print_cpu_speed();
140+ else if (!strcmp(argv[2], "list"))
141+ list_cpu_speeds();
142+ else if (!strcmp(argv[2], "set")) {
143+ unsigned long mhz;
144+ if (argc < 3)
145+ goto out_help;
146+
147+ mhz = simple_strtoul(argv[3], NULL, 10);
148+
149+ if (reconfig_mpll(mhz) < 0)
150+ printf("error, speed %uMHz unknown\n", mhz);
151+ else
152+ print_cpu_speed();
153+ } else
154+ goto out_help;
155+ } else {
156+out_help:
157+ printf("Usage:\n%s\n", cmdtp->usage);
158+ return 1;
159+ }
160+
161+ return 0;
162+}
163+
164+/* -------------------------------------------------------------------- */
165+
166+
167+U_BOOT_CMD(
168+ s3c2410, 4, 1, do_s3c2410,
169+ "s3c2410 - SoC specific commands\n",
170+ "speed get - display current PLL speed config\n"
171+ "s3c2410 speed list - display supporte PLL speed configs\n"
172+ "s3c2410 speed set - set PLL speed\n"
173+);
174+
175+#endif
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-cramfs_but_no_jffs2.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-cramfs_but_no_jffs2.patch
new file mode 100644
index 0000000000..349b83697e
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-cramfs_but_no_jffs2.patch
@@ -0,0 +1,41 @@
1Fix building with CRAMFS but not JFFS2 support
2
3Signed-off-by: Harald Welte <laforge@openmoko.org>
4
5Index: u-boot/fs/cramfs/cramfs.c
6===================================================================
7--- u-boot.orig/fs/cramfs/cramfs.c 2007-02-17 11:46:26.000000000 +0100
8+++ u-boot/fs/cramfs/cramfs.c 2007-02-17 11:54:36.000000000 +0100
9@@ -27,7 +27,7 @@
10 #include <common.h>
11 #include <malloc.h>
12
13-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
14+#if (CONFIG_COMMANDS & CFG_CMD_CRAMFS)
15
16 #include <asm/byteorder.h>
17 #include <linux/stat.h>
18Index: u-boot/common/cmd_jffs2.c
19===================================================================
20--- u-boot.orig/common/cmd_jffs2.c 2007-02-17 11:47:51.000000000 +0100
21+++ u-boot/common/cmd_jffs2.c 2007-02-17 14:08:25.000000000 +0100
22@@ -170,10 +170,19 @@
23 static struct mtd_device *current_dev = NULL;
24 static u8 current_partnum = 0;
25
26+#ifdef CFG_CMD_CRAMFS
27 extern int cramfs_check (struct part_info *info);
28 extern int cramfs_load (char *loadoffset, struct part_info *info, char *filename);
29 extern int cramfs_ls (struct part_info *info, char *filename);
30 extern int cramfs_info (struct part_info *info);
31+#else
32+/* defining empty macros for function names is ugly but avoids ifdef clutter
33+ * all over the code */
34+#define cramfs_check(x) (0)
35+#define cramfs_load(x,y,z) (-1)
36+#define cramfs_ls(x,y) (0)
37+#define cramfs_info(x) (0)
38+#endif
39
40 static struct part_info* jffs2_part_info(struct mtd_device *dev, unsigned int part_num);
41
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-dfu.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-dfu.patch
new file mode 100644
index 0000000000..1122f4894f
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-dfu.patch
@@ -0,0 +1,2081 @@
1Index: u-boot/drivers/usbdcore_ep0.c
2===================================================================
3--- u-boot.orig/drivers/usbdcore_ep0.c
4+++ u-boot/drivers/usbdcore_ep0.c
5@@ -42,10 +42,15 @@
6 */
7
8 #include <common.h>
9+DECLARE_GLOBAL_DATA_PTR;
10
11 #if defined(CONFIG_USB_DEVICE)
12 #include "usbdcore.h"
13
14+#ifdef CONFIG_USBD_DFU
15+#include <usb_dfu.h>
16+#endif
17+
18 #if 0
19 #define dbg_ep0(lvl,fmt,args...) serial_printf("[%s] %s:%d: "fmt"\n",__FILE__,__FUNCTION__,__LINE__,##args)
20 #else
21@@ -213,7 +218,7 @@
22 urb->buffer = device_descriptor;
23 urb->actual_length = MIN(sizeof(*device_descriptor), max);
24 }
25- /*dbg_ep0(3, "copied device configuration, actual_length: %x", urb->actual_length); */
26+ dbg_ep0(3, "using device configuration, actual_length: %x", urb->actual_length);
27 break;
28
29 case USB_DESCRIPTOR_TYPE_CONFIGURATION:
30@@ -267,7 +272,24 @@
31 return -1;
32 case USB_DESCRIPTOR_TYPE_ENDPOINT:
33 return -1;
34+ /* This really means "Class Specific Descriptor #1 == USB_DT_DFU */
35 case USB_DESCRIPTOR_TYPE_HID:
36+#ifdef CONFIG_USBD_DFU
37+ {
38+ int bNumInterface =
39+ le16_to_cpu(urb->device_request.wIndex);
40+
41+ /* In runtime mode, we only respond to the DFU INTERFACE,
42+ * whereas in DFU mode, we respond for all intrfaces */
43+ if (device->dfu_state != DFU_STATE_appIDLE &&
44+ device->dfu_state != DFU_STATE_appDETACH ||
45+ bNumInterface == CONFIG_USBD_DFU_INTERFACE) {
46+ urb->buffer = &device->dfu_cfg_desc->func_dfu;
47+ urb->actual_length = sizeof(struct usb_dfu_func_descriptor);
48+ } else
49+ return -1;
50+ }
51+#else /* CONFIG_USBD_DFU */
52 {
53 return -1; /* unsupported at this time */
54 #if 0
55@@ -294,6 +316,7 @@
56 max);
57 #endif
58 }
59+#endif /* CONFIG_USBD_DFU */
60 break;
61 case USB_DESCRIPTOR_TYPE_REPORT:
62 {
63@@ -388,6 +411,24 @@
64 le16_to_cpu (request->wLength),
65 USBD_DEVICE_REQUESTS (request->bRequest));
66
67+#ifdef CONFIG_USBD_DFU
68+ if ((request->bmRequestType & 0x3f) == USB_TYPE_DFU &&
69+ (device->dfu_state != DFU_STATE_appIDLE ||
70+ le16_to_cpu(request->wIndex) == CONFIG_USBD_DFU_INTERFACE)) {
71+ int rc = dfu_ep0_handler(urb);
72+ switch (rc) {
73+ case DFU_EP0_NONE:
74+ case DFU_EP0_UNHANDLED:
75+ break;
76+ case DFU_EP0_ZLP:
77+ case DFU_EP0_DATA:
78+ return 0;
79+ case DFU_EP0_STALL:
80+ return -1;
81+ }
82+ }
83+#endif /* CONFIG_USB_DFU */
84+
85 /* handle USB Standard Request (c.f. USB Spec table 9-2) */
86 if ((request->bmRequestType & USB_REQ_TYPE_MASK) != 0) {
87 if (device->device_state <= STATE_CONFIGURED)
88@@ -570,7 +611,8 @@
89 device->interface = le16_to_cpu (request->wIndex);
90 device->alternate = le16_to_cpu (request->wValue);
91 /*dbg_ep0(2, "set interface: %d alternate: %d", device->interface, device->alternate); */
92- serial_printf ("DEVICE_SET_INTERFACE.. event?\n");
93+ usbd_device_event_irq(device, DEVICE_SET_INTERFACE,
94+ (request->wIndex << 16 | request->wValue));
95 return 0;
96
97 case USB_REQ_GET_STATUS:
98Index: u-boot/drivers/usbdfu.c
99===================================================================
100--- /dev/null
101+++ u-boot/drivers/usbdfu.c
102@@ -0,0 +1,1069 @@
103+/*
104+ * (C) 2007 by OpenMoko, Inc.
105+ * Author: Harald Welte <laforge@openmoko.org>
106+ *
107+ * based on existing SAM7DFU code from OpenPCD:
108+ * (C) Copyright 2006 by Harald Welte <hwelte@hmw-consulting.de>
109+ *
110+ * See file CREDITS for list of people who contributed to this
111+ * project.
112+ *
113+ * This program is free software; you can redistribute it and/or
114+ * modify it under the terms of the GNU General Public License as
115+ * published by the Free Software Foundation; either version 2 of
116+ * the License, or (at your option) any later version.
117+ *
118+ * This program is distributed in the hope that it will be useful,
119+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
120+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
121+ * GNU General Public License for more details.
122+ *
123+ * You should have received a copy of the GNU General Public License
124+ * along with this program; if not, write to the Free Software
125+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
126+ * MA 02111-1307 USA
127+ *
128+ * TODO:
129+ * - make NAND support reasonably self-contained and put in apropriate
130+ * ifdefs
131+ * - add some means of synchronization, i.e. block commandline access
132+ * while DFU transfer is in progress, and return to commandline once
133+ * we're finished
134+ * - add VERIFY support after writing to flash
135+ * - sanely free() resources allocated during first uppload/download
136+ * request when aborting
137+ * - sanely free resources when another alternate interface is selected
138+ *
139+ * Maybe:
140+ * - add something like uImage or some other header that provides CRC
141+ * checking?
142+ * - make 'dnstate' attached to 'struct usb_device_instance'
143+ */
144+
145+#include <config.h>
146+#if defined(CONFIG_USBD_DFU)
147+
148+#include <common.h>
149+DECLARE_GLOBAL_DATA_PTR;
150+
151+#include <malloc.h>
152+#include <linux/types.h>
153+#include <linux/list.h>
154+#include <asm/errno.h>
155+#include <usbdcore.h>
156+#include <usb_dfu.h>
157+#include <usb_dfu_descriptors.h>
158+#include <usb_dfu_trailer.h>
159+
160+#include <nand.h>
161+#include <jffs2/load_kernel.h>
162+int mtdparts_init(void);
163+extern struct list_head devices;
164+
165+#include "usbdcore_s3c2410.h"
166+#include "usbtty.h" /* for STR_* defs */
167+
168+#define RET_NOTHING 0
169+#define RET_ZLP 1
170+#define RET_STALL 2
171+
172+volatile enum dfu_state *system_dfu_state; /* for 3rd parties */
173+
174+
175+struct dnload_state {
176+ nand_info_t *nand;
177+ struct part_info *part;
178+ unsigned int part_net_size; /* net sizee (excl. bad blocks) of part */
179+
180+ nand_erase_options_t erase_opts;
181+ nand_write_options_t write_opts;
182+ nand_read_options_t read_opts;
183+
184+ unsigned char *ptr; /* pointer to next empty byte in buffer */
185+ unsigned int off; /* offset of current erase page in flash chip */
186+ unsigned char *buf; /* pointer to allocated erase page buffer */
187+
188+ /* unless doing an atomic transfer, we use the static buffer below.
189+ * This saves us from having to clean up dynamic allications in the
190+ * various error paths of the code. Also, it will always work, no
191+ * matter what the memory situation is. */
192+ unsigned char _buf[0x20000]; /* FIXME: depends flash page size */
193+};
194+
195+static struct dnload_state _dnstate;
196+
197+static int dfu_trailer_matching(const struct uboot_dfu_trailer *trailer)
198+{
199+ if (trailer->magic != UBOOT_DFU_TRAILER_MAGIC ||
200+ trailer->version != UBOOT_DFU_TRAILER_V1 ||
201+ trailer->vendor != CONFIG_USBD_VENDORID ||
202+ (trailer->product != CONFIG_USBD_PRODUCTID_CDCACM &&
203+ trailer->product != CONFIG_USBD_PRODUCTID_GSERIAL))
204+ return 0;
205+#ifdef CONFIG_REVISION_TAG
206+ if (trailer->revision != get_board_rev())
207+ return 0;
208+#endif
209+
210+ return 1;
211+}
212+
213+static struct part_info *get_partition_nand(int idx)
214+{
215+ struct mtd_device *dev;
216+ struct part_info *part;
217+ struct list_head *pentry;
218+ int i;
219+
220+ if (mtdparts_init())
221+ return NULL;
222+ if (list_empty(&devices))
223+ return NULL;
224+
225+ dev = list_entry(devices.next, struct mtd_device, link);
226+ i = 0;
227+ list_for_each(pentry, &dev->parts) {
228+ if (i == idx) {
229+ part = list_entry(pentry, struct part_info, link);
230+ return part;
231+ }
232+ i++;
233+ }
234+
235+ return NULL;
236+}
237+
238+#define LOAD_ADDR ((unsigned char *)0x32000000)
239+
240+static int initialize_ds_nand(struct usb_device_instance *dev, struct dnload_state *ds)
241+{
242+ ds->part = get_partition_nand(dev->alternate - 1);
243+ if (!ds->part) {
244+ printf("DFU: unable to find partition %u\b", dev->alternate-1);
245+ dev->dfu_state = DFU_STATE_dfuERROR;
246+ dev->dfu_status = DFU_STATUS_errADDRESS;
247+ return RET_STALL;
248+ }
249+ ds->nand = &nand_info[ds->part->dev->id->num];
250+ ds->off = ds->part->offset;
251+ ds->part_net_size = nand_net_part_size(ds->part);
252+
253+ if (ds->nand->erasesize > sizeof(ds->_buf)) {
254+ printf("*** Warning - NAND ERASESIZE bigger than static buffer\n");
255+ ds->buf = malloc(ds->nand->erasesize);
256+ if (!ds->buf) {
257+ printf("DFU: can't allocate %u bytes\n", ds->nand->erasesize);
258+ dev->dfu_state = DFU_STATE_dfuERROR;
259+ dev->dfu_status = DFU_STATUS_errADDRESS;
260+ return RET_STALL;
261+ }
262+ } else
263+ ds->buf = ds->_buf;
264+
265+ ds->ptr = ds->buf;
266+
267+ memset(&ds->read_opts, 0, sizeof(ds->read_opts));
268+
269+ memset(&ds->erase_opts, 0, sizeof(ds->erase_opts));
270+ ds->erase_opts.quiet = 1;
271+ /* FIXME: do this more dynamic */
272+ if (!strcmp(ds->part->name, "rootfs"))
273+ ds->erase_opts.jffs2 = 1;
274+
275+ memset(&ds->write_opts, 0, sizeof(ds->write_opts));
276+ ds->write_opts.pad = 1;
277+ ds->write_opts.blockalign = 1;
278+ ds->write_opts.quiet = 1;
279+
280+ debug("initialize_ds_nand(dev=%p, ds=%p): ", dev, ds);
281+ debug("nand=%p, ptr=%p, buf=%p, off=0x%x\n", ds->nand, ds->ptr, ds->buf, ds->off);
282+
283+ return RET_NOTHING;
284+}
285+
286+static int erase_flash_verify_nand(struct urb *urb, struct dnload_state *ds,
287+ unsigned long erasesize, unsigned long size)
288+{
289+ struct usb_device_instance *dev = urb->device;
290+ int rc;
291+
292+ debug("erase_flash_verify_nand(urb=%p, ds=%p, erase=0x%x size=0x%x)\n",
293+ urb, ds, erasesize, size);
294+
295+ if (erasesize == ds->nand->erasesize) {
296+ /* we're only writing a single block and need to
297+ * do bad block skipping / offset adjustments our own */
298+ while (ds->nand->block_isbad(ds->nand, ds->off)) {
299+ debug("SKIP_ONE_BLOCK(0x%08x)!!\n", ds->off);
300+ ds->off += ds->nand->erasesize;
301+ }
302+ }
303+
304+ /* we have finished one eraseblock, flash it */
305+ ds->erase_opts.offset = ds->off;
306+ ds->erase_opts.length = erasesize;
307+ debug("Erasing 0x%x bytes @ offset 0x%x (jffs=%u)\n",
308+ ds->erase_opts.length, ds->erase_opts.offset,
309+ ds->erase_opts.jffs2);
310+ rc = nand_erase_opts(ds->nand, &ds->erase_opts);
311+ if (rc) {
312+ debug("Error erasing\n");
313+ dev->dfu_state = DFU_STATE_dfuERROR;
314+ dev->dfu_status = DFU_STATUS_errERASE;
315+ return RET_STALL;
316+ }
317+
318+ ds->write_opts.buffer = ds->buf;
319+ ds->write_opts.length = size;
320+ ds->write_opts.offset = ds->off;
321+ debug("Writing 0x%x bytes @ offset 0x%x\n", size, ds->off);
322+ rc = nand_write_opts(ds->nand, &ds->write_opts);
323+ if (rc) {
324+ debug("Error writing\n");
325+ dev->dfu_state = DFU_STATE_dfuERROR;
326+ dev->dfu_status = DFU_STATUS_errWRITE;
327+ return RET_STALL;
328+ }
329+
330+ ds->off += size;
331+ ds->ptr = ds->buf;
332+
333+ /* FIXME: implement verify! */
334+ return RET_NOTHING;
335+}
336+
337+static int erase_tail_clean_nand(struct urb *urb, struct dnload_state *ds)
338+{
339+ struct usb_device_instance *dev = urb->device;
340+ int rc;
341+
342+ ds->erase_opts.offset = ds->off;
343+ ds->erase_opts.length = ds->part->size-ds->off;
344+ debug("Erasing 0x%x bytes @ offset 0x%x (jffs=%u)\n",
345+ ds->erase_opts.length, ds->erase_opts.offset,
346+ ds->erase_opts.jffs2);
347+ rc = nand_erase_opts(ds->nand, &ds->erase_opts);
348+ if (rc) {
349+ debug("Error erasing\n");
350+ dev->dfu_state = DFU_STATE_dfuERROR;
351+ dev->dfu_status = DFU_STATUS_errERASE;
352+ return RET_STALL;
353+ }
354+
355+ ds->off += ds->part->size; /* for consistency */
356+
357+ return RET_NOTHING;
358+}
359+
360+/* Read the next erase blcok from NAND into buffer */
361+static int read_next_nand(struct urb *urb, struct dnload_state *ds)
362+{
363+ struct usb_device_instance *dev = urb->device;
364+ int rc;
365+
366+ ds->read_opts.buffer = ds->buf;
367+ ds->read_opts.length = ds->nand->erasesize;
368+ ds->read_opts.offset = ds->off;
369+ ds->read_opts.quiet = 1;
370+
371+ debug("Reading 0x%x@0x%x to 0x%08p\n", ds->nand->erasesize,
372+ ds->off, ds->buf);
373+ rc = nand_read_opts(ds->nand, &ds->read_opts);
374+ if (rc) {
375+ debug("Error reading\n");
376+ dev->dfu_state = DFU_STATE_dfuERROR;
377+ dev->dfu_status = DFU_STATUS_errWRITE;
378+ return RET_STALL;
379+ }
380+ ds->off += ds->nand->erasesize;
381+ ds->ptr = ds->buf;
382+
383+ return RET_NOTHING;
384+}
385+
386+
387+static int handle_dnload(struct urb *urb, u_int16_t val, u_int16_t len, int first)
388+{
389+ struct usb_device_instance *dev = urb->device;
390+ struct dnload_state *ds = &_dnstate;
391+ unsigned int actual_len = len;
392+ unsigned int remain_len;
393+ unsigned long size;
394+ int rc;
395+
396+ debug("download(len=%u, first=%u) ", len, first);
397+
398+ if (len > CONFIG_USBD_DFU_XFER_SIZE) {
399+ /* Too big. Not that we'd really care, but it's a
400+ * DFU protocol violation */
401+ debug("length exceeds flash page size ");
402+ dev->dfu_state = DFU_STATE_dfuERROR;
403+ dev->dfu_status = DFU_STATUS_errADDRESS;
404+ return RET_STALL;
405+ }
406+
407+ if (first) {
408+ /* Make sure that we have a valid mtd partition table */
409+ char *mtdp = getenv("mtdparts");
410+ if (!mtdp)
411+ run_command("dynpart", 0);
412+ }
413+
414+ if (len == 0) {
415+ debug("zero-size write -> MANIFEST_SYNC ");
416+ dev->dfu_state = DFU_STATE_dfuMANIFEST_SYNC;
417+
418+ /* cleanup */
419+ switch (dev->alternate) {
420+ char buf[12];
421+ case 0:
422+ sprintf(buf, "%lx", ds->ptr - ds->buf);
423+ setenv("filesize", buf);
424+ ds->ptr = ds->buf;
425+ break;
426+ case 1:
427+ if (ds->ptr >
428+ ds->buf + sizeof(struct uboot_dfu_trailer)) {
429+ struct uboot_dfu_trailer trailer;
430+ dfu_trailer_mirror(&trailer, ds->ptr);
431+ if (!dfu_trailer_matching(&trailer)) {
432+ printf("DFU TRAILER NOT OK\n");
433+ dev->dfu_state = DFU_STATE_dfuERROR;
434+ dev->dfu_status = DFU_STATUS_errTARGET;
435+ return RET_STALL;
436+ }
437+
438+ rc = erase_flash_verify_nand(urb, ds,
439+ ds->part->size,
440+ ds->part_net_size);
441+ /* re-write dynenv marker in OOB */
442+ run_command("dynenv set u-boot_env", 0);
443+ }
444+ ds->nand = NULL;
445+ free(ds->buf);
446+ ds->ptr = ds->buf = ds->_buf;
447+ break;
448+ default:
449+ rc = 0;
450+ if (ds->ptr > ds->buf)
451+ rc = erase_flash_verify_nand(urb, ds,
452+ ds->nand->erasesize,
453+ ds->nand->erasesize);
454+ /* rootfs partition */
455+ if (!rc && dev->alternate == 5)
456+ rc = erase_tail_clean_nand(urb, ds);
457+
458+ ds->nand = NULL;
459+ break;
460+ }
461+
462+ return RET_ZLP;
463+ }
464+
465+ if (urb->actual_length != len) {
466+ debug("urb->actual_length(%u) != len(%u) ?!? ",
467+ urb->actual_length, len);
468+ dev->dfu_state = DFU_STATE_dfuERROR;
469+ dev->dfu_status = DFU_STATUS_errADDRESS;
470+ return RET_STALL;
471+ }
472+
473+ if (first && ds->buf && ds->buf != ds->_buf && ds->buf != LOAD_ADDR) {
474+ free(ds->buf);
475+ ds->buf = ds->_buf;
476+ }
477+
478+ switch (dev->alternate) {
479+ case 0:
480+ if (first) {
481+ printf("Starting DFU DOWNLOAD to RAM (0x%08p)\n",
482+ LOAD_ADDR);
483+ ds->buf = LOAD_ADDR;
484+ ds->ptr = ds->buf;
485+ }
486+
487+ memcpy(ds->ptr, urb->buffer, len);
488+ ds->ptr += len;
489+ break;
490+ case 1:
491+ if (first) {
492+ rc = initialize_ds_nand(dev, ds);
493+ if (rc)
494+ return rc;
495+ ds->buf = malloc(ds->part_net_size);
496+ if (!ds->buf) {
497+ printf("No memory for atomic buffer!!\n");
498+ dev->dfu_state = DFU_STATE_dfuERROR;
499+ dev->dfu_status = DFU_STATUS_errUNKNOWN;
500+ return RET_STALL;
501+ }
502+ ds->ptr = ds->buf;
503+ printf("Starting Atomic DFU DOWNLOAD to partition '%s'\n",
504+ ds->part->name);
505+ }
506+
507+ remain_len = (ds->buf + ds->part_net_size) - ds->ptr;
508+ if (remain_len < len) {
509+ len = remain_len;
510+ printf("End of write exceeds partition end\n");
511+ dev->dfu_state = DFU_STATE_dfuERROR;
512+ dev->dfu_status = DFU_STATUS_errADDRESS;
513+ return RET_STALL;
514+ }
515+ memcpy(ds->ptr, urb->buffer, len);
516+ ds->ptr += len;
517+ break;
518+ default:
519+ if (first) {
520+ rc = initialize_ds_nand(dev, ds);
521+ if (rc)
522+ return rc;
523+ printf("Starting DFU DOWNLOAD to partition '%s'\n",
524+ ds->part->name);
525+ }
526+
527+ size = ds->nand->erasesize;
528+ remain_len = ds->buf + size - ds->ptr;
529+ if (remain_len < len)
530+ actual_len = remain_len;
531+
532+ memcpy(ds->ptr, urb->buffer, actual_len);
533+ ds->ptr += actual_len;
534+
535+ /* check partition end */
536+ if (ds->off + (ds->ptr - ds->buf) > ds->part->offset + ds->part->size) {
537+ printf("End of write exceeds partition end\n");
538+ dev->dfu_state = DFU_STATE_dfuERROR;
539+ dev->dfu_status = DFU_STATUS_errADDRESS;
540+ return RET_STALL;
541+ }
542+
543+ if (ds->ptr >= ds->buf + size) {
544+ rc = erase_flash_verify_nand(urb, ds,
545+ ds->nand->erasesize,
546+ ds->nand->erasesize);
547+ if (rc)
548+ return rc;
549+ /* copy remainder of data into buffer */
550+ memcpy(ds->ptr, urb->buffer + actual_len, len - actual_len);
551+ ds->ptr += (len - actual_len);
552+ }
553+ break;
554+ }
555+
556+ return RET_ZLP;
557+}
558+
559+static int handle_upload(struct urb *urb, u_int16_t val, u_int16_t len, int first)
560+{
561+ struct usb_device_instance *dev = urb->device;
562+ struct dnload_state *ds = &_dnstate;
563+ unsigned int remain;
564+ int rc;
565+
566+ debug("upload(val=0x%02x, len=%u, first=%u) ", val, len, first);
567+
568+ if (len > CONFIG_USBD_DFU_XFER_SIZE) {
569+ /* Too big */
570+ dev->dfu_state = DFU_STATE_dfuERROR;
571+ dev->dfu_status = DFU_STATUS_errADDRESS;
572+ //udc_ep0_send_stall();
573+ debug("Error: Transfer size > CONFIG_USBD_DFU_XFER_SIZE ");
574+ return -EINVAL;
575+ }
576+
577+ switch (dev->alternate) {
578+ case 0:
579+ if (first) {
580+ printf("Starting DFU Upload of RAM (0x%08p)\n",
581+ LOAD_ADDR);
582+ ds->ptr = ds->buf;
583+ }
584+
585+ /* FIXME: end at some more dynamic point */
586+ if (ds->ptr + len > LOAD_ADDR + 0x200000)
587+ len = (LOAD_ADDR + 0x200000) - ds->ptr;
588+
589+ urb->buffer = ds->ptr;
590+ urb->actual_length = len;
591+ ds->ptr += len;
592+ break;
593+ default:
594+ if (first) {
595+ rc = initialize_ds_nand(dev, ds);
596+ if (rc)
597+ return -EINVAL;
598+ printf("Starting DFU Upload of partition '%s'\n",
599+ ds->part->name);
600+ rc = read_next_nand(urb, ds);
601+ if (rc)
602+ return -EINVAL;
603+ }
604+
605+ if (len > ds->nand->erasesize) {
606+ printf("We don't support transfers bigger than %u\n",
607+ ds->nand->erasesize);
608+ len = ds->nand->erasesize;
609+ }
610+
611+ remain = ds->nand->erasesize - (ds->ptr - ds->buf);
612+ if (len < remain)
613+ remain = len;
614+
615+ debug("copying %u bytes ", remain);
616+ urb->buffer = ds->ptr;
617+ ds->ptr += remain;
618+ urb->actual_length = remain;
619+
620+ if (ds->ptr >= ds->buf + ds->nand->erasesize &&
621+ ds->off < ds->part->offset + ds->part->size) {
622+ rc = read_next_nand(urb, ds);
623+ if (rc)
624+ return -EINVAL;
625+ if (len > remain) {
626+ debug("copying another %u bytes ", len - remain);
627+ memcpy(urb->buffer + remain, ds->ptr, len - remain);
628+ ds->ptr += (len - remain);
629+ urb->actual_length += (len - remain);
630+ }
631+ }
632+ break;
633+ }
634+
635+ debug("returning len=%u\n", len);
636+ return len;
637+}
638+
639+static void handle_getstatus(struct urb *urb, int max)
640+{
641+ struct usb_device_instance *dev = urb->device;
642+ struct dfu_status *dstat = (struct dfu_status *) urb->buffer;
643+
644+ debug("getstatus ");
645+
646+ if (!urb->buffer || urb->buffer_length < sizeof(*dstat)) {
647+ debug("invalid urb! ");
648+ return;
649+ }
650+
651+ switch (dev->dfu_state) {
652+ case DFU_STATE_dfuDNLOAD_SYNC:
653+ case DFU_STATE_dfuDNBUSY:
654+#if 0
655+ if (fsr & AT91C_MC_PROGE) {
656+ debug("errPROG ");
657+ dev->dfu_status = DFU_STATUS_errPROG;
658+ dev->dfu_state = DFU_STATE_dfuERROR;
659+ } else if (fsr & AT91C_MC_LOCKE) {
660+ debug("errWRITE ");
661+ dev->dfu_status = DFU_STATUS_errWRITE;
662+ dev->dfu_state = DFU_STATE_dfuERROR;
663+ } else if (fsr & AT91C_MC_FRDY) {
664+#endif
665+ debug("DNLOAD_IDLE ");
666+ dev->dfu_state = DFU_STATE_dfuDNLOAD_IDLE;
667+#if 0
668+ } else {
669+ debug("DNBUSY ");
670+ dev->dfu_state = DFU_STATE_dfuDNBUSY;
671+ }
672+#endif
673+ break;
674+ case DFU_STATE_dfuMANIFEST_SYNC:
675+ break;
676+ default:
677+ //return;
678+ break;
679+ }
680+
681+ /* send status response */
682+ dstat->bStatus = dev->dfu_status;
683+ dstat->bState = dev->dfu_state;
684+ dstat->iString = 0;
685+ /* FIXME: set dstat->bwPollTimeout */
686+ urb->actual_length = MIN(sizeof(*dstat), max);
687+
688+ /* we don't need to explicitly send data here, will
689+ * be done by the original caller! */
690+}
691+
692+static void handle_getstate(struct urb *urb, int max)
693+{
694+ debug("getstate ");
695+
696+ if (!urb->buffer || urb->buffer_length < sizeof(u_int8_t)) {
697+ debug("invalid urb! ");
698+ return;
699+ }
700+
701+ urb->buffer[0] = urb->device->dfu_state & 0xff;
702+ urb->actual_length = sizeof(u_int8_t);
703+}
704+
705+#ifndef CONFIG_USBD_PRODUCTID_DFU
706+#define CONFIG_USBD_PRODUCTID_DFU CONFIG_USBD_PRODUCTID_CDCACM
707+#endif
708+
709+static const struct usb_device_descriptor dfu_dev_descriptor = {
710+ .bLength = USB_DT_DEVICE_SIZE,
711+ .bDescriptorType = USB_DT_DEVICE,
712+ .bcdUSB = 0x0100,
713+ .bDeviceClass = 0x00,
714+ .bDeviceSubClass = 0x00,
715+ .bDeviceProtocol = 0x00,
716+ .bMaxPacketSize0 = EP0_MAX_PACKET_SIZE,
717+ .idVendor = CONFIG_USBD_VENDORID,
718+ .idProduct = CONFIG_USBD_PRODUCTID_DFU,
719+ .bcdDevice = 0x0000,
720+ .iManufacturer = DFU_STR_MANUFACTURER,
721+ .iProduct = DFU_STR_PRODUCT,
722+ .iSerialNumber = DFU_STR_SERIAL,
723+ .bNumConfigurations = 0x01,
724+};
725+
726+static const struct _dfu_desc dfu_cfg_descriptor = {
727+ .ucfg = {
728+ .bLength = USB_DT_CONFIG_SIZE,
729+ .bDescriptorType = USB_DT_CONFIG,
730+ .wTotalLength = USB_DT_CONFIG_SIZE +
731+ DFU_NUM_ALTERNATES * USB_DT_INTERFACE_SIZE +
732+ USB_DT_DFU_SIZE,
733+ .bNumInterfaces = 5,
734+ .bConfigurationValue = 1,
735+ .iConfiguration = DFU_STR_CONFIG,
736+ .bmAttributes = BMATTRIBUTE_RESERVED,
737+ .bMaxPower = 50,
738+ },
739+ .uif[0] = {
740+ .bLength = USB_DT_INTERFACE_SIZE,
741+ .bDescriptorType = USB_DT_INTERFACE,
742+ .bInterfaceNumber = 0x00,
743+ .bAlternateSetting = 0x00,
744+ .bNumEndpoints = 0x00,
745+ .bInterfaceClass = 0xfe,
746+ .bInterfaceSubClass = 0x01,
747+ .bInterfaceProtocol = 0x02,
748+ .iInterface = DFU_STR_ALT0,
749+ },
750+ .uif[1] = {
751+ .bLength = USB_DT_INTERFACE_SIZE,
752+ .bDescriptorType = USB_DT_INTERFACE,
753+ .bInterfaceNumber = 0x00,
754+ .bAlternateSetting = 0x01,
755+ .bNumEndpoints = 0x00,
756+ .bInterfaceClass = 0xfe,
757+ .bInterfaceSubClass = 0x01,
758+ .bInterfaceProtocol = 0x02,
759+ .iInterface = DFU_STR_ALT1,
760+ },
761+ .uif[2] = {
762+ .bLength = USB_DT_INTERFACE_SIZE,
763+ .bDescriptorType = USB_DT_INTERFACE,
764+ .bInterfaceNumber = 0x00,
765+ .bAlternateSetting = 0x02,
766+ .bNumEndpoints = 0x00,
767+ .bInterfaceClass = 0xfe,
768+ .bInterfaceSubClass = 0x01,
769+ .bInterfaceProtocol = 0x02,
770+ .iInterface = DFU_STR_ALT2,
771+ },
772+ .uif[3] = {
773+ .bLength = USB_DT_INTERFACE_SIZE,
774+ .bDescriptorType = USB_DT_INTERFACE,
775+ .bInterfaceNumber = 0x00,
776+ .bAlternateSetting = 0x03,
777+ .bNumEndpoints = 0x00,
778+ .bInterfaceClass = 0xfe,
779+ .bInterfaceSubClass = 0x01,
780+ .bInterfaceProtocol = 0x02,
781+ .iInterface = DFU_STR_ALT3,
782+ },
783+ .uif[4] = {
784+ .bLength = USB_DT_INTERFACE_SIZE,
785+ .bDescriptorType = USB_DT_INTERFACE,
786+ .bInterfaceNumber = 0x00,
787+ .bAlternateSetting = 0x04,
788+ .bNumEndpoints = 0x00,
789+ .bInterfaceClass = 0xfe,
790+ .bInterfaceSubClass = 0x01,
791+ .bInterfaceProtocol = 0x02,
792+ .iInterface = DFU_STR_ALT4,
793+ },
794+ .uif[5] = {
795+ .bLength = USB_DT_INTERFACE_SIZE,
796+ .bDescriptorType = USB_DT_INTERFACE,
797+ .bInterfaceNumber = 0x00,
798+ .bAlternateSetting = 0x05,
799+ .bNumEndpoints = 0x00,
800+ .bInterfaceClass = 0xfe,
801+ .bInterfaceSubClass = 0x01,
802+ .bInterfaceProtocol = 0x02,
803+ .iInterface = DFU_STR_ALT5,
804+ },
805+ .func_dfu = DFU_FUNC_DESC,
806+};
807+
808+int dfu_ep0_handler(struct urb *urb)
809+{
810+ int rc, ret = RET_NOTHING;
811+ u_int8_t req = urb->device_request.bRequest;
812+ u_int16_t val = urb->device_request.wValue;
813+ u_int16_t len = urb->device_request.wLength;
814+ struct usb_device_instance *dev = urb->device;
815+
816+ debug("dfu_ep0(req=0x%x, val=0x%x, len=%u) old_state = %u ",
817+ req, val, len, dev->dfu_state);
818+
819+ switch (dev->dfu_state) {
820+ case DFU_STATE_appIDLE:
821+ switch (req) {
822+ case USB_REQ_DFU_GETSTATUS:
823+ handle_getstatus(urb, len);
824+ break;
825+ case USB_REQ_DFU_GETSTATE:
826+ handle_getstate(urb, len);
827+ break;
828+ case USB_REQ_DFU_DETACH:
829+ dev->dfu_state = DFU_STATE_appDETACH;
830+ ret = RET_ZLP;
831+ goto out;
832+ break;
833+ default:
834+ ret = RET_STALL;
835+ }
836+ break;
837+ case DFU_STATE_appDETACH:
838+ switch (req) {
839+ case USB_REQ_DFU_GETSTATUS:
840+ handle_getstatus(urb, len);
841+ break;
842+ case USB_REQ_DFU_GETSTATE:
843+ handle_getstate(urb, len);
844+ break;
845+ default:
846+ dev->dfu_state = DFU_STATE_appIDLE;
847+ ret = RET_STALL;
848+ goto out;
849+ break;
850+ }
851+ /* FIXME: implement timer to return to appIDLE */
852+ break;
853+ case DFU_STATE_dfuIDLE:
854+ switch (req) {
855+ case USB_REQ_DFU_DNLOAD:
856+ if (len == 0) {
857+ dev->dfu_state = DFU_STATE_dfuERROR;
858+ ret = RET_STALL;
859+ goto out;
860+ }
861+ dev->dfu_state = DFU_STATE_dfuDNLOAD_SYNC;
862+ ret = handle_dnload(urb, val, len, 1);
863+ break;
864+ case USB_REQ_DFU_UPLOAD:
865+ dev->dfu_state = DFU_STATE_dfuUPLOAD_IDLE;
866+ handle_upload(urb, val, len, 1);
867+ break;
868+ case USB_REQ_DFU_ABORT:
869+ /* no zlp? */
870+ ret = RET_ZLP;
871+ break;
872+ case USB_REQ_DFU_GETSTATUS:
873+ handle_getstatus(urb, len);
874+ break;
875+ case USB_REQ_DFU_GETSTATE:
876+ handle_getstate(urb, len);
877+ break;
878+ case USB_REQ_DFU_DETACH:
879+ /* Proprietary extension: 'detach' from idle mode and
880+ * get back to runtime mode in case of USB Reset. As
881+ * much as I dislike this, we just can't use every USB
882+ * bus reset to switch back to runtime mode, since at
883+ * least the Linux USB stack likes to send a number of resets
884+ * in a row :( */
885+ dev->dfu_state = DFU_STATE_dfuMANIFEST_WAIT_RST;
886+ break;
887+ default:
888+ dev->dfu_state = DFU_STATE_dfuERROR;
889+ ret = RET_STALL;
890+ goto out;
891+ break;
892+ }
893+ break;
894+ case DFU_STATE_dfuDNLOAD_SYNC:
895+ switch (req) {
896+ case USB_REQ_DFU_GETSTATUS:
897+ handle_getstatus(urb, len);
898+ /* FIXME: state transition depending on block completeness */
899+ break;
900+ case USB_REQ_DFU_GETSTATE:
901+ handle_getstate(urb, len);
902+ break;
903+ default:
904+ dev->dfu_state = DFU_STATE_dfuERROR;
905+ ret = RET_STALL;
906+ goto out;
907+ }
908+ break;
909+ case DFU_STATE_dfuDNBUSY:
910+ switch (req) {
911+ case USB_REQ_DFU_GETSTATUS:
912+ /* FIXME: only accept getstatus if bwPollTimeout
913+ * has elapsed */
914+ handle_getstatus(urb, len);
915+ break;
916+ default:
917+ dev->dfu_state = DFU_STATE_dfuERROR;
918+ ret = RET_STALL;
919+ goto out;
920+ }
921+ break;
922+ case DFU_STATE_dfuDNLOAD_IDLE:
923+ switch (req) {
924+ case USB_REQ_DFU_DNLOAD:
925+ dev->dfu_state = DFU_STATE_dfuDNLOAD_SYNC;
926+ ret = handle_dnload(urb, val, len, 0);
927+ break;
928+ case USB_REQ_DFU_ABORT:
929+ dev->dfu_state = DFU_STATE_dfuIDLE;
930+ ret = RET_ZLP;
931+ break;
932+ case USB_REQ_DFU_GETSTATUS:
933+ handle_getstatus(urb, len);
934+ break;
935+ case USB_REQ_DFU_GETSTATE:
936+ handle_getstate(urb, len);
937+ break;
938+ default:
939+ dev->dfu_state = DFU_STATE_dfuERROR;
940+ ret = RET_STALL;
941+ break;
942+ }
943+ break;
944+ case DFU_STATE_dfuMANIFEST_SYNC:
945+ switch (req) {
946+ case USB_REQ_DFU_GETSTATUS:
947+ /* We're MainfestationTolerant */
948+ dev->dfu_state = DFU_STATE_dfuIDLE;
949+ handle_getstatus(urb, len);
950+ break;
951+ case USB_REQ_DFU_GETSTATE:
952+ handle_getstate(urb, len);
953+ break;
954+ default:
955+ dev->dfu_state = DFU_STATE_dfuERROR;
956+ ret = RET_STALL;
957+ break;
958+ }
959+ break;
960+ case DFU_STATE_dfuMANIFEST:
961+ /* we should never go here */
962+ dev->dfu_state = DFU_STATE_dfuERROR;
963+ ret = RET_STALL;
964+ break;
965+ case DFU_STATE_dfuMANIFEST_WAIT_RST:
966+ /* we should never go here */
967+ break;
968+ case DFU_STATE_dfuUPLOAD_IDLE:
969+ switch (req) {
970+ case USB_REQ_DFU_UPLOAD:
971+ /* state transition if less data then requested */
972+ rc = handle_upload(urb, val, len, 0);
973+ if (rc >= 0 && rc < len)
974+ dev->dfu_state = DFU_STATE_dfuIDLE;
975+ break;
976+ case USB_REQ_DFU_ABORT:
977+ dev->dfu_state = DFU_STATE_dfuIDLE;
978+ /* no zlp? */
979+ ret = RET_ZLP;
980+ break;
981+ case USB_REQ_DFU_GETSTATUS:
982+ handle_getstatus(urb, len);
983+ break;
984+ case USB_REQ_DFU_GETSTATE:
985+ handle_getstate(urb, len);
986+ break;
987+ default:
988+ dev->dfu_state = DFU_STATE_dfuERROR;
989+ ret = RET_STALL;
990+ break;
991+ }
992+ break;
993+ case DFU_STATE_dfuERROR:
994+ switch (req) {
995+ case USB_REQ_DFU_GETSTATUS:
996+ handle_getstatus(urb, len);
997+ break;
998+ case USB_REQ_DFU_GETSTATE:
999+ handle_getstate(urb, len);
1000+ break;
1001+ case USB_REQ_DFU_CLRSTATUS:
1002+ dev->dfu_state = DFU_STATE_dfuIDLE;
1003+ dev->dfu_status = DFU_STATUS_OK;
1004+ /* no zlp? */
1005+ ret = RET_ZLP;
1006+ break;
1007+ default:
1008+ dev->dfu_state = DFU_STATE_dfuERROR;
1009+ ret = RET_STALL;
1010+ break;
1011+ }
1012+ break;
1013+ default:
1014+ return DFU_EP0_UNHANDLED;
1015+ break;
1016+ }
1017+
1018+out:
1019+ debug("new_state = %u, ret = %u\n", dev->dfu_state, ret);
1020+
1021+ switch (ret) {
1022+ case RET_ZLP:
1023+ //udc_ep0_send_zlp();
1024+ urb->actual_length = 0;
1025+ return DFU_EP0_ZLP;
1026+ break;
1027+ case RET_STALL:
1028+ //udc_ep0_send_stall();
1029+ return DFU_EP0_STALL;
1030+ break;
1031+ case RET_NOTHING:
1032+ break;
1033+ }
1034+
1035+ return DFU_EP0_DATA;
1036+}
1037+
1038+void str2wide (char *str, u16 * wide);
1039+static struct usb_string_descriptor *create_usbstring(char *string)
1040+{
1041+ struct usb_string_descriptor *strdesc;
1042+ int size = sizeof(*strdesc) + strlen(string)*2;
1043+
1044+ if (size > 255)
1045+ return NULL;
1046+
1047+ strdesc = malloc(size);
1048+ if (!strdesc)
1049+ return NULL;
1050+
1051+ strdesc->bLength = size;
1052+ strdesc->bDescriptorType = USB_DT_STRING;
1053+ str2wide(string, strdesc->wData);
1054+
1055+ return strdesc;
1056+}
1057+
1058+
1059+static void dfu_init_strings(struct usb_device_instance *dev)
1060+{
1061+ int i;
1062+ struct usb_string_descriptor *strdesc;
1063+
1064+ strdesc = create_usbstring(CONFIG_DFU_CFG_STR);
1065+ usb_strings[DFU_STR_CONFIG] = strdesc;
1066+
1067+ for (i = 0; i < DFU_NUM_ALTERNATES; i++) {
1068+ if (i == 0) {
1069+ strdesc = create_usbstring(CONFIG_DFU_ALT0_STR);
1070+ } else {
1071+ struct part_info *part = get_partition_nand(i-1);
1072+
1073+ if (part)
1074+ strdesc = create_usbstring(part->name);
1075+ else
1076+ strdesc =
1077+ create_usbstring("undefined partition");
1078+ }
1079+ if (!strdesc)
1080+ continue;
1081+ usb_strings[STR_COUNT+i+1] = strdesc;
1082+ }
1083+}
1084+
1085+int dfu_init_instance(struct usb_device_instance *dev)
1086+{
1087+ dev->dfu_dev_desc = &dfu_dev_descriptor;
1088+ dev->dfu_cfg_desc = &dfu_cfg_descriptor;
1089+ dev->dfu_state = DFU_STATE_appIDLE;
1090+ dev->dfu_status = DFU_STATUS_OK;
1091+
1092+ if (system_dfu_state)
1093+ printf("SURPRISE: system_dfu_state is already set\n");
1094+ system_dfu_state = &dev->dfu_state;
1095+
1096+ dfu_init_strings(dev);
1097+
1098+ return 0;
1099+}
1100+
1101+static int stdout_switched;
1102+
1103+/* event handler for usb device state events */
1104+void dfu_event(struct usb_device_instance *device,
1105+ usb_device_event_t event, int data)
1106+{
1107+ char *out;
1108+
1109+ switch (event) {
1110+ case DEVICE_RESET:
1111+ switch (device->dfu_state) {
1112+ case DFU_STATE_appDETACH:
1113+ device->dfu_state = DFU_STATE_dfuIDLE;
1114+ out = getenv("stdout");
1115+ if (out && !strcmp(out, "usbtty")) {
1116+ setenv("stdout", "vga");
1117+ setenv("stderr", "vga");
1118+ stdout_switched = 1;
1119+ }
1120+ printf("DFU: Switching to DFU Mode\n");
1121+ break;
1122+ case DFU_STATE_dfuMANIFEST_WAIT_RST:
1123+ device->dfu_state = DFU_STATE_appIDLE;
1124+ printf("DFU: Switching back to Runtime mode\n");
1125+ if (stdout_switched) {
1126+ setenv("stdout", "usbtty");
1127+ setenv("stderr", "usbtty");
1128+ stdout_switched = 0;
1129+ }
1130+ break;
1131+ default:
1132+ break;
1133+ }
1134+ break;
1135+ case DEVICE_CONFIGURED:
1136+ case DEVICE_DE_CONFIGURED:
1137+ debug("SET_CONFIGURATION(%u) ", device->configuration);
1138+ /* fallthrough */
1139+ case DEVICE_SET_INTERFACE:
1140+ debug("SET_INTERFACE(%u,%u) old_state = %u ",
1141+ device->interface, device->alternate,
1142+ device->dfu_state);
1143+ switch (device->dfu_state) {
1144+ case DFU_STATE_appIDLE:
1145+ case DFU_STATE_appDETACH:
1146+ case DFU_STATE_dfuIDLE:
1147+ case DFU_STATE_dfuMANIFEST_WAIT_RST:
1148+ /* do nothing, we're fine */
1149+ break;
1150+ case DFU_STATE_dfuDNLOAD_SYNC:
1151+ case DFU_STATE_dfuDNBUSY:
1152+ case DFU_STATE_dfuDNLOAD_IDLE:
1153+ case DFU_STATE_dfuMANIFEST:
1154+ device->dfu_state = DFU_STATE_dfuERROR;
1155+ device->dfu_status = DFU_STATUS_errNOTDONE;
1156+ /* FIXME: free malloc()ed buffer! */
1157+ break;
1158+ case DFU_STATE_dfuMANIFEST_SYNC:
1159+ case DFU_STATE_dfuUPLOAD_IDLE:
1160+ case DFU_STATE_dfuERROR:
1161+ device->dfu_state = DFU_STATE_dfuERROR;
1162+ device->dfu_status = DFU_STATUS_errUNKNOWN;
1163+ break;
1164+ }
1165+ debug("new_state = %u\n", device->dfu_state);
1166+ break;
1167+ default:
1168+ break;
1169+ }
1170+}
1171+#endif /* CONFIG_USBD_DFU */
1172Index: u-boot/drivers/Makefile
1173===================================================================
1174--- u-boot.orig/drivers/Makefile
1175+++ u-boot/drivers/Makefile
1176@@ -47,7 +47,7 @@
1177 status_led.o sym53c8xx.o systemace.o ahci.o \
1178 ti_pci1410a.o tigon3.o tsec.o \
1179 tsi108_eth.o tsi108_i2c.o tsi108_pci.o \
1180- usbdcore.o usbdcore_ep0.o usbdcore_omap1510.o usbdcore_s3c2410.o usbtty.o \
1181+ usbdcore.o usbdfu.o usbdcore_ep0.o usbdcore_omap1510.o usbdcore_s3c2410.o usbtty.o \
1182 videomodes.o w83c553f.o \
1183 ks8695eth.o \
1184 pcf50606.o \
1185Index: u-boot/drivers/usbdcore.c
1186===================================================================
1187--- u-boot.orig/drivers/usbdcore.c
1188+++ u-boot/drivers/usbdcore.c
1189@@ -31,6 +31,7 @@
1190
1191 #include <malloc.h>
1192 #include "usbdcore.h"
1193+#include <usb_dfu.h>
1194
1195 #define MAX_INTERFACES 2
1196
1197@@ -212,6 +213,10 @@
1198 */
1199 struct usb_device_descriptor *usbd_device_device_descriptor (struct usb_device_instance *device, int port)
1200 {
1201+#ifdef CONFIG_USBD_DFU
1202+ if (device->dfu_state != DFU_STATE_appIDLE)
1203+ return device->dfu_dev_desc;
1204+#endif
1205 return (device->device_descriptor);
1206 }
1207
1208@@ -232,6 +237,10 @@
1209 if (!(configuration_instance = usbd_device_configuration_instance (device, port, configuration))) {
1210 return NULL;
1211 }
1212+#ifdef CONFIG_USBD_DFU
1213+ if (device->dfu_state != DFU_STATE_appIDLE)
1214+ return (&device->dfu_cfg_desc->ucfg);
1215+#endif
1216 return (configuration_instance->configuration_descriptor);
1217 }
1218
1219@@ -253,6 +262,13 @@
1220 if (!(interface_instance = usbd_device_interface_instance (device, port, configuration, interface))) {
1221 return NULL;
1222 }
1223+#ifdef CONFIG_USBD_DFU
1224+ if (device->dfu_state != DFU_STATE_appIDLE) {
1225+ if (alternate < 0 || alternate >= DFU_NUM_ALTERNATES)
1226+ return NULL;
1227+ return &device->dfu_cfg_desc->uif[alternate];
1228+ }
1229+#endif
1230 if ((alternate < 0) || (alternate >= interface_instance->alternates)) {
1231 return NULL;
1232 }
1233@@ -681,4 +697,7 @@
1234 /* usbdbg("calling device->event"); */
1235 device->event(device, event, data);
1236 }
1237+#ifdef CONFIG_USBD_DFU
1238+ dfu_event(device, event, data);
1239+#endif
1240 }
1241Index: u-boot/drivers/usbtty.c
1242===================================================================
1243--- u-boot.orig/drivers/usbtty.c
1244+++ u-boot/drivers/usbtty.c
1245@@ -31,6 +31,8 @@
1246 #include "usbtty.h"
1247 #include "usb_cdc_acm.h"
1248 #include "usbdescriptors.h"
1249+#include <usb_dfu_descriptors.h>
1250+#include <usb_dfu.h>
1251 #include <config.h> /* If defined, override Linux identifiers with
1252 * vendor specific ones */
1253
1254@@ -118,7 +120,7 @@
1255 static unsigned short rx_endpoint = 0;
1256 static unsigned short tx_endpoint = 0;
1257 static unsigned short interface_count = 0;
1258-static struct usb_string_descriptor *usbtty_string_table[STR_COUNT];
1259+static struct usb_string_descriptor *usbtty_string_table[NUM_STRINGS];
1260
1261 /* USB Descriptor Strings */
1262 static u8 wstrLang[4] = {4,USB_DT_STRING,0x9,0x4};
1263@@ -169,6 +171,10 @@
1264 struct usb_interface_descriptor data_class_interface;
1265 struct usb_endpoint_descriptor
1266 data_endpoints[NUM_ENDPOINTS-1] __attribute__((packed));
1267+#ifdef CONFIG_USBD_DFU
1268+ struct usb_interface_descriptor uif_dfu;
1269+ struct usb_dfu_func_descriptor func_dfu;
1270+#endif
1271 } __attribute__((packed));
1272
1273 static struct acm_config_desc acm_configuration_descriptors[NUM_CONFIGS] = {
1274@@ -179,7 +185,11 @@
1275 .bDescriptorType = USB_DT_CONFIG,
1276 .wTotalLength =
1277 cpu_to_le16(sizeof(struct acm_config_desc)),
1278+#ifdef CONFIG_USBD_DFU
1279+ .bNumInterfaces = NUM_ACM_INTERFACES +1,
1280+#else
1281 .bNumInterfaces = NUM_ACM_INTERFACES,
1282+#endif
1283 .bConfigurationValue = 1,
1284 .iConfiguration = STR_CONFIG,
1285 .bmAttributes =
1286@@ -278,6 +288,11 @@
1287 .bInterval = 0xFF,
1288 },
1289 },
1290+#ifdef CONFIG_USBD_DFU
1291+ /* Interface 3 */
1292+ .uif_dfu = DFU_RT_IF_DESC,
1293+ .func_dfu = DFU_FUNC_DESC,
1294+#endif
1295 },
1296 };
1297
1298@@ -390,7 +405,7 @@
1299 void usbtty_poll (void);
1300
1301 /* utility function for converting char* to wide string used by USB */
1302-static void str2wide (char *str, u16 * wide)
1303+void str2wide (char *str, u16 * wide)
1304 {
1305 int i;
1306 for (i = 0; i < strlen (str) && str[i]; i++){
1307@@ -652,6 +667,9 @@
1308 device_instance->bus = bus_instance;
1309 device_instance->configurations = NUM_CONFIGS;
1310 device_instance->configuration_instance_array = config_instance;
1311+#ifdef CONFIG_USBD_DFU
1312+ dfu_init_instance(device_instance);
1313+#endif
1314
1315 /* initialize bus instance */
1316 memset (bus_instance, 0, sizeof (struct usb_bus_instance));
1317Index: u-boot/include/configs/neo1973_gta01.h
1318===================================================================
1319--- u-boot.orig/include/configs/neo1973_gta01.h
1320+++ u-boot/include/configs/neo1973_gta01.h
1321@@ -167,7 +167,7 @@
1322 */
1323 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
1324 #ifdef CONFIG_USE_IRQ
1325-#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
1326+#define CONFIG_STACKSIZE_IRQ (8*1024) /* IRQ stack */
1327 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
1328 #endif
1329
1330@@ -184,6 +184,10 @@
1331 #define CONFIG_USBD_MANUFACTURER "OpenMoko, Inc"
1332 #define CONFIG_USBD_PRODUCT_NAME "Neo1973 Bootloader " U_BOOT_VERSION
1333 #define CONFIG_EXTRA_ENV_SETTINGS "usbtty=cdc_acm\0"
1334+#define CONFIG_USBD_DFU 1
1335+#define CONFIG_USBD_DFU_XFER_SIZE 4096 /* 0x4000 */
1336+#define CONFIG_USBD_DFU_INTERFACE 2
1337+
1338
1339 /*-----------------------------------------------------------------------
1340 * Physical Memory Map
1341Index: u-boot/include/usb_dfu.h
1342===================================================================
1343--- /dev/null
1344+++ u-boot/include/usb_dfu.h
1345@@ -0,0 +1,99 @@
1346+#ifndef _DFU_H
1347+#define _DFU_H
1348+
1349+/* USB Device Firmware Update Implementation for u-boot
1350+ * (C) 2007 by OpenMoko, Inc.
1351+ * Author: Harald Welte <laforge@openmoko.org>
1352+ *
1353+ * based on: USB Device Firmware Update Implementation for OpenPCD
1354+ * (C) 2006 by Harald Welte <hwelte@hmw-consulting.de>
1355+ *
1356+ * This ought to be compliant to the USB DFU Spec 1.0 as available from
1357+ * http://www.usb.org/developers/devclass_docs/usbdfu10.pdf
1358+ *
1359+ * This program is free software; you can redistribute it and/or modify
1360+ * it under the terms of the GNU General Public License as published by
1361+ * the Free Software Foundation; either version 2 of the License, or
1362+ * (at your option) any later version.
1363+ *
1364+ * This program is distributed in the hope that it will be useful,
1365+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1366+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1367+ * GNU General Public License for more details.
1368+ *
1369+ * You should have received a copy of the GNU General Public License
1370+ * along with this program; if not, write to the Free Software
1371+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
1372+ */
1373+
1374+#include <asm/types.h>
1375+#include <usbdescriptors.h>
1376+#include <usb_dfu_descriptors.h>
1377+#include <config.h>
1378+
1379+/* USB DFU functional descriptor */
1380+#define DFU_FUNC_DESC { \
1381+ .bLength = USB_DT_DFU_SIZE, \
1382+ .bDescriptorType = USB_DT_DFU, \
1383+ .bmAttributes = USB_DFU_CAN_UPLOAD | USB_DFU_CAN_DOWNLOAD | USB_DFU_MANIFEST_TOL, \
1384+ .wDetachTimeOut = 0xff00, \
1385+ .wTransferSize = CONFIG_USBD_DFU_XFER_SIZE, \
1386+ .bcdDFUVersion = 0x0100, \
1387+}
1388+
1389+/* USB Interface descriptor in Runtime mode */
1390+#define DFU_RT_IF_DESC { \
1391+ .bLength = USB_DT_INTERFACE_SIZE, \
1392+ .bDescriptorType = USB_DT_INTERFACE, \
1393+ .bInterfaceNumber = CONFIG_USBD_DFU_INTERFACE, \
1394+ .bAlternateSetting = 0x00, \
1395+ .bNumEndpoints = 0x00, \
1396+ .bInterfaceClass = 0xfe, \
1397+ .bInterfaceSubClass = 0x01, \
1398+ .bInterfaceProtocol = 0x01, \
1399+ .iInterface = DFU_STR_CONFIG, \
1400+}
1401+
1402+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
1403+
1404+#define DFU_NUM_ALTERNATES 6
1405+
1406+#define DFU_STR_MANUFACTURER STR_MANUFACTURER
1407+#define DFU_STR_PRODUCT STR_PRODUCT
1408+#define DFU_STR_SERIAL STR_SERIAL
1409+#define DFU_STR_CONFIG (STR_COUNT)
1410+#define DFU_STR_ALT0 (STR_COUNT+1)
1411+#define DFU_STR_ALT1 (STR_COUNT+2)
1412+#define DFU_STR_ALT2 (STR_COUNT+3)
1413+#define DFU_STR_ALT3 (STR_COUNT+4)
1414+#define DFU_STR_ALT4 (STR_COUNT+5)
1415+#define DFU_STR_ALT5 (STR_COUNT+6)
1416+#define DFU_STR_COUNT (STR_COUNT+7)
1417+
1418+#define DFU_NUM_STRINGS (STR_COUNT+8)
1419+
1420+#define CONFIG_DFU_CFG_STR "USB Device Firmware Upgrade"
1421+#define CONFIG_DFU_ALT0_STR "RAM 0x32000000"
1422+
1423+struct _dfu_desc {
1424+ struct usb_configuration_descriptor ucfg;
1425+ struct usb_interface_descriptor uif[DFU_NUM_ALTERNATES];
1426+ struct usb_dfu_func_descriptor func_dfu;
1427+};
1428+
1429+int dfu_init_instance(struct usb_device_instance *dev);
1430+
1431+#define DFU_EP0_NONE 0
1432+#define DFU_EP0_UNHANDLED 1
1433+#define DFU_EP0_STALL 2
1434+#define DFU_EP0_ZLP 3
1435+#define DFU_EP0_DATA 4
1436+
1437+extern volatile enum dfu_state *system_dfu_state; /* for 3rd parties */
1438+
1439+int dfu_ep0_handler(struct urb *urb);
1440+
1441+void dfu_event(struct usb_device_instance *device,
1442+ usb_device_event_t event, int data);
1443+
1444+#endif /* _DFU_H */
1445Index: u-boot/include/usb_dfu_descriptors.h
1446===================================================================
1447--- /dev/null
1448+++ u-boot/include/usb_dfu_descriptors.h
1449@@ -0,0 +1,94 @@
1450+#ifndef _USB_DFU_H
1451+#define _USB_DFU_H
1452+/* USB Device Firmware Update Implementation for OpenPCD
1453+ * (C) 2006 by Harald Welte <hwelte@hmw-consulting.de>
1454+ *
1455+ * Protocol definitions for USB DFU
1456+ *
1457+ * This ought to be compliant to the USB DFU Spec 1.0 as available from
1458+ * http://www.usb.org/developers/devclass_docs/usbdfu10.pdf
1459+ *
1460+ * This program is free software; you can redistribute it and/or modify
1461+ * it under the terms of the GNU General Public License as published by
1462+ * the Free Software Foundation; either version 2 of the License, or
1463+ * (at your option) any later version.
1464+ *
1465+ * This program is distributed in the hope that it will be useful,
1466+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1467+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1468+ * GNU General Public License for more details.
1469+ *
1470+ * You should have received a copy of the GNU General Public License
1471+ * along with this program; if not, write to the Free Software
1472+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
1473+ */
1474+
1475+#include <linux/types.h>
1476+
1477+#define USB_DT_DFU 0x21
1478+
1479+struct usb_dfu_func_descriptor {
1480+ u_int8_t bLength;
1481+ u_int8_t bDescriptorType;
1482+ u_int8_t bmAttributes;
1483+#define USB_DFU_CAN_DOWNLOAD (1 << 0)
1484+#define USB_DFU_CAN_UPLOAD (1 << 1)
1485+#define USB_DFU_MANIFEST_TOL (1 << 2)
1486+#define USB_DFU_WILL_DETACH (1 << 3)
1487+ u_int16_t wDetachTimeOut;
1488+ u_int16_t wTransferSize;
1489+ u_int16_t bcdDFUVersion;
1490+} __attribute__ ((packed));
1491+
1492+#define USB_DT_DFU_SIZE 9
1493+
1494+#define USB_TYPE_DFU (USB_TYPE_CLASS|USB_RECIP_INTERFACE)
1495+
1496+/* DFU class-specific requests (Section 3, DFU Rev 1.1) */
1497+#define USB_REQ_DFU_DETACH 0x00
1498+#define USB_REQ_DFU_DNLOAD 0x01
1499+#define USB_REQ_DFU_UPLOAD 0x02
1500+#define USB_REQ_DFU_GETSTATUS 0x03
1501+#define USB_REQ_DFU_CLRSTATUS 0x04
1502+#define USB_REQ_DFU_GETSTATE 0x05
1503+#define USB_REQ_DFU_ABORT 0x06
1504+
1505+struct dfu_status {
1506+ u_int8_t bStatus;
1507+ u_int8_t bwPollTimeout[3];
1508+ u_int8_t bState;
1509+ u_int8_t iString;
1510+} __attribute__((packed));
1511+
1512+#define DFU_STATUS_OK 0x00
1513+#define DFU_STATUS_errTARGET 0x01
1514+#define DFU_STATUS_errFILE 0x02
1515+#define DFU_STATUS_errWRITE 0x03
1516+#define DFU_STATUS_errERASE 0x04
1517+#define DFU_STATUS_errCHECK_ERASED 0x05
1518+#define DFU_STATUS_errPROG 0x06
1519+#define DFU_STATUS_errVERIFY 0x07
1520+#define DFU_STATUS_errADDRESS 0x08
1521+#define DFU_STATUS_errNOTDONE 0x09
1522+#define DFU_STATUS_errFIRMWARE 0x0a
1523+#define DFU_STATUS_errVENDOR 0x0b
1524+#define DFU_STATUS_errUSBR 0x0c
1525+#define DFU_STATUS_errPOR 0x0d
1526+#define DFU_STATUS_errUNKNOWN 0x0e
1527+#define DFU_STATUS_errSTALLEDPKT 0x0f
1528+
1529+enum dfu_state {
1530+ DFU_STATE_appIDLE = 0,
1531+ DFU_STATE_appDETACH = 1,
1532+ DFU_STATE_dfuIDLE = 2,
1533+ DFU_STATE_dfuDNLOAD_SYNC = 3,
1534+ DFU_STATE_dfuDNBUSY = 4,
1535+ DFU_STATE_dfuDNLOAD_IDLE = 5,
1536+ DFU_STATE_dfuMANIFEST_SYNC = 6,
1537+ DFU_STATE_dfuMANIFEST = 7,
1538+ DFU_STATE_dfuMANIFEST_WAIT_RST = 8,
1539+ DFU_STATE_dfuUPLOAD_IDLE = 9,
1540+ DFU_STATE_dfuERROR = 10,
1541+};
1542+
1543+#endif /* _USB_DFU_H */
1544Index: u-boot/include/usbdcore.h
1545===================================================================
1546--- u-boot.orig/include/usbdcore.h
1547+++ u-boot/include/usbdcore.h
1548@@ -33,6 +33,7 @@
1549
1550 #include <common.h>
1551 #include "usbdescriptors.h"
1552+#include <usb_dfu_descriptors.h>
1553
1554
1555 #define MAX_URBS_QUEUED 5
1556@@ -475,7 +476,11 @@
1557 * function driver to inform it that data has arrived.
1558 */
1559
1560+#ifdef CONFIG_USBD_DFU
1561+#define URB_BUF_SIZE (128+CONFIG_USBD_DFU_XFER_SIZE)
1562+#else
1563 #define URB_BUF_SIZE 128 /* in linux we'd malloc this, but in u-boot we prefer static data */
1564+#endif
1565 struct urb {
1566
1567 struct usb_endpoint_instance *endpoint;
1568@@ -603,6 +608,12 @@
1569 unsigned long usbd_rxtx_timestamp;
1570 unsigned long usbd_last_rxtx_timestamp;
1571
1572+#ifdef CONFIG_USBD_DFU
1573+ const struct usb_device_descriptor *dfu_dev_desc;
1574+ const struct _dfu_desc *dfu_cfg_desc;
1575+ enum dfu_state dfu_state;
1576+ u_int8_t dfu_status;
1577+#endif
1578 };
1579
1580 /* Bus Interface configuration structure
1581@@ -632,6 +643,8 @@
1582 extern char *usbd_device_requests[];
1583 extern char *usbd_device_descriptors[];
1584
1585+extern struct usb_string_descriptor **usb_strings;
1586+
1587 void urb_link_init (urb_link * ul);
1588 void urb_detach (struct urb *urb);
1589 urb_link *first_urb_link (urb_link * hd);
1590Index: u-boot/drivers/usbtty.h
1591===================================================================
1592--- u-boot.orig/drivers/usbtty.h
1593+++ u-boot/drivers/usbtty.h
1594@@ -71,4 +71,10 @@
1595 #define STR_CTRL_INTERFACE 0x06
1596 #define STR_COUNT 0x07
1597
1598+#ifdef CONFIG_USBD_DFU
1599+#define NUM_STRINGS DFU_STR_COUNT
1600+#else
1601+#define NUM_STRINGS STR_COUNT
1602+#endif
1603+
1604 #endif
1605Index: u-boot/include/configs/qt2410.h
1606===================================================================
1607--- u-boot.orig/include/configs/qt2410.h
1608+++ u-boot/include/configs/qt2410.h
1609@@ -199,7 +199,8 @@
1610 #define CONFIG_USBD_PRODUCT_NAME "QT2410 Bootloader " U_BOOT_VERSION
1611 #define CONFIG_EXTRA_ENV_SETTINGS "usbtty=cdc_acm\0"
1612 #define CONFIG_USBD_DFU 1
1613-#define CONFIG_USBD_DFU_XFER_SIZE 0x4000
1614+#define CONFIG_USBD_DFU_XFER_SIZE 4096
1615+#define CONFIG_USBD_DFU_INTERFACE 2
1616
1617 /*-----------------------------------------------------------------------
1618 * Physical Memory Map
1619Index: u-boot/tools/Makefile
1620===================================================================
1621--- u-boot.orig/tools/Makefile
1622+++ u-boot/tools/Makefile
1623@@ -21,10 +21,10 @@
1624 # MA 02111-1307 USA
1625 #
1626
1627-BIN_FILES = img2srec$(SFX) mkimage$(SFX) envcrc$(SFX) gen_eth_addr$(SFX) bmp_logo$(SFX)
1628+BIN_FILES = img2srec$(SFX) mkimage$(SFX) envcrc$(SFX) gen_eth_addr$(SFX) bmp_logo$(SFX) mkudfu$(SFX)
1629
1630 OBJ_LINKS = environment.o crc32.o
1631-OBJ_FILES = img2srec.o mkimage.o envcrc.o gen_eth_addr.o bmp_logo.o
1632+OBJ_FILES = img2srec.o mkimage.o envcrc.o gen_eth_addr.o bmp_logo.o mkudfu.o
1633
1634 ifeq ($(ARCH),mips)
1635 BIN_FILES += inca-swap-bytes$(SFX)
1636@@ -137,6 +137,10 @@
1637 $(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
1638 $(STRIP) $@
1639
1640+$(obj)mkudfu$(SFX): $(obj)mkudfu.o
1641+ $(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
1642+ $(STRIP) $@
1643+
1644 $(obj)ncb$(SFX): $(obj)ncb.o
1645 $(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
1646 $(STRIP) $@
1647Index: u-boot/tools/mkudfu.c
1648===================================================================
1649--- /dev/null
1650+++ u-boot/tools/mkudfu.c
1651@@ -0,0 +1,314 @@
1652+/*
1653+ * USB DFU file trailer tool
1654+ * (C) Copyright by OpenMoko, Inc.
1655+ * Author: Harald Welte <laforge@openmoko.org>
1656+ *
1657+ * based on mkimage.c, copyright information as follows:
1658+ *
1659+ * (C) Copyright 2000-2004
1660+ * DENX Software Engineering
1661+ * Wolfgang Denk, wd@denx.de
1662+ * All rights reserved.
1663+ *
1664+ * This program is free software; you can redistribute it and/or
1665+ * modify it under the terms of the GNU General Public License as
1666+ * published by the Free Software Foundation; either version 2 of
1667+ * the License, or (at your option) any later version.
1668+ *
1669+ * This program is distributed in the hope that it will be useful,
1670+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1671+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1672+ * GNU General Public License for more details.
1673+ *
1674+ * You should have received a copy of the GNU General Public License
1675+ * along with this program; if not, write to the Free Software
1676+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1677+ * MA 02111-1307 USA
1678+ */
1679+
1680+#include <errno.h>
1681+#include <fcntl.h>
1682+#include <stdio.h>
1683+#include <stdlib.h>
1684+#include <string.h>
1685+#ifndef __WIN32__
1686+#include <netinet/in.h> /* for host / network byte order conversions */
1687+#endif
1688+#include <sys/mman.h>
1689+#include <sys/stat.h>
1690+#include <time.h>
1691+#include <unistd.h>
1692+
1693+#if defined(__BEOS__) || defined(__NetBSD__) || defined(__APPLE__)
1694+#include <inttypes.h>
1695+#endif
1696+
1697+#ifdef __WIN32__
1698+typedef unsigned int __u32;
1699+
1700+#define SWAP_LONG(x) \
1701+ ((__u32)( \
1702+ (((__u32)(x) & (__u32)0x000000ffUL) << 24) | \
1703+ (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \
1704+ (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \
1705+ (((__u32)(x) & (__u32)0xff000000UL) >> 24) ))
1706+typedef unsigned char uint8_t;
1707+typedef unsigned short uint16_t;
1708+typedef unsigned int uint32_t;
1709+
1710+#define ntohl(a) SWAP_LONG(a)
1711+#define htonl(a) SWAP_LONG(a)
1712+#endif /* __WIN32__ */
1713+
1714+#ifndef O_BINARY /* should be define'd on __WIN32__ */
1715+#define O_BINARY 0
1716+#endif
1717+
1718+#include <usb_dfu_trailer.h>
1719+
1720+extern int errno;
1721+
1722+#ifndef MAP_FAILED
1723+#define MAP_FAILED (-1)
1724+#endif
1725+
1726+static char *cmdname;
1727+
1728+static char *datafile;
1729+static char *imagefile;
1730+
1731+
1732+static void usage()
1733+{
1734+ fprintf (stderr, "%s - create / display u-boot DFU trailer\n", cmdname);
1735+ fprintf (stderr, "Usage: %s -l image\n"
1736+ " -l ==> list image header information\n"
1737+ " %s -v VID -p PID -r REV -d data_file image\n",
1738+ cmdname, cmdname);
1739+ fprintf (stderr, " -v ==> set vendor ID to 'VID'\n"
1740+ " -p ==> set product ID system to 'PID'\n"
1741+ " -r ==> set hardware revision to 'REV'\n"
1742+ " -d ==> use 'data_file' as input file\n"
1743+ );
1744+ exit (EXIT_FAILURE);
1745+}
1746+
1747+static void print_trailer(struct uboot_dfu_trailer *trailer)
1748+{
1749+ printf("===> DFU Trailer information:\n");
1750+ printf("Trailer Vers.: %d\n", trailer->version);
1751+ printf("Trailer Length: %d\n", trailer->length);
1752+ printf("VendorID: 0x%04x\n", trailer->vendor);
1753+ printf("ProductID: 0x%04x\n", trailer->product);
1754+ printf("HW Revision: 0x%04x\n", trailer->revision);
1755+}
1756+
1757+static void copy_file (int ifd, const char *datafile, int pad)
1758+{
1759+ int dfd;
1760+ struct stat sbuf;
1761+ unsigned char *ptr;
1762+ int tail;
1763+ int zero = 0;
1764+ int offset = 0;
1765+ int size;
1766+
1767+ if ((dfd = open(datafile, O_RDONLY|O_BINARY)) < 0) {
1768+ fprintf (stderr, "%s: Can't open %s: %s\n",
1769+ cmdname, datafile, strerror(errno));
1770+ exit (EXIT_FAILURE);
1771+ }
1772+
1773+ if (fstat(dfd, &sbuf) < 0) {
1774+ fprintf (stderr, "%s: Can't stat %s: %s\n",
1775+ cmdname, datafile, strerror(errno));
1776+ exit (EXIT_FAILURE);
1777+ }
1778+
1779+ ptr = (unsigned char *)mmap(0, sbuf.st_size,
1780+ PROT_READ, MAP_SHARED, dfd, 0);
1781+ if (ptr == (unsigned char *)MAP_FAILED) {
1782+ fprintf (stderr, "%s: Can't read %s: %s\n",
1783+ cmdname, datafile, strerror(errno));
1784+ exit (EXIT_FAILURE);
1785+ }
1786+
1787+ size = sbuf.st_size - offset;
1788+ if (write(ifd, ptr + offset, size) != size) {
1789+ fprintf (stderr, "%s: Write error on %s: %s\n",
1790+ cmdname, imagefile, strerror(errno));
1791+ exit (EXIT_FAILURE);
1792+ }
1793+
1794+ if (pad && ((tail = size % 4) != 0)) {
1795+
1796+ if (write(ifd, (char *)&zero, 4-tail) != 4-tail) {
1797+ fprintf (stderr, "%s: Write error on %s: %s\n",
1798+ cmdname, imagefile, strerror(errno));
1799+ exit (EXIT_FAILURE);
1800+ }
1801+ }
1802+
1803+ (void) munmap((void *)ptr, sbuf.st_size);
1804+ (void) close (dfd);
1805+}
1806+
1807+
1808+int main(int argc, char **argv)
1809+{
1810+ int ifd;
1811+ int lflag = 0;
1812+ struct stat sbuf;
1813+ u_int16_t opt_vendor, opt_product, opt_revision;
1814+ struct uboot_dfu_trailer _hdr, _mirror, *hdr = &_hdr;
1815+
1816+ opt_vendor = opt_product = opt_revision = 0;
1817+
1818+ cmdname = *argv;
1819+
1820+ while (--argc > 0 && **++argv == '-') {
1821+ while (*++*argv) {
1822+ switch (**argv) {
1823+ case 'l':
1824+ lflag = 1;
1825+ break;
1826+ case 'v':
1827+ if (--argc <= 0)
1828+ usage ();
1829+ opt_vendor = strtoul(*++argv, NULL, 16);
1830+ goto NXTARG;
1831+ case 'p':
1832+ if (--argc <= 0)
1833+ usage ();
1834+ opt_product = strtoul(*++argv, NULL, 16);
1835+ goto NXTARG;
1836+ case 'r':
1837+ if (--argc <= 0)
1838+ usage ();
1839+ opt_revision = strtoul(*++argv, NULL, 16);
1840+ goto NXTARG;
1841+ case 'd':
1842+ if (--argc <= 0)
1843+ usage ();
1844+ datafile = *++argv;
1845+ goto NXTARG;
1846+ case 'h':
1847+ usage();
1848+ break;
1849+ default:
1850+ usage();
1851+ }
1852+ }
1853+NXTARG: ;
1854+ }
1855+
1856+ if (argc != 1)
1857+ usage();
1858+
1859+ imagefile = *argv;
1860+
1861+ if (lflag)
1862+ ifd = open(imagefile, O_RDONLY|O_BINARY);
1863+ else
1864+ ifd = open(imagefile, O_RDWR|O_CREAT|O_TRUNC|O_BINARY, 0666);
1865+
1866+ if (ifd < 0) {
1867+ fprintf (stderr, "%s: Can't open %s: %s\n",
1868+ cmdname, imagefile, strerror(errno));
1869+ exit (EXIT_FAILURE);
1870+ }
1871+
1872+ if (lflag) {
1873+ unsigned char *ptr;
1874+ /* list header information of existing image */
1875+ if (fstat(ifd, &sbuf) < 0) {
1876+ fprintf (stderr, "%s: Can't stat %s: %s\n",
1877+ cmdname, imagefile, strerror(errno));
1878+ exit (EXIT_FAILURE);
1879+ }
1880+
1881+ if ((unsigned)sbuf.st_size < sizeof(struct uboot_dfu_trailer)) {
1882+ fprintf (stderr,
1883+ "%s: Bad size: \"%s\" is no valid image\n",
1884+ cmdname, imagefile);
1885+ exit (EXIT_FAILURE);
1886+ }
1887+
1888+ ptr = (unsigned char *)mmap(0, sbuf.st_size,
1889+ PROT_READ, MAP_SHARED, ifd, 0);
1890+ if ((caddr_t)ptr == (caddr_t)-1) {
1891+ fprintf (stderr, "%s: Can't read %s: %s\n",
1892+ cmdname, imagefile, strerror(errno));
1893+ exit (EXIT_FAILURE);
1894+ }
1895+
1896+ dfu_trailer_mirror(hdr, ptr+sbuf.st_size);
1897+
1898+ if (hdr->magic != UBOOT_DFU_TRAILER_MAGIC) {
1899+ fprintf (stderr,
1900+ "%s: Bad Magic Number: \"%s\" is no valid image\n",
1901+ cmdname, imagefile);
1902+ exit (EXIT_FAILURE);
1903+ }
1904+
1905+ /* for multi-file images we need the data part, too */
1906+ print_trailer(hdr);
1907+
1908+ (void) munmap((void *)ptr, sbuf.st_size);
1909+ (void) close (ifd);
1910+
1911+ exit (EXIT_SUCCESS);
1912+ }
1913+
1914+ /* if we're not listing: */
1915+
1916+ copy_file (ifd, datafile, 0);
1917+
1918+ memset (hdr, 0, sizeof(struct uboot_dfu_trailer));
1919+
1920+ /* Build new header */
1921+ hdr->version = UBOOT_DFU_TRAILER_V1;
1922+ hdr->magic = UBOOT_DFU_TRAILER_MAGIC;
1923+ hdr->length = sizeof(struct uboot_dfu_trailer);
1924+ hdr->vendor = opt_vendor;
1925+ hdr->product = opt_product;
1926+ hdr->revision = opt_revision;
1927+
1928+ print_trailer(hdr);
1929+ dfu_trailer_mirror(&_mirror, (unsigned char *)hdr+sizeof(*hdr));
1930+
1931+ if (write(ifd, &_mirror, sizeof(struct uboot_dfu_trailer))
1932+ != sizeof(struct uboot_dfu_trailer)) {
1933+ fprintf (stderr, "%s: Write error on %s: %s\n",
1934+ cmdname, imagefile, strerror(errno));
1935+ exit (EXIT_FAILURE);
1936+ }
1937+
1938+ /* We're a bit of paranoid */
1939+#if defined(_POSIX_SYNCHRONIZED_IO) && !defined(__sun__) && !defined(__FreeBSD__)
1940+ (void) fdatasync (ifd);
1941+#else
1942+ (void) fsync (ifd);
1943+#endif
1944+
1945+ if (fstat(ifd, &sbuf) < 0) {
1946+ fprintf (stderr, "%s: Can't stat %s: %s\n",
1947+ cmdname, imagefile, strerror(errno));
1948+ exit (EXIT_FAILURE);
1949+ }
1950+
1951+ /* We're a bit of paranoid */
1952+#if defined(_POSIX_SYNCHRONIZED_IO) && !defined(__sun__) && !defined(__FreeBSD__)
1953+ (void) fdatasync (ifd);
1954+#else
1955+ (void) fsync (ifd);
1956+#endif
1957+
1958+ if (close(ifd)) {
1959+ fprintf (stderr, "%s: Write error on %s: %s\n",
1960+ cmdname, imagefile, strerror(errno));
1961+ exit (EXIT_FAILURE);
1962+ }
1963+
1964+ exit (EXIT_SUCCESS);
1965+}
1966Index: u-boot/include/usb_dfu_trailer.h
1967===================================================================
1968--- /dev/null
1969+++ u-boot/include/usb_dfu_trailer.h
1970@@ -0,0 +1,31 @@
1971+#ifndef _USB_DFU_TRAILER_H
1972+#define _USB_DFU_TRAILER_H
1973+
1974+/* trailer handling for DFU files */
1975+
1976+#define UBOOT_DFU_TRAILER_V1 1
1977+#define UBOOT_DFU_TRAILER_MAGIC 0x19731978
1978+struct uboot_dfu_trailer {
1979+ u_int32_t magic;
1980+ u_int16_t version;
1981+ u_int16_t length;
1982+ u_int16_t vendor;
1983+ u_int16_t product;
1984+ u_int32_t revision;
1985+} __attribute__((packed));
1986+
1987+/* we mirror the trailer because we want it to be longer in later versions
1988+ * while keeping backwards compatibility */
1989+static inline void dfu_trailer_mirror(struct uboot_dfu_trailer *trailer,
1990+ unsigned char *eof)
1991+{
1992+ int i;
1993+ int len = sizeof(struct uboot_dfu_trailer);
1994+ unsigned char *src = eof - len;
1995+ unsigned char *dst = (unsigned char *) trailer;
1996+
1997+ for (i = 0; i < len; i++)
1998+ dst[len-1-i] = src[i];
1999+}
2000+
2001+#endif /* _USB_DFU_TRAILER_H */
2002Index: u-boot/Makefile
2003===================================================================
2004--- u-boot.orig/Makefile
2005+++ u-boot/Makefile
2006@@ -261,6 +261,12 @@
2007 $(obj)u-boot.bin: $(obj)u-boot
2008 $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
2009
2010+$(obj)u-boot.udfu: $(obj)u-boot.bin
2011+ ./tools/mkudfu -v $(CONFIG_USB_DFU_VENDOR) \
2012+ -p $(CONFIG_USB_DFU_PRODUCT) \
2013+ -r $(CONFIG_USB_DFU_REVISION) \
2014+ -d $< $@
2015+
2016 $(obj)u-boot.img: $(obj)u-boot.bin
2017 ./tools/mkimage -A $(ARCH) -T firmware -C none \
2018 -a $(TEXT_BASE) -e 0 \
2019Index: u-boot/board/neo1973/gta01/split_by_variant.sh
2020===================================================================
2021--- u-boot.orig/board/neo1973/gta01/split_by_variant.sh
2022+++ u-boot/board/neo1973/gta01/split_by_variant.sh
2023@@ -15,37 +15,44 @@
2024 echo "$0:: No parameters - using GTA01Bv3 config"
2025 echo "#define CONFIG_ARCH_GTA01B_v3" > $CFGINC
2026 echo "GTA01_BIG_RAM=y" > $CFGTMP
2027+ echo "CONFIG_USB_DFU_REVISION=0x0230" > $CFGTMP
2028 else
2029 case "$1" in
2030 gta01v4_config)
2031 echo "#define CONFIG_ARCH_GTA01_v4" > $CFGINC
2032 echo "GTA01_BIG_RAM=n" > $CFGTMP
2033+ echo "CONFIG_USB_DFU_REVISION=0x0140" > $CFGTMP
2034 ;;
2035
2036 gta01v3_config)
2037 echo "#define CONFIG_ARCH_GTA01_v3" > $CFGINC
2038 echo "GTA01_BIG_RAM=n" > $CFGTMP
2039+ echo "CONFIG_USB_DFU_REVISION=0x0130" > $CFGTMP
2040 ;;
2041
2042 gta01bv2_config)
2043 echo "#define CONFIG_ARCH_GTA01B_v2" > $CFGINC
2044 echo "GTA01_BIG_RAM=y" > $CFGTMP
2045+ echo "CONFIG_USB_DFU_REVISION=0x0220" > $CFGTMP
2046 ;;
2047
2048 gta01bv3_config)
2049 echo "#define CONFIG_ARCH_GTA01B_v3" > $CFGINC
2050 echo "GTA01_BIG_RAM=y" > $CFGTMP
2051+ echo "CONFIG_USB_DFU_REVISION=0x0230" > $CFGTMP
2052 ;;
2053
2054 gta01bv4_config)
2055 echo "#define CONFIG_ARCH_GTA01B_v4" > $CFGINC
2056 echo "GTA01_BIG_RAM=y" > $CFGTMP
2057+ echo "CONFIG_USB_DFU_REVISION=0x0240" > $CFGTMP
2058 ;;
2059
2060 *)
2061 echo "$0:: Unrecognised config - using GTA01Bv4 config"
2062 echo "#define CONFIG_ARCH_GTA01B_v4" > $CFGINC
2063 echo "GTA01_BIG_RAM=y" > $CFGTMP
2064+ echo "CONFIG_USB_DFU_REVISION=0x0240" > $CFGTMP
2065 ;;
2066
2067 esac
2068Index: u-boot/board/neo1973/gta01/config.mk
2069===================================================================
2070--- u-boot.orig/board/neo1973/gta01/config.mk
2071+++ u-boot/board/neo1973/gta01/config.mk
2072@@ -24,6 +24,9 @@
2073 #
2074 # download area is 3200'0000 or 3300'0000
2075
2076+CONFIG_USB_DFU_VENDOR=0x1457
2077+CONFIG_USB_DFU_PRODUCT=0x5119
2078+
2079 sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
2080
2081 ifeq ($(GTA01_BIG_RAM),y)
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-gta02.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-gta02.patch
new file mode 100644
index 0000000000..ca54ebeff7
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-gta02.patch
@@ -0,0 +1,1560 @@
1Add support for new GTA02 version of Neo1973
2
3Index: u-boot/Makefile
4===================================================================
5--- u-boot.orig/Makefile
6+++ u-boot/Makefile
7@@ -2038,6 +2038,10 @@
8 sbc2410x_config: unconfig
9 @$(MKCONFIG) $(@:_config=) arm arm920t sbc2410x NULL s3c24x0
10
11+gta02_config \
12+gta02v1_config : unconfig
13+ @sh board/neo1973/gta02/split_by_variant.sh $@
14+
15 gta01_config \
16 gta01v3_config \
17 gta01bv2_config \
18Index: u-boot/board/neo1973/gta02/Makefile
19===================================================================
20--- /dev/null
21+++ u-boot/board/neo1973/gta02/Makefile
22@@ -0,0 +1,64 @@
23+#
24+# (C) Copyright 2000, 2001, 2002
25+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
26+#
27+# See file CREDITS for list of people who contributed to this
28+# project.
29+#
30+# This program is free software; you can redistribute it and/or
31+# modify it under the terms of the GNU General Public License as
32+# published by the Free Software Foundation; either version 2 of
33+# the License, or (at your option) any later version.
34+#
35+# This program is distributed in the hope that it will be useful,
36+# but WITHOUT ANY WARRANTY; without even the implied warranty of
37+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
38+# GNU General Public License for more details.
39+#
40+# You should have received a copy of the GNU General Public License
41+# along with this program; if not, write to the Free Software
42+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
43+# MA 02111-1307 USA
44+#
45+
46+include $(TOPDIR)/config.mk
47+
48+LIB = lib$(BOARD).a
49+
50+OBJS := gta02.o pcf50633.o ../common/cmd_neo1973.o ../common/jbt6k74.o ../common/udc.o ../common/bootmenu.o
51+SOBJS := ../common/lowlevel_init.o
52+
53+.PHONY: all
54+
55+all: $(LIB) lowevel_foo.bin
56+
57+$(LIB): $(OBJS) $(SOBJS)
58+ $(AR) crv $@ $(OBJS) $(SOBJS)
59+
60+lowlevel_foo.o: ../common/lowlevel_foo.S
61+ $(CC) -c -DTEXT_BASE=0x33F80000 -march=armv4 \
62+ -o lowlevel_foo.o ../common/lowlevel_foo.S
63+
64+lowlevel_foo: lowlevel_foo.o ../common/lowlevel_init.o ../common/lowlevel_foo.lds
65+ $(LD) -T ../common/lowlevel_foo.lds -Ttext 0x33f80000 -Bstatic \
66+ ../common/lowlevel_init.o lowlevel_foo.o -o lowlevel_foo
67+
68+lowevel_foo.bin: lowlevel_foo
69+ $(CROSS_COMPILE)objcopy --gap-fill=0xff -O binary \
70+ lowlevel_foo lowlevel_foo.bin
71+
72+
73+clean:
74+ rm -f $(SOBJS) $(OBJS) lowlevel_foo lowlevel_foo.o
75+
76+distclean: clean
77+ rm -f $(LIB) core *.bak .depend lowlevel_foo.bin
78+
79+#########################################################################
80+
81+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
82+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
83+
84+-include .depend
85+
86+#########################################################################
87Index: u-boot/board/neo1973/gta02/gta02.c
88===================================================================
89--- /dev/null
90+++ u-boot/board/neo1973/gta02/gta02.c
91@@ -0,0 +1,313 @@
92+/*
93+ * (C) 2006-2007 by OpenMoko, Inc.
94+ * Author: Harald Welte <laforge@openmoko.org>
95+ *
96+ * based on existing S3C2410 startup code in u-boot:
97+ *
98+ * (C) Copyright 2002
99+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
100+ * Marius Groeger <mgroeger@sysgo.de>
101+ *
102+ * (C) Copyright 2002
103+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
104+ *
105+ * See file CREDITS for list of people who contributed to this
106+ * project.
107+ *
108+ * This program is free software; you can redistribute it and/or
109+ * modify it under the terms of the GNU General Public License as
110+ * published by the Free Software Foundation; either version 2 of
111+ * the License, or (at your option) any later version.
112+ *
113+ * This program is distributed in the hope that it will be useful,
114+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
115+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
116+ * GNU General Public License for more details.
117+ *
118+ * You should have received a copy of the GNU General Public License
119+ * along with this program; if not, write to the Free Software
120+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
121+ * MA 02111-1307 USA
122+ */
123+
124+#include <common.h>
125+#include <s3c2440.h>
126+#include <i2c.h>
127+
128+#include "../common/neo1973.h"
129+#include "../common/jbt6k74.h"
130+
131+#include "pcf50633.h"
132+
133+DECLARE_GLOBAL_DATA_PTR;
134+
135+/* That many seconds the power key needs to be pressed to power up */
136+#define POWER_KEY_SECONDS 2
137+
138+#define M_MDIV 0x7f /* Fout = 405.00MHz */
139+#define M_PDIV 0x2
140+#define M_SDIV 0x1
141+
142+#define U_M_MDIV 0x38
143+#define U_M_PDIV 0x2
144+#define U_M_SDIV 0x2
145+
146+unsigned int neo1973_wakeup_cause;
147+extern int nobootdelay;
148+
149+static inline void delay (unsigned long loops)
150+{
151+ __asm__ volatile ("1:\n"
152+ "subs %0, %1, #1\n"
153+ "bne 1b":"=r" (loops):"0" (loops));
154+}
155+
156+/*
157+ * Miscellaneous platform dependent initialisations
158+ */
159+
160+int board_init (void)
161+{
162+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
163+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
164+
165+ /* to reduce PLL lock time, adjust the LOCKTIME register */
166+ clk_power->LOCKTIME = 0xFFFFFF;
167+
168+ /* configure MPLL */
169+ clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
170+
171+ /* some delay between MPLL and UPLL */
172+ delay (4000);
173+
174+ /* configure UPLL */
175+ clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
176+
177+ /* some delay between MPLL and UPLL */
178+ delay (8000);
179+
180+ /* set up the I/O ports */
181+#if defined(CONFIG_ARCH_GTA02_v1)
182+ gpio->GPACON = 0x007E1FFF;
183+ gpio->GPADAT |= (1 << 16); /* Set GPA16 to high (nNAND_WP) */
184+
185+ gpio->GPBCON = 0x00155555;
186+ gpio->GPBUP = 0x000007FF;
187+
188+ gpio->GPCCON = 0x55551155;
189+ gpio->GPCUP = 0x0000FFFF;
190+
191+ gpio->GPDCON = 0x55555555;
192+ gpio->GPDUP = 0x0000FFFF;
193+
194+ gpio->GPECON = 0xAAAAAAAA;
195+ gpio->GPEUP = 0x0000FFFF;
196+
197+ gpio->GPFCON = 0x0000AAAA;
198+ gpio->GPFUP = 0x000000FF;
199+
200+ gpio->GPGCON = 0x013DFDFA;
201+ gpio->GPGUP = 0x0000FFFF;
202+
203+ gpio->GPHCON = 0x0028AAAA;
204+ gpio->GPHUP = 0x000007FF;
205+
206+ gpio->GPJCON = 0x1545541;
207+#else
208+#error Please define GTA02 version
209+#endif
210+
211+ /* arch number of SMDK2410-Board */
212+ gd->bd->bi_arch_number = MACH_TYPE_NEO1973_GTA02;
213+
214+ /* adress of boot parameters */
215+ gd->bd->bi_boot_params = 0x30000100;
216+
217+ icache_enable();
218+ dcache_enable();
219+
220+ return 0;
221+}
222+
223+int board_late_init(void)
224+{
225+ extern unsigned char booted_from_nand;
226+ unsigned char tmp;
227+ char buf[32];
228+ int menu_vote = 0; /* <= 0: no, > 0: yes */
229+ int seconds = 0;
230+
231+ /* Initialize the Power Management Unit with a safe register set */
232+ pcf50633_init();
233+#if 0
234+ /* if there's no other reason, must be regular reset */
235+ neo1973_wakeup_cause = NEO1973_WAKEUP_RESET;
236+
237+ if (!booted_from_nand)
238+ goto woken_by_reset;
239+
240+ /* obtain wake-up reason, save INT1 in environment */
241+ tmp = pcf50606_reg_read(PCF50606_REG_INT1);
242+ sprintf(buf, "0x%02x", tmp);
243+ setenv("pcf50606_int1", buf);
244+
245+ if (tmp & PCF50606_INT1_ALARM) {
246+ /* we've been woken up by RTC alarm, boot */
247+ neo1973_wakeup_cause = NEO1973_WAKEUP_ALARM;
248+ goto continue_boot;
249+ }
250+ if (tmp & PCF50606_INT1_EXTONR) {
251+ /* we've been woken up by charger insert */
252+ neo1973_wakeup_cause = NEO1973_WAKEUP_CHARGER;
253+ }
254+
255+ if (tmp & PCF50606_INT1_ONKEYF) {
256+ /* we've been woken up by a falling edge of the onkey */
257+ neo1973_wakeup_cause = NEO1973_WAKEUP_POWER_KEY;
258+ }
259+
260+ if (neo1973_wakeup_cause == NEO1973_WAKEUP_CHARGER) {
261+ /* if we still think it was only a charger insert, boot */
262+ goto continue_boot;
263+ }
264+
265+woken_by_reset:
266+
267+ while (neo1973_wakeup_cause == NEO1973_WAKEUP_RESET ||
268+ neo1973_on_key_pressed()) {
269+ if (neo1973_aux_key_pressed())
270+ menu_vote++;
271+ else
272+ menu_vote--;
273+
274+ if (neo1973_new_second())
275+ seconds++;
276+ if (seconds >= POWER_KEY_SECONDS)
277+ goto continue_boot;
278+ }
279+ /* Power off if minimum number of seconds not reached */
280+ neo1973_poweroff();
281+
282+continue_boot:
283+ jbt6k74_init();
284+ jbt6k74_enter_state(JBT_STATE_NORMAL);
285+ jbt6k74_display_onoff(1);
286+#endif
287+
288+ /* issue a short pulse with the vibrator */
289+ neo1973_vibrator(1);
290+ udelay(50000);
291+ neo1973_vibrator(0);
292+
293+ /* switch on the backlight */
294+ neo1973_backlight(1);
295+
296+#if 0
297+ {
298+ /* check if sd card is inserted, and power-up if it is */
299+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
300+ if (!(gpio->GPFDAT & (1 << 5)))
301+ gpio->GPBDAT &= ~(1 << 2);
302+ }
303+
304+ if (menu_vote > 0) {
305+ bootmenu();
306+ nobootdelay = 1;
307+ }
308+#endif
309+
310+ return 0;
311+}
312+
313+int dram_init (void)
314+{
315+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
316+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
317+
318+ return 0;
319+}
320+
321+u_int32_t get_board_rev(void)
322+{
323+#if defined(CONFIG_ARCH_GTA02_v1)
324+ return 0x00000310;
325+#endif
326+}
327+
328+void neo1973_poweroff(void)
329+{
330+ printf("poweroff\n");
331+ udc_disconnect();
332+ pcf50633_reg_write(PCF50633_REG_OOCSHDWN, 0x01);
333+ /* don't return to caller */
334+ while (1) ;
335+}
336+
337+void neo1973_backlight(int on)
338+{
339+ /* FIXME: PMU based implementation */
340+}
341+
342+/* FIXME: shared */
343+void neo1973_vibrator(int on)
344+{
345+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
346+ if (on)
347+#if defined(CONFIG_ARCH_GTA01_v3) || defined(CONFIG_ARCH_GTA01_v4)
348+ gpio->GPGDAT |= (1 << 11); /* GPG11 */
349+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3)
350+ gpio->GPBDAT |= (1 << 10); /* GPB10 */
351+#elif defined(CONFIG_ARCH_GTA01B_v4) || defined(CONFIG_ARCH_GTA02_v1)
352+ gpio->GPBDAT |= (1 << 3); /* GPB3 */
353+#endif
354+ else
355+#if defined(CONFIG_ARCH_GTA01_v3) || defined(CONFIG_ARCH_GTA01_v4)
356+ gpio->GPGDAT &= ~(1 << 11); /* GPG11 */
357+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3)
358+ gpio->GPBDAT &= ~(1 << 10); /* GPB10 */
359+#elif defined(CONFIG_ARCH_GTA01B_v4) || defined(CONFIG_ARCH_GTA02_v1)
360+ gpio->GPBDAT &= ~(1 << 3); /* GPB3 */
361+#endif
362+}
363+
364+int neo1973_new_second(void)
365+{
366+ return pcf50633_reg_read(PCF50633_REG_INT1) & PCF50633_INT1_SECOND;
367+}
368+
369+int neo1973_on_key_pressed(void)
370+{
371+ return !(pcf50633_reg_read(PCF50633_REG_OOCSTAT)
372+ & PCF50633_OOCSTAT_ONKEY);
373+}
374+
375+/* FIXME: shared */
376+int neo1973_aux_key_pressed(void)
377+{
378+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
379+ if (gpio->GPFDAT & (1 << 6))
380+ return 0;
381+ return 1;
382+}
383+
384+/* The sum of all part_size[]s must equal to the NAND size, i.e., 0x4000000.
385+ "initrd" is sized such that it can hold two uncompressed 16 bit 640*480
386+ images: 640*480*2*2 = 1228800 < 1245184. */
387+
388+unsigned int dynpart_size[] = {
389+ CFG_UBOOT_SIZE, CFG_ENV_SIZE, 0x200000, 0xa0000, 0x1fce0000, 0 };
390+char *dynpart_names[] = {
391+ "u-boot", "u-boot_env", "kernel", "splash", "rootfs", NULL };
392+
393+
394+const char *neo1973_get_charge_status(void)
395+{
396+ /* FIXME */
397+ return "unknown";
398+}
399+
400+int neo1973_set_charge_mode(enum neo1973_charger_cmd cmd)
401+{
402+ /* FIXME */
403+ return 0;
404+}
405Index: u-boot/board/neo1973/gta02/u-boot.lds
406===================================================================
407--- /dev/null
408+++ u-boot/board/neo1973/gta02/u-boot.lds
409@@ -0,0 +1,58 @@
410+/*
411+ * (C) Copyright 2002
412+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
413+ *
414+ * See file CREDITS for list of people who contributed to this
415+ * project.
416+ *
417+ * This program is free software; you can redistribute it and/or
418+ * modify it under the terms of the GNU General Public License as
419+ * published by the Free Software Foundation; either version 2 of
420+ * the License, or (at your option) any later version.
421+ *
422+ * This program is distributed in the hope that it will be useful,
423+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
424+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
425+ * GNU General Public License for more details.
426+ *
427+ * You should have received a copy of the GNU General Public License
428+ * along with this program; if not, write to the Free Software
429+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
430+ * MA 02111-1307 USA
431+ */
432+
433+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
434+/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
435+OUTPUT_ARCH(arm)
436+ENTRY(_start)
437+SECTIONS
438+{
439+ . = 0x00000000;
440+
441+ . = ALIGN(4);
442+ .text :
443+ {
444+ cpu/arm920t/start.o (.text)
445+ cpu/arm920t/s3c24x0/nand_read.o (.text)
446+ *(.text)
447+ }
448+
449+ . = ALIGN(4);
450+ .rodata : { *(.rodata) }
451+
452+ . = ALIGN(4);
453+ .data : { *(.data) }
454+
455+ . = ALIGN(4);
456+ .got : { *(.got) }
457+
458+ . = .;
459+ __u_boot_cmd_start = .;
460+ .u_boot_cmd : { *(.u_boot_cmd) }
461+ __u_boot_cmd_end = .;
462+
463+ . = ALIGN(4);
464+ __bss_start = .;
465+ .bss : { *(.bss) }
466+ _end = .;
467+}
468Index: u-boot/include/configs/neo1973_gta02.h
469===================================================================
470--- /dev/null
471+++ u-boot/include/configs/neo1973_gta02.h
472@@ -0,0 +1,276 @@
473+/*
474+ * (C) Copyright 2007 OpenMoko, Inc.
475+ * Author: Harald Welte <laforge@openmoko.org>
476+ *
477+ * Configuation settings for the FIC Neo1973 GTA02 Linux GSM phone
478+ *
479+ * See file CREDITS for list of people who contributed to this
480+ * project.
481+ *
482+ * This program is free software; you can redistribute it and/or
483+ * modify it under the terms of the GNU General Public License as
484+ * published by the Free Software Foundation; either version 2 of
485+ * the License, or (at your option) any later version.
486+ *
487+ * This program is distributed in the hope that it will be useful,
488+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
489+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
490+ * GNU General Public License for more details.
491+ *
492+ * You should have received a copy of the GNU General Public License
493+ * along with this program; if not, write to the Free Software
494+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
495+ * MA 02111-1307 USA
496+ */
497+
498+#ifndef __CONFIG_H
499+#define __CONFIG_H
500+
501+/* we want to be able to start u-boot directly from within NAND flash */
502+#define CONFIG_LL_INIT_NAND_ONLY
503+#define CONFIG_S3C2410_NAND_BOOT 1
504+#define CONFIG_S3C2410_NAND_SKIP_BAD 1
505+
506+#define CFG_UBOOT_SIZE 0x40000 /* size of u-boot, for NAND loading */
507+
508+/*
509+ * High Level Configuration Options
510+ * (easy to change)
511+ */
512+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
513+#define CONFIG_S3C2440 1 /* in a SAMSUNG S3C2410 SoC */
514+#define CONFIG_SMDK2440 1 /* on a SAMSUNG SMDK2410 Board */
515+
516+/* input clock of PLL */
517+#define CONFIG_SYS_CLK_FREQ 12000000/* the GTA02 has this input clock */
518+
519+
520+#define USE_920T_MMU 1
521+#define CONFIG_USE_IRQ 1
522+
523+/*
524+ * Size of malloc() pool
525+ */
526+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 400*1024)
527+ /* >> CFG_VIDEO_LOGO_MAX_SIZE */
528+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
529+
530+/*
531+ * Hardware drivers
532+ */
533+
534+/*
535+ * select serial console configuration
536+ */
537+#define CONFIG_SERIAL3 1 /* we use SERIAL 1 on GTA01 */
538+
539+/************************************************************
540+ * RTC
541+ ************************************************************/
542+#define CONFIG_RTC_S3C24X0 1
543+
544+/* allow to overwrite serial and ethaddr */
545+#define CONFIG_ENV_OVERWRITE
546+
547+#define CONFIG_BAUDRATE 115200
548+
549+/***********************************************************
550+ * Command definition
551+ ***********************************************************/
552+#define CONFIG_COMMANDS (\
553+ CFG_CMD_BDI | \
554+ CFG_CMD_LOADS | \
555+ CFG_CMD_LAODB | \
556+ CFG_CMD_IMI | \
557+ CFG_CMD_CACHE | \
558+ CFG_CMD_MEMORY | \
559+ CFG_CMD_ENV | \
560+ /* CFG_CMD_IRQ | */ \
561+ CFG_CMD_BOOTD | \
562+ CFG_CMD_CONSOLE | \
563+ /* CFG_CMD_BMP | */ \
564+ CFG_CMD_ASKENV | \
565+ CFG_CMD_RUN | \
566+ CFG_CMD_ECHO | \
567+ CFG_CMD_I2C | \
568+ CFG_CMD_REGINFO | \
569+ CFG_CMD_IMMAP | \
570+ CFG_CMD_DATE | \
571+ CFG_CMD_AUTOSCRIPT | \
572+ CFG_CMD_BSP | \
573+ CFG_CMD_ELF | \
574+ CFG_CMD_MISC | \
575+ /* CFG_CMD_USB | */ \
576+ CFG_CMD_JFFS2 | \
577+ CFG_CMD_DIAG | \
578+ /* CFG_CMD_HWFLOW | */ \
579+ CFG_CMD_SAVES | \
580+ CFG_CMD_NAND | \
581+ CFG_CMD_PORTIO | \
582+ CFG_CMD_MMC | \
583+ CFG_CMD_FAT | \
584+ CFG_CMD_EXT2 | \
585+ 0)
586+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
587+#include <cmd_confdefs.h>
588+
589+#define CONFIG_BOOTDELAY 3
590+#define CONFIG_BOOTARGS ""
591+#define CONFIG_BOOTCOMMAND "setenv bootargs ${bootargs_base} ${mtdparts}; nand read.e 0x32000000 kernel; bootm 0x32000000"
592+
593+#define CONFIG_DOS_PARTITION 1
594+
595+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
596+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
597+/* what's this ? it's not used anywhere */
598+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
599+#endif
600+
601+/*
602+ * Miscellaneous configurable options
603+ */
604+#define CFG_LONGHELP /* undef to save memory */
605+#if defined(CONFIG_ARCH_GTA02_v1)
606+#define CFG_PROMPT "GTA02v1 # " /* Monitor Command Prompt */
607+#endif
608+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
609+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
610+#define CFG_MAXARGS 64 /* max number of command args */
611+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
612+
613+#define CFG_MEMTEST_START 0x30000000 /* memtest works on */
614+#define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
615+
616+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
617+
618+#define CFG_LOAD_ADDR 0x33000000 /* default load address */
619+
620+/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
621+/* it to wrap 100 times (total 1562500) to get 1 sec. */
622+#define CFG_HZ 1562500
623+
624+/* valid baudrates */
625+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
626+
627+#define CFG_BOOTMENU
628+
629+/*-----------------------------------------------------------------------
630+ * Stack sizes
631+ *
632+ * The stack sizes are set up in start.S using the settings below
633+ */
634+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
635+#ifdef CONFIG_USE_IRQ
636+#define CONFIG_STACKSIZE_IRQ (8*1024) /* IRQ stack */
637+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
638+#endif
639+
640+#if 0
641+#define CONFIG_USB_OHCI 1
642+#endif
643+
644+#define CONFIG_USB_DEVICE 1
645+#define CONFIG_USB_TTY 1
646+#define CFG_CONSOLE_IS_IN_ENV 1
647+#define CONFIG_USBD_VENDORID 0x1457 /* Linux/NetChip */
648+#define CONFIG_USBD_PRODUCTID_GSERIAL 0x5120 /* gserial */
649+#define CONFIG_USBD_PRODUCTID_CDCACM 0x5119 /* CDC ACM */
650+#define CONFIG_USBD_MANUFACTURER "OpenMoko, Inc"
651+#define CONFIG_USBD_PRODUCT_NAME "Neo1973 Bootloader " U_BOOT_VERSION
652+#define CONFIG_USBD_DFU 1
653+#define CONFIG_USBD_DFU_XFER_SIZE 4096 /* 0x4000 */
654+#define CONFIG_USBD_DFU_INTERFACE 2
655+
656+#define CONFIG_EXTRA_ENV_SETTINGS \
657+ "usbtty=cdc_acm\0" \
658+ "bootargs_base=rootfstype=jffs2 root=/dev/mtdblock4 console=ttySAC0,115200 console=tty0 loglevel=8\0" \
659+ ""
660+
661+/*-----------------------------------------------------------------------
662+ * Physical Memory Map
663+ */
664+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
665+#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
666+#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
667+#define PHYS_SDRAM_RES_SIZE 0x00200000 /* 2 MB for frame buffer */
668+
669+/*-----------------------------------------------------------------------
670+ * FLASH and environment organization
671+ */
672+
673+/* No NOR flash in this device */
674+#define CFG_NO_FLASH 1
675+
676+#define CFG_ENV_IS_IN_NAND 1
677+#define CFG_ENV_SIZE 0x40000 /* 128k Total Size of Environment Sector */
678+#define CFG_ENV_OFFSET_OOB 1 /* Location of ENV stored in block 0 OOB */
679+#define CFG_PREBOOT_OVERRIDE 1 /* allow preboot from memory */
680+
681+#define NAND_MAX_CHIPS 1
682+#define CFG_NAND_BASE 0x4e000000
683+#define CFG_MAX_NAND_DEVICE 1
684+
685+#define CONFIG_MMC 1
686+#define CFG_MMC_BASE 0xff000000
687+
688+/* EXT2 driver */
689+#define CONFIG_EXT2 1
690+
691+#define CONFIG_FAT 1
692+#define CONFIG_SUPPORT_VFAT
693+
694+#if 1
695+/* JFFS2 driver */
696+#define CONFIG_JFFS2_CMDLINE 1
697+#define CONFIG_JFFS2_NAND 1
698+#define CONFIG_JFFS2_NAND_DEV 0
699+//#define CONFIG_JFFS2_NAND_OFF 0x634000
700+//#define CONFIG_JFFS2_NAND_SIZE 0x39cc000
701+#endif
702+
703+/* ATAG configuration */
704+#define CONFIG_INITRD_TAG 1
705+#define CONFIG_SETUP_MEMORY_TAGS 1
706+#define CONFIG_CMDLINE_TAG 1
707+#define CONFIG_REVISION_TAG 1
708+#if 0
709+#define CONFIG_SERIAL_TAG 1
710+#endif
711+
712+#define CONFIG_DRIVER_S3C24X0_I2C 1
713+#define CONFIG_HARD_I2C 1
714+#define CFG_I2C_SPEED 400000 /* 400kHz according to PCF50633 data sheet */
715+#define CFG_I2C_SLAVE 0x7f
716+
717+/* we have a board_late_init() function */
718+#define BOARD_LATE_INIT 1
719+
720+#if 0
721+#define CONFIG_VIDEO
722+#define CONFIG_VIDEO_S3C2410
723+#define CONFIG_CFB_CONSOLE
724+#define CONFIG_VIDEO_LOGO
725+#define CONFIG_SPLASH_SCREEN
726+#define CFG_VIDEO_LOGO_MAX_SIZE (640*480+1024+100) /* 100 = slack */
727+#define CONFIG_VIDEO_BMP_GZIP
728+#define CONFIG_VGA_AS_SINGLE_DEVICE
729+#define CONFIG_UNZIP
730+
731+#define VIDEO_KBD_INIT_FCT 0
732+#define VIDEO_TSTC_FCT serial_tstc
733+#define VIDEO_GETC_FCT serial_getc
734+
735+#define LCD_VIDEO_ADDR 0x33d00000
736+#endif
737+
738+#define CONFIG_S3C2410_NAND_BBT 1
739+//#define CONFIG_S3C2410_NAND_HWECC 1
740+
741+#define CONFIG_DRIVER_PCF50633 1
742+
743+#define MTDIDS_DEFAULT "nand0=neo1973-nand"
744+#define MTPARTS_DEFAULT "neo1973-nand:256k(u-boot),128k(u-boot_env),2M(kernel),640k(splash),-(jffs2)"
745+#define CFG_NAND_DYNPART_MTD_KERNEL_NAME "neo1973-nand"
746+#define CONFIG_NAND_DYNPART
747+
748+#endif /* __CONFIG_H */
749Index: u-boot/board/neo1973/gta02/split_by_variant.sh
750===================================================================
751--- /dev/null
752+++ u-boot/board/neo1973/gta02/split_by_variant.sh
753@@ -0,0 +1,37 @@
754+#!/bin/sh
755+# ---------------------------------------------------------
756+# Set the core module defines according to Core Module
757+# ---------------------------------------------------------
758+# ---------------------------------------------------------
759+# Set up the GTA01 type define
760+# ---------------------------------------------------------
761+
762+CFGINC=${obj}include/config.h
763+CFGTMP=${obj}board/neo1973/gta02/config.tmp
764+
765+mkdir -p ${obj}include
766+if [ "$1" == "" ]
767+then
768+ echo "$0:: No parameters - using GTA02Bv1 config"
769+ echo "#define CONFIG_ARCH_GTA02_v1" > $CFGINC
770+ echo "CONFIG_USB_DFU_REVISION=0x0310" > $CFGTMP
771+else
772+ case "$1" in
773+ gta02v1_config)
774+ echo "#define CONFIG_ARCH_GTA02_v1" > $CFGINC
775+ echo "CONFIG_USB_DFU_REVISION=0x0310" > $CFGTMP
776+ ;;
777+
778+ *)
779+ echo "$0:: Unrecognised config - using GTA02v1 config"
780+ echo "#define CONFIG_ARCH_GTA02_v1" > $CFGINC
781+ echo "CONFIG_USB_DFU_REVISION=0x0310" > $CFGTMP
782+ ;;
783+
784+ esac
785+
786+fi
787+# ---------------------------------------------------------
788+# Complete the configuration
789+# ---------------------------------------------------------
790+$MKCONFIG -a neo1973_gta02 arm arm920t gta02 neo1973 s3c24x0
791Index: u-boot/include/pcf50633.h
792===================================================================
793--- /dev/null
794+++ u-boot/include/pcf50633.h
795@@ -0,0 +1,235 @@
796+#ifndef _PCF50633_H
797+#define _PCF50633_H
798+
799+/* Philips PCF50633 Power Managemnt Unit (PMU) driver
800+ * (C) 2006-2007 by OpenMoko, Inc.
801+ * Author: Harald Welte <laforge@openmoko.org>
802+ *
803+ */
804+
805+enum pfc50633_regs {
806+ PCF50633_REG_VERSION = 0x00,
807+ PCF50633_REG_VARIANT = 0x01,
808+ PCF50633_REG_INT1 = 0x02, /* Interrupt Status */
809+ PCF50633_REG_INT2 = 0x03, /* Interrupt Status */
810+ PCF50633_REG_INT3 = 0x04, /* Interrupt Status */
811+ PCF50633_REG_INT4 = 0x05, /* Interrupt Status */
812+ PCF50633_REG_INT5 = 0x06, /* Interrupt Status */
813+ PCF50633_REG_INT1M = 0x07, /* Interrupt Mask */
814+ PCF50633_REG_INT2M = 0x08, /* Interrupt Mask */
815+ PCF50633_REG_INT3M = 0x09, /* Interrupt Mask */
816+ PCF50633_REG_INT4M = 0x0a, /* Interrupt Mask */
817+ PCF50633_REG_INT5M = 0x0b, /* Interrupt Mask */
818+ PCF50633_REG_OOCSHDWN = 0x0c,
819+ PCF50633_REG_OOCWAKE = 0x0d,
820+ PCF50633_REG_OOCTIM1 = 0x0e,
821+ PCF50633_REG_OOCTIM2 = 0x0f,
822+ PCF50633_REG_OOCMODE = 0x10,
823+ PCF50633_REG_OOCCTL = 0x11,
824+ PCF50633_REG_OOCSTAT = 0x12,
825+ PCF50633_REG_GPIOCTL = 0x13,
826+ PCF50633_REG_GPIO1CFG = 0x14,
827+ PCF50633_REG_GPIO2CFG = 0x15,
828+ PCF50633_REG_GPIO3CFG = 0x16,
829+ PCF50633_REG_GPOCFG = 0x17,
830+ PCF50633_REG_BVMCTL = 0x18,
831+ PCF50633_REG_SVMCTL = 0x19,
832+ PCF50633_REG_AUTOOUT = 0x1a,
833+ PCF50633_REG_AUTOENA = 0x1b,
834+ PCF50633_REG_AUTOCTL = 0x1c,
835+ PCF50633_REG_AUTOMXC = 0x1d,
836+ PCF50633_REG_DOWN1OUT = 0x1e,
837+ PCF50633_REG_DOWN1ENA = 0x1f,
838+ PCF50633_REG_DOWN1CTL = 0x20,
839+ PCF50633_REG_DOWN1MXC = 0x21,
840+ PCF50633_REG_DOWN2OUT = 0x22,
841+ PCF50633_REG_DOWN2ENA = 0x23,
842+ PCF50633_REG_DOWN2CTL = 0x24,
843+ PCF50633_REG_DOWN2MXC = 0x25,
844+ PCF50633_REG_MEMLDOOUT = 0x26,
845+ PCF50633_REG_MEMLDOENA = 0x27,
846+ PCF50633_REG_LEDOUT = 0x28,
847+ PCF50633_REG_LEDENA = 0x29,
848+ PCF50633_REG_LEDCTL = 0x2a,
849+ PCF50633_REG_LEDDIM = 0x2b,
850+ /* reserved */
851+ PCF50633_REG_LDO1OUT = 0x2d,
852+ PCF50633_REG_LDO1ENA = 0x2e,
853+ PCF50633_REG_LDO2OUT = 0x2f,
854+ PCF50633_REG_LDO2ENA = 0x30,
855+ PCF50633_REG_LDO3OUT = 0x31,
856+ PCF50633_REG_LDO3ENA = 0x32,
857+ PCF50633_REG_LDO4OUT = 0x33,
858+ PCF50633_REG_LDO4ENA = 0x34,
859+ PCF50633_REG_LDO5OUT = 0x35,
860+ PCF50633_REG_LDO5ENA = 0x36,
861+ PCF50633_REG_LDO6OUT = 0x37,
862+ PCF50633_REG_LDO6ENA = 0x38,
863+ PCF50633_REG_HCLDOOUT = 0x39,
864+ PCF50633_REG_HCLDOENA = 0x3a,
865+ PCF50633_REG_STBYCTL1 = 0x3b,
866+ PCF50633_REG_STBYCTL2 = 0x3c,
867+ PCF50633_REG_DEBPF1 = 0x3d,
868+ PCF50633_REG_DEBPF2 = 0x3e,
869+ PCF50633_REG_DEBPF3 = 0x3f,
870+ PCF50633_REG_HCLDOOVL = 0x40,
871+ PCF50633_REG_DCDCSTAT = 0x41,
872+ PCF50633_REG_LDOSTAT = 0x42,
873+ PCF50633_REG_MBCC1 = 0x43,
874+ PCF50633_REG_MBCC2 = 0x44,
875+ PCF50633_REG_MBCC3 = 0x45,
876+ PCF50633_REG_MBCC4 = 0x46,
877+ PCF50633_REG_MBCC5 = 0x47,
878+ PCF50633_REG_MBCC6 = 0x48,
879+ PCF50633_REG_MBCC7 = 0x49,
880+ PCF50633_REG_MBCC8 = 0x4a,
881+ PCF50633_REG_MBCS1 = 0x4b,
882+ PCF50633_REG_MBCS2 = 0x4c,
883+ PCF50633_REG_MBCS3 = 0x4d,
884+ PCF50633_REG_BBCCTL = 0x4e,
885+ PCF50633_REG_ALMGAIN = 0x4f,
886+ PCF50633_REG_ALMDATA = 0x50,
887+ /* reserved */
888+ PCF50633_REG_ADCC3 = 0x52,
889+ PCF50633_REG_ADCC2 = 0x53,
890+ PCF50633_REG_ADCC1 = 0x54,
891+ PCF50633_REG_ADCS1 = 0x55,
892+ PCF50633_REG_ADCS2 = 0x56,
893+ PCF50633_REG_ADCS3 = 0x57,
894+ /* reserved */
895+ PCF50633_REG_RTCSC = 0x59, /* Second */
896+ PCF50633_REG_RTCMN = 0x5a, /* Minute */
897+ PCF50633_REG_RTCHR = 0x5b, /* Hour */
898+ PCF50633_REG_RTCWD = 0x5c, /* Weekday */
899+ PCF50633_REG_RTCDT = 0x5d, /* Day */
900+ PCF50633_REG_RTCMT = 0x5e, /* Month */
901+ PCF50633_REG_RTCYR = 0x5f, /* Year */
902+ PCF50633_REG_RTCSCA = 0x60, /* Alarm Second */
903+ PCF50633_REG_RTCMNA = 0x61, /* Alarm Minute */
904+ PCF50633_REG_RTCHRA = 0x62, /* Alarm Hour */
905+ PCF50633_REG_RTCWDA = 0x63, /* Alarm Weekday */
906+ PCF50633_REG_RTCDTA = 0x64, /* Alarm Day */
907+ PCF50633_REG_RTCMTA = 0x65, /* Alarm Month */
908+ PCF50633_REG_RTCYRA = 0x66, /* Alarm Year */
909+
910+ PCF50633_REG_MEMBYTE0 = 0x67,
911+ PCF50633_REG_MEMBYTE1 = 0x68,
912+ PCF50633_REG_MEMBYTE2 = 0x69,
913+ PCF50633_REG_MEMBYTE3 = 0x6a,
914+ PCF50633_REG_MEMBYTE4 = 0x6b,
915+ PCF50633_REG_MEMBYTE5 = 0x6c,
916+ PCF50633_REG_MEMBYTE6 = 0x6d,
917+ PCF50633_REG_MEMBYTE7 = 0x6e,
918+ /* reserved */
919+ PCF50633_REG_DCDCPFM = 0x84,
920+ __NUM_PCF50633_REGS
921+};
922+
923+enum pcf50633_reg_int1 {
924+ PCF50633_INT1_ADPINS = 0x01, /* Adapter inserted */
925+ PCF50633_INT1_ADPREM = 0x02, /* Adapter removed */
926+ PCF50633_INT1_USBINS = 0x04, /* USB inserted */
927+ PCF50633_INT1_USBREM = 0x08, /* USB removed */
928+ /* reserved */
929+ PCF50633_INT1_ALARM = 0x40, /* RTC alarm time is reached */
930+ PCF50633_INT1_SECOND = 0x80, /* RTC periodic second interrupt */
931+};
932+
933+enum pcf50633_reg_int2 {
934+ PCF50633_INT2_ONKEYR = 0x01, /* ONKEY rising edge */
935+ PCF50633_INT2_ONKEYF = 0x02, /* ONKEY falling edge */
936+ PCF50633_INT2_EXTON1R = 0x04, /* EXTON1 rising edge */
937+ PCF50633_INT2_EXTON1F = 0x08, /* EXTON1 falling edge */
938+ PCF50633_INT2_EXTON2R = 0x10, /* EXTON2 rising edge */
939+ PCF50633_INT2_EXTON2F = 0x20, /* EXTON2 falling edge */
940+ PCF50633_INT2_EXTON3R = 0x40, /* EXTON3 rising edge */
941+ PCF50633_INT2_EXTON3F = 0x80, /* EXTON3 falling edge */
942+};
943+
944+enum pcf50633_reg_int3 {
945+ PCF50633_INT3_BATFULL = 0x01, /* Battery full */
946+ PCF50633_INT3_CHGHALT = 0x02, /* Charger halt */
947+ PCF50633_INT3_THLIMON = 0x04,
948+ PCF50633_INT3_THLIMOFF = 0x08,
949+ PCF50633_INT3_USBLIMON = 0x10,
950+ PCF50633_INT3_USBLIMOFF = 0x20,
951+ PCF50633_INT3_ADCRDY = 0x40, /* ADC conversion finished */
952+ PCF50633_INT3_ONKEY1S = 0x80, /* ONKEY pressed 1 second */
953+};
954+
955+enum pcf50633_reg_int4 {
956+ PCF50633_INT4_LOWSYS = 0x01,
957+ PCF50633_INT4_LOWBAT = 0x02,
958+ PCF50633_INT4_HIGHTMP = 0x04,
959+ PCF50633_INT4_AUTOPWRFAIL = 0x08,
960+ PCF50633_INT4_DWN1PWRFAIL = 0x10,
961+ PCF50633_INT4_DWN2PWRFAIL = 0x20,
962+ PCF50633_INT4_LEDPWRFAIL = 0x40,
963+ PCF50633_INT4_LEDOVP = 0x80,
964+};
965+
966+enum pcf50633_reg_int5 {
967+ PCF50633_INT4_LDO1PWRFAIL = 0x01,
968+ PCF50633_INT4_LDO2PWRFAIL = 0x02,
969+ PCF50633_INT4_LDO3PWRFAIL = 0x04,
970+ PCF50633_INT4_LDO4PWRFAIL = 0x08,
971+ PCF50633_INT4_LDO5PWRFAIL = 0x10,
972+ PCF50633_INT4_LDO6PWRFAIL = 0x20,
973+ PCF50633_INT4_HCLDOPWRFAIL = 0x40,
974+ PCF50633_INT4_HCLDOOVL = 0x80,
975+};
976+
977+enum pcf50633_reg_oocwake {
978+ PCF50633_OOCWAKE_ONKEY = 0x01,
979+ PCF50633_OOCWAKE_EXTON1 = 0x02,
980+ PCF50633_OOCWAKE_EXTON2 = 0x04,
981+ PCF50633_OOCWAKE_EXTON3 = 0x08,
982+ PCF50633_OOCWAKE_RTC = 0x10,
983+ /* reserved */
984+ PCF50633_OOCWAKE_USB = 0x40,
985+ PCF50633_OOCWAKE_ADP = 0x80,
986+};
987+
988+enum pcf50633_reg_mbcc1 {
989+ PCF50633_MBCC1_CHGENA = 0x01, /* Charger enable */
990+ PCF50633_MBCC1_AUTOSTOP = 0x02,
991+ PCF50633_MBCC1_AUTORES = 0x04, /* automatic resume */
992+ PCF50633_MBCC1_RESUME = 0x08, /* explicit resume cmd */
993+ PCF50633_MBCC1_RESTART = 0x10, /* restart charging */
994+ PCF50633_MBCC1_PREWDTIME_60M = 0x20, /* max. precharging time */
995+ PCF50633_MBCC1_WDTIME_1H = 0x00,
996+ PCF50633_MBCC1_WDTIME_2H = 0x40,
997+ PCF50633_MBCC1_WDTIME_4H = 0x80,
998+ PCF50633_MBCC1_WDTIME_6H = 0xc0,
999+};
1000+#define PCF50633_MBCC1_WDTIME_MASK 0xc0
1001+
1002+enum pcf50633_reg_mbcc2 {
1003+ PCF50633_MBCC2_VBATCOND_2V7 = 0x00,
1004+ PCF50633_MBCC2_VBATCOND_2V85 = 0x01,
1005+ PCF50633_MBCC2_VBATCOND_3V = 0x02,
1006+ PCF50633_MBCC2_VBATCOND_3V15 = 0x03,
1007+ PCF50633_MBCC2_VMAX_4V = 0x00,
1008+ PCF50633_MBCC2_VMAX_4V20 = 0x28,
1009+ PCF50633_MBCC2_VRESDEBTIME_64S = 0x80, /* debounce time (32/64sec) */
1010+};
1011+#define PCF50633_MBCC2_VBATCOND_MASK 0x03
1012+#define PCF50633_MBCC2_VMAX_MASK 0x3c
1013+
1014+#define PCF50633_OOCSTAT_ONKEY 0x01
1015+
1016+/* this is to be provided by the board implementation */
1017+extern const u_int8_t pcf50633_initial_regs[__NUM_PCF50633_REGS];
1018+
1019+void pcf50633_reg_write(u_int8_t reg, u_int8_t val);
1020+
1021+u_int8_t pcf50633_reg_read(u_int8_t reg);
1022+
1023+void pcf50633_reg_set_bit_mask(u_int8_t reg, u_int8_t mask, u_int8_t val);
1024+void pcf50633_reg_clear_bits(u_int8_t reg, u_int8_t bits);
1025+
1026+void pcf50633_init(void);
1027+void pcf50633_usb_maxcurrent(unsigned int ma);
1028+
1029+#endif /* _PCF50633_H */
1030+
1031Index: u-boot/drivers/pcf50633.c
1032===================================================================
1033--- /dev/null
1034+++ u-boot/drivers/pcf50633.c
1035@@ -0,0 +1,142 @@
1036+#include <common.h>
1037+
1038+#ifdef CONFIG_DRIVER_PCF50633
1039+
1040+#include <i2c.h>
1041+#include <pcf50633.h>
1042+#include <asm/atomic.h>
1043+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
1044+
1045+#define PCF50633_I2C_ADDR 0x73
1046+
1047+void __pcf50633_reg_write(u_int8_t reg, u_int8_t val)
1048+{
1049+ i2c_write(PCF50633_I2C_ADDR, reg, 1, &val, 1);
1050+}
1051+
1052+u_int8_t __pcf50633_reg_read(u_int8_t reg)
1053+{
1054+ u_int8_t tmp;
1055+ i2c_read(PCF50633_I2C_ADDR, reg, 1, &tmp, 1);
1056+ return tmp;
1057+}
1058+
1059+void pcf50633_reg_write(u_int8_t reg, u_int8_t val)
1060+{
1061+ unsigned long flags;
1062+
1063+ local_irq_save(flags);
1064+ __pcf50633_reg_write(reg, val);
1065+ local_irq_restore(flags);
1066+}
1067+
1068+u_int8_t pcf50633_reg_read(u_int8_t reg)
1069+{
1070+ unsigned long flags;
1071+ u_int8_t tmp;
1072+
1073+ local_irq_save(flags);
1074+ tmp = __pcf50633_reg_read(reg);
1075+ local_irq_restore(flags);
1076+
1077+ return tmp;
1078+}
1079+
1080+void pcf50633_reg_set_bit_mask(u_int8_t reg, u_int8_t mask, u_int8_t val)
1081+{
1082+ unsigned long flags;
1083+ u_int8_t tmp;
1084+
1085+ local_irq_save(flags);
1086+ tmp = __pcf50633_reg_read(reg);
1087+ __pcf50633_reg_write(reg, (val & mask) | (tmp & ~mask));
1088+ local_irq_restore(flags);
1089+}
1090+
1091+void pcf50633_reg_clear_bits(u_int8_t reg, u_int8_t bits)
1092+{
1093+ unsigned long flags;
1094+ u_int8_t tmp;
1095+
1096+ local_irq_save(flags);
1097+ tmp = pcf50633_reg_read(reg);
1098+ pcf50633_reg_write(reg, (tmp & ~bits));
1099+ local_irq_restore(flags);
1100+}
1101+
1102+static const u_int8_t regs_invalid[] = {
1103+ PCF50633_REG_VERSION,
1104+ PCF50633_REG_VARIANT,
1105+ PCF50633_REG_OOCSHDWN,
1106+ PCF50633_REG_INT1,
1107+ PCF50633_REG_INT2,
1108+ PCF50633_REG_INT3,
1109+ PCF50633_REG_INT4,
1110+ PCF50633_REG_INT5,
1111+ PCF50633_REG_OOCSTAT,
1112+ 0x2c,
1113+ PCF50633_REG_DCDCSTAT,
1114+ PCF50633_REG_LDOSTAT,
1115+ PCF50633_REG_MBCS1,
1116+ PCF50633_REG_MBCS2,
1117+ PCF50633_REG_MBCS3,
1118+ PCF50633_REG_ALMDATA,
1119+ 0x51,
1120+ /* 0x55 ... 0x6e: don't write */
1121+ /* 0x6f ... 0x83: reserved */
1122+};
1123+#define PCF50633_LAST_REG 0x55
1124+
1125+static int reg_is_invalid(u_int8_t reg)
1126+{
1127+ int i;
1128+
1129+ /* all registers above 0x55 (ADCS1) except 0x84 */
1130+ if (reg == PCF50633_REG_DCDCPFM)
1131+ return 0;
1132+ if (reg >= 0x55)
1133+ return 1;
1134+
1135+ for (i = 0; i < ARRAY_SIZE(regs_invalid); i++) {
1136+ if (regs_invalid[i] > reg)
1137+ return 0;
1138+ if (regs_invalid[i] == reg)
1139+ return 1;
1140+ }
1141+
1142+ return 0;
1143+}
1144+
1145+
1146+/* initialize PCF50633 register set */
1147+void pcf50633_init(void)
1148+{
1149+ unsigned long flags;
1150+ u_int8_t i;
1151+
1152+ local_irq_save(flags);
1153+ for (i = 0; i < PCF50633_LAST_REG; i++) {
1154+ if (reg_is_invalid(i))
1155+ continue;
1156+ __pcf50633_reg_write(i, pcf50633_initial_regs[i]);
1157+ }
1158+ local_irq_restore(flags);
1159+}
1160+
1161+void pcf50633_usb_maxcurrent(unsigned int ma)
1162+{
1163+ u_int8_t val;
1164+
1165+ if (ma < 100)
1166+ val = 0x03;
1167+ else if (ma < 500)
1168+ val = 0x00;
1169+ else if (ma < 1000)
1170+ val = 0x01;
1171+ else
1172+ val = 0x02;
1173+
1174+ return pcf50633_reg_set_bit_mask(PCF50633_REG_MBCC7, 0x03, val);
1175+}
1176+
1177+#endif /* CONFIG DRIVER_PCF50633 */
1178Index: u-boot/board/neo1973/common/lowlevel_init.S
1179===================================================================
1180--- u-boot.orig/board/neo1973/common/lowlevel_init.S
1181+++ u-boot/board/neo1973/common/lowlevel_init.S
1182@@ -49,7 +49,7 @@
1183 #define WAIT (0x1<<2)
1184 #define UBLB (0x1<<3)
1185
1186-#define B1_BWSCON (DW32)
1187+#define B1_BWSCON (DW16 + WAIT + UBLB)
1188 #define B2_BWSCON (DW16)
1189 #define B3_BWSCON (DW16 + WAIT + UBLB)
1190 #define B4_BWSCON (DW16)
1191@@ -68,9 +68,9 @@
1192
1193 /* BANK1CON */
1194 #define B1_Tacs 0x0 /* 0clk */
1195-#define B1_Tcos 0x0 /* 0clk */
1196-#define B1_Tacc 0x7 /* 14clk */
1197-#define B1_Tcoh 0x0 /* 0clk */
1198+#define B1_Tcos 0x1 /* 1clk */
1199+#define B1_Tacc 0x4 /* 4clk */
1200+#define B1_Tcoh 0x1 /* 1clk */
1201 #define B1_Tah 0x0 /* 0clk */
1202 #define B1_Tacp 0x0
1203 #define B1_PMC 0x0
1204@@ -112,7 +112,7 @@
1205 #if defined (CONFIG_ARCH_GTA01_v3) || defined(CONFIG_ARCH_GTA01_v4)
1206 #define B6_SCAN 0x1 /* 9bit */
1207 #elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3) || \
1208- defined(CONFIG_ARCH_GTA01B_v4)
1209+ defined(CONFIG_ARCH_GTA01B_v4) || defined(CONFIG_ARCH_GTA02_v1)
1210 #define B6_SCAN 0x2 /* 10bit */
1211 #endif
1212
1213@@ -165,6 +165,18 @@
1214 str r1, [r0]
1215 #endif
1216
1217+#if defined(CONFIG_ARCH_GTA02_v1)
1218+ /* enable KEEPACT to make sure PMU keeps us alive */
1219+ ldr r0, =0x56000000 /* GPJ base */
1220+ ldr r1, [r0, #0xd0] /* GPJCON */
1221+ orr r1, r1, #(1 << 6)
1222+ str r1, [r0, #0xd0]
1223+
1224+ ldr r1, [r0, #0xd4] /* GPJDAT */
1225+ orr r1, r1, #(1 << 3)
1226+ str r1, [r0, #0xd4]
1227+#endif
1228+
1229 /* everything is fine now */
1230 mov pc, lr
1231
1232Index: u-boot/board/neo1973/gta02/pcf50633.c
1233===================================================================
1234--- /dev/null
1235+++ u-boot/board/neo1973/gta02/pcf50633.c
1236@@ -0,0 +1,91 @@
1237+
1238+#include <common.h>
1239+#include <pcf50633.h>
1240+
1241+/* initial register set for PCF50633 in Neo1973 GTA02 devices */
1242+const u_int8_t pcf50633_initial_regs[__NUM_PCF50633_REGS] = {
1243+ /* gap */
1244+ [PCF50633_REG_INT1M] = PCF50633_INT1_SECOND,
1245+ [PCF50633_REG_INT2M] = PCF50633_INT2_EXTON3F |
1246+ PCF50633_INT2_EXTON3R |
1247+ PCF50633_INT2_EXTON2F |
1248+ PCF50633_INT2_EXTON2R |
1249+ PCF50633_INT2_EXTON1R |
1250+ PCF50633_INT2_EXTON1F,
1251+ [PCF50633_REG_INT3M] = PCF50633_INT3_ADCRDY,
1252+ [PCF50633_REG_INT4M] = 0x00,
1253+ [PCF50633_REG_INT5M] = 0x00,
1254+
1255+ [PCF50633_REG_OOCWAKE] = 0xd3, /* wake from ONKEY,EXTON!,RTC,USB,ADP */
1256+ [PCF50633_REG_OOCTIM1] = 0xaa, /* debounce 14ms everything */
1257+ [PCF50633_REG_OOCTIM2] = 0x4a,
1258+ [PCF50633_REG_OOCMODE] = 0x55,
1259+ [PCF50633_REG_OOCCTL] = 0x44,
1260+
1261+ [PCF50633_REG_GPIOCTL] = 0x01, /* only GPIO1 is input */
1262+ [PCF50633_REG_GPIO2CFG] = 0x00,
1263+ [PCF50633_REG_GPIO3CFG] = 0x00,
1264+ [PCF50633_REG_GPOCFG] = 0x00,
1265+
1266+ [PCF50633_REG_SVMCTL] = 0x08, /* 3.10V SYS voltage thresh. */
1267+ [PCF50633_REG_BVMCTL] = 0x02, /* 2.80V BAT voltage thresh. */
1268+
1269+ [PCF50633_REG_STBYCTL1] = 0x00,
1270+ [PCF50633_REG_STBYCTL2] = 0x00,
1271+
1272+ [PCF50633_REG_DEBPF1] = 0xff,
1273+ [PCF50633_REG_DEBPF2] = 0xff,
1274+ [PCF50633_REG_DEBPF2] = 0x3f,
1275+
1276+ [PCF50633_REG_AUTOOUT] = 0x6b, /* 3.300V */
1277+ [PCF50633_REG_AUTOENA] = 0x01, /* always on */
1278+ [PCF50633_REG_AUTOCTL] = 0x00, /* automatic up/down operation */
1279+ [PCF50633_REG_AUTOMXC] = 0x0a, /* 400mA at startup FIXME */
1280+
1281+ [PCF50633_REG_DOWN1OUT] = 0x1b, /* 1.3V (0x1b * .025V + 0.625V) */
1282+ [PCF50633_REG_DOWN1ENA] = 0x02, /* enabled if GPIO1 = HIGH */
1283+ [PCF50633_REG_DOWN1CTL] = 0x00, /* no DVM */
1284+ [PCF50633_REG_DOWN1MXC] = 0x22, /* limit to 510mA at startup */
1285+
1286+ [PCF50633_REG_DOWN2OUT] = 0x2f, /* 1.8V (0x2f * .025V + 0.625V) */
1287+ [PCF50633_REG_DOWN2ENA] = 0x02, /* enabled if GPIO1 = HIGH */
1288+ [PCF50633_REG_DOWN2CTL] = 0x00, /* no DVM */
1289+ [PCF50633_REG_DOWN2MXC] = 0x22, /* limit to 510mA at startup */
1290+
1291+ [PCF50633_REG_MEMLDOOUT] = 0x00,
1292+ [PCF50633_REG_MEMLDOENA] = 0x00,
1293+
1294+ [PCF50633_REG_LEDOUT] = 0x2f, /* full backlight power */
1295+ [PCF50633_REG_LEDENA] = 0x02, /* enabled if GPIO1 = HIGH */
1296+ [PCF50633_REG_LEDCTL] = 0x05, /* ovp enabled, ocp 500mA */
1297+ [PCF50633_REG_LEDDIM] = 0x20, /* dimming curve */
1298+
1299+ [PCF50633_REG_LDO1OUT] = 0x04, /* 1.3V (4 * 0.1V + 0.9V) */
1300+ [PCF50633_REG_LDO1ENA] = 0x01, /* always on */
1301+
1302+ [PCF50633_REG_LDO2OUT] = 0x18, /* 3.3V (24 * 0.1V + 0.9V) */
1303+ [PCF50633_REG_LDO2ENA] = 0x02, /* enabled if GPIO1 = HIGH */
1304+
1305+ [PCF50633_REG_LDO3OUT] = 0x15, /* 3.0V (21 * 0.1V + 0.9V) */
1306+ [PCF50633_REG_LDO3ENA] = 0x02, /* enabled if GPIO1 = HIGH */
1307+
1308+ [PCF50633_REG_LDO4ENA] = 0x00,
1309+ [PCF50633_REG_LDO5ENA] = 0x00,
1310+ [PCF50633_REG_LDO6ENA] = 0x00,
1311+
1312+ [PCF50633_REG_HCLDOOUT] = 0x18, /* 3.3V (24 * 0.1V + 0.9V) */
1313+ [PCF50633_REG_HCLDOENA] = 0x00, /* off by default*/
1314+
1315+ [PCF50633_REG_DCDCPFM] = 0x00, /* off by default*/
1316+
1317+ [PCF50633_REG_MBCC1] = 0xe6,
1318+ [PCF50633_REG_MBCC2] = 0x28, /* Vbatconid=2.7V, Vmax=4.20V */
1319+ [PCF50633_REG_MBCC3] = 0x19, /* 25/255 == 98mA pre-charge */
1320+ [PCF50633_REG_MBCC4] = 0xff, /* 255/255 == 1A adapter fast */
1321+ [PCF50633_REG_MBCC5] = 0x7f, /* 127/255 == 500mA usb fast */
1322+ [PCF50633_REG_MBCC6] = 0x00, /* cutoff current 1/32 * Ichg */
1323+ [PCF50633_REG_MBCC7] = 0x00, /* 1.6A max bat curr, USB 100mA */
1324+ [PCF50633_REG_MBCC8] = 0x00,
1325+
1326+ [PCF50633_REG_BBCCTL] = 0x19, /* 3V, 200uA, on */
1327+};
1328Index: u-boot/board/neo1973/gta02/config.mk
1329===================================================================
1330--- /dev/null
1331+++ u-boot/board/neo1973/gta02/config.mk
1332@@ -0,0 +1,32 @@
1333+#
1334+# (C) Copyright 2002
1335+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
1336+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
1337+#
1338+# FIC Neo1973 GTA01 board with S3C2410X (ARM920T) cpu
1339+#
1340+# see http://www.samsung.com/ for more information on SAMSUNG
1341+#
1342+
1343+# GTA01v3 has 1 bank of 64 MB SDRAM
1344+# GTA01v4 has 1 bank of 64 MB SDRAM
1345+#
1346+# 3000'0000 to 3400'0000
1347+# we load ourself to 33F8'0000
1348+#
1349+# GTA01Bv2 or later has 1 bank of 128 MB SDRAM
1350+#
1351+# 3000'0000 to 3800'0000
1352+# we load ourself to 37F8'0000
1353+#
1354+# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000
1355+# optionally with a ramdisk at 3080'0000
1356+#
1357+# download area is 3200'0000 or 3300'0000
1358+
1359+CONFIG_USB_DFU_VENDOR=0x1457
1360+CONFIG_USB_DFU_PRODUCT=0x5119
1361+
1362+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
1363+
1364+TEXT_BASE = 0x33F80000
1365Index: u-boot/drivers/smedia3362.c
1366===================================================================
1367--- /dev/null
1368+++ u-boot/drivers/smedia3362.c
1369@@ -0,0 +1,125 @@
1370+/*
1371+ * (C) Copyright 2007 by OpenMoko, Inc.
1372+ * Author: Harald Welte <laforge@openmoko.org>
1373+ *
1374+ * This program is free software; you can redistribute it and/or
1375+ * modify it under the terms of the GNU General Public License as
1376+ * published by the Free Software Foundation; either version 2 of
1377+ * the License, or (at your option) any later version.
1378+ *
1379+ * This program is distributed in the hope that it will be useful,
1380+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1381+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1382+ * GNU General Public License for more details.
1383+ *
1384+ * You should have received a copy of the GNU General Public License
1385+ * along with this program; if not, write to the Free Software
1386+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1387+ * MA 02111-1307 USA
1388+ */
1389+
1390+#include <common.h>
1391+
1392+#if defined(CONFIG_VIDEO_GLAMO3362)
1393+
1394+#include <video_fb.h>
1395+#include "videomodes.h"
1396+#include <s3c2410.h>
1397+#include "smedia3362.h"
1398+
1399+/*
1400+ * Export Graphic Device
1401+ */
1402+GraphicDevice smi;
1403+
1404+
1405+struct glamo_script {
1406+ u_int16_t reg;
1407+ u_int16_t val;
1408+} __attribute__((packed));
1409+
1410+/* from 'initial glamo 3365 script' */
1411+static struct glamo_script gl3362_init_script[] = {
1412+ /* clock */
1413+ { GLAMO_REG_CLOCK_MEMORY, 0x300a },
1414+ { GLAMO_REG_CLOCK_LCD, 0x10aa },
1415+ { GLAMO_REG_CLOCK_MMC, 0x100a },
1416+ { GLAMO_REG_CLOCK_ISP, 0x32aa },
1417+ { GLAMO_REG_CLOCK_JPEG, 0x100a },
1418+ { GLAMO_REG_CLOCK_3D, 0x302a },
1419+ { GLAMO_REG_CLOCK_2D, 0x302a },
1420+ //{ GLAMO_REG_CLOCK_RISC1, 0x1aaa },
1421+ //{ GLAMO_REG_CLOCK_RISC2, 0x002a },
1422+ { GLAMO_REG_CLOCK_MPEG, 0x3aaa },
1423+ { GLAMO_REG_CLOCK_MPROC, 0x12aa },
1424+ { 0xfffe, 5 },
1425+ { GLAMO_REG_CLOCK_HOST, 0x000d },
1426+ { GLAMO_REG_CLOCK_MEMORY, 0x000a }I,
1427+ { GLAMO_REG_CLOCK_LCD, 0x00ee },
1428+ { GLAMO_REG_CLOCK_MMC, 0x000a },
1429+ { GLAMO_REG_CLOCK_ISP, 0x02aa },
1430+ { GLAMO_REG_CLOCK_JPEG, 0x000a },
1431+ { GLAMO_REG_CLOCK_3D, 0x002a },
1432+ { GLAMO_REG_CLOCK_2D, 0x002a },
1433+ //{ GLAMO_REG_CLOCK_RISC1, 0x0aaa },
1434+ //{ GLAMO_REG_CLOCK_RISC2, 0x002a },
1435+ { GLAMO_REG_CLOCK_MPEG, 0x0aaa },
1436+ { GLAMO_REG_CLOCK_MPROC, 0x02aa },
1437+ { 0xfffe, 5 },
1438+ { GLAMO_REG_PLL_GEN1, 0x061a }, /* PLL1=50MHz, OSCI=32kHz */
1439+ { GLAMO_REG_PLL_GEN3, 0x09c3 }, /* PLL2=80MHz, OSCI=32kHz */
1440+ { 0xfffe, 5 },
1441+ { GLAMO_REG_CLOCK_GEN5_1, 0x18ff },
1442+ { GLAMO_REG_CLOCK_GEN5_2, 0x051f },
1443+ { GLAMO_REG_CLOCK_GEN6, 0x2000 },
1444+ { GLAMO_REG_CLOCK_GEN7, 0x0105 },
1445+ { GLAMO_REG_CLOCK_GEN8, 0x0100 },
1446+ { GLAMO_REG_CLOCK_GEN10, 0x0017 },
1447+ { GLAMO_REG_CLOCK_GEN11, 0x0017 },
1448+
1449+ /* hostbus interface */
1450+ { GLAMO_REG_HOSTBUS(1), 0x0e00 },
1451+ { GLAMO_REG_HOSTBUS(2), 0x07ff },
1452+ { GLAMO_REG_HOSTBUS(4), 0x0080 },
1453+ { GLAMO_REG_HOSTBUS(5), 0x0244 },
1454+ { GLAMO_REG_HOSTBUS(6), 0x0600 },
1455+ { GLAMO_REG_HOSTBUS(12), 0xf00e },
1456+
1457+ /* memory */
1458+ { GLAMO_REG_MEM_TYPE, 0x0874 }, /* VRAM 8Mbyte */
1459+ { GLAMO_REG_MEM_GEN, 0xafaf },
1460+ { GLAMO_REG_MEM_TIMING(1), 0x0108 },
1461+ { GLAMO_REG_MEM_TIMING(2), 0x0010 },
1462+ { GLAMO_REG_MEM_TIMING(3), 0x0000 },
1463+ { GLAMO_REG_MEM_TIMING(4), 0x0000 },
1464+ { GLAMO_REG_MEM_TIMING(5), 0x0000 },
1465+ { GLAMO_REG_MEM_TIMING(6), 0x0000 },
1466+ { GLAMO_REG_MEM_TIMING(7), 0x0000 },
1467+ { GLAMO_REG_MEM_TIMING(8), 0x1002 },
1468+ { GLAMO_REG_MEM_TIMING(9), 0x6006 },
1469+ { GLAMO_REG_MEM_TIMING(10), 0x00ff },
1470+ { GLAMO_REG_MEM_TIMING(11), 0x0001 },
1471+ { GLAMO_REG_MEM_POWER1, 0x0020 },
1472+ { GLAMO_REG_MEM_POWRE2, 0x0000 },
1473+ { GLAMO_REG_MEM_DRAM1, 0x0000 },
1474+ { 0xfffe, 1 },
1475+ { GLAMO_REG_MEM_DRAM1, 0xc100 },
1476+ { GLAMO_REG_MEM_DRAM2, 0x01d6 },
1477+};
1478+
1479+static int glamo3362_init(void)
1480+{
1481+ int i;
1482+
1483+ for (i = 0; i < ARRAY_SIZE(gl3362_init_script); i++) {
1484+ struct glamo_reg *reg = gl3362_init_script[i];
1485+
1486+ if (reg->reg == 0xfffe)
1487+ delay(reg->val);
1488+ else
1489+ gl3362_reg_write(reg->reg, reg->val);
1490+ }
1491+ /* FIXME */
1492+}
1493+
1494+#endif /* CONFIG_VIDEO_GLAMO3362 */
1495Index: u-boot/drivers/Makefile
1496===================================================================
1497--- u-boot.orig/drivers/Makefile
1498+++ u-boot/drivers/Makefile
1499@@ -50,7 +50,7 @@
1500 usbdcore.o usbdfu.o usbdcore_ep0.o usbdcore_omap1510.o usbdcore_s3c2410.o usbtty.o \
1501 videomodes.o w83c553f.o \
1502 ks8695eth.o \
1503- pcf50606.o \
1504+ pcf50606.o pcf50633.o \
1505 pxa_pcmcia.o mpc8xx_pcmcia.o tqm8xx_pcmcia.o \
1506 rpx_pcmcia.o \
1507 fsl_i2c.o s3c2410_fb.o
1508Index: u-boot/common/cmd_nand.c
1509===================================================================
1510--- u-boot.orig/common/cmd_nand.c
1511+++ u-boot/common/cmd_nand.c
1512@@ -208,8 +208,10 @@
1513 putc('\n');
1514 for (i = 0; i < CFG_MAX_NAND_DEVICE; i++) {
1515 if (nand_info[i].name)
1516- printf("Device %d: %s, sector size %lu KiB\n",
1517+ printf("Device %d: %s, page size %lu, "
1518+ "sector size %lu KiB\n",
1519 i, nand_info[i].name,
1520+ nand_info[i].oobblock,
1521 nand_info[i].erasesize >> 10);
1522 }
1523 return 0;
1524Index: u-boot/drivers/nand/nand_ids.c
1525===================================================================
1526--- u-boot.orig/drivers/nand/nand_ids.c
1527+++ u-boot/drivers/nand/nand_ids.c
1528@@ -67,7 +67,7 @@
1529
1530 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
1531
1532- {"NAND 512MiB 3,3V 8-bit", 0xDC, 512, 512, 0x4000, 0},
1533+ //{"NAND 512MiB 3,3V 8-bit", 0xDC, 512, 512, 0x4000, 0},
1534
1535 /* These are the new chips with large page size. The pagesize
1536 * and the erasesize is determined from the extended id bytes
1537Index: u-boot/board/neo1973/common/udc.c
1538===================================================================
1539--- u-boot.orig/board/neo1973/common/udc.c
1540+++ u-boot/board/neo1973/common/udc.c
1541@@ -3,6 +3,7 @@
1542 #include <usbdcore.h>
1543 #include <s3c2410.h>
1544 #include <pcf50606.h>
1545+#include <pcf50633.h>
1546
1547 void udc_ctrl(enum usbd_event event, int param)
1548 {
1549@@ -23,6 +24,11 @@
1550 defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3) || \
1551 defined(CONFIG_ARCH_GTA01B_v4)
1552 pcf50606_charge_autofast(param);
1553+#elif defined(CONFIG_ARCH_GTA02_v1)
1554+ if (param)
1555+ pcf50633_usb_maxcurrent(500);
1556+ else
1557+ pcf50633_usb_maxcurrent(0);
1558 #endif
1559 break;
1560 default:
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-hxd8.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-hxd8.patch
new file mode 100644
index 0000000000..f85fdea836
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-hxd8.patch
@@ -0,0 +1,1169 @@
1Patch to add HXD8 support
2
3Index: u-boot/Makefile
4===================================================================
5--- u-boot.orig/Makefile
6+++ u-boot/Makefile
7@@ -2026,6 +2026,9 @@
8 qt2410_config : unconfig
9 @./mkconfig $(@:_config=) arm arm920t qt2410 NULL s3c24x0
10
11+hxd8_config : unconfig
12+ @$(MKCONFIG) $(@:_config=) arm arm920t hxd8 NULL s3c24x0
13+
14 scb9328_config : unconfig
15 @$(MKCONFIG) $(@:_config=) arm arm920t scb9328 NULL imx
16
17Index: u-boot/board/hxd8/Makefile
18===================================================================
19--- /dev/null
20+++ u-boot/board/hxd8/Makefile
21@@ -0,0 +1,65 @@
22+#
23+# (C) Copyright 2000-2006
24+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
25+#
26+# See file CREDITS for list of people who contributed to this
27+# project.
28+#
29+# This program is free software; you can redistribute it and/or
30+# modify it under the terms of the GNU General Public License as
31+# published by the Free Software Foundation; either version 2 of
32+# the License, or (at your option) any later version.
33+#
34+# This program is distributed in the hope that it will be useful,
35+# but WITHOUT ANY WARRANTY; without even the implied warranty of
36+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
37+# GNU General Public License for more details.
38+#
39+# You should have received a copy of the GNU General Public License
40+# along with this program; if not, write to the Free Software
41+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
42+# MA 02111-1307 USA
43+#
44+
45+include $(TOPDIR)/config.mk
46+
47+LIB = $(obj)lib$(BOARD).a
48+
49+COBJS := hxd8.o udc.o pcf50606.o
50+SOBJS := lowlevel_init.o
51+
52+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
53+OBJS := $(addprefix $(obj),$(COBJS))
54+SOBJS := $(addprefix $(obj),$(SOBJS))
55+
56+all: $(LIB) lowevel_foo.bin
57+
58+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
59+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
60+
61+lowlevel_foo.o: lowlevel_foo.S
62+ $(CC) -c -DTEXT_BASE=0x33F80000 -march=armv4 \
63+ -o lowlevel_foo.o lowlevel_foo.S
64+
65+lowlevel_foo: lowlevel_foo.o lowlevel_init.o lowlevel_foo.lds
66+ $(LD) -T ./lowlevel_foo.lds -Ttext 0x33f80000 -Bstatic \
67+ lowlevel_init.o lowlevel_foo.o -o lowlevel_foo
68+
69+lowevel_foo.bin: lowlevel_foo
70+ $(CROSS_COMPILE)objcopy --gap-fill=0xff -O binary \
71+ lowlevel_foo lowlevel_foo.bin
72+
73+clean:
74+ rm -f $(SOBJS) $(OBJS)
75+
76+distclean: clean
77+ rm -f $(LIB) core *.bak .depend
78+
79+#########################################################################
80+
81+# defines $(obj).depend target
82+include $(SRCTREE)/rules.mk
83+
84+sinclude $(obj).depend
85+
86+#########################################################################
87Index: u-boot/board/hxd8/hxd8.c
88===================================================================
89--- /dev/null
90+++ u-boot/board/hxd8/hxd8.c
91@@ -0,0 +1,189 @@
92+/*
93+ * (C) Copyright 2007 by OpenMoko, Inc.
94+ * Author: Harald Welte <laforge@openmoko.org>
95+ *
96+ * (C) Copyright 2002
97+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
98+ * Marius Groeger <mgroeger@sysgo.de>
99+ *
100+ * (C) Copyright 2002
101+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
102+ *
103+ * See file CREDITS for list of people who contributed to this
104+ * project.
105+ *
106+ * This program is free software; you can redistribute it and/or
107+ * modify it under the terms of the GNU General Public License as
108+ * published by the Free Software Foundation; either version 2 of
109+ * the License, or (at your option) any later version.
110+ *
111+ * This program is distributed in the hope that it will be useful,
112+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
113+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
114+ * GNU General Public License for more details.
115+ *
116+ * You should have received a copy of the GNU General Public License
117+ * along with this program; if not, write to the Free Software
118+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
119+ * MA 02111-1307 USA
120+ */
121+
122+#include <common.h>
123+#include <video_fb.h>
124+#include <nand.h>
125+#include <pcf50606.h>
126+#include <s3c2440.h>
127+
128+DECLARE_GLOBAL_DATA_PTR;
129+
130+#define FCLK_SPEED 1
131+
132+#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */
133+#define M_MDIV 0xC3
134+#define M_PDIV 0x4
135+#define M_SDIV 0x1
136+#elif FCLK_SPEED==1
137+#if 0
138+#define M_MDIV 0x6e /* Fout = 399.65MHz */
139+#define M_PDIV 0x3
140+#define M_SDIV 0x1
141+#else
142+#define M_MDIV 0x61 /* Fout = 296.35MHz due to wrong PLL capacitors */
143+#define M_PDIV 0x1
144+#define M_SDIV 0x2
145+#endif
146+#endif
147+
148+#define USB_CLOCK 1
149+
150+#if USB_CLOCK==0
151+#define U_M_MDIV 0xA1
152+#define U_M_PDIV 0x3
153+#define U_M_SDIV 0x1
154+#elif USB_CLOCK==1
155+#define U_M_MDIV 0x3c
156+#define U_M_PDIV 0x4
157+#define U_M_SDIV 0x2
158+#endif
159+
160+static inline void delay (unsigned long loops)
161+{
162+ __asm__ volatile ("1:\n"
163+ "subs %0, %1, #1\n"
164+ "bne 1b":"=r" (loops):"0" (loops));
165+}
166+
167+/*
168+ * Miscellaneous platform dependent initialisations
169+ */
170+
171+int board_init (void)
172+{
173+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
174+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
175+
176+ /* to reduce PLL lock time, adjust the LOCKTIME register */
177+ clk_power->LOCKTIME = 0xFFFFFF;
178+
179+ /* configure MPLL */
180+ clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
181+
182+ /* some delay between MPLL and UPLL */
183+ delay (4000);
184+
185+ /* configure UPLL */
186+ clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
187+
188+ /* some delay between MPLL and UPLL */
189+ delay (8000);
190+
191+ /* set up the I/O ports */
192+ gpio->GPACON = 0x005E0FFE;
193+ gpio->GPADAT = 0x0001C000;
194+ gpio->GPBCON = 0x00045542;
195+ gpio->GPBUP = 0x000007FF;
196+ gpio->GPCCON = 0xAAAA02A9;
197+ gpio->GPCUP = 0x0000FFFF;
198+ gpio->GPDCON = 0xAAAAAAAA;
199+ gpio->GPDUP = 0x0000FFFF;
200+ gpio->GPECON = 0xAAAAAAAA;
201+ gpio->GPEUP = 0x0000FFFF;
202+ gpio->GPFCON = 0x0000AAA9;
203+ gpio->GPFUP = 0x000000FF;
204+ gpio->GPGCON = 0x027D0316;
205+ gpio->GPGUP = 0x0000FFFF;
206+ gpio->GPHCON = 0x0014AAAA;
207+ gpio->GPHUP = 0x000007FF;
208+ gpio->GPJCON = 0x00000000;
209+
210+ /* USB CHG enable */
211+ gpio->GPGDAT |= ( 1 << 11);
212+#if 0
213+ /* USB Device Part */
214+ /*GPGCON is reset for USB Device */
215+ gpio->GPGCON = (gpio->GPGCON & ~(3 << 24)) | (1 << 24); /* Output Mode */
216+ gpio->GPGUP = gpio->GPGUP | ( 1 << 12); /* Pull up disable */
217+
218+ gpio->GPGDAT |= ( 1 << 12);
219+ gpio->GPGDAT &= ~( 1 << 12);
220+ udelay(20000);
221+ gpio->GPGDAT |= ( 1 << 12);
222+#endif
223+
224+ /* arch number of SMDK2440-Board */
225+ gd->bd->bi_arch_number = MACH_TYPE_HXD8;
226+
227+ /* adress of boot parameters */
228+ gd->bd->bi_boot_params = 0x30000100;
229+
230+ icache_enable();
231+ dcache_enable();
232+
233+ return 0;
234+}
235+
236+void board_video_init(GraphicDevice *pGD)
237+{
238+ S3C24X0_LCD * const lcd = S3C24X0_GetBase_LCD();
239+
240+ lcd->LCDCON1 = 0x0000057b;
241+ lcd->LCDCON2 = 0x0143c049;
242+ lcd->LCDCON3 = 0x0009df01;
243+ lcd->LCDCON4 = 0x00000028;
244+ lcd->LCDCON5 = 0x00000b08;
245+
246+ lcd->TPAL = 0x01202020;
247+
248+ //lcd->LCDCON5 |= (0x01 << 3);
249+}
250+
251+int board_late_init(void)
252+{
253+ /* Initialize the Power Management Unit with a safe register set */
254+ pcf50606_init();
255+
256+ return 0;
257+}
258+
259+int dram_init(void)
260+{
261+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
262+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
263+
264+ return 0;
265+}
266+
267+u_int32_t get_board_rev(void)
268+{
269+ return 0x00000110;
270+}
271+
272+/* The sum of all part_size[]s must equal to the NAND size, i.e., 0x4000000.
273+ "initrd" is sized such that it can hold two uncompressed 16 bit 640*480
274+ images: 640*480*2*2 = 1228800 < 1245184. */
275+
276+unsigned int dynpart_size[] = {
277+ CFG_UBOOT_SIZE, 0x20000, 0x200000, 0xa0000, 0x3fd00000, 0 };
278+char *dynpart_names[] = {
279+ "u-boot", "u-boot_env", "kernel", "splash", "rootfs", NULL };
280+
281Index: u-boot/board/hxd8/lowlevel_init.S
282===================================================================
283--- /dev/null
284+++ u-boot/board/hxd8/lowlevel_init.S
285@@ -0,0 +1,171 @@
286+/*
287+ * Memory Setup stuff - taken from blob memsetup.S
288+ *
289+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
290+ * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
291+ *
292+ * Modified for the FIC HXD8 by Harald Welte <laforge@openmoko.org>
293+ * (C) Copyright 2007 by OpenMoko, Inc.
294+ *
295+ * See file CREDITS for list of people who contributed to this
296+ * project.
297+ *
298+ * This program is free software; you can redistribute it and/or
299+ * modify it under the terms of the GNU General Public License as
300+ * published by the Free Software Foundation; either version 2 of
301+ * the License, or (at your option) any later version.
302+ *
303+ * This program is distributed in the hope that it will be useful,
304+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
305+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
306+ * GNU General Public License for more details.
307+ *
308+ * You should have received a copy of the GNU General Public License
309+ * along with this program; if not, write to the Free Software
310+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
311+ * MA 02111-1307 USA
312+ */
313+
314+
315+#include <config.h>
316+#include <version.h>
317+
318+
319+/* some parameters for the board */
320+
321+/*
322+ *
323+ * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
324+ *
325+ * Copyright (C) 2002 Samsung Electronics SW.LEE <hitchcar@sec.samsung.com>
326+ *
327+ */
328+
329+#define BWSCON 0x48000000
330+
331+/* BWSCON */
332+#define DW8 (0x0)
333+#define DW16 (0x1)
334+#define DW32 (0x2)
335+#define WAIT (0x1<<2)
336+#define UBLB (0x1<<3)
337+
338+#define B1_BWSCON (DW32)
339+#define B2_BWSCON (DW16)
340+#define B3_BWSCON (DW16 + WAIT + UBLB)
341+#define B4_BWSCON (DW16)
342+#define B5_BWSCON (DW16)
343+#define B6_BWSCON (DW32)
344+#define B7_BWSCON (DW32)
345+
346+/* BANK0CON */
347+#define B0_Tacs 0x0 /* 0clk */
348+#define B0_Tcos 0x0 /* 0clk */
349+#define B0_Tacc 0x7 /* 14clk */
350+#define B0_Tcoh 0x0 /* 0clk */
351+#define B0_Tah 0x0 /* 0clk */
352+#define B0_Tacp 0x0
353+#define B0_PMC 0x0 /* normal */
354+
355+/* BANK1CON */
356+#define B1_Tacs 0x0 /* 0clk */
357+#define B1_Tcos 0x0 /* 0clk */
358+#define B1_Tacc 0x7 /* 14clk */
359+#define B1_Tcoh 0x0 /* 0clk */
360+#define B1_Tah 0x0 /* 0clk */
361+#define B1_Tacp 0x0
362+#define B1_PMC 0x0
363+
364+#define B2_Tacs 0x0
365+#define B2_Tcos 0x0
366+#define B2_Tacc 0x7
367+#define B2_Tcoh 0x0
368+#define B2_Tah 0x0
369+#define B2_Tacp 0x0
370+#define B2_PMC 0x0
371+
372+#define B3_Tacs 0x0 /* 0clk */
373+#define B3_Tcos 0x3 /* 4clk */
374+#define B3_Tacc 0x7 /* 14clk */
375+#define B3_Tcoh 0x1 /* 1clk */
376+#define B3_Tah 0x0 /* 0clk */
377+#define B3_Tacp 0x3 /* 6clk */
378+#define B3_PMC 0x0 /* normal */
379+
380+#define B4_Tacs 0x0 /* 0clk */
381+#define B4_Tcos 0x0 /* 0clk */
382+#define B4_Tacc 0x7 /* 14clk */
383+#define B4_Tcoh 0x0 /* 0clk */
384+#define B4_Tah 0x0 /* 0clk */
385+#define B4_Tacp 0x0
386+#define B4_PMC 0x0 /* normal */
387+
388+#define B5_Tacs 0x0 /* 0clk */
389+#define B5_Tcos 0x0 /* 0clk */
390+#define B5_Tacc 0x7 /* 14clk */
391+#define B5_Tcoh 0x0 /* 0clk */
392+#define B5_Tah 0x0 /* 0clk */
393+#define B5_Tacp 0x0
394+#define B5_PMC 0x0 /* normal */
395+
396+#define B6_MT 0x3 /* SDRAM */
397+#define B6_Trcd 0x1 /* 3clk */
398+#define B6_SCAN 0x2 /* 10bit */
399+
400+#define B7_MT 0x3 /* SDRAM */
401+#define B7_Trcd 0x1 /* 3clk */
402+#define B7_SCAN 0x1 /* 9bit */
403+
404+/* REFRESH parameter */
405+#define REFEN 0x1 /* Refresh enable */
406+#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */
407+#define Trp 0x1 /* 3clk */
408+#define Trc 0x3 /* 7clk */
409+#define Tchr 0x2 /* 3clk */
410+#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */
411+/**************************************/
412+
413+_TEXT_BASE:
414+ .word TEXT_BASE
415+
416+.globl lowlevel_init
417+lowlevel_init:
418+ /* memory control configuration */
419+ /* make r0 relative the current location so that it */
420+ /* reads SMRDATA out of FLASH rather than memory ! */
421+ ldr r0, =SMRDATA
422+ ldr r1, _TEXT_BASE
423+ sub r0, r0, r1
424+ ldr r1, =BWSCON /* Bus Width Status Controller */
425+ add r2, r0, #13*4
426+0:
427+ ldr r3, [r0], #4
428+ str r3, [r1], #4
429+ cmp r2, r0
430+ bne 0b
431+
432+ /* setup asynchronous bus mode */
433+ mrc p15, 0, r1 ,c1 ,c0, 0
434+ orr r1, r1, #0xc0000000
435+ mcr p15, 0, r1, c1, c0, 0
436+
437+ /* everything is fine now */
438+ mov pc, lr
439+
440+ .ltorg
441+/* the literal pools origin */
442+
443+SMRDATA:
444+ .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
445+ .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))
446+ .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))
447+ .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))
448+ .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))
449+ .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))
450+ .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))
451+ .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
452+ .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
453+ .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
454+ .word 0x32
455+ .word 0x30
456+ .word 0x30
457Index: u-boot/include/configs/hxd8.h
458===================================================================
459--- /dev/null
460+++ u-boot/include/configs/hxd8.h
461@@ -0,0 +1,277 @@
462+/*
463+ * (C) Copyright 2007 OpenMoko, Inc.
464+ * Author: Harald Welte <laforge@openmoko.org>
465+ *
466+ * Configuation settings for the FIC HXD8
467+ *
468+ * See file CREDITS for list of people who contributed to this
469+ * project.
470+ *
471+ * This program is free software; you can redistribute it and/or
472+ * modify it under the terms of the GNU General Public License as
473+ * published by the Free Software Foundation; either version 2 of
474+ * the License, or (at your option) any later version.
475+ *
476+ * This program is distributed in the hope that it will be useful,
477+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
478+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
479+ * GNU General Public License for more details.
480+ *
481+ * You should have received a copy of the GNU General Public License
482+ * along with this program; if not, write to the Free Software
483+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
484+ * MA 02111-1307 USA
485+ */
486+
487+#ifndef __CONFIG_H
488+#define __CONFIG_H
489+
490+/* we want to be able to start u-boot directly from within NAND flash */
491+#define CONFIG_LL_INIT_NAND_ONLY
492+#define CONFIG_S3C2410_NAND_BOOT 1
493+#define CONFIG_S3C2410_NAND_SKIP_BAD 1
494+
495+#define CFG_UBOOT_SIZE 0x40000 /* size of u-boot, for NAND loading */
496+
497+/*
498+ * High Level Configuration Options
499+ * (easy to change)
500+ */
501+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
502+#define CONFIG_S3C2440 1 /* in a SAMSUNG S3C2440 SoC */
503+#define CONFIG_SMDK2440 1 /* on a SAMSUNG SMDK2440 Board */
504+#define CONFIG_HXD8 1 /* on a FIC HXD8 Board */
505+
506+/* input clock of PLL */
507+#define CONFIG_SYS_CLK_FREQ 16934400/* the HXD8 has this input clock */
508+
509+
510+#define USE_920T_MMU 1
511+#define CONFIG_USE_IRQ 1
512+
513+/*
514+ * Size of malloc() pool
515+ */
516+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 2048*1024)
517+ /* >> CFG_VIDEO_LOGO_MAX_SIZE */
518+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
519+
520+/*
521+ * Hardware drivers
522+ */
523+
524+/*
525+ * select serial console configuration
526+ */
527+#define CONFIG_SERIAL3 1 /* we use SERIAL 3 on HXD8 */
528+
529+/************************************************************
530+ * RTC
531+ ************************************************************/
532+#define CONFIG_RTC_S3C24X0 1
533+
534+/* allow to overwrite serial and ethaddr */
535+#define CONFIG_ENV_OVERWRITE
536+
537+#define CONFIG_BAUDRATE 115200
538+
539+/***********************************************************
540+ * Command definition
541+ ***********************************************************/
542+#define CONFIG_COMMANDS (\
543+ CFG_CMD_BDI | \
544+ CFG_CMD_LOADS | \
545+ CFG_CMD_LAODB | \
546+ CFG_CMD_IMI | \
547+ CFG_CMD_CACHE | \
548+ CFG_CMD_MEMORY | \
549+ CFG_CMD_ENV | \
550+ /* CFG_CMD_IRQ | */ \
551+ CFG_CMD_BOOTD | \
552+ CFG_CMD_CONSOLE | \
553+ /* CFG_CMD_BMP | */ \
554+ CFG_CMD_ASKENV | \
555+ CFG_CMD_RUN | \
556+ CFG_CMD_ECHO | \
557+ CFG_CMD_I2C | \
558+ CFG_CMD_REGINFO | \
559+ CFG_CMD_IMMAP | \
560+ CFG_CMD_DATE | \
561+ CFG_CMD_AUTOSCRIPT | \
562+ CFG_CMD_BSP | \
563+ CFG_CMD_ELF | \
564+ CFG_CMD_MISC | \
565+ /* CFG_CMD_USB | */ \
566+ CFG_CMD_JFFS2 | \
567+ CFG_CMD_DIAG | \
568+ /* CFG_CMD_HWFLOW | */ \
569+ CFG_CMD_SAVES | \
570+ CFG_CMD_NAND | \
571+ CFG_CMD_PORTIO | \
572+ CFG_CMD_MMC | \
573+ CFG_CMD_FAT | \
574+ CFG_CMD_EXT2 | \
575+ 0)
576+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
577+#include <cmd_confdefs.h>
578+
579+#define CONFIG_BOOTDELAY 3
580+#define CONFIG_BOOTARGS ""
581+#define CONFIG_BOOTCOMMAND "setenv bootargs ${bootargs_base} ${mtdparts}; nand read.e 0x32000000 kernel; bootm 0x32000000"
582+
583+#define CONFIG_DOS_PARTITION 1
584+
585+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
586+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
587+/* what's this ? it's not used anywhere */
588+#define CONFIG_KGDB_SER_INDEX 3 /* which serial port to use */
589+#endif
590+
591+/*
592+ * Miscellaneous configurable options
593+ */
594+#define CFG_LONGHELP /* undef to save memory */
595+#define CFG_PROMPT "HXD8 # " /* Monitor Command Prompt */
596+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
597+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
598+#define CFG_MAXARGS 64 /* max number of command args */
599+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
600+
601+#define CFG_MEMTEST_START 0x30000000 /* memtest works on */
602+#define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
603+
604+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
605+
606+#define CFG_LOAD_ADDR 0x33000000 /* default load address */
607+
608+/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
609+/* it to wrap 100 times (total 1562500) to get 1 sec. */
610+#define CFG_HZ 1562500
611+
612+/* valid baudrates */
613+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
614+
615+/*-----------------------------------------------------------------------
616+ * Stack sizes
617+ *
618+ * The stack sizes are set up in start.S using the settings below
619+ */
620+#define CONFIG_STACKSIZE (512*1024) /* regular stack */
621+#ifdef CONFIG_USE_IRQ
622+#define CONFIG_STACKSIZE_IRQ (8*1024) /* IRQ stack */
623+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
624+#endif
625+
626+#if 0
627+#define CONFIG_USB_OHCI 1
628+#endif
629+
630+#if 1
631+#define CONFIG_USB_DEVICE 1
632+#define CONFIG_USB_TTY 1
633+#define CFG_CONSOLE_IS_IN_ENV 1
634+#define CONFIG_USBD_VENDORID 0x1457 /* Linux/NetChip */
635+#define CONFIG_USBD_PRODUCTID_GSERIAL 0x5120 /* gserial */
636+#define CONFIG_USBD_PRODUCTID_CDCACM 0x511a /* CDC ACM */
637+#define CONFIG_USBD_MANUFACTURER "OpenMoko, Inc"
638+#define CONFIG_USBD_PRODUCT_NAME "HXD8 Bootloader " U_BOOT_VERSION
639+#define CONFIG_USBD_DFU 1
640+#define CONFIG_USBD_DFU_XFER_SIZE 4096 /* 0x4000 */
641+#define CONFIG_USBD_DFU_INTERFACE 2
642+#endif
643+#define CFG_CONSOLE_IS_IN_ENV 1
644+
645+#define CONFIG_EXTRA_ENV_SETTINGS \
646+ "usbtty=cdc_acm\0" \
647+ "bootargs_base=rootfstype=jffs2 root=/dev/mtdblock4 console=ttySAC2,115200 console=tty0 loglevel=8\0" \
648+ ""
649+
650+/*-----------------------------------------------------------------------
651+ * Physical Memory Map
652+ */
653+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
654+#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
655+#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
656+#define PHYS_SDRAM_RES_SIZE 0x00200000 /* 2 MB for frame buffer */
657+
658+/*-----------------------------------------------------------------------
659+ * FLASH and environment organization
660+ */
661+
662+/* No NOR flash in this device */
663+#define CFG_NO_FLASH 1
664+
665+#define CFG_ENV_SIZE 0x20000 /* 128k Total Size of Environment Sector */
666+#define CFG_ENV_IS_IN_NAND 1
667+#define CFG_ENV_OFFSET_OOB 1 /* Location of ENV stored in block 0 OOB */
668+#define CFG_PREBOOT_OVERRIDE 1 /* allow preboot from memory */
669+
670+#define NAND_MAX_CHIPS 3
671+#define CFG_NAND_BASE 0x4e000000
672+#define CFG_MAX_NAND_DEVICE NAND_MAX_CHIPS
673+#define CFG_NAND_BASE_LIST { CFG_NAND_BASE, CFG_NAND_BASE, CFG_NAND_BASE }
674+
675+#define CONFIG_MMC 1
676+#define CFG_MMC_BASE 0xff000000
677+
678+/* EXT2 driver */
679+#define CONFIG_EXT2 1
680+
681+#define CONFIG_FAT 1
682+#define CONFIG_SUPPORT_VFAT
683+
684+#if 1
685+/* JFFS2 driver */
686+#define CONFIG_JFFS2_CMDLINE 1
687+#define CONFIG_JFFS2_NAND 1
688+#define CONFIG_JFFS2_NAND_DEV 0
689+//#define CONFIG_JFFS2_NAND_OFF 0x634000
690+//#define CONFIG_JFFS2_NAND_SIZE 0x39cc000
691+#endif
692+
693+/* ATAG configuration */
694+#define CONFIG_INITRD_TAG 1
695+#define CONFIG_SETUP_MEMORY_TAGS 1
696+#define CONFIG_CMDLINE_TAG 1
697+#define CONFIG_REVISION_TAG 1
698+#if 0
699+#define CONFIG_SERIAL_TAG 1
700+#endif
701+
702+#define CONFIG_DRIVER_S3C24X0_I2C 1
703+#define CONFIG_HARD_I2C 1
704+#define CFG_I2C_SPEED 400000 /* 400kHz according to PCF50606 data sheet */
705+#define CFG_I2C_SLAVE 0x7f
706+
707+/* we have a board_late_init() function */
708+#define BOARD_LATE_INIT 1
709+
710+#if 1
711+#define CONFIG_VIDEO
712+#define CONFIG_VIDEO_S3C2410
713+#define CONFIG_CFB_CONSOLE
714+#define CONFIG_VIDEO_LOGO
715+#define CONFIG_SPLASH_SCREEN
716+#define CFG_VIDEO_LOGO_MAX_SIZE (640*480+1024+100) /* 100 = slack */
717+#define CONFIG_VIDEO_BMP_GZIP
718+#define CONFIG_VGA_AS_SINGLE_DEVICE
719+#define CONFIG_UNZIP
720+
721+#define VIDEO_KBD_INIT_FCT 0
722+#define VIDEO_TSTC_FCT serial_tstc
723+#define VIDEO_GETC_FCT serial_getc
724+
725+#define LCD_VIDEO_ADDR 0x33d00000
726+#endif
727+
728+#define CONFIG_S3C2410_NAND_BBT 1
729+//#define CONFIG_S3C2410_NAND_HWECC 1
730+
731+#define CONFIG_DRIVER_PCF50606 1
732+
733+#define MTDIDS_DEFAULT "nand0=hxd8-nand"
734+#define MTPARTS_DEFAULT "hxd8-nand:256k(u-boot),128k(u-boot_env),2M(kernel),640k(splash),0x3fd00000(jffs2)"
735+#define CFG_NAND_DYNPART_MTD_KERNEL_NAME "hxd8-nand"
736+#define CONFIG_NAND_DYNPART
737+
738+#endif /* __CONFIG_H */
739Index: u-boot/board/hxd8/udc.c
740===================================================================
741--- /dev/null
742+++ u-boot/board/hxd8/udc.c
743@@ -0,0 +1,30 @@
744+
745+#include <common.h>
746+#include <usbdcore.h>
747+#include <s3c2440.h>
748+
749+#if defined(CONFIG_USB_DEVICE)
750+
751+void udc_ctrl(enum usbd_event event, int param)
752+{
753+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
754+
755+ switch (event) {
756+ case UDC_CTRL_PULLUP_ENABLE:
757+ if (param)
758+ gpio->GPBDAT |= (1 << 9); /* GPB9 */
759+ else
760+ gpio->GPBDAT &= ~(1 << 9); /* GPB9 */
761+ break;
762+ case UDC_CTRL_500mA_ENABLE:
763+ if (param)
764+ gpio->GPADAT |= (1 << 0); /* GPA0 */
765+ else
766+ gpio->GPADAT &= ~(1 << 0); /* GPA0 */
767+ break;
768+ default:
769+ break;
770+ }
771+}
772+
773+#endif /* CONFIG_USB_DEVICE */
774Index: u-boot/board/hxd8/pcf50606.c
775===================================================================
776--- /dev/null
777+++ u-boot/board/hxd8/pcf50606.c
778@@ -0,0 +1,67 @@
779+
780+#include <common.h>
781+#include <pcf50606.h>
782+
783+/* initial register set for PCF50606 in HXD8 devices */
784+const u_int8_t pcf50606_initial_regs[__NUM_PCF50606_REGS] = {
785+ [PCF50606_REG_OOCS] = 0x00,
786+ /* gap */
787+ [PCF50606_REG_INT1M] = PCF50606_INT1_SECOND,
788+ [PCF50606_REG_INT2M] = PCF50606_INT2_CHGFOK |
789+ PCF50606_INT2_CHGERR |
790+ PCF50606_INT2_CHGFRDY |
791+ PCF50606_INT2_CHGPROT |
792+ PCF50606_INT2_CHGWD10S |
793+ PCF50606_INT2_CHGWDEXP,
794+ [PCF50606_REG_INT3M] = PCF50606_INT3_TSCPRES,
795+ [PCF50606_REG_OOCC1] = PCF50606_OOCC1_RTCWAK |
796+ PCF50606_OOCC1_CHGWAK &
797+ PCF50606_OOCC1_EXTONWAK_NO_WAKEUP,
798+ [PCF50606_REG_OOCC2] = PCF50606_OOCC2_ONKEYDB_14ms |
799+ PCF50606_OOCC2_EXTONDB_14ms,
800+ /* gap */
801+ [PCF50606_REG_PSSC] = 0x00,
802+ [PCF50606_REG_PWROKM] = 0x00,
803+ /* gap */
804+ [PCF50606_REG_DCDC1] = 0xf0, /* CORE_1V3: on */
805+ [PCF50606_REG_DCDC2] = 0x00,
806+ [PCF50606_REG_DCDC3] = 0x00,
807+ [PCF50606_REG_DCDC4] = 0x30, /* 1.25A */
808+
809+ [PCF50606_REG_DCDEC1] = 0xe8, /* IO1_3V3: off */
810+ [PCF50606_REG_DCDEC2] = 0x00,
811+
812+ [PCF50606_REG_DCUDC1] = 0x08, /* RF_3V3: off */
813+ [PCF50606_REG_DCUDC2] = 0x30, /* 1.25A current limit */
814+
815+ [PCF50606_REG_IOREGC] = 0xf8, /* AUDIO_3V3: on */
816+
817+ [PCF50606_REG_D1REGC1] = 0xf8, /* RC_3V3: on */
818+
819+ [PCF50606_REG_D2REGC1] = 0x18, /* GPS_3V3: off */
820+
821+ [PCF50606_REG_D3REGC1] = 0xf8, /* IO2_3V3: off */
822+
823+ [PCF50606_REG_LPREGC1] = 0xf8, /* LCM_3V3: on */
824+ [PCF50606_REG_LPREGC2] = 0x00,
825+
826+ [PCF50606_REG_MBCC1] = 0x00, /* charger unused */
827+ [PCF50606_REG_MBCC2] = 0x00, /* unlimited charging */
828+ [PCF50606_REG_MBCC3] = 0x1a, /* 0.2*Ifast, 4.20V */
829+ [PCF50606_REG_BBCC] = 0x1f, /* 400uA */
830+ [PCF50606_REG_ADCC1] = 0x00,
831+ [PCF50606_REG_ADCC2] = 0x00,
832+ /* gap */
833+ [PCF50606_REG_ACDC1] = 0x00,
834+ [PCF50606_REG_BVMC] = PCF50606_BVMC_THRSHLD_3V3,
835+ [PCF50606_REG_PWMC1] = 0x1f, /* clock: 512 DC: 15/16*/
836+ [PCF50606_REG_LEDC1] = 0x00,
837+ [PCF50606_REG_LEDC2] = 0x00,
838+ [PCF50606_REG_GPOC1] = 0x03, /* PWM ACTIVE */
839+ [PCF50606_REG_GPOC2] = 0x07, /* back light pull low */
840+ [PCF50606_REG_GPOC3] = 0x00,
841+ [PCF50606_REG_GPOC4] = 0x00,
842+ [PCF50606_REG_GPOC5] = 0x00,
843+};
844+
845+
846Index: u-boot/board/hxd8/config.mk
847===================================================================
848--- /dev/null
849+++ u-boot/board/hxd8/config.mk
850@@ -0,0 +1,27 @@
851+#
852+# (C) Copyright 2002
853+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
854+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
855+#
856+# FIC HXD8 board with S3C2440X (ARM920T) cpu
857+#
858+# see http://www.samsung.com/ for more information on SAMSUNG
859+#
860+
861+CONFIG_USB_DFU_VENDOR=0x1457
862+CONFIG_USB_DFU_PRODUCT=0x511a
863+CONFIG_USB_DFU_REVISION=0x0100
864+
865+#
866+# HXD81v011 or later has 1 bank of 128 MB SDRAM
867+#
868+# 3000'0000 to 3800'0000
869+# we load ourself to 37F8'0000
870+#
871+# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000
872+# optionally with a ramdisk at 3080'0000
873+#
874+# download area is 3200'0000 or 3300'0000
875+
876+# FIXME: TEXT_BASE = 0x37F80000
877+TEXT_BASE = 0x33F80000
878Index: u-boot/board/hxd8/u-boot.lds
879===================================================================
880--- /dev/null
881+++ u-boot/board/hxd8/u-boot.lds
882@@ -0,0 +1,58 @@
883+/*
884+ * (C) Copyright 2002
885+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
886+ *
887+ * See file CREDITS for list of people who contributed to this
888+ * project.
889+ *
890+ * This program is free software; you can redistribute it and/or
891+ * modify it under the terms of the GNU General Public License as
892+ * published by the Free Software Foundation; either version 2 of
893+ * the License, or (at your option) any later version.
894+ *
895+ * This program is distributed in the hope that it will be useful,
896+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
897+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
898+ * GNU General Public License for more details.
899+ *
900+ * You should have received a copy of the GNU General Public License
901+ * along with this program; if not, write to the Free Software
902+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
903+ * MA 02111-1307 USA
904+ */
905+
906+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
907+/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
908+OUTPUT_ARCH(arm)
909+ENTRY(_start)
910+SECTIONS
911+{
912+ . = 0x00000000;
913+
914+ . = ALIGN(4);
915+ .text :
916+ {
917+ cpu/arm920t/start.o (.text)
918+ cpu/arm920t/s3c24x0/nand_read.o (.text)
919+ *(.text)
920+ }
921+
922+ . = ALIGN(4);
923+ .rodata : { *(.rodata) }
924+
925+ . = ALIGN(4);
926+ .data : { *(.data) }
927+
928+ . = ALIGN(4);
929+ .got : { *(.got) }
930+
931+ . = .;
932+ __u_boot_cmd_start = .;
933+ .u_boot_cmd : { *(.u_boot_cmd) }
934+ __u_boot_cmd_end = .;
935+
936+ . = ALIGN(4);
937+ __bss_start = .;
938+ .bss : { *(.bss) }
939+ _end = .;
940+}
941Index: u-boot/board/hxd8/lowlevel_foo.S
942===================================================================
943--- /dev/null
944+++ u-boot/board/hxd8/lowlevel_foo.S
945@@ -0,0 +1,87 @@
946+
947+_start:
948+ b reset
949+undefvec:
950+ b undefvec
951+swivec:
952+ b swivec
953+pabtvec:
954+ b pabtvec
955+dabtvec:
956+ b dabtvec
957+rsvdvec:
958+ b rsvdvec
959+irqvec:
960+ b irqvec
961+fiqvec:
962+ b fiqvec
963+
964+reset:
965+ /*
966+ * set the cpu to SVC32 mode
967+ */
968+ mrs r0,cpsr
969+ bic r0,r0,#0x1f
970+ orr r0,r0,#0xd3
971+ msr cpsr,r0
972+
973+/* turn off the watchdog */
974+#define pWTCON 0x53000000
975+#define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
976+#define INTSUBMSK 0x4A00001C
977+#define CLKDIVN 0x4C000014 /* clock divisor register */
978+#define CAMDIVN 0x4C000018
979+
980+ ldr r0, =pWTCON
981+ mov r1, #0x0
982+ str r1, [r0]
983+
984+ mov r1, #0xffffffff
985+ ldr r0, =INTMSK
986+ str r1, [r0]
987+ ldr r1, =0x7ff
988+ ldr r0, =INTSUBMSK
989+ str r1, [r0]
990+
991+ /* FCLK:HCLK:PCLK = 1:3:6 */
992+ ldr r0, =CAMDIVN
993+ mov r1, #0
994+ str r1, [r0]
995+
996+ /* FCLK:HCLK:PCLK = 1:3:6 */
997+ ldr r0, =CLKDIVN
998+ mov r1, #7
999+ str r1, [r0]
1000+
1001+ bl cpu_init_crit
1002+ ldr r0,=TEXT_BASE
1003+ mov pc, r0
1004+
1005+cpu_init_crit:
1006+ /*
1007+ * flush v4 I/D caches
1008+ */
1009+ mov r0, #0
1010+ mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
1011+ mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
1012+
1013+ /*
1014+ * disable MMU stuff and caches
1015+ */
1016+ mrc p15, 0, r0, c1, c0, 0
1017+ bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
1018+ bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
1019+ orr r0, r0, #0x00000002 @ set bit 2 (A) Align
1020+ orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
1021+ mcr p15, 0, r0, c1, c0, 0
1022+
1023+ /*
1024+ * before relocating, we have to setup RAM timing
1025+ * because memory timing is board-dependend, you will
1026+ * find a lowlevel_init.S in your board directory.
1027+ */
1028+ mov ip, lr
1029+ bl lowlevel_init
1030+ mov lr, ip
1031+ mov pc, lr
1032+
1033Index: u-boot/board/hxd8/lowlevel_foo.lds
1034===================================================================
1035--- /dev/null
1036+++ u-boot/board/hxd8/lowlevel_foo.lds
1037@@ -0,0 +1,56 @@
1038+/*
1039+ * (C) Copyright 2002
1040+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
1041+ *
1042+ * See file CREDITS for list of people who contributed to this
1043+ * project.
1044+ *
1045+ * This program is free software; you can redistribute it and/or
1046+ * modify it under the terms of the GNU General Public License as
1047+ * published by the Free Software Foundation; either version 2 of
1048+ * the License, or (at your option) any later version.
1049+ *
1050+ * This program is distributed in the hope that it will be useful,
1051+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1052+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1053+ * GNU General Public License for more details.
1054+ *
1055+ * You should have received a copy of the GNU General Public License
1056+ * along with this program; if not, write to the Free Software
1057+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1058+ * MA 02111-1307 USA
1059+ */
1060+
1061+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
1062+OUTPUT_ARCH(arm)
1063+ENTRY(_start)
1064+SECTIONS
1065+{
1066+ . = 0x00000000;
1067+
1068+ . = ALIGN(4);
1069+ .text :
1070+ {
1071+ lowlevel_foo.o (.text)
1072+ *(.text)
1073+ }
1074+
1075+ . = ALIGN(4);
1076+ .rodata : { *(.rodata) }
1077+
1078+ . = ALIGN(4);
1079+ .data : { *(.data) }
1080+
1081+ . = ALIGN(4);
1082+ .got : { *(.got) }
1083+
1084+ . = .;
1085+ __u_boot_cmd_start = .;
1086+ .u_boot_cmd : { *(.u_boot_cmd) }
1087+ __u_boot_cmd_end = .;
1088+
1089+ . = ALIGN(4);
1090+ __bss_start = .;
1091+ .bss : { *(.bss) }
1092+ _end = .;
1093+}
1094Index: u-boot/cpu/arm920t/s3c24x0/nand.c
1095===================================================================
1096--- u-boot.orig/cpu/arm920t/s3c24x0/nand.c
1097+++ u-boot/cpu/arm920t/s3c24x0/nand.c
1098@@ -83,6 +83,59 @@
1099 #define NFDATA __REGb(NF_BASE + oNFDATA)
1100 #define NFSTAT __REGb(NF_BASE + oNFSTAT)
1101
1102+#if defined(CONFIG_HXD8)
1103+static int hxd8_nand_dev_ready(struct mtd_info *mtd)
1104+{
1105+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
1106+ u_int32_t val = gpio->GPCDAT;
1107+
1108+ switch (nand_curr_device) {
1109+ case 0:
1110+ return (NFSTAT & 0x01);
1111+ case 1: /* RnB 3 */
1112+ return ((val>>6) & 0x01);
1113+ case 2: /* RnB 4 */
1114+ return ((val>>7) & 0x01);
1115+ case 3: /* RnB 2 */
1116+ return ((val>>5) & 0x01);
1117+ default:
1118+ return 0;
1119+ }
1120+}
1121+
1122+/* 4G Nand flash chip select function */
1123+static void hxd8_nand_select_chip(struct nand_chip *this, int chip)
1124+{
1125+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
1126+
1127+ if (chip == 0)
1128+ gpio->GPGDAT &= ~(1 << 1);
1129+ else
1130+ gpio->GPGDAT |= (1 << 1);
1131+
1132+ if (chip == 1)
1133+ gpio->GPADAT &= ~(1 << 15);
1134+ else
1135+ gpio->GPADAT |= (1 << 15);
1136+
1137+ if (chip == 2)
1138+ gpio->GPADAT &= ~(1 << 16);
1139+ else
1140+ gpio->GPADAT |= (1 << 16);
1141+
1142+ if (chip == 3)
1143+ gpio->GPADAT &= ~(1 << 14);
1144+ else
1145+ gpio->GPADAT |= (1 << 14);
1146+
1147+ /* UGLY: ew don't have mtd_info pointer, but know that
1148+ * s3c24xx hwcontrol function does not use it for CLRNCE */
1149+ if (chip == -1)
1150+ this->hwcontrol(NULL, NAND_CTL_CLRNCE);
1151+ else
1152+ this->hwcontrol(NULL, NAND_CTL_SETNCE);
1153+}
1154+#endif
1155
1156 static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd)
1157 {
1158@@ -251,6 +304,11 @@
1159 nand->eccmode = NAND_ECC_SOFT;
1160 #endif
1161
1162+#if defined(CONFIG_HXD8)
1163+ nand->dev_ready = hxd8_nand_dev_ready;
1164+ nand->select_chip = hxd8_nand_select_chip;
1165+#endif
1166+
1167 #ifdef CONFIG_S3C2410_NAND_BBT
1168 nand->options = NAND_USE_FLASH_BBT | NAND_DONT_CREATE_BBT;
1169 #else
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-license.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-license.patch
new file mode 100644
index 0000000000..227a97e71a
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-license.patch
@@ -0,0 +1,712 @@
1Index: u-boot/common/Makefile
2===================================================================
3--- u-boot.orig/common/Makefile
4+++ u-boot/common/Makefile
5@@ -34,7 +34,7 @@
6 cmd_dynenv.o cmd_eeprom.o cmd_elf.o cmd_ext2.o \
7 cmd_fat.o cmd_fdc.o cmd_fdt.o cmd_fdos.o cmd_flash.o cmd_fpga.o \
8 cmd_i2c.o cmd_ide.o cmd_immap.o cmd_itest.o cmd_jffs2.o \
9- cmd_load.o cmd_log.o \
10+ cmd_license.o cmd_load.o cmd_log.o \
11 cmd_mem.o cmd_mii.o cmd_misc.o cmd_mmc.o \
12 cmd_nand.o cmd_net.o cmd_nvedit.o \
13 cmd_pci.o cmd_pcmcia.o cmd_portio.o \
14Index: u-boot/common/cmd_license.c
15===================================================================
16--- /dev/null
17+++ u-boot/common/cmd_license.c
18@@ -0,0 +1,57 @@
19+/*
20+ * (C) Copyright 2007 by OpenMoko, Inc.
21+ * Author: Harald Welte <laforge@openmoko.org>
22+ *
23+ * See file CREDITS for list of people who contributed to this
24+ * project.
25+ *
26+ * This program is free software; you can redistribute it and/or
27+ * modify it under the terms of the GNU General Public License as
28+ * published by the Free Software Foundation; either version 2 of
29+ * the License, or (at your option) any later version.
30+ *
31+ * This program is distributed in the hope that it will be useful,
32+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
33+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
34+ * GNU General Public License for more details.
35+ *
36+ * You should have received a copy of the GNU General Public License
37+ * along with this program; if not, write to the Free Software
38+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
39+ * MA 02111-1307 USA
40+ */
41+
42+#include <common.h>
43+
44+#if (CONFIG_COMMANDS & CFG_CMD_LICENSE)
45+
46+#define LICENSE_MAX 20480
47+#include <command.h>
48+#include <malloc.h>
49+#include <license.h>
50+int gunzip(void *, int, unsigned char *, unsigned long *);
51+
52+int do_license(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
53+{
54+ char *tok, *dst = malloc(LICENSE_MAX);
55+ unsigned long len = LICENSE_MAX;
56+
57+ if (!dst)
58+ return -1;
59+
60+ if (gunzip(dst, LICENSE_MAX, gpl_gz, &len) != 0) {
61+ printf("Error uncompressing license text\n");
62+ free(dst);
63+ return -1;
64+ }
65+ puts(dst);
66+ free(dst);
67+
68+ return 0;
69+}
70+
71+U_BOOT_CMD(license, 1, 1, do_license,
72+ "license - print GPL license text\n",
73+ NULL);
74+
75+#endif /* CFG_CMD_LICENSE */
76Index: u-boot/include/cmd_confdefs.h
77===================================================================
78--- u-boot.orig/include/cmd_confdefs.h
79+++ u-boot/include/cmd_confdefs.h
80@@ -75,6 +75,7 @@
81 #define CFG_CMD_FPGA 0x0000010000000000ULL /* FPGA configuration Support */
82 #define CFG_CMD_HWFLOW 0x0000020000000000ULL /* RTS/CTS hw flow control */
83 #define CFG_CMD_SAVES 0x0000040000000000ULL /* save S record dump */
84+#define CFG_CMD_LICENSE 0x0000080000000000ULL /* Display GPL License */
85 #define CFG_CMD_SPI 0x0000100000000000ULL /* SPI utility */
86 #define CFG_CMD_FDOS 0x0000200000000000ULL /* Floppy DOS support */
87 #define CFG_CMD_VFD 0x0000400000000000ULL /* VFD support (TRAB) */
88Index: u-boot/include/license.h
89===================================================================
90--- /dev/null
91+++ u-boot/include/license.h
92@@ -0,0 +1,584 @@
93+/* bin2header converting 'gpl.gz' */
94+unsigned char gpl_gz[] = {
95+ 0x1f, 0x8b, 0x08, 0x08, 0xb2, 0x10, 0x0d, 0x46, 0x00, 0x03,
96+ 0x67, 0x70, 0x6c, 0x00, 0x9d, 0x5b, 0x5d, 0x77, 0xdb, 0x46,
97+ 0x92, 0x7d, 0x4e, 0xff, 0x8a, 0x3e, 0x7e, 0x89, 0x74, 0x0e,
98+ 0xc3, 0xc4, 0x9e, 0x9d, 0xdd, 0x49, 0xfc, 0x44, 0x49, 0x94,
99+ 0xcd, 0x1d, 0x99, 0x52, 0x48, 0xca, 0x8e, 0x1f, 0x41, 0xb2,
100+ 0x29, 0x62, 0x0c, 0x02, 0x5c, 0x7c, 0x48, 0xe6, 0xbf, 0xdf,
101+ 0x7b, 0xab, 0xba, 0x81, 0x06, 0x49, 0x25, 0xb3, 0x9b, 0x93,
102+ 0xc4, 0x16, 0x09, 0x54, 0xd7, 0x77, 0xdd, 0xaa, 0x2e, 0xfd,
103+ 0xf0, 0x83, 0xc5, 0x3f, 0x1f, 0xa6, 0x8f, 0xf6, 0xc3, 0x78,
104+ 0x3a, 0x9e, 0x8d, 0xee, 0xec, 0xc3, 0xe3, 0xd5, 0xdd, 0xe4,
105+ 0xda, 0xe2, 0xbf, 0xf1, 0x74, 0x3e, 0x36, 0x3f, 0xc8, 0x03,
106+ 0xf8, 0xe7, 0xb3, 0x2b, 0xab, 0xb4, 0xc8, 0xed, 0xbb, 0x81,
107+ 0xfd, 0xef, 0x26, 0x77, 0xf6, 0xed, 0xaf, 0xbf, 0xbe, 0x35,
108+ 0xc6, 0x5e, 0x17, 0xfb, 0x43, 0x99, 0x3e, 0x6d, 0x6b, 0x7b,
109+ 0x71, 0x7d, 0x89, 0x0f, 0xff, 0xf1, 0xeb, 0x40, 0xbe, 0xb2,
110+ 0xb7, 0xa5, 0x73, 0x76, 0x5e, 0x6c, 0xea, 0x97, 0xa4, 0x74,
111+ 0xf6, 0xb6, 0x68, 0xf2, 0x75, 0x52, 0x83, 0xc0, 0xc0, 0x4e,
112+ 0xf2, 0xd5, 0x70, 0x60, 0xec, 0xdf, 0xf9, 0x4c, 0x92, 0x7f,
113+ 0xcb, 0xd2, 0xdc, 0xce, 0x6b, 0x3c, 0x5d, 0x0f, 0xec, 0x6d,
114+ 0xba, 0xa9, 0xb7, 0xf6, 0x36, 0x2b, 0x8a, 0x72, 0x60, 0xaf,
115+ 0x8a, 0xaa, 0xe6, 0xf3, 0x9f, 0x46, 0xf6, 0x97, 0x77, 0x6f,
116+ 0xdf, 0xfe, 0xf2, 0xd3, 0xdb, 0xbf, 0xfd, 0xf2, 0xd6, 0x3e,
117+ 0xce, 0x47, 0xc6, 0x8e, 0x9f, 0x5d, 0x79, 0x28, 0xc0, 0x45,
118+ 0x5a, 0xd9, 0xbd, 0x2b, 0x77, 0x69, 0x5d, 0xbb, 0xb5, 0xad,
119+ 0x0b, 0xbb, 0x02, 0x3b, 0x36, 0xc9, 0xd7, 0x76, 0x9d, 0x56,
120+ 0x75, 0x99, 0x2e, 0x9b, 0xda, 0x59, 0x3c, 0xbb, 0xc4, 0xd1,
121+ 0x3b, 0x7e, 0x99, 0xba, 0xca, 0xd8, 0x62, 0x63, 0xeb, 0x2d,
122+ 0xde, 0xcc, 0xd2, 0x95, 0xcb, 0x2b, 0x67, 0xd7, 0xc5, 0xaa,
123+ 0xd9, 0xb9, 0x1c, 0xe7, 0xe3, 0x79, 0xbb, 0xda, 0x26, 0xf9,
124+ 0x53, 0x9a, 0x3f, 0xd9, 0xb4, 0x26, 0xf9, 0xbc, 0xa8, 0x6d,
125+ 0x92, 0x65, 0xc5, 0x8b, 0x5b, 0x0f, 0x0d, 0xd4, 0x21, 0xfa,
126+ 0x78, 0x28, 0x5d, 0xb2, 0x5b, 0x66, 0x0e, 0x0a, 0xb0, 0x8b,
127+ 0xad, 0x0b, 0x94, 0x2a, 0xbb, 0x29, 0x4a, 0xbb, 0x03, 0xdf,
128+ 0xb6, 0x0a, 0x92, 0xf3, 0xbf, 0xb5, 0xab, 0xd2, 0xa7, 0x5c,
129+ 0x39, 0xac, 0x93, 0x6f, 0xf8, 0xf0, 0x25, 0x39, 0xd8, 0x43,
130+ 0xd1, 0x94, 0x66, 0x03, 0xc1, 0xd7, 0xc5, 0x8e, 0xdf, 0x54,
131+ 0x5b, 0x79, 0x1e, 0xcc, 0x0b, 0x0b, 0x10, 0xae, 0x1e, 0x5a,
132+ 0x7b, 0x75, 0x00, 0xdf, 0x79, 0x5d, 0x26, 0x15, 0xf8, 0xab,
133+ 0x71, 0x96, 0x18, 0xcb, 0xe5, 0xae, 0x4c, 0x32, 0xfb, 0xd0,
134+ 0x2c, 0x71, 0xb4, 0xb9, 0xf3, 0x82, 0x80, 0xdd, 0x34, 0xaf,
135+ 0x5d, 0xbe, 0xd6, 0xa3, 0x9e, 0x9a, 0x04, 0x0a, 0xae, 0x61,
136+ 0x07, 0x1e, 0x65, 0xff, 0xec, 0x28, 0x7e, 0x67, 0x02, 0xcf,
137+ 0x3f, 0xfd, 0x84, 0x47, 0x76, 0xe4, 0xb3, 0x6a, 0xf0, 0x18,
138+ 0x0f, 0x6d, 0xc5, 0xc1, 0x11, 0x7c, 0x56, 0x04, 0x85, 0x5a,
139+ 0xc0, 0x63, 0x65, 0x9b, 0x0a, 0xbe, 0x31, 0xa4, 0x26, 0xd2,
140+ 0xca, 0xf4, 0x59, 0xb3, 0x81, 0xb5, 0x64, 0xbf, 0xcf, 0xa0,
141+ 0x7c, 0x1e, 0x2e, 0xfa, 0x11, 0x1b, 0xb8, 0xbe, 0x97, 0x98,
142+ 0xce, 0x4b, 0x7e, 0xac, 0x22, 0x0d, 0xe6, 0x22, 0x4d, 0x92,
143+ 0x1f, 0x6c, 0x81, 0x77, 0x4a, 0xbb, 0x2f, 0x8b, 0xa7, 0x32,
144+ 0xd9, 0xd9, 0x97, 0x6d, 0x41, 0xca, 0x4d, 0xbd, 0x2d, 0xca,
145+ 0x0a, 0x5a, 0xda, 0xc1, 0x0f, 0xf0, 0xa4, 0x69, 0x2a, 0x35,
146+ 0x1f, 0x58, 0xba, 0x98, 0x17, 0x3b, 0xe7, 0x5f, 0x7b, 0xcd,
147+ 0x23, 0x7b, 0xc2, 0xad, 0x0a, 0xb8, 0x0b, 0xd4, 0xb7, 0x3c,
148+ 0x98, 0xa0, 0xec, 0x3b, 0x57, 0x41, 0x40, 0xfb, 0x8a, 0x60,
149+ 0x69, 0x5e, 0xd5, 0x2e, 0x59, 0x0f, 0x2f, 0xad, 0xfd, 0x5a,
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151+ 0x79, 0xcf, 0x70, 0x05, 0x03, 0x16, 0xc5, 0x90, 0x4e, 0xf3,
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675+
676+};
677Index: u-boot/include/configs/neo1973_gta01.h
678===================================================================
679--- u-boot.orig/include/configs/neo1973_gta01.h
680+++ u-boot/include/configs/neo1973_gta01.h
681@@ -110,6 +110,7 @@
682 CFG_CMD_MMC | \
683 CFG_CMD_FAT | \
684 CFG_CMD_EXT2 | \
685+ CFG_CMD_LICENSE | \
686 0)
687 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
688 #include <cmd_confdefs.h>
689Index: u-boot/include/configs/hxd8.h
690===================================================================
691--- u-boot.orig/include/configs/hxd8.h
692+++ u-boot/include/configs/hxd8.h
693@@ -110,6 +110,7 @@
694 CFG_CMD_MMC | \
695 CFG_CMD_FAT | \
696 CFG_CMD_EXT2 | \
697+ CFG_CMD_LICENSE | \
698 0)
699 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
700 #include <cmd_confdefs.h>
701Index: u-boot/include/configs/smdk2440.h
702===================================================================
703--- u-boot.orig/include/configs/smdk2440.h
704+++ u-boot/include/configs/smdk2440.h
705@@ -110,6 +110,7 @@
706 CFG_CMD_PORTIO | \
707 CFG_CMD_REGINFO | \
708 CFG_CMD_SAVES | \
709+ CFG_CMD_LICENSE | \
710 CFG_CMD_USB)
711
712 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-machtypes.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-machtypes.patch
new file mode 100644
index 0000000000..db3cee6e99
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-machtypes.patch
@@ -0,0 +1,4121 @@
1This adds a more recent version of mach-types.h to u-boot
2
3Signed-off-by: Harald Welte <laforge@openmoko.org>
4
5Index: u-boot/include/asm-arm/mach-types.h
6===================================================================
7--- u-boot.orig/include/asm-arm/mach-types.h
8+++ u-boot/include/asm-arm/mach-types.h
9@@ -424,7 +424,7 @@
10 #define MACH_TYPE_MPORT3S 411
11 #define MACH_TYPE_RA_ALPHA 412
12 #define MACH_TYPE_XCEP 413
13-#define MACH_TYPE_ARCOM_MERCURY 414
14+#define MACH_TYPE_ARCOM_VULCAN 414
15 #define MACH_TYPE_STARGATE 415
16 #define MACH_TYPE_ARMADILLOJ 416
17 #define MACH_TYPE_ELROY_JACK 417
18@@ -457,7 +457,7 @@
19 #define MACH_TYPE_XM250 444
20 #define MACH_TYPE_T6TC1XB 445
21 #define MACH_TYPE_ESS710 446
22-#define MACH_TYPE_MX3ADS 447
23+#define MACH_TYPE_MX31ADS 447
24 #define MACH_TYPE_HIMALAYA 448
25 #define MACH_TYPE_BOLFENK 449
26 #define MACH_TYPE_AT91RM9200KR 450
27@@ -736,7 +736,311 @@
28 #define MACH_TYPE_LN2410SBC 725
29 #define MACH_TYPE_CB3RUFC 726
30 #define MACH_TYPE_MP2USB 727
31-#define MACH_TYPE_PDNB3 1002
32+#define MACH_TYPE_NTNP425C 728
33+#define MACH_TYPE_COLIBRI 729
34+#define MACH_TYPE_PCM7220 730
35+#define MACH_TYPE_GATEWAY7001 731
36+#define MACH_TYPE_PCM027 732
37+#define MACH_TYPE_CMPXA 733
38+#define MACH_TYPE_ANUBIS 734
39+#define MACH_TYPE_ITE8152 735
40+#define MACH_TYPE_LPC3XXX 736
41+#define MACH_TYPE_PUPPETEER 737
42+#define MACH_TYPE_MACH_VADATECH 738
43+#define MACH_TYPE_E570 739
44+#define MACH_TYPE_X50 740
45+#define MACH_TYPE_RECON 741
46+#define MACH_TYPE_XBOARDGP8 742
47+#define MACH_TYPE_FPIC2 743
48+#define MACH_TYPE_AKITA 744
49+#define MACH_TYPE_A81 745
50+#define MACH_TYPE_SVM_SC25X 746
51+#define MACH_TYPE_VADATECH020 747
52+#define MACH_TYPE_TLI 748
53+#define MACH_TYPE_EDB9315LC 749
54+#define MACH_TYPE_PASSEC 750
55+#define MACH_TYPE_DS_TIGER 751
56+#define MACH_TYPE_E310 752
57+#define MACH_TYPE_E330 753
58+#define MACH_TYPE_RT3000 754
59+#define MACH_TYPE_NOKIA770 755
60+#define MACH_TYPE_PNX0106 756
61+#define MACH_TYPE_HX21XX 757
62+#define MACH_TYPE_FARADAY 758
63+#define MACH_TYPE_SBC9312 759
64+#define MACH_TYPE_BATMAN 760
65+#define MACH_TYPE_JPD201 761
66+#define MACH_TYPE_MIPSA 762
67+#define MACH_TYPE_KACOM 763
68+#define MACH_TYPE_SWARCOCPU 764
69+#define MACH_TYPE_SWARCODSL 765
70+#define MACH_TYPE_BLUEANGEL 766
71+#define MACH_TYPE_HAIRYGRAMA 767
72+#define MACH_TYPE_BANFF 768
73+#define MACH_TYPE_CARMEVA 769
74+#define MACH_TYPE_SAM255 770
75+#define MACH_TYPE_PPM10 771
76+#define MACH_TYPE_EDB9315A 772
77+#define MACH_TYPE_SUNSET 773
78+#define MACH_TYPE_STARGATE2 774
79+#define MACH_TYPE_INTELMOTE2 775
80+#define MACH_TYPE_TRIZEPS4 776
81+#define MACH_TYPE_MAINSTONE2 777
82+#define MACH_TYPE_EZ_IXP42X 778
83+#define MACH_TYPE_TAPWAVE_ZODIAC 779
84+#define MACH_TYPE_UNIVERSALMETER 780
85+#define MACH_TYPE_HICOARM9 781
86+#define MACH_TYPE_PNX4008 782
87+#define MACH_TYPE_KWS6000 783
88+#define MACH_TYPE_PORTUX920T 784
89+#define MACH_TYPE_EZ_X5 785
90+#define MACH_TYPE_OMAP_RUDOLPH 786
91+#define MACH_TYPE_CPUAT91 787
92+#define MACH_TYPE_REA9200 788
93+#define MACH_TYPE_ACTS_PUNE_SA1110 789
94+#define MACH_TYPE_IXP425 790
95+#define MACH_TYPE_ARGONPLUSODYSSEY 791
96+#define MACH_TYPE_PERCH 792
97+#define MACH_TYPE_EIS05R1 793
98+#define MACH_TYPE_PEPPERPAD 794
99+#define MACH_TYPE_SB3010 795
100+#define MACH_TYPE_RM9200 796
101+#define MACH_TYPE_DMA03 797
102+#define MACH_TYPE_ROAD_S101 798
103+#define MACH_TYPE_IQ_NEXTGEN_A 799
104+#define MACH_TYPE_IQ_NEXTGEN_B 800
105+#define MACH_TYPE_IQ_NEXTGEN_C 801
106+#define MACH_TYPE_IQ_NEXTGEN_D 802
107+#define MACH_TYPE_IQ_NEXTGEN_E 803
108+#define MACH_TYPE_MALLOW_AT91 804
109+#define MACH_TYPE_CYBERTRACKER_I 805
110+#define MACH_TYPE_GESBC931X 806
111+#define MACH_TYPE_CENTIPAD 807
112+#define MACH_TYPE_ARMSOC 808
113+#define MACH_TYPE_SE4200 809
114+#define MACH_TYPE_EMS197A 810
115+#define MACH_TYPE_MICRO9 811
116+#define MACH_TYPE_MICRO9L 812
117+#define MACH_TYPE_UC5471DSP 813
118+#define MACH_TYPE_SJ5471ENG 814
119+#define MACH_TYPE_CMPXA26X 815
120+#define MACH_TYPE_NC 816
121+#define MACH_TYPE_OMAP_PALMTE 817
122+#define MACH_TYPE_AJAX52X 818
123+#define MACH_TYPE_SIRIUSTAR 819
124+#define MACH_TYPE_IODATA_HDLG 820
125+#define MACH_TYPE_AT91RM9200UTL 821
126+#define MACH_TYPE_BIOSAFE 822
127+#define MACH_TYPE_MP1000 823
128+#define MACH_TYPE_PARSY 824
129+#define MACH_TYPE_CCXP 825
130+#define MACH_TYPE_OMAP_GSAMPLE 826
131+#define MACH_TYPE_REALVIEW_EB 827
132+#define MACH_TYPE_SAMOA 828
133+#define MACH_TYPE_T3XSCALE 829
134+#define MACH_TYPE_I878 830
135+#define MACH_TYPE_BORZOI 831
136+#define MACH_TYPE_GECKO 832
137+#define MACH_TYPE_DS101 833
138+#define MACH_TYPE_OMAP_PALMTT2 834
139+#define MACH_TYPE_XSCALE_PALMLD 835
140+#define MACH_TYPE_CC9C 836
141+#define MACH_TYPE_SBC1670 837
142+#define MACH_TYPE_IXDP28X5 838
143+#define MACH_TYPE_OMAP_PALMTT 839
144+#define MACH_TYPE_ML696K 840
145+#define MACH_TYPE_ARCOM_ZEUS 841
146+#define MACH_TYPE_OSIRIS 842
147+#define MACH_TYPE_MAESTRO 843
148+#define MACH_TYPE_TUNGE2 844
149+#define MACH_TYPE_IXBBM 845
150+#define MACH_TYPE_MX27 846
151+#define MACH_TYPE_AX8004 847
152+#define MACH_TYPE_AT91SAM9261EK 848
153+#define MACH_TYPE_LOFT 849
154+#define MACH_TYPE_MAGPIE 850
155+#define MACH_TYPE_MX21 851
156+#define MACH_TYPE_MB87M3400 852
157+#define MACH_TYPE_MGUARD_DELTA 853
158+#define MACH_TYPE_DAVINCI_DVDP 854
159+#define MACH_TYPE_HTCUNIVERSAL 855
160+#define MACH_TYPE_TPAD 856
161+#define MACH_TYPE_ROVERP3 857
162+#define MACH_TYPE_JORNADA928 858
163+#define MACH_TYPE_MV88FXX81 859
164+#define MACH_TYPE_STMP36XX 860
165+#define MACH_TYPE_SXNI79524 861
166+#define MACH_TYPE_AMS_DELTA 862
167+#define MACH_TYPE_URANIUM 863
168+#define MACH_TYPE_UCON 864
169+#define MACH_TYPE_NAS100D 865
170+#define MACH_TYPE_L083_1000 866
171+#define MACH_TYPE_EZX 867
172+#define MACH_TYPE_PNX5220 868
173+#define MACH_TYPE_BUTTE 869
174+#define MACH_TYPE_SRM2 870
175+#define MACH_TYPE_DSBR 871
176+#define MACH_TYPE_CRYSTALBALL 872
177+#define MACH_TYPE_TINYPXA27X 873
178+#define MACH_TYPE_HERBIE 874
179+#define MACH_TYPE_MAGICIAN 875
180+#define MACH_TYPE_CM4002 876
181+#define MACH_TYPE_B4 877
182+#define MACH_TYPE_MAUI 878
183+#define MACH_TYPE_CYBERTRACKER_G 879
184+#define MACH_TYPE_NXDKN 880
185+#define MACH_TYPE_MIO8390 881
186+#define MACH_TYPE_OMI_BOARD 882
187+#define MACH_TYPE_MX21CIV 883
188+#define MACH_TYPE_MAHI_CDAC 884
189+#define MACH_TYPE_XSCALE_PALMTX 885
190+#define MACH_TYPE_S3C2413 887
191+#define MACH_TYPE_SAMSYS_EP0 888
192+#define MACH_TYPE_WG302V1 889
193+#define MACH_TYPE_WG302V2 890
194+#define MACH_TYPE_EB42X 891
195+#define MACH_TYPE_IQ331ES 892
196+#define MACH_TYPE_COSYDSP 893
197+#define MACH_TYPE_UPLAT7D 894
198+#define MACH_TYPE_PTDAVINCI 895
199+#define MACH_TYPE_MBUS 896
200+#define MACH_TYPE_NADIA2VB 897
201+#define MACH_TYPE_R1000 898
202+#define MACH_TYPE_HW90250 899
203+#define MACH_TYPE_OMAP_2430SDP 900
204+#define MACH_TYPE_DAVINCI_EVM 901
205+#define MACH_TYPE_OMAP_TORNADO 902
206+#define MACH_TYPE_OLOCREEK 903
207+#define MACH_TYPE_PALMZ72 904
208+#define MACH_TYPE_NXDB500 905
209+#define MACH_TYPE_APF9328 906
210+#define MACH_TYPE_OMAP_WIPOQ 907
211+#define MACH_TYPE_OMAP_TWIP 908
212+#define MACH_TYPE_XSCALE_PALMTREO650 909
213+#define MACH_TYPE_ACUMEN 910
214+#define MACH_TYPE_XP100 911
215+#define MACH_TYPE_FS2410 912
216+#define MACH_TYPE_PXA270_CERF 913
217+#define MACH_TYPE_SQ2FTLPALM 914
218+#define MACH_TYPE_BSEMSERVER 915
219+#define MACH_TYPE_NETCLIENT 916
220+#define MACH_TYPE_XSCALE_PALMTT5 917
221+#define MACH_TYPE_OMAP_PALMTC 918
222+#define MACH_TYPE_OMAP_APOLLON 919
223+#define MACH_TYPE_ARGONLVEVB 920
224+#define MACH_TYPE_REA_2D 921
225+#define MACH_TYPE_TI3E524 922
226+#define MACH_TYPE_ATEB9200 923
227+#define MACH_TYPE_AUCKLAND 924
228+#define MACH_TYPE_AK3320M 925
229+#define MACH_TYPE_DURAMAX 926
230+#define MACH_TYPE_N35 927
231+#define MACH_TYPE_PRONGHORN 928
232+#define MACH_TYPE_FUNDY 929
233+#define MACH_TYPE_LOGICPD_PXA270 930
234+#define MACH_TYPE_CPU777 931
235+#define MACH_TYPE_SIMICON9201 932
236+#define MACH_TYPE_LEAP2_HPM 933
237+#define MACH_TYPE_CM922TXA10 934
238+#define MACH_TYPE_PXA 935
239+#define MACH_TYPE_SANDGATE2 936
240+#define MACH_TYPE_SANDGATE2G 937
241+#define MACH_TYPE_SANDGATE2P 938
242+#define MACH_TYPE_FRED_JACK 939
243+#define MACH_TYPE_TTG_COLOR1 940
244+#define MACH_TYPE_NXEB500HMI 941
245+#define MACH_TYPE_NETDCU8 942
246+#define MACH_TYPE_ML675050_CPU_BOA 943
247+#define MACH_TYPE_NG_FVX538 944
248+#define MACH_TYPE_NG_FVS338 945
249+#define MACH_TYPE_PNX4103 946
250+#define MACH_TYPE_HESDB 947
251+#define MACH_TYPE_XSILO 948
252+#define MACH_TYPE_ESPRESSO 949
253+#define MACH_TYPE_EMLC 950
254+#define MACH_TYPE_SISTERON 951
255+#define MACH_TYPE_RX1950 952
256+#define MACH_TYPE_TSC_VENUS 953
257+#define MACH_TYPE_DS101J 954
258+#define MACH_TYPE_MXC30030ADS 955
259+#define MACH_TYPE_FUJITSU_WIMAXSOC 956
260+#define MACH_TYPE_DUALPCMODEM 957
261+#define MACH_TYPE_GESBC9312 958
262+#define MACH_TYPE_HTCAPACHE 959
263+#define MACH_TYPE_IXDP435 960
264+#define MACH_TYPE_CATPROVT100 961
265+#define MACH_TYPE_PICOTUX1XX 962
266+#define MACH_TYPE_PICOTUX2XX 963
267+#define MACH_TYPE_DSMG600 964
268+#define MACH_TYPE_EMPC2 965
269+#define MACH_TYPE_VENTURA 966
270+#define MACH_TYPE_PHIDGET_SBC 967
271+#define MACH_TYPE_IJ3K 968
272+#define MACH_TYPE_PISGAH 969
273+#define MACH_TYPE_OMAP_FSAMPLE 970
274+#define MACH_TYPE_SG720 971
275+#define MACH_TYPE_REDFOX 972
276+#define MACH_TYPE_MYSH_EP9315_1 973
277+#define MACH_TYPE_TPF106 974
278+#define MACH_TYPE_AT91RM9200KG 975
279+#define MACH_TYPE_SLEDB 976
280+#define MACH_TYPE_ONTRACK 977
281+#define MACH_TYPE_PM1200 978
282+#define MACH_TYPE_ESS24XXX 979
283+#define MACH_TYPE_COREMP7 980
284+#define MACH_TYPE_NEXCODER_6446 981
285+#define MACH_TYPE_STVC8380 982
286+#define MACH_TYPE_TEKLYNX 983
287+#define MACH_TYPE_CARBONADO 984
288+#define MACH_TYPE_SYSMOS_MP730 985
289+#define MACH_TYPE_SNAPPER_CL15 986
290+#define MACH_TYPE_PGIGIM 987
291+#define MACH_TYPE_PTX9160P2 988
292+#define MACH_TYPE_DCORE1 989
293+#define MACH_TYPE_VICTORPXA 990
294+#define MACH_TYPE_MX2DTB 991
295+#define MACH_TYPE_PXA_IREX_ER0100 992
296+#define MACH_TYPE_OMAP_PALMZ71 993
297+#define MACH_TYPE_BARTEC_DEG 994
298+#define MACH_TYPE_HW50251 995
299+#define MACH_TYPE_IBOX 996
300+#define MACH_TYPE_ATLASLH7A404 997
301+#define MACH_TYPE_PT2026 998
302+#define MACH_TYPE_HTCALPINE 999
303+#define MACH_TYPE_BARTEC_VTU 1000
304+#define MACH_TYPE_VCOREII 1001
305+#define MACH_TYPE_PDNB3 1002
306+#define MACH_TYPE_HTCBEETLES 1003
307+#define MACH_TYPE_S3C6400 1004
308+#define MACH_TYPE_S3C2443 1005
309+#define MACH_TYPE_OMAP_LDK 1006
310+#define MACH_TYPE_SMDK2460 1007
311+#define MACH_TYPE_SMDK2440 1008
312+#define MACH_TYPE_SMDK2412 1009
313+#define MACH_TYPE_WEBBOX 1010
314+#define MACH_TYPE_CWWNDP 1011
315+#define MACH_TYPE_DRAGON 1012
316+#define MACH_TYPE_OPENDO_CPU_BOARD 1013
317+#define MACH_TYPE_CCM2200 1014
318+#define MACH_TYPE_ETWARM 1015
319+#define MACH_TYPE_M93030 1016
320+#define MACH_TYPE_CC7U 1017
321+#define MACH_TYPE_MTT_RANGER 1018
322+#define MACH_TYPE_NEXUS 1019
323+#define MACH_TYPE_DESMAN 1020
324+#define MACH_TYPE_BKDE303 1021
325+#define MACH_TYPE_SMDK2413 1022
326+#define MACH_TYPE_AML_M7200 1023
327+#define MACH_TYPE_AML_M5900 1024
328+#define MACH_TYPE_SG640 1025
329+#define MACH_TYPE_EDG79524 1026
330+#define MACH_TYPE_AI2410 1027
331+#define MACH_TYPE_IXP465 1028
332+#define MACH_TYPE_BALLOON3 1029
333+#define MACH_TYPE_QT2410 1108
334+#define MACH_TYPE_NEO1973_GTA01 1182
335+#define MACH_TYPE_HXD8 1303
336+#define MACH_TYPE_NEO1973_GTA02 1304
337
338 #ifdef CONFIG_ARCH_EBSA110
339 # ifdef machine_arch_type
340@@ -3541,9 +3845,9 @@
341 # else
342 # define machine_arch_type MACH_TYPE_RAMSES
343 # endif
344-# define machine_is_ramses() (machine_arch_type == MACH_TYPE_RAMSES)
345+# define machine_is_mnci() (machine_arch_type == MACH_TYPE_RAMSES)
346 #else
347-# define machine_is_ramses() (0)
348+# define machine_is_mnci() (0)
349 #endif
350
351 #ifdef CONFIG_ARCH_S28X
352@@ -4501,9 +4805,9 @@
353 # else
354 # define machine_arch_type MACH_TYPE_M825XX
355 # endif
356-# define machine_is_m825xx() (machine_arch_type == MACH_TYPE_M825XX)
357+# define machine_is_comcerto() (machine_arch_type == MACH_TYPE_M825XX)
358 #else
359-# define machine_is_m825xx() (0)
360+# define machine_is_comcerto() (0)
361 #endif
362
363 #ifdef CONFIG_SA1100_M7100
364@@ -5658,16 +5962,16 @@
365 # define machine_is_xcep() (0)
366 #endif
367
368-#ifdef CONFIG_MACH_ARCOM_MERCURY
369+#ifdef CONFIG_MACH_ARCOM_VULCAN
370 # ifdef machine_arch_type
371 # undef machine_arch_type
372 # define machine_arch_type __machine_arch_type
373 # else
374-# define machine_arch_type MACH_TYPE_ARCOM_MERCURY
375+# define machine_arch_type MACH_TYPE_ARCOM_VULCAN
376 # endif
377-# define machine_is_arcom_mercury() (machine_arch_type == MACH_TYPE_ARCOM_MERCURY)
378+# define machine_is_arcom_vulcan() (machine_arch_type == MACH_TYPE_ARCOM_VULCAN)
379 #else
380-# define machine_is_arcom_mercury() (0)
381+# define machine_is_arcom_vulcan() (0)
382 #endif
383
384 #ifdef CONFIG_MACH_STARGATE
385@@ -6054,16 +6358,16 @@
386 # define machine_is_ess710() (0)
387 #endif
388
389-#ifdef CONFIG_MACH_MX3ADS
390+#ifdef CONFIG_MACH_MX31ADS
391 # ifdef machine_arch_type
392 # undef machine_arch_type
393 # define machine_arch_type __machine_arch_type
394 # else
395-# define machine_arch_type MACH_TYPE_MX3ADS
396+# define machine_arch_type MACH_TYPE_MX31ADS
397 # endif
398-# define machine_is_mx3ads() (machine_arch_type == MACH_TYPE_MX3ADS)
399+# define machine_is_mx31ads() (machine_arch_type == MACH_TYPE_MX31ADS)
400 #else
401-# define machine_is_mx3ads() (0)
402+# define machine_is_mx31ads() (0)
403 #endif
404
405 #ifdef CONFIG_MACH_HIMALAYA
406@@ -7333,9 +7637,9 @@
407 # else
408 # define machine_arch_type MACH_TYPE_ARGONPLUSEVB
409 # endif
410-# define machine_is_argonplusevb() (machine_arch_type == MACH_TYPE_ARGONPLUSEVB)
411+# define machine_is_i30030evb() (machine_arch_type == MACH_TYPE_ARGONPLUSEVB)
412 #else
413-# define machine_is_argonplusevb() (0)
414+# define machine_is_i30030evb() (0)
415 #endif
416
417 #ifdef CONFIG_MACH_SCMA11EVB
418@@ -7345,9 +7649,9 @@
419 # else
420 # define machine_arch_type MACH_TYPE_SCMA11EVB
421 # endif
422-# define machine_is_scma11evb() (machine_arch_type == MACH_TYPE_SCMA11EVB)
423+# define machine_is_mxc27530evb() (machine_arch_type == MACH_TYPE_SCMA11EVB)
424 #else
425-# define machine_is_scma11evb() (0)
426+# define machine_is_mxc27530evb() (0)
427 #endif
428
429 #ifdef CONFIG_MACH_SMDK2800
430@@ -8305,9 +8609,9 @@
431 # else
432 # define machine_arch_type MACH_TYPE_SCMA11BB
433 # endif
434-# define machine_is_scma11bb() (machine_arch_type == MACH_TYPE_SCMA11BB)
435+# define machine_is_mxc27530ads() (machine_arch_type == MACH_TYPE_SCMA11BB)
436 #else
437-# define machine_is_scma11bb() (0)
438+# define machine_is_mxc27530ads() (0)
439 #endif
440
441 #ifdef CONFIG_MACH_TRIZEPS3
442@@ -9193,9 +9497,9 @@
443 # else
444 # define machine_arch_type MACH_TYPE_ZEUSEVB
445 # endif
446-# define machine_is_zeusevb() (machine_arch_type == MACH_TYPE_ZEUSEVB)
447+# define machine_is_mxc91131evb() (machine_arch_type == MACH_TYPE_ZEUSEVB)
448 #else
449-# define machine_is_zeusevb() (0)
450+# define machine_is_mxc91131evb() (0)
451 #endif
452
453 #ifdef CONFIG_MACH_P700
454@@ -9402,6 +9706,3667 @@
455 # define machine_is_mp2usb() (0)
456 #endif
457
458+#ifdef CONFIG_MACH_NTNP425C
459+# ifdef machine_arch_type
460+# undef machine_arch_type
461+# define machine_arch_type __machine_arch_type
462+# else
463+# define machine_arch_type MACH_TYPE_NTNP425C
464+# endif
465+# define machine_is_ntnp425c() (machine_arch_type == MACH_TYPE_NTNP425C)
466+#else
467+# define machine_is_ntnp425c() (0)
468+#endif
469+
470+#ifdef CONFIG_MACH_COLIBRI
471+# ifdef machine_arch_type
472+# undef machine_arch_type
473+# define machine_arch_type __machine_arch_type
474+# else
475+# define machine_arch_type MACH_TYPE_COLIBRI
476+# endif
477+# define machine_is_colibri() (machine_arch_type == MACH_TYPE_COLIBRI)
478+#else
479+# define machine_is_colibri() (0)
480+#endif
481+
482+#ifdef CONFIG_MACH_PCM7220
483+# ifdef machine_arch_type
484+# undef machine_arch_type
485+# define machine_arch_type __machine_arch_type
486+# else
487+# define machine_arch_type MACH_TYPE_PCM7220
488+# endif
489+# define machine_is_pcm7220() (machine_arch_type == MACH_TYPE_PCM7220)
490+#else
491+# define machine_is_pcm7220() (0)
492+#endif
493+
494+#ifdef CONFIG_MACH_GATEWAY7001
495+# ifdef machine_arch_type
496+# undef machine_arch_type
497+# define machine_arch_type __machine_arch_type
498+# else
499+# define machine_arch_type MACH_TYPE_GATEWAY7001
500+# endif
501+# define machine_is_gateway7001() (machine_arch_type == MACH_TYPE_GATEWAY7001)
502+#else
503+# define machine_is_gateway7001() (0)
504+#endif
505+
506+#ifdef CONFIG_MACH_PCM027
507+# ifdef machine_arch_type
508+# undef machine_arch_type
509+# define machine_arch_type __machine_arch_type
510+# else
511+# define machine_arch_type MACH_TYPE_PCM027
512+# endif
513+# define machine_is_pcm027() (machine_arch_type == MACH_TYPE_PCM027)
514+#else
515+# define machine_is_pcm027() (0)
516+#endif
517+
518+#ifdef CONFIG_MACH_CMPXA
519+# ifdef machine_arch_type
520+# undef machine_arch_type
521+# define machine_arch_type __machine_arch_type
522+# else
523+# define machine_arch_type MACH_TYPE_CMPXA
524+# endif
525+# define machine_is_cmpxa() (machine_arch_type == MACH_TYPE_CMPXA)
526+#else
527+# define machine_is_cmpxa() (0)
528+#endif
529+
530+#ifdef CONFIG_MACH_ANUBIS
531+# ifdef machine_arch_type
532+# undef machine_arch_type
533+# define machine_arch_type __machine_arch_type
534+# else
535+# define machine_arch_type MACH_TYPE_ANUBIS
536+# endif
537+# define machine_is_anubis() (machine_arch_type == MACH_TYPE_ANUBIS)
538+#else
539+# define machine_is_anubis() (0)
540+#endif
541+
542+#ifdef CONFIG_MACH_ITE8152
543+# ifdef machine_arch_type
544+# undef machine_arch_type
545+# define machine_arch_type __machine_arch_type
546+# else
547+# define machine_arch_type MACH_TYPE_ITE8152
548+# endif
549+# define machine_is_ite8152() (machine_arch_type == MACH_TYPE_ITE8152)
550+#else
551+# define machine_is_ite8152() (0)
552+#endif
553+
554+#ifdef CONFIG_MACH_LPC3XXX
555+# ifdef machine_arch_type
556+# undef machine_arch_type
557+# define machine_arch_type __machine_arch_type
558+# else
559+# define machine_arch_type MACH_TYPE_LPC3XXX
560+# endif
561+# define machine_is_lpc3xxx() (machine_arch_type == MACH_TYPE_LPC3XXX)
562+#else
563+# define machine_is_lpc3xxx() (0)
564+#endif
565+
566+#ifdef CONFIG_MACH_PUPPETEER
567+# ifdef machine_arch_type
568+# undef machine_arch_type
569+# define machine_arch_type __machine_arch_type
570+# else
571+# define machine_arch_type MACH_TYPE_PUPPETEER
572+# endif
573+# define machine_is_puppeteer() (machine_arch_type == MACH_TYPE_PUPPETEER)
574+#else
575+# define machine_is_puppeteer() (0)
576+#endif
577+
578+#ifdef CONFIG_MACH_MACH_VADATECH
579+# ifdef machine_arch_type
580+# undef machine_arch_type
581+# define machine_arch_type __machine_arch_type
582+# else
583+# define machine_arch_type MACH_TYPE_MACH_VADATECH
584+# endif
585+# define machine_is_vt001() (machine_arch_type == MACH_TYPE_MACH_VADATECH)
586+#else
587+# define machine_is_vt001() (0)
588+#endif
589+
590+#ifdef CONFIG_MACH_E570
591+# ifdef machine_arch_type
592+# undef machine_arch_type
593+# define machine_arch_type __machine_arch_type
594+# else
595+# define machine_arch_type MACH_TYPE_E570
596+# endif
597+# define machine_is_e570() (machine_arch_type == MACH_TYPE_E570)
598+#else
599+# define machine_is_e570() (0)
600+#endif
601+
602+#ifdef CONFIG_MACH_X50
603+# ifdef machine_arch_type
604+# undef machine_arch_type
605+# define machine_arch_type __machine_arch_type
606+# else
607+# define machine_arch_type MACH_TYPE_X50
608+# endif
609+# define machine_is_x50() (machine_arch_type == MACH_TYPE_X50)
610+#else
611+# define machine_is_x50() (0)
612+#endif
613+
614+#ifdef CONFIG_MACH_RECON
615+# ifdef machine_arch_type
616+# undef machine_arch_type
617+# define machine_arch_type __machine_arch_type
618+# else
619+# define machine_arch_type MACH_TYPE_RECON
620+# endif
621+# define machine_is_recon() (machine_arch_type == MACH_TYPE_RECON)
622+#else
623+# define machine_is_recon() (0)
624+#endif
625+
626+#ifdef CONFIG_MACH_XBOARDGP8
627+# ifdef machine_arch_type
628+# undef machine_arch_type
629+# define machine_arch_type __machine_arch_type
630+# else
631+# define machine_arch_type MACH_TYPE_XBOARDGP8
632+# endif
633+# define machine_is_xboardgp8() (machine_arch_type == MACH_TYPE_XBOARDGP8)
634+#else
635+# define machine_is_xboardgp8() (0)
636+#endif
637+
638+#ifdef CONFIG_MACH_FPIC2
639+# ifdef machine_arch_type
640+# undef machine_arch_type
641+# define machine_arch_type __machine_arch_type
642+# else
643+# define machine_arch_type MACH_TYPE_FPIC2
644+# endif
645+# define machine_is_fpic2() (machine_arch_type == MACH_TYPE_FPIC2)
646+#else
647+# define machine_is_fpic2() (0)
648+#endif
649+
650+#ifdef CONFIG_MACH_AKITA
651+# ifdef machine_arch_type
652+# undef machine_arch_type
653+# define machine_arch_type __machine_arch_type
654+# else
655+# define machine_arch_type MACH_TYPE_AKITA
656+# endif
657+# define machine_is_akita() (machine_arch_type == MACH_TYPE_AKITA)
658+#else
659+# define machine_is_akita() (0)
660+#endif
661+
662+#ifdef CONFIG_MACH_A81
663+# ifdef machine_arch_type
664+# undef machine_arch_type
665+# define machine_arch_type __machine_arch_type
666+# else
667+# define machine_arch_type MACH_TYPE_A81
668+# endif
669+# define machine_is_a81() (machine_arch_type == MACH_TYPE_A81)
670+#else
671+# define machine_is_a81() (0)
672+#endif
673+
674+#ifdef CONFIG_MACH_SVM_SC25X
675+# ifdef machine_arch_type
676+# undef machine_arch_type
677+# define machine_arch_type __machine_arch_type
678+# else
679+# define machine_arch_type MACH_TYPE_SVM_SC25X
680+# endif
681+# define machine_is_svm_sc25x() (machine_arch_type == MACH_TYPE_SVM_SC25X)
682+#else
683+# define machine_is_svm_sc25x() (0)
684+#endif
685+
686+#ifdef CONFIG_MACH_VADATECH020
687+# ifdef machine_arch_type
688+# undef machine_arch_type
689+# define machine_arch_type __machine_arch_type
690+# else
691+# define machine_arch_type MACH_TYPE_VADATECH020
692+# endif
693+# define machine_is_vt020() (machine_arch_type == MACH_TYPE_VADATECH020)
694+#else
695+# define machine_is_vt020() (0)
696+#endif
697+
698+#ifdef CONFIG_MACH_TLI
699+# ifdef machine_arch_type
700+# undef machine_arch_type
701+# define machine_arch_type __machine_arch_type
702+# else
703+# define machine_arch_type MACH_TYPE_TLI
704+# endif
705+# define machine_is_tli() (machine_arch_type == MACH_TYPE_TLI)
706+#else
707+# define machine_is_tli() (0)
708+#endif
709+
710+#ifdef CONFIG_MACH_EDB9315LC
711+# ifdef machine_arch_type
712+# undef machine_arch_type
713+# define machine_arch_type __machine_arch_type
714+# else
715+# define machine_arch_type MACH_TYPE_EDB9315LC
716+# endif
717+# define machine_is_edb9315lc() (machine_arch_type == MACH_TYPE_EDB9315LC)
718+#else
719+# define machine_is_edb9315lc() (0)
720+#endif
721+
722+#ifdef CONFIG_MACH_PASSEC
723+# ifdef machine_arch_type
724+# undef machine_arch_type
725+# define machine_arch_type __machine_arch_type
726+# else
727+# define machine_arch_type MACH_TYPE_PASSEC
728+# endif
729+# define machine_is_passec() (machine_arch_type == MACH_TYPE_PASSEC)
730+#else
731+# define machine_is_passec() (0)
732+#endif
733+
734+#ifdef CONFIG_MACH_DS_TIGER
735+# ifdef machine_arch_type
736+# undef machine_arch_type
737+# define machine_arch_type __machine_arch_type
738+# else
739+# define machine_arch_type MACH_TYPE_DS_TIGER
740+# endif
741+# define machine_is_ds_tiger() (machine_arch_type == MACH_TYPE_DS_TIGER)
742+#else
743+# define machine_is_ds_tiger() (0)
744+#endif
745+
746+#ifdef CONFIG_MACH_E310
747+# ifdef machine_arch_type
748+# undef machine_arch_type
749+# define machine_arch_type __machine_arch_type
750+# else
751+# define machine_arch_type MACH_TYPE_E310
752+# endif
753+# define machine_is_e310() (machine_arch_type == MACH_TYPE_E310)
754+#else
755+# define machine_is_e310() (0)
756+#endif
757+
758+#ifdef CONFIG_MACH_E330
759+# ifdef machine_arch_type
760+# undef machine_arch_type
761+# define machine_arch_type __machine_arch_type
762+# else
763+# define machine_arch_type MACH_TYPE_E330
764+# endif
765+# define machine_is_e330() (machine_arch_type == MACH_TYPE_E330)
766+#else
767+# define machine_is_e330() (0)
768+#endif
769+
770+#ifdef CONFIG_MACH_RT3000
771+# ifdef machine_arch_type
772+# undef machine_arch_type
773+# define machine_arch_type __machine_arch_type
774+# else
775+# define machine_arch_type MACH_TYPE_RT3000
776+# endif
777+# define machine_is_rt3000() (machine_arch_type == MACH_TYPE_RT3000)
778+#else
779+# define machine_is_rt3000() (0)
780+#endif
781+
782+#ifdef CONFIG_MACH_NOKIA770
783+# ifdef machine_arch_type
784+# undef machine_arch_type
785+# define machine_arch_type __machine_arch_type
786+# else
787+# define machine_arch_type MACH_TYPE_NOKIA770
788+# endif
789+# define machine_is_nokia770() (machine_arch_type == MACH_TYPE_NOKIA770)
790+#else
791+# define machine_is_nokia770() (0)
792+#endif
793+
794+#ifdef CONFIG_MACH_PNX0106
795+# ifdef machine_arch_type
796+# undef machine_arch_type
797+# define machine_arch_type __machine_arch_type
798+# else
799+# define machine_arch_type MACH_TYPE_PNX0106
800+# endif
801+# define machine_is_pnx0106() (machine_arch_type == MACH_TYPE_PNX0106)
802+#else
803+# define machine_is_pnx0106() (0)
804+#endif
805+
806+#ifdef CONFIG_MACH_HX21XX
807+# ifdef machine_arch_type
808+# undef machine_arch_type
809+# define machine_arch_type __machine_arch_type
810+# else
811+# define machine_arch_type MACH_TYPE_HX21XX
812+# endif
813+# define machine_is_hx21xx() (machine_arch_type == MACH_TYPE_HX21XX)
814+#else
815+# define machine_is_hx21xx() (0)
816+#endif
817+
818+#ifdef CONFIG_MACH_FARADAY
819+# ifdef machine_arch_type
820+# undef machine_arch_type
821+# define machine_arch_type __machine_arch_type
822+# else
823+# define machine_arch_type MACH_TYPE_FARADAY
824+# endif
825+# define machine_is_faraday() (machine_arch_type == MACH_TYPE_FARADAY)
826+#else
827+# define machine_is_faraday() (0)
828+#endif
829+
830+#ifdef CONFIG_MACH_SBC9312
831+# ifdef machine_arch_type
832+# undef machine_arch_type
833+# define machine_arch_type __machine_arch_type
834+# else
835+# define machine_arch_type MACH_TYPE_SBC9312
836+# endif
837+# define machine_is_sbc9312() (machine_arch_type == MACH_TYPE_SBC9312)
838+#else
839+# define machine_is_sbc9312() (0)
840+#endif
841+
842+#ifdef CONFIG_MACH_BATMAN
843+# ifdef machine_arch_type
844+# undef machine_arch_type
845+# define machine_arch_type __machine_arch_type
846+# else
847+# define machine_arch_type MACH_TYPE_BATMAN
848+# endif
849+# define machine_is_batman() (machine_arch_type == MACH_TYPE_BATMAN)
850+#else
851+# define machine_is_batman() (0)
852+#endif
853+
854+#ifdef CONFIG_MACH_JPD201
855+# ifdef machine_arch_type
856+# undef machine_arch_type
857+# define machine_arch_type __machine_arch_type
858+# else
859+# define machine_arch_type MACH_TYPE_JPD201
860+# endif
861+# define machine_is_jpd201() (machine_arch_type == MACH_TYPE_JPD201)
862+#else
863+# define machine_is_jpd201() (0)
864+#endif
865+
866+#ifdef CONFIG_MACH_MIPSA
867+# ifdef machine_arch_type
868+# undef machine_arch_type
869+# define machine_arch_type __machine_arch_type
870+# else
871+# define machine_arch_type MACH_TYPE_MIPSA
872+# endif
873+# define machine_is_mipsa() (machine_arch_type == MACH_TYPE_MIPSA)
874+#else
875+# define machine_is_mipsa() (0)
876+#endif
877+
878+#ifdef CONFIG_MACH_KACOM
879+# ifdef machine_arch_type
880+# undef machine_arch_type
881+# define machine_arch_type __machine_arch_type
882+# else
883+# define machine_arch_type MACH_TYPE_KACOM
884+# endif
885+# define machine_is_kacom() (machine_arch_type == MACH_TYPE_KACOM)
886+#else
887+# define machine_is_kacom() (0)
888+#endif
889+
890+#ifdef CONFIG_MACH_SWARCOCPU
891+# ifdef machine_arch_type
892+# undef machine_arch_type
893+# define machine_arch_type __machine_arch_type
894+# else
895+# define machine_arch_type MACH_TYPE_SWARCOCPU
896+# endif
897+# define machine_is_swarcocpu() (machine_arch_type == MACH_TYPE_SWARCOCPU)
898+#else
899+# define machine_is_swarcocpu() (0)
900+#endif
901+
902+#ifdef CONFIG_MACH_SWARCODSL
903+# ifdef machine_arch_type
904+# undef machine_arch_type
905+# define machine_arch_type __machine_arch_type
906+# else
907+# define machine_arch_type MACH_TYPE_SWARCODSL
908+# endif
909+# define machine_is_swarcodsl() (machine_arch_type == MACH_TYPE_SWARCODSL)
910+#else
911+# define machine_is_swarcodsl() (0)
912+#endif
913+
914+#ifdef CONFIG_MACH_BLUEANGEL
915+# ifdef machine_arch_type
916+# undef machine_arch_type
917+# define machine_arch_type __machine_arch_type
918+# else
919+# define machine_arch_type MACH_TYPE_BLUEANGEL
920+# endif
921+# define machine_is_blueangel() (machine_arch_type == MACH_TYPE_BLUEANGEL)
922+#else
923+# define machine_is_blueangel() (0)
924+#endif
925+
926+#ifdef CONFIG_MACH_HAIRYGRAMA
927+# ifdef machine_arch_type
928+# undef machine_arch_type
929+# define machine_arch_type __machine_arch_type
930+# else
931+# define machine_arch_type MACH_TYPE_HAIRYGRAMA
932+# endif
933+# define machine_is_hairygrama() (machine_arch_type == MACH_TYPE_HAIRYGRAMA)
934+#else
935+# define machine_is_hairygrama() (0)
936+#endif
937+
938+#ifdef CONFIG_MACH_BANFF
939+# ifdef machine_arch_type
940+# undef machine_arch_type
941+# define machine_arch_type __machine_arch_type
942+# else
943+# define machine_arch_type MACH_TYPE_BANFF
944+# endif
945+# define machine_is_banff() (machine_arch_type == MACH_TYPE_BANFF)
946+#else
947+# define machine_is_banff() (0)
948+#endif
949+
950+#ifdef CONFIG_MACH_CARMEVA
951+# ifdef machine_arch_type
952+# undef machine_arch_type
953+# define machine_arch_type __machine_arch_type
954+# else
955+# define machine_arch_type MACH_TYPE_CARMEVA
956+# endif
957+# define machine_is_carmeva() (machine_arch_type == MACH_TYPE_CARMEVA)
958+#else
959+# define machine_is_carmeva() (0)
960+#endif
961+
962+#ifdef CONFIG_MACH_SAM255
963+# ifdef machine_arch_type
964+# undef machine_arch_type
965+# define machine_arch_type __machine_arch_type
966+# else
967+# define machine_arch_type MACH_TYPE_SAM255
968+# endif
969+# define machine_is_sam255() (machine_arch_type == MACH_TYPE_SAM255)
970+#else
971+# define machine_is_sam255() (0)
972+#endif
973+
974+#ifdef CONFIG_MACH_PPM10
975+# ifdef machine_arch_type
976+# undef machine_arch_type
977+# define machine_arch_type __machine_arch_type
978+# else
979+# define machine_arch_type MACH_TYPE_PPM10
980+# endif
981+# define machine_is_ppm10() (machine_arch_type == MACH_TYPE_PPM10)
982+#else
983+# define machine_is_ppm10() (0)
984+#endif
985+
986+#ifdef CONFIG_MACH_EDB9315A
987+# ifdef machine_arch_type
988+# undef machine_arch_type
989+# define machine_arch_type __machine_arch_type
990+# else
991+# define machine_arch_type MACH_TYPE_EDB9315A
992+# endif
993+# define machine_is_edb9315a() (machine_arch_type == MACH_TYPE_EDB9315A)
994+#else
995+# define machine_is_edb9315a() (0)
996+#endif
997+
998+#ifdef CONFIG_MACH_SUNSET
999+# ifdef machine_arch_type
1000+# undef machine_arch_type
1001+# define machine_arch_type __machine_arch_type
1002+# else
1003+# define machine_arch_type MACH_TYPE_SUNSET
1004+# endif
1005+# define machine_is_sunset() (machine_arch_type == MACH_TYPE_SUNSET)
1006+#else
1007+# define machine_is_sunset() (0)
1008+#endif
1009+
1010+#ifdef CONFIG_MACH_STARGATE2
1011+# ifdef machine_arch_type
1012+# undef machine_arch_type
1013+# define machine_arch_type __machine_arch_type
1014+# else
1015+# define machine_arch_type MACH_TYPE_STARGATE2
1016+# endif
1017+# define machine_is_stargate2() (machine_arch_type == MACH_TYPE_STARGATE2)
1018+#else
1019+# define machine_is_stargate2() (0)
1020+#endif
1021+
1022+#ifdef CONFIG_MACH_INTELMOTE2
1023+# ifdef machine_arch_type
1024+# undef machine_arch_type
1025+# define machine_arch_type __machine_arch_type
1026+# else
1027+# define machine_arch_type MACH_TYPE_INTELMOTE2
1028+# endif
1029+# define machine_is_intelmote2() (machine_arch_type == MACH_TYPE_INTELMOTE2)
1030+#else
1031+# define machine_is_intelmote2() (0)
1032+#endif
1033+
1034+#ifdef CONFIG_MACH_TRIZEPS4
1035+# ifdef machine_arch_type
1036+# undef machine_arch_type
1037+# define machine_arch_type __machine_arch_type
1038+# else
1039+# define machine_arch_type MACH_TYPE_TRIZEPS4
1040+# endif
1041+# define machine_is_trizeps4() (machine_arch_type == MACH_TYPE_TRIZEPS4)
1042+#else
1043+# define machine_is_trizeps4() (0)
1044+#endif
1045+
1046+#ifdef CONFIG_MACH_MAINSTONE2
1047+# ifdef machine_arch_type
1048+# undef machine_arch_type
1049+# define machine_arch_type __machine_arch_type
1050+# else
1051+# define machine_arch_type MACH_TYPE_MAINSTONE2
1052+# endif
1053+# define machine_is_mainstone2() (machine_arch_type == MACH_TYPE_MAINSTONE2)
1054+#else
1055+# define machine_is_mainstone2() (0)
1056+#endif
1057+
1058+#ifdef CONFIG_MACH_EZ_IXP42X
1059+# ifdef machine_arch_type
1060+# undef machine_arch_type
1061+# define machine_arch_type __machine_arch_type
1062+# else
1063+# define machine_arch_type MACH_TYPE_EZ_IXP42X
1064+# endif
1065+# define machine_is_ez_ixp42x() (machine_arch_type == MACH_TYPE_EZ_IXP42X)
1066+#else
1067+# define machine_is_ez_ixp42x() (0)
1068+#endif
1069+
1070+#ifdef CONFIG_MACH_TAPWAVE_ZODIAC
1071+# ifdef machine_arch_type
1072+# undef machine_arch_type
1073+# define machine_arch_type __machine_arch_type
1074+# else
1075+# define machine_arch_type MACH_TYPE_TAPWAVE_ZODIAC
1076+# endif
1077+# define machine_is_tapwave_zodiac() (machine_arch_type == MACH_TYPE_TAPWAVE_ZODIAC)
1078+#else
1079+# define machine_is_tapwave_zodiac() (0)
1080+#endif
1081+
1082+#ifdef CONFIG_MACH_UNIVERSALMETER
1083+# ifdef machine_arch_type
1084+# undef machine_arch_type
1085+# define machine_arch_type __machine_arch_type
1086+# else
1087+# define machine_arch_type MACH_TYPE_UNIVERSALMETER
1088+# endif
1089+# define machine_is_universalmeter() (machine_arch_type == MACH_TYPE_UNIVERSALMETER)
1090+#else
1091+# define machine_is_universalmeter() (0)
1092+#endif
1093+
1094+#ifdef CONFIG_MACH_HICOARM9
1095+# ifdef machine_arch_type
1096+# undef machine_arch_type
1097+# define machine_arch_type __machine_arch_type
1098+# else
1099+# define machine_arch_type MACH_TYPE_HICOARM9
1100+# endif
1101+# define machine_is_hicoarm9() (machine_arch_type == MACH_TYPE_HICOARM9)
1102+#else
1103+# define machine_is_hicoarm9() (0)
1104+#endif
1105+
1106+#ifdef CONFIG_MACH_PNX4008
1107+# ifdef machine_arch_type
1108+# undef machine_arch_type
1109+# define machine_arch_type __machine_arch_type
1110+# else
1111+# define machine_arch_type MACH_TYPE_PNX4008
1112+# endif
1113+# define machine_is_pnx4008() (machine_arch_type == MACH_TYPE_PNX4008)
1114+#else
1115+# define machine_is_pnx4008() (0)
1116+#endif
1117+
1118+#ifdef CONFIG_MACH_KWS6000
1119+# ifdef machine_arch_type
1120+# undef machine_arch_type
1121+# define machine_arch_type __machine_arch_type
1122+# else
1123+# define machine_arch_type MACH_TYPE_KWS6000
1124+# endif
1125+# define machine_is_kws6000() (machine_arch_type == MACH_TYPE_KWS6000)
1126+#else
1127+# define machine_is_kws6000() (0)
1128+#endif
1129+
1130+#ifdef CONFIG_MACH_PORTUX920T
1131+# ifdef machine_arch_type
1132+# undef machine_arch_type
1133+# define machine_arch_type __machine_arch_type
1134+# else
1135+# define machine_arch_type MACH_TYPE_PORTUX920T
1136+# endif
1137+# define machine_is_portux920t() (machine_arch_type == MACH_TYPE_PORTUX920T)
1138+#else
1139+# define machine_is_portux920t() (0)
1140+#endif
1141+
1142+#ifdef CONFIG_MACH_EZ_X5
1143+# ifdef machine_arch_type
1144+# undef machine_arch_type
1145+# define machine_arch_type __machine_arch_type
1146+# else
1147+# define machine_arch_type MACH_TYPE_EZ_X5
1148+# endif
1149+# define machine_is_ez_x5() (machine_arch_type == MACH_TYPE_EZ_X5)
1150+#else
1151+# define machine_is_ez_x5() (0)
1152+#endif
1153+
1154+#ifdef CONFIG_MACH_OMAP_RUDOLPH
1155+# ifdef machine_arch_type
1156+# undef machine_arch_type
1157+# define machine_arch_type __machine_arch_type
1158+# else
1159+# define machine_arch_type MACH_TYPE_OMAP_RUDOLPH
1160+# endif
1161+# define machine_is_omap_rudolph() (machine_arch_type == MACH_TYPE_OMAP_RUDOLPH)
1162+#else
1163+# define machine_is_omap_rudolph() (0)
1164+#endif
1165+
1166+#ifdef CONFIG_MACH_CPUAT91
1167+# ifdef machine_arch_type
1168+# undef machine_arch_type
1169+# define machine_arch_type __machine_arch_type
1170+# else
1171+# define machine_arch_type MACH_TYPE_CPUAT91
1172+# endif
1173+# define machine_is_cpuat91() (machine_arch_type == MACH_TYPE_CPUAT91)
1174+#else
1175+# define machine_is_cpuat91() (0)
1176+#endif
1177+
1178+#ifdef CONFIG_MACH_REA9200
1179+# ifdef machine_arch_type
1180+# undef machine_arch_type
1181+# define machine_arch_type __machine_arch_type
1182+# else
1183+# define machine_arch_type MACH_TYPE_REA9200
1184+# endif
1185+# define machine_is_rea9200() (machine_arch_type == MACH_TYPE_REA9200)
1186+#else
1187+# define machine_is_rea9200() (0)
1188+#endif
1189+
1190+#ifdef CONFIG_MACH_ACTS_PUNE_SA1110
1191+# ifdef machine_arch_type
1192+# undef machine_arch_type
1193+# define machine_arch_type __machine_arch_type
1194+# else
1195+# define machine_arch_type MACH_TYPE_ACTS_PUNE_SA1110
1196+# endif
1197+# define machine_is_acts_pune_sa1110() (machine_arch_type == MACH_TYPE_ACTS_PUNE_SA1110)
1198+#else
1199+# define machine_is_acts_pune_sa1110() (0)
1200+#endif
1201+
1202+#ifdef CONFIG_MACH_IXP425
1203+# ifdef machine_arch_type
1204+# undef machine_arch_type
1205+# define machine_arch_type __machine_arch_type
1206+# else
1207+# define machine_arch_type MACH_TYPE_IXP425
1208+# endif
1209+# define machine_is_ixp425() (machine_arch_type == MACH_TYPE_IXP425)
1210+#else
1211+# define machine_is_ixp425() (0)
1212+#endif
1213+
1214+#ifdef CONFIG_MACH_ARGONPLUSODYSSEY
1215+# ifdef machine_arch_type
1216+# undef machine_arch_type
1217+# define machine_arch_type __machine_arch_type
1218+# else
1219+# define machine_arch_type MACH_TYPE_ARGONPLUSODYSSEY
1220+# endif
1221+# define machine_is_i30030ads() (machine_arch_type == MACH_TYPE_ARGONPLUSODYSSEY)
1222+#else
1223+# define machine_is_i30030ads() (0)
1224+#endif
1225+
1226+#ifdef CONFIG_MACH_PERCH
1227+# ifdef machine_arch_type
1228+# undef machine_arch_type
1229+# define machine_arch_type __machine_arch_type
1230+# else
1231+# define machine_arch_type MACH_TYPE_PERCH
1232+# endif
1233+# define machine_is_perch() (machine_arch_type == MACH_TYPE_PERCH)
1234+#else
1235+# define machine_is_perch() (0)
1236+#endif
1237+
1238+#ifdef CONFIG_MACH_EIS05R1
1239+# ifdef machine_arch_type
1240+# undef machine_arch_type
1241+# define machine_arch_type __machine_arch_type
1242+# else
1243+# define machine_arch_type MACH_TYPE_EIS05R1
1244+# endif
1245+# define machine_is_eis05r1() (machine_arch_type == MACH_TYPE_EIS05R1)
1246+#else
1247+# define machine_is_eis05r1() (0)
1248+#endif
1249+
1250+#ifdef CONFIG_MACH_PEPPERPAD
1251+# ifdef machine_arch_type
1252+# undef machine_arch_type
1253+# define machine_arch_type __machine_arch_type
1254+# else
1255+# define machine_arch_type MACH_TYPE_PEPPERPAD
1256+# endif
1257+# define machine_is_pepperpad() (machine_arch_type == MACH_TYPE_PEPPERPAD)
1258+#else
1259+# define machine_is_pepperpad() (0)
1260+#endif
1261+
1262+#ifdef CONFIG_MACH_SB3010
1263+# ifdef machine_arch_type
1264+# undef machine_arch_type
1265+# define machine_arch_type __machine_arch_type
1266+# else
1267+# define machine_arch_type MACH_TYPE_SB3010
1268+# endif
1269+# define machine_is_sb3010() (machine_arch_type == MACH_TYPE_SB3010)
1270+#else
1271+# define machine_is_sb3010() (0)
1272+#endif
1273+
1274+#ifdef CONFIG_MACH_RM9200
1275+# ifdef machine_arch_type
1276+# undef machine_arch_type
1277+# define machine_arch_type __machine_arch_type
1278+# else
1279+# define machine_arch_type MACH_TYPE_RM9200
1280+# endif
1281+# define machine_is_rm9200() (machine_arch_type == MACH_TYPE_RM9200)
1282+#else
1283+# define machine_is_rm9200() (0)
1284+#endif
1285+
1286+#ifdef CONFIG_MACH_DMA03
1287+# ifdef machine_arch_type
1288+# undef machine_arch_type
1289+# define machine_arch_type __machine_arch_type
1290+# else
1291+# define machine_arch_type MACH_TYPE_DMA03
1292+# endif
1293+# define machine_is_dma03() (machine_arch_type == MACH_TYPE_DMA03)
1294+#else
1295+# define machine_is_dma03() (0)
1296+#endif
1297+
1298+#ifdef CONFIG_MACH_ROAD_S101
1299+# ifdef machine_arch_type
1300+# undef machine_arch_type
1301+# define machine_arch_type __machine_arch_type
1302+# else
1303+# define machine_arch_type MACH_TYPE_ROAD_S101
1304+# endif
1305+# define machine_is_road_s101() (machine_arch_type == MACH_TYPE_ROAD_S101)
1306+#else
1307+# define machine_is_road_s101() (0)
1308+#endif
1309+
1310+#ifdef CONFIG_MACH_IQ_NEXTGEN_A
1311+# ifdef machine_arch_type
1312+# undef machine_arch_type
1313+# define machine_arch_type __machine_arch_type
1314+# else
1315+# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_A
1316+# endif
1317+# define machine_is_iq_nextgen_a() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_A)
1318+#else
1319+# define machine_is_iq_nextgen_a() (0)
1320+#endif
1321+
1322+#ifdef CONFIG_MACH_IQ_NEXTGEN_B
1323+# ifdef machine_arch_type
1324+# undef machine_arch_type
1325+# define machine_arch_type __machine_arch_type
1326+# else
1327+# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_B
1328+# endif
1329+# define machine_is_iq_nextgen_b() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_B)
1330+#else
1331+# define machine_is_iq_nextgen_b() (0)
1332+#endif
1333+
1334+#ifdef CONFIG_MACH_IQ_NEXTGEN_C
1335+# ifdef machine_arch_type
1336+# undef machine_arch_type
1337+# define machine_arch_type __machine_arch_type
1338+# else
1339+# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_C
1340+# endif
1341+# define machine_is_iq_nextgen_c() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_C)
1342+#else
1343+# define machine_is_iq_nextgen_c() (0)
1344+#endif
1345+
1346+#ifdef CONFIG_MACH_IQ_NEXTGEN_D
1347+# ifdef machine_arch_type
1348+# undef machine_arch_type
1349+# define machine_arch_type __machine_arch_type
1350+# else
1351+# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_D
1352+# endif
1353+# define machine_is_iq_nextgen_d() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_D)
1354+#else
1355+# define machine_is_iq_nextgen_d() (0)
1356+#endif
1357+
1358+#ifdef CONFIG_MACH_IQ_NEXTGEN_E
1359+# ifdef machine_arch_type
1360+# undef machine_arch_type
1361+# define machine_arch_type __machine_arch_type
1362+# else
1363+# define machine_arch_type MACH_TYPE_IQ_NEXTGEN_E
1364+# endif
1365+# define machine_is_iq_nextgen_e() (machine_arch_type == MACH_TYPE_IQ_NEXTGEN_E)
1366+#else
1367+# define machine_is_iq_nextgen_e() (0)
1368+#endif
1369+
1370+#ifdef CONFIG_MACH_MALLOW_AT91
1371+# ifdef machine_arch_type
1372+# undef machine_arch_type
1373+# define machine_arch_type __machine_arch_type
1374+# else
1375+# define machine_arch_type MACH_TYPE_MALLOW_AT91
1376+# endif
1377+# define machine_is_mallow_at91() (machine_arch_type == MACH_TYPE_MALLOW_AT91)
1378+#else
1379+# define machine_is_mallow_at91() (0)
1380+#endif
1381+
1382+#ifdef CONFIG_MACH_CYBERTRACKER_I
1383+# ifdef machine_arch_type
1384+# undef machine_arch_type
1385+# define machine_arch_type __machine_arch_type
1386+# else
1387+# define machine_arch_type MACH_TYPE_CYBERTRACKER_I
1388+# endif
1389+# define machine_is_cybertracker_i() (machine_arch_type == MACH_TYPE_CYBERTRACKER_I)
1390+#else
1391+# define machine_is_cybertracker_i() (0)
1392+#endif
1393+
1394+#ifdef CONFIG_MACH_GESBC931X
1395+# ifdef machine_arch_type
1396+# undef machine_arch_type
1397+# define machine_arch_type __machine_arch_type
1398+# else
1399+# define machine_arch_type MACH_TYPE_GESBC931X
1400+# endif
1401+# define machine_is_gesbc931x() (machine_arch_type == MACH_TYPE_GESBC931X)
1402+#else
1403+# define machine_is_gesbc931x() (0)
1404+#endif
1405+
1406+#ifdef CONFIG_MACH_CENTIPAD
1407+# ifdef machine_arch_type
1408+# undef machine_arch_type
1409+# define machine_arch_type __machine_arch_type
1410+# else
1411+# define machine_arch_type MACH_TYPE_CENTIPAD
1412+# endif
1413+# define machine_is_centipad() (machine_arch_type == MACH_TYPE_CENTIPAD)
1414+#else
1415+# define machine_is_centipad() (0)
1416+#endif
1417+
1418+#ifdef CONFIG_MACH_ARMSOC
1419+# ifdef machine_arch_type
1420+# undef machine_arch_type
1421+# define machine_arch_type __machine_arch_type
1422+# else
1423+# define machine_arch_type MACH_TYPE_ARMSOC
1424+# endif
1425+# define machine_is_armsoc() (machine_arch_type == MACH_TYPE_ARMSOC)
1426+#else
1427+# define machine_is_armsoc() (0)
1428+#endif
1429+
1430+#ifdef CONFIG_MACH_SE4200
1431+# ifdef machine_arch_type
1432+# undef machine_arch_type
1433+# define machine_arch_type __machine_arch_type
1434+# else
1435+# define machine_arch_type MACH_TYPE_SE4200
1436+# endif
1437+# define machine_is_se4200() (machine_arch_type == MACH_TYPE_SE4200)
1438+#else
1439+# define machine_is_se4200() (0)
1440+#endif
1441+
1442+#ifdef CONFIG_MACH_EMS197A
1443+# ifdef machine_arch_type
1444+# undef machine_arch_type
1445+# define machine_arch_type __machine_arch_type
1446+# else
1447+# define machine_arch_type MACH_TYPE_EMS197A
1448+# endif
1449+# define machine_is_ems197a() (machine_arch_type == MACH_TYPE_EMS197A)
1450+#else
1451+# define machine_is_ems197a() (0)
1452+#endif
1453+
1454+#ifdef CONFIG_MACH_MICRO9
1455+# ifdef machine_arch_type
1456+# undef machine_arch_type
1457+# define machine_arch_type __machine_arch_type
1458+# else
1459+# define machine_arch_type MACH_TYPE_MICRO9
1460+# endif
1461+# define machine_is_micro9() (machine_arch_type == MACH_TYPE_MICRO9)
1462+#else
1463+# define machine_is_micro9() (0)
1464+#endif
1465+
1466+#ifdef CONFIG_MACH_MICRO9L
1467+# ifdef machine_arch_type
1468+# undef machine_arch_type
1469+# define machine_arch_type __machine_arch_type
1470+# else
1471+# define machine_arch_type MACH_TYPE_MICRO9L
1472+# endif
1473+# define machine_is_micro9l() (machine_arch_type == MACH_TYPE_MICRO9L)
1474+#else
1475+# define machine_is_micro9l() (0)
1476+#endif
1477+
1478+#ifdef CONFIG_MACH_UC5471DSP
1479+# ifdef machine_arch_type
1480+# undef machine_arch_type
1481+# define machine_arch_type __machine_arch_type
1482+# else
1483+# define machine_arch_type MACH_TYPE_UC5471DSP
1484+# endif
1485+# define machine_is_uc5471dsp() (machine_arch_type == MACH_TYPE_UC5471DSP)
1486+#else
1487+# define machine_is_uc5471dsp() (0)
1488+#endif
1489+
1490+#ifdef CONFIG_MACH_SJ5471ENG
1491+# ifdef machine_arch_type
1492+# undef machine_arch_type
1493+# define machine_arch_type __machine_arch_type
1494+# else
1495+# define machine_arch_type MACH_TYPE_SJ5471ENG
1496+# endif
1497+# define machine_is_sj5471eng() (machine_arch_type == MACH_TYPE_SJ5471ENG)
1498+#else
1499+# define machine_is_sj5471eng() (0)
1500+#endif
1501+
1502+#ifdef CONFIG_MACH_CMPXA26X
1503+# ifdef machine_arch_type
1504+# undef machine_arch_type
1505+# define machine_arch_type __machine_arch_type
1506+# else
1507+# define machine_arch_type MACH_TYPE_CMPXA26X
1508+# endif
1509+# define machine_is_none() (machine_arch_type == MACH_TYPE_CMPXA26X)
1510+#else
1511+# define machine_is_none() (0)
1512+#endif
1513+
1514+#ifdef CONFIG_MACH_NC
1515+# ifdef machine_arch_type
1516+# undef machine_arch_type
1517+# define machine_arch_type __machine_arch_type
1518+# else
1519+# define machine_arch_type MACH_TYPE_NC
1520+# endif
1521+# define machine_is_nc1() (machine_arch_type == MACH_TYPE_NC)
1522+#else
1523+# define machine_is_nc1() (0)
1524+#endif
1525+
1526+#ifdef CONFIG_MACH_OMAP_PALMTE
1527+# ifdef machine_arch_type
1528+# undef machine_arch_type
1529+# define machine_arch_type __machine_arch_type
1530+# else
1531+# define machine_arch_type MACH_TYPE_OMAP_PALMTE
1532+# endif
1533+# define machine_is_omap_palmte() (machine_arch_type == MACH_TYPE_OMAP_PALMTE)
1534+#else
1535+# define machine_is_omap_palmte() (0)
1536+#endif
1537+
1538+#ifdef CONFIG_MACH_AJAX52X
1539+# ifdef machine_arch_type
1540+# undef machine_arch_type
1541+# define machine_arch_type __machine_arch_type
1542+# else
1543+# define machine_arch_type MACH_TYPE_AJAX52X
1544+# endif
1545+# define machine_is_ajax52x() (machine_arch_type == MACH_TYPE_AJAX52X)
1546+#else
1547+# define machine_is_ajax52x() (0)
1548+#endif
1549+
1550+#ifdef CONFIG_MACH_SIRIUSTAR
1551+# ifdef machine_arch_type
1552+# undef machine_arch_type
1553+# define machine_arch_type __machine_arch_type
1554+# else
1555+# define machine_arch_type MACH_TYPE_SIRIUSTAR
1556+# endif
1557+# define machine_is_siriustar() (machine_arch_type == MACH_TYPE_SIRIUSTAR)
1558+#else
1559+# define machine_is_siriustar() (0)
1560+#endif
1561+
1562+#ifdef CONFIG_MACH_IODATA_HDLG
1563+# ifdef machine_arch_type
1564+# undef machine_arch_type
1565+# define machine_arch_type __machine_arch_type
1566+# else
1567+# define machine_arch_type MACH_TYPE_IODATA_HDLG
1568+# endif
1569+# define machine_is_iodata_hdlg() (machine_arch_type == MACH_TYPE_IODATA_HDLG)
1570+#else
1571+# define machine_is_iodata_hdlg() (0)
1572+#endif
1573+
1574+#ifdef CONFIG_MACH_AT91RM9200UTL
1575+# ifdef machine_arch_type
1576+# undef machine_arch_type
1577+# define machine_arch_type __machine_arch_type
1578+# else
1579+# define machine_arch_type MACH_TYPE_AT91RM9200UTL
1580+# endif
1581+# define machine_is_at91rm9200utl() (machine_arch_type == MACH_TYPE_AT91RM9200UTL)
1582+#else
1583+# define machine_is_at91rm9200utl() (0)
1584+#endif
1585+
1586+#ifdef CONFIG_MACH_BIOSAFE
1587+# ifdef machine_arch_type
1588+# undef machine_arch_type
1589+# define machine_arch_type __machine_arch_type
1590+# else
1591+# define machine_arch_type MACH_TYPE_BIOSAFE
1592+# endif
1593+# define machine_is_biosafe() (machine_arch_type == MACH_TYPE_BIOSAFE)
1594+#else
1595+# define machine_is_biosafe() (0)
1596+#endif
1597+
1598+#ifdef CONFIG_MACH_MP1000
1599+# ifdef machine_arch_type
1600+# undef machine_arch_type
1601+# define machine_arch_type __machine_arch_type
1602+# else
1603+# define machine_arch_type MACH_TYPE_MP1000
1604+# endif
1605+# define machine_is_mp1000() (machine_arch_type == MACH_TYPE_MP1000)
1606+#else
1607+# define machine_is_mp1000() (0)
1608+#endif
1609+
1610+#ifdef CONFIG_MACH_PARSY
1611+# ifdef machine_arch_type
1612+# undef machine_arch_type
1613+# define machine_arch_type __machine_arch_type
1614+# else
1615+# define machine_arch_type MACH_TYPE_PARSY
1616+# endif
1617+# define machine_is_parsy() (machine_arch_type == MACH_TYPE_PARSY)
1618+#else
1619+# define machine_is_parsy() (0)
1620+#endif
1621+
1622+#ifdef CONFIG_MACH_CCXP
1623+# ifdef machine_arch_type
1624+# undef machine_arch_type
1625+# define machine_arch_type __machine_arch_type
1626+# else
1627+# define machine_arch_type MACH_TYPE_CCXP
1628+# endif
1629+# define machine_is_ccxp270() (machine_arch_type == MACH_TYPE_CCXP)
1630+#else
1631+# define machine_is_ccxp270() (0)
1632+#endif
1633+
1634+#ifdef CONFIG_MACH_OMAP_GSAMPLE
1635+# ifdef machine_arch_type
1636+# undef machine_arch_type
1637+# define machine_arch_type __machine_arch_type
1638+# else
1639+# define machine_arch_type MACH_TYPE_OMAP_GSAMPLE
1640+# endif
1641+# define machine_is_omap_gsample() (machine_arch_type == MACH_TYPE_OMAP_GSAMPLE)
1642+#else
1643+# define machine_is_omap_gsample() (0)
1644+#endif
1645+
1646+#ifdef CONFIG_MACH_REALVIEW_EB
1647+# ifdef machine_arch_type
1648+# undef machine_arch_type
1649+# define machine_arch_type __machine_arch_type
1650+# else
1651+# define machine_arch_type MACH_TYPE_REALVIEW_EB
1652+# endif
1653+# define machine_is_realview_eb() (machine_arch_type == MACH_TYPE_REALVIEW_EB)
1654+#else
1655+# define machine_is_realview_eb() (0)
1656+#endif
1657+
1658+#ifdef CONFIG_MACH_SAMOA
1659+# ifdef machine_arch_type
1660+# undef machine_arch_type
1661+# define machine_arch_type __machine_arch_type
1662+# else
1663+# define machine_arch_type MACH_TYPE_SAMOA
1664+# endif
1665+# define machine_is_samoa() (machine_arch_type == MACH_TYPE_SAMOA)
1666+#else
1667+# define machine_is_samoa() (0)
1668+#endif
1669+
1670+#ifdef CONFIG_MACH_T3XSCALE
1671+# ifdef machine_arch_type
1672+# undef machine_arch_type
1673+# define machine_arch_type __machine_arch_type
1674+# else
1675+# define machine_arch_type MACH_TYPE_T3XSCALE
1676+# endif
1677+# define machine_is_t3xscale() (machine_arch_type == MACH_TYPE_T3XSCALE)
1678+#else
1679+# define machine_is_t3xscale() (0)
1680+#endif
1681+
1682+#ifdef CONFIG_MACH_I878
1683+# ifdef machine_arch_type
1684+# undef machine_arch_type
1685+# define machine_arch_type __machine_arch_type
1686+# else
1687+# define machine_arch_type MACH_TYPE_I878
1688+# endif
1689+# define machine_is_i878() (machine_arch_type == MACH_TYPE_I878)
1690+#else
1691+# define machine_is_i878() (0)
1692+#endif
1693+
1694+#ifdef CONFIG_MACH_BORZOI
1695+# ifdef machine_arch_type
1696+# undef machine_arch_type
1697+# define machine_arch_type __machine_arch_type
1698+# else
1699+# define machine_arch_type MACH_TYPE_BORZOI
1700+# endif
1701+# define machine_is_borzoi() (machine_arch_type == MACH_TYPE_BORZOI)
1702+#else
1703+# define machine_is_borzoi() (0)
1704+#endif
1705+
1706+#ifdef CONFIG_MACH_GECKO
1707+# ifdef machine_arch_type
1708+# undef machine_arch_type
1709+# define machine_arch_type __machine_arch_type
1710+# else
1711+# define machine_arch_type MACH_TYPE_GECKO
1712+# endif
1713+# define machine_is_gecko() (machine_arch_type == MACH_TYPE_GECKO)
1714+#else
1715+# define machine_is_gecko() (0)
1716+#endif
1717+
1718+#ifdef CONFIG_MACH_DS101
1719+# ifdef machine_arch_type
1720+# undef machine_arch_type
1721+# define machine_arch_type __machine_arch_type
1722+# else
1723+# define machine_arch_type MACH_TYPE_DS101
1724+# endif
1725+# define machine_is_ds101() (machine_arch_type == MACH_TYPE_DS101)
1726+#else
1727+# define machine_is_ds101() (0)
1728+#endif
1729+
1730+#ifdef CONFIG_MACH_OMAP_PALMTT2
1731+# ifdef machine_arch_type
1732+# undef machine_arch_type
1733+# define machine_arch_type __machine_arch_type
1734+# else
1735+# define machine_arch_type MACH_TYPE_OMAP_PALMTT2
1736+# endif
1737+# define machine_is_omap_palmtt2() (machine_arch_type == MACH_TYPE_OMAP_PALMTT2)
1738+#else
1739+# define machine_is_omap_palmtt2() (0)
1740+#endif
1741+
1742+#ifdef CONFIG_MACH_XSCALE_PALMLD
1743+# ifdef machine_arch_type
1744+# undef machine_arch_type
1745+# define machine_arch_type __machine_arch_type
1746+# else
1747+# define machine_arch_type MACH_TYPE_XSCALE_PALMLD
1748+# endif
1749+# define machine_is_xscale_palmld() (machine_arch_type == MACH_TYPE_XSCALE_PALMLD)
1750+#else
1751+# define machine_is_xscale_palmld() (0)
1752+#endif
1753+
1754+#ifdef CONFIG_MACH_CC9C
1755+# ifdef machine_arch_type
1756+# undef machine_arch_type
1757+# define machine_arch_type __machine_arch_type
1758+# else
1759+# define machine_arch_type MACH_TYPE_CC9C
1760+# endif
1761+# define machine_is_cc9c() (machine_arch_type == MACH_TYPE_CC9C)
1762+#else
1763+# define machine_is_cc9c() (0)
1764+#endif
1765+
1766+#ifdef CONFIG_MACH_SBC1670
1767+# ifdef machine_arch_type
1768+# undef machine_arch_type
1769+# define machine_arch_type __machine_arch_type
1770+# else
1771+# define machine_arch_type MACH_TYPE_SBC1670
1772+# endif
1773+# define machine_is_sbc1670() (machine_arch_type == MACH_TYPE_SBC1670)
1774+#else
1775+# define machine_is_sbc1670() (0)
1776+#endif
1777+
1778+#ifdef CONFIG_MACH_IXDP28X5
1779+# ifdef machine_arch_type
1780+# undef machine_arch_type
1781+# define machine_arch_type __machine_arch_type
1782+# else
1783+# define machine_arch_type MACH_TYPE_IXDP28X5
1784+# endif
1785+# define machine_is_ixdp28x5() (machine_arch_type == MACH_TYPE_IXDP28X5)
1786+#else
1787+# define machine_is_ixdp28x5() (0)
1788+#endif
1789+
1790+#ifdef CONFIG_MACH_OMAP_PALMTT
1791+# ifdef machine_arch_type
1792+# undef machine_arch_type
1793+# define machine_arch_type __machine_arch_type
1794+# else
1795+# define machine_arch_type MACH_TYPE_OMAP_PALMTT
1796+# endif
1797+# define machine_is_omap_palmtt() (machine_arch_type == MACH_TYPE_OMAP_PALMTT)
1798+#else
1799+# define machine_is_omap_palmtt() (0)
1800+#endif
1801+
1802+#ifdef CONFIG_MACH_ML696K
1803+# ifdef machine_arch_type
1804+# undef machine_arch_type
1805+# define machine_arch_type __machine_arch_type
1806+# else
1807+# define machine_arch_type MACH_TYPE_ML696K
1808+# endif
1809+# define machine_is_ml696k() (machine_arch_type == MACH_TYPE_ML696K)
1810+#else
1811+# define machine_is_ml696k() (0)
1812+#endif
1813+
1814+#ifdef CONFIG_MACH_ARCOM_ZEUS
1815+# ifdef machine_arch_type
1816+# undef machine_arch_type
1817+# define machine_arch_type __machine_arch_type
1818+# else
1819+# define machine_arch_type MACH_TYPE_ARCOM_ZEUS
1820+# endif
1821+# define machine_is_arcom_zeus() (machine_arch_type == MACH_TYPE_ARCOM_ZEUS)
1822+#else
1823+# define machine_is_arcom_zeus() (0)
1824+#endif
1825+
1826+#ifdef CONFIG_MACH_OSIRIS
1827+# ifdef machine_arch_type
1828+# undef machine_arch_type
1829+# define machine_arch_type __machine_arch_type
1830+# else
1831+# define machine_arch_type MACH_TYPE_OSIRIS
1832+# endif
1833+# define machine_is_osiris() (machine_arch_type == MACH_TYPE_OSIRIS)
1834+#else
1835+# define machine_is_osiris() (0)
1836+#endif
1837+
1838+#ifdef CONFIG_MACH_MAESTRO
1839+# ifdef machine_arch_type
1840+# undef machine_arch_type
1841+# define machine_arch_type __machine_arch_type
1842+# else
1843+# define machine_arch_type MACH_TYPE_MAESTRO
1844+# endif
1845+# define machine_is_maestro() (machine_arch_type == MACH_TYPE_MAESTRO)
1846+#else
1847+# define machine_is_maestro() (0)
1848+#endif
1849+
1850+#ifdef CONFIG_MACH_TUNGE2
1851+# ifdef machine_arch_type
1852+# undef machine_arch_type
1853+# define machine_arch_type __machine_arch_type
1854+# else
1855+# define machine_arch_type MACH_TYPE_TUNGE2
1856+# endif
1857+# define machine_is_tunge2() (machine_arch_type == MACH_TYPE_TUNGE2)
1858+#else
1859+# define machine_is_tunge2() (0)
1860+#endif
1861+
1862+#ifdef CONFIG_MACH_IXBBM
1863+# ifdef machine_arch_type
1864+# undef machine_arch_type
1865+# define machine_arch_type __machine_arch_type
1866+# else
1867+# define machine_arch_type MACH_TYPE_IXBBM
1868+# endif
1869+# define machine_is_ixbbm() (machine_arch_type == MACH_TYPE_IXBBM)
1870+#else
1871+# define machine_is_ixbbm() (0)
1872+#endif
1873+
1874+#ifdef CONFIG_MACH_MX27
1875+# ifdef machine_arch_type
1876+# undef machine_arch_type
1877+# define machine_arch_type __machine_arch_type
1878+# else
1879+# define machine_arch_type MACH_TYPE_MX27
1880+# endif
1881+# define machine_is_mx27ads() (machine_arch_type == MACH_TYPE_MX27)
1882+#else
1883+# define machine_is_mx27ads() (0)
1884+#endif
1885+
1886+#ifdef CONFIG_MACH_AX8004
1887+# ifdef machine_arch_type
1888+# undef machine_arch_type
1889+# define machine_arch_type __machine_arch_type
1890+# else
1891+# define machine_arch_type MACH_TYPE_AX8004
1892+# endif
1893+# define machine_is_ax8004() (machine_arch_type == MACH_TYPE_AX8004)
1894+#else
1895+# define machine_is_ax8004() (0)
1896+#endif
1897+
1898+#ifdef CONFIG_MACH_AT91SAM9261EK
1899+# ifdef machine_arch_type
1900+# undef machine_arch_type
1901+# define machine_arch_type __machine_arch_type
1902+# else
1903+# define machine_arch_type MACH_TYPE_AT91SAM9261EK
1904+# endif
1905+# define machine_is_at91sam9261ek() (machine_arch_type == MACH_TYPE_AT91SAM9261EK)
1906+#else
1907+# define machine_is_at91sam9261ek() (0)
1908+#endif
1909+
1910+#ifdef CONFIG_MACH_LOFT
1911+# ifdef machine_arch_type
1912+# undef machine_arch_type
1913+# define machine_arch_type __machine_arch_type
1914+# else
1915+# define machine_arch_type MACH_TYPE_LOFT
1916+# endif
1917+# define machine_is_loft() (machine_arch_type == MACH_TYPE_LOFT)
1918+#else
1919+# define machine_is_loft() (0)
1920+#endif
1921+
1922+#ifdef CONFIG_MACH_MAGPIE
1923+# ifdef machine_arch_type
1924+# undef machine_arch_type
1925+# define machine_arch_type __machine_arch_type
1926+# else
1927+# define machine_arch_type MACH_TYPE_MAGPIE
1928+# endif
1929+# define machine_is_magpie() (machine_arch_type == MACH_TYPE_MAGPIE)
1930+#else
1931+# define machine_is_magpie() (0)
1932+#endif
1933+
1934+#ifdef CONFIG_MACH_MX21
1935+# ifdef machine_arch_type
1936+# undef machine_arch_type
1937+# define machine_arch_type __machine_arch_type
1938+# else
1939+# define machine_arch_type MACH_TYPE_MX21
1940+# endif
1941+# define machine_is_mx21ads() (machine_arch_type == MACH_TYPE_MX21)
1942+#else
1943+# define machine_is_mx21ads() (0)
1944+#endif
1945+
1946+#ifdef CONFIG_MACH_MB87M3400
1947+# ifdef machine_arch_type
1948+# undef machine_arch_type
1949+# define machine_arch_type __machine_arch_type
1950+# else
1951+# define machine_arch_type MACH_TYPE_MB87M3400
1952+# endif
1953+# define machine_is_mb87m3400() (machine_arch_type == MACH_TYPE_MB87M3400)
1954+#else
1955+# define machine_is_mb87m3400() (0)
1956+#endif
1957+
1958+#ifdef CONFIG_MACH_MGUARD_DELTA
1959+# ifdef machine_arch_type
1960+# undef machine_arch_type
1961+# define machine_arch_type __machine_arch_type
1962+# else
1963+# define machine_arch_type MACH_TYPE_MGUARD_DELTA
1964+# endif
1965+# define machine_is_mguard_delta() (machine_arch_type == MACH_TYPE_MGUARD_DELTA)
1966+#else
1967+# define machine_is_mguard_delta() (0)
1968+#endif
1969+
1970+#ifdef CONFIG_MACH_DAVINCI_DVDP
1971+# ifdef machine_arch_type
1972+# undef machine_arch_type
1973+# define machine_arch_type __machine_arch_type
1974+# else
1975+# define machine_arch_type MACH_TYPE_DAVINCI_DVDP
1976+# endif
1977+# define machine_is_davinci_dvdp() (machine_arch_type == MACH_TYPE_DAVINCI_DVDP)
1978+#else
1979+# define machine_is_davinci_dvdp() (0)
1980+#endif
1981+
1982+#ifdef CONFIG_MACH_HTCUNIVERSAL
1983+# ifdef machine_arch_type
1984+# undef machine_arch_type
1985+# define machine_arch_type __machine_arch_type
1986+# else
1987+# define machine_arch_type MACH_TYPE_HTCUNIVERSAL
1988+# endif
1989+# define machine_is_htcuniversal() (machine_arch_type == MACH_TYPE_HTCUNIVERSAL)
1990+#else
1991+# define machine_is_htcuniversal() (0)
1992+#endif
1993+
1994+#ifdef CONFIG_MACH_TPAD
1995+# ifdef machine_arch_type
1996+# undef machine_arch_type
1997+# define machine_arch_type __machine_arch_type
1998+# else
1999+# define machine_arch_type MACH_TYPE_TPAD
2000+# endif
2001+# define machine_is_tpad() (machine_arch_type == MACH_TYPE_TPAD)
2002+#else
2003+# define machine_is_tpad() (0)
2004+#endif
2005+
2006+#ifdef CONFIG_MACH_ROVERP3
2007+# ifdef machine_arch_type
2008+# undef machine_arch_type
2009+# define machine_arch_type __machine_arch_type
2010+# else
2011+# define machine_arch_type MACH_TYPE_ROVERP3
2012+# endif
2013+# define machine_is_roverp3() (machine_arch_type == MACH_TYPE_ROVERP3)
2014+#else
2015+# define machine_is_roverp3() (0)
2016+#endif
2017+
2018+#ifdef CONFIG_MACH_JORNADA928
2019+# ifdef machine_arch_type
2020+# undef machine_arch_type
2021+# define machine_arch_type __machine_arch_type
2022+# else
2023+# define machine_arch_type MACH_TYPE_JORNADA928
2024+# endif
2025+# define machine_is_jornada928() (machine_arch_type == MACH_TYPE_JORNADA928)
2026+#else
2027+# define machine_is_jornada928() (0)
2028+#endif
2029+
2030+#ifdef CONFIG_MACH_MV88FXX81
2031+# ifdef machine_arch_type
2032+# undef machine_arch_type
2033+# define machine_arch_type __machine_arch_type
2034+# else
2035+# define machine_arch_type MACH_TYPE_MV88FXX81
2036+# endif
2037+# define machine_is_mv88fxx81() (machine_arch_type == MACH_TYPE_MV88FXX81)
2038+#else
2039+# define machine_is_mv88fxx81() (0)
2040+#endif
2041+
2042+#ifdef CONFIG_MACH_STMP36XX
2043+# ifdef machine_arch_type
2044+# undef machine_arch_type
2045+# define machine_arch_type __machine_arch_type
2046+# else
2047+# define machine_arch_type MACH_TYPE_STMP36XX
2048+# endif
2049+# define machine_is_stmp36xx() (machine_arch_type == MACH_TYPE_STMP36XX)
2050+#else
2051+# define machine_is_stmp36xx() (0)
2052+#endif
2053+
2054+#ifdef CONFIG_MACH_SXNI79524
2055+# ifdef machine_arch_type
2056+# undef machine_arch_type
2057+# define machine_arch_type __machine_arch_type
2058+# else
2059+# define machine_arch_type MACH_TYPE_SXNI79524
2060+# endif
2061+# define machine_is_sxni79524() (machine_arch_type == MACH_TYPE_SXNI79524)
2062+#else
2063+# define machine_is_sxni79524() (0)
2064+#endif
2065+
2066+#ifdef CONFIG_MACH_AMS_DELTA
2067+# ifdef machine_arch_type
2068+# undef machine_arch_type
2069+# define machine_arch_type __machine_arch_type
2070+# else
2071+# define machine_arch_type MACH_TYPE_AMS_DELTA
2072+# endif
2073+# define machine_is_ams_delta() (machine_arch_type == MACH_TYPE_AMS_DELTA)
2074+#else
2075+# define machine_is_ams_delta() (0)
2076+#endif
2077+
2078+#ifdef CONFIG_MACH_URANIUM
2079+# ifdef machine_arch_type
2080+# undef machine_arch_type
2081+# define machine_arch_type __machine_arch_type
2082+# else
2083+# define machine_arch_type MACH_TYPE_URANIUM
2084+# endif
2085+# define machine_is_uranium() (machine_arch_type == MACH_TYPE_URANIUM)
2086+#else
2087+# define machine_is_uranium() (0)
2088+#endif
2089+
2090+#ifdef CONFIG_MACH_UCON
2091+# ifdef machine_arch_type
2092+# undef machine_arch_type
2093+# define machine_arch_type __machine_arch_type
2094+# else
2095+# define machine_arch_type MACH_TYPE_UCON
2096+# endif
2097+# define machine_is_ucon() (machine_arch_type == MACH_TYPE_UCON)
2098+#else
2099+# define machine_is_ucon() (0)
2100+#endif
2101+
2102+#ifdef CONFIG_MACH_NAS100D
2103+# ifdef machine_arch_type
2104+# undef machine_arch_type
2105+# define machine_arch_type __machine_arch_type
2106+# else
2107+# define machine_arch_type MACH_TYPE_NAS100D
2108+# endif
2109+# define machine_is_nas100d() (machine_arch_type == MACH_TYPE_NAS100D)
2110+#else
2111+# define machine_is_nas100d() (0)
2112+#endif
2113+
2114+#ifdef CONFIG_MACH_L083_1000
2115+# ifdef machine_arch_type
2116+# undef machine_arch_type
2117+# define machine_arch_type __machine_arch_type
2118+# else
2119+# define machine_arch_type MACH_TYPE_L083_1000
2120+# endif
2121+# define machine_is_l083() (machine_arch_type == MACH_TYPE_L083_1000)
2122+#else
2123+# define machine_is_l083() (0)
2124+#endif
2125+
2126+#ifdef CONFIG_MACH_EZX
2127+# ifdef machine_arch_type
2128+# undef machine_arch_type
2129+# define machine_arch_type __machine_arch_type
2130+# else
2131+# define machine_arch_type MACH_TYPE_EZX
2132+# endif
2133+# define machine_is_ezx() (machine_arch_type == MACH_TYPE_EZX)
2134+#else
2135+# define machine_is_ezx() (0)
2136+#endif
2137+
2138+#ifdef CONFIG_MACH_PNX5220
2139+# ifdef machine_arch_type
2140+# undef machine_arch_type
2141+# define machine_arch_type __machine_arch_type
2142+# else
2143+# define machine_arch_type MACH_TYPE_PNX5220
2144+# endif
2145+# define machine_is_pnx5220() (machine_arch_type == MACH_TYPE_PNX5220)
2146+#else
2147+# define machine_is_pnx5220() (0)
2148+#endif
2149+
2150+#ifdef CONFIG_MACH_BUTTE
2151+# ifdef machine_arch_type
2152+# undef machine_arch_type
2153+# define machine_arch_type __machine_arch_type
2154+# else
2155+# define machine_arch_type MACH_TYPE_BUTTE
2156+# endif
2157+# define machine_is_butte() (machine_arch_type == MACH_TYPE_BUTTE)
2158+#else
2159+# define machine_is_butte() (0)
2160+#endif
2161+
2162+#ifdef CONFIG_MACH_SRM2
2163+# ifdef machine_arch_type
2164+# undef machine_arch_type
2165+# define machine_arch_type __machine_arch_type
2166+# else
2167+# define machine_arch_type MACH_TYPE_SRM2
2168+# endif
2169+# define machine_is_srm2() (machine_arch_type == MACH_TYPE_SRM2)
2170+#else
2171+# define machine_is_srm2() (0)
2172+#endif
2173+
2174+#ifdef CONFIG_MACH_DSBR
2175+# ifdef machine_arch_type
2176+# undef machine_arch_type
2177+# define machine_arch_type __machine_arch_type
2178+# else
2179+# define machine_arch_type MACH_TYPE_DSBR
2180+# endif
2181+# define machine_is_dsbr() (machine_arch_type == MACH_TYPE_DSBR)
2182+#else
2183+# define machine_is_dsbr() (0)
2184+#endif
2185+
2186+#ifdef CONFIG_MACH_CRYSTALBALL
2187+# ifdef machine_arch_type
2188+# undef machine_arch_type
2189+# define machine_arch_type __machine_arch_type
2190+# else
2191+# define machine_arch_type MACH_TYPE_CRYSTALBALL
2192+# endif
2193+# define machine_is_crystalball() (machine_arch_type == MACH_TYPE_CRYSTALBALL)
2194+#else
2195+# define machine_is_crystalball() (0)
2196+#endif
2197+
2198+#ifdef CONFIG_MACH_TINYPXA27X
2199+# ifdef machine_arch_type
2200+# undef machine_arch_type
2201+# define machine_arch_type __machine_arch_type
2202+# else
2203+# define machine_arch_type MACH_TYPE_TINYPXA27X
2204+# endif
2205+# define machine_is_tinypxa27x() (machine_arch_type == MACH_TYPE_TINYPXA27X)
2206+#else
2207+# define machine_is_tinypxa27x() (0)
2208+#endif
2209+
2210+#ifdef CONFIG_MACH_HERBIE
2211+# ifdef machine_arch_type
2212+# undef machine_arch_type
2213+# define machine_arch_type __machine_arch_type
2214+# else
2215+# define machine_arch_type MACH_TYPE_HERBIE
2216+# endif
2217+# define machine_is_herbie() (machine_arch_type == MACH_TYPE_HERBIE)
2218+#else
2219+# define machine_is_herbie() (0)
2220+#endif
2221+
2222+#ifdef CONFIG_MACH_MAGICIAN
2223+# ifdef machine_arch_type
2224+# undef machine_arch_type
2225+# define machine_arch_type __machine_arch_type
2226+# else
2227+# define machine_arch_type MACH_TYPE_MAGICIAN
2228+# endif
2229+# define machine_is_magician() (machine_arch_type == MACH_TYPE_MAGICIAN)
2230+#else
2231+# define machine_is_magician() (0)
2232+#endif
2233+
2234+#ifdef CONFIG_MACH_CM4002
2235+# ifdef machine_arch_type
2236+# undef machine_arch_type
2237+# define machine_arch_type __machine_arch_type
2238+# else
2239+# define machine_arch_type MACH_TYPE_CM4002
2240+# endif
2241+# define machine_is_cm4002() (machine_arch_type == MACH_TYPE_CM4002)
2242+#else
2243+# define machine_is_cm4002() (0)
2244+#endif
2245+
2246+#ifdef CONFIG_MACH_B4
2247+# ifdef machine_arch_type
2248+# undef machine_arch_type
2249+# define machine_arch_type __machine_arch_type
2250+# else
2251+# define machine_arch_type MACH_TYPE_B4
2252+# endif
2253+# define machine_is_b4() (machine_arch_type == MACH_TYPE_B4)
2254+#else
2255+# define machine_is_b4() (0)
2256+#endif
2257+
2258+#ifdef CONFIG_MACH_MAUI
2259+# ifdef machine_arch_type
2260+# undef machine_arch_type
2261+# define machine_arch_type __machine_arch_type
2262+# else
2263+# define machine_arch_type MACH_TYPE_MAUI
2264+# endif
2265+# define machine_is_maui() (machine_arch_type == MACH_TYPE_MAUI)
2266+#else
2267+# define machine_is_maui() (0)
2268+#endif
2269+
2270+#ifdef CONFIG_MACH_CYBERTRACKER_G
2271+# ifdef machine_arch_type
2272+# undef machine_arch_type
2273+# define machine_arch_type __machine_arch_type
2274+# else
2275+# define machine_arch_type MACH_TYPE_CYBERTRACKER_G
2276+# endif
2277+# define machine_is_cybertracker_g() (machine_arch_type == MACH_TYPE_CYBERTRACKER_G)
2278+#else
2279+# define machine_is_cybertracker_g() (0)
2280+#endif
2281+
2282+#ifdef CONFIG_MACH_NXDKN
2283+# ifdef machine_arch_type
2284+# undef machine_arch_type
2285+# define machine_arch_type __machine_arch_type
2286+# else
2287+# define machine_arch_type MACH_TYPE_NXDKN
2288+# endif
2289+# define machine_is_nxdkn() (machine_arch_type == MACH_TYPE_NXDKN)
2290+#else
2291+# define machine_is_nxdkn() (0)
2292+#endif
2293+
2294+#ifdef CONFIG_MACH_MIO8390
2295+# ifdef machine_arch_type
2296+# undef machine_arch_type
2297+# define machine_arch_type __machine_arch_type
2298+# else
2299+# define machine_arch_type MACH_TYPE_MIO8390
2300+# endif
2301+# define machine_is_mio8390() (machine_arch_type == MACH_TYPE_MIO8390)
2302+#else
2303+# define machine_is_mio8390() (0)
2304+#endif
2305+
2306+#ifdef CONFIG_MACH_OMI_BOARD
2307+# ifdef machine_arch_type
2308+# undef machine_arch_type
2309+# define machine_arch_type __machine_arch_type
2310+# else
2311+# define machine_arch_type MACH_TYPE_OMI_BOARD
2312+# endif
2313+# define machine_is_omi_board() (machine_arch_type == MACH_TYPE_OMI_BOARD)
2314+#else
2315+# define machine_is_omi_board() (0)
2316+#endif
2317+
2318+#ifdef CONFIG_MACH_MX21CIV
2319+# ifdef machine_arch_type
2320+# undef machine_arch_type
2321+# define machine_arch_type __machine_arch_type
2322+# else
2323+# define machine_arch_type MACH_TYPE_MX21CIV
2324+# endif
2325+# define machine_is_mx21civ() (machine_arch_type == MACH_TYPE_MX21CIV)
2326+#else
2327+# define machine_is_mx21civ() (0)
2328+#endif
2329+
2330+#ifdef CONFIG_MACH_MAHI_CDAC
2331+# ifdef machine_arch_type
2332+# undef machine_arch_type
2333+# define machine_arch_type __machine_arch_type
2334+# else
2335+# define machine_arch_type MACH_TYPE_MAHI_CDAC
2336+# endif
2337+# define machine_is_mahi_cdac() (machine_arch_type == MACH_TYPE_MAHI_CDAC)
2338+#else
2339+# define machine_is_mahi_cdac() (0)
2340+#endif
2341+
2342+#ifdef CONFIG_MACH_XSCALE_PALMTX
2343+# ifdef machine_arch_type
2344+# undef machine_arch_type
2345+# define machine_arch_type __machine_arch_type
2346+# else
2347+# define machine_arch_type MACH_TYPE_XSCALE_PALMTX
2348+# endif
2349+# define machine_is_xscale_palmtx() (machine_arch_type == MACH_TYPE_XSCALE_PALMTX)
2350+#else
2351+# define machine_is_xscale_palmtx() (0)
2352+#endif
2353+
2354+#ifdef CONFIG_MACH_S3C2413
2355+# ifdef machine_arch_type
2356+# undef machine_arch_type
2357+# define machine_arch_type __machine_arch_type
2358+# else
2359+# define machine_arch_type MACH_TYPE_S3C2413
2360+# endif
2361+# define machine_is_s3c2413() (machine_arch_type == MACH_TYPE_S3C2413)
2362+#else
2363+# define machine_is_s3c2413() (0)
2364+#endif
2365+
2366+#ifdef CONFIG_MACH_SAMSYS_EP0
2367+# ifdef machine_arch_type
2368+# undef machine_arch_type
2369+# define machine_arch_type __machine_arch_type
2370+# else
2371+# define machine_arch_type MACH_TYPE_SAMSYS_EP0
2372+# endif
2373+# define machine_is_samsys_ep0() (machine_arch_type == MACH_TYPE_SAMSYS_EP0)
2374+#else
2375+# define machine_is_samsys_ep0() (0)
2376+#endif
2377+
2378+#ifdef CONFIG_MACH_WG302V1
2379+# ifdef machine_arch_type
2380+# undef machine_arch_type
2381+# define machine_arch_type __machine_arch_type
2382+# else
2383+# define machine_arch_type MACH_TYPE_WG302V1
2384+# endif
2385+# define machine_is_wg302v1() (machine_arch_type == MACH_TYPE_WG302V1)
2386+#else
2387+# define machine_is_wg302v1() (0)
2388+#endif
2389+
2390+#ifdef CONFIG_MACH_WG302V2
2391+# ifdef machine_arch_type
2392+# undef machine_arch_type
2393+# define machine_arch_type __machine_arch_type
2394+# else
2395+# define machine_arch_type MACH_TYPE_WG302V2
2396+# endif
2397+# define machine_is_wg302v2() (machine_arch_type == MACH_TYPE_WG302V2)
2398+#else
2399+# define machine_is_wg302v2() (0)
2400+#endif
2401+
2402+#ifdef CONFIG_MACH_EB42X
2403+# ifdef machine_arch_type
2404+# undef machine_arch_type
2405+# define machine_arch_type __machine_arch_type
2406+# else
2407+# define machine_arch_type MACH_TYPE_EB42X
2408+# endif
2409+# define machine_is_eb42x() (machine_arch_type == MACH_TYPE_EB42X)
2410+#else
2411+# define machine_is_eb42x() (0)
2412+#endif
2413+
2414+#ifdef CONFIG_MACH_IQ331ES
2415+# ifdef machine_arch_type
2416+# undef machine_arch_type
2417+# define machine_arch_type __machine_arch_type
2418+# else
2419+# define machine_arch_type MACH_TYPE_IQ331ES
2420+# endif
2421+# define machine_is_iq331es() (machine_arch_type == MACH_TYPE_IQ331ES)
2422+#else
2423+# define machine_is_iq331es() (0)
2424+#endif
2425+
2426+#ifdef CONFIG_MACH_COSYDSP
2427+# ifdef machine_arch_type
2428+# undef machine_arch_type
2429+# define machine_arch_type __machine_arch_type
2430+# else
2431+# define machine_arch_type MACH_TYPE_COSYDSP
2432+# endif
2433+# define machine_is_cosydsp() (machine_arch_type == MACH_TYPE_COSYDSP)
2434+#else
2435+# define machine_is_cosydsp() (0)
2436+#endif
2437+
2438+#ifdef CONFIG_MACH_UPLAT7D
2439+# ifdef machine_arch_type
2440+# undef machine_arch_type
2441+# define machine_arch_type __machine_arch_type
2442+# else
2443+# define machine_arch_type MACH_TYPE_UPLAT7D
2444+# endif
2445+# define machine_is_uplat7d_proto() (machine_arch_type == MACH_TYPE_UPLAT7D)
2446+#else
2447+# define machine_is_uplat7d_proto() (0)
2448+#endif
2449+
2450+#ifdef CONFIG_MACH_PTDAVINCI
2451+# ifdef machine_arch_type
2452+# undef machine_arch_type
2453+# define machine_arch_type __machine_arch_type
2454+# else
2455+# define machine_arch_type MACH_TYPE_PTDAVINCI
2456+# endif
2457+# define machine_is_ptdavinci() (machine_arch_type == MACH_TYPE_PTDAVINCI)
2458+#else
2459+# define machine_is_ptdavinci() (0)
2460+#endif
2461+
2462+#ifdef CONFIG_MACH_MBUS
2463+# ifdef machine_arch_type
2464+# undef machine_arch_type
2465+# define machine_arch_type __machine_arch_type
2466+# else
2467+# define machine_arch_type MACH_TYPE_MBUS
2468+# endif
2469+# define machine_is_mbus() (machine_arch_type == MACH_TYPE_MBUS)
2470+#else
2471+# define machine_is_mbus() (0)
2472+#endif
2473+
2474+#ifdef CONFIG_MACH_NADIA2VB
2475+# ifdef machine_arch_type
2476+# undef machine_arch_type
2477+# define machine_arch_type __machine_arch_type
2478+# else
2479+# define machine_arch_type MACH_TYPE_NADIA2VB
2480+# endif
2481+# define machine_is_nadia2vb() (machine_arch_type == MACH_TYPE_NADIA2VB)
2482+#else
2483+# define machine_is_nadia2vb() (0)
2484+#endif
2485+
2486+#ifdef CONFIG_MACH_R1000
2487+# ifdef machine_arch_type
2488+# undef machine_arch_type
2489+# define machine_arch_type __machine_arch_type
2490+# else
2491+# define machine_arch_type MACH_TYPE_R1000
2492+# endif
2493+# define machine_is_r1000() (machine_arch_type == MACH_TYPE_R1000)
2494+#else
2495+# define machine_is_r1000() (0)
2496+#endif
2497+
2498+#ifdef CONFIG_MACH_HW90250
2499+# ifdef machine_arch_type
2500+# undef machine_arch_type
2501+# define machine_arch_type __machine_arch_type
2502+# else
2503+# define machine_arch_type MACH_TYPE_HW90250
2504+# endif
2505+# define machine_is_hw90250() (machine_arch_type == MACH_TYPE_HW90250)
2506+#else
2507+# define machine_is_hw90250() (0)
2508+#endif
2509+
2510+#ifdef CONFIG_MACH_OMAP_2430SDP
2511+# ifdef machine_arch_type
2512+# undef machine_arch_type
2513+# define machine_arch_type __machine_arch_type
2514+# else
2515+# define machine_arch_type MACH_TYPE_OMAP_2430SDP
2516+# endif
2517+# define machine_is_omap_2430sdp() (machine_arch_type == MACH_TYPE_OMAP_2430SDP)
2518+#else
2519+# define machine_is_omap_2430sdp() (0)
2520+#endif
2521+
2522+#ifdef CONFIG_MACH_DAVINCI_EVM
2523+# ifdef machine_arch_type
2524+# undef machine_arch_type
2525+# define machine_arch_type __machine_arch_type
2526+# else
2527+# define machine_arch_type MACH_TYPE_DAVINCI_EVM
2528+# endif
2529+# define machine_is_davinci_evm() (machine_arch_type == MACH_TYPE_DAVINCI_EVM)
2530+#else
2531+# define machine_is_davinci_evm() (0)
2532+#endif
2533+
2534+#ifdef CONFIG_MACH_OMAP_TORNADO
2535+# ifdef machine_arch_type
2536+# undef machine_arch_type
2537+# define machine_arch_type __machine_arch_type
2538+# else
2539+# define machine_arch_type MACH_TYPE_OMAP_TORNADO
2540+# endif
2541+# define machine_is_omap_tornado() (machine_arch_type == MACH_TYPE_OMAP_TORNADO)
2542+#else
2543+# define machine_is_omap_tornado() (0)
2544+#endif
2545+
2546+#ifdef CONFIG_MACH_OLOCREEK
2547+# ifdef machine_arch_type
2548+# undef machine_arch_type
2549+# define machine_arch_type __machine_arch_type
2550+# else
2551+# define machine_arch_type MACH_TYPE_OLOCREEK
2552+# endif
2553+# define machine_is_olocreek() (machine_arch_type == MACH_TYPE_OLOCREEK)
2554+#else
2555+# define machine_is_olocreek() (0)
2556+#endif
2557+
2558+#ifdef CONFIG_MACH_PALMZ72
2559+# ifdef machine_arch_type
2560+# undef machine_arch_type
2561+# define machine_arch_type __machine_arch_type
2562+# else
2563+# define machine_arch_type MACH_TYPE_PALMZ72
2564+# endif
2565+# define machine_is_palmz72() (machine_arch_type == MACH_TYPE_PALMZ72)
2566+#else
2567+# define machine_is_palmz72() (0)
2568+#endif
2569+
2570+#ifdef CONFIG_MACH_NXDB500
2571+# ifdef machine_arch_type
2572+# undef machine_arch_type
2573+# define machine_arch_type __machine_arch_type
2574+# else
2575+# define machine_arch_type MACH_TYPE_NXDB500
2576+# endif
2577+# define machine_is_nxdb500() (machine_arch_type == MACH_TYPE_NXDB500)
2578+#else
2579+# define machine_is_nxdb500() (0)
2580+#endif
2581+
2582+#ifdef CONFIG_MACH_APF9328
2583+# ifdef machine_arch_type
2584+# undef machine_arch_type
2585+# define machine_arch_type __machine_arch_type
2586+# else
2587+# define machine_arch_type MACH_TYPE_APF9328
2588+# endif
2589+# define machine_is_apf9328() (machine_arch_type == MACH_TYPE_APF9328)
2590+#else
2591+# define machine_is_apf9328() (0)
2592+#endif
2593+
2594+#ifdef CONFIG_MACH_OMAP_WIPOQ
2595+# ifdef machine_arch_type
2596+# undef machine_arch_type
2597+# define machine_arch_type __machine_arch_type
2598+# else
2599+# define machine_arch_type MACH_TYPE_OMAP_WIPOQ
2600+# endif
2601+# define machine_is_omap_wipoq() (machine_arch_type == MACH_TYPE_OMAP_WIPOQ)
2602+#else
2603+# define machine_is_omap_wipoq() (0)
2604+#endif
2605+
2606+#ifdef CONFIG_MACH_OMAP_TWIP
2607+# ifdef machine_arch_type
2608+# undef machine_arch_type
2609+# define machine_arch_type __machine_arch_type
2610+# else
2611+# define machine_arch_type MACH_TYPE_OMAP_TWIP
2612+# endif
2613+# define machine_is_omap_twip() (machine_arch_type == MACH_TYPE_OMAP_TWIP)
2614+#else
2615+# define machine_is_omap_twip() (0)
2616+#endif
2617+
2618+#ifdef CONFIG_MACH_XSCALE_PALMTREO650
2619+# ifdef machine_arch_type
2620+# undef machine_arch_type
2621+# define machine_arch_type __machine_arch_type
2622+# else
2623+# define machine_arch_type MACH_TYPE_XSCALE_PALMTREO650
2624+# endif
2625+# define machine_is_xscale_treo650() (machine_arch_type == MACH_TYPE_XSCALE_PALMTREO650)
2626+#else
2627+# define machine_is_xscale_treo650() (0)
2628+#endif
2629+
2630+#ifdef CONFIG_MACH_ACUMEN
2631+# ifdef machine_arch_type
2632+# undef machine_arch_type
2633+# define machine_arch_type __machine_arch_type
2634+# else
2635+# define machine_arch_type MACH_TYPE_ACUMEN
2636+# endif
2637+# define machine_is_acumen() (machine_arch_type == MACH_TYPE_ACUMEN)
2638+#else
2639+# define machine_is_acumen() (0)
2640+#endif
2641+
2642+#ifdef CONFIG_MACH_XP100
2643+# ifdef machine_arch_type
2644+# undef machine_arch_type
2645+# define machine_arch_type __machine_arch_type
2646+# else
2647+# define machine_arch_type MACH_TYPE_XP100
2648+# endif
2649+# define machine_is_xp100() (machine_arch_type == MACH_TYPE_XP100)
2650+#else
2651+# define machine_is_xp100() (0)
2652+#endif
2653+
2654+#ifdef CONFIG_MACH_FS2410
2655+# ifdef machine_arch_type
2656+# undef machine_arch_type
2657+# define machine_arch_type __machine_arch_type
2658+# else
2659+# define machine_arch_type MACH_TYPE_FS2410
2660+# endif
2661+# define machine_is_fs2410() (machine_arch_type == MACH_TYPE_FS2410)
2662+#else
2663+# define machine_is_fs2410() (0)
2664+#endif
2665+
2666+#ifdef CONFIG_MACH_PXA270_CERF
2667+# ifdef machine_arch_type
2668+# undef machine_arch_type
2669+# define machine_arch_type __machine_arch_type
2670+# else
2671+# define machine_arch_type MACH_TYPE_PXA270_CERF
2672+# endif
2673+# define machine_is_pxa270_cerf() (machine_arch_type == MACH_TYPE_PXA270_CERF)
2674+#else
2675+# define machine_is_pxa270_cerf() (0)
2676+#endif
2677+
2678+#ifdef CONFIG_MACH_SQ2FTLPALM
2679+# ifdef machine_arch_type
2680+# undef machine_arch_type
2681+# define machine_arch_type __machine_arch_type
2682+# else
2683+# define machine_arch_type MACH_TYPE_SQ2FTLPALM
2684+# endif
2685+# define machine_is_sq2ftlpalm() (machine_arch_type == MACH_TYPE_SQ2FTLPALM)
2686+#else
2687+# define machine_is_sq2ftlpalm() (0)
2688+#endif
2689+
2690+#ifdef CONFIG_MACH_BSEMSERVER
2691+# ifdef machine_arch_type
2692+# undef machine_arch_type
2693+# define machine_arch_type __machine_arch_type
2694+# else
2695+# define machine_arch_type MACH_TYPE_BSEMSERVER
2696+# endif
2697+# define machine_is_bsemserver() (machine_arch_type == MACH_TYPE_BSEMSERVER)
2698+#else
2699+# define machine_is_bsemserver() (0)
2700+#endif
2701+
2702+#ifdef CONFIG_MACH_NETCLIENT
2703+# ifdef machine_arch_type
2704+# undef machine_arch_type
2705+# define machine_arch_type __machine_arch_type
2706+# else
2707+# define machine_arch_type MACH_TYPE_NETCLIENT
2708+# endif
2709+# define machine_is_netclient() (machine_arch_type == MACH_TYPE_NETCLIENT)
2710+#else
2711+# define machine_is_netclient() (0)
2712+#endif
2713+
2714+#ifdef CONFIG_MACH_XSCALE_PALMTT5
2715+# ifdef machine_arch_type
2716+# undef machine_arch_type
2717+# define machine_arch_type __machine_arch_type
2718+# else
2719+# define machine_arch_type MACH_TYPE_XSCALE_PALMTT5
2720+# endif
2721+# define machine_is_xscale_palmtt5() (machine_arch_type == MACH_TYPE_XSCALE_PALMTT5)
2722+#else
2723+# define machine_is_xscale_palmtt5() (0)
2724+#endif
2725+
2726+#ifdef CONFIG_MACH_OMAP_PALMTC
2727+# ifdef machine_arch_type
2728+# undef machine_arch_type
2729+# define machine_arch_type __machine_arch_type
2730+# else
2731+# define machine_arch_type MACH_TYPE_OMAP_PALMTC
2732+# endif
2733+# define machine_is_xscale_palmtc() (machine_arch_type == MACH_TYPE_OMAP_PALMTC)
2734+#else
2735+# define machine_is_xscale_palmtc() (0)
2736+#endif
2737+
2738+#ifdef CONFIG_MACH_OMAP_APOLLON
2739+# ifdef machine_arch_type
2740+# undef machine_arch_type
2741+# define machine_arch_type __machine_arch_type
2742+# else
2743+# define machine_arch_type MACH_TYPE_OMAP_APOLLON
2744+# endif
2745+# define machine_is_omap_apollon() (machine_arch_type == MACH_TYPE_OMAP_APOLLON)
2746+#else
2747+# define machine_is_omap_apollon() (0)
2748+#endif
2749+
2750+#ifdef CONFIG_MACH_ARGONLVEVB
2751+# ifdef machine_arch_type
2752+# undef machine_arch_type
2753+# define machine_arch_type __machine_arch_type
2754+# else
2755+# define machine_arch_type MACH_TYPE_ARGONLVEVB
2756+# endif
2757+# define machine_is_mxc30030evb() (machine_arch_type == MACH_TYPE_ARGONLVEVB)
2758+#else
2759+# define machine_is_mxc30030evb() (0)
2760+#endif
2761+
2762+#ifdef CONFIG_MACH_REA_2D
2763+# ifdef machine_arch_type
2764+# undef machine_arch_type
2765+# define machine_arch_type __machine_arch_type
2766+# else
2767+# define machine_arch_type MACH_TYPE_REA_2D
2768+# endif
2769+# define machine_is_rea_2d() (machine_arch_type == MACH_TYPE_REA_2D)
2770+#else
2771+# define machine_is_rea_2d() (0)
2772+#endif
2773+
2774+#ifdef CONFIG_MACH_TI3E524
2775+# ifdef machine_arch_type
2776+# undef machine_arch_type
2777+# define machine_arch_type __machine_arch_type
2778+# else
2779+# define machine_arch_type MACH_TYPE_TI3E524
2780+# endif
2781+# define machine_is_eti3e524() (machine_arch_type == MACH_TYPE_TI3E524)
2782+#else
2783+# define machine_is_eti3e524() (0)
2784+#endif
2785+
2786+#ifdef CONFIG_MACH_ATEB9200
2787+# ifdef machine_arch_type
2788+# undef machine_arch_type
2789+# define machine_arch_type __machine_arch_type
2790+# else
2791+# define machine_arch_type MACH_TYPE_ATEB9200
2792+# endif
2793+# define machine_is_ateb9200() (machine_arch_type == MACH_TYPE_ATEB9200)
2794+#else
2795+# define machine_is_ateb9200() (0)
2796+#endif
2797+
2798+#ifdef CONFIG_MACH_AUCKLAND
2799+# ifdef machine_arch_type
2800+# undef machine_arch_type
2801+# define machine_arch_type __machine_arch_type
2802+# else
2803+# define machine_arch_type MACH_TYPE_AUCKLAND
2804+# endif
2805+# define machine_is_auckland() (machine_arch_type == MACH_TYPE_AUCKLAND)
2806+#else
2807+# define machine_is_auckland() (0)
2808+#endif
2809+
2810+#ifdef CONFIG_MACH_AK3320M
2811+# ifdef machine_arch_type
2812+# undef machine_arch_type
2813+# define machine_arch_type __machine_arch_type
2814+# else
2815+# define machine_arch_type MACH_TYPE_AK3320M
2816+# endif
2817+# define machine_is_ak3220m() (machine_arch_type == MACH_TYPE_AK3320M)
2818+#else
2819+# define machine_is_ak3220m() (0)
2820+#endif
2821+
2822+#ifdef CONFIG_MACH_DURAMAX
2823+# ifdef machine_arch_type
2824+# undef machine_arch_type
2825+# define machine_arch_type __machine_arch_type
2826+# else
2827+# define machine_arch_type MACH_TYPE_DURAMAX
2828+# endif
2829+# define machine_is_duramax() (machine_arch_type == MACH_TYPE_DURAMAX)
2830+#else
2831+# define machine_is_duramax() (0)
2832+#endif
2833+
2834+#ifdef CONFIG_MACH_N35
2835+# ifdef machine_arch_type
2836+# undef machine_arch_type
2837+# define machine_arch_type __machine_arch_type
2838+# else
2839+# define machine_arch_type MACH_TYPE_N35
2840+# endif
2841+# define machine_is_n35() (machine_arch_type == MACH_TYPE_N35)
2842+#else
2843+# define machine_is_n35() (0)
2844+#endif
2845+
2846+#ifdef CONFIG_MACH_PRONGHORN
2847+# ifdef machine_arch_type
2848+# undef machine_arch_type
2849+# define machine_arch_type __machine_arch_type
2850+# else
2851+# define machine_arch_type MACH_TYPE_PRONGHORN
2852+# endif
2853+# define machine_is_pronghorn() (machine_arch_type == MACH_TYPE_PRONGHORN)
2854+#else
2855+# define machine_is_pronghorn() (0)
2856+#endif
2857+
2858+#ifdef CONFIG_MACH_FUNDY
2859+# ifdef machine_arch_type
2860+# undef machine_arch_type
2861+# define machine_arch_type __machine_arch_type
2862+# else
2863+# define machine_arch_type MACH_TYPE_FUNDY
2864+# endif
2865+# define machine_is_fundy() (machine_arch_type == MACH_TYPE_FUNDY)
2866+#else
2867+# define machine_is_fundy() (0)
2868+#endif
2869+
2870+#ifdef CONFIG_MACH_LOGICPD_PXA270
2871+# ifdef machine_arch_type
2872+# undef machine_arch_type
2873+# define machine_arch_type __machine_arch_type
2874+# else
2875+# define machine_arch_type MACH_TYPE_LOGICPD_PXA270
2876+# endif
2877+# define machine_is_logicpd_pxa270() (machine_arch_type == MACH_TYPE_LOGICPD_PXA270)
2878+#else
2879+# define machine_is_logicpd_pxa270() (0)
2880+#endif
2881+
2882+#ifdef CONFIG_MACH_CPU777
2883+# ifdef machine_arch_type
2884+# undef machine_arch_type
2885+# define machine_arch_type __machine_arch_type
2886+# else
2887+# define machine_arch_type MACH_TYPE_CPU777
2888+# endif
2889+# define machine_is_cpu777() (machine_arch_type == MACH_TYPE_CPU777)
2890+#else
2891+# define machine_is_cpu777() (0)
2892+#endif
2893+
2894+#ifdef CONFIG_MACH_SIMICON9201
2895+# ifdef machine_arch_type
2896+# undef machine_arch_type
2897+# define machine_arch_type __machine_arch_type
2898+# else
2899+# define machine_arch_type MACH_TYPE_SIMICON9201
2900+# endif
2901+# define machine_is_simicon9201() (machine_arch_type == MACH_TYPE_SIMICON9201)
2902+#else
2903+# define machine_is_simicon9201() (0)
2904+#endif
2905+
2906+#ifdef CONFIG_MACH_LEAP2_HPM
2907+# ifdef machine_arch_type
2908+# undef machine_arch_type
2909+# define machine_arch_type __machine_arch_type
2910+# else
2911+# define machine_arch_type MACH_TYPE_LEAP2_HPM
2912+# endif
2913+# define machine_is_leap2_hpm() (machine_arch_type == MACH_TYPE_LEAP2_HPM)
2914+#else
2915+# define machine_is_leap2_hpm() (0)
2916+#endif
2917+
2918+#ifdef CONFIG_MACH_CM922TXA10
2919+# ifdef machine_arch_type
2920+# undef machine_arch_type
2921+# define machine_arch_type __machine_arch_type
2922+# else
2923+# define machine_arch_type MACH_TYPE_CM922TXA10
2924+# endif
2925+# define machine_is_cm922txa10() (machine_arch_type == MACH_TYPE_CM922TXA10)
2926+#else
2927+# define machine_is_cm922txa10() (0)
2928+#endif
2929+
2930+#ifdef CONFIG_MACH_PXA
2931+# ifdef machine_arch_type
2932+# undef machine_arch_type
2933+# define machine_arch_type __machine_arch_type
2934+# else
2935+# define machine_arch_type MACH_TYPE_PXA
2936+# endif
2937+# define machine_is_sandgate() (machine_arch_type == MACH_TYPE_PXA)
2938+#else
2939+# define machine_is_sandgate() (0)
2940+#endif
2941+
2942+#ifdef CONFIG_MACH_SANDGATE2
2943+# ifdef machine_arch_type
2944+# undef machine_arch_type
2945+# define machine_arch_type __machine_arch_type
2946+# else
2947+# define machine_arch_type MACH_TYPE_SANDGATE2
2948+# endif
2949+# define machine_is_sandgate2() (machine_arch_type == MACH_TYPE_SANDGATE2)
2950+#else
2951+# define machine_is_sandgate2() (0)
2952+#endif
2953+
2954+#ifdef CONFIG_MACH_SANDGATE2G
2955+# ifdef machine_arch_type
2956+# undef machine_arch_type
2957+# define machine_arch_type __machine_arch_type
2958+# else
2959+# define machine_arch_type MACH_TYPE_SANDGATE2G
2960+# endif
2961+# define machine_is_sandgate2g() (machine_arch_type == MACH_TYPE_SANDGATE2G)
2962+#else
2963+# define machine_is_sandgate2g() (0)
2964+#endif
2965+
2966+#ifdef CONFIG_MACH_SANDGATE2P
2967+# ifdef machine_arch_type
2968+# undef machine_arch_type
2969+# define machine_arch_type __machine_arch_type
2970+# else
2971+# define machine_arch_type MACH_TYPE_SANDGATE2P
2972+# endif
2973+# define machine_is_sandgate2p() (machine_arch_type == MACH_TYPE_SANDGATE2P)
2974+#else
2975+# define machine_is_sandgate2p() (0)
2976+#endif
2977+
2978+#ifdef CONFIG_MACH_FRED_JACK
2979+# ifdef machine_arch_type
2980+# undef machine_arch_type
2981+# define machine_arch_type __machine_arch_type
2982+# else
2983+# define machine_arch_type MACH_TYPE_FRED_JACK
2984+# endif
2985+# define machine_is_fred_jack() (machine_arch_type == MACH_TYPE_FRED_JACK)
2986+#else
2987+# define machine_is_fred_jack() (0)
2988+#endif
2989+
2990+#ifdef CONFIG_MACH_TTG_COLOR1
2991+# ifdef machine_arch_type
2992+# undef machine_arch_type
2993+# define machine_arch_type __machine_arch_type
2994+# else
2995+# define machine_arch_type MACH_TYPE_TTG_COLOR1
2996+# endif
2997+# define machine_is_ttg_color1() (machine_arch_type == MACH_TYPE_TTG_COLOR1)
2998+#else
2999+# define machine_is_ttg_color1() (0)
3000+#endif
3001+
3002+#ifdef CONFIG_MACH_NXEB500HMI
3003+# ifdef machine_arch_type
3004+# undef machine_arch_type
3005+# define machine_arch_type __machine_arch_type
3006+# else
3007+# define machine_arch_type MACH_TYPE_NXEB500HMI
3008+# endif
3009+# define machine_is_nxeb500hmi() (machine_arch_type == MACH_TYPE_NXEB500HMI)
3010+#else
3011+# define machine_is_nxeb500hmi() (0)
3012+#endif
3013+
3014+#ifdef CONFIG_MACH_NETDCU8
3015+# ifdef machine_arch_type
3016+# undef machine_arch_type
3017+# define machine_arch_type __machine_arch_type
3018+# else
3019+# define machine_arch_type MACH_TYPE_NETDCU8
3020+# endif
3021+# define machine_is_netdcu8() (machine_arch_type == MACH_TYPE_NETDCU8)
3022+#else
3023+# define machine_is_netdcu8() (0)
3024+#endif
3025+
3026+#ifdef CONFIG_MACH_ML675050_CPU_BOA
3027+# ifdef machine_arch_type
3028+# undef machine_arch_type
3029+# define machine_arch_type __machine_arch_type
3030+# else
3031+# define machine_arch_type MACH_TYPE_ML675050_CPU_BOA
3032+# endif
3033+# define machine_is_ml675050_cpu_boa() (machine_arch_type == MACH_TYPE_ML675050_CPU_BOA)
3034+#else
3035+# define machine_is_ml675050_cpu_boa() (0)
3036+#endif
3037+
3038+#ifdef CONFIG_MACH_NG_FVX538
3039+# ifdef machine_arch_type
3040+# undef machine_arch_type
3041+# define machine_arch_type __machine_arch_type
3042+# else
3043+# define machine_arch_type MACH_TYPE_NG_FVX538
3044+# endif
3045+# define machine_is_ng_fvx538() (machine_arch_type == MACH_TYPE_NG_FVX538)
3046+#else
3047+# define machine_is_ng_fvx538() (0)
3048+#endif
3049+
3050+#ifdef CONFIG_MACH_NG_FVS338
3051+# ifdef machine_arch_type
3052+# undef machine_arch_type
3053+# define machine_arch_type __machine_arch_type
3054+# else
3055+# define machine_arch_type MACH_TYPE_NG_FVS338
3056+# endif
3057+# define machine_is_ng_fvs338() (machine_arch_type == MACH_TYPE_NG_FVS338)
3058+#else
3059+# define machine_is_ng_fvs338() (0)
3060+#endif
3061+
3062+#ifdef CONFIG_MACH_PNX4103
3063+# ifdef machine_arch_type
3064+# undef machine_arch_type
3065+# define machine_arch_type __machine_arch_type
3066+# else
3067+# define machine_arch_type MACH_TYPE_PNX4103
3068+# endif
3069+# define machine_is_pnx4103() (machine_arch_type == MACH_TYPE_PNX4103)
3070+#else
3071+# define machine_is_pnx4103() (0)
3072+#endif
3073+
3074+#ifdef CONFIG_MACH_HESDB
3075+# ifdef machine_arch_type
3076+# undef machine_arch_type
3077+# define machine_arch_type __machine_arch_type
3078+# else
3079+# define machine_arch_type MACH_TYPE_HESDB
3080+# endif
3081+# define machine_is_hesdb() (machine_arch_type == MACH_TYPE_HESDB)
3082+#else
3083+# define machine_is_hesdb() (0)
3084+#endif
3085+
3086+#ifdef CONFIG_MACH_XSILO
3087+# ifdef machine_arch_type
3088+# undef machine_arch_type
3089+# define machine_arch_type __machine_arch_type
3090+# else
3091+# define machine_arch_type MACH_TYPE_XSILO
3092+# endif
3093+# define machine_is_xsilo() (machine_arch_type == MACH_TYPE_XSILO)
3094+#else
3095+# define machine_is_xsilo() (0)
3096+#endif
3097+
3098+#ifdef CONFIG_MACH_ESPRESSO
3099+# ifdef machine_arch_type
3100+# undef machine_arch_type
3101+# define machine_arch_type __machine_arch_type
3102+# else
3103+# define machine_arch_type MACH_TYPE_ESPRESSO
3104+# endif
3105+# define machine_is_espresso() (machine_arch_type == MACH_TYPE_ESPRESSO)
3106+#else
3107+# define machine_is_espresso() (0)
3108+#endif
3109+
3110+#ifdef CONFIG_MACH_EMLC
3111+# ifdef machine_arch_type
3112+# undef machine_arch_type
3113+# define machine_arch_type __machine_arch_type
3114+# else
3115+# define machine_arch_type MACH_TYPE_EMLC
3116+# endif
3117+# define machine_is_emlc() (machine_arch_type == MACH_TYPE_EMLC)
3118+#else
3119+# define machine_is_emlc() (0)
3120+#endif
3121+
3122+#ifdef CONFIG_MACH_SISTERON
3123+# ifdef machine_arch_type
3124+# undef machine_arch_type
3125+# define machine_arch_type __machine_arch_type
3126+# else
3127+# define machine_arch_type MACH_TYPE_SISTERON
3128+# endif
3129+# define machine_is_sisteron() (machine_arch_type == MACH_TYPE_SISTERON)
3130+#else
3131+# define machine_is_sisteron() (0)
3132+#endif
3133+
3134+#ifdef CONFIG_MACH_RX1950
3135+# ifdef machine_arch_type
3136+# undef machine_arch_type
3137+# define machine_arch_type __machine_arch_type
3138+# else
3139+# define machine_arch_type MACH_TYPE_RX1950
3140+# endif
3141+# define machine_is_rx1950() (machine_arch_type == MACH_TYPE_RX1950)
3142+#else
3143+# define machine_is_rx1950() (0)
3144+#endif
3145+
3146+#ifdef CONFIG_MACH_TSC_VENUS
3147+# ifdef machine_arch_type
3148+# undef machine_arch_type
3149+# define machine_arch_type __machine_arch_type
3150+# else
3151+# define machine_arch_type MACH_TYPE_TSC_VENUS
3152+# endif
3153+# define machine_is_tsc_venus() (machine_arch_type == MACH_TYPE_TSC_VENUS)
3154+#else
3155+# define machine_is_tsc_venus() (0)
3156+#endif
3157+
3158+#ifdef CONFIG_MACH_DS101J
3159+# ifdef machine_arch_type
3160+# undef machine_arch_type
3161+# define machine_arch_type __machine_arch_type
3162+# else
3163+# define machine_arch_type MACH_TYPE_DS101J
3164+# endif
3165+# define machine_is_ds101j() (machine_arch_type == MACH_TYPE_DS101J)
3166+#else
3167+# define machine_is_ds101j() (0)
3168+#endif
3169+
3170+#ifdef CONFIG_MACH_MXC30030ADS
3171+# ifdef machine_arch_type
3172+# undef machine_arch_type
3173+# define machine_arch_type __machine_arch_type
3174+# else
3175+# define machine_arch_type MACH_TYPE_MXC30030ADS
3176+# endif
3177+# define machine_is_mxc30030ads() (machine_arch_type == MACH_TYPE_MXC30030ADS)
3178+#else
3179+# define machine_is_mxc30030ads() (0)
3180+#endif
3181+
3182+#ifdef CONFIG_MACH_FUJITSU_WIMAXSOC
3183+# ifdef machine_arch_type
3184+# undef machine_arch_type
3185+# define machine_arch_type __machine_arch_type
3186+# else
3187+# define machine_arch_type MACH_TYPE_FUJITSU_WIMAXSOC
3188+# endif
3189+# define machine_is_fujitsu_wimaxsoc() (machine_arch_type == MACH_TYPE_FUJITSU_WIMAXSOC)
3190+#else
3191+# define machine_is_fujitsu_wimaxsoc() (0)
3192+#endif
3193+
3194+#ifdef CONFIG_MACH_DUALPCMODEM
3195+# ifdef machine_arch_type
3196+# undef machine_arch_type
3197+# define machine_arch_type __machine_arch_type
3198+# else
3199+# define machine_arch_type MACH_TYPE_DUALPCMODEM
3200+# endif
3201+# define machine_is_dualpcmodem() (machine_arch_type == MACH_TYPE_DUALPCMODEM)
3202+#else
3203+# define machine_is_dualpcmodem() (0)
3204+#endif
3205+
3206+#ifdef CONFIG_MACH_GESBC9312
3207+# ifdef machine_arch_type
3208+# undef machine_arch_type
3209+# define machine_arch_type __machine_arch_type
3210+# else
3211+# define machine_arch_type MACH_TYPE_GESBC9312
3212+# endif
3213+# define machine_is_gesbc9312() (machine_arch_type == MACH_TYPE_GESBC9312)
3214+#else
3215+# define machine_is_gesbc9312() (0)
3216+#endif
3217+
3218+#ifdef CONFIG_MACH_HTCAPACHE
3219+# ifdef machine_arch_type
3220+# undef machine_arch_type
3221+# define machine_arch_type __machine_arch_type
3222+# else
3223+# define machine_arch_type MACH_TYPE_HTCAPACHE
3224+# endif
3225+# define machine_is_htcapache() (machine_arch_type == MACH_TYPE_HTCAPACHE)
3226+#else
3227+# define machine_is_htcapache() (0)
3228+#endif
3229+
3230+#ifdef CONFIG_MACH_IXDP435
3231+# ifdef machine_arch_type
3232+# undef machine_arch_type
3233+# define machine_arch_type __machine_arch_type
3234+# else
3235+# define machine_arch_type MACH_TYPE_IXDP435
3236+# endif
3237+# define machine_is_ixdp435() (machine_arch_type == MACH_TYPE_IXDP435)
3238+#else
3239+# define machine_is_ixdp435() (0)
3240+#endif
3241+
3242+#ifdef CONFIG_MACH_CATPROVT100
3243+# ifdef machine_arch_type
3244+# undef machine_arch_type
3245+# define machine_arch_type __machine_arch_type
3246+# else
3247+# define machine_arch_type MACH_TYPE_CATPROVT100
3248+# endif
3249+# define machine_is_catprovt100() (machine_arch_type == MACH_TYPE_CATPROVT100)
3250+#else
3251+# define machine_is_catprovt100() (0)
3252+#endif
3253+
3254+#ifdef CONFIG_MACH_PICOTUX1XX
3255+# ifdef machine_arch_type
3256+# undef machine_arch_type
3257+# define machine_arch_type __machine_arch_type
3258+# else
3259+# define machine_arch_type MACH_TYPE_PICOTUX1XX
3260+# endif
3261+# define machine_is_picotux1xx() (machine_arch_type == MACH_TYPE_PICOTUX1XX)
3262+#else
3263+# define machine_is_picotux1xx() (0)
3264+#endif
3265+
3266+#ifdef CONFIG_MACH_PICOTUX2XX
3267+# ifdef machine_arch_type
3268+# undef machine_arch_type
3269+# define machine_arch_type __machine_arch_type
3270+# else
3271+# define machine_arch_type MACH_TYPE_PICOTUX2XX
3272+# endif
3273+# define machine_is_picotux2xx() (machine_arch_type == MACH_TYPE_PICOTUX2XX)
3274+#else
3275+# define machine_is_picotux2xx() (0)
3276+#endif
3277+
3278+#ifdef CONFIG_MACH_DSMG600
3279+# ifdef machine_arch_type
3280+# undef machine_arch_type
3281+# define machine_arch_type __machine_arch_type
3282+# else
3283+# define machine_arch_type MACH_TYPE_DSMG600
3284+# endif
3285+# define machine_is_dsmg600() (machine_arch_type == MACH_TYPE_DSMG600)
3286+#else
3287+# define machine_is_dsmg600() (0)
3288+#endif
3289+
3290+#ifdef CONFIG_MACH_EMPC2
3291+# ifdef machine_arch_type
3292+# undef machine_arch_type
3293+# define machine_arch_type __machine_arch_type
3294+# else
3295+# define machine_arch_type MACH_TYPE_EMPC2
3296+# endif
3297+# define machine_is_empc2() (machine_arch_type == MACH_TYPE_EMPC2)
3298+#else
3299+# define machine_is_empc2() (0)
3300+#endif
3301+
3302+#ifdef CONFIG_MACH_VENTURA
3303+# ifdef machine_arch_type
3304+# undef machine_arch_type
3305+# define machine_arch_type __machine_arch_type
3306+# else
3307+# define machine_arch_type MACH_TYPE_VENTURA
3308+# endif
3309+# define machine_is_ventura() (machine_arch_type == MACH_TYPE_VENTURA)
3310+#else
3311+# define machine_is_ventura() (0)
3312+#endif
3313+
3314+#ifdef CONFIG_MACH_PHIDGET_SBC
3315+# ifdef machine_arch_type
3316+# undef machine_arch_type
3317+# define machine_arch_type __machine_arch_type
3318+# else
3319+# define machine_arch_type MACH_TYPE_PHIDGET_SBC
3320+# endif
3321+# define machine_is_phidget_sbc() (machine_arch_type == MACH_TYPE_PHIDGET_SBC)
3322+#else
3323+# define machine_is_phidget_sbc() (0)
3324+#endif
3325+
3326+#ifdef CONFIG_MACH_IJ3K
3327+# ifdef machine_arch_type
3328+# undef machine_arch_type
3329+# define machine_arch_type __machine_arch_type
3330+# else
3331+# define machine_arch_type MACH_TYPE_IJ3K
3332+# endif
3333+# define machine_is_ij3k() (machine_arch_type == MACH_TYPE_IJ3K)
3334+#else
3335+# define machine_is_ij3k() (0)
3336+#endif
3337+
3338+#ifdef CONFIG_MACH_PISGAH
3339+# ifdef machine_arch_type
3340+# undef machine_arch_type
3341+# define machine_arch_type __machine_arch_type
3342+# else
3343+# define machine_arch_type MACH_TYPE_PISGAH
3344+# endif
3345+# define machine_is_pisgah() (machine_arch_type == MACH_TYPE_PISGAH)
3346+#else
3347+# define machine_is_pisgah() (0)
3348+#endif
3349+
3350+#ifdef CONFIG_MACH_OMAP_FSAMPLE
3351+# ifdef machine_arch_type
3352+# undef machine_arch_type
3353+# define machine_arch_type __machine_arch_type
3354+# else
3355+# define machine_arch_type MACH_TYPE_OMAP_FSAMPLE
3356+# endif
3357+# define machine_is_omap_fsample() (machine_arch_type == MACH_TYPE_OMAP_FSAMPLE)
3358+#else
3359+# define machine_is_omap_fsample() (0)
3360+#endif
3361+
3362+#ifdef CONFIG_MACH_SG720
3363+# ifdef machine_arch_type
3364+# undef machine_arch_type
3365+# define machine_arch_type __machine_arch_type
3366+# else
3367+# define machine_arch_type MACH_TYPE_SG720
3368+# endif
3369+# define machine_is_sg720() (machine_arch_type == MACH_TYPE_SG720)
3370+#else
3371+# define machine_is_sg720() (0)
3372+#endif
3373+
3374+#ifdef CONFIG_MACH_REDFOX
3375+# ifdef machine_arch_type
3376+# undef machine_arch_type
3377+# define machine_arch_type __machine_arch_type
3378+# else
3379+# define machine_arch_type MACH_TYPE_REDFOX
3380+# endif
3381+# define machine_is_redfox() (machine_arch_type == MACH_TYPE_REDFOX)
3382+#else
3383+# define machine_is_redfox() (0)
3384+#endif
3385+
3386+#ifdef CONFIG_MACH_MYSH_EP9315_1
3387+# ifdef machine_arch_type
3388+# undef machine_arch_type
3389+# define machine_arch_type __machine_arch_type
3390+# else
3391+# define machine_arch_type MACH_TYPE_MYSH_EP9315_1
3392+# endif
3393+# define machine_is_mysh_ep9315_1() (machine_arch_type == MACH_TYPE_MYSH_EP9315_1)
3394+#else
3395+# define machine_is_mysh_ep9315_1() (0)
3396+#endif
3397+
3398+#ifdef CONFIG_MACH_TPF106
3399+# ifdef machine_arch_type
3400+# undef machine_arch_type
3401+# define machine_arch_type __machine_arch_type
3402+# else
3403+# define machine_arch_type MACH_TYPE_TPF106
3404+# endif
3405+# define machine_is_tpf106() (machine_arch_type == MACH_TYPE_TPF106)
3406+#else
3407+# define machine_is_tpf106() (0)
3408+#endif
3409+
3410+#ifdef CONFIG_MACH_AT91RM9200KG
3411+# ifdef machine_arch_type
3412+# undef machine_arch_type
3413+# define machine_arch_type __machine_arch_type
3414+# else
3415+# define machine_arch_type MACH_TYPE_AT91RM9200KG
3416+# endif
3417+# define machine_is_at91rm9200kg() (machine_arch_type == MACH_TYPE_AT91RM9200KG)
3418+#else
3419+# define machine_is_at91rm9200kg() (0)
3420+#endif
3421+
3422+#ifdef CONFIG_MACH_SLEDB
3423+# ifdef machine_arch_type
3424+# undef machine_arch_type
3425+# define machine_arch_type __machine_arch_type
3426+# else
3427+# define machine_arch_type MACH_TYPE_SLEDB
3428+# endif
3429+# define machine_is_racemt2() (machine_arch_type == MACH_TYPE_SLEDB)
3430+#else
3431+# define machine_is_racemt2() (0)
3432+#endif
3433+
3434+#ifdef CONFIG_MACH_ONTRACK
3435+# ifdef machine_arch_type
3436+# undef machine_arch_type
3437+# define machine_arch_type __machine_arch_type
3438+# else
3439+# define machine_arch_type MACH_TYPE_ONTRACK
3440+# endif
3441+# define machine_is_ontrack() (machine_arch_type == MACH_TYPE_ONTRACK)
3442+#else
3443+# define machine_is_ontrack() (0)
3444+#endif
3445+
3446+#ifdef CONFIG_MACH_PM1200
3447+# ifdef machine_arch_type
3448+# undef machine_arch_type
3449+# define machine_arch_type __machine_arch_type
3450+# else
3451+# define machine_arch_type MACH_TYPE_PM1200
3452+# endif
3453+# define machine_is_pm1200() (machine_arch_type == MACH_TYPE_PM1200)
3454+#else
3455+# define machine_is_pm1200() (0)
3456+#endif
3457+
3458+#ifdef CONFIG_MACH_ESS24XXX
3459+# ifdef machine_arch_type
3460+# undef machine_arch_type
3461+# define machine_arch_type __machine_arch_type
3462+# else
3463+# define machine_arch_type MACH_TYPE_ESS24XXX
3464+# endif
3465+# define machine_is_ess24562() (machine_arch_type == MACH_TYPE_ESS24XXX)
3466+#else
3467+# define machine_is_ess24562() (0)
3468+#endif
3469+
3470+#ifdef CONFIG_MACH_COREMP7
3471+# ifdef machine_arch_type
3472+# undef machine_arch_type
3473+# define machine_arch_type __machine_arch_type
3474+# else
3475+# define machine_arch_type MACH_TYPE_COREMP7
3476+# endif
3477+# define machine_is_coremp7() (machine_arch_type == MACH_TYPE_COREMP7)
3478+#else
3479+# define machine_is_coremp7() (0)
3480+#endif
3481+
3482+#ifdef CONFIG_MACH_NEXCODER_6446
3483+# ifdef machine_arch_type
3484+# undef machine_arch_type
3485+# define machine_arch_type __machine_arch_type
3486+# else
3487+# define machine_arch_type MACH_TYPE_NEXCODER_6446
3488+# endif
3489+# define machine_is_nexcoder_6446() (machine_arch_type == MACH_TYPE_NEXCODER_6446)
3490+#else
3491+# define machine_is_nexcoder_6446() (0)
3492+#endif
3493+
3494+#ifdef CONFIG_MACH_STVC8380
3495+# ifdef machine_arch_type
3496+# undef machine_arch_type
3497+# define machine_arch_type __machine_arch_type
3498+# else
3499+# define machine_arch_type MACH_TYPE_STVC8380
3500+# endif
3501+# define machine_is_stvc8380() (machine_arch_type == MACH_TYPE_STVC8380)
3502+#else
3503+# define machine_is_stvc8380() (0)
3504+#endif
3505+
3506+#ifdef CONFIG_MACH_TEKLYNX
3507+# ifdef machine_arch_type
3508+# undef machine_arch_type
3509+# define machine_arch_type __machine_arch_type
3510+# else
3511+# define machine_arch_type MACH_TYPE_TEKLYNX
3512+# endif
3513+# define machine_is_teklynx() (machine_arch_type == MACH_TYPE_TEKLYNX)
3514+#else
3515+# define machine_is_teklynx() (0)
3516+#endif
3517+
3518+#ifdef CONFIG_MACH_CARBONADO
3519+# ifdef machine_arch_type
3520+# undef machine_arch_type
3521+# define machine_arch_type __machine_arch_type
3522+# else
3523+# define machine_arch_type MACH_TYPE_CARBONADO
3524+# endif
3525+# define machine_is_carbonado() (machine_arch_type == MACH_TYPE_CARBONADO)
3526+#else
3527+# define machine_is_carbonado() (0)
3528+#endif
3529+
3530+#ifdef CONFIG_MACH_SYSMOS_MP730
3531+# ifdef machine_arch_type
3532+# undef machine_arch_type
3533+# define machine_arch_type __machine_arch_type
3534+# else
3535+# define machine_arch_type MACH_TYPE_SYSMOS_MP730
3536+# endif
3537+# define machine_is_sysmos_mp730() (machine_arch_type == MACH_TYPE_SYSMOS_MP730)
3538+#else
3539+# define machine_is_sysmos_mp730() (0)
3540+#endif
3541+
3542+#ifdef CONFIG_MACH_SNAPPER_CL15
3543+# ifdef machine_arch_type
3544+# undef machine_arch_type
3545+# define machine_arch_type __machine_arch_type
3546+# else
3547+# define machine_arch_type MACH_TYPE_SNAPPER_CL15
3548+# endif
3549+# define machine_is_snapper_cl15() (machine_arch_type == MACH_TYPE_SNAPPER_CL15)
3550+#else
3551+# define machine_is_snapper_cl15() (0)
3552+#endif
3553+
3554+#ifdef CONFIG_MACH_PGIGIM
3555+# ifdef machine_arch_type
3556+# undef machine_arch_type
3557+# define machine_arch_type __machine_arch_type
3558+# else
3559+# define machine_arch_type MACH_TYPE_PGIGIM
3560+# endif
3561+# define machine_is_pgigim() (machine_arch_type == MACH_TYPE_PGIGIM)
3562+#else
3563+# define machine_is_pgigim() (0)
3564+#endif
3565+
3566+#ifdef CONFIG_MACH_PTX9160P2
3567+# ifdef machine_arch_type
3568+# undef machine_arch_type
3569+# define machine_arch_type __machine_arch_type
3570+# else
3571+# define machine_arch_type MACH_TYPE_PTX9160P2
3572+# endif
3573+# define machine_is_ptx9160p2() (machine_arch_type == MACH_TYPE_PTX9160P2)
3574+#else
3575+# define machine_is_ptx9160p2() (0)
3576+#endif
3577+
3578+#ifdef CONFIG_MACH_DCORE1
3579+# ifdef machine_arch_type
3580+# undef machine_arch_type
3581+# define machine_arch_type __machine_arch_type
3582+# else
3583+# define machine_arch_type MACH_TYPE_DCORE1
3584+# endif
3585+# define machine_is_dcore1() (machine_arch_type == MACH_TYPE_DCORE1)
3586+#else
3587+# define machine_is_dcore1() (0)
3588+#endif
3589+
3590+#ifdef CONFIG_MACH_VICTORPXA
3591+# ifdef machine_arch_type
3592+# undef machine_arch_type
3593+# define machine_arch_type __machine_arch_type
3594+# else
3595+# define machine_arch_type MACH_TYPE_VICTORPXA
3596+# endif
3597+# define machine_is_victorpxa() (machine_arch_type == MACH_TYPE_VICTORPXA)
3598+#else
3599+# define machine_is_victorpxa() (0)
3600+#endif
3601+
3602+#ifdef CONFIG_MACH_MX2DTB
3603+# ifdef machine_arch_type
3604+# undef machine_arch_type
3605+# define machine_arch_type __machine_arch_type
3606+# else
3607+# define machine_arch_type MACH_TYPE_MX2DTB
3608+# endif
3609+# define machine_is_mx2dtb() (machine_arch_type == MACH_TYPE_MX2DTB)
3610+#else
3611+# define machine_is_mx2dtb() (0)
3612+#endif
3613+
3614+#ifdef CONFIG_MACH_PXA_IREX_ER0100
3615+# ifdef machine_arch_type
3616+# undef machine_arch_type
3617+# define machine_arch_type __machine_arch_type
3618+# else
3619+# define machine_arch_type MACH_TYPE_PXA_IREX_ER0100
3620+# endif
3621+# define machine_is_pxa_irex_er0100() (machine_arch_type == MACH_TYPE_PXA_IREX_ER0100)
3622+#else
3623+# define machine_is_pxa_irex_er0100() (0)
3624+#endif
3625+
3626+#ifdef CONFIG_MACH_OMAP_PALMZ71
3627+# ifdef machine_arch_type
3628+# undef machine_arch_type
3629+# define machine_arch_type __machine_arch_type
3630+# else
3631+# define machine_arch_type MACH_TYPE_OMAP_PALMZ71
3632+# endif
3633+# define machine_is_omap_palmz71() (machine_arch_type == MACH_TYPE_OMAP_PALMZ71)
3634+#else
3635+# define machine_is_omap_palmz71() (0)
3636+#endif
3637+
3638+#ifdef CONFIG_MACH_BARTEC_DEG
3639+# ifdef machine_arch_type
3640+# undef machine_arch_type
3641+# define machine_arch_type __machine_arch_type
3642+# else
3643+# define machine_arch_type MACH_TYPE_BARTEC_DEG
3644+# endif
3645+# define machine_is_bartec_deg() (machine_arch_type == MACH_TYPE_BARTEC_DEG)
3646+#else
3647+# define machine_is_bartec_deg() (0)
3648+#endif
3649+
3650+#ifdef CONFIG_MACH_HW50251
3651+# ifdef machine_arch_type
3652+# undef machine_arch_type
3653+# define machine_arch_type __machine_arch_type
3654+# else
3655+# define machine_arch_type MACH_TYPE_HW50251
3656+# endif
3657+# define machine_is_hw50251() (machine_arch_type == MACH_TYPE_HW50251)
3658+#else
3659+# define machine_is_hw50251() (0)
3660+#endif
3661+
3662+#ifdef CONFIG_MACH_IBOX
3663+# ifdef machine_arch_type
3664+# undef machine_arch_type
3665+# define machine_arch_type __machine_arch_type
3666+# else
3667+# define machine_arch_type MACH_TYPE_IBOX
3668+# endif
3669+# define machine_is_ibox() (machine_arch_type == MACH_TYPE_IBOX)
3670+#else
3671+# define machine_is_ibox() (0)
3672+#endif
3673+
3674+#ifdef CONFIG_MACH_ATLASLH7A404
3675+# ifdef machine_arch_type
3676+# undef machine_arch_type
3677+# define machine_arch_type __machine_arch_type
3678+# else
3679+# define machine_arch_type MACH_TYPE_ATLASLH7A404
3680+# endif
3681+# define machine_is_atlaslh7a404() (machine_arch_type == MACH_TYPE_ATLASLH7A404)
3682+#else
3683+# define machine_is_atlaslh7a404() (0)
3684+#endif
3685+
3686+#ifdef CONFIG_MACH_PT2026
3687+# ifdef machine_arch_type
3688+# undef machine_arch_type
3689+# define machine_arch_type __machine_arch_type
3690+# else
3691+# define machine_arch_type MACH_TYPE_PT2026
3692+# endif
3693+# define machine_is_pt2026() (machine_arch_type == MACH_TYPE_PT2026)
3694+#else
3695+# define machine_is_pt2026() (0)
3696+#endif
3697+
3698+#ifdef CONFIG_MACH_HTCALPINE
3699+# ifdef machine_arch_type
3700+# undef machine_arch_type
3701+# define machine_arch_type __machine_arch_type
3702+# else
3703+# define machine_arch_type MACH_TYPE_HTCALPINE
3704+# endif
3705+# define machine_is_htcalpine() (machine_arch_type == MACH_TYPE_HTCALPINE)
3706+#else
3707+# define machine_is_htcalpine() (0)
3708+#endif
3709+
3710+#ifdef CONFIG_MACH_BARTEC_VTU
3711+# ifdef machine_arch_type
3712+# undef machine_arch_type
3713+# define machine_arch_type __machine_arch_type
3714+# else
3715+# define machine_arch_type MACH_TYPE_BARTEC_VTU
3716+# endif
3717+# define machine_is_bartec_vtu() (machine_arch_type == MACH_TYPE_BARTEC_VTU)
3718+#else
3719+# define machine_is_bartec_vtu() (0)
3720+#endif
3721+
3722+#ifdef CONFIG_MACH_VCOREII
3723+# ifdef machine_arch_type
3724+# undef machine_arch_type
3725+# define machine_arch_type __machine_arch_type
3726+# else
3727+# define machine_arch_type MACH_TYPE_VCOREII
3728+# endif
3729+# define machine_is_vcoreii() (machine_arch_type == MACH_TYPE_VCOREII)
3730+#else
3731+# define machine_is_vcoreii() (0)
3732+#endif
3733+
3734+#ifdef CONFIG_MACH_PDNB3
3735+# ifdef machine_arch_type
3736+# undef machine_arch_type
3737+# define machine_arch_type __machine_arch_type
3738+# else
3739+# define machine_arch_type MACH_TYPE_PDNB3
3740+# endif
3741+# define machine_is_pdnb3() (machine_arch_type == MACH_TYPE_PDNB3)
3742+#else
3743+# define machine_is_pdnb3() (0)
3744+#endif
3745+
3746+#ifdef CONFIG_MACH_HTCBEETLES
3747+# ifdef machine_arch_type
3748+# undef machine_arch_type
3749+# define machine_arch_type __machine_arch_type
3750+# else
3751+# define machine_arch_type MACH_TYPE_HTCBEETLES
3752+# endif
3753+# define machine_is_htcbeetles() (machine_arch_type == MACH_TYPE_HTCBEETLES)
3754+#else
3755+# define machine_is_htcbeetles() (0)
3756+#endif
3757+
3758+#ifdef CONFIG_MACH_S3C6400
3759+# ifdef machine_arch_type
3760+# undef machine_arch_type
3761+# define machine_arch_type __machine_arch_type
3762+# else
3763+# define machine_arch_type MACH_TYPE_S3C6400
3764+# endif
3765+# define machine_is_s3c6400() (machine_arch_type == MACH_TYPE_S3C6400)
3766+#else
3767+# define machine_is_s3c6400() (0)
3768+#endif
3769+
3770+#ifdef CONFIG_MACH_S3C2443
3771+# ifdef machine_arch_type
3772+# undef machine_arch_type
3773+# define machine_arch_type __machine_arch_type
3774+# else
3775+# define machine_arch_type MACH_TYPE_S3C2443
3776+# endif
3777+# define machine_is_s3c2443() (machine_arch_type == MACH_TYPE_S3C2443)
3778+#else
3779+# define machine_is_s3c2443() (0)
3780+#endif
3781+
3782+#ifdef CONFIG_MACH_OMAP_LDK
3783+# ifdef machine_arch_type
3784+# undef machine_arch_type
3785+# define machine_arch_type __machine_arch_type
3786+# else
3787+# define machine_arch_type MACH_TYPE_OMAP_LDK
3788+# endif
3789+# define machine_is_omap_ldk() (machine_arch_type == MACH_TYPE_OMAP_LDK)
3790+#else
3791+# define machine_is_omap_ldk() (0)
3792+#endif
3793+
3794+#ifdef CONFIG_MACH_SMDK2460
3795+# ifdef machine_arch_type
3796+# undef machine_arch_type
3797+# define machine_arch_type __machine_arch_type
3798+# else
3799+# define machine_arch_type MACH_TYPE_SMDK2460
3800+# endif
3801+# define machine_is_smdk2460() (machine_arch_type == MACH_TYPE_SMDK2460)
3802+#else
3803+# define machine_is_smdk2460() (0)
3804+#endif
3805+
3806+#ifdef CONFIG_MACH_SMDK2440
3807+# ifdef machine_arch_type
3808+# undef machine_arch_type
3809+# define machine_arch_type __machine_arch_type
3810+# else
3811+# define machine_arch_type MACH_TYPE_SMDK2440
3812+# endif
3813+# define machine_is_smdk2440() (machine_arch_type == MACH_TYPE_SMDK2440)
3814+#else
3815+# define machine_is_smdk2440() (0)
3816+#endif
3817+
3818+#ifdef CONFIG_MACH_SMDK2412
3819+# ifdef machine_arch_type
3820+# undef machine_arch_type
3821+# define machine_arch_type __machine_arch_type
3822+# else
3823+# define machine_arch_type MACH_TYPE_SMDK2412
3824+# endif
3825+# define machine_is_smdk2412() (machine_arch_type == MACH_TYPE_SMDK2412)
3826+#else
3827+# define machine_is_smdk2412() (0)
3828+#endif
3829+
3830+#ifdef CONFIG_MACH_WEBBOX
3831+# ifdef machine_arch_type
3832+# undef machine_arch_type
3833+# define machine_arch_type __machine_arch_type
3834+# else
3835+# define machine_arch_type MACH_TYPE_WEBBOX
3836+# endif
3837+# define machine_is_webbox() (machine_arch_type == MACH_TYPE_WEBBOX)
3838+#else
3839+# define machine_is_webbox() (0)
3840+#endif
3841+
3842+#ifdef CONFIG_MACH_CWWNDP
3843+# ifdef machine_arch_type
3844+# undef machine_arch_type
3845+# define machine_arch_type __machine_arch_type
3846+# else
3847+# define machine_arch_type MACH_TYPE_CWWNDP
3848+# endif
3849+# define machine_is_cwwndp() (machine_arch_type == MACH_TYPE_CWWNDP)
3850+#else
3851+# define machine_is_cwwndp() (0)
3852+#endif
3853+
3854+#ifdef CONFIG_MACH_DRAGON
3855+# ifdef machine_arch_type
3856+# undef machine_arch_type
3857+# define machine_arch_type __machine_arch_type
3858+# else
3859+# define machine_arch_type MACH_TYPE_DRAGON
3860+# endif
3861+# define machine_is_dragon() (machine_arch_type == MACH_TYPE_DRAGON)
3862+#else
3863+# define machine_is_dragon() (0)
3864+#endif
3865+
3866+#ifdef CONFIG_MACH_OPENDO_CPU_BOARD
3867+# ifdef machine_arch_type
3868+# undef machine_arch_type
3869+# define machine_arch_type __machine_arch_type
3870+# else
3871+# define machine_arch_type MACH_TYPE_OPENDO_CPU_BOARD
3872+# endif
3873+# define machine_is_opendo_cpu_board() (machine_arch_type == MACH_TYPE_OPENDO_CPU_BOARD)
3874+#else
3875+# define machine_is_opendo_cpu_board() (0)
3876+#endif
3877+
3878+#ifdef CONFIG_MACH_CCM2200
3879+# ifdef machine_arch_type
3880+# undef machine_arch_type
3881+# define machine_arch_type __machine_arch_type
3882+# else
3883+# define machine_arch_type MACH_TYPE_CCM2200
3884+# endif
3885+# define machine_is_ccm2200() (machine_arch_type == MACH_TYPE_CCM2200)
3886+#else
3887+# define machine_is_ccm2200() (0)
3888+#endif
3889+
3890+#ifdef CONFIG_MACH_ETWARM
3891+# ifdef machine_arch_type
3892+# undef machine_arch_type
3893+# define machine_arch_type __machine_arch_type
3894+# else
3895+# define machine_arch_type MACH_TYPE_ETWARM
3896+# endif
3897+# define machine_is_etwarm() (machine_arch_type == MACH_TYPE_ETWARM)
3898+#else
3899+# define machine_is_etwarm() (0)
3900+#endif
3901+
3902+#ifdef CONFIG_MACH_M93030
3903+# ifdef machine_arch_type
3904+# undef machine_arch_type
3905+# define machine_arch_type __machine_arch_type
3906+# else
3907+# define machine_arch_type MACH_TYPE_M93030
3908+# endif
3909+# define machine_is_m93030() (machine_arch_type == MACH_TYPE_M93030)
3910+#else
3911+# define machine_is_m93030() (0)
3912+#endif
3913+
3914+#ifdef CONFIG_MACH_CC7U
3915+# ifdef machine_arch_type
3916+# undef machine_arch_type
3917+# define machine_arch_type __machine_arch_type
3918+# else
3919+# define machine_arch_type MACH_TYPE_CC7U
3920+# endif
3921+# define machine_is_cc7u() (machine_arch_type == MACH_TYPE_CC7U)
3922+#else
3923+# define machine_is_cc7u() (0)
3924+#endif
3925+
3926+#ifdef CONFIG_MACH_MTT_RANGER
3927+# ifdef machine_arch_type
3928+# undef machine_arch_type
3929+# define machine_arch_type __machine_arch_type
3930+# else
3931+# define machine_arch_type MACH_TYPE_MTT_RANGER
3932+# endif
3933+# define machine_is_mtt_ranger() (machine_arch_type == MACH_TYPE_MTT_RANGER)
3934+#else
3935+# define machine_is_mtt_ranger() (0)
3936+#endif
3937+
3938+#ifdef CONFIG_MACH_NEXUS
3939+# ifdef machine_arch_type
3940+# undef machine_arch_type
3941+# define machine_arch_type __machine_arch_type
3942+# else
3943+# define machine_arch_type MACH_TYPE_NEXUS
3944+# endif
3945+# define machine_is_nexus() (machine_arch_type == MACH_TYPE_NEXUS)
3946+#else
3947+# define machine_is_nexus() (0)
3948+#endif
3949+
3950+#ifdef CONFIG_MACH_DESMAN
3951+# ifdef machine_arch_type
3952+# undef machine_arch_type
3953+# define machine_arch_type __machine_arch_type
3954+# else
3955+# define machine_arch_type MACH_TYPE_DESMAN
3956+# endif
3957+# define machine_is_desman() (machine_arch_type == MACH_TYPE_DESMAN)
3958+#else
3959+# define machine_is_desman() (0)
3960+#endif
3961+
3962+#ifdef CONFIG_MACH_BKDE303
3963+# ifdef machine_arch_type
3964+# undef machine_arch_type
3965+# define machine_arch_type __machine_arch_type
3966+# else
3967+# define machine_arch_type MACH_TYPE_BKDE303
3968+# endif
3969+# define machine_is_bkde303() (machine_arch_type == MACH_TYPE_BKDE303)
3970+#else
3971+# define machine_is_bkde303() (0)
3972+#endif
3973+
3974+#ifdef CONFIG_MACH_SMDK2413
3975+# ifdef machine_arch_type
3976+# undef machine_arch_type
3977+# define machine_arch_type __machine_arch_type
3978+# else
3979+# define machine_arch_type MACH_TYPE_SMDK2413
3980+# endif
3981+# define machine_is_smdk2413() (machine_arch_type == MACH_TYPE_SMDK2413)
3982+#else
3983+# define machine_is_smdk2413() (0)
3984+#endif
3985+
3986+#ifdef CONFIG_MACH_AML_M7200
3987+# ifdef machine_arch_type
3988+# undef machine_arch_type
3989+# define machine_arch_type __machine_arch_type
3990+# else
3991+# define machine_arch_type MACH_TYPE_AML_M7200
3992+# endif
3993+# define machine_is_aml_m7200() (machine_arch_type == MACH_TYPE_AML_M7200)
3994+#else
3995+# define machine_is_aml_m7200() (0)
3996+#endif
3997+
3998+#ifdef CONFIG_MACH_AML_M5900
3999+# ifdef machine_arch_type
4000+# undef machine_arch_type
4001+# define machine_arch_type __machine_arch_type
4002+# else
4003+# define machine_arch_type MACH_TYPE_AML_M5900
4004+# endif
4005+# define machine_is_aml_m5900() (machine_arch_type == MACH_TYPE_AML_M5900)
4006+#else
4007+# define machine_is_aml_m5900() (0)
4008+#endif
4009+
4010+#ifdef CONFIG_MACH_SG640
4011+# ifdef machine_arch_type
4012+# undef machine_arch_type
4013+# define machine_arch_type __machine_arch_type
4014+# else
4015+# define machine_arch_type MACH_TYPE_SG640
4016+# endif
4017+# define machine_is_sg640() (machine_arch_type == MACH_TYPE_SG640)
4018+#else
4019+# define machine_is_sg640() (0)
4020+#endif
4021+
4022+#ifdef CONFIG_MACH_EDG79524
4023+# ifdef machine_arch_type
4024+# undef machine_arch_type
4025+# define machine_arch_type __machine_arch_type
4026+# else
4027+# define machine_arch_type MACH_TYPE_EDG79524
4028+# endif
4029+# define machine_is_edg79524() (machine_arch_type == MACH_TYPE_EDG79524)
4030+#else
4031+# define machine_is_edg79524() (0)
4032+#endif
4033+
4034+#ifdef CONFIG_MACH_AI2410
4035+# ifdef machine_arch_type
4036+# undef machine_arch_type
4037+# define machine_arch_type __machine_arch_type
4038+# else
4039+# define machine_arch_type MACH_TYPE_AI2410
4040+# endif
4041+# define machine_is_ai2410() (machine_arch_type == MACH_TYPE_AI2410)
4042+#else
4043+# define machine_is_ai2410() (0)
4044+#endif
4045+
4046+#ifdef CONFIG_MACH_IXP465
4047+# ifdef machine_arch_type
4048+# undef machine_arch_type
4049+# define machine_arch_type __machine_arch_type
4050+# else
4051+# define machine_arch_type MACH_TYPE_IXP465
4052+# endif
4053+# define machine_is_ixp465() (machine_arch_type == MACH_TYPE_IXP465)
4054+#else
4055+# define machine_is_ixp465() (0)
4056+#endif
4057+
4058+#ifdef CONFIG_MACH_BALLOON3
4059+# ifdef machine_arch_type
4060+# undef machine_arch_type
4061+# define machine_arch_type __machine_arch_type
4062+# else
4063+# define machine_arch_type MACH_TYPE_BALLOON3
4064+# endif
4065+# define machine_is_balloon3() (machine_arch_type == MACH_TYPE_BALLOON3)
4066+#else
4067+# define machine_is_balloon3() (0)
4068+#endif
4069+
4070+#ifdef CONFIG_MACH_QT2410
4071+# ifdef machine_arch_type
4072+# undef machine_arch_type
4073+# define machine_arch_type __machine_arch_type
4074+# else
4075+# define machine_arch_type MACH_TYPE_QT2410
4076+# endif
4077+# define machine_is_qt2410() (machine_arch_type == MACH_TYPE_QT2410)
4078+#else
4079+# define machine_is_qt2410() (0)
4080+#endif
4081+
4082+#ifdef CONFIG_MACH_NEO1973_GTA01
4083+# ifdef machine_arch_type
4084+# undef machine_arch_type
4085+# define machine_arch_type __machine_arch_type
4086+# else
4087+# define machine_arch_type MACH_TYPE_NEO1973_GTA01
4088+# endif
4089+# define machine_is_neo1973_gta01() (machine_arch_type == MACH_TYPE_NEO1973_GTA01)
4090+#else
4091+# define machine_is_neo1973_gta01() (0)
4092+#endif
4093+
4094+#ifdef CONFIG_MACH_HXD8
4095+# ifdef machine_arch_type
4096+# undef machine_arch_type
4097+# define machine_arch_type __machine_arch_type
4098+# else
4099+# define machine_arch_type MACH_TYPE_HXD8
4100+# endif
4101+# define machine_is_hxd8() (machine_arch_type == MACH_TYPE_HXD8)
4102+#else
4103+# define machine_is_neo8() (0)
4104+#endif
4105+
4106+#ifdef CONFIG_MACH_NEO1973_GTA02
4107+# ifdef machine_arch_type
4108+# undef machine_arch_type
4109+# define machine_arch_type __machine_arch_type
4110+# else
4111+# define machine_arch_type MACH_TYPE_NEO1973_GTA02
4112+# endif
4113+# define machine_is_neo1973_gta02() (machine_arch_type == MACH_TYPE_NEO1973_GTA02)
4114+#else
4115+# define machine_is_neo1973_gta02() (0)
4116+#endif
4117+
4118+
4119 /*
4120 * These have not yet been registered
4121 */
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-mokoversion.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-mokoversion.patch
new file mode 100644
index 0000000000..a44434155e
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-mokoversion.patch
@@ -0,0 +1,10 @@
1Index: u-boot/tools/setlocalversion
2===================================================================
3--- u-boot.orig/tools/setlocalversion 2007-03-26 14:42:58.000000000 +0200
4+++ u-boot/tools/setlocalversion 2007-03-26 14:46:47.000000000 +0200
5@@ -20,3 +20,5 @@
6 printf '%s' -dirty
7 fi
8 fi
9+
10+printf '%s' -moko9
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-nand-markbad-reallybad.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-nand-markbad-reallybad.patch
new file mode 100644
index 0000000000..d630889e3c
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-nand-markbad-reallybad.patch
@@ -0,0 +1,20 @@
1This patch makes sure that the 'nand markbad' command does not only mark a block
2'bad' in the bad-block table, but _also_ marks it bad in the OOB area.
3
4we need this to preserve the bad block status when re-creating the bad block table
5at some later point.
6
7Signed-off-by: Harald Welte <laforge@openmoko.org>
8Index: u-boot/drivers/nand/nand_base.c
9===================================================================
10--- u-boot.orig/drivers/nand/nand_base.c 2007-03-01 12:47:31.000000000 +0100
11+++ u-boot/drivers/nand/nand_base.c 2007-03-01 12:48:08.000000000 +0100
12@@ -481,7 +481,7 @@
13
14 /* Do we have a flash based bad block table ? */
15 if (this->options & NAND_USE_FLASH_BBT)
16- return nand_update_bbt (mtd, ofs);
17+ nand_update_bbt (mtd, ofs);
18
19 /* We write two bytes, so we dont have to mess with 16 bit access */
20 ofs += mtd->oobsize + (this->badblockpos & ~0x01);
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-neo1973-defaultenv.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-neo1973-defaultenv.patch
new file mode 100644
index 0000000000..7e3aa4f480
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-neo1973-defaultenv.patch
@@ -0,0 +1,31 @@
1Index: u-boot/include/configs/neo1973_gta01.h
2===================================================================
3--- u-boot.orig/include/configs/neo1973_gta01.h 2007-02-27 00:43:16.000000000 +0100
4+++ u-boot/include/configs/neo1973_gta01.h 2007-02-27 00:47:49.000000000 +0100
5@@ -115,8 +115,8 @@
6 #include <cmd_confdefs.h>
7
8 #define CONFIG_BOOTDELAY 3
9-#define CONFIG_BOOTARGS "rootfstype=jffs2 root=/dev/mtdblock4 console=ttySAC0,115200 console=tty0 loglevel=8"
10-#define CONFIG_BOOTCOMMAND "nand read.e 0x32000000 0x34000 0x200000; bootm 0x32000000"
11+#define CONFIG_BOOTARGS ""
12+#define CONFIG_BOOTCOMMAND "setenv bootargs ${bootargs_base} ${mtdparts}; nand read.e 0x32000000 kernel; bootm 0x32000000"
13
14 #define CONFIG_DOS_PARTITION 1
15
16@@ -181,11 +181,14 @@
17 #define CONFIG_USBD_PRODUCTID_CDCACM 0x5119 /* CDC ACM */
18 #define CONFIG_USBD_MANUFACTURER "OpenMoko, Inc"
19 #define CONFIG_USBD_PRODUCT_NAME "Neo1973 Bootloader " U_BOOT_VERSION
20-#define CONFIG_EXTRA_ENV_SETTINGS "usbtty=cdc_acm\0"
21 #define CONFIG_USBD_DFU 1
22 #define CONFIG_USBD_DFU_XFER_SIZE 4096 /* 0x4000 */
23 #define CONFIG_USBD_DFU_INTERFACE 2
24
25+#define CONFIG_EXTRA_ENV_SETTINGS \
26+ "usbtty=cdc_acm\0" \
27+ "bootargs_base=rootfstype=jffs2 root=/dev/mtdblock4 console=ttySAC0,115200 console=tty0 loglevel=8\0" \
28+ ""
29
30 /*-----------------------------------------------------------------------
31 * Physical Memory Map
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-neo1973-resume.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-neo1973-resume.patch
new file mode 100644
index 0000000000..19d912620d
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-neo1973-resume.patch
@@ -0,0 +1,113 @@
1Resume support for low-level uboot code, Version 5
2
3Signed-off-by: Ben Dooks <ben-linux@fluff.org>
4
5Index: u-boot/cpu/arm920t/start.S
6===================================================================
7--- u-boot.orig/cpu/arm920t/start.S 2007-02-28 03:51:24.000000000 +0100
8+++ u-boot/cpu/arm920t/start.S 2007-03-01 02:43:47.000000000 +0100
9@@ -158,18 +158,68 @@
10 str r1, [r0]
11 # endif
12
13+ /* default FCLK is 202 MHz ! */
14+#define LOCKTIME 0x4c000000
15+#define UPLLCON 0x4c000008
16+//#define MPLLCFG ((0x90 << 12) + (0x2 << 4) + 0x2)
17+#define MPLLCFG ((0x90 << 12) + (0x7 << 4) + 0x0)
18+#define UPLLCFG ((0x78 << 12) + (0x2 << 4) + 0x3)
19+ ldr r0, =LOCKTIME
20+ mov r1, #0xffffff
21+ str r1, [r0]
22+
23+ ldr r0, =UPLLCON
24+ ldr r1, =UPLLCFG
25+ str r1, [r0]
26+
27+ /* Page 7-19, seven nops between UPLL and MPLL */
28+ nop
29+ nop
30+ nop
31+ nop
32+ nop
33+ nop
34+ nop
35+
36+ ldr r1, =MPLLCFG
37+ str r1, [r0, #-4] /* MPLLCON */
38+
39 /* FCLK:HCLK:PCLK = 1:2:4 */
40- /* default FCLK is 120 MHz ! */
41 ldr r0, =CLKDIVN
42 mov r1, #3
43 str r1, [r0]
44+
45+#if 1
46+ /* enable uart */
47+ ldr r0, =0x4c00000c /* clkcon */
48+ ldr r1, =0x7fff0 /* all clocks on */
49+ str r1, [r0]
50+
51+ /* gpio UART0 init */
52+ ldr r0, =0x56000070
53+ mov r1, #0xaa
54+ str r1, [r0]
55+
56+ /* init uart */
57+ ldr r0, =0x50000000
58+ mov r1, #0x03
59+ str r1, [r0]
60+ ldr r1, =0x245
61+ str r1, [r0, #0x04]
62+ mov r1, #0x01
63+ str r1, [r0, #0x08]
64+ mov r1, #0x00
65+ str r1, [r0, #0x0c]
66+ mov r1, #0x1a
67+ str r1, [r0, #0x28]
68+#endif
69+
70 #endif /* CONFIG_S3C2400 || CONFIG_S3C2410 */
71
72 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
73 #ifndef CONFIG_LL_INIT_NAND_ONLY
74 bl cpu_init_crit
75 #endif
76-#endif
77
78 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
79 adr r0, _start /* r0 <- current position of code */
80@@ -202,9 +252,33 @@
81
82 #ifdef CONFIG_S3C2410_NAND_BOOT
83 nand_load:
84+ /* take sdram out of power down */
85+ ldr r0, =0x56000080 /* misccr */
86+ ldr r1, [ r0 ]
87+ bic r1, r1, #(S3C2410_MISCCR_nEN_SCLK0 | S3C2410_MISCCR_nEN_SCLK1 | S3C2410_MISCCR_nEN_SCLKE)
88+ str r1, [ r0 ]
89+
90+ /* ensure signals stabalise */
91+ mov r1, #128
92+1: subs r1, r1, #1
93+ bpl 1b
94+
95 #if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && defined(CONFIG_LL_INIT_NAND_ONLY)
96 bl cpu_init_crit
97 #endif
98+#if defined(CONFIG_S3C2410)
99+ /* ensure some refresh has happened */
100+ ldr r1, =0xfffff
101+1: subs r1, r1, #1
102+ bpl 1b
103+
104+ /* test for resume */
105+ ldr r1, =0x560000B4 /* gstatus2 */
106+ ldr r0, [ r1 ]
107+ tst r0, #0x02 /* is this resume from power down */
108+ ldrne pc, [r1, #4] /* gstatus3 */
109+#endif /* CONFIG_S3C2410 */
110+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
111
112 /* mov r10, lr */
113
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch
new file mode 100644
index 0000000000..6efe24651a
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-misccr-definitions.patch
@@ -0,0 +1,45 @@
1Index: u-boot/include/s3c2410.h
2===================================================================
3--- u-boot.orig/include/s3c2410.h
4+++ u-boot/include/s3c2410.h
5@@ -233,4 +233,40 @@ static inline S3C2410_SDI * S3C2410_GetB
6 rINTPND;\
7 }
8 /* Wait until rINTPND is changed for the case that the ISR is very short. */
9+
10+#define S3C2410_MISCCR_USBDEV (0<<3)
11+#define S3C2410_MISCCR_USBHOST (1<<3)
12+
13+#define S3C2410_MISCCR_CLK0_MPLL (0<<4)
14+#define S3C2410_MISCCR_CLK0_UPLL (1<<4)
15+#define S3C2410_MISCCR_CLK0_FCLK (2<<4)
16+#define S3C2410_MISCCR_CLK0_HCLK (3<<4)
17+#define S3C2410_MISCCR_CLK0_PCLK (4<<4)
18+#define S3C2410_MISCCR_CLK0_DCLK0 (5<<4)
19+#define S3C2410_MISCCR_CLK0_MASK (7<<4)
20+
21+#define S3C2410_MISCCR_CLK1_MPLL (0<<8)
22+#define S3C2410_MISCCR_CLK1_UPLL (1<<8)
23+#define S3C2410_MISCCR_CLK1_FCLK (2<<8)
24+#define S3C2410_MISCCR_CLK1_HCLK (3<<8)
25+#define S3C2410_MISCCR_CLK1_PCLK (4<<8)
26+#define S3C2410_MISCCR_CLK1_DCLK1 (5<<8)
27+#define S3C2410_MISCCR_CLK1_MASK (7<<8)
28+
29+#define S3C2410_MISCCR_USBSUSPND0 (1<<12)
30+#define S3C2410_MISCCR_USBSUSPND1 (1<<13)
31+
32+#define S3C2410_MISCCR_nRSTCON (1<<16)
33+
34+#define S3C2410_MISCCR_nEN_SCLK0 (1<<17)
35+#define S3C2410_MISCCR_nEN_SCLK1 (1<<18)
36+#define S3C2410_MISCCR_nEN_SCLKE (1<<19)
37+#define S3C2410_MISCCR_SDSLEEP (7<<17)
38+
39+#define S3C2410_CLKSLOW_UCLK_OFF (1<<7)
40+#define S3C2410_CLKSLOW_MPLL_OFF (1<<5)
41+#define S3C2410_CLKSLOW_SLOW (1<<4)
42+#define S3C2410_CLKSLOW_SLOWVAL(x) (x)
43+#define S3C2410_CLKSLOW_GET_SLOWVAL(x) ((x) & 7)
44+
45 #endif /*__S3C2410_H__*/
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-mmc.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-mmc.patch
new file mode 100644
index 0000000000..b775beaa07
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-mmc.patch
@@ -0,0 +1,818 @@
1This patch adds MMC/SD support to the S3C2410 SoC code in
2u-boot
3
4Signed-off-by: Harald Welte <laforge@openmoko.org>
5
6Index: u-boot/cpu/arm920t/s3c24x0/Makefile
7===================================================================
8--- u-boot.orig/cpu/arm920t/s3c24x0/Makefile
9+++ u-boot/cpu/arm920t/s3c24x0/Makefile
10@@ -26,7 +26,7 @@
11 LIB = $(obj)lib$(SOC).a
12
13 COBJS = i2c.o interrupts.o serial.o speed.o \
14- usb_ohci.o nand_read.o nand.o cmd_s3c2410.o
15+ usb_ohci.o nand_read.o nand.o mmc.o cmd_s3c2410.o
16
17 SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
18 OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
19Index: u-boot/cpu/arm920t/s3c24x0/mmc.c
20===================================================================
21--- /dev/null
22+++ u-boot/cpu/arm920t/s3c24x0/mmc.c
23@@ -0,0 +1,531 @@
24+/*
25+ * u-boot S3C2410 MMC/SD card driver
26+ * (C) Copyright 2006 by OpenMoko, Inc.
27+ * Author: Harald Welte <laforge@openmoko.org>
28+ *
29+ * based on u-boot pxa MMC driver and linux/drivers/mmc/s3c2410mci.c
30+ * (C) 2005-2005 Thomas Kleffel
31+ *
32+ * This program is free software; you can redistribute it and/or
33+ * modify it under the terms of the GNU General Public License as
34+ * published by the Free Software Foundation; either version 2 of
35+ * the License, or (at your option) any later version.
36+ *
37+ * This program is distributed in the hope that it will be useful,
38+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
39+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
40+ * GNU General Public License for more details.
41+ *
42+ * You should have received a copy of the GNU General Public License
43+ * along with this program; if not, write to the Free Software
44+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
45+ * MA 02111-1307 USA
46+ */
47+
48+#include <config.h>
49+#include <common.h>
50+#include <mmc.h>
51+#include <asm/errno.h>
52+#include <asm/io.h>
53+#include <s3c2410.h>
54+#include <part.h>
55+#include <fat.h>
56+
57+#ifdef CONFIG_MMC
58+
59+#define CONFIG_MMC_WIDE
60+
61+static S3C2410_SDI *sdi;
62+
63+static block_dev_desc_t mmc_dev;
64+
65+block_dev_desc_t * mmc_get_dev(int dev)
66+{
67+ return ((block_dev_desc_t *)&mmc_dev);
68+}
69+
70+/*
71+ * FIXME needs to read cid and csd info to determine block size
72+ * and other parameters
73+ */
74+static uchar mmc_buf[MMC_BLOCK_SIZE];
75+static mmc_csd_t mmc_csd;
76+static int mmc_ready = 0;
77+static int wide = 0;
78+
79+
80+#define CMD_F_RESP 0x01
81+#define CMD_F_RESP_LONG 0x02
82+
83+static u_int32_t *mmc_cmd(ushort cmd, ulong arg, ushort flags)
84+{
85+ static u_int32_t resp[5];
86+
87+ u_int32_t ccon, csta;
88+ u_int32_t csta_rdy_bit = S3C2410_SDICMDSTAT_CMDSENT;
89+
90+ memset(resp, 0, sizeof(resp));
91+
92+ debug("mmc_cmd CMD%d arg=0x%08x flags=%x\n", cmd, arg, flags);
93+
94+ sdi->SDICSTA = 0xffffffff;
95+ sdi->SDIDSTA = 0xffffffff;
96+ sdi->SDIFSTA = 0xffffffff;
97+
98+ sdi->SDICARG = arg;
99+
100+ ccon = cmd & S3C2410_SDICMDCON_INDEX;
101+ ccon |= S3C2410_SDICMDCON_SENDERHOST|S3C2410_SDICMDCON_CMDSTART;
102+
103+ if (flags & CMD_F_RESP) {
104+ ccon |= S3C2410_SDICMDCON_WAITRSP;
105+ csta_rdy_bit = S3C2410_SDICMDSTAT_RSPFIN; /* 1 << 9 */
106+ }
107+
108+ if (flags & CMD_F_RESP_LONG)
109+ ccon |= S3C2410_SDICMDCON_LONGRSP;
110+
111+ sdi->SDICCON = ccon;
112+
113+ while (1) {
114+ csta = sdi->SDICSTA;
115+ if (csta & csta_rdy_bit)
116+ break;
117+ if (csta & S3C2410_SDICMDSTAT_CMDTIMEOUT) {
118+ printf("===============> MMC CMD Timeout\n");
119+ sdi->SDICSTA |= S3C2410_SDICMDSTAT_CMDTIMEOUT;
120+ break;
121+ }
122+ }
123+
124+ debug("final MMC CMD status 0x%x\n", csta);
125+
126+ sdi->SDICSTA |= csta_rdy_bit;
127+
128+ if (flags & CMD_F_RESP) {
129+ resp[0] = sdi->SDIRSP0;
130+ resp[1] = sdi->SDIRSP1;
131+ resp[2] = sdi->SDIRSP2;
132+ resp[3] = sdi->SDIRSP3;
133+ }
134+
135+ return resp;
136+}
137+
138+#define FIFO_FILL(host) ((host->SDIFSTA & S3C2410_SDIFSTA_COUNTMASK) >> 2)
139+
140+static int mmc_block_read(uchar *dst, ulong src, ulong len)
141+{
142+ u_int32_t dcon, fifo;
143+ u_int32_t *dst_u32 = (u_int32_t *)dst;
144+ u_int32_t *resp;
145+
146+ if (len == 0)
147+ return 0;
148+
149+ debug("mmc_block_rd dst %lx src %lx len %d\n", (ulong)dst, src, len);
150+
151+ /* set block len */
152+ resp = mmc_cmd(MMC_CMD_SET_BLOCKLEN, len, CMD_F_RESP);
153+ sdi->SDIBSIZE = len;
154+
155+ //sdi->SDIPRE = 0xff;
156+
157+ /* setup data */
158+ dcon = (len >> 9) & S3C2410_SDIDCON_BLKNUM;
159+ dcon |= S3C2410_SDIDCON_BLOCKMODE;
160+ dcon |= S3C2410_SDIDCON_RXAFTERCMD|S3C2410_SDIDCON_XFER_RXSTART;
161+ if (wide)
162+ dcon |= S3C2410_SDIDCON_WIDEBUS;
163+ sdi->SDIDCON = dcon;
164+
165+ /* send read command */
166+ resp = mmc_cmd(MMC_CMD_READ_BLOCK, src, CMD_F_RESP);
167+
168+ while (len > 0) {
169+ u_int32_t sdidsta = sdi->SDIDSTA;
170+ fifo = FIFO_FILL(sdi);
171+ if (sdidsta & (S3C2410_SDIDSTA_FIFOFAIL|
172+ S3C2410_SDIDSTA_CRCFAIL|
173+ S3C2410_SDIDSTA_RXCRCFAIL|
174+ S3C2410_SDIDSTA_DATATIMEOUT)) {
175+ printf("mmc_block_read: err SDIDSTA=0x%08x\n", sdidsta);
176+ return -EIO;
177+ }
178+
179+ while (fifo--) {
180+ //debug("dst_u32 = 0x%08x\n", dst_u32);
181+ *(dst_u32++) = sdi->SDIDAT;
182+ if (len >= 4)
183+ len -= 4;
184+ else {
185+ len = 0;
186+ break;
187+ }
188+ }
189+ }
190+
191+ debug("waiting for SDIDSTA (currently 0x%08x\n", sdi->SDIDSTA);
192+ while (!(sdi->SDIDSTA & (1 << 4))) {}
193+ debug("done waiting for SDIDSTA (currently 0x%08x\n", sdi->SDIDSTA);
194+
195+ sdi->SDIDCON = 0;
196+
197+ if (!(sdi->SDIDSTA & S3C2410_SDIDSTA_XFERFINISH))
198+ debug("mmc_block_read; transfer not finished!\n");
199+
200+ return 0;
201+}
202+
203+static int mmc_block_write(ulong dst, uchar *src, int len)
204+{
205+ printf("MMC block write not yet supported on S3C2410!\n");
206+ return -1;
207+}
208+
209+
210+int mmc_read(ulong src, uchar *dst, int size)
211+{
212+ ulong end, part_start, part_end, part_len, aligned_start, aligned_end;
213+ ulong mmc_block_size, mmc_block_address;
214+
215+ if (size == 0)
216+ return 0;
217+
218+ if (!mmc_ready) {
219+ printf("Please initialize the MMC first\n");
220+ return -1;
221+ }
222+
223+ mmc_block_size = MMC_BLOCK_SIZE;
224+ mmc_block_address = ~(mmc_block_size - 1);
225+
226+ src -= CFG_MMC_BASE;
227+ end = src + size;
228+ part_start = ~mmc_block_address & src;
229+ part_end = ~mmc_block_address & end;
230+ aligned_start = mmc_block_address & src;
231+ aligned_end = mmc_block_address & end;
232+
233+ /* all block aligned accesses */
234+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
235+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
236+ if (part_start) {
237+ part_len = mmc_block_size - part_start;
238+ debug("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
239+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
240+ if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < 0)
241+ return -1;
242+
243+ memcpy(dst, mmc_buf+part_start, part_len);
244+ dst += part_len;
245+ src += part_len;
246+ }
247+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
248+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
249+ for (; src < aligned_end; src += mmc_block_size, dst += mmc_block_size) {
250+ debug("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
251+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
252+ if ((mmc_block_read((uchar *)(dst), src, mmc_block_size)) < 0)
253+ return -1;
254+ }
255+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
256+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
257+ if (part_end && src < end) {
258+ debug("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
259+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
260+ if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0)
261+ return -1;
262+
263+ memcpy(dst, mmc_buf, part_end);
264+ }
265+ return 0;
266+}
267+
268+int mmc_write(uchar *src, ulong dst, int size)
269+{
270+ ulong end, part_start, part_end, part_len, aligned_start, aligned_end;
271+ ulong mmc_block_size, mmc_block_address;
272+
273+ if (size == 0)
274+ return 0;
275+
276+ if (!mmc_ready) {
277+ printf("Please initialize the MMC first\n");
278+ return -1;
279+ }
280+
281+ mmc_block_size = MMC_BLOCK_SIZE;
282+ mmc_block_address = ~(mmc_block_size - 1);
283+
284+ dst -= CFG_MMC_BASE;
285+ end = dst + size;
286+ part_start = ~mmc_block_address & dst;
287+ part_end = ~mmc_block_address & end;
288+ aligned_start = mmc_block_address & dst;
289+ aligned_end = mmc_block_address & end;
290+
291+ /* all block aligned accesses */
292+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
293+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
294+ if (part_start) {
295+ part_len = mmc_block_size - part_start;
296+ debug("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
297+ (ulong)src, dst, end, part_start, part_end, aligned_start, aligned_end);
298+ if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < 0)
299+ return -1;
300+
301+ memcpy(mmc_buf+part_start, src, part_len);
302+ if ((mmc_block_write(aligned_start, mmc_buf, mmc_block_size)) < 0)
303+ return -1;
304+
305+ dst += part_len;
306+ src += part_len;
307+ }
308+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
309+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
310+ for (; dst < aligned_end; src += mmc_block_size, dst += mmc_block_size) {
311+ debug("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
312+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
313+ if ((mmc_block_write(dst, (uchar *)src, mmc_block_size)) < 0)
314+ return -1;
315+
316+ }
317+ debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
318+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
319+ if (part_end && dst < end) {
320+ debug("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
321+ src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
322+ if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0)
323+ return -1;
324+
325+ memcpy(mmc_buf, src, part_end);
326+ if ((mmc_block_write(aligned_end, mmc_buf, mmc_block_size)) < 0)
327+ return -1;
328+
329+ }
330+ return 0;
331+}
332+
333+ulong mmc_bread(int dev_num, ulong blknr, ulong blkcnt, void *dst)
334+{
335+ int mmc_block_size = MMC_BLOCK_SIZE;
336+ ulong src = blknr * mmc_block_size + CFG_MMC_BASE;
337+
338+ mmc_read(src, dst, blkcnt*mmc_block_size);
339+ return blkcnt;
340+}
341+
342+/* MMC_DEFAULT_RCA should probably be just 1, but this may break other code
343+ that expects it to be shifted. */
344+static u_int16_t rca = MMC_DEFAULT_RCA >> 16;
345+
346+static u_int32_t mmc_size(const struct mmc_csd *csd)
347+{
348+ u_int32_t block_len, mult, blocknr;
349+
350+ block_len = csd->read_bl_len << 12;
351+ mult = csd->c_size_mult1 << 8;
352+ blocknr = (csd->c_size+1) * mult;
353+
354+ return blocknr * block_len;
355+}
356+
357+struct sd_cid {
358+ char pnm_0; /* product name */
359+ char oid_1; /* OEM/application ID */
360+ char oid_0;
361+ uint8_t mid; /* manufacturer ID */
362+ char pnm_4;
363+ char pnm_3;
364+ char pnm_2;
365+ char pnm_1;
366+ uint8_t psn_2; /* product serial number */
367+ uint8_t psn_1;
368+ uint8_t psn_0; /* MSB */
369+ uint8_t prv; /* product revision */
370+ uint8_t crc; /* CRC7 checksum, b0 is unused and set to 1 */
371+ uint8_t mdt_1; /* manufacturing date, LSB, RRRRyyyy yyyymmmm */
372+ uint8_t mdt_0; /* MSB */
373+ uint8_t psn_3; /* LSB */
374+};
375+
376+static void print_mmc_cid(mmc_cid_t *cid)
377+{
378+ printf("MMC found. Card desciption is:\n");
379+ printf("Manufacturer ID = %02x%02x%02x\n",
380+ cid->id[0], cid->id[1], cid->id[2]);
381+ printf("HW/FW Revision = %x %x\n",cid->hwrev, cid->fwrev);
382+ cid->hwrev = cid->fwrev = 0; /* null terminate string */
383+ printf("Product Name = %s\n",cid->name);
384+ printf("Serial Number = %02x%02x%02x\n",
385+ cid->sn[0], cid->sn[1], cid->sn[2]);
386+ printf("Month = %d\n",cid->month);
387+ printf("Year = %d\n",1997 + cid->year);
388+}
389+
390+static void print_sd_cid(const struct sd_cid *cid)
391+{
392+ printf("Manufacturer: 0x%02x, OEM \"%c%c\"\n",
393+ cid->mid, cid->oid_0, cid->oid_1);
394+ printf("Product name: \"%c%c%c%c%c\", revision %d.%d\n",
395+ cid->pnm_0, cid->pnm_1, cid->pnm_2, cid->pnm_3, cid->pnm_4,
396+ cid->prv >> 4, cid->prv & 15);
397+ printf("Serial number: %u\n",
398+ cid->psn_0 << 24 | cid->psn_1 << 16 | cid->psn_2 << 8 |
399+ cid->psn_3);
400+ printf("Manufacturing date: %d/%d\n",
401+ cid->mdt_1 & 15,
402+ 2000+((cid->mdt_0 & 15) << 4)+((cid->mdt_1 & 0xf0) >> 4));
403+ printf("CRC: 0x%02x, b0 = %d\n",
404+ cid->crc >> 1, cid->crc & 1);
405+}
406+
407+int mmc_init(int verbose)
408+{
409+ int retries, rc = -ENODEV;
410+ int is_sd = 0;
411+ u_int32_t *resp;
412+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
413+
414+ sdi = S3C2410_GetBase_SDI();
415+
416+ debug("mmc_init(PCLK=%u)\n", get_PCLK());
417+
418+ clk_power->CLKCON |= (1 << 9);
419+
420+ /* S3C2410 has some bug that prevents reliable operation at higher speed */
421+ //sdi->SDIPRE = 0x3e; /* SDCLK = PCLK/2 / (SDIPRE+1) = 396kHz */
422+ sdi->SDIPRE = 0x02; /* SDCLK = PCLK/2 / (SDIPRE+1) = 396kHz */
423+ sdi->SDIBSIZE = 512;
424+ sdi->SDIDTIMER = 0xffff;
425+ sdi->SDIIMSK = 0x0;
426+ sdi->SDICON = S3C2410_SDICON_FIFORESET|S3C2440_SDICON_MMCCLOCK;
427+ udelay(125000); /* FIXME: 74 SDCLK cycles */
428+
429+ mmc_csd.c_size = 0;
430+
431+ /* reset */
432+ retries = 10;
433+ resp = mmc_cmd(MMC_CMD_RESET, 0, 0);
434+
435+ printf("trying to detect SD Card...\n");
436+ while (retries--) {
437+ udelay(100000);
438+ resp = mmc_cmd(55, 0x00000000, CMD_F_RESP);
439+ resp = mmc_cmd(41, 0x00300000, CMD_F_RESP);
440+
441+ if (resp[0] & (1 << 31)) {
442+ is_sd = 1;
443+ break;
444+ }
445+ }
446+
447+ if (retries == 0 && !is_sd) {
448+ retries = 10;
449+ printf("failed to detect SD Card, trying MMC\n");
450+ resp = mmc_cmd(MMC_CMD_SEND_OP_COND, 0x00ffc000, CMD_F_RESP);
451+ while (retries-- && resp && !(resp[4] & 0x80)) {
452+ debug("resp %x %x\n", resp[0], resp[1]);
453+ udelay(50);
454+ resp = mmc_cmd(1, 0x00ffff00, CMD_F_RESP);
455+ }
456+ }
457+
458+ /* try to get card id */
459+ resp = mmc_cmd(MMC_CMD_ALL_SEND_CID, 0, CMD_F_RESP|CMD_F_RESP_LONG);
460+ if (resp) {
461+ if (!is_sd) {
462+ /* TODO configure mmc driver depending on card
463+ attributes */
464+ mmc_cid_t *cid = (mmc_cid_t *)resp;
465+
466+ if (verbose)
467+ print_mmc_cid(cid);
468+ sprintf((char *) mmc_dev.vendor,
469+ "Man %02x%02x%02x Snr %02x%02x%02x",
470+ cid->id[0], cid->id[1], cid->id[2],
471+ cid->sn[0], cid->sn[1], cid->sn[2]);
472+ sprintf((char *) mmc_dev.product,"%s",cid->name);
473+ sprintf((char *) mmc_dev.revision,"%x %x",
474+ cid->hwrev, cid->fwrev);
475+ }
476+ else {
477+ struct sd_cid *cid = (struct sd_cid *) resp;
478+
479+ if (verbose)
480+ print_sd_cid(cid);
481+ sprintf((char *) mmc_dev.vendor,
482+ "Man %02 OEM %c%c \"%c%c%c%c%c\"",
483+ cid->mid, cid->oid_0, cid->oid_1,
484+ cid->pnm_0, cid->pnm_1, cid->pnm_2, cid->pnm_3,
485+ cid->pnm_4);
486+ sprintf((char *) mmc_dev.product, "%d",
487+ cid->psn_0 << 24 | cid->psn_1 << 16 |
488+ cid->psn_2 << 8 | cid->psn_3);
489+ sprintf((char *) mmc_dev.revision, "%d.%d",
490+ cid->prv >> 4, cid->prv & 15);
491+ }
492+
493+ /* fill in device description */
494+ mmc_dev.if_type = IF_TYPE_MMC;
495+ mmc_dev.part_type = PART_TYPE_DOS;
496+ mmc_dev.dev = 0;
497+ mmc_dev.lun = 0;
498+ mmc_dev.type = 0;
499+ /* FIXME fill in the correct size (is set to 32MByte) */
500+ mmc_dev.blksz = 512;
501+ mmc_dev.lba = 0x10000;
502+ mmc_dev.removable = 0;
503+ mmc_dev.block_read = mmc_bread;
504+
505+ /* MMC exists, get CSD too */
506+ resp = mmc_cmd(MMC_CMD_SET_RCA, MMC_DEFAULT_RCA, CMD_F_RESP);
507+ if (is_sd)
508+ rca = resp[0] >> 16;
509+
510+ resp = mmc_cmd(MMC_CMD_SEND_CSD, rca<<16, CMD_F_RESP|CMD_F_RESP_LONG);
511+ if (resp) {
512+ mmc_csd_t *csd = (mmc_csd_t *)resp;
513+ memcpy(&mmc_csd, csd, sizeof(csd));
514+ rc = 0;
515+ mmc_ready = 1;
516+ /* FIXME add verbose printout for csd */
517+ printf("READ_BL_LEN=%u, C_SIZE_MULT=%u, C_SIZE=%u\n",
518+ csd->read_bl_len, csd->c_size_mult1, csd->c_size);
519+ printf("size = %u\n", mmc_size(csd));
520+ }
521+ }
522+
523+ resp = mmc_cmd(MMC_CMD_SELECT_CARD, rca<<16, CMD_F_RESP);
524+
525+#ifdef CONFIG_MMC_WIDE
526+ if (is_sd) {
527+ resp = mmc_cmd(55, rca<<16, CMD_F_RESP);
528+ resp = mmc_cmd(6, 0x02, CMD_F_RESP);
529+ wide = 1;
530+ }
531+#endif
532+
533+ fat_register_device(&mmc_dev,1); /* partitions start counting with 1 */
534+
535+ return rc;
536+}
537+
538+int
539+mmc_ident(block_dev_desc_t *dev)
540+{
541+ return 0;
542+}
543+
544+int
545+mmc2info(ulong addr)
546+{
547+ /* FIXME hard codes to 32 MB device */
548+ if (addr >= CFG_MMC_BASE && addr < CFG_MMC_BASE + 0x02000000)
549+ return 1;
550+
551+ return 0;
552+}
553+
554+#endif /* CONFIG_MMC */
555Index: u-boot/include/asm-arm/arch-s3c24x0/mmc.h
556===================================================================
557--- /dev/null
558+++ u-boot/include/asm-arm/arch-s3c24x0/mmc.h
559@@ -0,0 +1,112 @@
560+/*
561+ * linux/drivers/mmc/mmc_pxa.h
562+ *
563+ * Author: Vladimir Shebordaev, Igor Oblakov
564+ * Copyright: MontaVista Software Inc.
565+ *
566+ * $Id: mmc_pxa.h,v 0.3.1.6 2002/09/25 19:25:48 ted Exp ted $
567+ *
568+ * This program is free software; you can redistribute it and/or modify
569+ * it under the terms of the GNU General Public License version 2 as
570+ * published by the Free Software Foundation.
571+ */
572+#ifndef __MMC_PXA_P_H__
573+#define __MMC_PXA_P_H__
574+
575+#include <asm/arch/regs-sdi.h>
576+
577+#define MMC_DEFAULT_RCA (1<<16)
578+
579+#define MMC_BLOCK_SIZE 512
580+#define MMC_CMD_RESET 0
581+#define MMC_CMD_SEND_OP_COND 1
582+#define MMC_CMD_ALL_SEND_CID 2
583+#define MMC_CMD_SET_RCA 3
584+#define MMC_CMD_SELECT_CARD 7
585+#define MMC_CMD_SEND_CSD 9
586+#define MMC_CMD_SEND_CID 10
587+#define MMC_CMD_SEND_STATUS 13
588+#define MMC_CMD_SET_BLOCKLEN 16
589+#define MMC_CMD_READ_BLOCK 17
590+#define MMC_CMD_RD_BLK_MULTI 18
591+#define MMC_CMD_WRITE_BLOCK 24
592+
593+#define MMC_MAX_BLOCK_SIZE 512
594+
595+#define MMC_R1_IDLE_STATE 0x01
596+#define MMC_R1_ERASE_STATE 0x02
597+#define MMC_R1_ILLEGAL_CMD 0x04
598+#define MMC_R1_COM_CRC_ERR 0x08
599+#define MMC_R1_ERASE_SEQ_ERR 0x01
600+#define MMC_R1_ADDR_ERR 0x02
601+#define MMC_R1_PARAM_ERR 0x04
602+
603+#define MMC_R1B_WP_ERASE_SKIP 0x0002
604+#define MMC_R1B_ERR 0x0004
605+#define MMC_R1B_CC_ERR 0x0008
606+#define MMC_R1B_CARD_ECC_ERR 0x0010
607+#define MMC_R1B_WP_VIOLATION 0x0020
608+#define MMC_R1B_ERASE_PARAM 0x0040
609+#define MMC_R1B_OOR 0x0080
610+#define MMC_R1B_IDLE_STATE 0x0100
611+#define MMC_R1B_ERASE_RESET 0x0200
612+#define MMC_R1B_ILLEGAL_CMD 0x0400
613+#define MMC_R1B_COM_CRC_ERR 0x0800
614+#define MMC_R1B_ERASE_SEQ_ERR 0x1000
615+#define MMC_R1B_ADDR_ERR 0x2000
616+#define MMC_R1B_PARAM_ERR 0x4000
617+
618+typedef struct mmc_cid
619+{
620+ /* FIXME: BYTE_ORDER */
621+ uchar year:4,
622+ month:4;
623+ uchar sn[3];
624+ uchar fwrev:4,
625+ hwrev:4;
626+ uchar name[6];
627+ uchar id[3];
628+} mmc_cid_t;
629+
630+typedef struct mmc_csd
631+{
632+ uchar ecc:2,
633+ file_format:2,
634+ tmp_write_protect:1,
635+ perm_write_protect:1,
636+ copy:1,
637+ file_format_grp:1;
638+ uint64_t content_prot_app:1,
639+ rsvd3:4,
640+ write_bl_partial:1,
641+ write_bl_len:4,
642+ r2w_factor:3,
643+ default_ecc:2,
644+ wp_grp_enable:1,
645+ wp_grp_size:5,
646+ erase_grp_mult:5,
647+ erase_grp_size:5,
648+ c_size_mult1:3,
649+ vdd_w_curr_max:3,
650+ vdd_w_curr_min:3,
651+ vdd_r_curr_max:3,
652+ vdd_r_curr_min:3,
653+ c_size:12,
654+ rsvd2:2,
655+ dsr_imp:1,
656+ read_blk_misalign:1,
657+ write_blk_misalign:1,
658+ read_bl_partial:1;
659+
660+ ushort read_bl_len:4,
661+ ccc:12;
662+ uchar tran_speed;
663+ uchar nsac;
664+ uchar taac;
665+ uchar rsvd1:2,
666+ spec_vers:4,
667+ csd_structure:2;
668+} mmc_csd_t;
669+
670+
671+#endif /* __MMC_PXA_P_H__ */
672Index: u-boot/include/asm-arm/arch-s3c24x0/regs-sdi.h
673===================================================================
674--- /dev/null
675+++ u-boot/include/asm-arm/arch-s3c24x0/regs-sdi.h
676@@ -0,0 +1,110 @@
677+/* linux/include/asm/arch-s3c2410/regs-sdi.h
678+ *
679+ * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>
680+ * http://www.simtec.co.uk/products/SWLINUX/
681+ *
682+ * This program is free software; you can redistribute it and/or modify
683+ * it under the terms of the GNU General Public License version 2 as
684+ * published by the Free Software Foundation.
685+ *
686+ * S3C2410 MMC/SDIO register definitions
687+ *
688+ * Changelog:
689+ * 18-Aug-2004 Ben Dooks Created initial file
690+ * 29-Nov-2004 Koen Martens Added some missing defines, fixed duplicates
691+ * 29-Nov-2004 Ben Dooks Updated Koen's patch
692+*/
693+
694+#ifndef __ASM_ARM_REGS_SDI
695+#define __ASM_ARM_REGS_SDI "regs-sdi.h"
696+
697+#define S3C2440_SDICON_SDRESET (1<<8)
698+#define S3C2440_SDICON_MMCCLOCK (1<<5)
699+#define S3C2410_SDICON_BYTEORDER (1<<4)
700+#define S3C2410_SDICON_SDIOIRQ (1<<3)
701+#define S3C2410_SDICON_RWAITEN (1<<2)
702+#define S3C2410_SDICON_FIFORESET (1<<1)
703+#define S3C2410_SDICON_CLOCKTYPE (1<<0)
704+
705+#define S3C2410_SDICMDCON_ABORT (1<<12)
706+#define S3C2410_SDICMDCON_WITHDATA (1<<11)
707+#define S3C2410_SDICMDCON_LONGRSP (1<<10)
708+#define S3C2410_SDICMDCON_WAITRSP (1<<9)
709+#define S3C2410_SDICMDCON_CMDSTART (1<<8)
710+#define S3C2410_SDICMDCON_SENDERHOST (1<<6)
711+#define S3C2410_SDICMDCON_INDEX (0x3f)
712+
713+#define S3C2410_SDICMDSTAT_CRCFAIL (1<<12)
714+#define S3C2410_SDICMDSTAT_CMDSENT (1<<11)
715+#define S3C2410_SDICMDSTAT_CMDTIMEOUT (1<<10)
716+#define S3C2410_SDICMDSTAT_RSPFIN (1<<9)
717+#define S3C2410_SDICMDSTAT_XFERING (1<<8)
718+#define S3C2410_SDICMDSTAT_INDEX (0xff)
719+
720+#define S3C2440_SDIDCON_DS_BYTE (0<<22)
721+#define S3C2440_SDIDCON_DS_HALFWORD (1<<22)
722+#define S3C2440_SDIDCON_DS_WORD (2<<22)
723+#define S3C2410_SDIDCON_IRQPERIOD (1<<21)
724+#define S3C2410_SDIDCON_TXAFTERRESP (1<<20)
725+#define S3C2410_SDIDCON_RXAFTERCMD (1<<19)
726+#define S3C2410_SDIDCON_BUSYAFTERCMD (1<<18)
727+#define S3C2410_SDIDCON_BLOCKMODE (1<<17)
728+#define S3C2410_SDIDCON_WIDEBUS (1<<16)
729+#define S3C2410_SDIDCON_DMAEN (1<<15)
730+#define S3C2410_SDIDCON_STOP (1<<14)
731+#define S3C2440_SDIDCON_DATSTART (1<<14)
732+#define S3C2410_SDIDCON_DATMODE (3<<12)
733+#define S3C2410_SDIDCON_BLKNUM (0x7ff)
734+
735+/* constants for S3C2410_SDIDCON_DATMODE */
736+#define S3C2410_SDIDCON_XFER_READY (0<<12)
737+#define S3C2410_SDIDCON_XFER_CHKSTART (1<<12)
738+#define S3C2410_SDIDCON_XFER_RXSTART (2<<12)
739+#define S3C2410_SDIDCON_XFER_TXSTART (3<<12)
740+
741+#define S3C2410_SDIDCNT_BLKNUM_MASK (0xFFF)
742+#define S3C2410_SDIDCNT_BLKNUM_SHIFT (12)
743+
744+#define S3C2410_SDIDSTA_RDYWAITREQ (1<<10)
745+#define S3C2410_SDIDSTA_SDIOIRQDETECT (1<<9)
746+#define S3C2410_SDIDSTA_FIFOFAIL (1<<8) /* reserved on 2440 */
747+#define S3C2410_SDIDSTA_CRCFAIL (1<<7)
748+#define S3C2410_SDIDSTA_RXCRCFAIL (1<<6)
749+#define S3C2410_SDIDSTA_DATATIMEOUT (1<<5)
750+#define S3C2410_SDIDSTA_XFERFINISH (1<<4)
751+#define S3C2410_SDIDSTA_BUSYFINISH (1<<3)
752+#define S3C2410_SDIDSTA_SBITERR (1<<2) /* reserved on 2410a/2440 */
753+#define S3C2410_SDIDSTA_TXDATAON (1<<1)
754+#define S3C2410_SDIDSTA_RXDATAON (1<<0)
755+
756+#define S3C2440_SDIFSTA_FIFORESET (1<<16)
757+#define S3C2440_SDIFSTA_FIFOFAIL (3<<14) /* 3 is correct (2 bits) */
758+#define S3C2410_SDIFSTA_TFDET (1<<13)
759+#define S3C2410_SDIFSTA_RFDET (1<<12)
760+#define S3C2410_SDIFSTA_TFHALF (1<<11)
761+#define S3C2410_SDIFSTA_TFEMPTY (1<<10)
762+#define S3C2410_SDIFSTA_RFLAST (1<<9)
763+#define S3C2410_SDIFSTA_RFFULL (1<<8)
764+#define S3C2410_SDIFSTA_RFHALF (1<<7)
765+#define S3C2410_SDIFSTA_COUNTMASK (0x7f)
766+
767+#define S3C2410_SDIIMSK_RESPONSECRC (1<<17)
768+#define S3C2410_SDIIMSK_CMDSENT (1<<16)
769+#define S3C2410_SDIIMSK_CMDTIMEOUT (1<<15)
770+#define S3C2410_SDIIMSK_RESPONSEND (1<<14)
771+#define S3C2410_SDIIMSK_READWAIT (1<<13)
772+#define S3C2410_SDIIMSK_SDIOIRQ (1<<12)
773+#define S3C2410_SDIIMSK_FIFOFAIL (1<<11)
774+#define S3C2410_SDIIMSK_CRCSTATUS (1<<10)
775+#define S3C2410_SDIIMSK_DATACRC (1<<9)
776+#define S3C2410_SDIIMSK_DATATIMEOUT (1<<8)
777+#define S3C2410_SDIIMSK_DATAFINISH (1<<7)
778+#define S3C2410_SDIIMSK_BUSYFINISH (1<<6)
779+#define S3C2410_SDIIMSK_SBITERR (1<<5) /* reserved 2440/2410a */
780+#define S3C2410_SDIIMSK_TXFIFOHALF (1<<4)
781+#define S3C2410_SDIIMSK_TXFIFOEMPTY (1<<3)
782+#define S3C2410_SDIIMSK_RXFIFOLAST (1<<2)
783+#define S3C2410_SDIIMSK_RXFIFOFULL (1<<1)
784+#define S3C2410_SDIIMSK_RXFIFOHALF (1<<0)
785+
786+#endif /* __ASM_ARM_REGS_SDI */
787Index: u-boot/include/s3c24x0.h
788===================================================================
789--- u-boot.orig/include/s3c24x0.h
790+++ u-boot/include/s3c24x0.h
791@@ -637,13 +637,7 @@
792 S3C24X0_REG32 SDIDCNT;
793 S3C24X0_REG32 SDIDSTA;
794 S3C24X0_REG32 SDIFSTA;
795-#ifdef __BIG_ENDIAN
796- S3C24X0_REG8 res[3];
797- S3C24X0_REG8 SDIDAT;
798-#else
799- S3C24X0_REG8 SDIDAT;
800- S3C24X0_REG8 res[3];
801-#endif
802+ S3C24X0_REG32 SDIDAT;
803 S3C24X0_REG32 SDIIMSK;
804 } /*__attribute__((__packed__))*/ S3C2410_SDI;
805
806@@ -1123,11 +1117,7 @@
807 #define rSDIDatCnt (*(volatile unsigned *)0x5A000030)
808 #define rSDIDatSta (*(volatile unsigned *)0x5A000034)
809 #define rSDIFSTA (*(volatile unsigned *)0x5A000038)
810-#ifdef __BIG_ENDIAN
811-#define rSDIDAT (*(volatile unsigned char *)0x5A00003F)
812-#else
813-#define rSDIDAT (*(volatile unsigned char *)0x5A00003C)
814-#endif
815+#define rSDIDAT (*(volatile unsigned *)0x5A00003C)
816 #define rSDIIntMsk (*(volatile unsigned *)0x5A000040)
817
818 #endif
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-nand.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-nand.patch
new file mode 100644
index 0000000000..dc363bbbab
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-nand.patch
@@ -0,0 +1,525 @@
1This patch adds NAND (including boot-from-NAND via steppingstone) support to
2the S3C2410 SoC code in u-boot
3
4Signed-off-by: Harald Welte <laforge@openmoko.org>
5
6Index: u-boot/cpu/arm920t/s3c24x0/Makefile
7===================================================================
8--- u-boot.orig/cpu/arm920t/s3c24x0/Makefile 2007-02-28 03:47:44.000000000 +0100
9+++ u-boot/cpu/arm920t/s3c24x0/Makefile 2007-03-01 14:29:32.000000000 +0100
10@@ -26,7 +26,7 @@
11 LIB = $(obj)lib$(SOC).a
12
13 COBJS = i2c.o interrupts.o serial.o speed.o \
14- usb_ohci.o
15+ usb_ohci.o nand_read.o nand.o
16
17 SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
18 OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
19Index: u-boot/cpu/arm920t/s3c24x0/nand.c
20===================================================================
21--- /dev/null 1970-01-01 00:00:00.000000000 +0000
22+++ u-boot/cpu/arm920t/s3c24x0/nand.c 2007-03-01 14:30:27.000000000 +0100
23@@ -0,0 +1,225 @@
24+/*
25+ * (C) Copyright 2006 OpenMoko, Inc.
26+ * Author: Harald Welte <laforge@openmoko.org>
27+ *
28+ * This program is free software; you can redistribute it and/or
29+ * modify it under the terms of the GNU General Public License as
30+ * published by the Free Software Foundation; either version 2 of
31+ * the License, or (at your option) any later version.
32+ *
33+ * This program is distributed in the hope that it will be useful,
34+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
35+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
36+ * GNU General Public License for more details.
37+ *
38+ * You should have received a copy of the GNU General Public License
39+ * along with this program; if not, write to the Free Software
40+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
41+ * MA 02111-1307 USA
42+ */
43+
44+#include <common.h>
45+
46+#if 0
47+#define DEBUGN printf
48+#else
49+#define DEBUGN(x, args ...) {}
50+#endif
51+
52+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
53+#if !defined(CFG_NAND_LEGACY)
54+
55+#include <nand.h>
56+#include <s3c2410.h>
57+
58+#define __REGb(x) (*(volatile unsigned char *)(x))
59+#define __REGi(x) (*(volatile unsigned int *)(x))
60+
61+#define NF_BASE 0x4e000000
62+#define NFCONF __REGi(NF_BASE + 0x0)
63+#define NFCMD __REGb(NF_BASE + 0x4)
64+#define NFADDR __REGb(NF_BASE + 0x8)
65+#define NFDATA __REGb(NF_BASE + 0xc)
66+#define NFSTAT __REGb(NF_BASE + 0x10)
67+#define NFECC0 __REGb(NF_BASE + 0x14)
68+#define NFECC1 __REGb(NF_BASE + 0x15)
69+#define NFECC2 __REGb(NF_BASE + 0x16)
70+
71+#define S3C2410_NFCONF_EN (1<<15)
72+#define S3C2410_NFCONF_512BYTE (1<<14)
73+#define S3C2410_NFCONF_4STEP (1<<13)
74+#define S3C2410_NFCONF_INITECC (1<<12)
75+#define S3C2410_NFCONF_nFCE (1<<11)
76+#define S3C2410_NFCONF_TACLS(x) ((x)<<8)
77+#define S3C2410_NFCONF_TWRPH0(x) ((x)<<4)
78+#define S3C2410_NFCONF_TWRPH1(x) ((x)<<0)
79+
80+static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd)
81+{
82+ struct nand_chip *chip = mtd->priv;
83+
84+ DEBUGN("hwcontrol(): 0x%02x: ", cmd);
85+
86+ switch (cmd) {
87+ case NAND_CTL_SETNCE:
88+ NFCONF &= ~S3C2410_NFCONF_nFCE;
89+ DEBUGN("NFCONF=0x%08x\n", NFCONF);
90+ break;
91+ case NAND_CTL_CLRNCE:
92+ NFCONF |= S3C2410_NFCONF_nFCE;
93+ DEBUGN("NFCONF=0x%08x\n", NFCONF);
94+ break;
95+ case NAND_CTL_SETALE:
96+ chip->IO_ADDR_W = NF_BASE + 0x8;
97+ DEBUGN("SETALE\n");
98+ break;
99+ case NAND_CTL_SETCLE:
100+ chip->IO_ADDR_W = NF_BASE + 0x4;
101+ DEBUGN("SETCLE\n");
102+ break;
103+ default:
104+ chip->IO_ADDR_W = NF_BASE + 0xc;
105+ break;
106+ }
107+ return;
108+}
109+
110+static int s3c2410_dev_ready(struct mtd_info *mtd)
111+{
112+ DEBUGN("dev_ready\n");
113+ return (NFSTAT & 0x01);
114+}
115+
116+static void s3c2410_cmdfunc(struct mtd_info *mtd, unsigned cmd,
117+ int column, int page_addr)
118+{
119+ DEBUGN("cmdfunc(): 0x%02x, col=%d, page=%d\n", cmd, column, page_addr);
120+
121+ switch (cmd) {
122+ case NAND_CMD_READ0:
123+ case NAND_CMD_READ1:
124+ case NAND_CMD_READOOB:
125+ NFCMD = cmd;
126+ NFADDR = column & 0xff;
127+ NFADDR = page_addr & 0xff;
128+ NFADDR = (page_addr >> 8) & 0xff;
129+ NFADDR = (page_addr >> 16) & 0xff;
130+ break;
131+ case NAND_CMD_READID:
132+ NFCMD = cmd;
133+ NFADDR = 0;
134+ break;
135+ case NAND_CMD_PAGEPROG:
136+ NFCMD = cmd;
137+ printf("PAGEPROG not implemented\n");
138+ break;
139+ case NAND_CMD_ERASE1:
140+ NFCMD = cmd;
141+ NFADDR = page_addr & 0xff;
142+ NFADDR = (page_addr >> 8) & 0xff;
143+ NFADDR = (page_addr >> 16) & 0xff;
144+ break;
145+ case NAND_CMD_ERASE2:
146+ NFCMD = cmd;
147+ break;
148+ case NAND_CMD_SEQIN:
149+ printf("SEQIN not implemented\n");
150+ break;
151+ case NAND_CMD_STATUS:
152+ NFCMD = cmd;
153+ break;
154+ case NAND_CMD_RESET:
155+ NFCMD = cmd;
156+ break;
157+ default:
158+ break;
159+ }
160+
161+ while (!s3c2410_dev_ready(mtd));
162+}
163+
164+#ifdef CONFIG_S3C2410_NAND_HWECC
165+void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode)
166+{
167+ DEBUGN("s3c2410_nand_enable_hwecc(%p, %d)\n", mtd ,mode);
168+ NFCONF |= S3C2410_NFCONF_INITECC;
169+}
170+
171+static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
172+{
173+ ecc_code[0] = NFECC0;
174+ ecc_code[1] = NFECC1;
175+ ecc_code[2] = NFECC2;
176+ DEBUGN("s3c2410_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n", mtd , ecc_code[0], ecc_code[1], ecc_code[2]);
177+
178+ return 0;
179+}
180+
181+int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
182+{
183+ if (read_ecc[0] == calc_ecc[0] &&
184+ read_ecc[1] == calc_ecc[1] &&
185+ read_ecc[2] == calc_ecc[2])
186+ return 0;
187+
188+ printf("s3c2410_nand_correct_data: not implemented\n");
189+ return -1;
190+}
191+#endif
192+
193+int board_nand_init(struct nand_chip *nand)
194+{
195+ u_int32_t cfg;
196+ u_int8_t tacls, twrph0, twrph1;
197+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
198+
199+ DEBUGN("board_nand_init()\n");
200+
201+ clk_power->CLKCON |= (1 << 4);
202+
203+ /* initialize hardware */
204+ twrph0 = 3; twrph1 = 0; tacls = 0;
205+
206+ cfg = S3C2410_NFCONF_EN;
207+ cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
208+ cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
209+ cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
210+
211+ NFCONF = cfg;
212+ //NFCONF = 0xf842;
213+
214+ /* initialize nand_chip data structure */
215+ nand->IO_ADDR_R = nand->IO_ADDR_W = 0x4e00000c;
216+
217+ /* read_buf and write_buf are default */
218+ /* read_byte and write_byte are default */
219+
220+ /* hwcontrol always must be implemented */
221+ nand->hwcontrol = s3c2410_hwcontrol;
222+
223+ nand->dev_ready = s3c2410_dev_ready;
224+
225+#ifdef CONFIG_S3C2410_NAND_HWECC
226+ nand->enable_hwecc = s3c2410_nand_enable_hwecc;
227+ nand->calculate_ecc = s3c2410_nand_calculate_ecc;
228+ nand->correct_data = s3c2410_nand_correct_data;
229+ nand->eccmode = NAND_ECC_HW3_512;
230+#else
231+ nand->eccmode = NAND_ECC_SOFT;
232+#endif
233+
234+#ifdef CONFIG_S3C2410_NAND_BBT
235+ nand->options = NAND_USE_FLASH_BBT;
236+#else
237+ nand->options = 0;
238+#endif
239+
240+ DEBUGN("end of nand_init\n");
241+
242+ return 0;
243+}
244+
245+#else
246+ #error "U-Boot legacy NAND support not available for S3C2410"
247+#endif
248+#endif
249Index: u-boot/cpu/arm920t/s3c24x0/nand_read.c
250===================================================================
251--- /dev/null 1970-01-01 00:00:00.000000000 +0000
252+++ u-boot/cpu/arm920t/s3c24x0/nand_read.c 2007-02-28 03:51:24.000000000 +0100
253@@ -0,0 +1,98 @@
254+/*
255+ * nand_read.c: Simple NAND read functions for booting from NAND
256+ *
257+ * This is used by cpu/arm920/start.S assembler code,
258+ * and the board-specific linker script must make sure this
259+ * file is linked within the first 4kB of NAND flash.
260+ *
261+ * Taken from GPLv2 licensed vivi bootloader,
262+ * Copyright (C) 2002 MIZI Research, Inc.
263+ *
264+ * Author: Hwang, Chideok <hwang@mizi.com>
265+ * Date : $Date: 2004/02/04 10:37:37 $
266+ *
267+ * u-boot integration and bad-block skipping (C) 2006 by OpenMoko, Inc.
268+ * Author: Harald Welte <laforge@openmoko.org>
269+ */
270+
271+#include <common.h>
272+
273+#ifdef CONFIG_S3C2410_NAND_BOOT
274+
275+#define __REGb(x) (*(volatile unsigned char *)(x))
276+#define __REGi(x) (*(volatile unsigned int *)(x))
277+#define NF_BASE 0x4e000000
278+#define NFCONF __REGi(NF_BASE + 0x0)
279+#define NFCMD __REGb(NF_BASE + 0x4)
280+#define NFADDR __REGb(NF_BASE + 0x8)
281+#define NFDATA __REGb(NF_BASE + 0xc)
282+#define NFSTAT __REGb(NF_BASE + 0x10)
283+
284+#define BUSY 1
285+inline void wait_idle(void)
286+{
287+ int i;
288+
289+ while (!(NFSTAT & BUSY))
290+ for (i=0; i<10; i++);
291+}
292+
293+#define NAND_SECTOR_SIZE 512
294+#define NAND_BLOCK_MASK (NAND_SECTOR_SIZE - 1)
295+#define NAND_PAGE_SIZE 0x4000
296+
297+/* low level nand read function */
298+int nand_read_ll(unsigned char *buf, unsigned long start_addr, int size)
299+{
300+ int i, j;
301+
302+ if ((start_addr & NAND_BLOCK_MASK) || (size & NAND_BLOCK_MASK))
303+ return -1; /* invalid alignment */
304+
305+ /* chip Enable */
306+ NFCONF &= ~0x800;
307+ for (i=0; i<10; i++);
308+
309+ for (i=start_addr; i < (start_addr + size);) {
310+#ifdef CONFIG_S3C2410_NAND_SKIP_BAD
311+ if (start_addr % NAND_PAGE_SIZE == 0) {
312+ unsigned char data;
313+ NFCMD = 0x50;
314+ NFADDR = 517&0xf;
315+ NFADDR = (i >> 9) & 0xff;
316+ NFADDR = (i >> 17) & 0xff;
317+ NFADDR = (i >> 25) & 0xff;
318+ wait_idle();
319+ data = (NFDATA & 0xff);
320+ if (data != 0xff) {
321+ /* Bad block */
322+ i += NAND_PAGE_SIZE;
323+ size += NAND_PAGE_SIZE;
324+ continue;
325+ }
326+ }
327+#endif
328+ /* READ0 */
329+ NFCMD = 0;
330+
331+ /* Write Address */
332+ NFADDR = i & 0xff;
333+ NFADDR = (i >> 9) & 0xff;
334+ NFADDR = (i >> 17) & 0xff;
335+ NFADDR = (i >> 25) & 0xff;
336+
337+ wait_idle();
338+
339+ for (j=0; j < NAND_SECTOR_SIZE; j++, i++) {
340+ *buf = (NFDATA & 0xff);
341+ buf++;
342+ }
343+ }
344+
345+ /* chip Disable */
346+ NFCONF |= 0x800; /* chip disable */
347+
348+ return 0;
349+}
350+
351+#endif /* CONFIG_S3C2410_NAND_BOOT */
352Index: u-boot/cpu/arm920t/start.S
353===================================================================
354--- u-boot.orig/cpu/arm920t/start.S 2007-02-28 03:47:44.000000000 +0100
355+++ u-boot/cpu/arm920t/start.S 2007-03-01 14:29:22.000000000 +0100
356@@ -5,6 +5,10 @@
357 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
358 * Copyright (c) 2002 Gary Jennejohn <gj@denx.de>
359 *
360+ * S3C2410 NAND portions
361+ * Copyright (c) 2001 MIZI Research, Inc.
362+ * Copyright (c) 2006 OpenMoko, Inc. (Harald Welte <laforge@openmmoko.org>
363+ *
364 * See file CREDITS for list of people who contributed to this
365 * project.
366 *
367@@ -27,6 +31,7 @@
368
369 #include <config.h>
370 #include <version.h>
371+#include <s3c2410.h>
372
373
374 /*
375@@ -161,6 +166,7 @@
376 #endif
377
378 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
379+#ifndef CONFIG_S3C2410_NAND_BOOT
380 relocate: /* relocate U-Boot to RAM */
381 adr r0, _start /* r0 <- current position of code */
382 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
383@@ -177,6 +183,93 @@
384 stmia r1!, {r3-r10} /* copy to target address [r1] */
385 cmp r0, r2 /* until source end addreee [r2] */
386 ble copy_loop
387+#else /* NAND_BOOT */
388+relocate:
389+copy_myself:
390+ /* mov r10, lr */
391+
392+ @ reset NAND
393+ mov r1, #S3C2410_NAND_BASE
394+ ldr r2, =0xf842 @ initial value enable tacls=3,rph0=6,rph1=0
395+ str r2, [r1, #oNFCONF]
396+ ldr r2, [r1, #oNFCONF]
397+ bic r2, r2, #0x800 @ enable chip
398+ str r2, [r1, #oNFCONF]
399+ mov r2, #0xff @ RESET command
400+ strb r2, [r1, #oNFCMD]
401+ mov r3, #0 @ wait
402+1: add r3, r3, #0x1
403+ cmp r3, #0xa
404+ blt 1b
405+2: ldr r2, [r1, #oNFSTAT] @ wait ready
406+ tst r2, #0x1
407+ beq 2b
408+ ldr r2, [r1, #oNFCONF]
409+ orr r2, r2, #0x800 @ disable chip
410+ str r2, [r1, #oNFCONF]
411+
412+#if 0
413+ @ get ready to call C functions (for nand_read())
414+ ldr sp, DW_STACK_START @ setup stack pointer
415+ mov fp, #0 @ no previous frame, so fp=0
416+#else
417+ ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
418+ sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
419+ sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
420+#ifdef CONFIG_USE_IRQ
421+ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
422+#endif
423+ sub sp, r0, #12 /* leave 3 words for abort-stack */
424+#endif
425+
426+ @ copy u-boot to RAM
427+ ldr r0, _TEXT_BASE
428+ mov r1, #0x0
429+ mov r2, #CFG_UBOOT_SIZE
430+ bl nand_read_ll
431+
432+ tst r0, #0x0
433+ beq ok_nand_read
434+#ifdef CONFIG_DEBUG_LL
435+bad_nand_read:
436+ ldr r0, STR_FAIL
437+ ldr r1, SerBase
438+ bl PrintWord
439+1: b 1b @ infinite loop
440+#endif
441+
442+ok_nand_read:
443+#ifdef CONFIG_DEBUG_LL
444+ ldr r0, STR_OK
445+ ldr r1, SerBase
446+ bl PrintWord
447+#endif
448+
449+ @ verify
450+ mov r0, #0
451+ @ldr r1, =0x33f00000
452+ ldr r1, _TEXT_BASE
453+ mov r2, #0x400 @ 4 bytes * 1024 = 4K-bytes
454+go_next:
455+ ldr r3, [r0], #4
456+ ldr r4, [r1], #4
457+ teq r3, r4
458+ bne notmatch
459+ subs r2, r2, #4
460+ beq done_nand_read
461+ bne go_next
462+notmatch:
463+#ifdef CONFIG_DEBUG_LL
464+ sub r0, r0, #4
465+ ldr r1, SerBase
466+ bl PrintHexWord
467+ ldr r0, STR_FAIL
468+ ldr r1, SerBase
469+ bl PrintWord
470+#endif
471+1: b 1b
472+done_nand_read:
473+#endif /* NAND_BOOT */
474 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
475
476 /* Set up the stack */
477Index: u-boot/include/s3c2410.h
478===================================================================
479--- u-boot.orig/include/s3c2410.h 2007-02-28 03:51:24.000000000 +0100
480+++ u-boot/include/s3c2410.h 2007-03-01 14:29:22.000000000 +0100
481@@ -38,12 +38,6 @@
482 #define S3C2410_ECCSIZE 512
483 #define S3C2410_ECCBYTES 3
484
485-typedef enum {
486- S3C24X0_UART0,
487- S3C24X0_UART1,
488- S3C24X0_UART2
489-} S3C24X0_UARTS_NR;
490-
491 /* S3C2410 device base addresses */
492 #define S3C24X0_MEMCTL_BASE 0x48000000
493 #define S3C24X0_USB_HOST_BASE 0x49000000
494@@ -65,9 +59,23 @@
495 #define S3C2410_SDI_BASE 0x5A000000
496
497
498+#define oNFCONF 0x00
499+#define oNFCMD 0x04
500+#define oNFADDR 0x08
501+#define oNFDATA 0x0C
502+#define oNFSTAT 0x10
503+#define oNFECC 0x14
504+
505+#ifndef __ASSEMBLER__
506+
507 /* include common stuff */
508 #include <s3c24x0.h>
509
510+typedef enum {
511+ S3C24X0_UART0,
512+ S3C24X0_UART1,
513+ S3C24X0_UART2
514+} S3C24X0_UARTS_NR;
515
516 static inline S3C24X0_MEMCTL * S3C24X0_GetBase_MEMCTL(void)
517 {
518@@ -142,6 +150,7 @@
519 return (S3C2410_SDI * const)S3C2410_SDI_BASE;
520 }
521
522+#endif
523
524 /* ISR */
525 #define pISR_RESET (*(unsigned *)(_ISR_STARTADDRESS+0x0))
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-norelocate_irqvec_cpy.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-norelocate_irqvec_cpy.patch
new file mode 100644
index 0000000000..0d5a49771d
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-norelocate_irqvec_cpy.patch
@@ -0,0 +1,32 @@
1If we've somehow magically make u-boot end up in RAM (JTAG, ...), then that RAM
2is mapped to 0x30000000 and not 0, so we need to copy the interrupt vectors, etc.
3
4Index: u-boot/cpu/arm920t/start.S
5===================================================================
6--- u-boot.orig/cpu/arm920t/start.S
7+++ u-boot/cpu/arm920t/start.S
8@@ -332,7 +332,23 @@ done_nand_read:
9 strb r1, [r0]
10 #endif /* CONFIG_S3C2410_NAND_BOOT */
11 done_relocate:
12-#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
13+
14+#if defined(CONFIG_USE_IRQ) && defined(CONFIG_S3C2410)
15+ /* In the case of the S3C2410, if we've somehow magically (JTAG, ...)
16+ ended up in RAM, then that ram is mapped to 0x30000000 and not 0.
17+ So we need to copy the interrupt vectors, etc. */
18+
19+ mov r0, #0
20+ ldr r1, _TEXT_BASE
21+ mov r2, #0x40
22+irqvec_cpy_next:
23+ ldr r3, [r1], #4
24+ str r3, [r0], #4
25+ subs r2, r2, #4
26+ bne irqvec_cpy_next
27+#endif /* CONFIG_USE_IRQ */
28+
29+#endif /* !CONFIG_SKIP_RELOCATE_UBOOT */
30
31 /* Set up the stack */
32 stack_setup:
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-warnings-fix.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-warnings-fix.patch
new file mode 100644
index 0000000000..8cc442a865
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410-warnings-fix.patch
@@ -0,0 +1,98 @@
1Index: u-boot/include/s3c2410.h
2===================================================================
3--- u-boot.orig/include/s3c2410.h 2007-02-16 23:53:20.000000000 +0100
4+++ u-boot/include/s3c2410.h 2007-02-16 23:53:21.000000000 +0100
5@@ -69,75 +69,75 @@
6 #include <s3c24x0.h>
7
8
9-static inline S3C24X0_MEMCTL * const S3C24X0_GetBase_MEMCTL(void)
10+static inline S3C24X0_MEMCTL * S3C24X0_GetBase_MEMCTL(void)
11 {
12 return (S3C24X0_MEMCTL * const)S3C24X0_MEMCTL_BASE;
13 }
14-static inline S3C24X0_USB_HOST * const S3C24X0_GetBase_USB_HOST(void)
15+static inline S3C24X0_USB_HOST * S3C24X0_GetBase_USB_HOST(void)
16 {
17 return (S3C24X0_USB_HOST * const)S3C24X0_USB_HOST_BASE;
18 }
19-static inline S3C24X0_INTERRUPT * const S3C24X0_GetBase_INTERRUPT(void)
20+static inline S3C24X0_INTERRUPT * S3C24X0_GetBase_INTERRUPT(void)
21 {
22 return (S3C24X0_INTERRUPT * const)S3C24X0_INTERRUPT_BASE;
23 }
24-static inline S3C24X0_DMAS * const S3C24X0_GetBase_DMAS(void)
25+static inline S3C24X0_DMAS * S3C24X0_GetBase_DMAS(void)
26 {
27 return (S3C24X0_DMAS * const)S3C24X0_DMA_BASE;
28 }
29-static inline S3C24X0_CLOCK_POWER * const S3C24X0_GetBase_CLOCK_POWER(void)
30+static inline S3C24X0_CLOCK_POWER * S3C24X0_GetBase_CLOCK_POWER(void)
31 {
32 return (S3C24X0_CLOCK_POWER * const)S3C24X0_CLOCK_POWER_BASE;
33 }
34-static inline S3C24X0_LCD * const S3C24X0_GetBase_LCD(void)
35+static inline S3C24X0_LCD * S3C24X0_GetBase_LCD(void)
36 {
37 return (S3C24X0_LCD * const)S3C24X0_LCD_BASE;
38 }
39-static inline S3C2410_NAND * const S3C2410_GetBase_NAND(void)
40+static inline S3C2410_NAND * S3C2410_GetBase_NAND(void)
41 {
42 return (S3C2410_NAND * const)S3C2410_NAND_BASE;
43 }
44-static inline S3C24X0_UART * const S3C24X0_GetBase_UART(S3C24X0_UARTS_NR nr)
45+static inline S3C24X0_UART * S3C24X0_GetBase_UART(S3C24X0_UARTS_NR nr)
46 {
47 return (S3C24X0_UART * const)(S3C24X0_UART_BASE + (nr * 0x4000));
48 }
49-static inline S3C24X0_TIMERS * const S3C24X0_GetBase_TIMERS(void)
50+static inline S3C24X0_TIMERS * S3C24X0_GetBase_TIMERS(void)
51 {
52 return (S3C24X0_TIMERS * const)S3C24X0_TIMER_BASE;
53 }
54-static inline S3C24X0_USB_DEVICE * const S3C24X0_GetBase_USB_DEVICE(void)
55+static inline S3C24X0_USB_DEVICE * S3C24X0_GetBase_USB_DEVICE(void)
56 {
57 return (S3C24X0_USB_DEVICE * const)S3C24X0_USB_DEVICE_BASE;
58 }
59-static inline S3C24X0_WATCHDOG * const S3C24X0_GetBase_WATCHDOG(void)
60+static inline S3C24X0_WATCHDOG * S3C24X0_GetBase_WATCHDOG(void)
61 {
62 return (S3C24X0_WATCHDOG * const)S3C24X0_WATCHDOG_BASE;
63 }
64-static inline S3C24X0_I2C * const S3C24X0_GetBase_I2C(void)
65+static inline S3C24X0_I2C * S3C24X0_GetBase_I2C(void)
66 {
67 return (S3C24X0_I2C * const)S3C24X0_I2C_BASE;
68 }
69-static inline S3C24X0_I2S * const S3C24X0_GetBase_I2S(void)
70+static inline S3C24X0_I2S * S3C24X0_GetBase_I2S(void)
71 {
72 return (S3C24X0_I2S * const)S3C24X0_I2S_BASE;
73 }
74-static inline S3C24X0_GPIO * const S3C24X0_GetBase_GPIO(void)
75+static inline S3C24X0_GPIO * S3C24X0_GetBase_GPIO(void)
76 {
77 return (S3C24X0_GPIO * const)S3C24X0_GPIO_BASE;
78 }
79-static inline S3C24X0_RTC * const S3C24X0_GetBase_RTC(void)
80+static inline S3C24X0_RTC * S3C24X0_GetBase_RTC(void)
81 {
82 return (S3C24X0_RTC * const)S3C24X0_RTC_BASE;
83 }
84-static inline S3C2410_ADC * const S3C2410_GetBase_ADC(void)
85+static inline S3C2410_ADC * S3C2410_GetBase_ADC(void)
86 {
87 return (S3C2410_ADC * const)S3C2410_ADC_BASE;
88 }
89-static inline S3C24X0_SPI * const S3C24X0_GetBase_SPI(void)
90+static inline S3C24X0_SPI * S3C24X0_GetBase_SPI(void)
91 {
92 return (S3C24X0_SPI * const)S3C24X0_SPI_BASE;
93 }
94-static inline S3C2410_SDI * const S3C2410_GetBase_SDI(void)
95+static inline S3C2410_SDI * S3C2410_GetBase_SDI(void)
96 {
97 return (S3C2410_SDI * const)S3C2410_SDI_BASE;
98 }
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410_fb.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410_fb.patch
new file mode 100644
index 0000000000..b50853554b
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410_fb.patch
@@ -0,0 +1,215 @@
1Index: u-boot/drivers/Makefile
2===================================================================
3--- u-boot.orig/drivers/Makefile
4+++ u-boot/drivers/Makefile
5@@ -52,7 +52,7 @@
6 ks8695eth.o \
7 pxa_pcmcia.o mpc8xx_pcmcia.o tqm8xx_pcmcia.o \
8 rpx_pcmcia.o \
9- fsl_i2c.o
10+ fsl_i2c.o s3c2410_fb.o
11
12 SRCS := $(COBJS:.o=.c)
13 OBJS := $(addprefix $(obj),$(COBJS))
14Index: u-boot/drivers/s3c2410_fb.c
15===================================================================
16--- /dev/null
17+++ u-boot/drivers/s3c2410_fb.c
18@@ -0,0 +1,166 @@
19+/*
20+ * (C) Copyright 2006 by OpenMoko, Inc.
21+ * Author: Harald Welte <laforge@openmoko.org>
22+ *
23+ * This program is free software; you can redistribute it and/or
24+ * modify it under the terms of the GNU General Public License as
25+ * published by the Free Software Foundation; either version 2 of
26+ * the License, or (at your option) any later version.
27+ *
28+ * This program is distributed in the hope that it will be useful,
29+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
30+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
31+ * GNU General Public License for more details.
32+ *
33+ * You should have received a copy of the GNU General Public License
34+ * along with this program; if not, write to the Free Software
35+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
36+ * MA 02111-1307 USA
37+ */
38+
39+#include <common.h>
40+
41+#if defined(CONFIG_VIDEO_S3C2410)
42+
43+#include <video_fb.h>
44+#include "videomodes.h"
45+#include <s3c2410.h>
46+/*
47+ * Export Graphic Device
48+ */
49+GraphicDevice smi;
50+
51+#define VIDEO_MEM_SIZE 0x200000 /* 480x640x16bit = 614400 bytes */
52+
53+extern void board_video_init(GraphicDevice *pGD);
54+
55+/*******************************************************************************
56+ *
57+ * Init video chip with common Linux graphic modes (lilo)
58+ */
59+void *video_hw_init (void)
60+{
61+ S3C24X0_LCD * const lcd = S3C24X0_GetBase_LCD();
62+ GraphicDevice *pGD = (GraphicDevice *)&smi;
63+ int videomode;
64+ unsigned long t1, hsynch, vsynch;
65+ char *penv;
66+ int tmp, i, bits_per_pixel;
67+ struct ctfb_res_modes *res_mode;
68+ struct ctfb_res_modes var_mode;
69+ unsigned char videoout;
70+
71+ /* Search for video chip */
72+ printf("Video: ");
73+
74+ tmp = 0;
75+
76+ videomode = CFG_DEFAULT_VIDEO_MODE;
77+ /* get video mode via environment */
78+ if ((penv = getenv ("videomode")) != NULL) {
79+ /* deceide if it is a string */
80+ if (penv[0] <= '9') {
81+ videomode = (int) simple_strtoul (penv, NULL, 16);
82+ tmp = 1;
83+ }
84+ } else {
85+ tmp = 1;
86+ }
87+ if (tmp) {
88+ /* parameter are vesa modes */
89+ /* search params */
90+ for (i = 0; i < VESA_MODES_COUNT; i++) {
91+ if (vesa_modes[i].vesanr == videomode)
92+ break;
93+ }
94+ if (i == VESA_MODES_COUNT) {
95+ printf ("no VESA Mode found, switching to mode 0x%x ", CFG_DEFAULT_VIDEO_MODE);
96+ i = 0;
97+ }
98+ res_mode =
99+ (struct ctfb_res_modes *) &res_mode_init[vesa_modes[i].
100+ resindex];
101+ bits_per_pixel = vesa_modes[i].bits_per_pixel;
102+ } else {
103+
104+ res_mode = (struct ctfb_res_modes *) &var_mode;
105+ bits_per_pixel = video_get_params (res_mode, penv);
106+ }
107+
108+ /* calculate hsynch and vsynch freq (info only) */
109+ t1 = (res_mode->left_margin + res_mode->xres +
110+ res_mode->right_margin + res_mode->hsync_len) / 8;
111+ t1 *= 8;
112+ t1 *= res_mode->pixclock;
113+ t1 /= 1000;
114+ hsynch = 1000000000L / t1;
115+ t1 *=
116+ (res_mode->upper_margin + res_mode->yres +
117+ res_mode->lower_margin + res_mode->vsync_len);
118+ t1 /= 1000;
119+ vsynch = 1000000000L / t1;
120+
121+ /* fill in Graphic device struct */
122+ sprintf (pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz", res_mode->xres,
123+ res_mode->yres, bits_per_pixel, (hsynch / 1000),
124+ (vsynch / 1000));
125+ printf ("%s\n", pGD->modeIdent);
126+ pGD->winSizeX = res_mode->xres;
127+ pGD->winSizeY = res_mode->yres;
128+ pGD->plnSizeX = res_mode->xres;
129+ pGD->plnSizeY = res_mode->yres;
130+ switch (bits_per_pixel) {
131+ case 8:
132+ pGD->gdfBytesPP = 1;
133+ pGD->gdfIndex = GDF__8BIT_INDEX;
134+ break;
135+ case 15:
136+ pGD->gdfBytesPP = 2;
137+ pGD->gdfIndex = GDF_15BIT_555RGB;
138+ break;
139+ case 16:
140+ pGD->gdfBytesPP = 2;
141+ pGD->gdfIndex = GDF_16BIT_565RGB;
142+ break;
143+ case 24:
144+ pGD->gdfBytesPP = 3;
145+ pGD->gdfIndex = GDF_24BIT_888RGB;
146+ break;
147+ }
148+
149+ /* statically configure settings */
150+ pGD->winSizeX = pGD->plnSizeX = 480;
151+ pGD->winSizeY = pGD->plnSizeY = 640;
152+ pGD->gdfBytesPP = 2;
153+ pGD->gdfIndex = GDF_16BIT_565RGB;
154+
155+ pGD->frameAdrs = LCD_VIDEO_ADDR;
156+ pGD->memSize = VIDEO_MEM_SIZE;
157+
158+ board_video_init(pGD);
159+
160+ lcd->LCDSADDR1 = pGD->frameAdrs >> 1;
161+
162+ /* This marks the end of the frame buffer. */
163+ lcd->LCDSADDR2 = (lcd->LCDSADDR1&0x1fffff) + (pGD->winSizeX+0) * pGD->winSizeY;
164+ lcd->LCDSADDR3 = pGD->winSizeX;
165+
166+ /* Clear video memory */
167+ memset(pGD->frameAdrs, 0, pGD->memSize);
168+
169+ /* Enable Display */
170+ lcd->LCDCON1 |= 0x01; /* ENVID = 1 */
171+
172+ return ((void*)&smi);
173+}
174+
175+void
176+video_set_lut (unsigned int index, /* color number */
177+ unsigned char r, /* red */
178+ unsigned char g, /* green */
179+ unsigned char b /* blue */
180+ )
181+{
182+}
183+
184+#endif /* CONFIG_VIDEO_S3C2410 */
185Index: u-boot/drivers/cfb_console.c
186===================================================================
187--- u-boot.orig/drivers/cfb_console.c
188+++ u-boot/drivers/cfb_console.c
189@@ -141,6 +141,14 @@
190 #endif
191
192 /*****************************************************************************/
193+/* Defines for the S3C2410 driver */
194+/*****************************************************************************/
195+#ifdef CONFIG_VIDEO_S3C2410
196+/* it actually is little-endian, but the host CPU, too ! */
197+//#define VIDEO_FB_LITTLE_ENDIAN
198+#endif
199+
200+/*****************************************************************************/
201 /* Include video_fb.h after definitions of VIDEO_HW_RECTFILL etc */
202 /*****************************************************************************/
203 #include <video_fb.h>
204@@ -307,6 +315,11 @@
205 #define SHORTSWAP32(x) (x)
206 #endif
207
208+#ifdef CONFIG_VIDEO_S3C2410
209+#undef SHORTSWAP32
210+#define SHORTSWAP32(x) ((((x) & 0xffff) << 16) | (((x) >> 16) & 0xffff))
211+#endif
212+
213 #if defined(DEBUG) || defined(DEBUG_CFB_CONSOLE)
214 #define PRINTD(x) printf(x)
215 #else
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410_udc.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410_udc.patch
new file mode 100644
index 0000000000..16bee3e26a
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2410_udc.patch
@@ -0,0 +1,1263 @@
1USB Device Controller Driver for Samsung S3C2410 SoC
2
3Index: u-boot/drivers/Makefile
4===================================================================
5--- u-boot.orig/drivers/Makefile
6+++ u-boot/drivers/Makefile
7@@ -47,7 +47,7 @@
8 status_led.o sym53c8xx.o systemace.o ahci.o \
9 ti_pci1410a.o tigon3.o tsec.o \
10 tsi108_eth.o tsi108_i2c.o tsi108_pci.o \
11- usbdcore.o usbdcore_ep0.o usbdcore_omap1510.o usbtty.o \
12+ usbdcore.o usbdcore_ep0.o usbdcore_omap1510.o usbdcore_s3c2410.o usbtty.o \
13 videomodes.o w83c553f.o \
14 ks8695eth.o \
15 pcf50606.o \
16Index: u-boot/drivers/usbdcore_s3c2410.c
17===================================================================
18--- /dev/null
19+++ u-boot/drivers/usbdcore_s3c2410.c
20@@ -0,0 +1,730 @@
21+/* S3C2410 USB Device Controller Driver for u-boot
22+ *
23+ * (C) Copyright 2007 by OpenMoko, Inc.
24+ * Author: Harald Welte <laforge@openmoko.org>
25+ *
26+ * based on Linux' s3c2410_udc.c, which is
27+ * Copyright (C) 2004-2006 Herbert Pötzl - Arnaud Patard
28+ *
29+ * This program is free software; you can redistribute it and/or modify
30+ * it under the terms of the GNU General Public License as published by
31+ * the Free Software Foundation; either version 2 of the License, or
32+ * (at your option) any later version.
33+ *
34+ * This program is distributed in the hope that it will be useful,
35+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
36+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
37+ * GNU General Public License for more details.
38+ *
39+ * You should have received a copy of the GNU General Public License
40+ * along with this program; if not, write to the Free Software
41+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
42+ *
43+ */
44+
45+#include <config.h>
46+
47+#if defined(CONFIG_S3C2410) && defined(CONFIG_USB_DEVICE)
48+
49+#include <common.h>
50+
51+/* we can't use the regular debug macros since the console might be
52+ * set to usbtty, which would cause deadlocks! */
53+#ifdef DEBUG
54+#undef debug
55+#undef debugX
56+#define debug(fmt,args...) serial_printf (fmt ,##args)
57+#define debugX(level,fmt,args...) if (DEBUG>=level) serial_printf(fmt,##args)
58+#endif
59+
60+DECLARE_GLOBAL_DATA_PTR;
61+
62+#include <asm/io.h>
63+#include <s3c2410.h>
64+
65+#include "usbdcore.h"
66+#include "usbdcore_s3c2410.h"
67+#include "usbdcore_ep0.h"
68+#include <usb_cdc_acm.h>
69+
70+enum ep0_state {
71+ EP0_IDLE,
72+ EP0_IN_DATA_PHASE,
73+ EP0_OUT_DATA_PHASE,
74+ EP0_END_XFER,
75+ EP0_STALL,
76+};
77+
78+static struct urb *ep0_urb = NULL;
79+
80+static struct usb_device_instance *udc_device; /* Used in interrupt handler */
81+
82+static inline int fifo_count_out(void)
83+{
84+ int tmp;
85+
86+ tmp = inl(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
87+ tmp |= inl(S3C2410_UDC_OUT_FIFO_CNT1_REG);
88+
89+ return tmp & 0xffff;
90+}
91+
92+static const unsigned long ep_fifo_reg[S3C2410_UDC_NUM_ENDPOINTS] = {
93+ S3C2410_UDC_EP0_FIFO_REG,
94+ S3C2410_UDC_EP1_FIFO_REG,
95+ S3C2410_UDC_EP2_FIFO_REG,
96+ S3C2410_UDC_EP3_FIFO_REG,
97+ S3C2410_UDC_EP4_FIFO_REG,
98+};
99+
100+static int s3c2410_write_noniso_tx_fifo(struct usb_endpoint_instance *endpoint)
101+{
102+ struct urb *urb = endpoint->tx_urb;
103+ unsigned int last, i;
104+ unsigned int ep = endpoint->endpoint_address & 0x7f;
105+ unsigned long fifo_reg = ep_fifo_reg[ep];
106+
107+ /* WARNING: don't ever put serial debug printf's in non-error codepaths
108+ * here, it is called from the time critical EP0 codepath ! */
109+
110+ if (!urb || ep >= S3C2410_UDC_NUM_ENDPOINTS) {
111+ serial_printf("no urb or wrong endpoint\n");
112+ return -1;
113+ }
114+
115+ S3C2410_UDC_SETIX(ep);
116+ if ((last = MIN(urb->actual_length - endpoint->sent,
117+ endpoint->tx_packetSize))) {
118+ u8 *cp = urb->buffer + endpoint->sent;
119+
120+ for (i = 0; i < last; i++)
121+ outb(*(cp+i), fifo_reg);
122+ }
123+ endpoint->last = last;
124+
125+ if (endpoint->sent + last < urb->actual_length) {
126+ /* not all data has been transmitted so far */
127+ return 0;
128+ }
129+
130+ if (last == endpoint->tx_packetSize) {
131+ /* we need to send one more packet (ZLP) */
132+ return 0;
133+ }
134+
135+ return 1;
136+}
137+
138+
139+static void s3c2410_deconfigure_device (void)
140+{
141+ /* FIXME: Implement this */
142+}
143+
144+static void s3c2410_configure_device (struct usb_device_instance *device)
145+{
146+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
147+ S3C24X0_CLOCK_POWER * const cpower = S3C24X0_GetBase_CLOCK_POWER();
148+
149+ /* disable EP0-4 SUBD interrupts ? */
150+ outl(0x00, S3C2410_UDC_USB_INT_EN_REG);
151+
152+ /* UPLL already configured by board-level init code */
153+
154+ /* configure USB pads to device mode */
155+ gpio->MISCCR &= ~(S3C2410_MISCCR_USBHOST|S3C2410_MISCCR_USBSUSPND1);
156+
157+ /* don't disable USB clock */
158+ cpower->CLKSLOW &= ~S3C2410_CLKSLOW_UCLK_OFF;
159+
160+ /* clear interrupt registers */
161+ inl(S3C2410_UDC_EP_INT_REG);
162+ inl(S3C2410_UDC_USB_INT_REG);
163+ outl(0xff, S3C2410_UDC_EP_INT_REG);
164+ outl(0xff, S3C2410_UDC_USB_INT_REG);
165+
166+ /* enable USB interrupts for RESET and SUSPEND/RESUME */
167+ outl(S3C2410_UDC_USBINT_RESET|S3C2410_UDC_USBINT_SUSPEND,
168+ S3C2410_UDC_USB_INT_EN_REG);
169+}
170+
171+static void udc_set_address(unsigned char address)
172+{
173+ address |= 0x80; /* ADDR_UPDATE bit */
174+ outl(address, S3C2410_UDC_FUNC_ADDR_REG);
175+}
176+
177+extern struct usb_device_descriptor device_descriptor;
178+
179+static void s3c2410_udc_ep0(void)
180+{
181+ u_int8_t ep0csr;
182+ struct usb_endpoint_instance *ep0 = udc_device->bus->endpoint_array;
183+
184+ S3C2410_UDC_SETIX(0);
185+ ep0csr = inl(S3C2410_UDC_IN_CSR1_REG);
186+
187+ /* clear stall status */
188+ if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
189+ serial_printf("Clearing SENT_STALL\n");
190+ clear_ep0_sst();
191+ if (ep0csr & S3C2410_UDC_EP0_CSR_SOPKTRDY)
192+ clear_ep0_opr();
193+ ep0->state = EP0_IDLE;
194+ return;
195+ }
196+
197+ /* clear setup end */
198+ if (ep0csr & S3C2410_UDC_EP0_CSR_SE
199+ /* && ep0->state != EP0_IDLE */) {
200+ serial_printf("Clearing SETUP_END\n");
201+ clear_ep0_se();
202+#if 1
203+ if (ep0csr & S3C2410_UDC_EP0_CSR_SOPKTRDY) {
204+ /* Flush FIFO */
205+ while (inl(S3C2410_UDC_OUT_FIFO_CNT1_REG))
206+ inl(S3C2410_UDC_EP0_FIFO_REG);
207+ clear_ep0_opr();
208+ }
209+#endif
210+ ep0->state = EP0_IDLE;
211+ return;
212+ }
213+
214+ /* Don't ever put [serial] debugging in non-error codepaths here, it
215+ * will violate the tight timing constraints of this USB Device
216+ * controller (and lead to bus enumeration failures) */
217+
218+ switch (ep0->state) {
219+ int i, fifo_count;
220+ unsigned char *datap;
221+ case EP0_IDLE:
222+ if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
223+ break;
224+
225+ datap = (unsigned char *) &ep0_urb->device_request;
226+ /* host->device packet has been received */
227+
228+ /* pull it out of the fifo */
229+ fifo_count = fifo_count_out();
230+ for (i = 0; i < fifo_count; i++) {
231+ *datap = (unsigned char)inl(S3C2410_UDC_EP0_FIFO_REG);
232+ datap++;
233+ }
234+ if (fifo_count != 8) {
235+ debug("STRANGE FIFO COUNT: %u bytes\n", fifo_count);
236+ set_ep0_ss();
237+ return;
238+ }
239+
240+ if (ep0_urb->device_request.wLength == 0) {
241+ if (ep0_recv_setup(ep0_urb)) {
242+ /* Not a setup packet, stall next EP0 transaction */
243+ debug("can't parse setup packet1\n");
244+ set_ep0_ss();
245+ set_ep0_de_out();
246+ ep0->state = EP0_IDLE;
247+ return;
248+ }
249+ /* There are some requests with which we need to deal
250+ * manually here */
251+ switch (ep0_urb->device_request.bRequest) {
252+ case USB_REQ_SET_CONFIGURATION:
253+ if (!ep0_urb->device_request.wValue)
254+ usbd_device_event_irq(udc_device,
255+ DEVICE_DE_CONFIGURED, 0);
256+ else
257+ usbd_device_event_irq(udc_device,
258+ DEVICE_CONFIGURED, 0);
259+ break;
260+ case USB_REQ_SET_ADDRESS:
261+ udc_set_address(udc_device->address);
262+ usbd_device_event_irq(udc_device,
263+ DEVICE_ADDRESS_ASSIGNED, 0);
264+ break;
265+ default:
266+ break;
267+ }
268+ set_ep0_de_out();
269+ ep0->state = EP0_IDLE;
270+ } else {
271+ if ((ep0_urb->device_request.bmRequestType & USB_REQ_DIRECTION_MASK)
272+ == USB_REQ_HOST2DEVICE) {
273+ clear_ep0_opr();
274+ ep0->state = EP0_OUT_DATA_PHASE;
275+ ep0_urb->buffer = ep0_urb->buffer_data;
276+ ep0_urb->buffer_length = sizeof(ep0_urb->buffer_data);
277+ ep0_urb->actual_length = 0;
278+ } else {
279+ ep0->state = EP0_IN_DATA_PHASE;
280+
281+ if (ep0_recv_setup(ep0_urb)) {
282+ /* Not a setup packet, stall next EP0 transaction */
283+ debug("can't parse setup packet2\n");
284+ set_ep0_ss();
285+ //set_ep0_de_out();
286+ ep0->state = EP0_IDLE;
287+ return;
288+ }
289+ clear_ep0_opr();
290+ ep0->tx_urb = ep0_urb;
291+ ep0->sent = ep0->last = 0;
292+
293+ if (s3c2410_write_noniso_tx_fifo(ep0)) {
294+ ep0->state = EP0_IDLE;
295+ set_ep0_de_in();
296+ } else
297+ set_ep0_ipr();
298+ }
299+ }
300+ break;
301+ case EP0_IN_DATA_PHASE:
302+ if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY)) {
303+ ep0->sent += ep0->last;
304+
305+ if (s3c2410_write_noniso_tx_fifo(ep0)) {
306+ ep0->state = EP0_IDLE;
307+ set_ep0_de_in();
308+ } else
309+ set_ep0_ipr();
310+ }
311+ break;
312+ case EP0_OUT_DATA_PHASE:
313+ if (ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) {
314+ u32 urb_avail = ep0_urb->buffer_length - ep0_urb->actual_length;
315+ u_int8_t *cp = ep0_urb->buffer + ep0_urb->actual_length;
316+ int i, fifo_count;
317+
318+ fifo_count = fifo_count_out();
319+ if (fifo_count < urb_avail)
320+ urb_avail = fifo_count;
321+
322+ for (i = 0; i < urb_avail; i++)
323+ *cp++ = inl(S3C2410_UDC_EP0_FIFO_REG);
324+
325+ ep0_urb->actual_length += urb_avail;
326+
327+ if (fifo_count < ep0->rcv_packetSize ||
328+ ep0_urb->actual_length >= ep0_urb->device_request.wLength) {
329+ ep0->state = EP0_IDLE;
330+ if (ep0_recv_setup(ep0_urb)) {
331+ /* Not a setup packet, stall next EP0 transaction */
332+ debug("can't parse setup packet3\n");
333+ set_ep0_ss();
334+ //set_ep0_de_out();
335+ return;
336+ }
337+ set_ep0_de_out();
338+ } else
339+ clear_ep0_opr();
340+ }
341+ break;
342+ case EP0_END_XFER:
343+ ep0->state = EP0_IDLE;
344+ break;
345+ case EP0_STALL:
346+ //set_ep0_ss;
347+ ep0->state = EP0_IDLE;
348+ break;
349+ }
350+}
351+
352+
353+static void s3c2410_udc_epn(int ep)
354+{
355+ struct usb_endpoint_instance *endpoint;
356+ struct urb *urb;
357+ u32 ep_csr1;
358+
359+ if (ep >= S3C2410_UDC_NUM_ENDPOINTS)
360+ return;
361+
362+ endpoint = &udc_device->bus->endpoint_array[ep];
363+
364+ S3C2410_UDC_SETIX(ep);
365+
366+ if (endpoint->endpoint_address & USB_DIR_IN) {
367+ /* IN transfer (device to host) */
368+ ep_csr1 = inl(S3C2410_UDC_IN_CSR1_REG);
369+ debug("for ep=%u, CSR1=0x%x ", ep, ep_csr1);
370+
371+ urb = endpoint->tx_urb;
372+ if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
373+ /* Stall handshake */
374+ debug("stall\n");
375+ outl(0x00, S3C2410_UDC_IN_CSR1_REG);
376+ return;
377+ }
378+ if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && urb &&
379+ urb->actual_length) {
380+
381+ debug("completing previously send data ");
382+ usbd_tx_complete(endpoint);
383+
384+ /* push pending data into FIFO */
385+ if ((endpoint->last == endpoint->tx_packetSize) &&
386+ (urb->actual_length - endpoint->sent - endpoint->last == 0)) {
387+ endpoint->sent += endpoint->last;
388+ /* Write 0 bytes of data (ZLP) */
389+ debug("ZLP ");
390+ outl(ep_csr1|S3C2410_UDC_ICSR1_PKTRDY, S3C2410_UDC_IN_CSR1_REG);
391+ } else {
392+ /* write actual data to fifo */
393+ debug("TX_DATA ");
394+ s3c2410_write_noniso_tx_fifo(endpoint);
395+ outl(ep_csr1|S3C2410_UDC_ICSR1_PKTRDY, S3C2410_UDC_IN_CSR1_REG);
396+ }
397+ }
398+ debug("\n");
399+ } else {
400+ /* OUT transfer (host to device) */
401+ ep_csr1 = inl(S3C2410_UDC_OUT_CSR1_REG);
402+ debug("for ep=%u, CSR1=0x%x ", ep, ep_csr1);
403+
404+ urb = endpoint->rcv_urb;
405+ if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
406+ /* Stall handshake */
407+ outl(0x00, S3C2410_UDC_IN_CSR1_REG);
408+ return;
409+ }
410+ if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && urb) {
411+ /* Read pending data from fifo */
412+ u32 fifo_count = fifo_count_out();
413+ int is_last = 0;
414+ u32 i, urb_avail = urb->buffer_length - urb->actual_length;
415+ u8 *cp = urb->buffer + urb->actual_length;
416+
417+ if (fifo_count < endpoint->rcv_packetSize)
418+ is_last = 1;
419+
420+ debug("fifo_count=%u is_last=%, urb_avail=%u)\n",
421+ fifo_count, is_last, urb_avail);
422+
423+ if (fifo_count < urb_avail)
424+ urb_avail = fifo_count;
425+
426+ for (i = 0; i < urb_avail; i++)
427+ *cp++ = inb(ep_fifo_reg[ep]);
428+
429+ if (is_last)
430+ outl(ep_csr1 & ~S3C2410_UDC_OCSR1_PKTRDY,
431+ S3C2410_UDC_OUT_CSR1_REG);
432+
433+ usbd_rcv_complete(endpoint, urb_avail, 0);
434+ }
435+ }
436+
437+ urb = endpoint->rcv_urb;
438+}
439+
440+/*
441+-------------------------------------------------------------------------------
442+*/
443+
444+/* this is just an empty wrapper for usbtty who assumes polling operation */
445+void udc_irq(void)
446+{
447+}
448+
449+/* Handle general USB interrupts and dispatch according to type.
450+ * This function implements TRM Figure 14-13.
451+ */
452+void s3c2410_udc_irq(void)
453+{
454+ struct usb_endpoint_instance *ep0 = udc_device->bus->endpoint_array;
455+ u_int32_t save_idx = inl(S3C2410_UDC_INDEX_REG);
456+
457+ /* read interrupt sources */
458+ u_int32_t usb_status = inl(S3C2410_UDC_USB_INT_REG);
459+ u_int32_t usbd_status = inl(S3C2410_UDC_EP_INT_REG);
460+
461+ //debug("< IRQ usbs=0x%02x, usbds=0x%02x start >", usb_status, usbd_status);
462+
463+ /* clear interrupts */
464+ outl(usb_status, S3C2410_UDC_USB_INT_REG);
465+
466+ if (usb_status & S3C2410_UDC_USBINT_RESET) {
467+ //serial_putc('R');
468+ debug("RESET pwr=0x%x\n", inl(S3C2410_UDC_PWR_REG));
469+ udc_setup_ep(udc_device, 0, ep0);
470+ outl(S3C2410_UDC_EP0_CSR_SSE|S3C2410_UDC_EP0_CSR_SOPKTRDY, S3C2410_UDC_EP0_CSR_REG);
471+ ep0->state = EP0_IDLE;
472+ usbd_device_event_irq (udc_device, DEVICE_RESET, 0);
473+ }
474+
475+ if (usb_status & S3C2410_UDC_USBINT_RESUME) {
476+ debug("RESUME\n");
477+ usbd_device_event_irq(udc_device, DEVICE_BUS_ACTIVITY, 0);
478+ }
479+
480+ if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
481+ debug("SUSPEND\n");
482+ usbd_device_event_irq(udc_device, DEVICE_BUS_INACTIVE, 0);
483+ }
484+
485+ /* Endpoint Interrupts */
486+ if (usbd_status) {
487+ int i;
488+
489+ if (usbd_status & S3C2410_UDC_INT_EP0) {
490+ outl(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
491+ s3c2410_udc_ep0();
492+ }
493+
494+ for (i = 1; i < 5; i++) {
495+ u_int32_t tmp = 1 << i;
496+
497+ if (usbd_status & tmp) {
498+ /* FIXME: Handle EP X */
499+ outl(tmp, S3C2410_UDC_EP_INT_REG);
500+ s3c2410_udc_epn(i);
501+ }
502+ }
503+ }
504+ S3C2410_UDC_SETIX(save_idx);
505+}
506+
507+/*
508+-------------------------------------------------------------------------------
509+*/
510+
511+
512+/*
513+ * Start of public functions.
514+ */
515+
516+/* Called to start packet transmission. */
517+void udc_endpoint_write (struct usb_endpoint_instance *endpoint)
518+{
519+ unsigned short epnum =
520+ endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
521+
522+ debug("Entering for ep %x ", epnum);
523+
524+ if (endpoint->tx_urb) {
525+ u32 ep_csr1;
526+ debug("We have an URB, transmitting\n");
527+
528+ s3c2410_write_noniso_tx_fifo(endpoint);
529+
530+ S3C2410_UDC_SETIX(epnum);
531+
532+ ep_csr1 = inl(S3C2410_UDC_IN_CSR1_REG);
533+ outl(ep_csr1|S3C2410_UDC_ICSR1_PKTRDY, S3C2410_UDC_IN_CSR1_REG);
534+ } else
535+ debug("\n");
536+}
537+
538+/* Start to initialize h/w stuff */
539+int udc_init (void)
540+{
541+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
542+ S3C24X0_INTERRUPT * irq = S3C24X0_GetBase_INTERRUPT();
543+
544+ udc_device = NULL;
545+
546+ /* Set and check clock control.
547+ * We might ought to be using the clock control API to do
548+ * this instead of fiddling with the clock registers directly
549+ * here.
550+ */
551+ clk_power->CLKCON |= (1 << 7);
552+
553+ /* Print banner with device revision */
554+ printf("USB: S3C2410 USB Deviced\n");
555+
556+ /*
557+ * At this point, device is ready for configuration...
558+ */
559+ outl(0x00, S3C2410_UDC_EP_INT_EN_REG);
560+ outl(0x00, S3C2410_UDC_USB_INT_EN_REG);
561+
562+ irq->INTMSK &= ~BIT_USBD;
563+
564+ return 0;
565+}
566+
567+/*
568+ * udc_setup_ep - setup endpoint
569+ *
570+ * Associate a physical endpoint with endpoint_instance
571+ */
572+int udc_setup_ep (struct usb_device_instance *device,
573+ unsigned int ep, struct usb_endpoint_instance *endpoint)
574+{
575+ int ep_addr = endpoint->endpoint_address;
576+ int packet_size;
577+ int attributes;
578+ u_int32_t maxp;
579+
580+ S3C2410_UDC_SETIX(ep);
581+
582+ if (ep) {
583+ if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
584+ /* IN endpoint */
585+ outl(S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT,
586+ S3C2410_UDC_IN_CSR1_REG);
587+ outl(S3C2410_UDC_ICSR2_MODEIN, S3C2410_UDC_IN_CSR2_REG);
588+ packet_size = endpoint->tx_packetSize;
589+ attributes = endpoint->tx_attributes;
590+ } else {
591+ /* OUT endpoint */
592+ outl(S3C2410_UDC_ICSR1_CLRDT, S3C2410_UDC_IN_CSR1_REG);
593+ outl(0, S3C2410_UDC_IN_CSR2_REG);
594+ outl(S3C2410_UDC_OCSR1_FFLUSH|S3C2410_UDC_OCSR1_CLRDT,
595+ S3C2410_UDC_OUT_CSR1_REG);
596+ outl(0, S3C2410_UDC_OUT_CSR2_REG);
597+ packet_size = endpoint->rcv_packetSize;
598+ attributes = endpoint->rcv_attributes;
599+ }
600+ } else
601+ packet_size = endpoint->tx_packetSize;
602+
603+ switch (packet_size) {
604+ case 8:
605+ maxp = S3C2410_UDC_MAXP_8;
606+ break;
607+ case 16:
608+ maxp = S3C2410_UDC_MAXP_16;
609+ break;
610+ case 32:
611+ maxp = S3C2410_UDC_MAXP_32;
612+ break;
613+ case 64:
614+ maxp = S3C2410_UDC_MAXP_64;
615+ break;
616+ default:
617+ debug("invalid packet size %u\n", packet_size);
618+ return -1;
619+ }
620+
621+ debug("setting up endpoint %u addr %x packet_size %u maxp %u\n", ep,
622+ endpoint->endpoint_address, packet_size, maxp);
623+
624+ /* Set maximum packet size */
625+ writel(maxp, S3C2410_UDC_MAXP_REG);
626+
627+ return 0;
628+}
629+
630+/* ************************************************************************** */
631+
632+/**
633+ * udc_connected - is the USB cable connected
634+ *
635+ * Return non-zero if cable is connected.
636+ */
637+#if 0
638+int udc_connected (void)
639+{
640+ return ((inw (UDC_DEVSTAT) & UDC_ATT) == UDC_ATT);
641+}
642+#endif
643+
644+/* Turn on the USB connection by enabling the pullup resistor */
645+void udc_connect (void)
646+{
647+ debug("connect, enable Pullup\n");
648+ S3C24X0_INTERRUPT * irq = S3C24X0_GetBase_INTERRUPT();
649+
650+ udc_ctrl(UDC_CTRL_PULLUP_ENABLE, 0);
651+ udelay(10000);
652+ udc_ctrl(UDC_CTRL_PULLUP_ENABLE, 1);
653+
654+ irq->INTMSK &= ~BIT_USBD;
655+}
656+
657+/* Turn off the USB connection by disabling the pullup resistor */
658+void udc_disconnect (void)
659+{
660+ debug("disconnect, disable Pullup\n");
661+ S3C24X0_INTERRUPT * irq = S3C24X0_GetBase_INTERRUPT();
662+
663+ udc_ctrl(UDC_CTRL_PULLUP_ENABLE, 0);
664+
665+ /* Disable interrupt (we don't want to get interrupts while the kernel
666+ * is relocating itself */
667+ irq->INTMSK |= BIT_USBD;
668+}
669+
670+/* Switch on the UDC */
671+void udc_enable (struct usb_device_instance *device)
672+{
673+ debug("enable device %p, status %d\n", device, device->status);
674+
675+ /* Save the device structure pointer */
676+ udc_device = device;
677+
678+ /* Setup ep0 urb */
679+ if (!ep0_urb)
680+ ep0_urb = usbd_alloc_urb(udc_device,
681+ udc_device->bus->endpoint_array);
682+ else
683+ serial_printf("udc_enable: ep0_urb already allocated %p\n",
684+ ep0_urb);
685+
686+ s3c2410_configure_device(device);
687+}
688+
689+/* Switch off the UDC */
690+void udc_disable (void)
691+{
692+ debug("disable UDC\n");
693+
694+ s3c2410_deconfigure_device();
695+
696+ /* Free ep0 URB */
697+ if (ep0_urb) {
698+ /*usbd_dealloc_urb(ep0_urb); */
699+ ep0_urb = NULL;
700+ }
701+
702+ /* Reset device pointer.
703+ * We ought to do this here to balance the initialization of udc_device
704+ * in udc_enable, but some of our other exported functions get called
705+ * by the bus interface driver after udc_disable, so we have to hang on
706+ * to the device pointer to avoid a null pointer dereference. */
707+ /* udc_device = NULL; */
708+}
709+
710+/**
711+ * udc_startup - allow udc code to do any additional startup
712+ */
713+void udc_startup_events (struct usb_device_instance *device)
714+{
715+ /* The DEVICE_INIT event puts the USB device in the state STATE_INIT. */
716+ usbd_device_event_irq (device, DEVICE_INIT, 0);
717+
718+ /* The DEVICE_CREATE event puts the USB device in the state
719+ * STATE_ATTACHED.
720+ */
721+ usbd_device_event_irq (device, DEVICE_CREATE, 0);
722+
723+ /* Some USB controller driver implementations signal
724+ * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here.
725+ * DEVICE_HUB_CONFIGURED causes a transition to the state STATE_POWERED,
726+ * and DEVICE_RESET causes a transition to the state STATE_DEFAULT.
727+ * The OMAP USB client controller has the capability to detect when the
728+ * USB cable is connected to a powered USB bus via the ATT bit in the
729+ * DEVSTAT register, so we will defer the DEVICE_HUB_CONFIGURED and
730+ * DEVICE_RESET events until later.
731+ */
732+
733+ /* The GTA01 can detect usb device attachment, but we just assume being
734+ * attached for now (go to STATE_POWERED) */
735+ usbd_device_event_irq (device, DEVICE_HUB_CONFIGURED, 0);
736+
737+ udc_enable (device);
738+}
739+
740+void udc_set_nak(int epid)
741+{
742+ /* FIXME: implement this */
743+}
744+
745+void udc_unset_nak(int epid)
746+{
747+ /* FIXME: implement this */
748+}
749+
750+#endif /* CONFIG_S3C2410 && CONFIG_USB_DEVICE */
751Index: u-boot/drivers/usbdcore_s3c2410.h
752===================================================================
753--- /dev/null
754+++ u-boot/drivers/usbdcore_s3c2410.h
755@@ -0,0 +1,273 @@
756+/* linux/include/asm/arch-s3c2410/regs-udc.h
757+ *
758+ * Copyright (C) 2004 Herbert Poetzl <herbert@13thfloor.at>
759+ *
760+ * This include file is free software; you can redistribute it and/or
761+ * modify it under the terms of the GNU General Public License as
762+ * published by the Free Software Foundation; either version 2 of
763+ * the License, or (at your option) any later version.
764+ *
765+ * Changelog:
766+ * 01-08-2004 Initial creation
767+ * 12-09-2004 Cleanup for submission
768+ * 24-10-2004 Fixed S3C2410_UDC_MAXP_REG definition
769+ * 10-03-2005 Changed S3C2410_VA to S3C24XX_VA
770+ * 10-01-2007 Modify for u-boot
771+ */
772+
773+#ifndef __ASM_ARCH_REGS_UDC_H
774+#define __ASM_ARCH_REGS_UDC_H
775+
776+#define S3C2410_UDC_REG_BASE_PHYS 0x52000000
777+#define S3C2410_UDC_NUM_ENDPOINTS 5
778+
779+#define S3C2410_USBDREG(x) (x + S3C2410_UDC_REG_BASE_PHYS)
780+
781+#define S3C2410_UDC_FUNC_ADDR_REG S3C2410_USBDREG(0x0140)
782+#define S3C2410_UDC_PWR_REG S3C2410_USBDREG(0x0144)
783+#define S3C2410_UDC_EP_INT_REG S3C2410_USBDREG(0x0148)
784+
785+#define S3C2410_UDC_USB_INT_REG S3C2410_USBDREG(0x0158)
786+#define S3C2410_UDC_EP_INT_EN_REG S3C2410_USBDREG(0x015c)
787+
788+#define S3C2410_UDC_USB_INT_EN_REG S3C2410_USBDREG(0x016c)
789+
790+#define S3C2410_UDC_FRAME_NUM1_REG S3C2410_USBDREG(0x0170)
791+#define S3C2410_UDC_FRAME_NUM2_REG S3C2410_USBDREG(0x0174)
792+
793+#define S3C2410_UDC_EP0_FIFO_REG S3C2410_USBDREG(0x01c0)
794+#define S3C2410_UDC_EP1_FIFO_REG S3C2410_USBDREG(0x01c4)
795+#define S3C2410_UDC_EP2_FIFO_REG S3C2410_USBDREG(0x01c8)
796+#define S3C2410_UDC_EP3_FIFO_REG S3C2410_USBDREG(0x01cc)
797+#define S3C2410_UDC_EP4_FIFO_REG S3C2410_USBDREG(0x01d0)
798+
799+#define S3C2410_UDC_EP1_DMA_CON S3C2410_USBDREG(0x0200)
800+#define S3C2410_UDC_EP1_DMA_UNIT S3C2410_USBDREG(0x0204)
801+#define S3C2410_UDC_EP1_DMA_FIFO S3C2410_USBDREG(0x0208)
802+#define S3C2410_UDC_EP1_DMA_TTC_L S3C2410_USBDREG(0x020c)
803+#define S3C2410_UDC_EP1_DMA_TTC_M S3C2410_USBDREG(0x0210)
804+#define S3C2410_UDC_EP1_DMA_TTC_H S3C2410_USBDREG(0x0214)
805+
806+#define S3C2410_UDC_EP2_DMA_CON S3C2410_USBDREG(0x0218)
807+#define S3C2410_UDC_EP2_DMA_UNIT S3C2410_USBDREG(0x021c)
808+#define S3C2410_UDC_EP2_DMA_FIFO S3C2410_USBDREG(0x0220)
809+#define S3C2410_UDC_EP2_DMA_TTC_L S3C2410_USBDREG(0x0224)
810+#define S3C2410_UDC_EP2_DMA_TTC_M S3C2410_USBDREG(0x0228)
811+#define S3C2410_UDC_EP2_DMA_TTC_H S3C2410_USBDREG(0x022c)
812+
813+#define S3C2410_UDC_EP3_DMA_CON S3C2410_USBDREG(0x0240)
814+#define S3C2410_UDC_EP3_DMA_UNIT S3C2410_USBDREG(0x0244)
815+#define S3C2410_UDC_EP3_DMA_FIFO S3C2410_USBDREG(0x0248)
816+#define S3C2410_UDC_EP3_DMA_TTC_L S3C2410_USBDREG(0x024c)
817+#define S3C2410_UDC_EP3_DMA_TTC_M S3C2410_USBDREG(0x0250)
818+#define S3C2410_UDC_EP3_DMA_TTC_H S3C2410_USBDREG(0x0254)
819+
820+#define S3C2410_UDC_EP4_DMA_CON S3C2410_USBDREG(0x0258)
821+#define S3C2410_UDC_EP4_DMA_UNIT S3C2410_USBDREG(0x025c)
822+#define S3C2410_UDC_EP4_DMA_FIFO S3C2410_USBDREG(0x0260)
823+#define S3C2410_UDC_EP4_DMA_TTC_L S3C2410_USBDREG(0x0264)
824+#define S3C2410_UDC_EP4_DMA_TTC_M S3C2410_USBDREG(0x0268)
825+#define S3C2410_UDC_EP4_DMA_TTC_H S3C2410_USBDREG(0x026c)
826+
827+#define S3C2410_UDC_INDEX_REG S3C2410_USBDREG(0x0178)
828+
829+/* indexed registers */
830+
831+#define S3C2410_UDC_MAXP_REG S3C2410_USBDREG(0x0180)
832+
833+#define S3C2410_UDC_EP0_CSR_REG S3C2410_USBDREG(0x0184)
834+
835+#define S3C2410_UDC_IN_CSR1_REG S3C2410_USBDREG(0x0184)
836+#define S3C2410_UDC_IN_CSR2_REG S3C2410_USBDREG(0x0188)
837+
838+#define S3C2410_UDC_OUT_CSR1_REG S3C2410_USBDREG(0x0190)
839+#define S3C2410_UDC_OUT_CSR2_REG S3C2410_USBDREG(0x0194)
840+#define S3C2410_UDC_OUT_FIFO_CNT1_REG S3C2410_USBDREG(0x0198)
841+#define S3C2410_UDC_OUT_FIFO_CNT2_REG S3C2410_USBDREG(0x019c)
842+
843+
844+
845+#define S3C2410_UDC_PWR_ISOUP (1<<7) // R/W
846+#define S3C2410_UDC_PWR_RESET (1<<3) // R
847+#define S3C2410_UDC_PWR_RESUME (1<<2) // R/W
848+#define S3C2410_UDC_PWR_SUSPEND (1<<1) // R
849+#define S3C2410_UDC_PWR_ENSUSPEND (1<<0) // R/W
850+
851+#define S3C2410_UDC_PWR_DEFAULT 0x00
852+
853+#define S3C2410_UDC_INT_EP4 (1<<4) // R/W (clear only)
854+#define S3C2410_UDC_INT_EP3 (1<<3) // R/W (clear only)
855+#define S3C2410_UDC_INT_EP2 (1<<2) // R/W (clear only)
856+#define S3C2410_UDC_INT_EP1 (1<<1) // R/W (clear only)
857+#define S3C2410_UDC_INT_EP0 (1<<0) // R/W (clear only)
858+
859+#define S3C2410_UDC_USBINT_RESET (1<<2) // R/W (clear only)
860+#define S3C2410_UDC_USBINT_RESUME (1<<1) // R/W (clear only)
861+#define S3C2410_UDC_USBINT_SUSPEND (1<<0) // R/W (clear only)
862+
863+#define S3C2410_UDC_INTE_EP4 (1<<4) // R/W
864+#define S3C2410_UDC_INTE_EP3 (1<<3) // R/W
865+#define S3C2410_UDC_INTE_EP2 (1<<2) // R/W
866+#define S3C2410_UDC_INTE_EP1 (1<<1) // R/W
867+#define S3C2410_UDC_INTE_EP0 (1<<0) // R/W
868+
869+#define S3C2410_UDC_USBINTE_RESET (1<<2) // R/W
870+#define S3C2410_UDC_USBINTE_SUSPEND (1<<0) // R/W
871+
872+
873+#define S3C2410_UDC_INDEX_EP0 (0x00)
874+#define S3C2410_UDC_INDEX_EP1 (0x01) // ??
875+#define S3C2410_UDC_INDEX_EP2 (0x02) // ??
876+#define S3C2410_UDC_INDEX_EP3 (0x03) // ??
877+#define S3C2410_UDC_INDEX_EP4 (0x04) // ??
878+
879+#define S3C2410_UDC_ICSR1_CLRDT (1<<6) // R/W
880+#define S3C2410_UDC_ICSR1_SENTSTL (1<<5) // R/W (clear only)
881+#define S3C2410_UDC_ICSR1_SENDSTL (1<<4) // R/W
882+#define S3C2410_UDC_ICSR1_FFLUSH (1<<3) // W (set only)
883+#define S3C2410_UDC_ICSR1_UNDRUN (1<<2) // R/W (clear only)
884+#define S3C2410_UDC_ICSR1_PKTRDY (1<<0) // R/W (set only)
885+
886+#define S3C2410_UDC_ICSR2_AUTOSET (1<<7) // R/W
887+#define S3C2410_UDC_ICSR2_ISO (1<<6) // R/W
888+#define S3C2410_UDC_ICSR2_MODEIN (1<<5) // R/W
889+#define S3C2410_UDC_ICSR2_DMAIEN (1<<4) // R/W
890+
891+#define S3C2410_UDC_OCSR1_CLRDT (1<<7) // R/W
892+#define S3C2410_UDC_OCSR1_SENTSTL (1<<6) // R/W (clear only)
893+#define S3C2410_UDC_OCSR1_SENDSTL (1<<5) // R/W
894+#define S3C2410_UDC_OCSR1_FFLUSH (1<<4) // R/W
895+#define S3C2410_UDC_OCSR1_DERROR (1<<3) // R
896+#define S3C2410_UDC_OCSR1_OVRRUN (1<<2) // R/W (clear only)
897+#define S3C2410_UDC_OCSR1_PKTRDY (1<<0) // R/W (clear only)
898+
899+#define S3C2410_UDC_OCSR2_AUTOCLR (1<<7) // R/W
900+#define S3C2410_UDC_OCSR2_ISO (1<<6) // R/W
901+#define S3C2410_UDC_OCSR2_DMAIEN (1<<5) // R/W
902+
903+#define S3C2410_UDC_SETIX(X) writel(X, S3C2410_UDC_INDEX_REG)
904+
905+#define S3C2410_UDC_EP0_CSR_OPKRDY (1<<0)
906+#define S3C2410_UDC_EP0_CSR_IPKRDY (1<<1)
907+#define S3C2410_UDC_EP0_CSR_SENTSTL (1<<2)
908+#define S3C2410_UDC_EP0_CSR_DE (1<<3)
909+#define S3C2410_UDC_EP0_CSR_SE (1<<4)
910+#define S3C2410_UDC_EP0_CSR_SENDSTL (1<<5)
911+#define S3C2410_UDC_EP0_CSR_SOPKTRDY (1<<6)
912+#define S3C2410_UDC_EP0_CSR_SSE (1<<7)
913+
914+#define S3C2410_UDC_MAXP_8 (1<<0)
915+#define S3C2410_UDC_MAXP_16 (1<<1)
916+#define S3C2410_UDC_MAXP_32 (1<<2)
917+#define S3C2410_UDC_MAXP_64 (1<<3)
918+
919+/****************** MACROS ******************/
920+#define BIT_MASK 0xFF
921+
922+#if 1
923+#define maskl(v,m,a) \
924+ writel((readl(a) & ~(m))|((v)&(m)), (a))
925+#else
926+#define maskl(v,m,a) do { \
927+ unsigned long foo = readl(a); \
928+ unsigned long bar = (foo & ~(m)) | ((v)&(m)); \
929+ serial_printf("0x%08x:0x%x->0x%x\n", (a), foo, bar); \
930+ writel(bar, (a)); \
931+} while(0)
932+#endif
933+
934+#define clear_ep0_sst() do { \
935+ S3C2410_UDC_SETIX(0); \
936+ writel(0x00, S3C2410_UDC_EP0_CSR_REG); \
937+} while(0)
938+
939+#define clear_ep0_se() do { \
940+ S3C2410_UDC_SETIX(0); \
941+ maskl(S3C2410_UDC_EP0_CSR_SSE, \
942+ BIT_MASK, S3C2410_UDC_EP0_CSR_REG); \
943+} while(0)
944+
945+#define clear_ep0_opr() do { \
946+ S3C2410_UDC_SETIX(0); \
947+ maskl(S3C2410_UDC_EP0_CSR_SOPKTRDY, \
948+ BIT_MASK, S3C2410_UDC_EP0_CSR_REG); \
949+} while(0)
950+
951+#define set_ep0_ipr() do { \
952+ S3C2410_UDC_SETIX(0); \
953+ maskl(S3C2410_UDC_EP0_CSR_IPKRDY, \
954+ BIT_MASK, S3C2410_UDC_EP0_CSR_REG); \
955+} while(0)
956+
957+#define set_ep0_de() do { \
958+ S3C2410_UDC_SETIX(0); \
959+ maskl(S3C2410_UDC_EP0_CSR_DE, \
960+ BIT_MASK, S3C2410_UDC_EP0_CSR_REG); \
961+} while(0)
962+
963+#define set_ep0_ss() do { \
964+ S3C2410_UDC_SETIX(0); \
965+ maskl(S3C2410_UDC_EP0_CSR_SENDSTL, \
966+ BIT_MASK, S3C2410_UDC_EP0_CSR_REG); \
967+} while(0)
968+
969+#define set_ep0_de_out() do { \
970+ S3C2410_UDC_SETIX(0); \
971+ maskl((S3C2410_UDC_EP0_CSR_SOPKTRDY \
972+ | S3C2410_UDC_EP0_CSR_DE), \
973+ BIT_MASK, S3C2410_UDC_EP0_CSR_REG); \
974+} while(0)
975+
976+#define set_ep0_sse_out() do { \
977+ S3C2410_UDC_SETIX(0); \
978+ maskl((S3C2410_UDC_EP0_CSR_SOPKTRDY \
979+ | S3C2410_UDC_EP0_CSR_SSE), \
980+ BIT_MASK, S3C2410_UDC_EP0_CSR_REG); \
981+} while(0)
982+
983+#define set_ep0_de_in() do { \
984+ S3C2410_UDC_SETIX(0); \
985+ maskl((S3C2410_UDC_EP0_CSR_IPKRDY \
986+ | S3C2410_UDC_EP0_CSR_DE), \
987+ BIT_MASK, S3C2410_UDC_EP0_CSR_REG); \
988+} while(0)
989+
990+
991+#if 0
992+
993+#define clear_stall_ep1_out(base) do { \
994+ S3C2410_UDC_SETIX(base,EP1); \
995+ orl(0,base+S3C2410_UDC_OUT_CSR1_REG); \
996+} while(0)
997+
998+
999+#define clear_stall_ep2_out(base) do { \
1000+ S3C2410_UDC_SETIX(base,EP2); \
1001+ orl(0, base+S3C2410_UDC_OUT_CSR1_REG); \
1002+} while(0)
1003+
1004+
1005+#define clear_stall_ep3_out(base) do { \
1006+ S3C2410_UDC_SETIX(base,EP3); \
1007+ orl(0,base+S3C2410_UDC_OUT_CSR1_REG); \
1008+} while(0)
1009+
1010+
1011+#define clear_stall_ep4_out(base) do { \
1012+ S3C2410_UDC_SETIX(base,EP4); \
1013+ orl(0, base+S3C2410_UDC_OUT_CSR1_REG); \
1014+} while(0)
1015+
1016+#endif
1017+
1018+/* S3C2410 Endpoint parameters */
1019+#define EP0_MAX_PACKET_SIZE 16
1020+#define UDC_OUT_ENDPOINT 2
1021+#define UDC_OUT_PACKET_SIZE 64
1022+#define UDC_IN_ENDPOINT 1
1023+#define UDC_IN_PACKET_SIZE 64
1024+#define UDC_INT_ENDPOINT 5
1025+#define UDC_INT_PACKET_SIZE 16
1026+#define UDC_BULK_PACKET_SIZE 16
1027+
1028+#endif
1029Index: u-boot/drivers/usbdcore_ep0.c
1030===================================================================
1031--- u-boot.orig/drivers/usbdcore_ep0.c
1032+++ u-boot/drivers/usbdcore_ep0.c
1033@@ -43,7 +43,7 @@
1034
1035 #include <common.h>
1036
1037-#if defined(CONFIG_OMAP1510) && defined(CONFIG_USB_DEVICE)
1038+#if defined(CONFIG_USB_DEVICE)
1039 #include "usbdcore.h"
1040
1041 #if 0
1042@@ -187,9 +187,13 @@
1043 if (!urb || !urb->buffer || !urb->buffer_length
1044 || (urb->buffer_length < 255)) {
1045 dbg_ep0 (2, "invalid urb %p", urb);
1046+ serial_printf("invalid urb %p", urb);
1047 return -1L;
1048 }
1049
1050+ /* re-initialize the ep0 buffer pointer */
1051+ urb->buffer = (u8 *) urb->buffer_data;
1052+
1053 /* setup tx urb */
1054 urb->actual_length = 0;
1055 cp = urb->buffer;
1056@@ -206,17 +210,8 @@
1057 usbd_device_device_descriptor (device, port))) {
1058 return -1;
1059 }
1060- /* copy descriptor for this device */
1061- copy_config (urb, device_descriptor,
1062- sizeof (struct usb_device_descriptor),
1063- max);
1064-
1065- /* correct the correct control endpoint 0 max packet size into the descriptor */
1066- device_descriptor =
1067- (struct usb_device_descriptor *) urb->buffer;
1068- device_descriptor->bMaxPacketSize0 =
1069- urb->device->bus->maxpacketsize;
1070-
1071+ urb->buffer = device_descriptor;
1072+ urb->actual_length = MIN(sizeof(*device_descriptor), max);
1073 }
1074 /*dbg_ep0(3, "copied device configuration, actual_length: %x", urb->actual_length); */
1075 break;
1076@@ -250,11 +245,9 @@
1077 index);
1078 return -1;
1079 }
1080- copy_config (urb, configuration_descriptor,
1081- sizeof (struct
1082- usb_configuration_descriptor),
1083- max);
1084-
1085+ urb->buffer = configuration_descriptor;
1086+ urb->actual_length =
1087+ MIN(le16_to_cpu(configuration_descriptor->wTotalLength), max);
1088 }
1089 break;
1090
1091@@ -376,6 +369,7 @@
1092 dbg_ep0 (0, "entering ep0_recv_setup()");
1093 if (!urb || !urb->device) {
1094 dbg_ep0 (3, "invalid URB %p", urb);
1095+ serial_printf("invalid URB %p", urb);
1096 return -1;
1097 }
1098
1099@@ -400,6 +394,7 @@
1100 return device->cdc_recv_setup(request, urb);
1101 dbg_ep0 (1, "non standard request: %x",
1102 request->bmRequestType & USB_REQ_TYPE_MASK);
1103+ serial_printf("non standard request: %x", request->bmRequestType & USB_REQ_TYPE_MASK);
1104 return -1; /* Stall here */
1105 }
1106
1107@@ -448,6 +443,8 @@
1108 dbg_ep0 (1, "request %s not allowed in UNKNOWN state: %s",
1109 USBD_DEVICE_REQUESTS (request->bRequest),
1110 usbd_device_states[device->device_state]);
1111+ serial_printf("request %s not allowed in UNKNOWN state: %s", USBD_DEVICE_REQUESTS (request->bRequest), usbd_device_states[device->device_state]);
1112+ break;
1113 return -1;
1114 }
1115
1116@@ -545,7 +542,8 @@
1117 /*dbg_ep0(2, "address: %d %d %d", */
1118 /* request->wValue, le16_to_cpu(request->wValue), device->address); */
1119
1120- serial_printf ("DEVICE_ADDRESS_ASSIGNED.. event?\n");
1121+ //serial_printf ("DEVICE_ADDRESS_ASSIGNED.. event?\n");
1122+ //udc_set_address(device->address);
1123 return 0;
1124
1125 case USB_REQ_SET_DESCRIPTOR: /* XXX should we support this? */
1126Index: u-boot/include/configs/neo1973_gta01.h
1127===================================================================
1128--- u-boot.orig/include/configs/neo1973_gta01.h
1129+++ u-boot/include/configs/neo1973_gta01.h
1130@@ -173,6 +173,16 @@
1131 #define CONFIG_USB_OHCI 1
1132 #endif
1133
1134+#define CONFIG_USB_DEVICE 1
1135+#define CONFIG_USB_TTY 1
1136+#define CFG_CONSOLE_IS_IN_ENV 1
1137+#define CONFIG_USBD_VENDORID 0x1457 /* Linux/NetChip */
1138+#define CONFIG_USBD_PRODUCTID_GSERIAL 0x5120 /* gserial */
1139+#define CONFIG_USBD_PRODUCTID_CDCACM 0x5119 /* CDC ACM */
1140+#define CONFIG_USBD_MANUFACTURER "OpenMoko, Inc"
1141+#define CONFIG_USBD_PRODUCT_NAME "Neo1973 Bootloader " U_BOOT_VERSION
1142+#define CONFIG_EXTRA_ENV_SETTINGS "usbtty=cdc_acm\0"
1143+
1144 /*-----------------------------------------------------------------------
1145 * Physical Memory Map
1146 */
1147Index: u-boot/cpu/arm920t/s3c24x0/interrupts.c
1148===================================================================
1149--- u-boot.orig/cpu/arm920t/s3c24x0/interrupts.c
1150+++ u-boot/cpu/arm920t/s3c24x0/interrupts.c
1151@@ -222,6 +222,13 @@
1152 S3C24X0_INTERRUPT * irq = S3C24X0_GetBase_INTERRUPT();
1153 u_int32_t intpnd = irq->INTPND;
1154
1155+#ifdef CONFIG_USB_DEVICE
1156+ if (intpnd & BIT_USBD) {
1157+ s3c2410_udc_irq();
1158+ irq->SRCPND = BIT_USBD;
1159+ irq->INTPND = BIT_USBD;
1160+ }
1161+#endif /* USB_DEVICE */
1162 }
1163 #endif /* USE_IRQ */
1164
1165Index: u-boot/drivers/usbtty.h
1166===================================================================
1167--- u-boot.orig/drivers/usbtty.h
1168+++ u-boot/drivers/usbtty.h
1169@@ -29,6 +29,8 @@
1170 #include "usbdcore_mpc8xx.h"
1171 #elif defined(CONFIG_OMAP1510)
1172 #include "usbdcore_omap1510.h"
1173+#elif defined(CONFIG_S3C2410)
1174+#include "usbdcore_s3c2410.h"
1175 #endif
1176
1177 #include <config.h>
1178Index: u-boot/board/neo1973/common/cmd_neo1973.c
1179===================================================================
1180--- u-boot.orig/board/neo1973/common/cmd_neo1973.c
1181+++ u-boot/board/neo1973/common/cmd_neo1973.c
1182@@ -72,6 +72,18 @@
1183 neo1973_vibrator(1);
1184 else
1185 neo1973_vibrator(0);
1186+ } else if (!strcmp(argv[1], "udc")) {
1187+ if (argc < 3)
1188+ goto out_help;
1189+ if (!strcmp(argv[2], "udc")) {
1190+ if (argc < 4)
1191+ goto out_help;
1192+ if (!strcmp(argv[3], "on"))
1193+ udc_connect();
1194+ else
1195+ udc_disconnect();
1196+ } else
1197+ goto out_help;
1198 } else {
1199 out_help:
1200 printf("Usage:\n%s\n", cmdtp->usage);
1201@@ -95,5 +107,6 @@
1202 "neo1973 charger off - disable charging\n"
1203 "neo1973 backlight (on|off) - switch backlight on or off\n"
1204 "neo1973 vibrator (on|off) - switch vibrator on or off\n"
1205+ "neo1973 udc pullup (on|off) - switch pull-up on or off\n"
1206 );
1207 #endif /* CFG_CMD_BDI */
1208Index: u-boot/board/neo1973/gta01/Makefile
1209===================================================================
1210--- u-boot.orig/board/neo1973/gta01/Makefile
1211+++ u-boot/board/neo1973/gta01/Makefile
1212@@ -25,7 +25,7 @@
1213
1214 LIB = lib$(BOARD).a
1215
1216-OBJS := gta01.o pcf50606.o ../common/cmd_neo1973.o ../common/jbt6k74.o
1217+OBJS := gta01.o pcf50606.o ../common/cmd_neo1973.o ../common/jbt6k74.o ../common/udc.o
1218 SOBJS := ../common/lowlevel_init.o
1219
1220 $(LIB): $(OBJS) $(SOBJS)
1221Index: u-boot/board/neo1973/common/udc.c
1222===================================================================
1223--- /dev/null
1224+++ u-boot/board/neo1973/common/udc.c
1225@@ -0,0 +1,23 @@
1226+
1227+#include <common.h>
1228+#include <usbdcore.h>
1229+#include <s3c2410.h>
1230+
1231+void udc_ctrl(enum usbd_event event, int param)
1232+{
1233+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
1234+
1235+ switch (event) {
1236+ case UDC_CTRL_PULLUP_ENABLE:
1237+#if defined(CONFIG_ARCH_GTA01_v4) || defined(CONFIG_ARCH_GTA01B_v2) || \
1238+ defined(CONFIG_ARCH_GTA01B_v3) || defined(CONFIG_ARCH_GTA01B_v4)
1239+ if (param)
1240+ gpio->GPBDAT |= (1 << 9);
1241+ else
1242+ gpio->GPBDAT &= ~(1 << 9);
1243+#endif
1244+ break;
1245+ default:
1246+ break;
1247+ }
1248+}
1249Index: u-boot/include/usbdcore.h
1250===================================================================
1251--- u-boot.orig/include/usbdcore.h
1252+++ u-boot/include/usbdcore.h
1253@@ -671,4 +671,10 @@
1254 void usbd_rcv_complete(struct usb_endpoint_instance *endpoint, int len, int urb_bad);
1255 void usbd_tx_complete (struct usb_endpoint_instance *endpoint);
1256
1257+enum usbd_event {
1258+ UDC_CTRL_PULLUP_ENABLE,
1259+};
1260+
1261+void udc_ctrl(enum usbd_event event, int param);
1262+#endif
1263 #endif
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2440.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2440.patch
new file mode 100644
index 0000000000..da0fb8cf2d
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2440.patch
@@ -0,0 +1,1301 @@
1Add proper support for S3C2440 CPU's
2
3Index: u-boot/include/s3c24x0.h
4===================================================================
5--- u-boot.orig/include/s3c24x0.h
6+++ u-boot/include/s3c24x0.h
7@@ -82,7 +82,7 @@
8 S3C24X0_REG32 PRIORITY;
9 S3C24X0_REG32 INTPND;
10 S3C24X0_REG32 INTOFFSET;
11-#ifdef CONFIG_S3C2410
12+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
13 S3C24X0_REG32 SUBSRCPND;
14 S3C24X0_REG32 INTSUBMSK;
15 #endif
16@@ -92,11 +92,11 @@
17 /* DMAS (see manual chapter 8) */
18 typedef struct {
19 S3C24X0_REG32 DISRC;
20-#ifdef CONFIG_S3C2410
21+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
22 S3C24X0_REG32 DISRCC;
23 #endif
24 S3C24X0_REG32 DIDST;
25-#ifdef CONFIG_S3C2410
26+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
27 S3C24X0_REG32 DIDSTC;
28 #endif
29 S3C24X0_REG32 DCON;
30@@ -107,7 +107,7 @@
31 #ifdef CONFIG_S3C2400
32 S3C24X0_REG32 res[1];
33 #endif
34-#ifdef CONFIG_S3C2410
35+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
36 S3C24X0_REG32 res[7];
37 #endif
38 } /*__attribute__((__packed__))*/ S3C24X0_DMA;
39@@ -126,6 +126,9 @@
40 S3C24X0_REG32 CLKCON;
41 S3C24X0_REG32 CLKSLOW;
42 S3C24X0_REG32 CLKDIVN;
43+#ifdef CONFIG_S3C2440
44+ S3C24X0_REG32 CAMDIVN;
45+#endif
46 } /*__attribute__((__packed__))*/ S3C24X0_CLOCK_POWER;
47
48
49@@ -145,7 +148,7 @@
50 S3C24X0_REG32 res[8];
51 S3C24X0_REG32 DITHMODE;
52 S3C24X0_REG32 TPAL;
53-#ifdef CONFIG_S3C2410
54+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
55 S3C24X0_REG32 LCDINTPND;
56 S3C24X0_REG32 LCDSRCPND;
57 S3C24X0_REG32 LCDINTMSK;
58@@ -157,6 +160,9 @@
59 /* NAND FLASH (see S3C2410 manual chapter 6) */
60 typedef struct {
61 S3C24X0_REG32 NFCONF;
62+#ifdef CONFIG_S3C2440
63+ S3C24X0_REG32 NFCONT;
64+#endif
65 S3C24X0_REG32 NFCMD;
66 S3C24X0_REG32 NFADDR;
67 S3C24X0_REG32 NFDATA;
68@@ -164,6 +170,15 @@
69 S3C24X0_REG32 NFECC;
70 } /*__attribute__((__packed__))*/ S3C2410_NAND;
71
72+/* NAND FLASH (see S3C2440 manual chapter 6) */
73+typedef struct {
74+ S3C24X0_REG32 NFCONF;
75+ S3C24X0_REG32 NFCMD;
76+ S3C24X0_REG32 NFADDR;
77+ S3C24X0_REG32 NFDATA;
78+ S3C24X0_REG32 NFSTAT;
79+ S3C24X0_REG32 NFECC;
80+} /*__attribute__((__packed__))*/ S3C2440_NAND;
81
82 /* UART (see manual chapter 11) */
83 typedef struct {
84@@ -451,6 +466,65 @@
85 S3C24X0_REG32 GSTATUS3;
86 S3C24X0_REG32 GSTATUS4;
87 #endif
88+#ifdef CONFIG_S3C2440
89+ S3C24X0_REG32 GPACON;
90+ S3C24X0_REG32 GPADAT;
91+ S3C24X0_REG32 res1[2];
92+ S3C24X0_REG32 GPBCON;
93+ S3C24X0_REG32 GPBDAT;
94+ S3C24X0_REG32 GPBUP;
95+ S3C24X0_REG32 res2;
96+ S3C24X0_REG32 GPCCON;
97+ S3C24X0_REG32 GPCDAT;
98+ S3C24X0_REG32 GPCUP;
99+ S3C24X0_REG32 res3;
100+ S3C24X0_REG32 GPDCON;
101+ S3C24X0_REG32 GPDDAT;
102+ S3C24X0_REG32 GPDUP;
103+ S3C24X0_REG32 res4;
104+ S3C24X0_REG32 GPECON;
105+ S3C24X0_REG32 GPEDAT;
106+ S3C24X0_REG32 GPEUP;
107+ S3C24X0_REG32 res5;
108+ S3C24X0_REG32 GPFCON;
109+ S3C24X0_REG32 GPFDAT;
110+ S3C24X0_REG32 GPFUP;
111+ S3C24X0_REG32 res6;
112+ S3C24X0_REG32 GPGCON;
113+ S3C24X0_REG32 GPGDAT;
114+ S3C24X0_REG32 GPGUP;
115+ S3C24X0_REG32 res7;
116+ S3C24X0_REG32 GPHCON;
117+ S3C24X0_REG32 GPHDAT;
118+ S3C24X0_REG32 GPHUP;
119+ S3C24X0_REG32 res8;
120+
121+ S3C24X0_REG32 MISCCR;
122+ S3C24X0_REG32 DCLKCON;
123+ S3C24X0_REG32 EXTINT0;
124+ S3C24X0_REG32 EXTINT1;
125+ S3C24X0_REG32 EXTINT2;
126+ S3C24X0_REG32 EINTFLT0;
127+ S3C24X0_REG32 EINTFLT1;
128+ S3C24X0_REG32 EINTFLT2;
129+ S3C24X0_REG32 EINTFLT3;
130+ S3C24X0_REG32 EINTMASK;
131+ S3C24X0_REG32 EINTPEND;
132+ S3C24X0_REG32 GSTATUS0;
133+ S3C24X0_REG32 GSTATUS1;
134+ S3C24X0_REG32 GSTATUS2;
135+ S3C24X0_REG32 GSTATUS3;
136+ S3C24X0_REG32 GSTATUS4;
137+
138+ S3C24X0_REG32 res9;
139+ S3C24X0_REG32 DSC0;
140+ S3C24X0_REG32 DSC1;
141+ S3C24X0_REG32 MSLCON;
142+ S3C24X0_REG32 GPJCON;
143+ S3C24X0_REG32 GPJDAT;
144+ S3C24X0_REG32 GPJUP;
145+ S3C24X0_REG32 res10;
146+#endif
147 } /*__attribute__((__packed__))*/ S3C24X0_GPIO;
148
149
150@@ -637,8 +711,13 @@
151 S3C24X0_REG32 SDIDCNT;
152 S3C24X0_REG32 SDIDSTA;
153 S3C24X0_REG32 SDIFSTA;
154+#if defined(CONFIG_S3C2410)
155 S3C24X0_REG32 SDIDAT;
156 S3C24X0_REG32 SDIIMSK;
157+#elif defined(CONFIG_S3C2440)
158+ S3C24X0_REG32 SDIIMSK;
159+ S3C24X0_REG32 SDIDAT;
160+#endif
161 } /*__attribute__((__packed__))*/ S3C2410_SDI;
162
163
164Index: u-boot/rtc/s3c24x0_rtc.c
165===================================================================
166--- u-boot.orig/rtc/s3c24x0_rtc.c
167+++ u-boot/rtc/s3c24x0_rtc.c
168@@ -34,6 +34,8 @@
169 #include <s3c2400.h>
170 #elif defined(CONFIG_S3C2410)
171 #include <s3c2410.h>
172+#elif defined(CONFIG_S3C2440)
173+#include <s3c2440.h>
174 #endif
175
176 #include <rtc.h>
177Index: u-boot/include/s3c2440.h
178===================================================================
179--- /dev/null
180+++ u-boot/include/s3c2440.h
181@@ -0,0 +1,300 @@
182+/*
183+ * (C) Copyright 2003
184+ * David Müller ELSOFT AG Switzerland. d.mueller@elsoft.ch
185+ *
186+ * See file CREDITS for list of people who contributed to this
187+ * project.
188+ *
189+ * This program is free software; you can redistribute it and/or
190+ * modify it under the terms of the GNU General Public License as
191+ * published by the Free Software Foundation; either version 2 of
192+ * the License, or (at your option) any later version.
193+ *
194+ * This program is distributed in the hope that it will be useful,
195+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
196+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
197+ * GNU General Public License for more details.
198+ *
199+ * You should have received a copy of the GNU General Public License
200+ * along with this program; if not, write to the Free Software
201+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
202+ * MA 02111-1307 USA
203+ */
204+
205+/************************************************
206+ * NAME : s3c2440.h
207+ * Version : 2007.
208+ *
209+ * Based on S3C2410X User's manual Rev 1.1
210+ ************************************************/
211+
212+#ifndef __S3C2440_H__
213+#define __S3C2440_H__
214+
215+#define S3C24X0_UART_CHANNELS 3
216+#define S3C24X0_SPI_CHANNELS 2
217+
218+/* S3C2440 only supports 512 Byte HW ECC */
219+#define S3C2440_ECCSIZE 512
220+#define S3C2440_ECCBYTES 3
221+
222+/* S3C2440 device base addresses */
223+#define S3C24X0_MEMCTL_BASE 0x48000000
224+#define S3C24X0_USB_HOST_BASE 0x49000000
225+#define S3C24X0_INTERRUPT_BASE 0x4A000000
226+#define S3C24X0_DMA_BASE 0x4B000000
227+#define S3C24X0_CLOCK_POWER_BASE 0x4C000000
228+#define S3C24X0_LCD_BASE 0x4D000000
229+#define S3C2440_NAND_BASE 0x4E000000
230+#define S3C24X0_UART_BASE 0x50000000
231+#define S3C24X0_TIMER_BASE 0x51000000
232+#define S3C24X0_USB_DEVICE_BASE 0x52000140
233+#define USB_DEVICE_PHYS_ADR 0x52000000
234+#define S3C24X0_WATCHDOG_BASE 0x53000000
235+#define S3C24X0_I2C_BASE 0x54000000
236+#define S3C24X0_I2S_BASE 0x55000000
237+#define S3C24X0_GPIO_BASE 0x56000000
238+#define S3C24X0_RTC_BASE 0x57000000
239+#define S3C2440_ADC_BASE 0x58000000
240+#define S3C24X0_SPI_BASE 0x59000000
241+#define S3C2440_SDI_BASE 0x5A000000
242+
243+#define oNFCONF 0x00
244+#define oNFCONT 0x04
245+
246+#ifndef __ASSEMBLER__
247+
248+/* include common stuff */
249+#include <s3c24x0.h>
250+
251+typedef enum {
252+ S3C24X0_UART0,
253+ S3C24X0_UART1,
254+ S3C24X0_UART2
255+} S3C24X0_UARTS_NR;
256+
257+static inline S3C24X0_MEMCTL * S3C24X0_GetBase_MEMCTL(void)
258+{
259+ return (S3C24X0_MEMCTL * const)S3C24X0_MEMCTL_BASE;
260+}
261+static inline S3C24X0_USB_HOST * S3C24X0_GetBase_USB_HOST(void)
262+{
263+ return (S3C24X0_USB_HOST * const)S3C24X0_USB_HOST_BASE;
264+}
265+static inline S3C24X0_INTERRUPT * S3C24X0_GetBase_INTERRUPT(void)
266+{
267+ return (S3C24X0_INTERRUPT * const)S3C24X0_INTERRUPT_BASE;
268+}
269+static inline S3C24X0_DMAS * S3C24X0_GetBase_DMAS(void)
270+{
271+ return (S3C24X0_DMAS * const)S3C24X0_DMA_BASE;
272+}
273+static inline S3C24X0_CLOCK_POWER * S3C24X0_GetBase_CLOCK_POWER(void)
274+{
275+ return (S3C24X0_CLOCK_POWER * const)S3C24X0_CLOCK_POWER_BASE;
276+}
277+static inline S3C24X0_LCD * S3C24X0_GetBase_LCD(void)
278+{
279+ return (S3C24X0_LCD * const)S3C24X0_LCD_BASE;
280+}
281+static inline S3C2440_NAND * S3C2440_GetBase_NAND(void)
282+{
283+ return (S3C2440_NAND * const)S3C2440_NAND_BASE;
284+}
285+static inline S3C24X0_UART * S3C24X0_GetBase_UART(S3C24X0_UARTS_NR nr)
286+{
287+ return (S3C24X0_UART * const)(S3C24X0_UART_BASE + (nr * 0x4000));
288+}
289+static inline S3C24X0_TIMERS * S3C24X0_GetBase_TIMERS(void)
290+{
291+ return (S3C24X0_TIMERS * const)S3C24X0_TIMER_BASE;
292+}
293+static inline S3C24X0_USB_DEVICE * S3C24X0_GetBase_USB_DEVICE(void)
294+{
295+ return (S3C24X0_USB_DEVICE * const)S3C24X0_USB_DEVICE_BASE;
296+}
297+static inline S3C24X0_WATCHDOG * S3C24X0_GetBase_WATCHDOG(void)
298+{
299+ return (S3C24X0_WATCHDOG * const)S3C24X0_WATCHDOG_BASE;
300+}
301+static inline S3C24X0_I2C * S3C24X0_GetBase_I2C(void)
302+{
303+ return (S3C24X0_I2C * const)S3C24X0_I2C_BASE;
304+}
305+static inline S3C24X0_I2S * S3C24X0_GetBase_I2S(void)
306+{
307+ return (S3C24X0_I2S * const)S3C24X0_I2S_BASE;
308+}
309+static inline S3C24X0_GPIO * S3C24X0_GetBase_GPIO(void)
310+{
311+ return (S3C24X0_GPIO * const)S3C24X0_GPIO_BASE;
312+}
313+static inline S3C24X0_RTC * S3C24X0_GetBase_RTC(void)
314+{
315+ return (S3C24X0_RTC * const)S3C24X0_RTC_BASE;
316+}
317+/*
318+static inline S3C2440_ADC * S3C2440_GetBase_ADC(void)
319+{
320+ return (S3C2440_ADC * const)S3C2440_ADC_BASE;
321+}
322+static inline S3C24X0_SPI * S3C24X0_GetBase_SPI(void)
323+{
324+ return (S3C24X0_SPI * const)S3C24X0_SPI_BASE;
325+}
326+*/
327+static inline S3C2410_SDI * S3C2410_GetBase_SDI(void)
328+{
329+ return (S3C2410_SDI * const)S3C2440_SDI_BASE;
330+}
331+
332+#endif /* __ASSEMBLER__ */
333+
334+/* ISR */
335+#define pISR_RESET (*(unsigned *)(_ISR_STARTADDRESS+0x0))
336+#define pISR_UNDEF (*(unsigned *)(_ISR_STARTADDRESS+0x4))
337+#define pISR_SWI (*(unsigned *)(_ISR_STARTADDRESS+0x8))
338+#define pISR_PABORT (*(unsigned *)(_ISR_STARTADDRESS+0xC))
339+#define pISR_DABORT (*(unsigned *)(_ISR_STARTADDRESS+0x10))
340+#define pISR_RESERVED (*(unsigned *)(_ISR_STARTADDRESS+0x14))
341+#define pISR_IRQ (*(unsigned *)(_ISR_STARTADDRESS+0x18))
342+#define pISR_FIQ (*(unsigned *)(_ISR_STARTADDRESS+0x1C))
343+
344+#define pISR_EINT0 (*(unsigned *)(_ISR_STARTADDRESS+0x20))
345+#define pISR_EINT1 (*(unsigned *)(_ISR_STARTADDRESS+0x24))
346+#define pISR_EINT2 (*(unsigned *)(_ISR_STARTADDRESS+0x28))
347+#define pISR_EINT3 (*(unsigned *)(_ISR_STARTADDRESS+0x2C))
348+#define pISR_EINT4_7 (*(unsigned *)(_ISR_STARTADDRESS+0x30))
349+#define pISR_EINT8_23 (*(unsigned *)(_ISR_STARTADDRESS+0x34))
350+#define pISR_BAT_FLT (*(unsigned *)(_ISR_STARTADDRESS+0x3C))
351+#define pISR_TICK (*(unsigned *)(_ISR_STARTADDRESS+0x40))
352+#define pISR_WDT (*(unsigned *)(_ISR_STARTADDRESS+0x44))
353+#define pISR_TIMER0 (*(unsigned *)(_ISR_STARTADDRESS+0x48))
354+#define pISR_TIMER1 (*(unsigned *)(_ISR_STARTADDRESS+0x4C))
355+#define pISR_TIMER2 (*(unsigned *)(_ISR_STARTADDRESS+0x50))
356+#define pISR_TIMER3 (*(unsigned *)(_ISR_STARTADDRESS+0x54))
357+#define pISR_TIMER4 (*(unsigned *)(_ISR_STARTADDRESS+0x58))
358+#define pISR_UART2 (*(unsigned *)(_ISR_STARTADDRESS+0x5C))
359+#define pISR_NOTUSED (*(unsigned *)(_ISR_STARTADDRESS+0x60))
360+#define pISR_DMA0 (*(unsigned *)(_ISR_STARTADDRESS+0x64))
361+#define pISR_DMA1 (*(unsigned *)(_ISR_STARTADDRESS+0x68))
362+#define pISR_DMA2 (*(unsigned *)(_ISR_STARTADDRESS+0x6C))
363+#define pISR_DMA3 (*(unsigned *)(_ISR_STARTADDRESS+0x70))
364+#define pISR_SDI (*(unsigned *)(_ISR_STARTADDRESS+0x74))
365+#define pISR_SPI0 (*(unsigned *)(_ISR_STARTADDRESS+0x78))
366+#define pISR_UART1 (*(unsigned *)(_ISR_STARTADDRESS+0x7C))
367+#define pISR_USBD (*(unsigned *)(_ISR_STARTADDRESS+0x84))
368+#define pISR_USBH (*(unsigned *)(_ISR_STARTADDRESS+0x88))
369+#define pISR_IIC (*(unsigned *)(_ISR_STARTADDRESS+0x8C))
370+#define pISR_UART0 (*(unsigned *)(_ISR_STARTADDRESS+0x90))
371+#define pISR_SPI1 (*(unsigned *)(_ISR_STARTADDRESS+0x94))
372+#define pISR_RTC (*(unsigned *)(_ISR_STARTADDRESS+0x98))
373+#define pISR_ADC (*(unsigned *)(_ISR_STARTADDRESS+0xA0))
374+
375+
376+/* PENDING BIT */
377+#define BIT_EINT0 (0x1)
378+#define BIT_EINT1 (0x1<<1)
379+#define BIT_EINT2 (0x1<<2)
380+#define BIT_EINT3 (0x1<<3)
381+#define BIT_EINT4_7 (0x1<<4)
382+#define BIT_EINT8_23 (0x1<<5)
383+#define BIT_BAT_FLT (0x1<<7)
384+#define BIT_TICK (0x1<<8)
385+#define BIT_WDT (0x1<<9)
386+#define BIT_TIMER0 (0x1<<10)
387+#define BIT_TIMER1 (0x1<<11)
388+#define BIT_TIMER2 (0x1<<12)
389+#define BIT_TIMER3 (0x1<<13)
390+#define BIT_TIMER4 (0x1<<14)
391+#define BIT_UART2 (0x1<<15)
392+#define BIT_LCD (0x1<<16)
393+#define BIT_DMA0 (0x1<<17)
394+#define BIT_DMA1 (0x1<<18)
395+#define BIT_DMA2 (0x1<<19)
396+#define BIT_DMA3 (0x1<<20)
397+#define BIT_SDI (0x1<<21)
398+#define BIT_SPI0 (0x1<<22)
399+#define BIT_UART1 (0x1<<23)
400+#define BIT_USBD (0x1<<25)
401+#define BIT_USBH (0x1<<26)
402+#define BIT_IIC (0x1<<27)
403+#define BIT_UART0 (0x1<<28)
404+#define BIT_SPI1 (0x1<<29)
405+#define BIT_RTC (0x1<<30)
406+#define BIT_ADC (0x1<<31)
407+#define BIT_ALLMSK (0xFFFFFFFF)
408+
409+#define ClearPending(bit) {\
410+ rSRCPND = bit;\
411+ rINTPND = bit;\
412+ rINTPND;\
413+ }
414+/* Wait until rINTPND is changed for the case that the ISR is very short. */
415+
416+#define __REG(x) (*(volatile unsigned long *)(x))
417+#define __REGl(x) (*(volatile unsigned long *)(x))
418+#define __REGw(x) (*(volatile unsigned short *)(x))
419+#define __REGb(x) (*(volatile unsigned char *)(x))
420+#define __REG2(x,y) (*(volatile unsigned long *)((x) + (y)))
421+
422+/*
423+ * * Nand flash controller
424+ * */
425+
426+#define NFDATA8 (*(volatile unsigned char *)0x4E000010)
427+#define NFDATA16 (*(volatile unsigned short *)0x4E000010)
428+#define NFDATA32 (*(volatile unsigned *)0x4E000010)
429+
430+#define NFCONF __REG(0x4E000000)
431+#define NFCONT __REG(0x4E000004)
432+#define NFCMD __REG(0x4E000008)
433+#define NFADDR __REGb(0x4E00000C)
434+#define NFMECCD0 __REG(0x4E000014)
435+#define NFMECCD1 __REG(0x4E000018)
436+#define NFSECCD __REG(0x4E00001C)
437+#define NFSTAT __REG(0x4E000020)
438+#define NFESTAT0 __REG(0x4E000024)
439+#define NFESTAT1 __REG(0x4E000028)
440+#define NFMECC0 __REG(0x4E00002C)
441+#define NFMECC1 __REG(0x4E000030)
442+#define NFSECC __REG(0x4E000034)
443+#define NFSBLK __REG(0x4E000038)
444+
445+
446+#define S3C2410_MISCCR_USBDEV (0<<3)
447+#define S3C2410_MISCCR_USBHOST (1<<3)
448+
449+#define S3C2410_MISCCR_CLK0_MPLL (0<<4)
450+#define S3C2410_MISCCR_CLK0_UPLL (1<<4)
451+#define S3C2410_MISCCR_CLK0_FCLK (2<<4)
452+#define S3C2410_MISCCR_CLK0_HCLK (3<<4)
453+#define S3C2410_MISCCR_CLK0_PCLK (4<<4)
454+#define S3C2410_MISCCR_CLK0_DCLK0 (5<<4)
455+#define S3C2410_MISCCR_CLK0_MASK (7<<4)
456+
457+#define S3C2410_MISCCR_CLK1_MPLL (0<<8)
458+#define S3C2410_MISCCR_CLK1_UPLL (1<<8)
459+#define S3C2410_MISCCR_CLK1_FCLK (2<<8)
460+#define S3C2410_MISCCR_CLK1_HCLK (3<<8)
461+#define S3C2410_MISCCR_CLK1_PCLK (4<<8)
462+#define S3C2410_MISCCR_CLK1_DCLK1 (5<<8)
463+#define S3C2410_MISCCR_CLK1_MASK (7<<8)
464+
465+#define S3C2410_MISCCR_USBSUSPND0 (1<<12)
466+#define S3C2410_MISCCR_USBSUSPND1 (1<<13)
467+
468+#define S3C2410_MISCCR_nRSTCON (1<<16)
469+
470+#define S3C2410_MISCCR_nEN_SCLK0 (1<<17)
471+#define S3C2410_MISCCR_nEN_SCLK1 (1<<18)
472+#define S3C2410_MISCCR_nEN_SCLKE (1<<19)
473+#define S3C2410_MISCCR_SDSLEEP (7<<17)
474+
475+#define S3C2410_CLKSLOW_UCLK_OFF (1<<7)
476+#define S3C2410_CLKSLOW_MPLL_OFF (1<<5)
477+#define S3C2410_CLKSLOW_SLOW (1<<4)
478+#define S3C2410_CLKSLOW_SLOWVAL(x) (x)
479+#define S3C2410_CLKSLOW_GET_SLOWVAL(x) ((x) & 7)
480+
481+#endif /*__S3C2440_H__*/
482Index: u-boot/include/common.h
483===================================================================
484--- u-boot.orig/include/common.h
485+++ u-boot/include/common.h
486@@ -454,7 +454,7 @@
487 ulong get_OPB_freq (void);
488 ulong get_PCI_freq (void);
489 #endif
490-#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_LH7A40X)
491+#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) || defined(CONFIG_LH7A40X)
492 void s3c2410_irq(void);
493 #define ARM920_IRQ_CALLBACK s3c2410_irq
494 ulong get_FCLK (void);
495Index: u-boot/cpu/arm920t/s3c24x0/usb_ohci.c
496===================================================================
497--- u-boot.orig/cpu/arm920t/s3c24x0/usb_ohci.c
498+++ u-boot/cpu/arm920t/s3c24x0/usb_ohci.c
499@@ -44,6 +44,8 @@
500 #include <s3c2400.h>
501 #elif defined(CONFIG_S3C2410)
502 #include <s3c2410.h>
503+#elif defined(CONFIG_S3C2440)
504+#include <s3c2440.h>
505 #endif
506
507 #include <malloc.h>
508Index: u-boot/cpu/arm920t/s3c24x0/speed.c
509===================================================================
510--- u-boot.orig/cpu/arm920t/s3c24x0/speed.c
511+++ u-boot/cpu/arm920t/s3c24x0/speed.c
512@@ -30,12 +30,15 @@
513 */
514
515 #include <common.h>
516-#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB)
517+#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || \
518+ defined (CONFIG_S3C2440) || defined (CONFIG_TRAB)
519
520 #if defined(CONFIG_S3C2400)
521 #include <s3c2400.h>
522 #elif defined(CONFIG_S3C2410)
523 #include <s3c2410.h>
524+#elif defined(CONFIG_S3C2440)
525+#include <s3c2440.h>
526 #endif
527
528 #define MPLL 0
529@@ -66,8 +69,12 @@
530 m = ((r & 0xFF000) >> 12) + 8;
531 p = ((r & 0x003F0) >> 4) + 2;
532 s = r & 0x3;
533-
534+#ifndef CONFIG_S3C2440
535 return((CONFIG_SYS_CLK_FREQ * m) / (p << s));
536+#else
537+ /* To avoid integer overflow, changed the calc order */
538+ return( 2 * m * (CONFIG_SYS_CLK_FREQ / (p << s )) );
539+#endif
540 }
541
542 /* return FCLK frequency */
543@@ -81,7 +88,21 @@
544 {
545 S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
546
547+#ifndef CONFIG_S3C2440
548 return((clk_power->CLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK());
549+#else
550+ switch (clk_power->CLKDIVN & 0x6) {
551+ case 0x0:
552+ return get_FCLK();
553+ case 0x2:
554+ return get_FCLK()/2;
555+ case 0x4:
556+ return (clk_power->CAMDIVN & 0x200) ? get_FCLK()/8 : get_FCLK()/4;
557+ case 0x6:
558+ return (clk_power->CAMDIVN & 0x100) ? get_FCLK()/6 : get_FCLK()/3;
559+ }
560+ return 0;
561+#endif
562 }
563
564 /* return PCLK frequency */
565@@ -98,4 +119,5 @@
566 return(get_PLLCLK(UPLL));
567 }
568
569-#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */
570+#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) ||
571+ defined(CONFIG_S3C2440) || defined (CONFIG_TRAB) */
572Index: u-boot/cpu/arm920t/s3c24x0/interrupts.c
573===================================================================
574--- u-boot.orig/cpu/arm920t/s3c24x0/interrupts.c
575+++ u-boot/cpu/arm920t/s3c24x0/interrupts.c
576@@ -30,13 +30,16 @@
577 */
578
579 #include <common.h>
580-#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB)
581+#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || \
582+ defined(CONFIG_S3C2440) || defined (CONFIG_TRAB)
583
584 #include <arm920t.h>
585 #if defined(CONFIG_S3C2400)
586 #include <s3c2400.h>
587 #elif defined(CONFIG_S3C2410)
588 #include <s3c2410.h>
589+#elif defined(CONFIG_S3C2440)
590+#include <s3c2440.h>
591 #endif
592
593 int timer_load_val = 0;
594@@ -59,6 +62,7 @@
595 /* use PWM Timer 4 because it has no output */
596 /* prescaler for Timer 4 is 16 */
597 timers->TCFG0 = 0x0f00;
598+#ifndef CONFIG_S3C2440
599 if (timer_load_val == 0)
600 {
601 /*
602@@ -68,6 +72,9 @@
603 */
604 timer_load_val = get_PCLK()/(2 * 16 * 100);
605 }
606+#else
607+ timer_load_val = get_PCLK()/(2 * 16 * 100);
608+#endif
609 /* load value for 10 ms timeout */
610 lastdec = timers->TCNTB4 = timer_load_val;
611 /* auto load, manual update of Timer 4 */
612@@ -178,6 +185,7 @@
613 tbclk = timer_load_val * 100;
614 #elif defined(CONFIG_SBC2410X) || \
615 defined(CONFIG_SMDK2410) || \
616+ defined(CONFIG_SMDK2440) || \
617 defined(CONFIG_VCMA9)
618 tbclk = CFG_HZ;
619 #else
620@@ -232,4 +240,5 @@
621 }
622 #endif /* USE_IRQ */
623
624-#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */
625+#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) ||
626+ defined(CONFIG_S3C2440) || defined (CONFIG_TRAB) */
627Index: u-boot/cpu/arm920t/s3c24x0/serial.c
628===================================================================
629--- u-boot.orig/cpu/arm920t/s3c24x0/serial.c
630+++ u-boot/cpu/arm920t/s3c24x0/serial.c
631@@ -19,12 +19,15 @@
632 */
633
634 #include <common.h>
635-#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB)
636+#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || \
637+ defined(CONFIG_S3C2440) || defined (CONFIG_TRAB)
638
639 #if defined(CONFIG_S3C2400) || defined(CONFIG_TRAB)
640 #include <s3c2400.h>
641 #elif defined(CONFIG_S3C2410)
642 #include <s3c2410.h>
643+#elif defined(CONFIG_S3C2440)
644+#include <s3c2440.h>
645 #endif
646
647 DECLARE_GLOBAL_DATA_PTR;
648@@ -180,4 +183,5 @@
649 }
650 }
651
652-#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */
653+#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) ||
654+ defined(CONFIG_S3C2440) || defined (CONFIG_TRAB) */
655Index: u-boot/cpu/arm920t/s3c24x0/i2c.c
656===================================================================
657--- u-boot.orig/cpu/arm920t/s3c24x0/i2c.c
658+++ u-boot/cpu/arm920t/s3c24x0/i2c.c
659@@ -34,6 +34,8 @@
660 #include <s3c2400.h>
661 #elif defined(CONFIG_S3C2410)
662 #include <s3c2410.h>
663+#elif defined(CONFIG_S3C2440)
664+#include <s3c2440.h>
665 #endif
666 #include <i2c.h>
667
668@@ -63,7 +65,7 @@
669 {
670 S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
671
672-#ifdef CONFIG_S3C2410
673+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
674 return (gpio->GPEDAT & 0x8000) >> 15;
675 #endif
676 #ifdef CONFIG_S3C2400
677@@ -82,7 +84,7 @@
678 {
679 S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
680
681-#ifdef CONFIG_S3C2410
682+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
683 gpio->GPEDAT = (gpio->GPEDAT & ~0x4000) | (x&1) << 14;
684 #endif
685 #ifdef CONFIG_S3C2400
686@@ -139,7 +141,7 @@
687 }
688
689 if ((status & I2CSTAT_BSY) || GetI2CSDA () == 0) {
690-#ifdef CONFIG_S3C2410
691+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
692 ulong old_gpecon = gpio->GPECON;
693 #endif
694 #ifdef CONFIG_S3C2400
695@@ -147,7 +149,7 @@
696 #endif
697 /* bus still busy probably by (most) previously interrupted transfer */
698
699-#ifdef CONFIG_S3C2410
700+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
701 /* set I2CSDA and I2CSCL (GPE15, GPE14) to GPIO */
702 gpio->GPECON = (gpio->GPECON & ~0xF0000000) | 0x10000000;
703 #endif
704@@ -171,7 +173,7 @@
705 udelay (1000);
706
707 /* restore pin functions */
708-#ifdef CONFIG_S3C2410
709+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
710 gpio->GPECON = old_gpecon;
711 #endif
712 #ifdef CONFIG_S3C2400
713Index: u-boot/drivers/usbdcore_s3c2410.c
714===================================================================
715--- u-boot.orig/drivers/usbdcore_s3c2410.c
716+++ u-boot/drivers/usbdcore_s3c2410.c
717@@ -24,7 +24,7 @@
718
719 #include <config.h>
720
721-#if defined(CONFIG_S3C2410) && defined(CONFIG_USB_DEVICE)
722+#if (defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)) && defined(CONFIG_USB_DEVICE)
723
724 #include <common.h>
725
726Index: u-boot/drivers/usbtty.h
727===================================================================
728--- u-boot.orig/drivers/usbtty.h
729+++ u-boot/drivers/usbtty.h
730@@ -29,7 +29,7 @@
731 #include "usbdcore_mpc8xx.h"
732 #elif defined(CONFIG_OMAP1510)
733 #include "usbdcore_omap1510.h"
734-#elif defined(CONFIG_S3C2410)
735+#elif defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
736 #include "usbdcore_s3c2410.h"
737 #endif
738
739Index: u-boot/cpu/arm920t/start.S
740===================================================================
741--- u-boot.orig/cpu/arm920t/start.S
742+++ u-boot/cpu/arm920t/start.S
743@@ -31,7 +31,11 @@
744
745 #include <config.h>
746 #include <version.h>
747+#if defined(CONFIG_S3C2410)
748 #include <s3c2410.h>
749+#elif defined(CONFIG_S3C2440)
750+#include <s3c2440.h>
751+#endif
752
753
754 /*
755@@ -142,14 +146,32 @@
756 # define pWTCON 0x15300000
757 # define INTMSK 0x14400008 /* Interupt-Controller base addresses */
758 # define CLKDIVN 0x14800014 /* clock divisor register */
759-#elif defined(CONFIG_S3C2410)
760+#elif defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440)
761 # define pWTCON 0x53000000
762 # define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
763 # define INTSUBMSK 0x4A00001C
764 # define CLKDIVN 0x4C000014 /* clock divisor register */
765 #endif
766
767-#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
768+#if defined(CONFIG_S3C2410)
769+# define INTSUBMSK_val 0x7ff
770+# define MPLLCON_val ((0x90 << 12) + (0x7 << 4) + 0x0) /* 202 MHz */
771+# define UPLLCON_val ((0x78 << 12) + (0x2 << 4) + 0x3)
772+# define CLKDIVN_val 3 /* FCLK:HCLK:PCLK = 1:2:4 */
773+#elif defined(CONFIG_S3C2440)
774+# define INTSUBMSK_val 0xffff
775+#if (CONFIG_SYS_CLK_FREQ == 16934400)
776+# define MPLLCON_val ((0x61 << 12) + (0x1 << 4) + 0x2) /* 296.35 MHz */
777+# define UPLLCON_val ((0x3c << 12) + (0x4 << 4) + 0x2) /* 47.98 MHz */
778+#else if (CONFIG_SYS_CLK_FREQ == 12000000)
779+# define MPLLCON_val ((0x44 << 12) + (0x1 << 4) + 0x1) /* 304.00 MHz */
780+# define UPLLCON_val ((0x38 << 12) + (0x2 << 4) + 0x2) /* 48.00 MHz */
781+#endif
782+# define CLKDIVN_val 7 /* FCLK:HCLK:PCLK = 1:3:6 */
783+# define CAMDIVN 0x4C000018
784+#endif
785+
786+#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
787 ldr r0, =pWTCON
788 mov r1, #0x0
789 str r1, [r0]
790@@ -160,24 +182,34 @@
791 mov r1, #0xffffffff
792 ldr r0, =INTMSK
793 str r1, [r0]
794-# if defined(CONFIG_S3C2410)
795- ldr r1, =0x3ff
796+# if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
797+ ldr r1, =INTSUBMSK_val
798 ldr r0, =INTSUBMSK
799 str r1, [r0]
800 # endif
801
802- /* default FCLK is 202 MHz ! */
803+#if defined(CONFIG_S3C2440)
804+ /* Make sure we get FCLK:HCLK:PCLK = 1:3:6 */
805+ ldr r0, =CAMDIVN
806+ mov r1, #0
807+ str r1, [r0]
808+#endif
809+
810+ /* Clock asynchronous mode */
811+ mrc p15, 0, r1, c1, c0, 0
812+ orr r1, r1, #0xc0000000
813+ mcr p15, 0, r1, c1, c0, 0
814+
815+
816 #define LOCKTIME 0x4c000000
817 #define UPLLCON 0x4c000008
818-//#define MPLLCFG ((0x90 << 12) + (0x2 << 4) + 0x2)
819-#define MPLLCFG ((0x90 << 12) + (0x7 << 4) + 0x0)
820-#define UPLLCFG ((0x78 << 12) + (0x2 << 4) + 0x3)
821+
822 ldr r0, =LOCKTIME
823 mov r1, #0xffffff
824 str r1, [r0]
825
826 ldr r0, =UPLLCON
827- ldr r1, =UPLLCFG
828+ ldr r1, =UPLLCON_val
829 str r1, [r0]
830
831 /* Page 7-19, seven nops between UPLL and MPLL */
832@@ -189,12 +221,12 @@
833 nop
834 nop
835
836- ldr r1, =MPLLCFG
837+ ldr r1, =MPLLCON_val
838 str r1, [r0, #-4] /* MPLLCON */
839
840 /* FCLK:HCLK:PCLK = 1:2:4 */
841 ldr r0, =CLKDIVN
842- mov r1, #3
843+ mov r1, #CLKDIVN_val
844 str r1, [r0]
845
846 #if 1
847@@ -222,7 +254,7 @@
848 str r1, [r0, #0x28]
849 #endif
850
851-#endif /* CONFIG_S3C2400 || CONFIG_S3C2410 */
852+#endif /* CONFIG_S3C2400 || CONFIG_S3C2410 || CONFIG_S3C2440 */
853
854 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
855 #ifndef CONFIG_LL_INIT_NAND_ONLY
856@@ -279,7 +311,7 @@
857 #if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && defined(CONFIG_LL_INIT_NAND_ONLY)
858 bl cpu_init_crit
859 #endif
860-#if defined(CONFIG_S3C2410)
861+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
862 /* ensure some refresh has happened */
863 ldr r1, =0xfffff
864 1: subs r1, r1, #1
865@@ -290,11 +322,12 @@
866 ldr r0, [ r1 ]
867 tst r0, #0x02 /* is this resume from power down */
868 ldrne pc, [r1, #4] /* gstatus3 */
869-#endif /* CONFIG_S3C2410 */
870+#endif /* CONFIG_S3C2410 || CONFIG_S3C2440 */
871 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
872
873 /* mov r10, lr */
874
875+#if defined(CONFIG_S3C2410)
876 @ reset NAND
877 mov r1, #S3C2410_NAND_BASE
878 ldr r2, =0xf842 @ initial value enable tacls=3,rph0=6,rph1=0
879@@ -314,6 +347,17 @@
880 ldr r2, [r1, #oNFCONF]
881 orr r2, r2, #0x800 @ disable chip
882 str r2, [r1, #oNFCONF]
883+#elif defined(CONFIG_S3C2440)
884+ mov r1, #S3C2440_NAND_BASE
885+ ldr r2, =0xfff0 @ initial value tacls=3,rph0=7,rph1=7
886+ ldr r3, [r1, #oNFCONF]
887+ orr r3, r3, r2
888+ str r3, [r1, #oNFCONF]
889+
890+ ldr r3, [r1, #oNFCONT]
891+ orr r3, r3, #1 @ enable nand controller
892+ str r3, [r1, #oNFCONT]
893+#endif
894
895 #if 0
896 @ get ready to call C functions (for nand_read())
897@@ -382,7 +426,7 @@
898 #endif /* CONFIG_S3C2410_NAND_BOOT */
899 done_relocate:
900
901-#if defined(CONFIG_USE_IRQ) && defined(CONFIG_S3C2410)
902+#if defined(CONFIG_USE_IRQ) && (defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440))
903 /* In the case of the S3C2410, if we've somehow magically (JTAG, ...)
904 ended up in RAM, then that ram is mapped to 0x30000000 and not 0.
905 So we need to copy the interrupt vectors, etc. */
906Index: u-boot/cpu/arm920t/s3c24x0/nand_read.c
907===================================================================
908--- u-boot.orig/cpu/arm920t/s3c24x0/nand_read.c
909+++ u-boot/cpu/arm920t/s3c24x0/nand_read.c
910@@ -16,30 +16,141 @@
911 */
912
913 #include <common.h>
914+#include <linux/mtd/nand.h>
915
916 #ifdef CONFIG_S3C2410_NAND_BOOT
917
918 #define __REGb(x) (*(volatile unsigned char *)(x))
919+#define __REGw(x) (*(volatile unsigned short *)(x))
920 #define __REGi(x) (*(volatile unsigned int *)(x))
921 #define NF_BASE 0x4e000000
922+#if defined(CONFIG_S3C2410)
923 #define NFCONF __REGi(NF_BASE + 0x0)
924 #define NFCMD __REGb(NF_BASE + 0x4)
925 #define NFADDR __REGb(NF_BASE + 0x8)
926 #define NFDATA __REGb(NF_BASE + 0xc)
927 #define NFSTAT __REGb(NF_BASE + 0x10)
928+#define NFSTAT_BUSY 1
929+#define nand_select() (NFCONF &= ~0x800)
930+#define nand_deselect() (NFCONF |= 0x800)
931+#define nand_clear_RnB() do {} while (0)
932+#elif defined(CONFIG_S3C2440)
933+#define NFCONF __REGi(NF_BASE + 0x0)
934+#define NFCONT __REGi(NF_BASE + 0x4)
935+#define NFCMD __REGb(NF_BASE + 0x8)
936+#define NFADDR __REGb(NF_BASE + 0xc)
937+#define NFDATA __REGb(NF_BASE + 0x10)
938+#define NFDATA16 __REGw(NF_BASE + 0x10)
939+#define NFSTAT __REGb(NF_BASE + 0x20)
940+#define NFSTAT_BUSY 1
941+#define nand_select() (NFCONT &= ~(1 << 1))
942+#define nand_deselect() (NFCONT |= (1 << 1))
943+#define nand_clear_RnB() (NFSTAT |= (1 << 2))
944+#endif
945
946-#define BUSY 1
947-inline void wait_idle(void)
948+static inline void nand_wait(void)
949 {
950 int i;
951
952- while (!(NFSTAT & BUSY))
953+ while (!(NFSTAT & NFSTAT_BUSY))
954 for (i=0; i<10; i++);
955 }
956
957-#define NAND_SECTOR_SIZE 512
958-#define NAND_BLOCK_MASK (NAND_SECTOR_SIZE - 1)
959-#define NAND_PAGE_SIZE 0x4000
960+#if defined(CONFIG_S3C2410)
961+/* configuration for 2410 with 512byte sized flash */
962+#define NAND_PAGE_SIZE 512
963+#define BAD_BLOCK_OFFSET 517
964+#define NAND_BLOCK_MASK (NAND_PAGE_SIZE - 1)
965+#define NAND_BLOCK_SIZE 0x4000
966+#else
967+/* configuration for 2440 with 2048byte sized flash */
968+#define NAND_5_ADDR_CYCLE
969+#define NAND_PAGE_SIZE 2048
970+#define BAD_BLOCK_OFFSET NAND_PAGE_SIZE
971+#define NAND_BLOCK_MASK (NAND_PAGE_SIZE - 1)
972+#define NAND_BLOCK_SIZE (NAND_PAGE_SIZE * 64)
973+#endif
974+
975+/* compile time failure in case of an invalid configuration */
976+#if defined(CONFIG_S3C2410) && (NAND_PAGE_SIZE != 512)
977+#error "S3C2410 does not support nand page size != 512"
978+#endif
979+
980+static int is_bad_block(unsigned long i)
981+{
982+ unsigned char data;
983+ unsigned long page_num;
984+
985+ /* FIXME: do this twice, for first and second page in block */
986+
987+ nand_clear_RnB();
988+#if (NAND_PAGE_SIZE == 512)
989+ NFCMD = NAND_CMD_READOOB; /* 0x50 */
990+ NFADDR = BAD_BLOCK_OFFSET & 0xf;
991+ NFADDR = (i >> 9) & 0xff;
992+ NFADDR = (i >> 17) & 0xff;
993+ NFADDR = (i >> 25) & 0xff;
994+#elif (NAND_PAGE_SIZE == 2048)
995+ page_num = i >> 11; /* addr / 2048 */
996+ NFCMD = NAND_CMD_READ0;
997+ NFADDR = BAD_BLOCK_OFFSET & 0xff;
998+ NFADDR = (BAD_BLOCK_OFFSET >> 8) & 0xff;
999+ NFADDR = page_num & 0xff;
1000+ NFADDR = (page_num >> 8) & 0xff;
1001+ NFADDR = (page_num >> 16) & 0xff;
1002+ NFCMD = NAND_CMD_READSTART;
1003+#endif
1004+ nand_wait();
1005+ data = (NFDATA & 0xff);
1006+ if (data != 0xff)
1007+ return 1;
1008+
1009+ return 0;
1010+}
1011+
1012+static int nand_read_page_ll(unsigned char *buf, unsigned long addr)
1013+{
1014+ unsigned short *ptr16 = (unsigned short *)buf;
1015+ unsigned int i, page_num;
1016+
1017+ nand_clear_RnB();
1018+
1019+ NFCMD = NAND_CMD_READ0;
1020+
1021+#if (NAND_PAGE_SIZE == 512)
1022+ /* Write Address */
1023+ NFADDR = addr & 0xff;
1024+ NFADDR = (addr >> 9) & 0xff;
1025+ NFADDR = (addr >> 17) & 0xff;
1026+ NFADDR = (addr >> 25) & 0xff;
1027+#elif (NAND_PAGE_SIZE == 2048)
1028+ page_num = addr >> 11; /* addr / 2048 */
1029+ /* Write Address */
1030+ NFADDR = 0;
1031+ NFADDR = 0;
1032+ NFADDR = page_num & 0xff;
1033+ NFADDR = (page_num >> 8) & 0xff;
1034+ NFADDR = (page_num >> 16) & 0xff;
1035+ NFCMD = NAND_CMD_READSTART;
1036+#else
1037+#error "unsupported nand page size"
1038+#endif
1039+ nand_wait();
1040+
1041+#if defined(CONFIG_S3C2410)
1042+ for (i = 0; i < NAND_PAGE_SIZE; i++) {
1043+ *buf = (NFDATA & 0xff);
1044+ buf++;
1045+ }
1046+#elif defined(CONFIG_S3C2440)
1047+ for (i = 0; i < NAND_PAGE_SIZE/2; i++) {
1048+ *ptr16 = NFDATA16;
1049+ ptr16++;
1050+ }
1051+#endif
1052+
1053+ return NAND_PAGE_SIZE;
1054+}
1055
1056 /* low level nand read function */
1057 int nand_read_ll(unsigned char *buf, unsigned long start_addr, int size)
1058@@ -50,47 +161,28 @@
1059 return -1; /* invalid alignment */
1060
1061 /* chip Enable */
1062- NFCONF &= ~0x800;
1063+ nand_select();
1064+ nand_clear_RnB();
1065 for (i=0; i<10; i++);
1066
1067 for (i=start_addr; i < (start_addr + size);) {
1068 #ifdef CONFIG_S3C2410_NAND_SKIP_BAD
1069- if (start_addr % NAND_PAGE_SIZE == 0) {
1070- unsigned char data;
1071- NFCMD = 0x50;
1072- NFADDR = 517&0xf;
1073- NFADDR = (i >> 9) & 0xff;
1074- NFADDR = (i >> 17) & 0xff;
1075- NFADDR = (i >> 25) & 0xff;
1076- wait_idle();
1077- data = (NFDATA & 0xff);
1078- if (data != 0xff) {
1079+ if (start_addr % NAND_BLOCK_SIZE == 0) {
1080+ if (is_bad_block(i)) {
1081 /* Bad block */
1082- i += NAND_PAGE_SIZE;
1083- size += NAND_PAGE_SIZE;
1084+ i += NAND_BLOCK_SIZE;
1085+ size += NAND_BLOCK_SIZE;
1086 continue;
1087 }
1088 }
1089 #endif
1090- /* READ0 */
1091- NFCMD = 0;
1092-
1093- /* Write Address */
1094- NFADDR = i & 0xff;
1095- NFADDR = (i >> 9) & 0xff;
1096- NFADDR = (i >> 17) & 0xff;
1097- NFADDR = (i >> 25) & 0xff;
1098-
1099- wait_idle();
1100-
1101- for (j=0; j < NAND_SECTOR_SIZE; j++, i++) {
1102- *buf = (NFDATA & 0xff);
1103- buf++;
1104- }
1105+ j = nand_read_page_ll(buf, i);
1106+ i += j;
1107+ buf += j;
1108 }
1109
1110 /* chip Disable */
1111- NFCONF |= 0x800; /* chip disable */
1112+ nand_deselect();
1113
1114 return 0;
1115 }
1116Index: u-boot/cpu/arm920t/s3c24x0/nand.c
1117===================================================================
1118--- u-boot.orig/cpu/arm920t/s3c24x0/nand.c
1119+++ u-boot/cpu/arm920t/s3c24x0/nand.c
1120@@ -36,24 +36,54 @@
1121 #define __REGi(x) (*(volatile unsigned int *)(x))
1122
1123 #define NF_BASE 0x4e000000
1124+
1125 #define NFCONF __REGi(NF_BASE + 0x0)
1126-#define NFCMD __REGb(NF_BASE + 0x4)
1127-#define NFADDR __REGb(NF_BASE + 0x8)
1128-#define NFDATA __REGb(NF_BASE + 0xc)
1129-#define NFSTAT __REGb(NF_BASE + 0x10)
1130+
1131+#if defined(CONFIG_S3C2410)
1132+
1133+#define oNFCMD 0x4
1134+#define oNFADDR 0x8
1135+#define oNFDATA 0xc
1136+#define oNFSTAT 0x10
1137 #define NFECC0 __REGb(NF_BASE + 0x14)
1138 #define NFECC1 __REGb(NF_BASE + 0x15)
1139 #define NFECC2 __REGb(NF_BASE + 0x16)
1140+#define NFCONF_nFCE (1<<11)
1141
1142 #define S3C2410_NFCONF_EN (1<<15)
1143 #define S3C2410_NFCONF_512BYTE (1<<14)
1144 #define S3C2410_NFCONF_4STEP (1<<13)
1145 #define S3C2410_NFCONF_INITECC (1<<12)
1146-#define S3C2410_NFCONF_nFCE (1<<11)
1147 #define S3C2410_NFCONF_TACLS(x) ((x)<<8)
1148 #define S3C2410_NFCONF_TWRPH0(x) ((x)<<4)
1149 #define S3C2410_NFCONF_TWRPH1(x) ((x)<<0)
1150
1151+#elif defined(CONFIG_S3C2440)
1152+
1153+#define oNFCMD 0x8
1154+#define oNFADDR 0xc
1155+#define oNFDATA 0x10
1156+#define oNFSTAT 0x20
1157+
1158+#define NFCONT __REGi(NF_BASE + 0x04)
1159+#define NFMECC0 __REGi(NF_BASE + 0x2C)
1160+#define NFCONF_nFCE (1<<1)
1161+#define S3C2440_NFCONF_INITECC (1<<4)
1162+#define S3C2440_NFCONF_MAINECCLOCK (1<<5)
1163+#define nand_select() (NFCONT &= ~(1 << 1))
1164+#define nand_deselect() (NFCONT |= (1 << 1))
1165+#define nand_clear_RnB() (NFSTAT |= (1 << 2))
1166+#define nand_detect_RB() { while(!(NFSTAT&(1<<2))); }
1167+#define nand_wait() { while(!(NFSTAT & 0x4)); } /* RnB_TransDectect */
1168+
1169+#endif
1170+
1171+#define NFCMD __REGb(NF_BASE + oNFCMD)
1172+#define NFADDR __REGb(NF_BASE + oNFADDR)
1173+#define NFDATA __REGb(NF_BASE + oNFDATA)
1174+#define NFSTAT __REGb(NF_BASE + oNFSTAT)
1175+
1176+
1177 static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd)
1178 {
1179 struct nand_chip *chip = mtd->priv;
1180@@ -62,23 +92,31 @@
1181
1182 switch (cmd) {
1183 case NAND_CTL_SETNCE:
1184- NFCONF &= ~S3C2410_NFCONF_nFCE;
1185+#if defined(CONFIG_S3C2410)
1186+ NFCONF &= ~NFCONF_nFCE;
1187+#elif defined(CONFIG_S3C2440)
1188+ NFCONT &= ~NFCONF_nFCE;
1189+#endif
1190 DEBUGN("NFCONF=0x%08x\n", NFCONF);
1191 break;
1192 case NAND_CTL_CLRNCE:
1193- NFCONF |= S3C2410_NFCONF_nFCE;
1194+#if defined(CONFIG_S3C2410)
1195+ NFCONF |= NFCONF_nFCE;
1196+#elif defined(CONFIG_S3C2440)
1197+ NFCONT &= ~NFCONF_nFCE;
1198+#endif
1199 DEBUGN("NFCONF=0x%08x\n", NFCONF);
1200 break;
1201 case NAND_CTL_SETALE:
1202- chip->IO_ADDR_W = NF_BASE + 0x8;
1203+ chip->IO_ADDR_W = NF_BASE + oNFADDR;
1204 DEBUGN("SETALE\n");
1205 break;
1206 case NAND_CTL_SETCLE:
1207- chip->IO_ADDR_W = NF_BASE + 0x4;
1208+ chip->IO_ADDR_W = NF_BASE + oNFCMD;
1209 DEBUGN("SETCLE\n");
1210 break;
1211 default:
1212- chip->IO_ADDR_W = NF_BASE + 0xc;
1213+ chip->IO_ADDR_W = NF_BASE + oNFDATA;
1214 break;
1215 }
1216 return;
1217@@ -180,16 +218,21 @@
1218 /* initialize hardware */
1219 twrph0 = 3; twrph1 = 0; tacls = 0;
1220
1221+#if defined(CONFIG_S3C2410)
1222 cfg = S3C2410_NFCONF_EN;
1223 cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
1224 cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
1225 cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
1226
1227 NFCONF = cfg;
1228- //NFCONF = 0xf842;
1229+#elif defined(CONFIG_S3C2440)
1230+ twrph0 = 7; twrph1 = 7; tacls = 7;
1231+ NFCONF = (tacls<<12)|(twrph0<<8)|(twrph1<<4)|(0<<0);
1232+ NFCONT = (0<<13)|(0<<12)|(0<<10)|(0<<9)|(0<<8)|(1<<6)|(1<<5)|(1<<4)|(1<<1)|(1<<0);
1233+#endif
1234
1235 /* initialize nand_chip data structure */
1236- nand->IO_ADDR_R = nand->IO_ADDR_W = 0x4e00000c;
1237+ nand->IO_ADDR_R = nand->IO_ADDR_W = NF_BASE + oNFDATA;
1238
1239 /* read_buf and write_buf are default */
1240 /* read_byte and write_byte are default */
1241@@ -214,12 +257,23 @@
1242 nand->options = 0;
1243 #endif
1244
1245+#if defined(CONFIG_S3C2440)
1246+/*
1247+ nand_select();
1248+ nand_clear_RnB();
1249+ NFCMD = NAND_CMD_RESET;
1250+ { volatile int i; for (i = 0; i < 10; i ++); }
1251+ nand_detect_RB();
1252+ nand_deselect();
1253+*/
1254+#endif
1255+
1256 DEBUGN("end of nand_init\n");
1257
1258 return 0;
1259 }
1260
1261 #else
1262- #error "U-Boot legacy NAND support not available for S3C2410"
1263+ #error "U-Boot legacy NAND support not available for S3C24xx"
1264 #endif
1265 #endif
1266Index: u-boot/cpu/arm920t/s3c24x0/mmc.c
1267===================================================================
1268--- u-boot.orig/cpu/arm920t/s3c24x0/mmc.c
1269+++ u-boot/cpu/arm920t/s3c24x0/mmc.c
1270@@ -137,6 +137,9 @@
1271 dcon |= S3C2410_SDIDCON_RXAFTERCMD|S3C2410_SDIDCON_XFER_RXSTART;
1272 if (wide)
1273 dcon |= S3C2410_SDIDCON_WIDEBUS;
1274+#if defined(CONFIG_S3C2440)
1275+ dcon |= S3C2440_SDIDCON_DS_WORD | S3C2440_SDIDCON_DATSTART;
1276+#endif
1277 sdi->SDIDCON = dcon;
1278
1279 /* send read command */
1280@@ -394,13 +397,18 @@
1281
1282 clk_power->CLKCON |= (1 << 9);
1283
1284+ sdi->SDIBSIZE = 512;
1285+#if defined(CONFIG_S3C2410)
1286 /* S3C2410 has some bug that prevents reliable operation at higher speed */
1287 //sdi->SDIPRE = 0x3e; /* SDCLK = PCLK/2 / (SDIPRE+1) = 396kHz */
1288- sdi->SDIPRE = 0x02; /* SDCLK = PCLK/2 / (SDIPRE+1) = 396kHz */
1289- sdi->SDIBSIZE = 512;
1290+ sdi->SDIPRE = 0x02; /* 2410: SDCLK = PCLK/2 / (SDIPRE+1) = 11MHz */
1291 sdi->SDIDTIMER = 0xffff;
1292+#elif defined(CONFIG_S3C2440)
1293+ sdi->SDIPRE = 0x05; /* 2410: SDCLK = PCLK / (SDIPRE+1) = 11MHz */
1294+ sdi->SDIDTIMER = 0x7fffff;
1295+#endif
1296 sdi->SDIIMSK = 0x0;
1297- sdi->SDICON = S3C2410_SDICON_FIFORESET|S3C2440_SDICON_MMCCLOCK;
1298+ sdi->SDICON = S3C2410_SDICON_FIFORESET|S3C2410_SDICON_CLOCKTYPE;
1299 udelay(125000); /* FIXME: 74 SDCLK cycles */
1300
1301 mmc_csd.c_size = 0;
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2443.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2443.patch
new file mode 100644
index 0000000000..62ae5592ab
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-s3c2443.patch
@@ -0,0 +1,256 @@
1Index: u-boot/cpu/arm920t/start.S
2===================================================================
3--- u-boot.orig/cpu/arm920t/start.S
4+++ u-boot/cpu/arm920t/start.S
5@@ -35,6 +35,8 @@
6 #include <s3c2410.h>
7 #elif defined(CONFIG_S3C2440)
8 #include <s3c2440.h>
9+#elif defined(CONFIG_S3C2443)
10+#include <s3c2443.h>
11 #endif
12
13
14@@ -164,9 +166,15 @@
15 # define UPLLCON_val ((0x3c << 12) + (0x4 << 4) + 0x2)
16 # define CLKDIVN_val 7 /* FCLK:HCLK:PCLK = 1:3:6 */
17 # define CAMDIVN 0x4C000018
18+#elif defined(CONFIG_S3C2443)
19+# define INTSUBMSK_val 0x1fffffff
20+# define EPLLCON_val ((40 << 16) | (1 << 8) | (1)) /* 96 MHz */
21+# define MPLLCON_val ((81 << 16) | (2 << 8) | (0)) /* 1068 MHz */
22+# define CLKDIV0_val ((8 << 9) | (1 << 4) | (1 << 3) | (1 << 2)
23 #endif
24
25-#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
26+#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || \
27+ defined(CONFIG_S3C2440) || defined(CONFIG_S3C2443)
28 ldr r0, =pWTCON
29 mov r1, #0x0
30 str r1, [r0]
31@@ -177,7 +185,7 @@
32 mov r1, #0xffffffff
33 ldr r0, =INTMSK
34 str r1, [r0]
35-# if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
36+# if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) || defined(CONFIG_S3C2443)
37 ldr r1, =INTSUBMSK_val
38 ldr r0, =INTSUBMSK
39 str r1, [r0]
40@@ -196,6 +204,43 @@
41 mcr p15, 0, r1, c1, c0, 0
42
43
44+#if defined(CONFIG_S3C2443)
45+#define LOCKCON0 0x4c000000
46+#define LOCKCON1 0x4c000004
47+#define MPLLCON 0x4c000010
48+#define EPLLCON 0x4c000018
49+
50+ ldr r0, =CLKDIV0
51+ ldr r1, =CLKDIV0_val
52+ str r1, [r0]
53+
54+ /* set safe (way too long) locktime for both PLLs */
55+ ldr r0, =LOCKCON0
56+ mov r1, #0xffffff
57+ str r1, [r0]
58+ ldr r0, =LOCKCON1
59+ str r1, [r0]
60+
61+ /* configure MPLL */
62+ ldr r0, =MPLLCON
63+ ldr r1, =MPLLCON_val
64+ str r1, [r0]
65+
66+ /* select MPLL clock out for SYSCLK */
67+ ldr r0, =CLKSRC
68+ ldr r1, [r0]
69+ orr r1, r1, #0x10
70+ str r1, [r0]
71+
72+#if 0
73+ /* configure EPLL */
74+ ldr r0, =EPLLCON
75+ ldr r1, =EPLLCON_val
76+ str r1, [r0]
77+#endif
78+
79+
80+#else /* i.e. 2440, 2410 and 2440 */
81 #define LOCKTIME 0x4c000000
82 #define UPLLCON 0x4c000008
83
84@@ -223,6 +268,7 @@
85 ldr r0, =CLKDIVN
86 mov r1, #CLKDIVN_val
87 str r1, [r0]
88+#endif
89
90 #if 1
91 /* enable uart */
92@@ -249,7 +295,7 @@
93 str r1, [r0, #0x28]
94 #endif
95
96-#endif /* CONFIG_S3C2400 || CONFIG_S3C2410 || CONFIG_S3C2440 */
97+#endif /* CONFIG_S3C2400 || CONFIG_S3C2410 || CONFIG_S3C2440 || CONFIG_S3C2443 */
98
99 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
100 #ifndef CONFIG_LL_INIT_NAND_ONLY
101Index: u-boot/cpu/arm920t/s3c24x0/interrupts.c
102===================================================================
103--- u-boot.orig/cpu/arm920t/s3c24x0/interrupts.c
104+++ u-boot/cpu/arm920t/s3c24x0/interrupts.c
105@@ -31,7 +31,8 @@
106
107 #include <common.h>
108 #if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || \
109- defined(CONFIG_S3C2440) || defined (CONFIG_TRAB)
110+ defined(CONFIG_S3C2440) || defined(CONFIG_S3C2443) || \
111+ defined (CONFIG_TRAB)
112
113 #include <arm920t.h>
114 #if defined(CONFIG_S3C2400)
115@@ -40,6 +41,8 @@
116 #include <s3c2410.h>
117 #elif defined(CONFIG_S3C2440)
118 #include <s3c2440.h>
119+#elif defined(CONFIG_S3C2443)
120+#include <s3c2443.h>
121 #endif
122
123 int timer_load_val = 0;
124@@ -186,6 +189,7 @@
125 #elif defined(CONFIG_SBC2410X) || \
126 defined(CONFIG_SMDK2410) || \
127 defined(CONFIG_SMDK2440) || \
128+ defined(CONFIG_SMDK2443) || \
129 defined(CONFIG_VCMA9)
130 tbclk = CFG_HZ;
131 #else
132Index: u-boot/drivers/usbdcore_s3c2410.c
133===================================================================
134--- u-boot.orig/drivers/usbdcore_s3c2410.c
135+++ u-boot/drivers/usbdcore_s3c2410.c
136@@ -24,7 +24,8 @@
137
138 #include <config.h>
139
140-#if (defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)) && defined(CONFIG_USB_DEVICE)
141+#if (defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) || \
142+ defined(CONFIG_S3C2443)) && defined(CONFIG_USB_DEVICE)
143
144 #include <common.h>
145
146Index: u-boot/include/s3c2443.h
147===================================================================
148--- /dev/null
149+++ u-boot/include/s3c2443.h
150@@ -0,0 +1,106 @@
151+/*
152+ * (C) Copyright 2007 OpenMoko, Inc.
153+ * Author: Harald Welte <laforge@openmoko.org>
154+ *
155+ * See file CREDITS for list of people who contributed to this
156+ * project.
157+ *
158+ * This program is free software; you can redistribute it and/or
159+ * modify it under the terms of the GNU General Public License as
160+ * published by the Free Software Foundation; either version 2 of
161+ * the License, or (at your option) any later version.
162+ *
163+ * This program is distributed in the hope that it will be useful,
164+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
165+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
166+ * GNU General Public License for more details.
167+ *
168+ * You should have received a copy of the GNU General Public License
169+ * along with this program; if not, write to the Free Software
170+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
171+ * MA 02111-1307 USA
172+ */
173+
174+#ifndef __S3C2443_H
175+#define __S3C2443_H
176+
177+#include <s3c24x0.h>
178+
179+/* CLOCK & POWER MANAGEMENT (see S3C2443 manual chapter 2) */
180+typedef struct {
181+ S3C24X0_REG32 LOCKCON0;
182+ S3C24X0_REG32 LOCKCON1;
183+ S3C24X0_REG32 OSCSET;
184+ S3C24X0_REG32 res1;
185+ S3C24X0_REG32 MPLLCON;
186+ S3C24X0_REG32 res2;
187+ S3C24X0_REG32 EPLLCON;
188+ S3C24X0_REG32 res3;
189+ S3C24X0_REG32 CLKSRC;
190+ S3C24X0_REG32 CLKDIV0;
191+ S3C24X0_REG32 CLKDIV1;
192+ S3C24X0_REG32 res4;
193+ S3C24X0_REG32 HCLKCON;
194+ S3C24X0_REG32 PCLKCON;
195+ S3C24X0_REG32 SCLKCON;
196+ S3C24X0_REG32 res5;
197+ S3C24X0_REG32 PWRMODE;
198+ S3C24X0_REG32 SWRST;
199+ S3C24X0_REG32 res6[2];
200+ S3C24X0_REG32 BUSPRI0;
201+ S3C24X0_REG32 res7[3];
202+} /*__attribute__((__packed__))*/ S3C2443_CLOCK_POWER;
203+
204+/* NAND FLASH (see S3C2443 manual chapter 7) */
205+typedef struct {
206+ S3C24X0_REG32 NFCONF;
207+ S3C24X0_REG32 NFCONT;
208+ S3C24X0_REG32 NFCMD;
209+ S3C24X0_REG32 NFADDR;
210+ S3C24X0_REG32 NFDATA;
211+ S3C24X0_REG32 NFMECCD0;
212+ S3C24X0_REG32 NFMECCD1;
213+ S3C24X0_REG32 NFSECCD;
214+ S3C24X0_REG32 NFSBLK;
215+ S3C24X0_REG32 NFEBLK;
216+ S3C24X0_REG32 NFSTAT;
217+ S3C24X0_REG32 NFECCERR0;
218+ S3C24X0_REG32 NFECCERR1;
219+ S3C24X0_REG32 NFMECC0;
220+ S3C24X0_REG32 NFMECC1;
221+ S3C24X0_REG32 NFSECC;
222+ S3C24X0_REG32 NFMLCBITPT;
223+} /*__attribute__((__packed__))*/ S3C2443_NAND;
224+
225+/* STATIC MEMORY (see S3C2443 manual chapter 5) */
226+struct s3c2443_sm_bank {
227+ S3C24X0_REG32 SMBIDCYR;
228+ S3C24X0_REG32 SMBWSTRDR;
229+ S3C24X0_REG32 SMBWSTWRR;
230+ S3C24X0_REG32 SMBWSTOENR;
231+ S3C24X0_REG32 SMBWSTWENR;
232+ S3C24X0_REG32 SMBCR;
233+ S3C24X0_REG32 SMBSR;
234+ S3C24X0_REG32 SMBWSTBRDR;
235+};
236+
237+typedef struct {
238+ struct s3c2443_sm_bank bank[5]; /* 0x4f000000..0x4f0000bf */
239+ S3C24X0_REG32 res[0x40]; /* 0x4f0000c0..0x4f0000ff */
240+ S3C24X0_REG32 SMBONETYPER;
241+ S3C24X0_REG32 SMCSR;
242+ S3C24X0_REG32 SMCCR;
243+} /*__attribute__((__packed__))*/ S3C2443_SMEM;
244+
245+
246+/* MOBILE DRAM (see S3C2443 manual chapter 6) */
247+typedef struct {
248+ S3C24X0_REG32 BANKCFG;
249+ S3C24X0_REG32 BANKCON1;
250+ S3C24X0_REG32 BANKCON2;
251+ S3C24X0_REG32 BANKCON3;
252+ S3C24X0_REG32 REFRESH;
253+ S3C24X0_REG32 TIMEOUT;
254+} /*__attribute__((__packed__))*/ S3C2443_MDRAM
255+
256+#endif /* __S3C2443_H */
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-smdk2440.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-smdk2440.patch
new file mode 100644
index 0000000000..09392ad2cf
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-smdk2440.patch
@@ -0,0 +1,1481 @@
1Add support for the Samsung SMDK2440 development board
2
3Index: u-boot/Makefile
4===================================================================
5--- u-boot.orig/Makefile
6+++ u-boot/Makefile
7@@ -2035,6 +2035,9 @@
8 smdk2410_config : unconfig
9 @$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 NULL s3c24x0
10
11+smdk2440_config : unconfig
12+ @$(MKCONFIG) $(@:_config=) arm arm920t smdk2440 NULL s3c24x0
13+
14 SX1_config : unconfig
15 @$(MKCONFIG) $(@:_config=) arm arm925t sx1
16
17Index: u-boot/include/configs/smdk2440.h
18===================================================================
19--- /dev/null
20+++ u-boot/include/configs/smdk2440.h
21@@ -0,0 +1,296 @@
22+/*
23+ * (C) Copyright 2002
24+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
25+ * Marius Groeger <mgroeger@sysgo.de>
26+ * Gary Jennejohn <gj@denx.de>
27+ * David Mueller <d.mueller@elsoft.ch>
28+ *
29+ * Configuation settings for the SAMSUNG SMDK2440 board.
30+ *
31+ * See file CREDITS for list of people who contributed to this
32+ * project.
33+ *
34+ * This program is free software; you can redistribute it and/or
35+ * modify it under the terms of the GNU General Public License as
36+ * published by the Free Software Foundation; either version 2 of
37+ * the License, or (at your option) any later version.
38+ *
39+ * This program is distributed in the hope that it will be useful,
40+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
41+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
42+ * GNU General Public License for more details.
43+ *
44+ * You should have received a copy of the GNU General Public License
45+ * along with this program; if not, write to the Free Software
46+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
47+ * MA 02111-1307 USA
48+ */
49+
50+#ifndef __CONFIG_H
51+#define __CONFIG_H
52+
53+#if 0
54+/* If we want to start u-boot from usb bootloader in NOR flash */
55+#define CONFIG_SKIP_RELOCATE_UBOOT 1
56+#define CONFIG_SKIP_LOWLEVEL_INIT 1
57+#else
58+/* If we want to start u-boot directly from within NAND flash */
59+#define CONFIG_LL_INIT_NAND_ONLY
60+#define CONFIG_S3C2410_NAND_BOOT 1
61+#define CONFIG_S3C2410_NAND_SKIP_BAD 1
62+#endif
63+
64+#define CFG_UBOOT_SIZE 0x40000 /* size of u-boot, for NAND loading */
65+
66+/*
67+ * High Level Configuration Options
68+ * (easy to change)
69+ */
70+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
71+#define CONFIG_S3C2440 1 /* in a SAMSUNG S3C2440 SoC */
72+#define CONFIG_SMDK2440 1 /* on a SAMSUNG SMDK2440 Board */
73+
74+/* input clock of PLL */
75+#define CONFIG_SYS_CLK_FREQ 16934400/* SMDK2440 has 16.9344MHz input clock */
76+
77+
78+#define USE_920T_MMU 1
79+#define CONFIG_USE_IRQ 1
80+//#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
81+
82+/*
83+ * Size of malloc() pool
84+ */
85+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 2048*1024)
86+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
87+
88+/*
89+ * Hardware drivers
90+ */
91+#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
92+#define CS8900_BASE 0x19000300
93+#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
94+
95+/*
96+ * select serial console configuration
97+ */
98+#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2440 */
99+#define CONFIG_HWFLOW 1
100+
101+/************************************************************
102+ * RTC
103+ ************************************************************/
104+#define CONFIG_RTC_S3C24X0 1
105+
106+/* allow to overwrite serial and ethaddr */
107+#define CONFIG_ENV_OVERWRITE
108+
109+#define CONFIG_BAUDRATE 115200
110+
111+/***********************************************************
112+ * Command definition
113+ ***********************************************************/
114+#define CONFIG_COMMANDS \
115+ (CONFIG_CMD_DFL | \
116+ /*CFG_CMD_BSP | */ \
117+ CFG_CMD_CACHE | \
118+ CFG_CMD_DATE | \
119+ /*CFG_CMD_DHCP | */ \
120+ CFG_CMD_DIAG | \
121+ CFG_CMD_ELF | \
122+ CFG_CMD_EXT2 | \
123+ CFG_CMD_FAT | \
124+ /*CFG_CMD_HWFLOW | */ \
125+ /* CFG_CMD_IDE | */ \
126+ /* CFG_CMD_IRQ | */ \
127+ CFG_CMD_JFFS2 | \
128+ CFG_CMD_MMC | \
129+ CFG_CMD_NAND | \
130+ CFG_CMD_PING | \
131+ CFG_CMD_PORTIO | \
132+ CFG_CMD_REGINFO | \
133+ CFG_CMD_SAVES | \
134+ CFG_CMD_USB)
135+
136+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
137+#include <cmd_confdefs.h>
138+
139+#define CONFIG_BOOTDELAY 3
140+#define CONFIG_BOOTARGS "root=/dev/mtdblock4 rootfstype=jffs2 console=ttySAC2,115200 loglevel=8"
141+#define CONFIG_ETHADDR 00:0c:20:02:0a:5b
142+#define CONFIG_NETMASK 255.255.255.0
143+#define CONFIG_IPADDR 192.168.1.100
144+#define CONFIG_SERVERIP 192.168.1.21
145+/*#define CONFIG_BOOTFILE "elinos-lart" */
146+//#define CONFIG_BOOTCOMMAND "nand read 0x32000000 0x34000 0x200000; bootm"
147+#define CONFIG_BOOTCOMMAND "nand read.e 0x32000000 0x100000 0x200000; bootm"
148+
149+#define CONFIG_DOS_PARTITION 1
150+
151+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
152+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
153+/* what's this ? it's not used anywhere */
154+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
155+#endif
156+
157+/*
158+ * Miscellaneous configurable options
159+ */
160+#define CFG_LONGHELP /* undef to save memory */
161+#define CFG_PROMPT "SMDK2440 # " /* Monitor Command Prompt */
162+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
163+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
164+#define CFG_MAXARGS 32 /* max number of command args */
165+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
166+
167+#define CFG_MEMTEST_START 0x30000000 /* memtest works on */
168+#define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
169+
170+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
171+
172+#define CFG_LOAD_ADDR 0x32000000 /* default load address */
173+
174+/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
175+/* it to wrap 100 times (total 1562500) to get 1 sec. */
176+#define CFG_HZ 1562500
177+
178+/* valid baudrates */
179+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
180+
181+/*-----------------------------------------------------------------------
182+ * Stack sizes
183+ *
184+ * The stack sizes are set up in start.S using the settings below
185+ */
186+#define CONFIG_STACKSIZE (512*1024) /* regular stack */
187+#ifdef CONFIG_USE_IRQ
188+#define CONFIG_STACKSIZE_IRQ (8*1024) /* IRQ stack */
189+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
190+#endif
191+
192+/* IDE/ATA config */
193+
194+#if 0
195+#define CFG_IDE_MAXBUS 1
196+#define CFG_IDE_MAXDEVICE 2
197+#define CFG_IDE_PREINIT 0
198+
199+#define CFG_ATA_BASE_ADDR
200+#endif
201+
202+#define CONFIG_USB_OHCI 1
203+
204+#define CONFIG_USB_DEVICE 1
205+#define CONFIG_USB_TTY 1
206+#define CFG_CONSOLE_IS_IN_ENV 1
207+#define CONFIG_USBD_VENDORID 0x1457 /* FIC */
208+#define CONFIG_USBD_PRODUCTID_GSERIAL 0x5120 /* gserial */
209+#define CONFIG_USBD_PRODUCTID_CDCACM 0x511b /* SMDK2440 CDC ACM */
210+#define CONFIG_USBD_MANUFACTURER "OpenMoko, Inc."
211+#define CONFIG_USBD_PRODUCT_NAME "S3C2440 Bootloader " U_BOOT_VERSION
212+#define CONFIG_EXTRA_ENV_SETTINGS "usbtty=cdc_acm\0"
213+#define CONFIG_USBD_DFU 1
214+#define CONFIG_USBD_DFU_XFER_SIZE 4096
215+#define CONFIG_USBD_DFU_INTERFACE 2
216+
217+/*-----------------------------------------------------------------------
218+ * Physical Memory Map
219+ */
220+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
221+#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
222+#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
223+
224+#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
225+
226+#define CFG_FLASH_BASE PHYS_FLASH_1
227+
228+/*-----------------------------------------------------------------------
229+ * FLASH and environment organization
230+ */
231+
232+#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
233+#if 0
234+#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
235+#endif
236+
237+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
238+#ifdef CONFIG_AMD_LV800
239+#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
240+#define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
241+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
242+#endif
243+#ifdef CONFIG_AMD_LV400
244+#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
245+#define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
246+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) /* addr of environment */
247+#endif
248+
249+/* timeout values are in ticks */
250+#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */
251+#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */
252+
253+#define CFG_ENV_IS_IN_NAND 1
254+#define CFG_ENV_SIZE 0x20000 /* 128k Total Size of Environment Sector */
255+#define CFG_ENV_OFFSET_OOB 1
256+#define CFG_PREBOOT_OVERRIDE 1
257+
258+#define NAND_MAX_CHIPS 1
259+#define CFG_NAND_BASE 0x4e000000
260+#define CFG_MAX_NAND_DEVICE 1
261+
262+#define CONFIG_MMC 1
263+#define CFG_MMC_BASE 0xff000000
264+
265+#define CONFIG_EXT2 1
266+
267+#define CONFIG_NEW_QT2440 0
268+
269+/* FAT driver in u-boot is broken currently */
270+#define CONFIG_FAT 1
271+#define CONFIG_SUPPORT_VFAT
272+
273+#if 1
274+/* JFFS2 driver */
275+#define CONFIG_JFFS2_CMDLINE 1
276+#define CONFIG_JFFS2_NAND 1
277+#define CONFIG_JFFS2_NAND_DEV 0
278+//#define CONFIG_JFFS2_NAND_OFF 0x634000
279+//#define CONFIG_JFFS2_NAND_SIZE 0x39cc000
280+#endif
281+
282+/* ATAG configuration */
283+#define CONFIG_INITRD_TAG 1
284+#define CONFIG_SETUP_MEMORY_TAGS 1
285+#define CONFIG_CMDLINE_TAG 1
286+#if 0
287+#define CONFIG_SERIAL_TAG 1
288+#define CONFIG_REVISION_TAG 1
289+#endif
290+
291+
292+#if 0
293+#define CONFIG_VIDEO
294+#define CONFIG_VIDEO_S3C2410
295+#define CONFIG_CFB_CONSOLE
296+#define CONFIG_VIDEO_LOGO
297+#define CONFIG_VGA_AS_SINGLE_DEVICE
298+
299+#define VIDEO_KBD_INIT_FCT 0
300+#define VIDEO_TSTC_FCT serial_tstc
301+#define VIDEO_GETC_FCT serial_getc
302+
303+#define LCD_VIDEO_ADDR 0x33d00000
304+#endif
305+
306+#define CONFIG_S3C2410_NAND_BBT 1
307+//#define CONFIG_S3C2410_NAND_HWECC 1
308+
309+#define CFG_NAND_YAFFS_WRITE
310+#define CFG_NAND_YAFFS1_NEW_OOB_LAYOUT
311+
312+#define MTDIDS_DEFAULT "nand0=smdk2440-nand"
313+#define MTPARTS_DEFAULT "smdk2440-nand:0x00100000(u-boot),0x00200000(kernel),0x00200000(update),0x00100000(splash),0x01400000(jffs2),-(temp)"
314+#define CFG_NAND_DYNPART_MTD_KERNEL_NAME "smdk2440-nand"
315+#define CONFIG_NAND_DYNPART
316+
317+#endif /* __CONFIG_H */
318Index: u-boot/include/configs/smdk2440nand.h
319===================================================================
320--- /dev/null
321+++ u-boot/include/configs/smdk2440nand.h
322@@ -0,0 +1,47 @@
323+/*
324+ * (C) Copyright 2004
325+ * Samsung Electronics : SW.LEE <hitchcar@samsung.com>
326+ *
327+ * This program is free software; you can redistribute it and/or
328+ * modify it under the terms of the GNU General Public License as
329+ * published by the Free Software Foundation; either version 2 of
330+ * the License, or (at your option) any later version.
331+ *
332+ */
333+
334+#ifndef __SMDK2440_NAND_H
335+#define __SMDK2440_NAND_H
336+
337+#define CFG_ENV_NAND_BLOCK 8
338+
339+#if 0 //old flash
340+#define NAND_OOB_SIZE (16)
341+#define NAND_PAGES_IN_BLOCK (32)
342+#define NAND_PAGE_SIZE (512)
343+
344+#define NAND_BLOCK_SIZE (NAND_PAGE_SIZE*NAND_PAGES_IN_BLOCK)
345+#define NAND_BLOCK_MASK (NAND_BLOCK_SIZE - 1)
346+#define NAND_PAGE_MASK (NAND_PAGE_SIZE - 1)
347+#else //new flash
348+#define NAND_OOB_SIZE (64)
349+#define NAND_PAGES_IN_BLOCK (64)
350+#define NAND_PAGE_SIZE (2048)
351+
352+#define NAND_BLOCK_SIZE (NAND_PAGE_SIZE*NAND_PAGES_IN_BLOCK)
353+#define NAND_BLOCK_MASK (NAND_BLOCK_SIZE - 1)
354+#define NAND_PAGE_MASK (NAND_PAGE_SIZE - 1)
355+
356+#endif
357+
358+
359+
360+//#define NAND_3_ADDR_CYCLE 1
361+//#define S3C24X0_16BIT_NAND 1
362+
363+#ifdef KINGFISH
364+#undef S3C24X0_16BIT_NAND
365+#define S3C24X0_16BIT_NAND 1
366+#endif
367+
368+#endif
369+
370Index: u-boot/board/smdk2440/Makefile
371===================================================================
372--- /dev/null
373+++ u-boot/board/smdk2440/Makefile
374@@ -0,0 +1,67 @@
375+#
376+# (C) Copyright 2000-2006
377+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
378+#
379+# See file CREDITS for list of people who contributed to this
380+# project.
381+#
382+# This program is free software; you can redistribute it and/or
383+# modify it under the terms of the GNU General Public License as
384+# published by the Free Software Foundation; either version 2 of
385+# the License, or (at your option) any later version.
386+#
387+# This program is distributed in the hope that it will be useful,
388+# but WITHOUT ANY WARRANTY; without even the implied warranty of
389+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
390+# GNU General Public License for more details.
391+#
392+# You should have received a copy of the GNU General Public License
393+# along with this program; if not, write to the Free Software
394+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
395+# MA 02111-1307 USA
396+#
397+
398+include $(TOPDIR)/config.mk
399+
400+LIB = $(obj)lib$(BOARD).a
401+
402+COBJS := smdk2440.o flash.o udc.o
403+SOBJS := lowlevel_init.o
404+
405+.PHONY: all
406+
407+all: $(LIB) lowlevel_foo.bin
408+
409+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
410+OBJS := $(addprefix $(obj),$(COBJS))
411+SOBJS := $(addprefix $(obj),$(SOBJS))
412+
413+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
414+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
415+
416+lowlevel_foo.o: lowlevel_foo.S
417+ $(CC) -c -DTEXT_BASE=0x33F80000 -march=armv4 \
418+ -o lowlevel_foo.o lowlevel_foo.S
419+
420+lowlevel_foo: lowlevel_foo.o lowlevel_init.o lowlevel_foo.lds
421+ $(LD) -T ./lowlevel_foo.lds -Ttext 0x33f80000 -Bstatic \
422+ lowlevel_init.o lowlevel_foo.o -o lowlevel_foo
423+
424+lowlevel_foo.bin: lowlevel_foo
425+ $(CROSS_COMPILE)objcopy --gap-fill=0xff -O binary \
426+ lowlevel_foo lowlevel_foo.bin
427+
428+clean:
429+ rm -f $(SOBJS) $(OBJS)
430+
431+distclean: clean
432+ rm -f $(LIB) core *.bak .depend
433+
434+#########################################################################
435+
436+# defines $(obj).depend target
437+include $(SRCTREE)/rules.mk
438+
439+sinclude $(obj).depend
440+
441+#########################################################################
442Index: u-boot/board/smdk2440/config.mk
443===================================================================
444--- /dev/null
445+++ u-boot/board/smdk2440/config.mk
446@@ -0,0 +1,29 @@
447+#
448+# (C) Copyright 2002
449+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
450+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
451+#
452+# SAMSUNG SMDK2440 board with S3C2440 (ARM920T) cpu
453+#
454+# see http://www.samsung.com/ for more information on SAMSUNG
455+#
456+
457+CONFIG_USB_DFU_VENDOR=0x1457
458+CONFIG_USB_DFU_PRODUCT=0x511b
459+CONFIG_USB_DFU_REVISION=0x0100
460+
461+#
462+# SMDK2440 has 1 bank of 64 MB DRAM
463+#
464+# 3000'0000 to 3400'0000
465+#
466+# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000
467+# optionally with a ramdisk at 3080'0000
468+#
469+# we load ourself to 33F8'0000
470+#
471+# download area is 3300'0000
472+#
473+
474+
475+TEXT_BASE = 0x33F80000
476Index: u-boot/board/smdk2440/flash.c
477===================================================================
478--- /dev/null
479+++ u-boot/board/smdk2440/flash.c
480@@ -0,0 +1,433 @@
481+/*
482+ * (C) Copyright 2002
483+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
484+ * Alex Zuepke <azu@sysgo.de>
485+ *
486+ * See file CREDITS for list of people who contributed to this
487+ * project.
488+ *
489+ * This program is free software; you can redistribute it and/or
490+ * modify it under the terms of the GNU General Public License as
491+ * published by the Free Software Foundation; either version 2 of
492+ * the License, or (at your option) any later version.
493+ *
494+ * This program is distributed in the hope that it will be useful,
495+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
496+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
497+ * GNU General Public License for more details.
498+ *
499+ * You should have received a copy of the GNU General Public License
500+ * along with this program; if not, write to the Free Software
501+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
502+ * MA 02111-1307 USA
503+ */
504+
505+#include <common.h>
506+
507+ulong myflush (void);
508+
509+
510+#define FLASH_BANK_SIZE PHYS_FLASH_SIZE
511+#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
512+
513+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
514+
515+
516+#define CMD_READ_ARRAY 0x000000F0
517+#define CMD_UNLOCK1 0x000000AA
518+#define CMD_UNLOCK2 0x00000055
519+#define CMD_ERASE_SETUP 0x00000080
520+#define CMD_ERASE_CONFIRM 0x00000030
521+#define CMD_PROGRAM 0x000000A0
522+#define CMD_UNLOCK_BYPASS 0x00000020
523+
524+#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555 << 1)))
525+#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA << 1)))
526+
527+#define BIT_ERASE_DONE 0x00000080
528+#define BIT_RDY_MASK 0x00000080
529+#define BIT_PROGRAM_ERROR 0x00000020
530+#define BIT_TIMEOUT 0x80000000 /* our flag */
531+
532+#define READY 1
533+#define ERR 2
534+#define TMO 4
535+
536+/*-----------------------------------------------------------------------
537+ */
538+
539+ulong flash_init (void)
540+{
541+ int i, j;
542+ ulong size = 0;
543+
544+ for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
545+ ulong flashbase = 0;
546+
547+ flash_info[i].flash_id =
548+#if defined(CONFIG_AMD_LV400)
549+ (AMD_MANUFACT & FLASH_VENDMASK) |
550+ (AMD_ID_LV400B & FLASH_TYPEMASK);
551+#elif defined(CONFIG_AMD_LV800)
552+ (AMD_MANUFACT & FLASH_VENDMASK) |
553+ (AMD_ID_LV800B & FLASH_TYPEMASK);
554+#else
555+#error "Unknown flash configured"
556+#endif
557+ flash_info[i].size = FLASH_BANK_SIZE;
558+ flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
559+ memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
560+ if (i == 0)
561+ flashbase = PHYS_FLASH_1;
562+ else
563+ panic ("configured too many flash banks!\n");
564+ for (j = 0; j < flash_info[i].sector_count; j++) {
565+ if (j <= 3) {
566+ /* 1st one is 16 KB */
567+ if (j == 0) {
568+ flash_info[i].start[j] =
569+ flashbase + 0;
570+ }
571+
572+ /* 2nd and 3rd are both 8 KB */
573+ if ((j == 1) || (j == 2)) {
574+ flash_info[i].start[j] =
575+ flashbase + 0x4000 + (j -
576+ 1) *
577+ 0x2000;
578+ }
579+
580+ /* 4th 32 KB */
581+ if (j == 3) {
582+ flash_info[i].start[j] =
583+ flashbase + 0x8000;
584+ }
585+ } else {
586+ flash_info[i].start[j] =
587+ flashbase + (j - 3) * MAIN_SECT_SIZE;
588+ }
589+ }
590+ size += flash_info[i].size;
591+ }
592+
593+ flash_protect (FLAG_PROTECT_SET,
594+ CFG_FLASH_BASE,
595+ CFG_FLASH_BASE + monitor_flash_len - 1,
596+ &flash_info[0]);
597+
598+ flash_protect (FLAG_PROTECT_SET,
599+ CFG_ENV_ADDR,
600+ CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
601+
602+ return size;
603+}
604+
605+/*-----------------------------------------------------------------------
606+ */
607+void flash_print_info (flash_info_t * info)
608+{
609+ int i;
610+
611+ switch (info->flash_id & FLASH_VENDMASK) {
612+ case (AMD_MANUFACT & FLASH_VENDMASK):
613+ printf ("AMD: ");
614+ break;
615+ default:
616+ printf ("Unknown Vendor ");
617+ break;
618+ }
619+
620+ switch (info->flash_id & FLASH_TYPEMASK) {
621+ case (AMD_ID_LV400B & FLASH_TYPEMASK):
622+ printf ("1x Amd29LV400BB (4Mbit)\n");
623+ break;
624+ case (AMD_ID_LV800B & FLASH_TYPEMASK):
625+ printf ("1x Amd29LV800BB (8Mbit)\n");
626+ break;
627+ default:
628+ printf ("Unknown Chip Type\n");
629+ goto Done;
630+ break;
631+ }
632+
633+ printf (" Size: %ld MB in %d Sectors\n",
634+ info->size >> 20, info->sector_count);
635+
636+ printf (" Sector Start Addresses:");
637+ for (i = 0; i < info->sector_count; i++) {
638+ if ((i % 5) == 0) {
639+ printf ("\n ");
640+ }
641+ printf (" %08lX%s", info->start[i],
642+ info->protect[i] ? " (RO)" : " ");
643+ }
644+ printf ("\n");
645+
646+ Done:;
647+}
648+
649+/*-----------------------------------------------------------------------
650+ */
651+
652+int flash_erase (flash_info_t * info, int s_first, int s_last)
653+{
654+ ushort result;
655+ int iflag, cflag, prot, sect;
656+ int rc = ERR_OK;
657+ int chip;
658+
659+ /* first look for protection bits */
660+
661+ if (info->flash_id == FLASH_UNKNOWN)
662+ return ERR_UNKNOWN_FLASH_TYPE;
663+
664+ if ((s_first < 0) || (s_first > s_last)) {
665+ return ERR_INVAL;
666+ }
667+
668+ if ((info->flash_id & FLASH_VENDMASK) !=
669+ (AMD_MANUFACT & FLASH_VENDMASK)) {
670+ return ERR_UNKNOWN_FLASH_VENDOR;
671+ }
672+
673+ prot = 0;
674+ for (sect = s_first; sect <= s_last; ++sect) {
675+ if (info->protect[sect]) {
676+ prot++;
677+ }
678+ }
679+ if (prot)
680+ return ERR_PROTECTED;
681+
682+ /*
683+ * Disable interrupts which might cause a timeout
684+ * here. Remember that our exception vectors are
685+ * at address 0 in the flash, and we don't want a
686+ * (ticker) exception to happen while the flash
687+ * chip is in programming mode.
688+ */
689+ cflag = icache_status ();
690+ icache_disable ();
691+ iflag = disable_interrupts ();
692+
693+ /* Start erase on unprotected sectors */
694+ for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
695+ printf ("Erasing sector %2d ... ", sect);
696+
697+ /* arm simple, non interrupt dependent timer */
698+ reset_timer_masked ();
699+
700+ if (info->protect[sect] == 0) { /* not protected */
701+ vu_short *addr = (vu_short *) (info->start[sect]);
702+
703+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
704+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
705+ MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
706+
707+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
708+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
709+ *addr = CMD_ERASE_CONFIRM;
710+
711+ /* wait until flash is ready */
712+ chip = 0;
713+
714+ do {
715+ result = *addr;
716+
717+ /* check timeout */
718+ if (get_timer_masked () >
719+ CFG_FLASH_ERASE_TOUT) {
720+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
721+ chip = TMO;
722+ break;
723+ }
724+
725+ if (!chip
726+ && (result & 0xFFFF) & BIT_ERASE_DONE)
727+ chip = READY;
728+
729+ if (!chip
730+ && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
731+ chip = ERR;
732+
733+ } while (!chip);
734+
735+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
736+
737+ if (chip == ERR) {
738+ rc = ERR_PROG_ERROR;
739+ goto outahere;
740+ }
741+ if (chip == TMO) {
742+ rc = ERR_TIMOUT;
743+ goto outahere;
744+ }
745+
746+ printf ("ok.\n");
747+ } else { /* it was protected */
748+
749+ printf ("protected!\n");
750+ }
751+ }
752+
753+ if (ctrlc ())
754+ printf ("User Interrupt!\n");
755+
756+ outahere:
757+ /* allow flash to settle - wait 10 ms */
758+ udelay_masked (10000);
759+
760+ if (iflag)
761+ enable_interrupts ();
762+
763+ if (cflag)
764+ icache_enable ();
765+
766+ return rc;
767+}
768+
769+/*-----------------------------------------------------------------------
770+ * Copy memory to flash
771+ */
772+
773+volatile static int write_hword (flash_info_t * info, ulong dest, ushort data)
774+{
775+ vu_short *addr = (vu_short *) dest;
776+ ushort result;
777+ int rc = ERR_OK;
778+ int cflag, iflag;
779+ int chip;
780+
781+ /*
782+ * Check if Flash is (sufficiently) erased
783+ */
784+ result = *addr;
785+ if ((result & data) != data)
786+ return ERR_NOT_ERASED;
787+
788+
789+ /*
790+ * Disable interrupts which might cause a timeout
791+ * here. Remember that our exception vectors are
792+ * at address 0 in the flash, and we don't want a
793+ * (ticker) exception to happen while the flash
794+ * chip is in programming mode.
795+ */
796+ cflag = icache_status ();
797+ icache_disable ();
798+ iflag = disable_interrupts ();
799+
800+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
801+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
802+ MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS;
803+ *addr = CMD_PROGRAM;
804+ *addr = data;
805+
806+ /* arm simple, non interrupt dependent timer */
807+ reset_timer_masked ();
808+
809+ /* wait until flash is ready */
810+ chip = 0;
811+ do {
812+ result = *addr;
813+
814+ /* check timeout */
815+ if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
816+ chip = ERR | TMO;
817+ break;
818+ }
819+ if (!chip && ((result & 0x80) == (data & 0x80)))
820+ chip = READY;
821+
822+ if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) {
823+ result = *addr;
824+
825+ if ((result & 0x80) == (data & 0x80))
826+ chip = READY;
827+ else
828+ chip = ERR;
829+ }
830+
831+ } while (!chip);
832+
833+ *addr = CMD_READ_ARRAY;
834+
835+ if (chip == ERR || *addr != data)
836+ rc = ERR_PROG_ERROR;
837+
838+ if (iflag)
839+ enable_interrupts ();
840+
841+ if (cflag)
842+ icache_enable ();
843+
844+ return rc;
845+}
846+
847+/*-----------------------------------------------------------------------
848+ * Copy memory to flash.
849+ */
850+
851+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
852+{
853+ ulong cp, wp;
854+ int l;
855+ int i, rc;
856+ ushort data;
857+
858+ wp = (addr & ~1); /* get lower word aligned address */
859+
860+ /*
861+ * handle unaligned start bytes
862+ */
863+ if ((l = addr - wp) != 0) {
864+ data = 0;
865+ for (i = 0, cp = wp; i < l; ++i, ++cp) {
866+ data = (data >> 8) | (*(uchar *) cp << 8);
867+ }
868+ for (; i < 2 && cnt > 0; ++i) {
869+ data = (data >> 8) | (*src++ << 8);
870+ --cnt;
871+ ++cp;
872+ }
873+ for (; cnt == 0 && i < 2; ++i, ++cp) {
874+ data = (data >> 8) | (*(uchar *) cp << 8);
875+ }
876+
877+ if ((rc = write_hword (info, wp, data)) != 0) {
878+ return (rc);
879+ }
880+ wp += 2;
881+ }
882+
883+ /*
884+ * handle word aligned part
885+ */
886+ while (cnt >= 2) {
887+ data = *((vu_short *) src);
888+ if ((rc = write_hword (info, wp, data)) != 0) {
889+ return (rc);
890+ }
891+ src += 2;
892+ wp += 2;
893+ cnt -= 2;
894+ }
895+
896+ if (cnt == 0) {
897+ return ERR_OK;
898+ }
899+
900+ /*
901+ * handle unaligned tail bytes
902+ */
903+ data = 0;
904+ for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
905+ data = (data >> 8) | (*src++ << 8);
906+ --cnt;
907+ }
908+ for (; i < 2; ++i, ++cp) {
909+ data = (data >> 8) | (*(uchar *) cp << 8);
910+ }
911+
912+ return write_hword (info, wp, data);
913+}
914Index: u-boot/board/smdk2440/lowlevel_init.S
915===================================================================
916--- /dev/null
917+++ u-boot/board/smdk2440/lowlevel_init.S
918@@ -0,0 +1,167 @@
919+/*
920+ * Memory Setup stuff - taken from blob memsetup.S
921+ *
922+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
923+ * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
924+ *
925+ * Modified for the Samsung SMDK2410 by
926+ * (C) Copyright 2002
927+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
928+ *
929+ * See file CREDITS for list of people who contributed to this
930+ * project.
931+ *
932+ * This program is free software; you can redistribute it and/or
933+ * modify it under the terms of the GNU General Public License as
934+ * published by the Free Software Foundation; either version 2 of
935+ * the License, or (at your option) any later version.
936+ *
937+ * This program is distributed in the hope that it will be useful,
938+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
939+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
940+ * GNU General Public License for more details.
941+ *
942+ * You should have received a copy of the GNU General Public License
943+ * along with this program; if not, write to the Free Software
944+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
945+ * MA 02111-1307 USA
946+ */
947+
948+
949+#include <config.h>
950+#include <version.h>
951+
952+
953+/* some parameters for the board */
954+
955+/*
956+ *
957+ * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
958+ *
959+ * Copyright (C) 2002 Samsung Electronics SW.LEE <hitchcar@sec.samsung.com>
960+ *
961+ */
962+
963+#define BWSCON 0x48000000
964+
965+/* BWSCON */
966+#define DW8 (0x0)
967+#define DW16 (0x1)
968+#define DW32 (0x2)
969+#define WAIT (0x1<<2)
970+#define UBLB (0x1<<3)
971+
972+#define B1_BWSCON (DW32)
973+#define B2_BWSCON (DW16)
974+#define B3_BWSCON (DW16 + WAIT + UBLB)
975+#define B4_BWSCON (DW16)
976+#define B5_BWSCON (DW16)
977+#define B6_BWSCON (DW32)
978+#define B7_BWSCON (DW32)
979+
980+/* BANK0CON */
981+#define B0_Tacs 0x0 /* 0clk */
982+#define B0_Tcos 0x0 /* 0clk */
983+#define B0_Tacc 0x7 /* 14clk */
984+#define B0_Tcoh 0x0 /* 0clk */
985+#define B0_Tah 0x0 /* 0clk */
986+#define B0_Tacp 0x0
987+#define B0_PMC 0x0 /* normal */
988+
989+/* BANK1CON */
990+#define B1_Tacs 0x0 /* 0clk */
991+#define B1_Tcos 0x0 /* 0clk */
992+#define B1_Tacc 0x7 /* 14clk */
993+#define B1_Tcoh 0x0 /* 0clk */
994+#define B1_Tah 0x0 /* 0clk */
995+#define B1_Tacp 0x0
996+#define B1_PMC 0x0
997+
998+#define B2_Tacs 0x0
999+#define B2_Tcos 0x0
1000+#define B2_Tacc 0x7
1001+#define B2_Tcoh 0x0
1002+#define B2_Tah 0x0
1003+#define B2_Tacp 0x0
1004+#define B2_PMC 0x0
1005+
1006+#define B3_Tacs 0x0 /* 0clk */
1007+#define B3_Tcos 0x3 /* 4clk */
1008+#define B3_Tacc 0x7 /* 14clk */
1009+#define B3_Tcoh 0x1 /* 1clk */
1010+#define B3_Tah 0x0 /* 0clk */
1011+#define B3_Tacp 0x3 /* 6clk */
1012+#define B3_PMC 0x0 /* normal */
1013+
1014+#define B4_Tacs 0x0 /* 0clk */
1015+#define B4_Tcos 0x0 /* 0clk */
1016+#define B4_Tacc 0x7 /* 14clk */
1017+#define B4_Tcoh 0x0 /* 0clk */
1018+#define B4_Tah 0x0 /* 0clk */
1019+#define B4_Tacp 0x0
1020+#define B4_PMC 0x0 /* normal */
1021+
1022+#define B5_Tacs 0x0 /* 0clk */
1023+#define B5_Tcos 0x0 /* 0clk */
1024+#define B5_Tacc 0x7 /* 14clk */
1025+#define B5_Tcoh 0x0 /* 0clk */
1026+#define B5_Tah 0x0 /* 0clk */
1027+#define B5_Tacp 0x0
1028+#define B5_PMC 0x0 /* normal */
1029+
1030+#define B6_MT 0x3 /* SDRAM */
1031+#define B6_Trcd 0x1
1032+#define B6_SCAN 0x1 /* 9bit */
1033+
1034+#define B7_MT 0x3 /* SDRAM */
1035+#define B7_Trcd 0x1 /* 3clk */
1036+#define B7_SCAN 0x1 /* 9bit */
1037+
1038+/* REFRESH parameter */
1039+#define REFEN 0x1 /* Refresh enable */
1040+#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */
1041+#define Trp 0x0 /* 2clk */
1042+#define Trc 0x3 /* 7clk */
1043+#define Tchr 0x2 /* 3clk */
1044+#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */
1045+/**************************************/
1046+
1047+_TEXT_BASE:
1048+ .word TEXT_BASE
1049+
1050+.globl lowlevel_init
1051+lowlevel_init:
1052+ /* memory control configuration */
1053+ /* make r0 relative the current location so that it */
1054+ /* reads SMRDATA out of FLASH rather than memory ! */
1055+ ldr r0, =SMRDATA
1056+ ldr r1, _TEXT_BASE
1057+ sub r0, r0, r1
1058+ ldr r1, =BWSCON /* Bus Width Status Controller */
1059+ add r2, r0, #13*4
1060+0:
1061+ ldr r3, [r0], #4
1062+ str r3, [r1], #4
1063+ cmp r2, r0
1064+ bne 0b
1065+
1066+ /* everything is fine now */
1067+ mov pc, lr
1068+
1069+ .ltorg
1070+/* the literal pools origin */
1071+
1072+SMRDATA:
1073+ .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
1074+ .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))
1075+ .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))
1076+ .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))
1077+ .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))
1078+ .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))
1079+ .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))
1080+ .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
1081+ .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
1082+ .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
1083+ .word 0x32
1084+ .word 0x30
1085+ .word 0x30
1086Index: u-boot/board/smdk2440/smdk2440.c
1087===================================================================
1088--- /dev/null
1089+++ u-boot/board/smdk2440/smdk2440.c
1090@@ -0,0 +1,152 @@
1091+/*
1092+ * (C) Copyright 2002
1093+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
1094+ * Marius Groeger <mgroeger@sysgo.de>
1095+ *
1096+ * (C) Copyright 2002
1097+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
1098+ *
1099+ * See file CREDITS for list of people who contributed to this
1100+ * project.
1101+ *
1102+ * This program is free software; you can redistribute it and/or
1103+ * modify it under the terms of the GNU General Public License as
1104+ * published by the Free Software Foundation; either version 2 of
1105+ * the License, or (at your option) any later version.
1106+ *
1107+ * This program is distributed in the hope that it will be useful,
1108+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1109+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1110+ * GNU General Public License for more details.
1111+ *
1112+ * You should have received a copy of the GNU General Public License
1113+ * along with this program; if not, write to the Free Software
1114+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1115+ * MA 02111-1307 USA
1116+ */
1117+
1118+#include <common.h>
1119+#include <s3c2440.h>
1120+
1121+DECLARE_GLOBAL_DATA_PTR;
1122+
1123+#define FCLK_SPEED 1
1124+
1125+#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */
1126+#define M_MDIV 0xC3
1127+#define M_PDIV 0x4
1128+#define M_SDIV 0x1
1129+#elif FCLK_SPEED==1 /* Fout = 399.65MHz */
1130+#define M_MDIV 0x6e
1131+#define M_PDIV 0x3
1132+#define M_SDIV 0x1
1133+#endif
1134+
1135+#define USB_CLOCK 1
1136+
1137+#if USB_CLOCK==0
1138+#define U_M_MDIV 0xA1
1139+#define U_M_PDIV 0x3
1140+#define U_M_SDIV 0x1
1141+#elif USB_CLOCK==1
1142+#define U_M_MDIV 0x3c
1143+#define U_M_PDIV 0x4
1144+#define U_M_SDIV 0x2
1145+#endif
1146+
1147+static inline void delay (unsigned long loops)
1148+{
1149+ __asm__ volatile ("1:\n"
1150+ "subs %0, %1, #1\n"
1151+ "bne 1b":"=r" (loops):"0" (loops));
1152+}
1153+
1154+/*
1155+ * Miscellaneous platform dependent initialisations
1156+ */
1157+
1158+int board_init (void)
1159+{
1160+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
1161+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
1162+
1163+ /* to reduce PLL lock time, adjust the LOCKTIME register */
1164+ clk_power->LOCKTIME = 0xFFFFFF;
1165+
1166+ /* configure MPLL */
1167+ clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
1168+
1169+ /* some delay between MPLL and UPLL */
1170+ delay (4000);
1171+
1172+ /* configure UPLL */
1173+ clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
1174+
1175+ /* some delay between MPLL and UPLL */
1176+ delay (8000);
1177+
1178+ /* set up the I/O ports */
1179+ gpio->GPACON = 0x007FFFFF;
1180+ gpio->GPBCON = 0x002a9655;
1181+ gpio->GPBUP = 0x000007FF;
1182+ gpio->GPCCON = 0xAAAAAAAA;
1183+ gpio->GPCUP = 0x0000FFFF;
1184+ gpio->GPDCON = 0xAAAAAAAA;
1185+ gpio->GPDUP = 0x0000FFFF;
1186+ gpio->GPECON = 0xAAAAAAAA;
1187+ gpio->GPEUP = 0x0000FFFF;
1188+ gpio->GPFCON = 0x000055AA;
1189+ gpio->GPFUP = 0x000000FF;
1190+ gpio->GPGCON = 0xFD95FFBA;
1191+ gpio->GPGUP = 0x0000FFFF;
1192+#ifdef CONFIG_SERIAL3
1193+ gpio->GPHCON = 0x002AAAAA;
1194+#else
1195+ gpio->GPHCON = 0x002AFAAA;
1196+#endif
1197+ gpio->GPHUP = 0x000007FF;
1198+
1199+ gpio->GPJCON = 0x2AAAAAA;
1200+
1201+#if 0
1202+ /* USB Device Part */
1203+ /*GPGCON is reset for USB Device */
1204+ gpio->GPGCON = (gpio->GPGCON & ~(3 << 24)) | (1 << 24); /* Output Mode */
1205+ gpio->GPGUP = gpio->GPGUP | ( 1 << 12); /* Pull up disable */
1206+
1207+ gpio->GPGDAT |= ( 1 << 12) ;
1208+ gpio->GPGDAT &= ~( 1 << 12) ;
1209+ udelay(20000);
1210+ gpio->GPGDAT |= ( 1 << 12) ;
1211+#endif
1212+
1213+ /* arch number of SMDK2440-Board */
1214+ gd->bd->bi_arch_number = MACH_TYPE_S3C2440;
1215+
1216+ /* adress of boot parameters */
1217+ gd->bd->bi_boot_params = 0x30000100;
1218+
1219+ icache_enable();
1220+ dcache_enable();
1221+
1222+ return 0;
1223+}
1224+
1225+int dram_init (void)
1226+{
1227+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
1228+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
1229+
1230+ return 0;
1231+}
1232+
1233+/* The sum of all part_size[]s must equal to the NAND size, i.e., 0x4000000.
1234+ "initrd" is sized such that it can hold two uncompressed 16 bit 640*480
1235+ images: 640*480*2*2 = 1228800 < 1245184. */
1236+
1237+unsigned int dynpart_size[] = {
1238+ CFG_UBOOT_SIZE, 0x20000, 0x200000, 0xa0000, 0x3d5c000-CFG_UBOOT_SIZE, 0 };
1239+char *dynpart_names[] = {
1240+ "u-boot", "u-boot_env", "kernel", "splash", "rootfs", NULL };
1241+
1242+
1243Index: u-boot/board/smdk2440/u-boot.lds
1244===================================================================
1245--- /dev/null
1246+++ u-boot/board/smdk2440/u-boot.lds
1247@@ -0,0 +1,58 @@
1248+/*
1249+ * (C) Copyright 2002
1250+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
1251+ *
1252+ * See file CREDITS for list of people who contributed to this
1253+ * project.
1254+ *
1255+ * This program is free software; you can redistribute it and/or
1256+ * modify it under the terms of the GNU General Public License as
1257+ * published by the Free Software Foundation; either version 2 of
1258+ * the License, or (at your option) any later version.
1259+ *
1260+ * This program is distributed in the hope that it will be useful,
1261+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1262+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1263+ * GNU General Public License for more details.
1264+ *
1265+ * You should have received a copy of the GNU General Public License
1266+ * along with this program; if not, write to the Free Software
1267+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1268+ * MA 02111-1307 USA
1269+ */
1270+
1271+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
1272+/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
1273+OUTPUT_ARCH(arm)
1274+ENTRY(_start)
1275+SECTIONS
1276+{
1277+ . = 0x00000000;
1278+
1279+ . = ALIGN(4);
1280+ .text :
1281+ {
1282+ cpu/arm920t/start.o (.text)
1283+ cpu/arm920t/s3c24x0/nand_read.o (.text)
1284+ *(.text)
1285+ }
1286+
1287+ . = ALIGN(4);
1288+ .rodata : { *(.rodata) }
1289+
1290+ . = ALIGN(4);
1291+ .data : { *(.data) }
1292+
1293+ . = ALIGN(4);
1294+ .got : { *(.got) }
1295+
1296+ . = .;
1297+ __u_boot_cmd_start = .;
1298+ .u_boot_cmd : { *(.u_boot_cmd) }
1299+ __u_boot_cmd_end = .;
1300+
1301+ . = ALIGN(4);
1302+ __bss_start = .;
1303+ .bss : { *(.bss) }
1304+ _end = .;
1305+}
1306Index: u-boot/board/smdk2440/udc.c
1307===================================================================
1308--- /dev/null
1309+++ u-boot/board/smdk2440/udc.c
1310@@ -0,0 +1,23 @@
1311+
1312+#include <common.h>
1313+#include <usbdcore.h>
1314+#include <s3c2440.h>
1315+
1316+void udc_ctrl(enum usbd_event event, int param)
1317+{
1318+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
1319+
1320+ switch (event) {
1321+ case UDC_CTRL_PULLUP_ENABLE:
1322+ if (param)
1323+ gpio->GPGDAT |= (1 << 12);
1324+ else
1325+ gpio->GPGDAT &= ~(1 << 12);
1326+ break;
1327+ case UDC_CTRL_500mA_ENABLE:
1328+ /* IGNORE */
1329+ break;
1330+ default:
1331+ break;
1332+ }
1333+}
1334Index: u-boot/board/smdk2440/lowlevel_foo.S
1335===================================================================
1336--- /dev/null
1337+++ u-boot/board/smdk2440/lowlevel_foo.S
1338@@ -0,0 +1,82 @@
1339+
1340+_start:
1341+ b reset
1342+undefvec:
1343+ b undefvec
1344+swivec:
1345+ b swivec
1346+pabtvec:
1347+ b pabtvec
1348+dabtvec:
1349+ b dabtvec
1350+rsvdvec:
1351+ b rsvdvec
1352+irqvec:
1353+ b irqvec
1354+fiqvec:
1355+ b fiqvec
1356+
1357+reset:
1358+ /*
1359+ * set the cpu to SVC32 mode
1360+ */
1361+ mrs r0,cpsr
1362+ bic r0,r0,#0x1f
1363+ orr r0,r0,#0xd3
1364+ msr cpsr,r0
1365+
1366+/* turn off the watchdog */
1367+#define pWTCON 0x53000000
1368+#define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
1369+#define INTSUBMSK 0x4A00001C
1370+#define CLKDIVN 0x4C000014 /* clock divisor register */
1371+
1372+ ldr r0, =pWTCON
1373+ mov r1, #0x0
1374+ str r1, [r0]
1375+
1376+ mov r1, #0xffffffff
1377+ ldr r0, =INTMSK
1378+ str r1, [r0]
1379+ ldr r1, =0x3ff
1380+ ldr r0, =INTSUBMSK
1381+ str r1, [r0]
1382+
1383+ /* FCLK:HCLK:PCLK = 1:2:4 */
1384+ /* default FCLK is 120 MHz ! */
1385+ ldr r0, =CLKDIVN
1386+ mov r1, #3
1387+ str r1, [r0]
1388+
1389+ bl cpu_init_crit
1390+ ldr r0,=TEXT_BASE
1391+ mov pc, r0
1392+
1393+cpu_init_crit:
1394+ /*
1395+ * flush v4 I/D caches
1396+ */
1397+ mov r0, #0
1398+ mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
1399+ mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
1400+
1401+ /*
1402+ * disable MMU stuff and caches
1403+ */
1404+ mrc p15, 0, r0, c1, c0, 0
1405+ bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
1406+ bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
1407+ orr r0, r0, #0x00000002 @ set bit 2 (A) Align
1408+ orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
1409+ mcr p15, 0, r0, c1, c0, 0
1410+
1411+ /*
1412+ * before relocating, we have to setup RAM timing
1413+ * because memory timing is board-dependend, you will
1414+ * find a lowlevel_init.S in your board directory.
1415+ */
1416+ mov ip, lr
1417+ bl lowlevel_init
1418+ mov lr, ip
1419+ mov pc, lr
1420+
1421Index: u-boot/board/smdk2440/lowlevel_foo.lds
1422===================================================================
1423--- /dev/null
1424+++ u-boot/board/smdk2440/lowlevel_foo.lds
1425@@ -0,0 +1,56 @@
1426+/*
1427+ * (C) Copyright 2002
1428+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
1429+ *
1430+ * See file CREDITS for list of people who contributed to this
1431+ * project.
1432+ *
1433+ * This program is free software; you can redistribute it and/or
1434+ * modify it under the terms of the GNU General Public License as
1435+ * published by the Free Software Foundation; either version 2 of
1436+ * the License, or (at your option) any later version.
1437+ *
1438+ * This program is distributed in the hope that it will be useful,
1439+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1440+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1441+ * GNU General Public License for more details.
1442+ *
1443+ * You should have received a copy of the GNU General Public License
1444+ * along with this program; if not, write to the Free Software
1445+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1446+ * MA 02111-1307 USA
1447+ */
1448+
1449+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
1450+OUTPUT_ARCH(arm)
1451+ENTRY(_start)
1452+SECTIONS
1453+{
1454+ . = 0x00000000;
1455+
1456+ . = ALIGN(4);
1457+ .text :
1458+ {
1459+ lowlevel_foo.o (.text)
1460+ *(.text)
1461+ }
1462+
1463+ . = ALIGN(4);
1464+ .rodata : { *(.rodata) }
1465+
1466+ . = ALIGN(4);
1467+ .data : { *(.data) }
1468+
1469+ . = ALIGN(4);
1470+ .got : { *(.got) }
1471+
1472+ . = .;
1473+ __u_boot_cmd_start = .;
1474+ .u_boot_cmd : { *(.u_boot_cmd) }
1475+ __u_boot_cmd_end = .;
1476+
1477+ . = ALIGN(4);
1478+ __bss_start = .;
1479+ .bss : { *(.bss) }
1480+ _end = .;
1481+}
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-smdk2443.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-smdk2443.patch
new file mode 100644
index 0000000000..5757cc078b
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-smdk2443.patch
@@ -0,0 +1,1411 @@
1Index: u-boot/Makefile
2===================================================================
3--- u-boot.orig/Makefile
4+++ u-boot/Makefile
5@@ -2045,6 +2045,9 @@
6 smdk2440_config : unconfig
7 @$(MKCONFIG) $(@:_config=) arm arm920t smdk2440 NULL s3c24x0
8
9+smdk2443_config : unconfig
10+ @$(MKCONFIG) $(@:_config=) arm arm920t smdk2443 NULL s3c24x0
11+
12 SX1_config : unconfig
13 @$(MKCONFIG) $(@:_config=) arm arm925t sx1
14
15Index: u-boot/board/smdk2443/Makefile
16===================================================================
17--- /dev/null
18+++ u-boot/board/smdk2443/Makefile
19@@ -0,0 +1,67 @@
20+#
21+# (C) Copyright 2000-2006
22+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
23+#
24+# See file CREDITS for list of people who contributed to this
25+# project.
26+#
27+# This program is free software; you can redistribute it and/or
28+# modify it under the terms of the GNU General Public License as
29+# published by the Free Software Foundation; either version 2 of
30+# the License, or (at your option) any later version.
31+#
32+# This program is distributed in the hope that it will be useful,
33+# but WITHOUT ANY WARRANTY; without even the implied warranty of
34+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
35+# GNU General Public License for more details.
36+#
37+# You should have received a copy of the GNU General Public License
38+# along with this program; if not, write to the Free Software
39+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
40+# MA 02111-1307 USA
41+#
42+
43+include $(TOPDIR)/config.mk
44+
45+LIB = $(obj)lib$(BOARD).a
46+
47+COBJS := smdk2443.o flash.o udc.o
48+SOBJS := lowlevel_init.o
49+
50+.PHONY: all
51+
52+all: $(LIB) lowlevel_foo.bin
53+
54+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
55+OBJS := $(addprefix $(obj),$(COBJS))
56+SOBJS := $(addprefix $(obj),$(SOBJS))
57+
58+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
59+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
60+
61+lowlevel_foo.o: lowlevel_foo.S
62+ $(CC) -c -DTEXT_BASE=0x33F80000 -march=armv4 \
63+ -o lowlevel_foo.o lowlevel_foo.S
64+
65+lowlevel_foo: lowlevel_foo.o lowlevel_init.o lowlevel_foo.lds
66+ $(LD) -T ./lowlevel_foo.lds -Ttext 0x33f80000 -Bstatic \
67+ lowlevel_init.o lowlevel_foo.o -o lowlevel_foo
68+
69+lowlevel_foo.bin: lowlevel_foo
70+ $(CROSS_COMPILE)objcopy --gap-fill=0xff -O binary \
71+ lowlevel_foo lowlevel_foo.bin
72+
73+clean:
74+ rm -f $(SOBJS) $(OBJS)
75+
76+distclean: clean
77+ rm -f $(LIB) core *.bak .depend
78+
79+#########################################################################
80+
81+# defines $(obj).depend target
82+include $(SRCTREE)/rules.mk
83+
84+sinclude $(obj).depend
85+
86+#########################################################################
87Index: u-boot/board/smdk2443/smdk2443.c
88===================================================================
89--- /dev/null
90+++ u-boot/board/smdk2443/smdk2443.c
91@@ -0,0 +1,147 @@
92+/*
93+ * (C) Copyright 2006 OpenMoko, Inc.
94+ * Author: Harald Welte <laforge@openmoko.org>
95+ *
96+ * See file CREDITS for list of people who contributed to this
97+ * project.
98+ *
99+ * This program is free software; you can redistribute it and/or
100+ * modify it under the terms of the GNU General Public License as
101+ * published by the Free Software Foundation; either version 2 of
102+ * the License, or (at your option) any later version.
103+ *
104+ * This program is distributed in the hope that it will be useful,
105+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
106+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
107+ * GNU General Public License for more details.
108+ *
109+ * You should have received a copy of the GNU General Public License
110+ * along with this program; if not, write to the Free Software
111+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
112+ * MA 02111-1307 USA
113+ */
114+
115+#include <common.h>
116+#include <s3c2440.h>
117+
118+DECLARE_GLOBAL_DATA_PTR;
119+
120+#define FCLK_SPEED 1
121+
122+#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */
123+#define M_MDIV 0xC3
124+#define M_PDIV 0x4
125+#define M_SDIV 0x1
126+#elif FCLK_SPEED==1 /* Fout = 399.65MHz */
127+#define M_MDIV 0x6e
128+#define M_PDIV 0x3
129+#define M_SDIV 0x1
130+#endif
131+
132+#define USB_CLOCK 1
133+
134+#if USB_CLOCK==0
135+#define U_M_MDIV 0xA1
136+#define U_M_PDIV 0x3
137+#define U_M_SDIV 0x1
138+#elif USB_CLOCK==1
139+#define U_M_MDIV 0x3c
140+#define U_M_PDIV 0x4
141+#define U_M_SDIV 0x2
142+#endif
143+
144+static inline void delay (unsigned long loops)
145+{
146+ __asm__ volatile ("1:\n"
147+ "subs %0, %1, #1\n"
148+ "bne 1b":"=r" (loops):"0" (loops));
149+}
150+
151+/*
152+ * Miscellaneous platform dependent initialisations
153+ */
154+
155+int board_init (void)
156+{
157+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
158+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
159+
160+ /* to reduce PLL lock time, adjust the LOCKTIME register */
161+ clk_power->LOCKTIME = 0xFFFFFF;
162+
163+ /* configure MPLL */
164+ clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
165+
166+ /* some delay between MPLL and UPLL */
167+ delay (4000);
168+
169+ /* configure UPLL */
170+ clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
171+
172+ /* some delay between MPLL and UPLL */
173+ delay (8000);
174+
175+ /* set up the I/O ports */
176+ gpio->GPACON = 0x007FFFFF;
177+ gpio->GPBCON = 0x00044555;
178+ gpio->GPBUP = 0x000007FF;
179+ gpio->GPCCON = 0xAAAAAAAA;
180+ gpio->GPCUP = 0x0000FFFF;
181+ gpio->GPDCON = 0xAAAAAAAA;
182+ gpio->GPDUP = 0x0000FFFF;
183+ gpio->GPECON = 0xAAAAAAAA;
184+ gpio->GPEUP = 0x0000FFFF;
185+ gpio->GPFCON = 0x000055AA;
186+ gpio->GPFUP = 0x000000FF;
187+ gpio->GPGCON = 0xFD95FFBA;
188+ gpio->GPGUP = 0x0000FFFF;
189+#ifdef CONFIG_SERIAL3
190+ gpio->GPHCON = 0x002AAAAA;
191+#else
192+ gpio->GPHCON = 0x002AFAAA;
193+#endif
194+ gpio->GPHUP = 0x000007FF;
195+
196+#if 0
197+ /* USB Device Part */
198+ /*GPGCON is reset for USB Device */
199+ gpio->GPGCON = (gpio->GPGCON & ~(3 << 24)) | (1 << 24); /* Output Mode */
200+ gpio->GPGUP = gpio->GPGUP | ( 1 << 12); /* Pull up disable */
201+
202+ gpio->GPGDAT |= ( 1 << 12) ;
203+ gpio->GPGDAT &= ~( 1 << 12) ;
204+ udelay(20000);
205+ gpio->GPGDAT |= ( 1 << 12) ;
206+#endif
207+
208+ /* arch number of SMDK2440-Board */
209+ gd->bd->bi_arch_number = MACH_TYPE_S3C2440;
210+
211+ /* adress of boot parameters */
212+ gd->bd->bi_boot_params = 0x30000100;
213+
214+ icache_enable();
215+ dcache_enable();
216+
217+ return 0;
218+}
219+
220+int dram_init (void)
221+{
222+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
223+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
224+
225+ return 0;
226+}
227+
228+/* The sum of all part_size[]s must equal to the NAND size, i.e., 0x4000000.
229+ "initrd" is sized such that it can hold two uncompressed 16 bit 640*480
230+ images: 640*480*2*2 = 1228800 < 1245184. */
231+
232+unsigned int dynpart_size[] = {
233+ CFG_UBOOT_SIZE, 0x20000, 0x200000, 0xa0000, 0x3d5c000-CFG_UBOOT_SIZE, 0 };
234+
235+char *dynpart_names[] = {
236+ "u-boot", "u-boot_env", "kernel", "splash", "rootfs", NULL };
237+
238+
239Index: u-boot/board/smdk2443/u-boot.lds
240===================================================================
241--- /dev/null
242+++ u-boot/board/smdk2443/u-boot.lds
243@@ -0,0 +1,58 @@
244+/*
245+ * (C) Copyright 2002
246+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
247+ *
248+ * See file CREDITS for list of people who contributed to this
249+ * project.
250+ *
251+ * This program is free software; you can redistribute it and/or
252+ * modify it under the terms of the GNU General Public License as
253+ * published by the Free Software Foundation; either version 2 of
254+ * the License, or (at your option) any later version.
255+ *
256+ * This program is distributed in the hope that it will be useful,
257+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
258+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
259+ * GNU General Public License for more details.
260+ *
261+ * You should have received a copy of the GNU General Public License
262+ * along with this program; if not, write to the Free Software
263+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
264+ * MA 02111-1307 USA
265+ */
266+
267+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
268+/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
269+OUTPUT_ARCH(arm)
270+ENTRY(_start)
271+SECTIONS
272+{
273+ . = 0x00000000;
274+
275+ . = ALIGN(4);
276+ .text :
277+ {
278+ cpu/arm920t/start.o (.text)
279+ cpu/arm920t/s3c24x0/nand_read.o (.text)
280+ *(.text)
281+ }
282+
283+ . = ALIGN(4);
284+ .rodata : { *(.rodata) }
285+
286+ . = ALIGN(4);
287+ .data : { *(.data) }
288+
289+ . = ALIGN(4);
290+ .got : { *(.got) }
291+
292+ . = .;
293+ __u_boot_cmd_start = .;
294+ .u_boot_cmd : { *(.u_boot_cmd) }
295+ __u_boot_cmd_end = .;
296+
297+ . = ALIGN(4);
298+ __bss_start = .;
299+ .bss : { *(.bss) }
300+ _end = .;
301+}
302Index: u-boot/include/configs/smdk2443.h
303===================================================================
304--- /dev/null
305+++ u-boot/include/configs/smdk2443.h
306@@ -0,0 +1,289 @@
307+/*
308+ * (C) Copyright 2007 OpenMoko, Inc.
309+ * Author: Harald Welte <laforge@openmoko.org>
310+ *
311+ * Configuation settings for the SAMSUNG SMDK2443 board.
312+ *
313+ * See file CREDITS for list of people who contributed to this
314+ * project.
315+ *
316+ * This program is free software; you can redistribute it and/or
317+ * modify it under the terms of the GNU General Public License as
318+ * published by the Free Software Foundation; either version 2 of
319+ * the License, or (at your option) any later version.
320+ *
321+ * This program is distributed in the hope that it will be useful,
322+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
323+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
324+ * GNU General Public License for more details.
325+ *
326+ * You should have received a copy of the GNU General Public License
327+ * along with this program; if not, write to the Free Software
328+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
329+ * MA 02111-1307 USA
330+ */
331+
332+#ifndef __CONFIG_H
333+#define __CONFIG_H
334+
335+#if 0
336+/* If we want to start u-boot from usb bootloader in NOR flash */
337+#define CONFIG_SKIP_RELOCATE_UBOOT 1
338+#define CONFIG_SKIP_LOWLEVEL_INIT 1
339+#else
340+/* If we want to start u-boot directly from within NAND flash */
341+#define CONFIG_LL_INIT_NAND_ONLY
342+#define CONFIG_S3C2410_NAND_BOOT 1
343+#define CONFIG_S3C2410_NAND_SKIP_BAD 1
344+#endif
345+
346+#define CFG_UBOOT_SIZE 0x40000 /* size of u-boot, for NAND loading */
347+
348+/*
349+ * High Level Configuration Options
350+ * (easy to change)
351+ */
352+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
353+#define CONFIG_S3C2440 1 /* in a SAMSUNG S3C2440 SoC */
354+#define CONFIG_SMDK2443 1 /* on a SAMSUNG SMDK2440 Board */
355+
356+/* input clock of PLL */
357+#define CONFIG_SYS_CLK_FREQ 16934400/* SMDK2440 has 16.9344MHz input clock */
358+
359+
360+#define USE_920T_MMU 1
361+#define CONFIG_USE_IRQ 1
362+
363+/*
364+ * Size of malloc() pool
365+ */
366+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 2048*1024)
367+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
368+
369+/*
370+ * Hardware drivers
371+ */
372+#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
373+#define CS8900_BASE 0x19000300
374+#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
375+
376+/*
377+ * select serial console configuration
378+ */
379+#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2440 */
380+#define CONFIG_HWFLOW 1
381+
382+/************************************************************
383+ * RTC
384+ ************************************************************/
385+#define CONFIG_RTC_S3C24X0 1
386+
387+/* allow to overwrite serial and ethaddr */
388+#define CONFIG_ENV_OVERWRITE
389+
390+#define CONFIG_BAUDRATE 115200
391+
392+/***********************************************************
393+ * Command definition
394+ ***********************************************************/
395+#define CONFIG_COMMANDS \
396+ (CONFIG_CMD_DFL | \
397+ /*CFG_CMD_BSP | */ \
398+ CFG_CMD_CACHE | \
399+ CFG_CMD_DATE | \
400+ /*CFG_CMD_DHCP | */ \
401+ CFG_CMD_DIAG | \
402+ CFG_CMD_ELF | \
403+ CFG_CMD_EXT2 | \
404+ CFG_CMD_FAT | \
405+ /*CFG_CMD_HWFLOW | */ \
406+ /* CFG_CMD_IDE | */ \
407+ /* CFG_CMD_IRQ | */ \
408+ CFG_CMD_JFFS2 | \
409+ CFG_CMD_MMC | \
410+ CFG_CMD_NAND | \
411+ CFG_CMD_PING | \
412+ CFG_CMD_PORTIO | \
413+ CFG_CMD_REGINFO | \
414+ CFG_CMD_SAVES | \
415+ CFG_CMD_LICENSE | \
416+ CFG_CMD_USB)
417+
418+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
419+#include <cmd_confdefs.h>
420+
421+#define CONFIG_BOOTDELAY 3
422+#define CONFIG_BOOTARGS "root=/dev/mtdblock4 rootfstype=jffs2 console=ttySAC2,115200 loglevel=8"
423+#define CONFIG_ETHADDR 00:0c:20:02:0a:5b
424+#define CONFIG_NETMASK 255.255.255.0
425+#define CONFIG_IPADDR 192.168.1.100
426+#define CONFIG_SERVERIP 192.168.1.21
427+#define CONFIG_BOOTCOMMAND "nand read.e 0x32000000 0x100000 0x200000; bootm"
428+
429+#define CONFIG_DOS_PARTITION 1
430+
431+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
432+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
433+/* what's this ? it's not used anywhere */
434+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
435+#endif
436+
437+/*
438+ * Miscellaneous configurable options
439+ */
440+#define CFG_LONGHELP /* undef to save memory */
441+#define CFG_PROMPT "SMDK2443 # " /* Monitor Command Prompt */
442+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
443+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
444+#define CFG_MAXARGS 32 /* max number of command args */
445+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
446+
447+#define CFG_MEMTEST_START 0x30000000 /* memtest works on */
448+#define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
449+
450+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
451+
452+#define CFG_LOAD_ADDR 0x32000000 /* default load address */
453+
454+/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
455+/* it to wrap 100 times (total 1562500) to get 1 sec. */
456+#define CFG_HZ 1562500
457+
458+/* valid baudrates */
459+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
460+
461+/*-----------------------------------------------------------------------
462+ * Stack sizes
463+ *
464+ * The stack sizes are set up in start.S using the settings below
465+ */
466+#define CONFIG_STACKSIZE (512*1024) /* regular stack */
467+#ifdef CONFIG_USE_IRQ
468+#define CONFIG_STACKSIZE_IRQ (8*1024) /* IRQ stack */
469+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
470+#endif
471+
472+/* IDE/ATA config */
473+
474+#if 0
475+#define CFG_IDE_MAXBUS 1
476+#define CFG_IDE_MAXDEVICE 2
477+#define CFG_IDE_PREINIT 0
478+
479+#define CFG_ATA_BASE_ADDR
480+#endif
481+
482+#define CONFIG_USB_OHCI 1
483+
484+#define CONFIG_USB_DEVICE 1
485+#define CONFIG_USB_TTY 1
486+#define CFG_CONSOLE_IS_IN_ENV 1
487+#define CONFIG_USBD_VENDORID 0x1457 /* Linux/NetChip */
488+#define CONFIG_USBD_PRODUCTID_GSERIAL 0x5120 /* gserial */
489+#define CONFIG_USBD_PRODUCTID_CDCACM 0x5119 /* CDC ACM */
490+#define CONFIG_USBD_MANUFACTURER "FiWin"
491+#define CONFIG_USBD_PRODUCT_NAME "S3C2443 Bootloader " U_BOOT_VERSION
492+#define CONFIG_EXTRA_ENV_SETTINGS "usbtty=cdc_acm\0"
493+#define CONFIG_USBD_DFU 1
494+#define CONFIG_USBD_DFU_XFER_SIZE 4096
495+#define CONFIG_USBD_DFU_INTERFACE 2
496+
497+/*-----------------------------------------------------------------------
498+ * Physical Memory Map
499+ */
500+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
501+#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
502+#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
503+
504+#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
505+
506+#define CFG_FLASH_BASE PHYS_FLASH_1
507+
508+/*-----------------------------------------------------------------------
509+ * FLASH and environment organization
510+ */
511+
512+#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
513+#if 0
514+#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
515+#endif
516+
517+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
518+#ifdef CONFIG_AMD_LV800
519+#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
520+#define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
521+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
522+#endif
523+#ifdef CONFIG_AMD_LV400
524+#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
525+#define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
526+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) /* addr of environment */
527+#endif
528+
529+/* timeout values are in ticks */
530+#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */
531+#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */
532+
533+#define CFG_ENV_IS_IN_NAND 1
534+#define CFG_ENV_SIZE 0x20000 /* 128k Total Size of Environment Sector */
535+#define CFG_ENV_OFFSET_OOB 1
536+#define CFG_PREBOOT_OVERRIDE 1
537+
538+#define NAND_MAX_CHIPS 1
539+#define CFG_NAND_BASE 0x4e000000
540+#define CFG_MAX_NAND_DEVICE 1
541+
542+#define CONFIG_MMC 1
543+#define CFG_MMC_BASE 0xff000000
544+
545+#define CONFIG_EXT2 1
546+
547+/* FAT driver in u-boot is broken currently */
548+#define CONFIG_FAT 1
549+#define CONFIG_SUPPORT_VFAT
550+
551+#if 1
552+/* JFFS2 driver */
553+#define CONFIG_JFFS2_CMDLINE 1
554+#define CONFIG_JFFS2_NAND 1
555+#define CONFIG_JFFS2_NAND_DEV 0
556+//#define CONFIG_JFFS2_NAND_OFF 0x634000
557+//#define CONFIG_JFFS2_NAND_SIZE 0x39cc000
558+#endif
559+
560+/* ATAG configuration */
561+#define CONFIG_INITRD_TAG 1
562+#define CONFIG_SETUP_MEMORY_TAGS 1
563+#define CONFIG_CMDLINE_TAG 1
564+#if 0
565+#define CONFIG_SERIAL_TAG 1
566+#define CONFIG_REVISION_TAG 1
567+#endif
568+
569+
570+#if 0
571+#define CONFIG_VIDEO
572+#define CONFIG_VIDEO_S3C2410
573+#define CONFIG_CFB_CONSOLE
574+#define CONFIG_VIDEO_LOGO
575+#define CONFIG_VGA_AS_SINGLE_DEVICE
576+
577+#define VIDEO_KBD_INIT_FCT 0
578+#define VIDEO_TSTC_FCT serial_tstc
579+#define VIDEO_GETC_FCT serial_getc
580+
581+#define LCD_VIDEO_ADDR 0x33d00000
582+#endif
583+
584+#define CONFIG_S3C2410_NAND_BBT 1
585+//#define CONFIG_S3C2410_NAND_HWECC 1
586+
587+#define CFG_NAND_YAFFS_WRITE
588+#define CFG_NAND_YAFFS1_NEW_OOB_LAYOUT
589+
590+#define MTDIDS_DEFAULT "nand0=smdk2443-nand"
591+#define MTPARTS_DEFAULT "smdk2443-nand:0x00100000(u-boot),0x00200000(kernel),0x00200000(update),0x00100000(splash),0x01400000(jffs2),-(temp)"
592+#define CFG_NAND_DYNPART_MTD_KERNEL_NAME "smdk2443-nand"
593+#define CONFIG_NAND_DYNPART
594+
595+#endif /* __CONFIG_H */
596Index: u-boot/board/smdk2443/lowlevel_foo.S
597===================================================================
598--- /dev/null
599+++ u-boot/board/smdk2443/lowlevel_foo.S
600@@ -0,0 +1,82 @@
601+
602+_start:
603+ b reset
604+undefvec:
605+ b undefvec
606+swivec:
607+ b swivec
608+pabtvec:
609+ b pabtvec
610+dabtvec:
611+ b dabtvec
612+rsvdvec:
613+ b rsvdvec
614+irqvec:
615+ b irqvec
616+fiqvec:
617+ b fiqvec
618+
619+reset:
620+ /*
621+ * set the cpu to SVC32 mode
622+ */
623+ mrs r0,cpsr
624+ bic r0,r0,#0x1f
625+ orr r0,r0,#0xd3
626+ msr cpsr,r0
627+
628+/* turn off the watchdog */
629+#define pWTCON 0x53000000
630+#define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
631+#define INTSUBMSK 0x4A00001C
632+#define CLKDIVN 0x4C000014 /* clock divisor register */
633+
634+ ldr r0, =pWTCON
635+ mov r1, #0x0
636+ str r1, [r0]
637+
638+ mov r1, #0xffffffff
639+ ldr r0, =INTMSK
640+ str r1, [r0]
641+ ldr r1, =0x3ff
642+ ldr r0, =INTSUBMSK
643+ str r1, [r0]
644+
645+ /* FCLK:HCLK:PCLK = 1:2:4 */
646+ /* default FCLK is 120 MHz ! */
647+ ldr r0, =CLKDIVN
648+ mov r1, #3
649+ str r1, [r0]
650+
651+ bl cpu_init_crit
652+ ldr r0,=TEXT_BASE
653+ mov pc, r0
654+
655+cpu_init_crit:
656+ /*
657+ * flush v4 I/D caches
658+ */
659+ mov r0, #0
660+ mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
661+ mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
662+
663+ /*
664+ * disable MMU stuff and caches
665+ */
666+ mrc p15, 0, r0, c1, c0, 0
667+ bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
668+ bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
669+ orr r0, r0, #0x00000002 @ set bit 2 (A) Align
670+ orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
671+ mcr p15, 0, r0, c1, c0, 0
672+
673+ /*
674+ * before relocating, we have to setup RAM timing
675+ * because memory timing is board-dependend, you will
676+ * find a lowlevel_init.S in your board directory.
677+ */
678+ mov ip, lr
679+ bl lowlevel_init
680+ mov lr, ip
681+ mov pc, lr
682+
683Index: u-boot/board/smdk2443/lowlevel_init.S
684===================================================================
685--- /dev/null
686+++ u-boot/board/smdk2443/lowlevel_init.S
687@@ -0,0 +1,163 @@
688+/*
689+ * SMDK2443 Memory Setup
690+ *
691+ * Copyright (C) 2007 by OpenMoko, Inc.
692+ * Author: Harald Welte <laforge@openmoko.org>
693+ *
694+ * See file CREDITS for list of people who contributed to this
695+ * project.
696+ *
697+ * This program is free software; you can redistribute it and/or
698+ * modify it under the terms of the GNU General Public License as
699+ * published by the Free Software Foundation; either version 2 of
700+ * the License, or (at your option) any later version.
701+ *
702+ * This program is distributed in the hope that it will be useful,
703+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
704+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
705+ * GNU General Public License for more details.
706+ *
707+ * You should have received a copy of the GNU General Public License
708+ * along with this program; if not, write to the Free Software
709+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
710+ * MA 02111-1307 USA
711+ */
712+
713+
714+#include <config.h>
715+#include <version.h>
716+
717+
718+/* some parameters for the board */
719+
720+/*
721+ *
722+ * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
723+ *
724+ * Copyright (C) 2002 Samsung Electronics SW.LEE <hitchcar@sec.samsung.com>
725+ *
726+ */
727+
728+#define BWSCON 0x48000000
729+
730+/* BWSCON */
731+#define DW8 (0x0)
732+#define DW16 (0x1)
733+#define DW32 (0x2)
734+#define WAIT (0x1<<2)
735+#define UBLB (0x1<<3)
736+
737+#define B1_BWSCON (DW32)
738+#define B2_BWSCON (DW16)
739+#define B3_BWSCON (DW16 + WAIT + UBLB)
740+#define B4_BWSCON (DW16)
741+#define B5_BWSCON (DW16)
742+#define B6_BWSCON (DW32)
743+#define B7_BWSCON (DW32)
744+
745+/* BANK0CON */
746+#define B0_Tacs 0x0 /* 0clk */
747+#define B0_Tcos 0x0 /* 0clk */
748+#define B0_Tacc 0x7 /* 14clk */
749+#define B0_Tcoh 0x0 /* 0clk */
750+#define B0_Tah 0x0 /* 0clk */
751+#define B0_Tacp 0x0
752+#define B0_PMC 0x0 /* normal */
753+
754+/* BANK1CON */
755+#define B1_Tacs 0x0 /* 0clk */
756+#define B1_Tcos 0x0 /* 0clk */
757+#define B1_Tacc 0x7 /* 14clk */
758+#define B1_Tcoh 0x0 /* 0clk */
759+#define B1_Tah 0x0 /* 0clk */
760+#define B1_Tacp 0x0
761+#define B1_PMC 0x0
762+
763+#define B2_Tacs 0x0
764+#define B2_Tcos 0x0
765+#define B2_Tacc 0x7
766+#define B2_Tcoh 0x0
767+#define B2_Tah 0x0
768+#define B2_Tacp 0x0
769+#define B2_PMC 0x0
770+
771+#define B3_Tacs 0x0 /* 0clk */
772+#define B3_Tcos 0x3 /* 4clk */
773+#define B3_Tacc 0x7 /* 14clk */
774+#define B3_Tcoh 0x1 /* 1clk */
775+#define B3_Tah 0x0 /* 0clk */
776+#define B3_Tacp 0x3 /* 6clk */
777+#define B3_PMC 0x0 /* normal */
778+
779+#define B4_Tacs 0x0 /* 0clk */
780+#define B4_Tcos 0x0 /* 0clk */
781+#define B4_Tacc 0x7 /* 14clk */
782+#define B4_Tcoh 0x0 /* 0clk */
783+#define B4_Tah 0x0 /* 0clk */
784+#define B4_Tacp 0x0
785+#define B4_PMC 0x0 /* normal */
786+
787+#define B5_Tacs 0x0 /* 0clk */
788+#define B5_Tcos 0x0 /* 0clk */
789+#define B5_Tacc 0x7 /* 14clk */
790+#define B5_Tcoh 0x0 /* 0clk */
791+#define B5_Tah 0x0 /* 0clk */
792+#define B5_Tacp 0x0
793+#define B5_PMC 0x0 /* normal */
794+
795+#define B6_MT 0x3 /* SDRAM */
796+#define B6_Trcd 0x1
797+#define B6_SCAN 0x1 /* 9bit */
798+
799+#define B7_MT 0x3 /* SDRAM */
800+#define B7_Trcd 0x1 /* 3clk */
801+#define B7_SCAN 0x1 /* 9bit */
802+
803+/* REFRESH parameter */
804+#define REFEN 0x1 /* Refresh enable */
805+#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */
806+#define Trp 0x0 /* 2clk */
807+#define Trc 0x3 /* 7clk */
808+#define Tchr 0x2 /* 3clk */
809+#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */
810+/**************************************/
811+
812+_TEXT_BASE:
813+ .word TEXT_BASE
814+
815+.globl lowlevel_init
816+lowlevel_init:
817+ /* memory control configuration */
818+ /* make r0 relative the current location so that it */
819+ /* reads SMRDATA out of FLASH rather than memory ! */
820+ ldr r0, =SMRDATA
821+ ldr r1, _TEXT_BASE
822+ sub r0, r0, r1
823+ ldr r1, =BWSCON /* Bus Width Status Controller */
824+ add r2, r0, #13*4
825+0:
826+ ldr r3, [r0], #4
827+ str r3, [r1], #4
828+ cmp r2, r0
829+ bne 0b
830+
831+ /* everything is fine now */
832+ mov pc, lr
833+
834+ .ltorg
835+/* the literal pools origin */
836+
837+SMRDATA:
838+ .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
839+ .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))
840+ .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))
841+ .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))
842+ .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))
843+ .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))
844+ .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))
845+ .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
846+ .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
847+ .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
848+ .word 0x32
849+ .word 0x30
850+ .word 0x30
851Index: u-boot/board/smdk2443/config.mk
852===================================================================
853--- /dev/null
854+++ u-boot/board/smdk2443/config.mk
855@@ -0,0 +1,29 @@
856+#
857+# (C) Copyright 2002
858+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
859+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
860+#
861+# SAMSUNG SMDK2443 board with S3C2443 (ARM920T) cpu
862+#
863+# see http://www.samsung.com/ for more information on SAMSUNG
864+#
865+
866+CONFIG_USB_DFU_VENDOR=0x1457
867+CONFIG_USB_DFU_PRODUCT=0x511c
868+CONFIG_USB_DFU_REVISION=0x0100
869+
870+#
871+# SMDK2443 has 1 bank of 64 MB DRAM
872+#
873+# 3000'0000 to 3400'0000
874+#
875+# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000
876+# optionally with a ramdisk at 3080'0000
877+#
878+# we load ourself to 33F8'0000
879+#
880+# download area is 3300'0000
881+#
882+
883+
884+TEXT_BASE = 0x33F80000
885Index: u-boot/board/smdk2443/lowlevel_foo.lds
886===================================================================
887--- /dev/null
888+++ u-boot/board/smdk2443/lowlevel_foo.lds
889@@ -0,0 +1,56 @@
890+/*
891+ * (C) Copyright 2002
892+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
893+ *
894+ * See file CREDITS for list of people who contributed to this
895+ * project.
896+ *
897+ * This program is free software; you can redistribute it and/or
898+ * modify it under the terms of the GNU General Public License as
899+ * published by the Free Software Foundation; either version 2 of
900+ * the License, or (at your option) any later version.
901+ *
902+ * This program is distributed in the hope that it will be useful,
903+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
904+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
905+ * GNU General Public License for more details.
906+ *
907+ * You should have received a copy of the GNU General Public License
908+ * along with this program; if not, write to the Free Software
909+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
910+ * MA 02111-1307 USA
911+ */
912+
913+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
914+OUTPUT_ARCH(arm)
915+ENTRY(_start)
916+SECTIONS
917+{
918+ . = 0x00000000;
919+
920+ . = ALIGN(4);
921+ .text :
922+ {
923+ lowlevel_foo.o (.text)
924+ *(.text)
925+ }
926+
927+ . = ALIGN(4);
928+ .rodata : { *(.rodata) }
929+
930+ . = ALIGN(4);
931+ .data : { *(.data) }
932+
933+ . = ALIGN(4);
934+ .got : { *(.got) }
935+
936+ . = .;
937+ __u_boot_cmd_start = .;
938+ .u_boot_cmd : { *(.u_boot_cmd) }
939+ __u_boot_cmd_end = .;
940+
941+ . = ALIGN(4);
942+ __bss_start = .;
943+ .bss : { *(.bss) }
944+ _end = .;
945+}
946Index: u-boot/board/smdk2443/flash.c
947===================================================================
948--- /dev/null
949+++ u-boot/board/smdk2443/flash.c
950@@ -0,0 +1,433 @@
951+/*
952+ * (C) Copyright 2002
953+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
954+ * Alex Zuepke <azu@sysgo.de>
955+ *
956+ * See file CREDITS for list of people who contributed to this
957+ * project.
958+ *
959+ * This program is free software; you can redistribute it and/or
960+ * modify it under the terms of the GNU General Public License as
961+ * published by the Free Software Foundation; either version 2 of
962+ * the License, or (at your option) any later version.
963+ *
964+ * This program is distributed in the hope that it will be useful,
965+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
966+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
967+ * GNU General Public License for more details.
968+ *
969+ * You should have received a copy of the GNU General Public License
970+ * along with this program; if not, write to the Free Software
971+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
972+ * MA 02111-1307 USA
973+ */
974+
975+#include <common.h>
976+
977+ulong myflush (void);
978+
979+
980+#define FLASH_BANK_SIZE PHYS_FLASH_SIZE
981+#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
982+
983+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
984+
985+
986+#define CMD_READ_ARRAY 0x000000F0
987+#define CMD_UNLOCK1 0x000000AA
988+#define CMD_UNLOCK2 0x00000055
989+#define CMD_ERASE_SETUP 0x00000080
990+#define CMD_ERASE_CONFIRM 0x00000030
991+#define CMD_PROGRAM 0x000000A0
992+#define CMD_UNLOCK_BYPASS 0x00000020
993+
994+#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555 << 1)))
995+#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA << 1)))
996+
997+#define BIT_ERASE_DONE 0x00000080
998+#define BIT_RDY_MASK 0x00000080
999+#define BIT_PROGRAM_ERROR 0x00000020
1000+#define BIT_TIMEOUT 0x80000000 /* our flag */
1001+
1002+#define READY 1
1003+#define ERR 2
1004+#define TMO 4
1005+
1006+/*-----------------------------------------------------------------------
1007+ */
1008+
1009+ulong flash_init (void)
1010+{
1011+ int i, j;
1012+ ulong size = 0;
1013+
1014+ for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
1015+ ulong flashbase = 0;
1016+
1017+ flash_info[i].flash_id =
1018+#if defined(CONFIG_AMD_LV400)
1019+ (AMD_MANUFACT & FLASH_VENDMASK) |
1020+ (AMD_ID_LV400B & FLASH_TYPEMASK);
1021+#elif defined(CONFIG_AMD_LV800)
1022+ (AMD_MANUFACT & FLASH_VENDMASK) |
1023+ (AMD_ID_LV800B & FLASH_TYPEMASK);
1024+#else
1025+#error "Unknown flash configured"
1026+#endif
1027+ flash_info[i].size = FLASH_BANK_SIZE;
1028+ flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
1029+ memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
1030+ if (i == 0)
1031+ flashbase = PHYS_FLASH_1;
1032+ else
1033+ panic ("configured too many flash banks!\n");
1034+ for (j = 0; j < flash_info[i].sector_count; j++) {
1035+ if (j <= 3) {
1036+ /* 1st one is 16 KB */
1037+ if (j == 0) {
1038+ flash_info[i].start[j] =
1039+ flashbase + 0;
1040+ }
1041+
1042+ /* 2nd and 3rd are both 8 KB */
1043+ if ((j == 1) || (j == 2)) {
1044+ flash_info[i].start[j] =
1045+ flashbase + 0x4000 + (j -
1046+ 1) *
1047+ 0x2000;
1048+ }
1049+
1050+ /* 4th 32 KB */
1051+ if (j == 3) {
1052+ flash_info[i].start[j] =
1053+ flashbase + 0x8000;
1054+ }
1055+ } else {
1056+ flash_info[i].start[j] =
1057+ flashbase + (j - 3) * MAIN_SECT_SIZE;
1058+ }
1059+ }
1060+ size += flash_info[i].size;
1061+ }
1062+
1063+ flash_protect (FLAG_PROTECT_SET,
1064+ CFG_FLASH_BASE,
1065+ CFG_FLASH_BASE + monitor_flash_len - 1,
1066+ &flash_info[0]);
1067+
1068+ flash_protect (FLAG_PROTECT_SET,
1069+ CFG_ENV_ADDR,
1070+ CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
1071+
1072+ return size;
1073+}
1074+
1075+/*-----------------------------------------------------------------------
1076+ */
1077+void flash_print_info (flash_info_t * info)
1078+{
1079+ int i;
1080+
1081+ switch (info->flash_id & FLASH_VENDMASK) {
1082+ case (AMD_MANUFACT & FLASH_VENDMASK):
1083+ printf ("AMD: ");
1084+ break;
1085+ default:
1086+ printf ("Unknown Vendor ");
1087+ break;
1088+ }
1089+
1090+ switch (info->flash_id & FLASH_TYPEMASK) {
1091+ case (AMD_ID_LV400B & FLASH_TYPEMASK):
1092+ printf ("1x Amd29LV400BB (4Mbit)\n");
1093+ break;
1094+ case (AMD_ID_LV800B & FLASH_TYPEMASK):
1095+ printf ("1x Amd29LV800BB (8Mbit)\n");
1096+ break;
1097+ default:
1098+ printf ("Unknown Chip Type\n");
1099+ goto Done;
1100+ break;
1101+ }
1102+
1103+ printf (" Size: %ld MB in %d Sectors\n",
1104+ info->size >> 20, info->sector_count);
1105+
1106+ printf (" Sector Start Addresses:");
1107+ for (i = 0; i < info->sector_count; i++) {
1108+ if ((i % 5) == 0) {
1109+ printf ("\n ");
1110+ }
1111+ printf (" %08lX%s", info->start[i],
1112+ info->protect[i] ? " (RO)" : " ");
1113+ }
1114+ printf ("\n");
1115+
1116+ Done:;
1117+}
1118+
1119+/*-----------------------------------------------------------------------
1120+ */
1121+
1122+int flash_erase (flash_info_t * info, int s_first, int s_last)
1123+{
1124+ ushort result;
1125+ int iflag, cflag, prot, sect;
1126+ int rc = ERR_OK;
1127+ int chip;
1128+
1129+ /* first look for protection bits */
1130+
1131+ if (info->flash_id == FLASH_UNKNOWN)
1132+ return ERR_UNKNOWN_FLASH_TYPE;
1133+
1134+ if ((s_first < 0) || (s_first > s_last)) {
1135+ return ERR_INVAL;
1136+ }
1137+
1138+ if ((info->flash_id & FLASH_VENDMASK) !=
1139+ (AMD_MANUFACT & FLASH_VENDMASK)) {
1140+ return ERR_UNKNOWN_FLASH_VENDOR;
1141+ }
1142+
1143+ prot = 0;
1144+ for (sect = s_first; sect <= s_last; ++sect) {
1145+ if (info->protect[sect]) {
1146+ prot++;
1147+ }
1148+ }
1149+ if (prot)
1150+ return ERR_PROTECTED;
1151+
1152+ /*
1153+ * Disable interrupts which might cause a timeout
1154+ * here. Remember that our exception vectors are
1155+ * at address 0 in the flash, and we don't want a
1156+ * (ticker) exception to happen while the flash
1157+ * chip is in programming mode.
1158+ */
1159+ cflag = icache_status ();
1160+ icache_disable ();
1161+ iflag = disable_interrupts ();
1162+
1163+ /* Start erase on unprotected sectors */
1164+ for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
1165+ printf ("Erasing sector %2d ... ", sect);
1166+
1167+ /* arm simple, non interrupt dependent timer */
1168+ reset_timer_masked ();
1169+
1170+ if (info->protect[sect] == 0) { /* not protected */
1171+ vu_short *addr = (vu_short *) (info->start[sect]);
1172+
1173+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
1174+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
1175+ MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
1176+
1177+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
1178+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
1179+ *addr = CMD_ERASE_CONFIRM;
1180+
1181+ /* wait until flash is ready */
1182+ chip = 0;
1183+
1184+ do {
1185+ result = *addr;
1186+
1187+ /* check timeout */
1188+ if (get_timer_masked () >
1189+ CFG_FLASH_ERASE_TOUT) {
1190+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
1191+ chip = TMO;
1192+ break;
1193+ }
1194+
1195+ if (!chip
1196+ && (result & 0xFFFF) & BIT_ERASE_DONE)
1197+ chip = READY;
1198+
1199+ if (!chip
1200+ && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
1201+ chip = ERR;
1202+
1203+ } while (!chip);
1204+
1205+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
1206+
1207+ if (chip == ERR) {
1208+ rc = ERR_PROG_ERROR;
1209+ goto outahere;
1210+ }
1211+ if (chip == TMO) {
1212+ rc = ERR_TIMOUT;
1213+ goto outahere;
1214+ }
1215+
1216+ printf ("ok.\n");
1217+ } else { /* it was protected */
1218+
1219+ printf ("protected!\n");
1220+ }
1221+ }
1222+
1223+ if (ctrlc ())
1224+ printf ("User Interrupt!\n");
1225+
1226+ outahere:
1227+ /* allow flash to settle - wait 10 ms */
1228+ udelay_masked (10000);
1229+
1230+ if (iflag)
1231+ enable_interrupts ();
1232+
1233+ if (cflag)
1234+ icache_enable ();
1235+
1236+ return rc;
1237+}
1238+
1239+/*-----------------------------------------------------------------------
1240+ * Copy memory to flash
1241+ */
1242+
1243+volatile static int write_hword (flash_info_t * info, ulong dest, ushort data)
1244+{
1245+ vu_short *addr = (vu_short *) dest;
1246+ ushort result;
1247+ int rc = ERR_OK;
1248+ int cflag, iflag;
1249+ int chip;
1250+
1251+ /*
1252+ * Check if Flash is (sufficiently) erased
1253+ */
1254+ result = *addr;
1255+ if ((result & data) != data)
1256+ return ERR_NOT_ERASED;
1257+
1258+
1259+ /*
1260+ * Disable interrupts which might cause a timeout
1261+ * here. Remember that our exception vectors are
1262+ * at address 0 in the flash, and we don't want a
1263+ * (ticker) exception to happen while the flash
1264+ * chip is in programming mode.
1265+ */
1266+ cflag = icache_status ();
1267+ icache_disable ();
1268+ iflag = disable_interrupts ();
1269+
1270+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
1271+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
1272+ MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS;
1273+ *addr = CMD_PROGRAM;
1274+ *addr = data;
1275+
1276+ /* arm simple, non interrupt dependent timer */
1277+ reset_timer_masked ();
1278+
1279+ /* wait until flash is ready */
1280+ chip = 0;
1281+ do {
1282+ result = *addr;
1283+
1284+ /* check timeout */
1285+ if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
1286+ chip = ERR | TMO;
1287+ break;
1288+ }
1289+ if (!chip && ((result & 0x80) == (data & 0x80)))
1290+ chip = READY;
1291+
1292+ if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) {
1293+ result = *addr;
1294+
1295+ if ((result & 0x80) == (data & 0x80))
1296+ chip = READY;
1297+ else
1298+ chip = ERR;
1299+ }
1300+
1301+ } while (!chip);
1302+
1303+ *addr = CMD_READ_ARRAY;
1304+
1305+ if (chip == ERR || *addr != data)
1306+ rc = ERR_PROG_ERROR;
1307+
1308+ if (iflag)
1309+ enable_interrupts ();
1310+
1311+ if (cflag)
1312+ icache_enable ();
1313+
1314+ return rc;
1315+}
1316+
1317+/*-----------------------------------------------------------------------
1318+ * Copy memory to flash.
1319+ */
1320+
1321+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1322+{
1323+ ulong cp, wp;
1324+ int l;
1325+ int i, rc;
1326+ ushort data;
1327+
1328+ wp = (addr & ~1); /* get lower word aligned address */
1329+
1330+ /*
1331+ * handle unaligned start bytes
1332+ */
1333+ if ((l = addr - wp) != 0) {
1334+ data = 0;
1335+ for (i = 0, cp = wp; i < l; ++i, ++cp) {
1336+ data = (data >> 8) | (*(uchar *) cp << 8);
1337+ }
1338+ for (; i < 2 && cnt > 0; ++i) {
1339+ data = (data >> 8) | (*src++ << 8);
1340+ --cnt;
1341+ ++cp;
1342+ }
1343+ for (; cnt == 0 && i < 2; ++i, ++cp) {
1344+ data = (data >> 8) | (*(uchar *) cp << 8);
1345+ }
1346+
1347+ if ((rc = write_hword (info, wp, data)) != 0) {
1348+ return (rc);
1349+ }
1350+ wp += 2;
1351+ }
1352+
1353+ /*
1354+ * handle word aligned part
1355+ */
1356+ while (cnt >= 2) {
1357+ data = *((vu_short *) src);
1358+ if ((rc = write_hword (info, wp, data)) != 0) {
1359+ return (rc);
1360+ }
1361+ src += 2;
1362+ wp += 2;
1363+ cnt -= 2;
1364+ }
1365+
1366+ if (cnt == 0) {
1367+ return ERR_OK;
1368+ }
1369+
1370+ /*
1371+ * handle unaligned tail bytes
1372+ */
1373+ data = 0;
1374+ for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
1375+ data = (data >> 8) | (*src++ << 8);
1376+ --cnt;
1377+ }
1378+ for (; i < 2; ++i, ++cp) {
1379+ data = (data >> 8) | (*(uchar *) cp << 8);
1380+ }
1381+
1382+ return write_hword (info, wp, data);
1383+}
1384Index: u-boot/board/smdk2443/udc.c
1385===================================================================
1386--- /dev/null
1387+++ u-boot/board/smdk2443/udc.c
1388@@ -0,0 +1,23 @@
1389+
1390+#include <common.h>
1391+#include <usbdcore.h>
1392+#include <s3c2440.h>
1393+
1394+void udc_ctrl(enum usbd_event event, int param)
1395+{
1396+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
1397+
1398+ switch (event) {
1399+ case UDC_CTRL_PULLUP_ENABLE:
1400+ if (param)
1401+ gpio->GPGDAT |= (1 << 12);
1402+ else
1403+ gpio->GPGDAT &= ~(1 << 12);
1404+ break;
1405+ case UDC_CTRL_500mA_ENABLE:
1406+ /* IGNORE */
1407+ break;
1408+ default:
1409+ break;
1410+ }
1411+}
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-strtoul.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-strtoul.patch
new file mode 100644
index 0000000000..a88e94b006
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-strtoul.patch
@@ -0,0 +1,43 @@
1Make simple_strtoul work with upper-case hex numbers.
2
3Signed-off-by: Harald Welte <laforge@openmoko.org>
4
5Index: u-boot/lib_generic/vsprintf.c
6===================================================================
7--- u-boot.orig/lib_generic/vsprintf.c
8+++ u-boot/lib_generic/vsprintf.c
9@@ -25,21 +25,22 @@ unsigned long simple_strtoul(const char
10 {
11 unsigned long result = 0,value;
12
13- if (*cp == '0') {
14- cp++;
15- if ((*cp == 'x') && isxdigit(cp[1])) {
16- base = 16;
17- cp++;
18- }
19- if (!base) {
20- base = 8;
21- }
22- }
23 if (!base) {
24 base = 10;
25+ if (*cp == '0') {
26+ base = 8;
27+ cp++;
28+ if ((toupper(*cp) == 'X') && isxdigit(cp[1])) {
29+ cp++;
30+ base = 16;
31+ }
32+ }
33+ } else if (base == 16) {
34+ if (cp[0] == '0' && toupper(cp[1]) == 'X')
35+ cp += 2;
36 }
37- while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp)
38- ? toupper(*cp) : *cp)-'A'+10) < base) {
39+ while (isxdigit(*cp) &&
40+ (value = isdigit(*cp) ? *cp-'0' : toupper(*cp)-'A'+10) < base) {
41 result = result*base + value;
42 cp++;
43 }
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-usbtty-acm.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-usbtty-acm.patch
new file mode 100644
index 0000000000..722a227aa6
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/uboot-usbtty-acm.patch
@@ -0,0 +1,1607 @@
1This patch adds cdc_acm interoperability to u-boot usbtty.
2
3It was taken (almost blindly) from the Linux for Siemens SX1 project on
4handhelds.org. Please don't complain to me about coding style issues
5or whitespace changes in this one - HW.
6
7Index: u-boot/drivers/usbtty.c
8===================================================================
9--- u-boot.orig/drivers/usbtty.c 2007-02-08 21:11:27.000000000 +0100
10+++ u-boot/drivers/usbtty.c 2007-02-08 21:11:55.000000000 +0100
11@@ -1,6 +1,9 @@
12 /*
13 * (C) Copyright 2003
14 * Gerry Hamel, geh@ti.com, Texas Instruments
15+ *
16+ * (C) Copyright 2006
17+ * Bryan O'Donoghue, bodonoghue <at> codehermit.ie
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21@@ -22,26 +25,61 @@
22
23 #ifdef CONFIG_USB_TTY
24
25+#include <asm/io.h>
26 #include <circbuf.h>
27 #include <devices.h>
28 #include "usbtty.h"
29+#include "usb_cdc_acm.h"
30+#include "usbdescriptors.h"
31+#include <config.h> /* If defined, override Linux identifiers with
32+ * vendor specific ones */
33
34 #if 0
35-#define TTYDBG(fmt,args...) serial_printf("[%s] %s %d: "fmt, __FILE__,__FUNCTION__,__LINE__,##args)
36+//+++ debug print into memory buffer,like kernel log
37+static char* log_buf = 0x10e00000; // somewhere in RAM
38+static char log_str[512];
39+#define TTYDBG(fmt,args...)\
40+ sprintf(log_str,"\n[%s] %s %d: "fmt, __FILE__,__FUNCTION__,__LINE__,##args);\
41+ memcpy(log_buf, log_str, strlen(log_str));\
42+ log_buf+=strlen(log_str);\
43+ strcpy(log_buf,"\n---------------------------------------------------")\
44+//---
45 #else
46 #define TTYDBG(fmt,args...) do{}while(0)
47 #endif
48
49 #if 0
50-#define TTYERR(fmt,args...) serial_printf("ERROR![%s] %s %d: "fmt, __FILE__,__FUNCTION__,__LINE__,##args)
51+#define TTYDBG(fmt,args...)\
52+ serial_printf("[%s] %s %d: "fmt"\n", __FILE__,__FUNCTION__,__LINE__,##args)
53+#endif
54+
55+#if 0
56+#define TTYERR(fmt,args...)\
57+ serial_printf("ERROR![%s] %s %d: "fmt"\n", __FILE__,__FUNCTION__,\
58+ __LINE__,##args)
59 #else
60 #define TTYERR(fmt,args...) do{}while(0)
61 #endif
62
63 /*
64+ * Defines
65+ */
66+#define NUM_CONFIGS 1
67+#define MAX_INTERFACES 2
68+#define NUM_ENDPOINTS 3
69+#define ACM_TX_ENDPOINT 3
70+#define ACM_RX_ENDPOINT 2
71+#define GSERIAL_TX_ENDPOINT 2
72+#define GSERIAL_RX_ENDPOINT 1
73+#define NUM_ACM_INTERFACES 2
74+#define NUM_GSERIAL_INTERFACES 1
75+#define CONFIG_USBD_DATA_INTERFACE_STR "Bulk Data Interface"
76+#define CONFIG_USBD_CTRL_INTERFACE_STR "Control Interface"
77+
78+/*
79 * Buffers to hold input and output data
80 */
81-#define USBTTY_BUFFER_SIZE 256
82+#define USBTTY_BUFFER_SIZE 2048
83 static circbuf_t usbtty_input;
84 static circbuf_t usbtty_output;
85
86@@ -50,157 +88,336 @@
87 * Instance variables
88 */
89 static device_t usbttydev;
90-static struct usb_device_instance device_instance[1];
91-static struct usb_bus_instance bus_instance[1];
92+static struct usb_device_instance device_instance[1];
93+static struct usb_bus_instance bus_instance[1];
94 static struct usb_configuration_instance config_instance[NUM_CONFIGS];
95-static struct usb_interface_instance interface_instance[NUM_INTERFACES];
96-static struct usb_alternate_instance alternate_instance[NUM_INTERFACES];
97-static struct usb_endpoint_instance endpoint_instance[NUM_ENDPOINTS+1]; /* one extra for control endpoint */
98-
99-/*
100- * Static allocation of urbs
101- */
102-#define RECV_ENDPOINT 1
103-#define TX_ENDPOINT 2
104+static struct usb_interface_instance interface_instance[MAX_INTERFACES];
105+static struct usb_alternate_instance alternate_instance[MAX_INTERFACES];
106+/* one extra for control endpoint */
107+static struct usb_endpoint_instance endpoint_instance[NUM_ENDPOINTS+1];
108
109 /*
110 * Global flag
111 */
112 int usbtty_configured_flag = 0;
113
114-
115 /*
116 * Serial number
117 */
118 static char serial_number[16];
119
120+
121 /*
122- * Descriptors
123+ * Descriptors, Strings, Local variables.
124 */
125+
126+/* defined and used by usbdcore_ep0.c */
127+extern struct usb_string_descriptor **usb_strings;
128+
129+/* Indicies, References */
130+static unsigned short rx_endpoint = 0;
131+static unsigned short tx_endpoint = 0;
132+static unsigned short interface_count = 0;
133+static struct usb_string_descriptor *usbtty_string_table[STR_COUNT];
134+
135+/* USB Descriptor Strings */
136 static u8 wstrLang[4] = {4,USB_DT_STRING,0x9,0x4};
137 static u8 wstrManufacturer[2 + 2*(sizeof(CONFIG_USBD_MANUFACTURER)-1)];
138 static u8 wstrProduct[2 + 2*(sizeof(CONFIG_USBD_PRODUCT_NAME)-1)];
139 static u8 wstrSerial[2 + 2*(sizeof(serial_number) - 1)];
140 static u8 wstrConfiguration[2 + 2*(sizeof(CONFIG_USBD_CONFIGURATION_STR)-1)];
141-static u8 wstrInterface[2 + 2*(sizeof(CONFIG_USBD_INTERFACE_STR)-1)];
142-
143-static struct usb_string_descriptor *usbtty_string_table[] = {
144- (struct usb_string_descriptor*)wstrLang,
145- (struct usb_string_descriptor*)wstrManufacturer,
146- (struct usb_string_descriptor*)wstrProduct,
147- (struct usb_string_descriptor*)wstrSerial,
148- (struct usb_string_descriptor*)wstrConfiguration,
149- (struct usb_string_descriptor*)wstrInterface
150-};
151-extern struct usb_string_descriptor **usb_strings; /* defined and used by omap1510_ep0.c */
152+static u8 wstrDataInterface[2 + 2*(sizeof(CONFIG_USBD_DATA_INTERFACE_STR)-1)];
153+static u8 wstrCtrlInterface[2 + 2*(sizeof(CONFIG_USBD_DATA_INTERFACE_STR)-1)];
154
155+/* Standard USB Data Structures */
156+static struct usb_interface_descriptor interface_descriptors[MAX_INTERFACES];
157+static struct usb_endpoint_descriptor *ep_descriptor_ptrs[NUM_ENDPOINTS];
158+static struct usb_configuration_descriptor *configuration_descriptor = 0;
159 static struct usb_device_descriptor device_descriptor = {
160- bLength: sizeof(struct usb_device_descriptor),
161- bDescriptorType: USB_DT_DEVICE,
162- bcdUSB: USB_BCD_VERSION,
163- bDeviceClass: USBTTY_DEVICE_CLASS,
164- bDeviceSubClass: USBTTY_DEVICE_SUBCLASS,
165- bDeviceProtocol: USBTTY_DEVICE_PROTOCOL,
166- bMaxPacketSize0: EP0_MAX_PACKET_SIZE,
167- idVendor: CONFIG_USBD_VENDORID,
168- idProduct: CONFIG_USBD_PRODUCTID,
169- bcdDevice: USBTTY_BCD_DEVICE,
170- iManufacturer: STR_MANUFACTURER,
171- iProduct: STR_PRODUCT,
172- iSerialNumber: STR_SERIAL,
173- bNumConfigurations: NUM_CONFIGS
174- };
175-static struct usb_configuration_descriptor config_descriptors[NUM_CONFIGS] = {
176- {
177- bLength: sizeof(struct usb_configuration_descriptor),
178- bDescriptorType: USB_DT_CONFIG,
179- wTotalLength: (sizeof(struct usb_configuration_descriptor)*NUM_CONFIGS) +
180- (sizeof(struct usb_interface_descriptor)*NUM_INTERFACES) +
181- (sizeof(struct usb_endpoint_descriptor)*NUM_ENDPOINTS),
182- bNumInterfaces: NUM_INTERFACES,
183- bConfigurationValue: 1,
184- iConfiguration: STR_CONFIG,
185- bmAttributes: BMATTRIBUTE_SELF_POWERED | BMATTRIBUTE_RESERVED,
186- bMaxPower: USBTTY_MAXPOWER
187- },
188-};
189-static struct usb_interface_descriptor interface_descriptors[NUM_INTERFACES] = {
190- {
191- bLength: sizeof(struct usb_interface_descriptor),
192- bDescriptorType: USB_DT_INTERFACE,
193- bInterfaceNumber: 0,
194- bAlternateSetting: 0,
195- bNumEndpoints: NUM_ENDPOINTS,
196- bInterfaceClass: USBTTY_INTERFACE_CLASS,
197- bInterfaceSubClass: USBTTY_INTERFACE_SUBCLASS,
198- bInterfaceProtocol: USBTTY_INTERFACE_PROTOCOL,
199- iInterface: STR_INTERFACE
200- },
201+ .bLength = sizeof(struct usb_device_descriptor),
202+ .bDescriptorType = USB_DT_DEVICE,
203+ .bcdUSB = cpu_to_le16(USB_BCD_VERSION),
204+ .bDeviceSubClass = 0x00,
205+ .bDeviceProtocol = 0x00,
206+ .bMaxPacketSize0 = EP0_MAX_PACKET_SIZE,
207+ .idVendor = cpu_to_le16(CONFIG_USBD_VENDORID),
208+ .bcdDevice = cpu_to_le16(USBTTY_BCD_DEVICE),
209+ .iManufacturer = STR_MANUFACTURER,
210+ .iProduct = STR_PRODUCT,
211+ .iSerialNumber = STR_SERIAL,
212+ .bNumConfigurations = NUM_CONFIGS
213 };
214-static struct usb_endpoint_descriptor ep_descriptors[NUM_ENDPOINTS] = {
215- {
216- bLength: sizeof(struct usb_endpoint_descriptor),
217- bDescriptorType: USB_DT_ENDPOINT,
218- bEndpointAddress: CONFIG_USBD_SERIAL_OUT_ENDPOINT | USB_DIR_OUT,
219- bmAttributes: USB_ENDPOINT_XFER_BULK,
220- wMaxPacketSize: CONFIG_USBD_SERIAL_OUT_PKTSIZE,
221- bInterval: 0
222- },
223- {
224- bLength: sizeof(struct usb_endpoint_descriptor),
225- bDescriptorType: USB_DT_ENDPOINT,
226- bEndpointAddress: CONFIG_USBD_SERIAL_IN_ENDPOINT | USB_DIR_IN,
227- bmAttributes: USB_ENDPOINT_XFER_BULK,
228- wMaxPacketSize: CONFIG_USBD_SERIAL_IN_PKTSIZE,
229- bInterval: 0
230- },
231- {
232- bLength: sizeof(struct usb_endpoint_descriptor),
233- bDescriptorType: USB_DT_ENDPOINT,
234- bEndpointAddress: CONFIG_USBD_SERIAL_INT_ENDPOINT | USB_DIR_IN,
235- bmAttributes: USB_ENDPOINT_XFER_INT,
236- wMaxPacketSize: CONFIG_USBD_SERIAL_INT_PKTSIZE,
237- bInterval: 0
238- },
239-};
240-static struct usb_endpoint_descriptor *ep_descriptor_ptrs[NUM_ENDPOINTS] = {
241- &(ep_descriptors[0]),
242- &(ep_descriptors[1]),
243- &(ep_descriptors[2]),
244+
245+
246+/*
247+ * Static CDC ACM specific descriptors
248+ */
249+
250+struct acm_config_desc {
251+ struct usb_configuration_descriptor configuration_desc;
252+
253+ /* Master Interface */
254+ struct usb_interface_descriptor interface_desc;
255+
256+ struct usb_class_header_function_descriptor usb_class_header;
257+ struct usb_class_call_management_descriptor usb_class_call_mgt;
258+ struct usb_class_abstract_control_descriptor usb_class_acm;
259+ struct usb_class_union_function_descriptor usb_class_union;
260+ struct usb_endpoint_descriptor notification_endpoint;
261+
262+ /* Slave Interface */
263+ struct usb_interface_descriptor data_class_interface;
264+ struct usb_endpoint_descriptor
265+ data_endpoints[NUM_ENDPOINTS-1] __attribute__((packed));
266+} __attribute__((packed));
267+
268+static struct acm_config_desc acm_configuration_descriptors[NUM_CONFIGS] = {
269+ {
270+ .configuration_desc ={
271+ .bLength =
272+ sizeof(struct usb_configuration_descriptor),
273+ .bDescriptorType = USB_DT_CONFIG,
274+ .wTotalLength =
275+ cpu_to_le16(sizeof(struct acm_config_desc)),
276+ .bNumInterfaces = NUM_ACM_INTERFACES,
277+ .bConfigurationValue = 1,
278+ .iConfiguration = STR_CONFIG,
279+ .bmAttributes =
280+ BMATTRIBUTE_SELF_POWERED|BMATTRIBUTE_RESERVED,
281+ .bMaxPower = USBTTY_MAXPOWER
282+ },
283+ /* Interface 1 */
284+ .interface_desc = {
285+ .bLength = sizeof(struct usb_interface_descriptor),
286+ .bDescriptorType = USB_DT_INTERFACE,
287+ .bInterfaceNumber = 0,
288+ .bAlternateSetting = 0,
289+ .bNumEndpoints = 0x01,
290+ .bInterfaceClass =
291+ COMMUNICATIONS_INTERFACE_CLASS_CONTROL,
292+ .bInterfaceSubClass = COMMUNICATIONS_ACM_SUBCLASS,
293+ .bInterfaceProtocol = COMMUNICATIONS_V25TER_PROTOCOL,
294+ .iInterface = STR_CTRL_INTERFACE,
295+ },
296+ .usb_class_header = {
297+ .bFunctionLength =
298+ sizeof(struct usb_class_header_function_descriptor),
299+ .bDescriptorType = CS_INTERFACE,
300+ .bDescriptorSubtype = USB_ST_HEADER,
301+ .bcdCDC = cpu_to_le16(110),
302+ },
303+ .usb_class_call_mgt = {
304+ .bFunctionLength =
305+ sizeof(struct usb_class_call_management_descriptor),
306+ .bDescriptorType = CS_INTERFACE,
307+ .bDescriptorSubtype = USB_ST_CMF,
308+ .bmCapabilities = 0x00,
309+ .bDataInterface = 0x01,
310+ },
311+ .usb_class_acm = {
312+ .bFunctionLength =
313+ sizeof(struct usb_class_abstract_control_descriptor),
314+ .bDescriptorType = CS_INTERFACE,
315+ .bDescriptorSubtype = USB_ST_ACMF,
316+ .bmCapabilities = 0x00,
317+ },
318+ .usb_class_union = {
319+ .bFunctionLength =
320+ sizeof(struct usb_class_union_function_descriptor),
321+ .bDescriptorType = CS_INTERFACE,
322+ .bDescriptorSubtype = USB_ST_UF,
323+ .bMasterInterface = 0x00,
324+ .bSlaveInterface0 = 0x01,
325+ },
326+ .notification_endpoint = {
327+ .bLength =
328+ sizeof(struct usb_endpoint_descriptor),
329+ .bDescriptorType = USB_DT_ENDPOINT,
330+ .bEndpointAddress = 0x01 | USB_DIR_IN,
331+ .bmAttributes = USB_ENDPOINT_XFER_INT,
332+ .wMaxPacketSize
333+ = cpu_to_le16(CONFIG_USBD_SERIAL_INT_PKTSIZE),
334+ .bInterval = 0xFF,
335+ },
336+
337+ /* Interface 2 */
338+ .data_class_interface = {
339+ .bLength =
340+ sizeof(struct usb_interface_descriptor),
341+ .bDescriptorType = USB_DT_INTERFACE,
342+ .bInterfaceNumber = 0x01,
343+ .bAlternateSetting = 0x00,
344+ .bNumEndpoints = 0x02,
345+ .bInterfaceClass =
346+ COMMUNICATIONS_INTERFACE_CLASS_DATA,
347+ .bInterfaceSubClass = DATA_INTERFACE_SUBCLASS_NONE,
348+ .bInterfaceProtocol = DATA_INTERFACE_PROTOCOL_NONE,
349+ .iInterface = STR_DATA_INTERFACE,
350+ },
351+ .data_endpoints = {
352+ {
353+ .bLength =
354+ sizeof(struct usb_endpoint_descriptor),
355+ .bDescriptorType = USB_DT_ENDPOINT,
356+ .bEndpointAddress = 0x02 | USB_DIR_OUT,
357+ .bmAttributes =
358+ USB_ENDPOINT_XFER_BULK,
359+ .wMaxPacketSize =
360+ cpu_to_le16(CONFIG_USBD_SERIAL_BULK_PKTSIZE),
361+ .bInterval = 0xFF,
362+ },
363+ {
364+ .bLength =
365+ sizeof(struct usb_endpoint_descriptor),
366+ .bDescriptorType = USB_DT_ENDPOINT,
367+ .bEndpointAddress = 0x03 | USB_DIR_IN,
368+ .bmAttributes =
369+ USB_ENDPOINT_XFER_BULK,
370+ .wMaxPacketSize =
371+ cpu_to_le16(CONFIG_USBD_SERIAL_BULK_PKTSIZE),
372+ .bInterval = 0xFF,
373+ },
374+ },
375+ },
376+};
377+
378+static struct rs232_emu rs232_desc={
379+ .dter = 115200,
380+ .stop_bits = 0x00,
381+ .parity = 0x00,
382+ .data_bits = 0x08
383 };
384
385-/* utility function for converting char* to wide string used by USB */
386-static void str2wide (char *str, u16 * wide)
387-{
388- int i;
389
390- for (i = 0; i < strlen (str) && str[i]; i++)
391- wide[i] = (u16) str[i];
392-}
393+/*
394+ * Static Generic Serial specific data
395+ */
396+
397+
398+struct gserial_config_desc {
399+
400+ struct usb_configuration_descriptor configuration_desc;
401+ struct usb_interface_descriptor
402+ interface_desc[NUM_GSERIAL_INTERFACES] __attribute__((packed));
403+ struct usb_endpoint_descriptor
404+ data_endpoints[NUM_ENDPOINTS] __attribute__((packed));
405+
406+} __attribute__((packed));
407+
408+static struct gserial_config_desc
409+gserial_configuration_descriptors[NUM_CONFIGS] ={
410+ {
411+ .configuration_desc ={
412+ .bLength = sizeof(struct usb_configuration_descriptor),
413+ .bDescriptorType = USB_DT_CONFIG,
414+ .wTotalLength =
415+ cpu_to_le16(sizeof(struct gserial_config_desc)),
416+ .bNumInterfaces = NUM_GSERIAL_INTERFACES,
417+ .bConfigurationValue = 1,
418+ .iConfiguration = STR_CONFIG,
419+ .bmAttributes =
420+ BMATTRIBUTE_SELF_POWERED|BMATTRIBUTE_RESERVED,
421+ .bMaxPower = USBTTY_MAXPOWER
422+ },
423+ .interface_desc = {
424+ {
425+ .bLength =
426+ sizeof(struct usb_interface_descriptor),
427+ .bDescriptorType = USB_DT_INTERFACE,
428+ .bInterfaceNumber = 0,
429+ .bAlternateSetting = 0,
430+ .bNumEndpoints = NUM_ENDPOINTS,
431+ .bInterfaceClass =
432+ COMMUNICATIONS_INTERFACE_CLASS_VENDOR,
433+ .bInterfaceSubClass =
434+ COMMUNICATIONS_NO_SUBCLASS,
435+ .bInterfaceProtocol =
436+ COMMUNICATIONS_NO_PROTOCOL,
437+ .iInterface = STR_DATA_INTERFACE
438+ },
439+ },
440+ .data_endpoints = {
441+ {
442+ .bLength =
443+ sizeof(struct usb_endpoint_descriptor),
444+ .bDescriptorType = USB_DT_ENDPOINT,
445+ .bEndpointAddress = 0x01 | USB_DIR_OUT,
446+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
447+ .wMaxPacketSize =
448+ cpu_to_le16(CONFIG_USBD_SERIAL_OUT_PKTSIZE),
449+ .bInterval= 0xFF,
450+ },
451+ {
452+ .bLength =
453+ sizeof(struct usb_endpoint_descriptor),
454+ .bDescriptorType = USB_DT_ENDPOINT,
455+ .bEndpointAddress = 0x02 | USB_DIR_IN,
456+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
457+ .wMaxPacketSize =
458+ cpu_to_le16(CONFIG_USBD_SERIAL_IN_PKTSIZE),
459+ .bInterval = 0xFF,
460+ },
461+ {
462+ .bLength =
463+ sizeof(struct usb_endpoint_descriptor),
464+ .bDescriptorType = USB_DT_ENDPOINT,
465+ .bEndpointAddress = 0x03 | USB_DIR_IN,
466+ .bmAttributes = USB_ENDPOINT_XFER_INT,
467+ .wMaxPacketSize =
468+ cpu_to_le16(CONFIG_USBD_SERIAL_INT_PKTSIZE),
469+ .bInterval = 0xFF,
470+ },
471+ },
472+ },
473+};
474
475 /*
476- * Prototypes
477+ * Static Function Prototypes
478 */
479+
480 static void usbtty_init_strings (void);
481 static void usbtty_init_instances (void);
482 static void usbtty_init_endpoints (void);
483-
484+static void usbtty_init_terminal_type(short type);
485 static void usbtty_event_handler (struct usb_device_instance *device,
486- usb_device_event_t event, int data);
487+ usb_device_event_t event, int data);
488+static int usbtty_cdc_setup(struct usb_device_request *request,
489+ struct urb *urb);
490 static int usbtty_configured (void);
491-
492 static int write_buffer (circbuf_t * buf);
493 static int fill_buffer (circbuf_t * buf);
494
495 void usbtty_poll (void);
496-static void pretend_interrupts (void);
497
498+/* utility function for converting char* to wide string used by USB */
499+static void str2wide (char *str, u16 * wide)
500+{
501+ int i;
502+ for (i = 0; i < strlen (str) && str[i]; i++){
503+ #if defined(__LITTLE_ENDIAN)
504+ wide[i] = (u16) str[i];
505+ #elif defined(__BIG_ENDIAN)
506+ wide[i] = ((u16)(str[i])<<8);
507+ #else
508+ #error "__LITTLE_ENDIAN or __BIG_ENDIAN undefined"
509+ #endif
510+ }
511+}
512
513 /*
514 * Test whether a character is in the RX buffer
515 */
516+
517 int usbtty_tstc (void)
518 {
519+ struct usb_endpoint_instance *endpoint =
520+ &endpoint_instance[rx_endpoint];
521+
522+ /* If no input data exists, allow more RX to be accepted */
523+ if(usbtty_input.size <= 0){
524+ udc_unset_nak(endpoint->endpoint_address&0x03);
525+ }
526+
527 usbtty_poll ();
528 return (usbtty_input.size > 0);
529 }
530@@ -210,15 +427,21 @@
531 * otherwise. When the function is succesfull, the character read is
532 * written into its argument c.
533 */
534+
535 int usbtty_getc (void)
536 {
537 char c;
538+ struct usb_endpoint_instance *endpoint =
539+ &endpoint_instance[rx_endpoint];
540
541 while (usbtty_input.size <= 0) {
542+ udc_unset_nak(endpoint->endpoint_address&0x03);
543 usbtty_poll ();
544 }
545
546 buf_pop (&usbtty_input, &c, 1);
547+ udc_set_nak(endpoint->endpoint_address&0x03);
548+
549 return c;
550 }
551
552@@ -238,7 +461,6 @@
553 }
554 }
555
556-
557 /* usbtty_puts() helper function for finding the next '\n' in a string */
558 static int next_nl_pos (const char *s)
559 {
560@@ -252,8 +474,9 @@
561 }
562
563 /*
564- * Output a string to the usb client port.
565+ * Output a string to the usb client port - implementing flow control
566 */
567+
568 static void __usbtty_puts (const char *str, int len)
569 {
570 int maxlen = usbtty_output.totalsize;
571@@ -261,22 +484,19 @@
572
573 /* break str into chunks < buffer size, if needed */
574 while (len > 0) {
575- space = maxlen - usbtty_output.size;
576+ usbtty_poll ();
577
578+ space = maxlen - usbtty_output.size;
579 /* Empty buffer here, if needed, to ensure space... */
580- if (space <= 0) {
581+ if (space) {
582 write_buffer (&usbtty_output);
583- space = maxlen - usbtty_output.size;
584- if (space <= 0) {
585- space = len; /* allow old data to be overwritten. */
586- }
587- }
588-
589- n = MIN (space, MIN (len, maxlen));
590- buf_push (&usbtty_output, str, n);
591+
592+ n = MIN (space, MIN (len, maxlen));
593+ buf_push (&usbtty_output, str, n);
594
595- str += n;
596- len -= n;
597+ str += n;
598+ len -= n;
599+ }
600 }
601 }
602
603@@ -313,8 +533,10 @@
604 {
605 int rc;
606 char * sn;
607+ char * tt;
608 int snlen;
609
610+ /* Get serial number */
611 if (!(sn = getenv("serial#"))) {
612 sn = "000000000000";
613 }
614@@ -327,6 +549,14 @@
615 memcpy (serial_number, sn, snlen);
616 serial_number[snlen] = '\0';
617
618+ /* Decide on which type of UDC device to be.
619+ */
620+
621+ if(!(tt = getenv("usbtty"))) {
622+ tt = "generic";
623+ }
624+ usbtty_init_terminal_type(strcmp(tt,"cdc_acm"));
625+
626 /* prepare buffers... */
627 buf_init (&usbtty_input, USBTTY_BUFFER_SIZE);
628 buf_init (&usbtty_output, USBTTY_BUFFER_SIZE);
629@@ -337,7 +567,7 @@
630 usbtty_init_strings ();
631 usbtty_init_instances ();
632
633- udc_startup_events (device_instance); /* Enable our device, initialize udc pointers */
634+ udc_startup_events (device_instance);/* Enable dev, init udc pointers */
635 udc_connect (); /* Enable pullup for host detection */
636
637 usbtty_init_endpoints ();
638@@ -362,34 +592,52 @@
639 {
640 struct usb_string_descriptor *string;
641
642+ usbtty_string_table[STR_LANG] =
643+ (struct usb_string_descriptor*)wstrLang;
644+
645 string = (struct usb_string_descriptor *) wstrManufacturer;
646- string->bLength = sizeof (wstrManufacturer);
647+ string->bLength = sizeof(wstrManufacturer);
648 string->bDescriptorType = USB_DT_STRING;
649 str2wide (CONFIG_USBD_MANUFACTURER, string->wData);
650+ usbtty_string_table[STR_MANUFACTURER]=string;
651+
652
653 string = (struct usb_string_descriptor *) wstrProduct;
654- string->bLength = sizeof (wstrProduct);
655+ string->bLength = sizeof(wstrProduct);
656 string->bDescriptorType = USB_DT_STRING;
657 str2wide (CONFIG_USBD_PRODUCT_NAME, string->wData);
658+ usbtty_string_table[STR_PRODUCT]=string;
659+
660
661 string = (struct usb_string_descriptor *) wstrSerial;
662- string->bLength = 2 + 2*strlen(serial_number);
663+ string->bLength = sizeof(serial_number);
664 string->bDescriptorType = USB_DT_STRING;
665 str2wide (serial_number, string->wData);
666+ usbtty_string_table[STR_SERIAL]=string;
667+
668
669 string = (struct usb_string_descriptor *) wstrConfiguration;
670- string->bLength = sizeof (wstrConfiguration);
671+ string->bLength = sizeof(wstrConfiguration);
672 string->bDescriptorType = USB_DT_STRING;
673 str2wide (CONFIG_USBD_CONFIGURATION_STR, string->wData);
674+ usbtty_string_table[STR_CONFIG]=string;
675+
676+
677+ string = (struct usb_string_descriptor *) wstrDataInterface;
678+ string->bLength = sizeof(wstrDataInterface);
679+ string->bDescriptorType = USB_DT_STRING;
680+ str2wide (CONFIG_USBD_DATA_INTERFACE_STR, string->wData);
681+ usbtty_string_table[STR_DATA_INTERFACE]=string;
682
683- string = (struct usb_string_descriptor *) wstrInterface;
684- string->bLength = sizeof (wstrInterface);
685+ string = (struct usb_string_descriptor *) wstrCtrlInterface;
686+ string->bLength = sizeof(wstrCtrlInterface);
687 string->bDescriptorType = USB_DT_STRING;
688- str2wide (CONFIG_USBD_INTERFACE_STR, string->wData);
689+ str2wide (CONFIG_USBD_CTRL_INTERFACE_STR, string->wData);
690+ usbtty_string_table[STR_CTRL_INTERFACE]=string;
691
692 /* Now, initialize the string table for ep0 handling */
693 usb_strings = usbtty_string_table;
694-}
695+}
696
697 static void usbtty_init_instances (void)
698 {
699@@ -400,6 +648,7 @@
700 device_instance->device_state = STATE_INIT;
701 device_instance->device_descriptor = &device_descriptor;
702 device_instance->event = usbtty_event_handler;
703+ device_instance->cdc_recv_setup = usbtty_cdc_setup;
704 device_instance->bus = bus_instance;
705 device_instance->configurations = NUM_CONFIGS;
706 device_instance->configuration_instance_array = config_instance;
707@@ -415,8 +664,8 @@
708 /* configuration instance */
709 memset (config_instance, 0,
710 sizeof (struct usb_configuration_instance));
711- config_instance->interfaces = NUM_INTERFACES;
712- config_instance->configuration_descriptor = config_descriptors;
713+ config_instance->interfaces = interface_count;
714+ config_instance->configuration_descriptor = configuration_descriptor;
715 config_instance->interface_instance_array = interface_instance;
716
717 /* interface instance */
718@@ -447,17 +696,22 @@
719 sizeof (struct usb_endpoint_instance));
720
721 endpoint_instance[i].endpoint_address =
722- ep_descriptors[i - 1].bEndpointAddress;
723+ ep_descriptor_ptrs[i - 1]->bEndpointAddress;
724
725- endpoint_instance[i].rcv_packetSize =
726- ep_descriptors[i - 1].wMaxPacketSize;
727 endpoint_instance[i].rcv_attributes =
728- ep_descriptors[i - 1].bmAttributes;
729+ ep_descriptor_ptrs[i - 1]->bmAttributes;
730+
731+ endpoint_instance[i].rcv_packetSize =
732+ le16_to_cpu(ep_descriptor_ptrs[i - 1]->wMaxPacketSize);
733+
734+ endpoint_instance[i].tx_attributes =
735+ ep_descriptor_ptrs[i - 1]->bmAttributes;
736
737 endpoint_instance[i].tx_packetSize =
738- ep_descriptors[i - 1].wMaxPacketSize;
739+ le16_to_cpu(ep_descriptor_ptrs[i - 1]->wMaxPacketSize);
740+
741 endpoint_instance[i].tx_attributes =
742- ep_descriptors[i - 1].bmAttributes;
743+ ep_descriptor_ptrs[i - 1]->bmAttributes;
744
745 urb_link_init (&endpoint_instance[i].rcv);
746 urb_link_init (&endpoint_instance[i].rdy);
747@@ -480,13 +734,79 @@
748 int i;
749
750 bus_instance->max_endpoints = NUM_ENDPOINTS + 1;
751- for (i = 0; i <= NUM_ENDPOINTS; i++) {
752+ for (i = 1; i <= NUM_ENDPOINTS; i++) {
753 udc_setup_ep (device_instance, i, &endpoint_instance[i]);
754 }
755 }
756
757+/* usbtty_init_terminal_type
758+ *
759+ * Do some late binding for our device type.
760+ */
761+static void usbtty_init_terminal_type(short type)
762+{
763+ switch(type){
764+ /* CDC ACM */
765+ case 0:
766+ /* Assign endpoint descriptors */
767+ ep_descriptor_ptrs[0] =
768+ &acm_configuration_descriptors[0].notification_endpoint;
769+ ep_descriptor_ptrs[1] =
770+ &acm_configuration_descriptors[0].data_endpoints[0];
771+ ep_descriptor_ptrs[2] =
772+ &acm_configuration_descriptors[0].data_endpoints[1];
773+
774+ /* Enumerate Device Descriptor */
775+ device_descriptor.bDeviceClass =
776+ COMMUNICATIONS_DEVICE_CLASS;
777+ device_descriptor.idProduct =
778+ cpu_to_le16(CONFIG_USBD_PRODUCTID_CDCACM);
779+
780+ /* Assign endpoint indices */
781+ tx_endpoint = ACM_TX_ENDPOINT;
782+ rx_endpoint = ACM_RX_ENDPOINT;
783+
784+ /* Configuration Descriptor */
785+ configuration_descriptor =
786+ (struct usb_configuration_descriptor*)
787+ &acm_configuration_descriptors;
788+
789+ /* Interface count */
790+ interface_count = NUM_ACM_INTERFACES;
791+ break;
792+
793+ /* BULK IN/OUT & Default */
794+ case 1:
795+ default:
796+ /* Assign endpoint descriptors */
797+ ep_descriptor_ptrs[0] =
798+ &gserial_configuration_descriptors[0].data_endpoints[0];
799+ ep_descriptor_ptrs[1] =
800+ &gserial_configuration_descriptors[0].data_endpoints[1];
801+ ep_descriptor_ptrs[2] =
802+ &gserial_configuration_descriptors[0].data_endpoints[2];
803+
804+ /* Enumerate Device Descriptor */
805+ device_descriptor.bDeviceClass = 0xFF;
806+ device_descriptor.idProduct =
807+ cpu_to_le16(CONFIG_USBD_PRODUCTID_GSERIAL);
808+
809+ /* Assign endpoint indices */
810+ tx_endpoint = GSERIAL_TX_ENDPOINT;
811+ rx_endpoint = GSERIAL_RX_ENDPOINT;
812+
813+ /* Configuration Descriptor */
814+ configuration_descriptor =
815+ (struct usb_configuration_descriptor*)
816+ &gserial_configuration_descriptors;
817+
818+ /* Interface count */
819+ interface_count = NUM_GSERIAL_INTERFACES;
820+ break;
821+ }
822+}
823
824-/*********************************************************************************/
825+/******************************************************************************/
826
827 static struct urb *next_urb (struct usb_device_instance *device,
828 struct usb_endpoint_instance *endpoint)
829@@ -522,82 +842,179 @@
830
831 static int write_buffer (circbuf_t * buf)
832 {
833- if (!usbtty_configured ()) {
834- return 0;
835- }
836+ if (!usbtty_configured ()) {
837+ return 0;
838+ }
839+
840+ if (buf->size) {
841+
842+ struct usb_endpoint_instance *endpoint =
843+ &endpoint_instance[tx_endpoint];
844+ struct urb *current_urb = NULL;
845+ char *dest;
846+
847+ int space_avail;
848+ int popnum, popped;
849+ int total = 0;
850+
851+ /* Break buffer into urb sized pieces, and link each to the endpoint */
852+ while (buf->size > 0) {
853+ TTYDBG ("buf->size= %d",buf->size);
854+ current_urb = next_urb (device_instance, endpoint);
855+ if (!current_urb) {
856+ TTYDBG ("current_urb is NULL, buf->size %d\n",
857+ buf->size);
858+ return total;
859+ }
860+
861+ dest = current_urb->buffer +
862+ current_urb->actual_length;
863+
864+ space_avail =
865+ current_urb->buffer_length -
866+ current_urb->actual_length;
867+ TTYDBG ("space_avail= %d",space_avail);
868+ popnum = MIN (space_avail, buf->size);
869+ if (popnum == 0)
870+ break;
871+
872+ popped = buf_pop (buf, dest, popnum);
873+ TTYDBG ("popped= %d, %s",popped, dest);
874+ if (popped == 0)
875+ break;
876+ current_urb->actual_length += popped;
877+ total += popped;
878+
879+ /* If endpoint->last == 0, then transfers have not started on this endpoint */
880+ if (endpoint->last == 0) {
881+ udc_endpoint_write (endpoint);
882+ }
883+
884+ } /* end while */
885+ TTYDBG (" total= %d",total);
886+ return total;
887+ } /* end if tx_urb */
888
889- if (buf->size) {
890+ return 0;
891+}
892+// static int write_buffer (circbuf_t * buf)
893+// {
894+// if (!usbtty_configured ()) {
895+// return 0;
896+// }
897+//
898+// struct usb_endpoint_instance *endpoint =
899+// &endpoint_instance[tx_endpoint];
900+// struct urb *current_urb = NULL;
901+//
902+// current_urb = next_urb (device_instance, endpoint);
903+// /* TX data still exists - send it now
904+// */
905+// if(endpoint->sent < current_urb->actual_length){
906+// if(udc_endpoint_write (endpoint)){
907+// /* Write pre-empted by RX */
908+// return -1;
909+// }
910+// }
911+//
912+// if (buf->size) {
913+// char *dest;
914+//
915+// int space_avail;
916+// int popnum, popped;
917+// int total = 0;
918+//
919+// /* Break buffer into urb sized pieces,
920+// * and link each to the endpoint
921+// */
922+// while (buf->size > 0) {
923+//
924+// if (!current_urb) {
925+// TTYERR ("current_urb is NULL, buf->size %d\n",
926+// buf->size);
927+// return total;
928+// }
929+//
930+// dest = (char*)current_urb->buffer +
931+// current_urb->actual_length;
932+//
933+// space_avail =
934+// current_urb->buffer_length -
935+// current_urb->actual_length;
936+// popnum = MIN (space_avail, buf->size);
937+// if (popnum == 0)
938+// break;
939+//
940+// popped = buf_pop (buf, dest, popnum);
941+// if (popped == 0)
942+// break;
943+// current_urb->actual_length += popped;
944+// total += popped;
945+//
946+// /* If endpoint->last == 0, then transfers have
947+// * not started on this endpoint
948+// */
949+// if (endpoint->last == 0) {
950+// if(udc_endpoint_write (endpoint)){
951+// /* Write pre-empted by RX */
952+// return -1;
953+// }
954+// }
955+//
956+// }/* end while */
957+// return total;
958+// }
959+//
960+// return 0;
961+// }
962
963- struct usb_endpoint_instance *endpoint =
964- &endpoint_instance[TX_ENDPOINT];
965- struct urb *current_urb = NULL;
966- char *dest;
967-
968- int space_avail;
969- int popnum, popped;
970- int total = 0;
971-
972- /* Break buffer into urb sized pieces, and link each to the endpoint */
973- while (buf->size > 0) {
974- current_urb = next_urb (device_instance, endpoint);
975- if (!current_urb) {
976- TTYERR ("current_urb is NULL, buf->size %d\n",
977- buf->size);
978- return total;
979- }
980-
981- dest = current_urb->buffer +
982- current_urb->actual_length;
983-
984- space_avail =
985- current_urb->buffer_length -
986- current_urb->actual_length;
987- popnum = MIN (space_avail, buf->size);
988- if (popnum == 0)
989- break;
990-
991- popped = buf_pop (buf, dest, popnum);
992- if (popped == 0)
993- break;
994- current_urb->actual_length += popped;
995- total += popped;
996-
997- /* If endpoint->last == 0, then transfers have not started on this endpoint */
998- if (endpoint->last == 0) {
999- udc_endpoint_write (endpoint);
1000- }
1001-
1002- } /* end while */
1003- return total;
1004- } /* end if tx_urb */
1005+static int fill_buffer (circbuf_t * buf)
1006+{
1007+ struct usb_endpoint_instance *endpoint =
1008+ &endpoint_instance[rx_endpoint];
1009
1010- return 0;
1011-}
1012+ if (endpoint->rcv_urb && endpoint->rcv_urb->actual_length) {
1013+ unsigned int nb = endpoint->rcv_urb->actual_length;
1014+ char *src = (char *) endpoint->rcv_urb->buffer;
1015
1016+ buf_push (buf, src, nb);
1017+ endpoint->rcv_urb->actual_length = 0;
1018+
1019+ TTYDBG ("nb= %d",nb);
1020+ return nb;
1021+ }
1022+
1023+ return 0;
1024+}
1025+/*
1026 static int fill_buffer (circbuf_t * buf)
1027 {
1028 struct usb_endpoint_instance *endpoint =
1029- &endpoint_instance[RECV_ENDPOINT];
1030+ &endpoint_instance[rx_endpoint];
1031
1032 if (endpoint->rcv_urb && endpoint->rcv_urb->actual_length) {
1033- unsigned int nb = endpoint->rcv_urb->actual_length;
1034+ unsigned int nb = 0;
1035 char *src = (char *) endpoint->rcv_urb->buffer;
1036+ unsigned int rx_avail = buf->totalsize - buf->size;
1037
1038- buf_push (buf, src, nb);
1039- endpoint->rcv_urb->actual_length = 0;
1040+ if(rx_avail >= endpoint->rcv_urb->actual_length){
1041
1042+ nb = endpoint->rcv_urb->actual_length;
1043+ buf_push (buf, src, nb);
1044+ endpoint->rcv_urb->actual_length = 0;
1045+
1046+ }
1047 return nb;
1048 }
1049-
1050 return 0;
1051 }
1052-
1053+*/
1054 static int usbtty_configured (void)
1055 {
1056 return usbtty_configured_flag;
1057 }
1058
1059-/*********************************************************************************/
1060+/******************************************************************************/
1061
1062 static void usbtty_event_handler (struct usb_device_instance *device,
1063 usb_device_event_t event, int data)
1064@@ -619,8 +1036,34 @@
1065 }
1066 }
1067
1068-/*********************************************************************************/
1069+/******************************************************************************/
1070
1071+int usbtty_cdc_setup(struct usb_device_request *request, struct urb *urb)
1072+{
1073+ switch (request->bRequest){
1074+
1075+ case ACM_SET_CONTROL_LINE_STATE: /* Implies DTE ready */
1076+ break;
1077+ case ACM_SEND_ENCAPSULATED_COMMAND : /* Required */
1078+ break;
1079+ case ACM_SET_LINE_ENCODING : /* DTE stop/parity bits
1080+ * per character */
1081+ break;
1082+ case ACM_GET_ENCAPSULATED_RESPONSE : /* request response */
1083+ break;
1084+ case ACM_GET_LINE_ENCODING : /* request DTE rate,
1085+ * stop/parity bits */
1086+ memcpy (urb->buffer , &rs232_desc, sizeof(rs232_desc));
1087+ urb->actual_length = sizeof(rs232_desc);
1088+
1089+ break;
1090+ default:
1091+ return 1;
1092+ }
1093+ return 0;
1094+}
1095+
1096+/******************************************************************************/
1097
1098 /*
1099 * Since interrupt handling has not yet been implemented, we use this function
1100@@ -630,36 +1073,29 @@
1101 void usbtty_poll (void)
1102 {
1103 /* New interrupts? */
1104- pretend_interrupts ();
1105+ udc_irq();
1106
1107- /* Write any output data to host buffer (do this before checking interrupts to avoid missing one) */
1108+ /* Write any output data to host buffer
1109+ * (do this before checking interrupts to avoid missing one)
1110+ */
1111 if (usbtty_configured ()) {
1112 write_buffer (&usbtty_output);
1113 }
1114
1115 /* New interrupts? */
1116- pretend_interrupts ();
1117-
1118- /* Check for new data from host.. (do this after checking interrupts to get latest data) */
1119+ udc_irq();
1120+
1121+ /* Check for new data from host..
1122+ * (do this after checking interrupts to get latest data)
1123+ */
1124 if (usbtty_configured ()) {
1125 fill_buffer (&usbtty_input);
1126 }
1127
1128 /* New interrupts? */
1129- pretend_interrupts ();
1130-}
1131+ udc_irq();
1132
1133-static void pretend_interrupts (void)
1134-{
1135- /* Loop while we have interrupts.
1136- * If we don't do this, the input chain
1137- * polling delay is likely to miss
1138- * host requests.
1139- */
1140- while (inw (UDC_IRQ_SRC) & ~UDC_SOF_Flg) {
1141- /* Handle any new IRQs */
1142- omap1510_udc_irq ();
1143- omap1510_udc_noniso_irq ();
1144- }
1145 }
1146+
1147+
1148 #endif
1149Index: u-boot/drivers/usbtty.h
1150===================================================================
1151--- u-boot.orig/drivers/usbtty.h 2007-02-08 21:11:27.000000000 +0100
1152+++ u-boot/drivers/usbtty.h 2007-02-08 21:11:55.000000000 +0100
1153@@ -2,6 +2,9 @@
1154 * (C) Copyright 2003
1155 * Gerry Hamel, geh@ti.com, Texas Instruments
1156 *
1157+ * (C) Copyright 2006
1158+ * Bryan O'Donoghue, bodonoghue <at> codehermit.ie, CodeHermit
1159+ *
1160 * This program is free software; you can redistribute it and/or modify
1161 * it under the terms of the GNU General Public License as published by
1162 * the Free Software Foundation; either version 2 of the License, or
1163@@ -21,44 +24,49 @@
1164 #ifndef __USB_TTY_H__
1165 #define __USB_TTY_H__
1166
1167-
1168 #include "usbdcore.h"
1169+#if defined(CONFIG_PPC)
1170+#include "usbdcore_mpc8xx.h"
1171+#elif defined(CONFIG_OMAP1510)
1172 #include "usbdcore_omap1510.h"
1173+#endif
1174
1175+#include <config.h>
1176+#include <version.h>
1177
1178-#define NUM_CONFIGS 1
1179-#define NUM_INTERFACES 1
1180-#define NUM_ENDPOINTS 3
1181+/* If no VendorID/ProductID is defined in config.h, pretend to be Linux
1182+ * DO NOT Reuse this Vendor/Product setup with protocol incompatible devices */
1183
1184-#define EP0_MAX_PACKET_SIZE 64
1185+#ifndef CONFIG_USBD_VENDORID
1186+#define CONFIG_USBD_VENDORID 0x0525 /* Linux/NetChip */
1187+#define CONFIG_USBD_PRODUCTID_GSERIAL 0xa4a6 /* gserial */
1188+#define CONFIG_USBD_PRODUCTID_CDCACM 0xa4a7 /* CDC ACM */
1189+#define CONFIG_USBD_MANUFACTURER "Das U-Boot"
1190+#define CONFIG_USBD_PRODUCT_NAME U_BOOT_VERSION
1191+#endif /* CONFIG_USBD_VENDORID */
1192
1193 #define CONFIG_USBD_CONFIGURATION_STR "TTY via USB"
1194-#define CONFIG_USBD_INTERFACE_STR "Simple Serial Data Interface - Bulk Mode"
1195-
1196-
1197-#define CONFIG_USBD_SERIAL_OUT_ENDPOINT 2
1198-#define CONFIG_USBD_SERIAL_OUT_PKTSIZE 64
1199-#define CONFIG_USBD_SERIAL_IN_ENDPOINT 1
1200-#define CONFIG_USBD_SERIAL_IN_PKTSIZE 64
1201-#define CONFIG_USBD_SERIAL_INT_ENDPOINT 5
1202-#define CONFIG_USBD_SERIAL_INT_PKTSIZE 16
1203
1204+#define CONFIG_USBD_SERIAL_OUT_ENDPOINT UDC_OUT_ENDPOINT
1205+#define CONFIG_USBD_SERIAL_OUT_PKTSIZE UDC_OUT_PACKET_SIZE
1206+#define CONFIG_USBD_SERIAL_IN_ENDPOINT UDC_IN_ENDPOINT
1207+#define CONFIG_USBD_SERIAL_IN_PKTSIZE UDC_IN_PACKET_SIZE
1208+#define CONFIG_USBD_SERIAL_INT_ENDPOINT UDC_INT_ENDPOINT
1209+#define CONFIG_USBD_SERIAL_INT_PKTSIZE UDC_INT_PACKET_SIZE
1210+#define CONFIG_USBD_SERIAL_BULK_PKTSIZE UDC_BULK_PACKET_SIZE
1211
1212 #define USBTTY_DEVICE_CLASS COMMUNICATIONS_DEVICE_CLASS
1213-#define USBTTY_DEVICE_SUBCLASS COMMUNICATIONS_NO_SUBCLASS
1214-#define USBTTY_DEVICE_PROTOCOL COMMUNICATIONS_NO_PROTOCOL
1215
1216-#define USBTTY_INTERFACE_CLASS 0xFF /* Vendor Specific */
1217-#define USBTTY_INTERFACE_SUBCLASS 0x02
1218-#define USBTTY_INTERFACE_PROTOCOL 0x01
1219-
1220-#define USBTTY_BCD_DEVICE 0x0
1221-#define USBTTY_MAXPOWER 0x0
1222-
1223-#define STR_MANUFACTURER 1
1224-#define STR_PRODUCT 2
1225-#define STR_SERIAL 3
1226-#define STR_CONFIG 4
1227-#define STR_INTERFACE 5
1228+#define USBTTY_BCD_DEVICE 0x00
1229+#define USBTTY_MAXPOWER 0x00
1230+
1231+#define STR_LANG 0x00
1232+#define STR_MANUFACTURER 0x01
1233+#define STR_PRODUCT 0x02
1234+#define STR_SERIAL 0x03
1235+#define STR_CONFIG 0x04
1236+#define STR_DATA_INTERFACE 0x05
1237+#define STR_CTRL_INTERFACE 0x06
1238+#define STR_COUNT 0x07
1239
1240 #endif
1241Index: u-boot/drivers/usbdcore_omap1510.c
1242===================================================================
1243--- u-boot.orig/drivers/usbdcore_omap1510.c 2007-02-08 21:11:27.000000000 +0100
1244+++ u-boot/drivers/usbdcore_omap1510.c 2007-02-08 21:11:55.000000000 +0100
1245@@ -960,7 +960,7 @@
1246 /* Handle general USB interrupts and dispatch according to type.
1247 * This function implements TRM Figure 14-13.
1248 */
1249-void omap1510_udc_irq (void)
1250+static void omap1510_udc_irq (void)
1251 {
1252 u16 irq_src = inw (UDC_IRQ_SRC);
1253 int valid_irq = 0;
1254@@ -1000,7 +1000,7 @@
1255 }
1256
1257 /* This function implements TRM Figure 14-26. */
1258-void omap1510_udc_noniso_irq (void)
1259+static void omap1510_udc_noniso_irq (void)
1260 {
1261 unsigned short epnum;
1262 unsigned short irq_src = inw (UDC_IRQ_SRC);
1263@@ -1054,6 +1054,20 @@
1264 irq_src);
1265 }
1266
1267+void udc_irq(void)
1268+{
1269+ /* Loop while we have interrupts.
1270+ * If we don't do this, the input chain
1271+ * polling delay is likely to miss
1272+ * host requests.
1273+ */
1274+ while (inw (UDC_IRQ_SRC) & ~UDC_SOF_Flg) {
1275+ /* Handle any new IRQs */
1276+ omap1510_udc_irq ();
1277+ omap1510_udc_noniso_irq ();
1278+ }
1279+}
1280+
1281 /*
1282 -------------------------------------------------------------------------------
1283 */
1284Index: u-boot/include/usb_cdc_acm.h
1285===================================================================
1286--- /dev/null 1970-01-01 00:00:00.000000000 +0000
1287+++ u-boot/include/usb_cdc_acm.h 2007-02-08 21:11:55.000000000 +0100
1288@@ -0,0 +1,43 @@
1289+/*
1290+ * (C) Copyright 2006
1291+ * Bryan O'Donoghue, deckard <at> codehermit.ie, CodeHermit
1292+ *
1293+ * This program is free software; you can redistribute it and/or modify
1294+ * it under the terms of the GNU General Public License as published by
1295+ * the Free Software Foundation; either version 2 of the License, or
1296+ * (at your option) any later version.
1297+ *
1298+ * This program is distributed in the hope that it will be useful,
1299+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
1300+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1301+ * GNU General Public License for more details.
1302+ *
1303+ * You should have received a copy of the GNU General Public License
1304+ * along with this program; if not, write to the Free Software
1305+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
1306+ *
1307+ */
1308+
1309+/* ACM Control Requests */
1310+#define ACM_SEND_ENCAPSULATED_COMMAND 0x00
1311+#define ACM_GET_ENCAPSULATED_RESPONSE 0x01
1312+#define ACM_SET_COMM_FEATURE 0x02
1313+#define ACM_GET_COMM_FEATRUE 0x03
1314+#define ACM_CLEAR_COMM_FEATURE 0x04
1315+#define ACM_SET_LINE_ENCODING 0x20
1316+#define ACM_GET_LINE_ENCODING 0x21
1317+#define ACM_SET_CONTROL_LINE_STATE 0x22
1318+#define ACM_SEND_BREAK 0x23
1319+
1320+/* ACM Notification Codes */
1321+#define ACM_NETWORK_CONNECTION 0x00
1322+#define ACM_RESPONSE_AVAILABLE 0x01
1323+#define ACM_SERIAL_STATE 0x20
1324+
1325+/* Format of response expected by a ACM_GET_LINE_ENCODING request */
1326+struct rs232_emu{
1327+ unsigned long dter;
1328+ unsigned char stop_bits;
1329+ unsigned char parity;
1330+ unsigned char data_bits;
1331+}__attribute__((packed));
1332Index: u-boot/include/usbdcore_omap1510.h
1333===================================================================
1334--- u-boot.orig/include/usbdcore_omap1510.h 2007-02-08 21:11:27.000000000 +0100
1335+++ u-boot/include/usbdcore_omap1510.h 2007-02-08 21:11:55.000000000 +0100
1336@@ -161,13 +161,23 @@
1337 #define UDC_VBUS_CTRL (1 << 19)
1338 #define UDC_VBUS_MODE (1 << 18)
1339
1340-
1341-void omap1510_udc_irq(void);
1342-void omap1510_udc_noniso_irq(void);
1343-
1344+/* OMAP Endpoint parameters */
1345+#define EP0_MAX_PACKET_SIZE 64
1346+#define UDC_OUT_ENDPOINT 2
1347+#define UDC_OUT_PACKET_SIZE 64
1348+#define UDC_IN_ENDPOINT 1
1349+#define UDC_IN_PACKET_SIZE 64
1350+#define UDC_INT_ENDPOINT 5
1351+#define UDC_INT_PACKET_SIZE 16
1352+#define UDC_BULK_PACKET_SIZE 16
1353+
1354+void udc_irq (void);
1355+/* Flow control */
1356+void udc_set_nak(int epid);
1357+void udc_unset_nak (int epid);
1358
1359 /* Higher level functions for abstracting away from specific device */
1360-void udc_endpoint_write(struct usb_endpoint_instance *endpoint);
1361+int udc_endpoint_write(struct usb_endpoint_instance *endpoint);
1362
1363 int udc_init (void);
1364
1365Index: u-boot/include/usbdescriptors.h
1366===================================================================
1367--- u-boot.orig/include/usbdescriptors.h 2007-02-08 21:11:27.000000000 +0100
1368+++ u-boot/include/usbdescriptors.h 2007-02-08 21:11:55.000000000 +0100
1369@@ -92,15 +92,17 @@
1370 #define COMMUNICATIONS_DEVICE_CLASS 0x02
1371
1372 /* c.f. CDC 4.2 Table 15 */
1373-#define COMMUNICATIONS_INTERFACE_CLASS 0x02
1374+#define COMMUNICATIONS_INTERFACE_CLASS_CONTROL 0x02
1375+#define COMMUNICATIONS_INTERFACE_CLASS_DATA 0x0A
1376+#define COMMUNICATIONS_INTERFACE_CLASS_VENDOR 0x0FF
1377
1378 /* c.f. CDC 4.3 Table 16 */
1379-#define COMMUNICATIONS_NO_SUBCLASS 0x00
1380+#define COMMUNICATIONS_NO_SUBCLASS 0x00
1381 #define COMMUNICATIONS_DLCM_SUBCLASS 0x01
1382-#define COMMUNICATIONS_ACM_SUBCLASS 0x02
1383-#define COMMUNICATIONS_TCM_SUBCLASS 0x03
1384+#define COMMUNICATIONS_ACM_SUBCLASS 0x02
1385+#define COMMUNICATIONS_TCM_SUBCLASS 0x03
1386 #define COMMUNICATIONS_MCCM_SUBCLASS 0x04
1387-#define COMMUNICATIONS_CCM_SUBCLASS 0x05
1388+#define COMMUNICATIONS_CCM_SUBCLASS 0x05
1389 #define COMMUNICATIONS_ENCM_SUBCLASS 0x06
1390 #define COMMUNICATIONS_ANCM_SUBCLASS 0x07
1391
1392@@ -110,15 +112,22 @@
1393 #define COMMUNICATIONS_MDLM_SUBCLASS 0x0a
1394 #define COMMUNICATIONS_OBEX_SUBCLASS 0x0b
1395
1396-/* c.f. CDC 4.6 Table 18 */
1397+/* c.f. CDC 4.4 Table 17 */
1398+#define COMMUNICATIONS_NO_PROTOCOL 0x00
1399+#define COMMUNICATIONS_V25TER_PROTOCOL 0x01 /*Common AT Hayes compatible*/
1400+
1401+/* c.f. CDC 4.5 Table 18 */
1402 #define DATA_INTERFACE_CLASS 0x0a
1403
1404+/* c.f. CDC 4.6 No Table */
1405+#define DATA_INTERFACE_SUBCLASS_NONE 0x00 /* No subclass pertinent */
1406+
1407 /* c.f. CDC 4.7 Table 19 */
1408-#define COMMUNICATIONS_NO_PROTOCOL 0x00
1409+#define DATA_INTERFACE_PROTOCOL_NONE 0x00 /* No class protcol required */
1410
1411
1412 /* c.f. CDC 5.2.3 Table 24 */
1413-#define CS_INTERFACE 0x24
1414+#define CS_INTERFACE 0x24
1415 #define CS_ENDPOINT 0x25
1416
1417 /*
1418@@ -128,7 +137,7 @@
1419 * c.f. WMCD 5.3 Table 5.3
1420 */
1421
1422-#define USB_ST_HEADER 0x00
1423+#define USB_ST_HEADER 0x00
1424 #define USB_ST_CMF 0x01
1425 #define USB_ST_ACMF 0x02
1426 #define USB_ST_DLMF 0x03
1427@@ -137,18 +146,18 @@
1428 #define USB_ST_UF 0x06
1429 #define USB_ST_CSF 0x07
1430 #define USB_ST_TOMF 0x08
1431-#define USB_ST_USBTF 0x09
1432+#define USB_ST_USBTF 0x09
1433 #define USB_ST_NCT 0x0a
1434 #define USB_ST_PUF 0x0b
1435 #define USB_ST_EUF 0x0c
1436 #define USB_ST_MCMF 0x0d
1437 #define USB_ST_CCMF 0x0e
1438 #define USB_ST_ENF 0x0f
1439-#define USB_ST_ATMNF 0x10
1440+#define USB_ST_ATMNF 0x10
1441
1442 #define USB_ST_WHCM 0x11
1443 #define USB_ST_MDLM 0x12
1444-#define USB_ST_MDLMD 0x13
1445+#define USB_ST_MDLMD 0x13
1446 #define USB_ST_DMM 0x14
1447 #define USB_ST_OBEX 0x15
1448 #define USB_ST_CS 0x16
1449@@ -312,7 +321,8 @@
1450 u8 bDescriptorType;
1451 u8 bDescriptorSubtype; /* 0x06 */
1452 u8 bMasterInterface;
1453- u8 bSlaveInterface0[0];
1454+ //u8 bSlaveInterface0[0];
1455+ u8 bSlaveInterface0;
1456 } __attribute__ ((packed));
1457
1458 struct usb_class_country_selection_descriptor {
1459Index: u-boot/include/usbdcore.h
1460===================================================================
1461--- u-boot.orig/include/usbdcore.h 2007-02-08 21:11:27.000000000 +0100
1462+++ u-boot/include/usbdcore.h 2007-02-08 21:11:55.000000000 +0100
1463@@ -576,6 +576,9 @@
1464
1465 void (*event) (struct usb_device_instance *device, usb_device_event_t event, int data);
1466
1467+ /* Do cdc device specific control requests */
1468+ int (*cdc_recv_setup)(struct usb_device_request *request, struct urb *urb);
1469+
1470 /* bus interface */
1471 struct usb_bus_instance *bus; /* which bus interface driver */
1472
1473Index: u-boot/drivers/usbdcore_ep0.c
1474===================================================================
1475--- u-boot.orig/drivers/usbdcore_ep0.c 2007-02-08 21:12:05.000000000 +0100
1476+++ u-boot/drivers/usbdcore_ep0.c 2007-02-08 21:12:08.000000000 +0100
1477@@ -223,7 +223,6 @@
1478
1479 case USB_DESCRIPTOR_TYPE_CONFIGURATION:
1480 {
1481- int bNumInterface;
1482 struct usb_configuration_descriptor
1483 *configuration_descriptor;
1484 struct usb_device_descriptor *device_descriptor;
1485@@ -256,105 +255,6 @@
1486 usb_configuration_descriptor),
1487 max);
1488
1489-
1490- /* iterate across interfaces for specified configuration */
1491- dbg_ep0 (0, "bNumInterfaces: %d",
1492- configuration_descriptor->bNumInterfaces);
1493- for (bNumInterface = 0;
1494- bNumInterface <
1495- configuration_descriptor->bNumInterfaces;
1496- bNumInterface++) {
1497-
1498- int bAlternateSetting;
1499- struct usb_interface_instance
1500- *interface_instance;
1501-
1502- dbg_ep0 (3, "[%d] bNumInterfaces: %d",
1503- bNumInterface,
1504- configuration_descriptor->bNumInterfaces);
1505-
1506- if (! (interface_instance = usbd_device_interface_instance (device,
1507- port, index, bNumInterface)))
1508- {
1509- dbg_ep0 (3, "[%d] interface_instance NULL",
1510- bNumInterface);
1511- return -1;
1512- }
1513- /* iterate across interface alternates */
1514- for (bAlternateSetting = 0;
1515- bAlternateSetting < interface_instance->alternates;
1516- bAlternateSetting++) {
1517- /*int class; */
1518- int bNumEndpoint;
1519- struct usb_interface_descriptor *interface_descriptor;
1520-
1521- struct usb_alternate_instance *alternate_instance;
1522-
1523- dbg_ep0 (3, "[%d:%d] alternates: %d",
1524- bNumInterface,
1525- bAlternateSetting,
1526- interface_instance->alternates);
1527-
1528- if (! (alternate_instance = usbd_device_alternate_instance (device, port, index, bNumInterface, bAlternateSetting))) {
1529- dbg_ep0 (3, "[%d] alternate_instance NULL",
1530- bNumInterface);
1531- return -1;
1532- }
1533- /* copy descriptor for this interface */
1534- copy_config (urb, alternate_instance->interface_descriptor,
1535- sizeof (struct usb_interface_descriptor),
1536- max);
1537-
1538- /*dbg_ep0(3, "[%d:%d] classes: %d endpoints: %d", bNumInterface, bAlternateSetting, */
1539- /* alternate_instance->classes, alternate_instance->endpoints); */
1540-
1541- /* iterate across classes for this alternate interface */
1542-#if 0
1543- for (class = 0;
1544- class < alternate_instance->classes;
1545- class++) {
1546- struct usb_class_descriptor *class_descriptor;
1547- /*dbg_ep0(3, "[%d:%d:%d] classes: %d", bNumInterface, bAlternateSetting, */
1548- /* class, alternate_instance->classes); */
1549- if (!(class_descriptor = usbd_device_class_descriptor_index (device, port, index, bNumInterface, bAlternateSetting, class))) {
1550- dbg_ep0 (3, "[%d] class NULL",
1551- class);
1552- return -1;
1553- }
1554- /* copy descriptor for this class */
1555- copy_config (urb, class_descriptor,
1556- sizeof (struct usb_class_descriptor),
1557- max);
1558- }
1559-#endif
1560-
1561- /* iterate across endpoints for this alternate interface */
1562- interface_descriptor = alternate_instance->interface_descriptor;
1563- for (bNumEndpoint = 0;
1564- bNumEndpoint < alternate_instance->endpoints;
1565- bNumEndpoint++) {
1566- struct usb_endpoint_descriptor *endpoint_descriptor;
1567- dbg_ep0 (3, "[%d:%d:%d] endpoint: %d",
1568- bNumInterface,
1569- bAlternateSetting,
1570- bNumEndpoint,
1571- interface_descriptor->
1572- bNumEndpoints);
1573- if (!(endpoint_descriptor = usbd_device_endpoint_descriptor_index (device, port, index, bNumInterface, bAlternateSetting, bNumEndpoint))) {
1574- dbg_ep0 (3, "[%d] endpoint NULL",
1575- bNumEndpoint);
1576- return -1;
1577- }
1578- /* copy descriptor for this endpoint */
1579- copy_config (urb, endpoint_descriptor,
1580- sizeof (struct usb_endpoint_descriptor),
1581- max);
1582- }
1583- }
1584- }
1585- dbg_ep0 (3, "lengths: %d %d",
1586- le16_to_cpu (configuration_descriptor->wTotalLength),
1587- urb->actual_length);
1588 }
1589 break;
1590
1591@@ -363,6 +263,7 @@
1592 struct usb_string_descriptor *string_descriptor;
1593
1594 if (!(string_descriptor = usbd_get_string (index))) {
1595+ dbg_ep0(0, "Invalid string index %u\n", index);
1596 return -1;
1597 }
1598 /*dbg_ep0(3, "string_descriptor: %p", string_descriptor); */
1599@@ -495,6 +396,8 @@
1600
1601 /* handle USB Standard Request (c.f. USB Spec table 9-2) */
1602 if ((request->bmRequestType & USB_REQ_TYPE_MASK) != 0) {
1603+ if (device->device_state <= STATE_CONFIGURED)
1604+ return device->cdc_recv_setup(request, urb);
1605 dbg_ep0 (1, "non standard request: %x",
1606 request->bmRequestType & USB_REQ_TYPE_MASK);
1607 return -1; /* Stall here */
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/unbusy-i2c.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/unbusy-i2c.patch
new file mode 100644
index 0000000000..680b301620
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/unbusy-i2c.patch
@@ -0,0 +1,88 @@
1board/neo1973/gta01/gta01.c: added logic to detect pending PMU interrupts
2board/neo1973/gta01/gta01.c (neo1973_new_second, neo1973_on_key_pressed): only
3 poll PMU if there is a pending interrupt
4board/neo1973/gta01/pcf50606.c (pcf50606_initial_regs): cleared (unmasked)
5 SECONDM in INT1M
6
7- Werner Almesberger <werner@openmoko.org>
8
9Index: u-boot/board/neo1973/gta01/gta01.c
10===================================================================
11--- u-boot.orig/board/neo1973/gta01/gta01.c
12+++ u-boot/board/neo1973/gta01/gta01.c
13@@ -375,19 +375,60 @@
14 #endif
15 }
16
17+static int pwr_int_pending(void)
18+{
19+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
20+
21+#if defined(CONFIG_ARCH_GTA01B_v4)
22+ return !(gpio->GPGDAT & (1 << 1)); /* EINT9/GPG1 */
23+#else
24+ return !(gpio->GPGDAT & (1 << 8)); /* EINT16/GPG8 */
25+#endif /* !CONFIG_ARCH_GTA01B_v4 */
26+}
27+
28+static int have_int1(uint8_t mask)
29+{
30+ static uint8_t pending = 0;
31+
32+ if (pwr_int_pending()) {
33+ /*
34+ * We retrieve all interupts, so that we clear any stray ones
35+ * in INT2 and INT3.
36+ */
37+ uint8_t int1,int2,int3;
38+
39+ int1 = pcf50606_reg_read(PCF50606_REG_INT1);
40+ int2 = pcf50606_reg_read(PCF50606_REG_INT2);
41+ int3 = pcf50606_reg_read(PCF50606_REG_INT3);
42+ pending |= int1;
43+ }
44+ if (!(pending & mask))
45+ return 0;
46+ pending &= ~mask;
47+ return 1;
48+}
49+
50 int neo1973_new_second(void)
51 {
52- return pcf50606_reg_read(PCF50606_REG_INT1) & PCF50606_INT1_SECOND;
53+ return have_int1(PCF50606_INT1_SECOND);
54 }
55
56 int neo1973_on_key_pressed(void)
57 {
58- return !(pcf50606_reg_read(PCF50606_REG_OOCS) & PFC50606_OOCS_ONKEY);
59+ static int pressed = -1;
60+
61+ if (pressed == -1 ||
62+ have_int1(PCF50606_INT1_ONKEYF | PCF50606_INT1_ONKEYR)) {
63+ pressed = !(pcf50606_reg_read(PCF50606_REG_OOCS) &
64+ PFC50606_OOCS_ONKEY);
65+}
66+ return pressed;
67 }
68
69 int neo1973_aux_key_pressed(void)
70 {
71 S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
72+
73 if (gpio->GPFDAT & (1 << 6))
74 return 0;
75 return 1;
76Index: u-boot/board/neo1973/gta01/pcf50606.c
77===================================================================
78--- u-boot.orig/board/neo1973/gta01/pcf50606.c
79+++ u-boot/board/neo1973/gta01/pcf50606.c
80@@ -6,7 +6,7 @@
81 const u_int8_t pcf50606_initial_regs[__NUM_PCF50606_REGS] = {
82 [PCF50606_REG_OOCS] = 0x00,
83 /* gap */
84- [PCF50606_REG_INT1M] = PCF50606_INT1_SECOND,
85+ [PCF50606_REG_INT1M] = 0x00,
86 [PCF50606_REG_INT2M] = 0x00,
87 [PCF50606_REG_INT3M] = PCF50606_INT3_TSCPRES,
88 [PCF50606_REG_OOCC1] = PCF50606_OOCC1_RTCWAK |
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/usbdcore-multiple_configs.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/usbdcore-multiple_configs.patch
new file mode 100644
index 0000000000..339289699a
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/usbdcore-multiple_configs.patch
@@ -0,0 +1,63 @@
1This patch fixes bugs in usbdcore*.c related to the use of devices
2with multiple configurations.
3
4The original code made mistakes about the meaning of configuration value and
5configuration index, and the resulting off-by-one errors resulted in:
6
7* SET_CONFIGURATION always selected the first configuration, no matter what
8 wValue is being passed.
9* GET_DESCRIPTOR/CONFIGURATION always returned the descriptor for the first
10 configuration (index 0).
11
12Signed-off-by: Harald Welte <laforge@openmoko.org>
13
14Index: u-boot/drivers/usbdcore_ep0.c
15===================================================================
16--- u-boot.orig/drivers/usbdcore_ep0.c 2007-03-14 20:29:05.000000000 +0100
17+++ u-boot/drivers/usbdcore_ep0.c 2007-03-14 20:29:06.000000000 +0100
18@@ -233,8 +233,8 @@
19 return -1;
20 }
21 /*dbg_ep0(2, "%d %d", index, device_descriptor->bNumConfigurations); */
22- if (index > device_descriptor->bNumConfigurations) {
23- dbg_ep0 (0, "index too large: %d > %d", index,
24+ if (index >= device_descriptor->bNumConfigurations) {
25+ dbg_ep0 (0, "index too large: %d >= %d", index,
26 device_descriptor->
27 bNumConfigurations);
28 return -1;
29@@ -593,13 +593,8 @@
30
31 case USB_REQ_SET_CONFIGURATION:
32 /* c.f. 9.4.7 - the top half of wValue is reserved */
33- /* */
34- if ((device->configuration =
35- le16_to_cpu (request->wValue) & 0x7f) != 0) {
36- /* c.f. 9.4.7 - zero is the default or addressed state, in our case this */
37- /* is the same is configuration zero */
38- device->configuration = 0; /* TBR - ?????? */
39- }
40+ device->configuration = le16_to_cpu(request->wValue) & 0xff;
41+
42 /* reset interface and alternate settings */
43 device->interface = device->alternate = 0;
44
45Index: u-boot/drivers/usbdcore.c
46===================================================================
47--- u-boot.orig/drivers/usbdcore.c 2007-03-14 20:29:05.000000000 +0100
48+++ u-boot/drivers/usbdcore.c 2007-03-14 20:37:37.000000000 +0100
49@@ -147,12 +147,9 @@
50 static struct usb_configuration_instance *usbd_device_configuration_instance (struct usb_device_instance *device,
51 unsigned int port, unsigned int configuration)
52 {
53- /* XXX */
54- configuration = configuration ? configuration - 1 : 0;
55-
56- if (configuration >= device->configurations) {
57+ if (configuration >= device->configurations)
58 return NULL;
59- }
60+
61 return device->configuration_instance_array + configuration;
62 }
63
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native/wakeup-reason-nand-only.patch b/meta/packages/uboot/u-boot-mkimage-openmoko-native/wakeup-reason-nand-only.patch
new file mode 100644
index 0000000000..132a9f8da5
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native/wakeup-reason-nand-only.patch
@@ -0,0 +1,68 @@
1This patch should get rid of spurious poweroff after booting from RAM.
2Experimental.
3
4cpu/arm920t/start.S: record in global variable "booted_from_nand" whether we
5 booted from NAND or not
6board/neo1973/neo1973.c (board_late_init): if booted from RAM, assume that
7 wakeup cause was "reset", and skip poweroff check
8
9- Werner Almesberger <werner@openmoko.org>
10
11Index: u-boot/board/neo1973/gta01/gta01.c
12===================================================================
13--- u-boot.orig/board/neo1973/gta01/gta01.c
14+++ u-boot/board/neo1973/gta01/gta01.c
15@@ -226,12 +226,16 @@
16
17 int board_late_init(void)
18 {
19+ extern unsigned char booted_from_nand;
20 unsigned char tmp;
21 char buf[32];
22
23 /* Initialize the Power Management Unit with a safe register set */
24 pcf50606_init();
25
26+ if (!booted_from_nand)
27+ goto woken_by_reset;
28+
29 /* obtain wake-up reason, save INT1 in environment */
30 tmp = pcf50606_reg_read(PCF50606_REG_INT1);
31 sprintf(buf, "0x%02x", tmp);
32@@ -274,6 +278,7 @@
33 neo1973_poweroff();
34 }
35
36+woken_by_reset:
37 /* if there's no other reason, must be regular reset */
38 neo1973_wakeup_cause = NEO1973_WAKEUP_RESET;
39
40Index: u-boot/cpu/arm920t/start.S
41===================================================================
42--- u-boot.orig/cpu/arm920t/start.S
43+++ u-boot/cpu/arm920t/start.S
44@@ -77,6 +77,14 @@
45 *************************************************************************
46 */
47
48+#ifdef CONFIG_S3C2410_NAND_BOOT
49+.globl booted_from_nand
50+booted_from_nand:
51+ .word 0
52+_booted_from_nand:
53+ .word booted_from_nand
54+#endif /* CONFIG_S3C2410_NAND_BOOT */
55+
56 _TEXT_BASE:
57 .word TEXT_BASE
58
59@@ -281,6 +289,9 @@
60 #endif
61 1: b 1b
62 done_nand_read:
63+ ldr r0, _booted_from_nand
64+ mov r1, #1
65+ strb r1, [r0]
66 #endif /* CONFIG_S3C2410_NAND_BOOT */
67 done_relocate:
68 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
diff --git a/meta/packages/uboot/u-boot-mkimage-openmoko-native_oe.bb b/meta/packages/uboot/u-boot-mkimage-openmoko-native_oe.bb
new file mode 100644
index 0000000000..d0d47d84d8
--- /dev/null
+++ b/meta/packages/uboot/u-boot-mkimage-openmoko-native_oe.bb
@@ -0,0 +1,83 @@
1require uboot-openmoko_svn.bb
2
3PV = "1.2.0+git9912121f7ed804ea58fd62f3f230b5dcfc357d88svn2238"
4
5SRC_URI = "git://www.denx.de/git/u-boot.git/;protocol=git;tag=9912121f7ed804ea58fd62f3f230b5dcfc357d88 \
6file://uboot-machtypes.patch;patch=1 \
7file://ext2load_hex.patch;patch=1 \
8file://uboot-s3c2410-warnings-fix.patch;patch=1 \
9file://uboot-strtoul.patch;patch=1 \
10file://uboot-cramfs_but_no_jffs2.patch;patch=1 \
11file://nand-read_write_oob.patch;patch=1 \
12file://uboot-arm920t-gd_in_irq.patch;patch=1 \
13file://uboot-arm920_s3c2410_irq_demux.patch;patch=1 \
14file://uboot-s3c2410-nand.patch;patch=1 \
15file://uboot-cmd_s3c2410.patch;patch=1 \
16file://uboot-s3c2410-mmc.patch;patch=1 \
17file://env_nand_oob.patch;patch=1 \
18file://dynenv-harden.patch;patch=1 \
19file://uboot-s3c2410_fb.patch;patch=1 \
20file://uboot-20061030-qt2410.patch;patch=1 \
21file://uboot-20061030-neo1973.patch;patch=1 \
22file://uboot-s3c2410-misccr-definitions.patch;patch=1 \
23file://boot-from-ram-reloc.patch;patch=1 \
24file://boot-from-ram-and-nand.patch;patch=1 \
25file://wakeup-reason-nand-only.patch;patch=1 \
26file://uboot-neo1973-resume.patch;patch=1 \
27file://nand-dynamic_partitions.patch;patch=1 \
28file://uboot-s3c2410-norelocate_irqvec_cpy.patch;patch=1 \
29file://uboot-usbtty-acm.patch;patch=1 \
30file://uboot-s3c2410_udc.patch;patch=1 \
31file://bbt-create-optional.patch;patch=1 \
32file://nand-createbbt.patch;patch=1 \
33file://dontask.patch;patch=1 \
34file://nand-badisbad.patch;patch=1 \
35file://uboot-bbt-quiet.patch;patch=1 \
36file://raise-limits.patch;patch=1 \
37file://splashimage-command.patch;patch=1 \
38file://cmd-unzip.patch;patch=1 \
39file://enable-splash-bmp.patch;patch=1 \
40file://preboot-override.patch;patch=1 \
41file://lowlevel_foo.patch;patch=1 \
42file://default-env.patch;patch=1 \
43file://console-ansi.patch;patch=1 \
44file://boot-menu.patch;patch=1 \
45file://uboot-dfu.patch;patch=1 \
46file://uboot-neo1973-defaultenv.patch;patch=1 \
47file://uboot-nand-markbad-reallybad.patch;patch=1 \
48file://usbdcore-multiple_configs.patch;patch=1 \
49file://neo1973-chargefast.patch;patch=1 \
50file://uboot-s3c2440.patch;patch=1 \
51file://uboot-smdk2440.patch;patch=1 \
52file://uboot-hxd8.patch;patch=1 \
53file://uboot-license.patch;patch=1 \
54file://uboot-gta02.patch;patch=1 \
55file://uboot-s3c2443.patch;patch=1 \
56file://uboot-smdk2443.patch;patch=1 \
57file://unbusy-i2c.patch;patch=1 \
58file://makefile-no-dirafter.patch;patch=1 \
59"
60
61PROVIDES = ""
62TARGET_LDFLAGS = ""
63
64do_quilt() {
65:
66}
67
68do_compile () {
69 chmod +x board/neo1973/gta01/split_by_variant.sh
70 oe_runmake gta01bv3_config
71 oe_runmake clean
72 oe_runmake tools
73}
74
75do_deploy () {
76 install -m 0755 tools/mkimage ${STAGING_BINDIR_NATIVE}/uboot-mkimage
77 ln -sf ${STAGING_BINDIR_NATIVE}/uboot-mkimage ${STAGING_BINDIR_NATIVE}/mkimage
78}
79
80do_deploy[dirs] = "${S}"
81addtask deploy before do_package after do_install
82
83
diff --git a/meta/packages/uboot/uboot-gta01_svn.bb b/meta/packages/uboot/uboot-gta01_svn.bb
deleted file mode 100644
index 89ebef6b08..0000000000
--- a/meta/packages/uboot/uboot-gta01_svn.bb
+++ /dev/null
@@ -1,59 +0,0 @@
1DESCRIPTION = "U-boot bootloader w/ Neo1973 (GTA01) support"
2AUTHOR = "Harald Welte <laforge@openmoko.org>"
3LICENSE = "GPL"
4SECTION = "bootloader"
5PRIORITY = "optional"
6PV = "1.2.0+svn${SRCDATE}"
7PR = "r5"
8SRCDATE = "20070711"
9
10PROVIDES = "virtual/bootloader"
11S = "${WORKDIR}/git"
12
13SRC_URI = "git://www.denx.de/git/u-boot.git/;protocol=git;tag=8993e54b6f397973794f3d6f47d3b3c0c98dd4f6 \
14 svn://svn.openmoko.org/trunk/src/target/u-boot;module=patches;proto=http \
15 file://fix-arm920t-eabi.patch;patch=1"
16
17EXTRA_OEMAKE = "CROSS_COMPILE=${TARGET_PREFIX}"
18TARGET_LDFLAGS = ""
19UBOOT_MACHINES = "gta01v3 gta01v4 gta01bv2 gta01bv3"
20
21do_quilt() {
22 mv ${WORKDIR}/patches ${S}/patches
23 cd ${S}
24 quilt push -av
25 rm -Rf patches .pc
26}
27
28do_compile () {
29 chmod +x board/neo1973/split_by_variant.sh
30 for type in ram nand
31 do
32 for mach in ${UBOOT_MACHINES}
33 do
34 oe_runmake ${mach}_config
35 oe_runmake clean
36 if [ ${type} == "ram" ]; then
37 echo 'PLATFORM_RELFLAGS += -DBUILD_FOR_RAM' >> board/neo1973/config.tmp
38 fi
39 oe_runmake all
40 mv u-boot.bin u-boot_${mach}_${type}.bin
41 done
42 done
43}
44
45do_deploy () {
46 install -d ${DEPLOY_DIR_IMAGE}
47 for type in nand ram
48 do
49 for mach in ${UBOOT_MACHINES}
50 do
51 install ${S}/u-boot_${mach}_${type}.bin ${DEPLOY_DIR_IMAGE}/u-boot_${type}-${mach}-${DATETIME}.bin
52 done
53 done
54 install -m 0755 tools/mkimage ${STAGING_BINDIR_NATIVE}/uboot-mkimage
55}
56
57do_deploy[dirs] = "${S}"
58addtask deploy before do_build after do_compile
59addtask quilt before do_patch after do_unpack
diff --git a/meta/packages/uboot/uboot-openmoko_svn.bb b/meta/packages/uboot/uboot-openmoko_svn.bb
new file mode 100644
index 0000000000..3669b409da
--- /dev/null
+++ b/meta/packages/uboot/uboot-openmoko_svn.bb
@@ -0,0 +1,85 @@
1DESCRIPTION = "U-boot bootloader w/ Neo1973 (GTA01) support"
2AUTHOR = "Harald Welte <laforge@openmoko.org>"
3LICENSE = "GPL"
4SECTION = "bootloader"
5PRIORITY = "optional"
6PROVIDES = "virtual/bootloader"
7PV = "1.2.0+git${SRCDATE}+svnr${SRCREV}"
8PR = "r1"
9
10SRCREV_FORMAT = "patches"
11
12UBOOT_MACHINES = "gta01bv2 gta01bv3 gta01bv4 smdk2440 hxd8 qt2410 gta02v1 gta02v2"
13
14DEFAULT_PREFERENCE = "-1"
15
16SRC_URI = "\
17 git://www.denx.de/git/u-boot.git/;protocol=git;name=upstream \
18 svn://svn.openmoko.org/trunk/src/target/u-boot;module=patches;proto=http;name=patches \
19 file://uboot-eabi-fix-HACK.patch \
20 file://uboot-20070311-tools_makefile_ln_sf.patch;patch=1 \
21"
22S = "${WORKDIR}/git"
23
24EXTRA_OEMAKE = "CROSS_COMPILE=${TARGET_PREFIX}"
25TARGET_LDFLAGS = ""
26
27do_quilt() {
28 mv ${WORKDIR}/patches ${S}/patches && cd ${S} && quilt push -av
29 rm -Rf patches .pc
30}
31
32do_svnrev() {
33 mv -f tools/setlocalversion tools/setlocalversion.old
34 echo -n "echo " >>tools/setlocalversion
35 echo ${PV} >>tools/setlocalversion
36}
37
38do_configure_prepend() {
39 find . -name "*.mk" -exec sed -i 's,-mabi=apcs-gnu,,' {} \;
40 find . -name "Makefile" -exec sed -i 's,-mabi=apcs-gnu,,' {} \;
41 cat ${WORKDIR}/uboot-eabi-fix-HACK.patch |patch -p1
42}
43
44do_compile () {
45 chmod +x board/neo1973/gta*/split_by_variant.sh
46 for mach in ${UBOOT_MACHINES}
47 do
48 oe_runmake ${mach}_config
49 oe_runmake clean
50 find board -name lowlevel_foo.bin -exec rm '{}' \;
51 oe_runmake all
52 oe_runmake u-boot.udfu
53 if [ -f u-boot.udfu ]; then
54 mv u-boot.udfu u-boot_${mach}.bin
55 else
56 mv u-boot.bin u-boot_${mach}.bin
57 fi
58 if [ -f board/${mach}/lowlevel_foo.bin ]; then
59 mv board/${mach}/lowlevel_foo.bin \
60 lowlevel_foo_${mach}.bin
61 else
62 find board -name lowlevel_foo.bin \
63 -exec mv '{}' lowlevel_foo_${mach}.bin \;
64 fi
65 done
66}
67
68do_deploy () {
69 install -d ${DEPLOY_DIR_IMAGE}
70 for mach in ${UBOOT_MACHINES}
71 do
72 install -m 0644 ${S}/u-boot_${mach}.bin ${DEPLOY_DIR_IMAGE}/u-boot-${mach}-${PV}-${PR}.bin
73 ln -sf ${DEPLOY_DIR_IMAGE}/u-boot-${mach}-${PV}-${PR}.bin ${DEPLOY_DIR_IMAGE}/uboot-${mach}-latest.bin
74 if [ -f ${S}/lowlevel_foo_${mach}.bin ]; then
75 install -m 0644 ${S}/lowlevel_foo_${mach}.bin ${DEPLOY_DIR_IMAGE}/lowlevel_foo-${mach}-${PV}-${PR}.bin
76 ln -sf ${DEPLOY_DIR_IMAGE}/lowlevel_foo-${mach}-${PV}-${PR}.bin ${DEPLOY_DIR_IMAGE}/lowlevel-foo-${mach}-latest.bin
77 fi
78 done
79 install -m 0755 tools/mkimage ${STAGING_BINDIR_NATIVE}/uboot-mkimage
80}
81
82do_deploy[dirs] = "${S}"
83addtask deploy before do_package after do_install
84addtask quilt before do_patch after do_unpack
85addtask svnrev before do_patch after do_quilt
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-11-20 06:39:07 +0000