From 99ac0639fff61cbdcfe58668eb9b0083d624504f Mon Sep 17 00:00:00 2001 From: Adrian Dudau Date: Thu, 26 Jun 2014 14:29:42 +0200 Subject: initial commit for Enea Linux 4.0 Migrated from the internal git server on the daisy-enea branch Signed-off-by: Adrian Dudau --- ...blaze-Add-4-byte-implementation-for-atomi.patch | 157 +++++++++++++++++++++ 1 file changed, 157 insertions(+) create mode 100644 recipes-devtools/gcc/files/0002-Patch-microblaze-Add-4-byte-implementation-for-atomi.patch (limited to 'recipes-devtools/gcc/files/0002-Patch-microblaze-Add-4-byte-implementation-for-atomi.patch') diff --git a/recipes-devtools/gcc/files/0002-Patch-microblaze-Add-4-byte-implementation-for-atomi.patch b/recipes-devtools/gcc/files/0002-Patch-microblaze-Add-4-byte-implementation-for-atomi.patch new file mode 100644 index 00000000..aefa13b0 --- /dev/null +++ b/recipes-devtools/gcc/files/0002-Patch-microblaze-Add-4-byte-implementation-for-atomi.patch @@ -0,0 +1,157 @@ +From: David Holsgrove +Subject: [PATCH 2/8] [Patch, microblaze]: Add 4 byte implementation for + atomic builtin + +By providing this initial atomic implementation, gcc is able to generate the other atomic +builtins by using a __sync_compare_and_swap loop + +Add __sync_lock_test_and_set 4 byte atomic builtin + +Changelog + +2013-03-18 David Holsgrove + + * gcc/config/microblaze/sync.md: New file. + * gcc/config/microblaze/microblaze.md: Add UNSPEC_SYNC_CAS, + UNSPEC_SYNC_XCHG and include sync.md. + * gcc/config/microblaze/microblaze.c: Add print_operand 'y'. + * gcc/config/microblaze/constraints.md: Add memory_contraint + 'Q' which is a single register. + +Signed-off-by: David Holsgrove +Upstream-Status: Pending + +diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md +index c6fbc98..c9c1649 100644 +--- a/gcc/config/microblaze/constraints.md ++++ b/gcc/config/microblaze/constraints.md +@@ -70,3 +70,8 @@ + "Double word operand." + (and (match_code "mem") + (match_test "double_memory_operand (op, GET_MODE (op))"))) ++ ++(define_memory_constraint "Q" ++ "Memory operand which is a single register." ++ (and (match_code "mem") ++ (match_test "GET_CODE ( XEXP (op, 0)) == REG"))) +diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c +index 5f4bc60..1562e60 100644 +--- a/gcc/config/microblaze/microblaze.c ++++ b/gcc/config/microblaze/microblaze.c +@@ -2130,6 +2130,7 @@ microblaze_initial_elimination_offset (int from, int to) + 't' print 't' for EQ, 'f' for NE + 'm' Print 1<. ++ ++ ++(define_insn "sync_compare_and_swapsi" ++ [(set (match_operand:SI 0 "register_operand" "=&d") ;; retval ++ (match_operand:SI 1 "nonimmediate_operand" "+Q")) ;; mem ++ (set (match_dup 1) ++ (unspec ++ [(match_operand:SI 2 "register_operand" "d") ;; oldval ++ (match_operand:SI 3 "register_operand" "d")] ;; newval ++ UNSPEC_SYNC_CAS)) ++ (clobber (match_scratch:SI 4 "=&d"))] ;; scratch ++ "" ++ { ++ output_asm_insn ("addc \tr0,r0,r0", operands); ++ output_asm_insn ("lwx \t%0,%y1,r0", operands); ++ output_asm_insn ("addic\t%4,r0,0", operands); ++ output_asm_insn ("bnei \t%4,.-8", operands); ++ output_asm_insn ("cmp \t%4,%0,%2", operands); ++ output_asm_insn ("bnei \t%4,.+16", operands); ++ output_asm_insn ("swx \t%3,%y1,r0", operands); ++ output_asm_insn ("addic\t%4,r0,0", operands); ++ output_asm_insn ("bnei \t%4,.-28", operands); ++ return ""; ++ } ++) ++ ++(define_insn "sync_test_and_setsi" ++ [(set (match_operand:SI 0 "register_operand" "=&d") ;; retval ++ (match_operand:SI 1 "nonimmediate_operand" "+Q")) ;; mem ++ (set (match_dup 1) ++ (unspec ++ [(match_operand:SI 2 "register_operand" "d")] ;; value ++ UNSPEC_SYNC_XCHG)) ++ (clobber (match_scratch:SI 3 "=&d"))] ;; scratch ++ "" ++ { ++ output_asm_insn ("addc \tr0,r0,r0", operands); ++ output_asm_insn ("lwx \t%0,%y1,r0", operands); ++ output_asm_insn ("addic\t%3,r0,0", operands); ++ output_asm_insn ("bnei \t%3,.-8", operands); ++ output_asm_insn ("swx \t%2,%y1,r0", operands); ++ output_asm_insn ("addic\t%3,r0,0", operands); ++ output_asm_insn ("bnei \t%3,.-20", operands); ++ return ""; ++ } ++) +-- +1.7.5.4 + -- cgit v1.2.3-54-g00ecf