From 99db60eba08220956b1541cfb3e3201fd691c87a Mon Sep 17 00:00:00 2001 From: Mark Hatle Date: Mon, 25 Jul 2022 21:50:15 -0500 Subject: binutils: Update patches for Langdale binutils Signed-off-by: Mark Hatle --- .../binutils/binutils-microblaze.inc | 3 - .../0009-Add-new-bit-field-instructions.patch | 47 ++- ...Blaze-initial-support-for-MicroBlaze-64-b.patch | 355 ++++++++++----------- .../0017-Fixed-MB-x-relocation-issues.patch | 43 ++- ...rt-to-new-arithmetic-single-register-inst.patch | 45 ++- ...blaze-Changing-the-long-to-long-long-as-i.patch | 17 +- .../0033-Add-initial-port-of-linux-gdbserver.patch | 93 +++--- ...0034-Initial-port-of-core-reading-support.patch | 79 +++-- ...ebug-message-when-register-is-unavailable.patch | 41 --- ...Add-build_gdbserver-yes-to-top-level-conf.patch | 32 -- ...037-Fixing-the-issues-related-to-GDB-7.12.patch | 220 ------------- ...oBlaze-Double-free-with-ld-no-keep-memory.patch | 36 +-- ...Blaze-Fixing-the-imm-imml-generation-for-.patch | 23 +- ...Blaze-Invalid-data-offsets-pointer-after-.patch | 43 ++- 14 files changed, 372 insertions(+), 705 deletions(-) delete mode 100644 meta-microblaze/recipes-devtools/binutils/binutils/0035-Fix-debug-message-when-register-is-unavailable.patch delete mode 100644 meta-microblaze/recipes-devtools/binutils/binutils/0036-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch delete mode 100644 meta-microblaze/recipes-devtools/binutils/binutils/0037-Fixing-the-issues-related-to-GDB-7.12.patch (limited to 'meta-microblaze/recipes-devtools') diff --git a/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc b/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc index 4a84be9e..d8d0f268 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc +++ b/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc @@ -35,9 +35,6 @@ SRC_URI:append = " \ file://0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch \ file://0033-Add-initial-port-of-linux-gdbserver.patch \ file://0034-Initial-port-of-core-reading-support.patch \ - file://0035-Fix-debug-message-when-register-is-unavailable.patch \ - file://0036-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \ - file://0037-Fixing-the-issues-related-to-GDB-7.12.patch \ file://0038-Patch-MB-MB-binutils-Upstream-port-issues.patch \ file://0039-Patch-MicroBlaze-Double-free-with-ld-no-keep-memory.patch \ file://0040-Patch-MicroBlaze-Fixing-the-imm-imml-generation-for-.patch \ diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0009-Add-new-bit-field-instructions.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0009-Add-new-bit-field-instructions.patch index 16e086fb..5cd7d9c8 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0009-Add-new-bit-field-instructions.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0009-Add-new-bit-field-instructions.patch @@ -22,16 +22,16 @@ Conflicts: opcodes/microblaze-opcm.h | 6 +++- 4 files changed, 104 insertions(+), 5 deletions(-) -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 87efc2b7a46..aa58a18f05c 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c +Index: git/gas/config/tc-microblaze.c +=================================================================== +--- git.orig/gas/config/tc-microblaze.c ++++ git/gas/config/tc-microblaze.c @@ -917,7 +917,7 @@ md_assemble (char * str) unsigned reg2; unsigned reg3; unsigned isize; -- unsigned int immed, temp; -+ unsigned int immed, immed2, temp; +- unsigned int immed = 0, temp; ++ unsigned int immed = 0, immed2 = 0, temp; expressionS exp; char name[20]; @@ -60,7 +60,7 @@ index 87efc2b7a46..aa58a18f05c 100644 + as_fatal (_("Cannot use special register with this instruction")); + if (check_spl_reg (®2)) + as_fatal (_("Cannot use special register with this instruction")); - ++ + /* Width immediate value. */ + if (strcmp (op_end, "")) + op_end = parse_imm (op_end + 1, &exp, MIN_IMM_WIDTH, MAX_IMM_WIDTH); @@ -75,7 +75,7 @@ index 87efc2b7a46..aa58a18f05c 100644 + immed = exp.X_add_number; + if (opcode->instr == bsefi && immed > 31) + as_fatal (_("Width value must be less than 32")); -+ + + /* Shift immediate value. */ + if (strcmp (op_end, "")) + op_end = parse_imm (op_end + 1, &exp, MIN_IMM, MAX_IMM); @@ -112,11 +112,11 @@ index 87efc2b7a46..aa58a18f05c 100644 case INST_TYPE_R1_R2: if (strcmp (op_end, "")) op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ -diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c -index 1696f559a0b..1fe8da2e51b 100644 ---- a/opcodes/microblaze-dis.c -+++ b/opcodes/microblaze-dis.c -@@ -91,7 +91,19 @@ get_field_imm5_mbar (struct string_buf *buf, long instr) +Index: git/opcodes/microblaze-dis.c +=================================================================== +--- git.orig/opcodes/microblaze-dis.c ++++ git/opcodes/microblaze-dis.c +@@ -91,7 +91,19 @@ get_field_imm5_mbar (struct string_buf * } static char * @@ -137,7 +137,7 @@ index 1696f559a0b..1fe8da2e51b 100644 { char *p = strbuf (buf); -@@ -427,7 +439,11 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) +@@ -427,7 +439,11 @@ print_insn_microblaze (bfd_vma memaddr, /* For mbar 16 or sleep insn. */ case INST_TYPE_NONE: break; @@ -150,10 +150,10 @@ index 1696f559a0b..1fe8da2e51b 100644 case INST_TYPE_RD: print_func (stream, "\t%s", get_field_rd (&buf, inst)); break; -diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index bf53e492b9a..6fcded04b49 100644 ---- a/opcodes/microblaze-opc.h -+++ b/opcodes/microblaze-opc.h +Index: git/opcodes/microblaze-opc.h +=================================================================== +--- git.orig/opcodes/microblaze-opc.h ++++ git/opcodes/microblaze-opc.h @@ -59,6 +59,9 @@ /* For mbar. */ #define INST_TYPE_IMM5 20 @@ -201,10 +201,10 @@ index bf53e492b9a..6fcded04b49 100644 + #endif /* MICROBLAZE_OPC */ -diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h -index 250fd6a250a..78a2ac44960 100644 ---- a/opcodes/microblaze-opcm.h -+++ b/opcodes/microblaze-opcm.h +Index: git/opcodes/microblaze-opcm.h +=================================================================== +--- git.orig/opcodes/microblaze-opcm.h ++++ git/opcodes/microblaze-opcm.h @@ -29,7 +29,7 @@ enum microblaze_instr addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul, mulh, mulhu, mulhsu,swapb,swaph, @@ -232,6 +232,3 @@ index 250fd6a250a..78a2ac44960 100644 /* FSL imm mask for get, put instructions. */ #define RFSL_MASK 0x000000F --- -2.17.1 - diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-MicroBlaze-initial-support-for-MicroBlaze-64-b.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-MicroBlaze-initial-support-for-MicroBlaze-64-b.patch index 0ba67003..0d70bf25 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-MicroBlaze-initial-support-for-MicroBlaze-64-b.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-MicroBlaze-initial-support-for-MicroBlaze-64-b.patch @@ -34,11 +34,11 @@ Subject: [PATCH 14/38] [Patch,MicroBlaze] : initial support for MicroBlaze 64 create mode 100644 ld/emulparams/elf64microblaze.sh create mode 100644 ld/emulparams/elf64microblazeel.sh -diff --git a/bfd/Makefile.am b/bfd/Makefile.am -index ed2f701805d..0dc77afa8ad 100644 ---- a/bfd/Makefile.am -+++ b/bfd/Makefile.am -@@ -558,6 +558,7 @@ BFD64_BACKENDS = \ +Index: git/bfd/Makefile.am +=================================================================== +--- git.orig/bfd/Makefile.am ++++ git/bfd/Makefile.am +@@ -563,6 +563,7 @@ BFD64_BACKENDS = \ elf64-riscv.lo \ elfxx-riscv.lo \ elf64-s390.lo \ @@ -46,7 +46,7 @@ index ed2f701805d..0dc77afa8ad 100644 elf64-sparc.lo \ elf64-tilegx.lo \ elf64-x86-64.lo \ -@@ -592,6 +593,7 @@ BFD64_BACKENDS_CFILES = \ +@@ -599,6 +600,7 @@ BFD64_BACKENDS_CFILES = \ elf64-nfp.c \ elf64-ppc.c \ elf64-s390.c \ @@ -54,11 +54,11 @@ index ed2f701805d..0dc77afa8ad 100644 elf64-sparc.c \ elf64-tilegx.c \ elf64-x86-64.c \ -diff --git a/bfd/Makefile.in b/bfd/Makefile.in -index 12807d99760..01ac4805eb8 100644 ---- a/bfd/Makefile.in -+++ b/bfd/Makefile.in -@@ -985,6 +985,7 @@ BFD64_BACKENDS = \ +Index: git/bfd/Makefile.in +=================================================================== +--- git.orig/bfd/Makefile.in ++++ git/bfd/Makefile.in +@@ -991,6 +991,7 @@ BFD64_BACKENDS = \ elf64-riscv.lo \ elfxx-riscv.lo \ elf64-s390.lo \ @@ -66,7 +66,7 @@ index 12807d99760..01ac4805eb8 100644 elf64-sparc.lo \ elf64-tilegx.lo \ elf64-x86-64.lo \ -@@ -1019,6 +1020,7 @@ BFD64_BACKENDS_CFILES = \ +@@ -1027,6 +1028,7 @@ BFD64_BACKENDS_CFILES = \ elf64-nfp.c \ elf64-ppc.c \ elf64-s390.c \ @@ -74,7 +74,7 @@ index 12807d99760..01ac4805eb8 100644 elf64-sparc.c \ elf64-tilegx.c \ elf64-x86-64.c \ -@@ -1498,6 +1500,7 @@ distclean-compile: +@@ -1535,6 +1537,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@ @@ -82,37 +82,37 @@ index 12807d99760..01ac4805eb8 100644 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@ -diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h -index 943bc2e914c..2a1d7563643 100644 ---- a/bfd/bfd-in2.h -+++ b/bfd/bfd-in2.h -@@ -5433,11 +5433,21 @@ value in two words (with an imm instruction). No relocation is - done here - only used for relaxing */ +Index: git/bfd/bfd-in2.h +=================================================================== +--- git.orig/bfd/bfd-in2.h ++++ git/bfd/bfd-in2.h +@@ -5436,11 +5436,21 @@ done here - only used for relaxing */ BFD_RELOC_MICROBLAZE_64_NONE, -+/* This is a 64 bit reloc that stores the 32 bit pc relative + /* This is a 64 bit reloc that stores the 32 bit pc relative + * +value in two words (with an imml instruction). No relocation is + * +done here - only used for relaxing */ + BFD_RELOC_MICROBLAZE_64, + - /* This is a 64 bit reloc that stores the 32 bit pc relative ++/* This is a 64 bit reloc that stores the 32 bit pc relative value in two words (with an imm instruction). The relocation is PC-relative GOT offset */ BFD_RELOC_MICROBLAZE_64_GOTPC, -+/* This is a 64 bit reloc that stores the 32 bit pc relative + /* This is a 64 bit reloc that stores the 32 bit pc relative +value in two words (with an imml instruction). The relocation is +PC-relative GOT offset */ + BFD_RELOC_MICROBLAZE_64_GPC, + - /* This is a 64 bit reloc that stores the 32 bit pc relative ++/* This is a 64 bit reloc that stores the 32 bit pc relative value in two words (with an imm instruction). The relocation is GOT offset */ -diff --git a/bfd/config.bfd b/bfd/config.bfd -index 30087e3b8f8..108b77ac9c1 100644 ---- a/bfd/config.bfd -+++ b/bfd/config.bfd -@@ -822,11 +822,15 @@ case "${targ}" in + BFD_RELOC_MICROBLAZE_64_GOT, +Index: git/bfd/config.bfd +=================================================================== +--- git.orig/bfd/config.bfd ++++ git/bfd/config.bfd +@@ -855,11 +855,15 @@ case "${targ}" in microblazeel*-*) targ_defvec=microblaze_elf32_le_vec targ_selvecs=microblaze_elf32_vec @@ -128,11 +128,11 @@ index 30087e3b8f8..108b77ac9c1 100644 ;; #ifdef BFD64 -diff --git a/bfd/configure b/bfd/configure -index 41586f00f93..ffcd8ad4be0 100755 ---- a/bfd/configure -+++ b/bfd/configure -@@ -13445,6 +13445,8 @@ do +Index: git/bfd/configure +=================================================================== +--- git.orig/bfd/configure ++++ git/bfd/configure +@@ -14198,6 +14198,8 @@ do s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;; score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;; score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;; @@ -141,11 +141,11 @@ index 41586f00f93..ffcd8ad4be0 100755 sh_coff_vec) tb="$tb coff-sh.lo $coff" ;; sh_coff_le_vec) tb="$tb coff-sh.lo $coff" ;; sh_coff_small_vec) tb="$tb coff-sh.lo $coff" ;; -diff --git a/bfd/configure.ac b/bfd/configure.ac -index fec067b2135..9a7df353285 100644 ---- a/bfd/configure.ac -+++ b/bfd/configure.ac -@@ -625,6 +625,8 @@ do +Index: git/bfd/configure.ac +=================================================================== +--- git.orig/bfd/configure.ac ++++ git/bfd/configure.ac +@@ -627,6 +627,8 @@ do s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;; score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;; score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;; @@ -154,10 +154,10 @@ index fec067b2135..9a7df353285 100644 sh_coff_vec) tb="$tb coff-sh.lo $coff" ;; sh_coff_le_vec) tb="$tb coff-sh.lo $coff" ;; sh_coff_small_vec) tb="$tb coff-sh.lo $coff" ;; -diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c -index d461d01e08f..ec94cc13595 100644 ---- a/bfd/cpu-microblaze.c -+++ b/bfd/cpu-microblaze.c +Index: git/bfd/cpu-microblaze.c +=================================================================== +--- git.orig/bfd/cpu-microblaze.c ++++ git/bfd/cpu-microblaze.c @@ -23,7 +23,24 @@ #include "bfd.h" #include "libbfd.h" @@ -184,7 +184,7 @@ index d461d01e08f..ec94cc13595 100644 { 32, /* Bits in a word. */ 32, /* Bits in an address. */ -@@ -39,4 +56,38 @@ const bfd_arch_info_type bfd_microblaze_arch = +@@ -39,4 +56,38 @@ const bfd_arch_info_type bfd_microblaze_ bfd_arch_default_fill, /* Default fill. */ NULL, /* Next in list. */ 0 /* Maximum offset of a reloc from the start of an insn. */ @@ -223,11 +223,11 @@ index d461d01e08f..ec94cc13595 100644 +} +#endif }; -diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index e378542b902..2f2e1ef7f41 100644 ---- a/bfd/elf32-microblaze.c -+++ b/bfd/elf32-microblaze.c -@@ -114,6 +114,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = +Index: git/bfd/elf32-microblaze.c +=================================================================== +--- git.orig/bfd/elf32-microblaze.c ++++ git/bfd/elf32-microblaze.c +@@ -114,6 +114,20 @@ static reloc_howto_type microblaze_elf_h 0x0000ffff, /* Dest Mask. */ true), /* PC relative offset? */ @@ -248,7 +248,7 @@ index e378542b902..2f2e1ef7f41 100644 /* A 64 bit relocation. Table entry not really used. */ HOWTO (R_MICROBLAZE_64, /* Type. */ 0, /* Rightshift. */ -@@ -179,15 +193,15 @@ static reloc_howto_type microblaze_elf_howto_raw[] = +@@ -179,15 +193,15 @@ static reloc_howto_type microblaze_elf_h 0, /* Rightshift. */ 2, /* Size (0 = byte, 1 = short, 2 = long). */ 32, /* Bitsize. */ @@ -267,7 +267,7 @@ index e378542b902..2f2e1ef7f41 100644 HOWTO (R_MICROBLAZE_64_NONE, /* Type. */ 0, /* Rightshift. */ -@@ -278,6 +292,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = +@@ -278,6 +292,21 @@ static reloc_howto_type microblaze_elf_h 0x0000ffff, /* Dest Mask. */ true), /* PC relative offset? */ @@ -289,7 +289,7 @@ index e378542b902..2f2e1ef7f41 100644 /* A 64 bit GOT relocation. Table-entry not really used. */ HOWTO (R_MICROBLAZE_GOT_64, /* Type. */ 0, /* Rightshift. */ -@@ -617,9 +646,15 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, +@@ -617,9 +646,15 @@ microblaze_elf_reloc_type_lookup (bfd * case BFD_RELOC_VTABLE_ENTRY: microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY; break; @@ -305,7 +305,7 @@ index e378542b902..2f2e1ef7f41 100644 case BFD_RELOC_MICROBLAZE_64_GOT: microblaze_reloc = R_MICROBLAZE_GOT_64; break; -@@ -1459,7 +1494,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, +@@ -1459,7 +1494,7 @@ microblaze_elf_relocate_section (bfd *ou if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0) { relocation += addend; @@ -343,11 +343,10 @@ index e378542b902..2f2e1ef7f41 100644 case R_MICROBLAZE_NONE: case R_MICROBLAZE_32_NONE: { -diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -new file mode 100644 -index 00000000000..46c4aba46f1 +Index: git/bfd/elf64-microblaze.c +=================================================================== --- /dev/null -+++ b/bfd/elf64-microblaze.c ++++ git/bfd/elf64-microblaze.c @@ -0,0 +1,3577 @@ +/* Xilinx MicroBlaze-specific support for 32-bit ELF + @@ -3926,11 +3925,11 @@ index 00000000000..46c4aba46f1 +#define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook + +#include "elf64-target.h" -diff --git a/bfd/libbfd.h b/bfd/libbfd.h -index 4153b94564d..2caaf27bcd7 100644 ---- a/bfd/libbfd.h -+++ b/bfd/libbfd.h -@@ -2990,7 +2990,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", +Index: git/bfd/libbfd.h +=================================================================== +--- git.orig/bfd/libbfd.h ++++ git/bfd/libbfd.h +@@ -2994,7 +2994,9 @@ static const char *const bfd_reloc_code_ "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", "BFD_RELOC_MICROBLAZE_32_NONE", "BFD_RELOC_MICROBLAZE_64_NONE", @@ -3940,40 +3939,41 @@ index 4153b94564d..2caaf27bcd7 100644 "BFD_RELOC_MICROBLAZE_64_GOT", "BFD_RELOC_MICROBLAZE_64_PLT", "BFD_RELOC_MICROBLAZE_64_GOTOFF", -diff --git a/bfd/reloc.c b/bfd/reloc.c -index 3a08f7a8a42..288a5026d27 100644 ---- a/bfd/reloc.c -+++ b/bfd/reloc.c -@@ -6904,12 +6904,24 @@ ENUMDOC - done here - only used for relaxing +Index: git/bfd/reloc.c +=================================================================== +--- git.orig/bfd/reloc.c ++++ git/bfd/reloc.c +@@ -6907,6 +6907,12 @@ ENUMDOC ENUM BFD_RELOC_MICROBLAZE_64_NONE -+ENUMDOC + ENUMDOC + This is a 32 bit reloc that stores the 32 bit pc relative + value in two words (with an imml instruction). No relocation is + done here - only used for relaxing +ENUM + BFD_RELOC_MICROBLAZE_64 - ENUMDOC ++ENUMDOC This is a 64 bit reloc that stores the 32 bit pc relative value in two words (with an imm instruction). No relocation is done here - only used for relaxing - ENUM +@@ -6914,6 +6920,12 @@ ENUM BFD_RELOC_MICROBLAZE_64_GOTPC -+ENUMDOC -+ This is a 64 bit reloc that stores the 32 bit pc relative + ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imml instruction). No relocation is + done here - only used for relaxing +ENUM + BFD_RELOC_MICROBLAZE_64_GPC - ENUMDOC - This is a 64 bit reloc that stores the 32 bit pc relative ++ENUMDOC ++ This is a 64 bit reloc that stores the 32 bit pc relative value in two words (with an imm instruction). The relocation is -diff --git a/bfd/targets.c b/bfd/targets.c -index 89b49e721b4..22543016ffb 100644 ---- a/bfd/targets.c -+++ b/bfd/targets.c -@@ -791,6 +791,8 @@ extern const bfd_target mep_elf32_le_vec; + PC-relative GOT offset + ENUM +Index: git/bfd/targets.c +=================================================================== +--- git.orig/bfd/targets.c ++++ git/bfd/targets.c +@@ -794,6 +794,8 @@ extern const bfd_target mep_elf32_le_vec extern const bfd_target metag_elf32_vec; extern const bfd_target microblaze_elf32_vec; extern const bfd_target microblaze_elf32_le_vec; @@ -3982,7 +3982,7 @@ index 89b49e721b4..22543016ffb 100644 extern const bfd_target mips_ecoff_be_vec; extern const bfd_target mips_ecoff_le_vec; extern const bfd_target mips_ecoff_bele_vec; -@@ -1156,6 +1158,10 @@ static const bfd_target * const _bfd_target_vector[] = +@@ -1160,6 +1162,10 @@ static const bfd_target * const _bfd_tar &metag_elf32_vec, @@ -3993,10 +3993,10 @@ index 89b49e721b4..22543016ffb 100644 µblaze_elf32_vec, &mips_ecoff_be_vec, -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 98d0c259246..378fb882f13 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c +Index: git/gas/config/tc-microblaze.c +=================================================================== +--- git.orig/gas/config/tc-microblaze.c ++++ git/gas/config/tc-microblaze.c @@ -35,10 +35,13 @@ #define streq(a,b) (strcmp (a, b) == 0) #endif @@ -4048,7 +4048,7 @@ index 98d0c259246..378fb882f13 100644 {"frame", s_ignore, 0}, {"mask", s_ignore, 0}, /* Emitted by gcc. */ {NULL, NULL, 0} -@@ -773,6 +781,74 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max) +@@ -773,6 +781,74 @@ parse_imm (char * s, expressionS * e, of return new_pointer; } @@ -4123,7 +4123,7 @@ index 98d0c259246..378fb882f13 100644 static char * check_got (int * got_type, int * got_len) { -@@ -827,7 +903,7 @@ check_got (int * got_type, int * got_len) +@@ -827,7 +903,7 @@ check_got (int * got_type, int * got_len extern bfd_reloc_code_real_type parse_cons_expression_microblaze (expressionS *exp, int size) { @@ -4132,7 +4132,7 @@ index 98d0c259246..378fb882f13 100644 { /* Handle @GOTOFF et.al. */ char *save, *gotfree_copy; -@@ -859,6 +935,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size) +@@ -859,6 +935,7 @@ parse_cons_expression_microblaze (expres static const char * str_microblaze_ro_anchor = "RO"; static const char * str_microblaze_rw_anchor = "RW"; @@ -4141,7 +4141,7 @@ index 98d0c259246..378fb882f13 100644 static bool check_spl_reg (unsigned * reg) @@ -920,6 +997,7 @@ md_assemble (char * str) - unsigned int immed, immed2, temp; + unsigned int immed = 0, immed2 = 0, temp; expressionS exp; char name[20]; + long immedl; @@ -4439,7 +4439,7 @@ index 98d0c259246..378fb882f13 100644 { NULL, no_argument, NULL, 0} }; -@@ -1971,13 +2230,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, +@@ -1971,13 +2230,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UN fragP->fr_fix += INST_WORD_SIZE * 2; fragP->fr_var = 0; break; @@ -4555,7 +4555,7 @@ index 98d0c259246..378fb882f13 100644 else if (fixP->fx_r_type == BFD_RELOC_32) fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; else -@@ -2323,6 +2614,32 @@ md_estimate_size_before_relax (fragS * fragP, +@@ -2323,6 +2614,32 @@ md_estimate_size_before_relax (fragS * f as_bad (_("Absolute PC-relative value in relaxation code. Assembler error.....")); abort (); } @@ -4588,7 +4588,7 @@ index 98d0c259246..378fb882f13 100644 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type && !S_IS_WEAK (fragP->fr_symbol)) { -@@ -2330,6 +2647,7 @@ md_estimate_size_before_relax (fragS * fragP, +@@ -2330,6 +2647,7 @@ md_estimate_size_before_relax (fragS * f /* Don't know now whether we need an imm instruction. */ fragP->fr_var = INST_WORD_SIZE; } @@ -4596,7 +4596,7 @@ index 98d0c259246..378fb882f13 100644 else if (S_IS_DEFINED (fragP->fr_symbol) && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0)) { -@@ -2432,6 +2750,7 @@ md_estimate_size_before_relax (fragS * fragP, +@@ -2432,6 +2750,7 @@ md_estimate_size_before_relax (fragS * f case TLSLD_OFFSET: case TLSTPREL_OFFSET: case TLSDTPREL_OFFSET: @@ -4604,7 +4604,7 @@ index 98d0c259246..378fb882f13 100644 fragP->fr_var = INST_WORD_SIZE*2; break; case DEFINED_RO_SEGMENT: -@@ -2485,7 +2804,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) +@@ -2485,7 +2804,7 @@ md_pcrel_from_section (fixS * fixp, segT else { /* The case where we are going to resolve things... */ @@ -4613,7 +4613,7 @@ index 98d0c259246..378fb882f13 100644 return fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE; else return fixp->fx_where + fixp->fx_frag->fr_address; -@@ -2518,6 +2837,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) +@@ -2518,6 +2837,8 @@ tc_gen_reloc (asection * section ATTRIBU case BFD_RELOC_MICROBLAZE_32_RWSDA: case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: case BFD_RELOC_MICROBLAZE_64_GOTPC: @@ -4622,7 +4622,7 @@ index 98d0c259246..378fb882f13 100644 case BFD_RELOC_MICROBLAZE_64_GOT: case BFD_RELOC_MICROBLAZE_64_PLT: case BFD_RELOC_MICROBLAZE_64_GOTOFF: -@@ -2578,6 +2899,18 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) +@@ -2578,6 +2899,18 @@ tc_gen_reloc (asection * section ATTRIBU return rel; } @@ -4641,7 +4641,7 @@ index 98d0c259246..378fb882f13 100644 int md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) { -@@ -2591,6 +2924,10 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) +@@ -2591,6 +2924,10 @@ md_parse_option (int c, const char * arg case OPTION_LITTLE: target_big_endian = 0; break; @@ -4652,7 +4652,7 @@ index 98d0c259246..378fb882f13 100644 default: return 0; } -@@ -2606,6 +2943,7 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED) +@@ -2606,6 +2943,7 @@ md_show_usage (FILE * stream ATTRIBUTE_U fprintf (stream, _(" MicroBlaze specific assembler options:\n")); fprintf (stream, " -%-23s%s\n", "mbig-endian", N_("assemble for a big endian cpu")); fprintf (stream, " -%-23s%s\n", "mlittle-endian", N_("assemble for a little endian cpu")); @@ -4672,11 +4672,11 @@ index 98d0c259246..378fb882f13 100644 break; default: as_bad (_("unsupported BFD relocation size %u"), size); -diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h -index c6d33f873c4..34aa1174ed2 100644 ---- a/gas/config/tc-microblaze.h -+++ b/gas/config/tc-microblaze.h -@@ -78,7 +78,9 @@ extern const struct relax_type md_relax_table[]; +Index: git/gas/config/tc-microblaze.h +=================================================================== +--- git.orig/gas/config/tc-microblaze.h ++++ git/gas/config/tc-microblaze.h +@@ -81,7 +81,9 @@ extern const struct relax_type md_relax_ #ifdef OBJ_ELF @@ -4687,10 +4687,10 @@ index c6d33f873c4..34aa1174ed2 100644 #define ELF_TC_SPECIAL_SECTIONS \ { ".sdata", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE }, \ -diff --git a/include/elf/common.h b/include/elf/common.h -index 0cca28673dd..a650d624e3c 100644 ---- a/include/elf/common.h -+++ b/include/elf/common.h +Index: git/include/elf/common.h +=================================================================== +--- git.orig/include/elf/common.h ++++ git/include/elf/common.h @@ -354,6 +354,7 @@ #define EM_65816 257 /* WDC 65816/65C816 */ #define EM_LOONGARCH 258 /* LoongArch */ @@ -4699,11 +4699,11 @@ index 0cca28673dd..a650d624e3c 100644 /* If it is necessary to assign new unofficial EM_* values, please pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision -diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h -index 936ef484289..1f958724e5f 100644 ---- a/include/elf/microblaze.h -+++ b/include/elf/microblaze.h -@@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) +Index: git/include/elf/microblaze.h +=================================================================== +--- git.orig/include/elf/microblaze.h ++++ git/include/elf/microblaze.h +@@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_relo RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */ RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */ RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) @@ -4712,42 +4712,42 @@ index 936ef484289..1f958724e5f 100644 END_RELOC_NUMBERS (R_MICROBLAZE_max) -diff --git a/ld/Makefile.am b/ld/Makefile.am -index f8e99325361..8d263078750 100644 ---- a/ld/Makefile.am -+++ b/ld/Makefile.am -@@ -410,6 +410,8 @@ ALL_64_EMULATION_SOURCES = \ - eelf32ltsmipn32.c \ - eelf32ltsmipn32_fbsd.c \ - eelf32mipswindiss.c \ -+ eelf64microblazeel.c \ -+ eelf64microblaze.c \ - eelf32lriscv.c \ - eelf32lriscv_ilp32f.c \ - eelf32lriscv_ilp32.c \ -@@ -902,6 +904,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS) +Index: git/ld/Makefile.am +=================================================================== +--- git.orig/ld/Makefile.am ++++ git/ld/Makefile.am +@@ -448,6 +448,8 @@ ALL_64_EMULATION_SOURCES = \ + eelf64lriscv_lp64f.c \ + eelf64ltsmip.c \ + eelf64ltsmip_fbsd.c \ ++ eelf64microblazeel.c \ ++ eelf64microblaze.c \ + eelf64mmix.c \ + eelf64ppc.c \ + eelf64ppc_fbsd.c \ +@@ -916,6 +918,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULAT @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32_fbsd.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32mipswindiss.Pc@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Pc@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64bpf.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@ -diff --git a/ld/Makefile.in b/ld/Makefile.in -index ef2e99e08da..f7e845b9274 100644 ---- a/ld/Makefile.in -+++ b/ld/Makefile.in -@@ -899,6 +899,8 @@ ALL_64_EMULATION_SOURCES = \ - eelf32ltsmipn32.c \ - eelf32ltsmipn32_fbsd.c \ - eelf32mipswindiss.c \ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64_fbsd.Pc@am__quote@ +Index: git/ld/Makefile.in +=================================================================== +--- git.orig/ld/Makefile.in ++++ git/ld/Makefile.in +@@ -938,6 +938,8 @@ ALL_64_EMULATION_SOURCES = \ + eelf64lriscv_lp64f.c \ + eelf64ltsmip.c \ + eelf64ltsmip_fbsd.c \ + eelf64microblazeel.c \ + eelf64microblaze.c \ - eelf32lriscv.c \ - eelf32lriscv_ilp32f.c \ - eelf32lriscv_ilp32.c \ -@@ -1398,6 +1400,8 @@ distclean-compile: + eelf64mmix.c \ + eelf64ppc.c \ + eelf64ppc_fbsd.c \ +@@ -1411,6 +1413,8 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xstormy16.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xtensa.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32z80.Po@am__quote@ @@ -4756,20 +4756,20 @@ index ef2e99e08da..f7e845b9274 100644 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64_fbsd.Po@am__quote@ -@@ -2560,6 +2564,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS) +@@ -2583,6 +2587,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULAT @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32_fbsd.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32mipswindiss.Pc@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Pc@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64bpf.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@ -diff --git a/ld/configure.tgt b/ld/configure.tgt -index 6205d7c9872..3e97dbb311c 100644 ---- a/ld/configure.tgt -+++ b/ld/configure.tgt -@@ -468,6 +468,9 @@ microblaze*-linux*) targ_emul="elf32mb_linux" + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64_fbsd.Pc@am__quote@ +Index: git/ld/configure.tgt +=================================================================== +--- git.orig/ld/configure.tgt ++++ git/ld/configure.tgt +@@ -478,6 +478,9 @@ microblaze*-linux*) targ_emul="elf32mb_l microblazeel*) targ_emul=elf32microblazeel targ_extra_emuls=elf32microblaze ;; @@ -4779,11 +4779,10 @@ index 6205d7c9872..3e97dbb311c 100644 microblaze*) targ_emul=elf32microblaze targ_extra_emuls=elf32microblazeel ;; -diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh -new file mode 100644 -index 00000000000..9c7b0eb7080 +Index: git/ld/emulparams/elf64microblaze.sh +=================================================================== --- /dev/null -+++ b/ld/emulparams/elf64microblaze.sh ++++ git/ld/emulparams/elf64microblaze.sh @@ -0,0 +1,23 @@ +SCRIPT_NAME=elfmicroblaze +OUTPUT_FORMAT="elf64-microblazeel" @@ -4808,11 +4807,10 @@ index 00000000000..9c7b0eb7080 + +TEMPLATE_NAME=elf32 +#GENERATE_SHLIB_SCRIPT=yes -diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh -new file mode 100644 -index 00000000000..9c7b0eb7080 +Index: git/ld/emulparams/elf64microblazeel.sh +=================================================================== --- /dev/null -+++ b/ld/emulparams/elf64microblazeel.sh ++++ git/ld/emulparams/elf64microblazeel.sh @@ -0,0 +1,23 @@ +SCRIPT_NAME=elfmicroblaze +OUTPUT_FORMAT="elf64-microblazeel" @@ -4837,10 +4835,10 @@ index 00000000000..9c7b0eb7080 + +TEMPLATE_NAME=elf32 +#GENERATE_SHLIB_SCRIPT=yes -diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c -index 1fe8da2e51b..fc15d210fe0 100644 ---- a/opcodes/microblaze-dis.c -+++ b/opcodes/microblaze-dis.c +Index: git/opcodes/microblaze-dis.c +=================================================================== +--- git.orig/opcodes/microblaze-dis.c ++++ git/opcodes/microblaze-dis.c @@ -33,6 +33,7 @@ #define get_field_r1(buf, instr) get_field (buf, instr, RA_MASK, RA_LOW) #define get_field_r2(buf, instr) get_field (buf, instr, RB_MASK, RB_LOW) @@ -4849,29 +4847,29 @@ index 1fe8da2e51b..fc15d210fe0 100644 #define get_int_field_r1(instr) ((instr & RA_MASK) >> RA_LOW) #define NUM_STRBUFS 3 -@@ -73,11 +74,19 @@ get_field_imm (struct string_buf *buf, long instr) +@@ -73,11 +74,19 @@ get_field_imm (struct string_buf *buf, l } static char * -get_field_imm5 (struct string_buf *buf, long instr) +get_field_imml (struct string_buf *buf, long instr) - { - char *p = strbuf (buf); ++{ ++ char *p = strbuf (buf); + sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW)); + return p; +} - -- sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW)); ++ +static char * +get_field_imms (struct string_buf *buf, long instr) -+{ -+ char *p = strbuf (buf); -+ + { + char *p = strbuf (buf); + +- sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW)); + sprintf (p, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW)); return p; } -@@ -91,14 +100,14 @@ get_field_imm5_mbar (struct string_buf *buf, long instr) +@@ -91,14 +100,14 @@ get_field_imm5_mbar (struct string_buf * } static char * @@ -4889,7 +4887,7 @@ index 1fe8da2e51b..fc15d210fe0 100644 return p; } -@@ -308,9 +317,13 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) +@@ -308,9 +317,13 @@ print_insn_microblaze (bfd_vma memaddr, } } break; @@ -4905,7 +4903,7 @@ index 1fe8da2e51b..fc15d210fe0 100644 break; case INST_TYPE_RD_RFSL: print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), -@@ -417,6 +430,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) +@@ -417,6 +430,10 @@ print_insn_microblaze (bfd_vma memaddr, case INST_TYPE_RD_R2: print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_r2 (&buf, inst)); @@ -4916,7 +4914,7 @@ index 1fe8da2e51b..fc15d210fe0 100644 break; case INST_TYPE_R2: print_func (stream, "\t%s", get_field_r2 (&buf, inst)); -@@ -440,8 +457,8 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) +@@ -440,8 +457,8 @@ print_insn_microblaze (bfd_vma memaddr, case INST_TYPE_NONE: break; /* For bit field insns. */ @@ -4927,10 +4925,10 @@ index 1fe8da2e51b..fc15d210fe0 100644 break; /* For tuqula instruction */ case INST_TYPE_RD: -diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index 6fcded04b49..4a1545d8920 100644 ---- a/opcodes/microblaze-opc.h -+++ b/opcodes/microblaze-opc.h +Index: git/opcodes/microblaze-opc.h +=================================================================== +--- git.orig/opcodes/microblaze-opc.h ++++ git/opcodes/microblaze-opc.h @@ -40,7 +40,7 @@ #define INST_TYPE_RD_SPECIAL 11 #define INST_TYPE_R1 12 @@ -5155,10 +5153,10 @@ index 6fcded04b49..4a1545d8920 100644 + #endif /* MICROBLAZE_OPC */ -diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h -index 78a2ac44960..70e351f6f4e 100644 ---- a/opcodes/microblaze-opcm.h -+++ b/opcodes/microblaze-opcm.h +Index: git/opcodes/microblaze-opcm.h +=================================================================== +--- git.orig/opcodes/microblaze-opcm.h ++++ git/opcodes/microblaze-opcm.h @@ -25,6 +25,7 @@ enum microblaze_instr @@ -5218,6 +5216,3 @@ index 78a2ac44960..70e351f6f4e 100644 /* FSL imm mask for get, put instructions. */ #define RFSL_MASK 0x000000F --- -2.17.1 - diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0017-Fixed-MB-x-relocation-issues.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0017-Fixed-MB-x-relocation-issues.patch index a14b7159..7b05d13c 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0017-Fixed-MB-x-relocation-issues.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0017-Fixed-MB-x-relocation-issues.patch @@ -13,11 +13,11 @@ Conflicts: gas/tc.h | 2 +- 3 files changed, 152 insertions(+), 53 deletions(-) -diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -index 46c4aba46f1..010ee1d15b4 100644 ---- a/bfd/elf64-microblaze.c -+++ b/bfd/elf64-microblaze.c -@@ -1511,6 +1511,14 @@ microblaze_elf_relocate_section (bfd *output_bfd, +Index: git/bfd/elf64-microblaze.c +=================================================================== +--- git.orig/bfd/elf64-microblaze.c ++++ git/bfd/elf64-microblaze.c +@@ -1511,6 +1511,14 @@ microblaze_elf_relocate_section (bfd *ou bfd_put_16 (input_bfd, relocation & 0xffff, contents + offset + endian); @@ -32,7 +32,7 @@ index 46c4aba46f1..010ee1d15b4 100644 else { bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, -@@ -1618,6 +1626,14 @@ microblaze_elf_relocate_section (bfd *output_bfd, +@@ -1618,6 +1626,14 @@ microblaze_elf_relocate_section (bfd *ou bfd_put_16 (input_bfd, relocation & 0xffff, contents + offset + endian); } @@ -70,7 +70,7 @@ index 46c4aba46f1..010ee1d15b4 100644 } /* Read-modify-write into the bfd, an immediate value into appropriate fields of -@@ -1741,10 +1767,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) +@@ -1741,10 +1767,18 @@ microblaze_bfd_write_imm_value_64 (bfd * unsigned long instr_lo; instr_hi = bfd_get_32 (abfd, bfd_addr); @@ -93,11 +93,11 @@ index 46c4aba46f1..010ee1d15b4 100644 instr_lo = bfd_get_32 (abfd, bfd_addr + INST_WORD_SIZE); instr_lo &= ~0x0000ffff; instr_lo |= (val & 0x0000ffff); -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 685a6e93f2b..9b311ed1450 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c -@@ -392,7 +392,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED) +Index: git/gas/config/tc-microblaze.c +=================================================================== +--- git.orig/gas/config/tc-microblaze.c ++++ git/gas/config/tc-microblaze.c +@@ -392,7 +392,7 @@ microblaze_s_weakext (int ignore ATTRIBU Integer arg to pass to the function. */ /* If the pseudo-op is not found in this table, it searches in the obj-elf.c, and then in the read.c table. */ @@ -119,8 +119,8 @@ index 685a6e93f2b..9b311ed1450 100644 unsigned reg2; unsigned reg3; unsigned isize; -- unsigned int immed, immed2, temp; -+ unsigned long immed, immed2, temp; +- unsigned int immed = 0, immed2 = 0, temp; ++ unsigned long immed = 0, immed2 = 0, temp; expressionS exp; char name[20]; long immedl; @@ -316,7 +316,7 @@ index 685a6e93f2b..9b311ed1450 100644 if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) fixP->fx_r_type = BFD_RELOC_64; if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) -@@ -2636,7 +2693,14 @@ md_estimate_size_before_relax (fragS * fragP, +@@ -2636,7 +2693,14 @@ md_estimate_size_before_relax (fragS * f } else { @@ -332,7 +332,7 @@ index 685a6e93f2b..9b311ed1450 100644 fragP->fr_var = INST_WORD_SIZE*2; } break; -@@ -2913,6 +2977,7 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) +@@ -2913,6 +2977,7 @@ md_parse_option (int c, const char * arg case OPTION_M64: //if (arg != NULL && strcmp (arg, "64") == 0) microblaze_arch_size = 64; @@ -340,10 +340,10 @@ index 685a6e93f2b..9b311ed1450 100644 break; default: return 0; -diff --git a/gas/tc.h b/gas/tc.h -index c9722307dea..f1fa7495e29 100644 ---- a/gas/tc.h -+++ b/gas/tc.h +Index: git/gas/tc.h +=================================================================== +--- git.orig/gas/tc.h ++++ git/gas/tc.h @@ -22,7 +22,7 @@ /* In theory (mine, at least!) the machine dependent part of the assembler should only have to include one file. This one. -- JF */ @@ -353,6 +353,3 @@ index c9722307dea..f1fa7495e29 100644 const char * md_atof (int, char *, int *); int md_parse_option (int, const char *); --- -2.17.1 - diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0025-Added-support-to-new-arithmetic-single-register-inst.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Added-support-to-new-arithmetic-single-register-inst.patch index d0c23c91..f614a245 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0025-Added-support-to-new-arithmetic-single-register-inst.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Added-support-to-new-arithmetic-single-register-inst.patch @@ -17,10 +17,10 @@ Conflicts: opcodes/microblaze-opcm.h | 5 +- 4 files changed, 200 insertions(+), 6 deletions(-) -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 52058d94f98..1a543c328f2 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c +Index: git/gas/config/tc-microblaze.c +=================================================================== +--- git.orig/gas/config/tc-microblaze.c ++++ git/gas/config/tc-microblaze.c @@ -423,12 +423,33 @@ void md_begin (void) { @@ -68,12 +68,12 @@ index 52058d94f98..1a543c328f2 100644 @@ -996,9 +1018,10 @@ md_assemble (char * str) unsigned reg3; unsigned isize; - unsigned long immed, immed2, temp; + unsigned long immed = 0, immed2 = 0, temp; - expressionS exp; -+ expressionS exp,exp1; ++ expressionS exp, exp1; char name[20]; long immedl; -+ int reg=0; ++ int reg = 0; /* Drop leading whitespace. */ while (ISSPACE (* str)) @@ -209,11 +209,11 @@ index 52058d94f98..1a543c328f2 100644 case INST_TYPE_R1_RFSL: if (strcmp (op_end, "")) op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ -diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c -index 143a0a9d59e..d945d144c44 100644 ---- a/opcodes/microblaze-dis.c -+++ b/opcodes/microblaze-dis.c -@@ -130,6 +130,14 @@ get_field_imm15 (struct string_buf *buf, long instr) +Index: git/opcodes/microblaze-dis.c +=================================================================== +--- git.orig/opcodes/microblaze-dis.c ++++ git/opcodes/microblaze-dis.c +@@ -130,6 +130,14 @@ get_field_imm15 (struct string_buf *buf, return p; } @@ -228,7 +228,7 @@ index 143a0a9d59e..d945d144c44 100644 static char * get_field_special (struct string_buf *buf, long instr, const struct op_code_struct *op) -@@ -456,6 +464,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) +@@ -456,6 +464,9 @@ print_insn_microblaze (bfd_vma memaddr, /* For mbar 16 or sleep insn. */ case INST_TYPE_NONE: break; @@ -238,10 +238,10 @@ index 143a0a9d59e..d945d144c44 100644 /* For bit field insns. */ case INST_TYPE_RD_R1_IMMW_IMMS: print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst)); -diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index fff7520ae81..c25383f2de9 100644 ---- a/opcodes/microblaze-opc.h -+++ b/opcodes/microblaze-opc.h +Index: git/opcodes/microblaze-opc.h +=================================================================== +--- git.orig/opcodes/microblaze-opc.h ++++ git/opcodes/microblaze-opc.h @@ -69,6 +69,7 @@ #define INST_TYPE_RD_R1_IMMW_IMMS 21 @@ -337,10 +337,10 @@ index fff7520ae81..c25383f2de9 100644 {"imml", INST_TYPE_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB2000000, OPCODE_MASK_H8, imml, immediate_inst }, {"breai", INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst }, {"breaid", INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst }, -diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h -index 70e351f6f4e..cf7512d6a87 100644 ---- a/opcodes/microblaze-opcm.h -+++ b/opcodes/microblaze-opcm.h +Index: git/opcodes/microblaze-opcm.h +=================================================================== +--- git.orig/opcodes/microblaze-opcm.h ++++ git/opcodes/microblaze-opcm.h @@ -61,7 +61,9 @@ enum microblaze_instr eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd, @@ -359,6 +359,3 @@ index 70e351f6f4e..cf7512d6a87 100644 +#define IMM16_MASK 0x0000FFFF #endif /* MICROBLAZE-OPCM */ --- -2.17.1 - diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-microblaze-Changing-the-long-to-long-long-as-i.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-microblaze-Changing-the-long-to-long-long-as-i.patch index 85f63b41..d1997929 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-microblaze-Changing-the-long-to-long-long-as-i.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-microblaze-Changing-the-long-to-long-long-as-i.patch @@ -9,19 +9,16 @@ Signed-off-by :Nagaraju Mekala gas/config/tc-microblaze.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 805d250b6ac..84f60c029c1 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c +Index: git/gas/config/tc-microblaze.c +=================================================================== +--- git.orig/gas/config/tc-microblaze.c ++++ git/gas/config/tc-microblaze.c @@ -1017,7 +1017,7 @@ md_assemble (char * str) unsigned reg2; unsigned reg3; unsigned isize; -- unsigned long immed, immed2, temp; -+ unsigned long long immed, immed2, temp; - expressionS exp,exp1; +- unsigned long immed = 0, immed2 = 0, temp; ++ unsigned long long immed = 0, immed2 = 0, temp; + expressionS exp, exp1; char name[20]; long immedl; --- -2.17.1 - diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Add-initial-port-of-linux-gdbserver.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Add-initial-port-of-linux-gdbserver.patch index 402566be..c08a06e1 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Add-initial-port-of-linux-gdbserver.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Add-initial-port-of-linux-gdbserver.patch @@ -40,11 +40,11 @@ Conflicts: create mode 100644 gdb/gdbserver/linux-microblaze-low.c create mode 100644 gdb/regformats/reg-microblaze.dat -diff --git a/gdb/configure.host b/gdb/configure.host -index e94a19b0332..4d73af78bc3 100644 ---- a/gdb/configure.host -+++ b/gdb/configure.host -@@ -66,6 +66,7 @@ hppa*) gdb_host_cpu=pa ;; +Index: git/gdb/configure.host +=================================================================== +--- git.orig/gdb/configure.host ++++ git/gdb/configure.host +@@ -60,6 +60,7 @@ hppa*) gdb_host_cpu=pa ;; i[34567]86*) gdb_host_cpu=i386 ;; m68*) gdb_host_cpu=m68k ;; mips*) gdb_host_cpu=mips ;; @@ -52,20 +52,19 @@ index e94a19b0332..4d73af78bc3 100644 powerpc* | rs6000) gdb_host_cpu=powerpc ;; sparcv9 | sparc64) gdb_host_cpu=sparc ;; s390*) gdb_host_cpu=s390 ;; -@@ -136,6 +137,8 @@ mips*-*-netbsd* | mips*-*-knetbsd*-gnu) - mips*-*-freebsd*) gdb_host=fbsd ;; - mips64*-*-openbsd*) gdb_host=obsd64 ;; +@@ -132,6 +133,8 @@ mips64*-*-openbsd*) gdb_host=obsd64 ;; + + or1k-*-linux*) gdb_host=linux ;; +microblaze*-*linux*) gdb_host=linux ;; + powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*) gdb_host=aix ;; powerpc*-*-freebsd*) gdb_host=fbsd ;; -diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml -new file mode 100644 -index 00000000000..8983e66eb3d +Index: git/gdb/features/microblaze-linux.xml +=================================================================== --- /dev/null -+++ b/gdb/features/microblaze-linux.xml ++++ git/gdb/features/microblaze-linux.xml @@ -0,0 +1,12 @@ + +