From 4e80d65608b88554495c9cde84db5eaa8f9ce859 Mon Sep 17 00:00:00 2001
From: Nathan Rossi <nathan.rossi@xilinx.com>
Date: Wed, 23 Oct 2013 18:02:02 +1000
Subject: boards/zc706: Updated device-tree

* Added additional node properties for board specific setup
* Fixed up QSPI flash properties for ZC706 flash configuration
* Fixed up incorrect setup of I2C sub nodes

Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
---
 conf/machine/boards/zc706/zc706-zynq7.dtsi | 30 ++++++++++++++++--------------
 1 file changed, 16 insertions(+), 14 deletions(-)

(limited to 'conf')

diff --git a/conf/machine/boards/zc706/zc706-zynq7.dtsi b/conf/machine/boards/zc706/zc706-zynq7.dtsi
index 25d11ac9..4051e4f3 100644
--- a/conf/machine/boards/zc706/zc706-zynq7.dtsi
+++ b/conf/machine/boards/zc706/zc706-zynq7.dtsi
@@ -7,12 +7,12 @@
 	} ;
 	ps7_ddr_0: memory@0 {
 		device_type = "memory";
-		reg = < 0x0 0x40000000 >;
+		reg = <0x0 0x40000000>;
 	} ;
 	ps7_axi_interconnect_0: amba@0 {
 		ps7_ethernet_0: ps7-ethernet@e000b000 {
 			phy-handle = <&phy0>;
-			phy-mode = "gmii";
+			phy-mode = "rgmii-id";
 			mdio {
 				phy0: phy@7 {
 					compatible = "marvell,88e1116r";
@@ -22,6 +22,8 @@
 			} ;
 		} ;
 		ps7_qspi_0: ps7-qspi@e000d000 {
+			is-dual = <1>;
+			xlnx,qspi-mode = <0x2>;
 			flash@0 {
 				compatible = "n25q128";
 				reg = <0x0>;
@@ -96,31 +98,31 @@
 					#address-cells = <1>;
 					#size-cells = <0>;
 					reg = <4>;
-					rtc@54 {
+					rtc@51 {
 						compatible = "nxp,pcf8563";
 						reg = <0x51>;
 					};
 				};
 
+
 				i2c@7 {
 					#address-cells = <1>;
 					#size-cells = <0>;
 					reg = <7>;
-					hwmon@52 {
-						compatible = "pmbus,ucd9248";
-						reg = <52>;
-					};
-					hwmon@53 {
-						compatible = "pmbus,ucd9248";
-						reg = <53>;
-					};
-					hwmon@54 {
-						compatible = "pmbus,ucd9248";
-						reg = <54>;
+					ucd90120@65 {
+						compatible = "pmbus,ucd90120";
+						reg = <0x65>;
 					};
 				};
 			};
 		};
+		ps7_gpio_0: ps7-gpio@e000a000 {
+			gpio-mask-high = <0x0>;
+			gpio-mask-low = <0x0>;
+		} ;
+		ps7_usb_0: ps7-usb@e0002000 {
+			usb-reset = <&ps7_gpio_0 7 0>; /* MIO USB PHY Reset */
+		} ;
 		
 		/* Disabled Devices */
 		ps7_sd_1: ps7-sdio@e0101000 { compatible = "invalid"; };
-- 
cgit v1.2.3-54-g00ecf