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-rw-r--r--recipes-devtools/qemu/qemu-zynqmp-mainline/0011-arm-xilinx-zynqmp-Add-UART-support.patch91
1 files changed, 0 insertions, 91 deletions
diff --git a/recipes-devtools/qemu/qemu-zynqmp-mainline/0011-arm-xilinx-zynqmp-Add-UART-support.patch b/recipes-devtools/qemu/qemu-zynqmp-mainline/0011-arm-xilinx-zynqmp-Add-UART-support.patch
deleted file mode 100644
index ccf86cf7..00000000
--- a/recipes-devtools/qemu/qemu-zynqmp-mainline/0011-arm-xilinx-zynqmp-Add-UART-support.patch
+++ /dev/null
@@ -1,91 +0,0 @@
1From d35149eea398ca20d0c1ec382e9fce5e2c229ce0 Mon Sep 17 00:00:00 2001
2From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
3Date: Wed, 18 Feb 2015 18:56:37 -0800
4Subject: [PATCH 11/15] arm: xilinx-zynqmp: Add UART support
5
6There are 2x Cadence UARTs in Zynq MP. Add them.
7
8Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
9Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
10---
11 hw/arm/xlnx-zynqmp.c | 21 +++++++++++++++++++++
12 include/hw/arm/xlnx-zynqmp.h | 3 +++
13 2 files changed, 24 insertions(+)
14
15diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
16index d8c648d..e015025 100644
17--- a/hw/arm/xlnx-zynqmp.c
18+++ b/hw/arm/xlnx-zynqmp.c
19@@ -33,6 +33,14 @@ static const int gem_intr[XLNX_ZYNQMP_NUM_GEMS] = {
20 57, 59, 61, 63,
21 };
22
23+static const uint64_t uart_addr[XLNX_ZYNQMP_NUM_UARTS] = {
24+ 0xFF000000, 0xFF010000,
25+};
26+
27+static const int uart_intr[XLNX_ZYNQMP_NUM_UARTS] = {
28+ 21, 22,
29+};
30+
31 static inline int arm_gic_ppi_index(int cpu_nr, int ppi_index)
32 {
33 return GIC_NUM_SPI_INTR + cpu_nr * 32 + ppi_index;
34@@ -57,6 +65,11 @@ static void xlnx_zynqmp_init(Object *obj)
35 object_initialize(&s->gem[i], sizeof(s->gem[i]), TYPE_CADENCE_GEM);
36 qdev_set_parent_bus(DEVICE(&s->gem[i]), sysbus_get_default());
37 }
38+
39+ for (i = 0; i < XLNX_ZYNQMP_NUM_UARTS; i++) {
40+ object_initialize(&s->uart[i], sizeof(s->uart[i]), TYPE_CADENCE_UART);
41+ qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus_get_default());
42+ }
43 }
44
45 #define ERR_PROP_CHECK_RETURN(err, errp) do { \
46@@ -114,6 +127,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
47 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gem[i]), 0,
48 gic_spi[gem_intr[i]]);
49 }
50+
51+ for (i = 0; i < XLNX_ZYNQMP_NUM_UARTS; i++) {
52+ object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err);
53+ ERR_PROP_CHECK_RETURN(err, errp);
54+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, uart_addr[i]);
55+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
56+ gic_spi[uart_intr[i]]);
57+ }
58 }
59
60 static void xlnx_zynqmp_class_init(ObjectClass *oc, void *data)
61diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
62index 12a1be1..62d8d3f 100644
63--- a/include/hw/arm/xlnx-zynqmp.h
64+++ b/include/hw/arm/xlnx-zynqmp.h
65@@ -4,6 +4,7 @@
66 #include "hw/arm/arm.h"
67 #include "hw/intc/arm_gic.h"
68 #include "hw/net/cadence_gem.h"
69+#include "hw/char/cadence_uart.h"
70
71 #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
72 #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
73@@ -11,6 +12,7 @@
74
75 #define XLNX_ZYNQMP_NUM_CPUS 4
76 #define XLNX_ZYNQMP_NUM_GEMS 4
77+#define XLNX_ZYNQMP_NUM_UARTS 2
78
79 typedef struct XlnxZynqMPState {
80 /*< private >*/
81@@ -20,6 +22,7 @@ typedef struct XlnxZynqMPState {
82 ARMCPU cpu[XLNX_ZYNQMP_NUM_CPUS];
83 GICState gic;
84 CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS];
85+ CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS];
86 } XlnxZynqMPState;
87
88 #define XLNX_ZYNQMP_H_
89--
901.7.10.4
91